diff --git a/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/bist.c b/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/bist.c
index fa5312b6f23b464ac6783a13e063a6466f5586c5..932a21f65ce4b3b9f90020d36c7093e9d3f735f8 100755
--- a/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/bist.c
+++ b/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/bist.c
@@ -138,24 +138,21 @@ static const char *testStatusPrint(int32_t status)
 void bist_TaskFxn(SemaphoreP_Handle bistSemHandle)
 {
     int32_t testResult = 0;
-    int     i, j;
-    int    *pbist_array;
-    int    *lbist_array;
+    int32_t     i, j;
+    int32_t    *pbist_array;
+    int32_t    *lbist_array;
     /* Bitmap representing status of each PBIST test in each boot stage */
-    int     pbist_stage_status[NUM_BOOT_STAGES];
+    int32_t     pbist_stage_status[NUM_BOOT_STAGES];
+    /* Bitmap representing status of each negative PBIST test in each boot stage */
+    int32_t     pbist_stage_neg_status[NUM_BOOT_STAGES];
     /* Bitmap representing status of each LBIST test in each boot stage */
-    int     lbist_stage_status[NUM_BOOT_STAGES];
-    uint64  time_pre_boot_stage_start;
-    uint64  time_stage_finish[NUM_BOOT_STAGES];
-#if defined(GATHER_BIST_STAGE_DETAILS)
-    uint64  time_lbist_start[NUM_BOOT_STAGES];
-    uint64  time_pbist_start[NUM_BOOT_STAGES];
-#endif
+    int32_t     lbist_stage_status[NUM_BOOT_STAGES];
 
     /* Initialize boot stage status bitmaps to "not run/fail" */
     for (i = 0; i < NUM_BOOT_STAGES; i++)
     {
         pbist_stage_status[i] = 0x0;
+        pbist_stage_neg_status[i] = 0x0;
         lbist_stage_status[i] = 0x0;
     }
 
@@ -163,26 +160,41 @@ void bist_TaskFxn(SemaphoreP_Handle bistSemHandle)
 
     if (testResult != 0)
     {
-        AppUtils_Printf(MSG_NORMAL,
-                        "PBIST_commonInit ...FAILED \n");
+        AppUtils_Printf(MSG_NORMAL,"PBIST_commonInit ...FAILED \n");
     }
     else
     {
-        time_pre_boot_stage_start = get_usec_timestamp();
-
+        /* This example presents a scenario in which the BISTs are performed in stages
+         * with booting of specific cores performed after certain stages. This example
+	 * is adapted from the MCUSW Boot App for J721E. No cores are actually loaded
+	 * in this example. Only the flow of performing BIST in stages is shown. */
         /* Run pre-boot-stage PBIST's.  The definitions of the pre-boot-stage PBIST's
          * are found in soc/<SOC Device>/bist_core_defs.c.*/
+	for (i = 0; i < num_pbists_pre_boot; i++)
+        {
+            /* Run test on selected instance */
+            testResult = PBIST_runTest(pbist_pre_boot_stage[i], true);
+            /* Convert signed return value (with -1 = failure and 0 = pass) to become
+             * 0 = failure and 1 = pass */
+            pbist_pre_boot_stage_neg_status[i] = testResult + 1;
+            if ( testResult != 0)
+            {
+                AppUtils_Printf(MSG_NORMAL,"PBIST negative test failed for %d\n",
+                                pbist_pre_boot_stage[i]);
+                break;
+            }
+        }
+
         for (i = 0; i < num_pbists_pre_boot; i++)
         {
             /* Run test on selected instance */
-            testResult = PBIST_runTest(pbist_pre_boot_stage[i]);
+            testResult = PBIST_runTest(pbist_pre_boot_stage[i], false);
             /* Convert signed return value (with -1 = failure and 0 = pass) to become
              * 0 = failure and 1 = pass */
             pbist_pre_boot_stage_status[i] = testResult + 1;
             if ( testResult != 0)
             {
-                AppUtils_Printf(MSG_NORMAL,
-                                "PBIST functional test failed for %d\n",
+                AppUtils_Printf(MSG_NORMAL,"PBIST functional test failed for %d\n",
                                 pbist_pre_boot_stage[i]);
                 break;
             }
@@ -222,13 +234,28 @@ void bist_TaskFxn(SemaphoreP_Handle bistSemHandle)
         {
             pbist_array = pbist_array_stage[j];
             lbist_array = lbist_array_stage[j];
-#if defined(GATHER_BIST_STAGE_DETAILS)
-            time_pbist_start[j] = get_usec_timestamp();
-#endif
             for (i = 0; i < num_pbists_per_boot_stage[j]; i++)
             {
+                PBIST_clecConfig(pbist_array[i]);
+
                 /* Run test on selected instance */
-                testResult = PBIST_runTest(pbist_array[i]);
+                testResult = PBIST_runTest(pbist_array[i], true);
+
+                /* Convert signed return value (with -1 = failure and 0 = pass) to become
+                 * a single bit as part of bitfield with 0 = failure and 1 = pass */
+                pbist_stage_neg_status[j] |= ((uint32_t)(testResult + 1) << i);
+                if ( testResult != 0)
+                {
+                    AppUtils_Printf(MSG_NORMAL,"PBIST negative test failed for %d\n",
+                                    pbist_array[i]);
+                    break;
+                }
+            }
+
+            for (i = 0; i < num_pbists_per_boot_stage[j]; i++)
+            {
+                /* Run test on selected instance */
+                testResult = PBIST_runTest(pbist_array[i], false);
 
                 /* Convert signed return value (with -1 = failure and 0 = pass) to become
                  * a single bit as part of bitfield with 0 = failure and 1 = pass */
@@ -243,9 +270,6 @@ void bist_TaskFxn(SemaphoreP_Handle bistSemHandle)
             }
 #if defined(DEBUG)
             AppUtils_Printf(MSG_NORMAL, "Ran PBIST for Stage %d\n", j);
-#endif
-#if defined(GATHER_BIST_STAGE_DETAILS)
-            time_lbist_start[j] = get_usec_timestamp();
 #endif
             for (i = 0; i < num_lbists_per_boot_stage[j]; i++)
             {
@@ -268,18 +292,23 @@ void bist_TaskFxn(SemaphoreP_Handle bistSemHandle)
             /* Signal Boot Task that BIST for the stage is completed */
             SemaphoreP_post(bistSemHandle);
 
-            time_stage_finish[j] = get_usec_timestamp();
         }
     }
 
     if (testResult == 0)
     {
-        /* Delay print out of boot log to avoid prints by other tasks */
-        TaskP_sleep(2000);
-
-        AppUtils_Printf(MSG_NORMAL,
-                        "BIST: Pre-boot stage - Started at %d usec\n",
-                        time_pre_boot_stage_start);
+		TaskP_sleep(2000);
+        AppUtils_Printf(MSG_NORMAL,"==========================\n");
+        AppUtils_Printf(MSG_NORMAL,"BIST: Example App Summary:\n");
+        AppUtils_Printf(MSG_NORMAL,"==========================\n");
+        for (i = 0; i < num_pbists_pre_boot; i++)
+        {
+            AppUtils_Printf(MSG_NORMAL,"BIST: Pre-boot Stage - Ran negative PBIST ID - %s, Result = %s\n",
+                            pbistName(pbist_pre_boot_stage[i]),
+                            testStatusPrint(pbist_pre_boot_stage_neg_status[i]));
+        }
+        AppUtils_Printf(MSG_NORMAL,"Pre-boot stage - Ran %d negative PBIST total sections\n",
+                        num_pbists_pre_boot);
         for (i = 0; i < num_pbists_pre_boot; i++)
         {
             AppUtils_Printf(MSG_NORMAL,
@@ -306,9 +335,15 @@ void bist_TaskFxn(SemaphoreP_Handle bistSemHandle)
             pbist_array = pbist_array_stage[j];
             lbist_array = lbist_array_stage[j];
 #if defined(GATHER_BIST_STAGE_DETAILS)
-            AppUtils_Printf(MSG_NORMAL,
-                            "BIST: Stage %d - Started running PBIST sections at %d usec\n",
-                            j, (uint32)time_pbist_start[j]);
+            for (i = 0; i < num_pbists_per_boot_stage[j]; i++)
+            {
+                AppUtils_Printf(MSG_NORMAL,"BIST: Stage %d - Ran negative PBIST ID - %s, Result = %s\n",
+                                j, pbistName(pbist_array[i]),
+                                testStatusPrint((pbist_stage_neg_status[j] >> i) & 0x1));
+            }
+            AppUtils_Printf(MSG_NORMAL,"BIST: Stage %d - Ran %d negative PBIST total sections\n",
+                            j, (uint32_t)num_pbists_per_boot_stage[j]);
+
             for (i = 0; i < num_pbists_per_boot_stage[j]; i++)
             {
                 AppUtils_Printf(MSG_NORMAL,
@@ -320,9 +355,6 @@ void bist_TaskFxn(SemaphoreP_Handle bistSemHandle)
                             "BIST: Stage %d - Ran %d PBIST total sections\n",
                             j, (uint32)num_pbists_per_boot_stage[j]);
 
-            AppUtils_Printf(MSG_NORMAL,
-                            "BIST: Stage %d - Started running LBIST sections at %d usec\n",
-                            j, (uint32)time_lbist_start[j]);
             for (i = 0; i < num_lbists_per_boot_stage[j]; i++)
             {
                 AppUtils_Printf(MSG_NORMAL,
@@ -334,9 +366,6 @@ void bist_TaskFxn(SemaphoreP_Handle bistSemHandle)
                             "BIST: Stage %d - Ran %d LBIST sections\n",
                             j, (uint32)num_lbists_per_boot_stage[j]);
 #endif
-            AppUtils_Printf(MSG_NORMAL,
-                            "BIST: Stage %d - Completed stage at %d usec\n",
-                            j, (uint32)time_stage_finish[j]);
         }
     }
 }
diff --git a/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/lbist_utils.c b/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/lbist_utils.c
old mode 100755
new mode 100644
index 4b9da447f4c179a7761b2ae40f6e5f14d8d030d7..31e7a50fff429e2d8345ee2977427bc1205eef2d
--- a/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/lbist_utils.c
+++ b/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/lbist_utils.c
@@ -69,13 +69,12 @@
 /* ========================================================================== */
 /*                             Include Files                                  */
 /* ========================================================================== */
-
-#include "Std_Types.h"
+#include <stdint.h>
 #include <string.h>
-#include <ti/csl/csl_types.h>
-#include <ti/csl/csl_lbist.h>
-#include <ti/csl/soc.h>
+#include <sdl_types.h>
+#include <src/sdl/sdl_lbist.h>
 #include <ti/drv/sciclient/sciclient.h>
+#include <ti/drv/uart/UART_stdio.h>
 
 /* Osal API header files */
 #include <ti/osal/HwiP.h>
@@ -86,14 +85,10 @@
 #include "lbist_utils.h"
 #include "lbist_defs.h"
 
-#include "app_utils.h"
-
 /* ========================================================================== */
 /*                           Macros & Typedefs                                */
 /* ========================================================================== */
 
-#define LBIST_MAX_TIMEOUT_VALUE    10000000u
-
 /* This flag adds more verbose prints */
 //#define DEBUG
 
@@ -104,15 +99,7 @@
 /*                 Internal Function Declarations                             */
 /* ========================================================================== */
 
-static int32_t LBIST_isPostLbistTimeout(uint32_t postStatMmrRegVal,
-                                        uint8_t section,
-                                        Bool *pIsTimedOut);
-static int32_t LBIST_isPostLbistDone(uint32_t postStatMmrRegVal,
-                                     uint8_t section,
-                                     Bool *pIsDone);
-static int32_t LBIST_runPostLbistCheck(uint32_t hwPostCoreNum,
-                                       CSL_lbistRegs *pLBISTRegs,
-                                       uint32_t *pLBISTSig);
+/* None */
 
 /* ========================================================================== */
 /*                         Structure Declarations                             */
@@ -146,72 +133,28 @@ static int32_t LBIST_runPostLbistCheck(uint32_t hwPostCoreNum,
  * It includes the following steps (each step has many sub-steps specificied
  * in more details within the function).
  * For HW POST LBIST:
- * Step 1: Configure interrupt handler
- * Step 2: Check POST results (already run at startup)
+ * Step 1: Check POST results (already run at startup)
  *
  * For SW-initiated LBIST:
- * Step 1: Configure interrupt handler
- * Step 2: Configure processor to correct state
- * Step 3: Configure LBIST
- * Step 4: Run LBIST test
- * Step 5: Restore cores
- * Step 6: Check result of LBIST
+ * Step 1: Configure processor to correct state
+ * Step 2: Run LBIST test
+ * Step 3: Restore cores
  * */
 int32_t LBIST_runTest(uint32_t coreIndex)
 {
     int32_t testResult = 0;
     int32_t status;
-    uint32_t calculatedMISR;
-    uint32_t expectedMISR;
-    Bool isLBISTRunning = CSL_FALSE;
-    CSL_lbistRegs *pLBISTRegs;
-    uint32_t *pLBISTSig;
-    HwiP_Params       hwiParams;
-    HwiP_Handle LBIST_hwiPHandle;
-    uint32_t timeoutCount = 0;
+    bool result;
+    SDL_LBIST_postResult postResult;
+
 #if defined(PROFILE_LBIST_TIMING)
     uint64_t startTime , testStartTime,  testEndTime, endTime;
     uint64_t prepTime, diffTime, restoreTime;
 
-    AppUtils_Printf(MSG_NORMAL,
-                    "\n Starting LBIST test on %s, index %d...",
+    UART_printf("\n Starting LBIST test on %s, index %d...",
                     LBIST_TestHandleArray[coreIndex].coreName,
                     coreIndex);
 #endif
-    /* Populate local variables from instance structure */
-    pLBISTRegs = LBIST_TestHandleArray[coreIndex].pLBISTRegs;
-    pLBISTSig = LBIST_TestHandleArray[coreIndex].pLBISTSig;
-
-    /*-- Step 1: Configure interrupt handler --*/
-    /* Register call back function for LBIST Interrupt */
-    if (LBIST_TestHandleArray[coreIndex].handler != NULL)
-    {
-        /* Disable interrupt */
-        HwiP_disableInterrupt(LBIST_TestHandleArray[coreIndex].interruptNumber);
-
-        /* Default parameter initialization */
-        HwiP_Params_init(&hwiParams);
-
-        /* Pass core Index as argument to handler*/
-        hwiParams.arg = coreIndex;
-#ifdef DEBUG
-    AppUtils_Printf(MSG_NORMAL,
-                    "\n  HwiP_Params_init complete \n");
-#endif
-
-        LBIST_hwiPHandle = HwiP_create(LBIST_TestHandleArray[coreIndex].interruptNumber,
-                                       (HwiP_Fxn)LBIST_TestHandleArray[coreIndex].handler,
-                                       (void *)&hwiParams);
-        if (LBIST_hwiPHandle == NULL)
-        {
-            AppUtils_Printf(MSG_NORMAL,
-                            "   Interrupt registration failed \n");
-            testResult = -1;
-        }
-    }
-
-    /* Initialize done flag */
-    LBIST_TestHandleArray[coreIndex].doneFlag = false;
 
 #if defined(PROFILE_LBIST_TIMING)
     /* Get start time of test */
@@ -222,31 +165,29 @@ int32_t LBIST_runTest(uint32_t coreIndex)
     if ((testResult == 0) &&
         (LBIST_TestHandleArray[coreIndex].hwPostCoreCheck == true))
     {
-        /* HW POST test flow - test already run, checking the result */
-        /* Step 2: (only for POST) Check POST results  */
-        testResult = LBIST_runPostLbistCheck(LBIST_TestHandleArray[coreIndex].hwPostCoreNum,
-                                             LBIST_TestHandleArray[coreIndex].pLBISTRegs,
-                                             LBIST_TestHandleArray[coreIndex].pLBISTSig);
-#ifdef DEBUG
-        AppUtils_Printf(MSG_NORMAL,
-                        "HW POST core: %s: result = %d\n",
-                        LBIST_TestHandleArray[coreIndex].coreName,
-                        testResult);
-#endif
+        status = SDL_LBIST_getPOSTStatus(&postResult);
+        if (status != SDL_PASS)
+        {
+            testResult = -1;
+            UART_printf("    SDL_LBIST_getPOSTStatus failed: Status %d \n", status);
+        }
+        else
+        {
+            LBIST_printPostStatus(&postResult);
+        }
     }
     else
     {
         /* SW-initiated LBIST test flow */
-        /*-- Step 2: Configure processor to correct state --*/
+        /*-- Step 1: Configure processor to correct state --*/
 
-        /**--- Step 2a: Request Primary core ---*/
+        /**--- Step 1a: Request Primary core ---*/
         if (testResult == 0)
         {
             if (LBIST_TestHandleArray[coreIndex].tisciProcId != 0u)
             {
 #ifdef DEBUG
-                AppUtils_Printf(MSG_NORMAL,
-                                "  Primary core: %s: Requesting processor \n",
+                UART_printf("  Primary core: %s: Requesting processor \n",
                                 LBIST_TestHandleArray[coreIndex].coreName);
 #endif
                 /* Request Primary core */
@@ -254,23 +195,21 @@ int32_t LBIST_runTest(uint32_t coreIndex)
                                                             SCICLIENT_SERVICE_WAIT_FOREVER);
                 if (status != CSL_PASS)
                 {
-                    AppUtils_Printf(MSG_NORMAL,
-                                    "   Primary core: Sciclient_procBootRequestProcessor, ProcId 0x%x...FAILED \n",
+                    UART_printf("   Primary core: Sciclient_procBootRequestProcessor, ProcId 0x%x...FAILED \n",
                                     LBIST_TestHandleArray[coreIndex].tisciProcId);
                     testResult = -1;
                 }
             }
         }
 
-        /**--- Step 2b: Request Secondary core ---*/
+        /**--- Step 1b: Request Secondary core ---*/
         if (testResult == 0)
         {
             if ((LBIST_TestHandleArray[coreIndex].secondaryCoreNeeded)
                 && (LBIST_TestHandleArray[coreIndex].tisciSecProcId != 0u))
             {
 #ifdef DEBUG
-                AppUtils_Printf(MSG_NORMAL,
-                                "  Secondary core: %s: Requesting processor \n",
+                UART_printf("  Secondary core: %s: Requesting processor \n",
                                 LBIST_TestHandleArray[coreIndex].secCoreName);
 #endif
                 /* Request secondary core */
@@ -278,15 +217,14 @@ int32_t LBIST_runTest(uint32_t coreIndex)
                                                             SCICLIENT_SERVICE_WAIT_FOREVER);
                 if (status != CSL_PASS)
                 {
-                    AppUtils_Printf(MSG_NORMAL,
-                                    "   Secondary core: Sciclient_procBootRequestProcessor, ProcId 0x%x...FAILED \n",
+                    UART_printf("   Secondary core: Sciclient_procBootRequestProcessor, ProcId 0x%x...FAILED \n",
                                     LBIST_TestHandleArray[coreIndex].tisciSecProcId);
                     testResult = -1;
                 }
             }
         }
 
-        /**--- Step 2c: Place all Auxilliary modules needed to run test into module reset ---*/
+        /**--- Step 1c: Place all Auxilliary modules needed to run test into module reset ---*/
         if (testResult == 0)
         {
             int i;
@@ -295,8 +233,7 @@ int32_t LBIST_runTest(uint32_t coreIndex)
             for ( i = 0; i < LBIST_TestHandleArray[coreIndex].numAuxDevices; i++)
             {
 #ifdef DEBUG
-                AppUtils_Printf(MSG_NORMAL,
-                                "  Putting into module reset Device number %d Device Id %x\n",
+                UART_printf("  Putting into module reset Device number %d Device Id %x\n",
                                 i,
                                 LBIST_TestHandleArray[coreIndex].auxDeviceIdsP[i]);
 #endif
@@ -306,8 +243,7 @@ int32_t LBIST_runTest(uint32_t coreIndex)
                                                   SCICLIENT_SERVICE_WAIT_FOREVER);
                 if (status != CSL_PASS)
                 {
-                    AppUtils_Printf(MSG_NORMAL,
-                                    "  Sciclient_pmSetModuleState 0x%x ...FAILED \n",
+                    UART_printf("  Sciclient_pmSetModuleState 0x%x ...FAILED \n",
                                     LBIST_TestHandleArray[coreIndex].auxDeviceIdsP[i]);
                     testResult = -1;
                     break;
@@ -315,12 +251,11 @@ int32_t LBIST_runTest(uint32_t coreIndex)
             }
         }
 
-        /**--- Step 2d: Put Primary core in module reset and local reset ---*/
-        if ((testResult == 0) && (LBIST_TestHandleArray[coreIndex].tisciDeviceId != NULL))
+        /**--- Step 1d: Put Primary core in module reset and local reset ---*/
+        if ((testResult == 0) && (LBIST_TestHandleArray[coreIndex].tisciDeviceId != 0U))
         {
 #ifdef DEBUG
-            AppUtils_Printf(MSG_NORMAL,
-                            "  Primary core: Putting in module and local reset the core %s \n",
+            UART_printf("  Primary core: Putting in module and local reset the core %s \n",
                             LBIST_TestHandleArray[coreIndex].coreName);
 #endif
             status = Sciclient_pmSetModuleRst(LBIST_TestHandleArray[coreIndex].tisciDeviceId,
@@ -328,19 +263,17 @@ int32_t LBIST_runTest(uint32_t coreIndex)
                                               SCICLIENT_SERVICE_WAIT_FOREVER);
             if (status != CSL_PASS)
             {
-                 AppUtils_Printf(MSG_NORMAL,
-                                 "  Sciclient_pmSetModuleRst 0x%x ...FAILED \n",
+                 UART_printf("  Sciclient_pmSetModuleRst 0x%x ...FAILED \n",
                                  LBIST_TestHandleArray[coreIndex].tisciDeviceId);
                  testResult = -1;
             }
         }
 
-        /**--- Step 2e: Put Secondary core in module reset and local reset ---*/
-        if ((testResult == 0) && (LBIST_TestHandleArray[coreIndex].tisciSecDeviceId != NULL))
+        /**--- Step 1e: Put Secondary core in module reset and local reset ---*/
+        if ((testResult == 0) && (LBIST_TestHandleArray[coreIndex].tisciSecDeviceId != 0U))
         {
 #ifdef DEBUG
-            AppUtils_Printf(MSG_NORMAL,
-                            "  Secondary core: Putting in module and local reset the core %s \n",
+            UART_printf("  Secondary core: Putting in module and local reset the core %s \n",
                             LBIST_TestHandleArray[coreIndex].secCoreName);
 #endif
             status = Sciclient_pmSetModuleRst(LBIST_TestHandleArray[coreIndex].tisciSecDeviceId,
@@ -348,14 +281,13 @@ int32_t LBIST_runTest(uint32_t coreIndex)
                                               SCICLIENT_SERVICE_WAIT_FOREVER);
             if (status != CSL_PASS)
             {
-                 AppUtils_Printf(MSG_NORMAL,
-                                 "  Sciclient_pmSetModuleRst 0x%x ...FAILED \n",
+                 UART_printf("  Sciclient_pmSetModuleRst 0x%x ...FAILED \n",
                                  LBIST_TestHandleArray[coreIndex].tisciSecDeviceId);
                  testResult = -1;
             }
         }
 
-        /**--- Step 2f: Place all Auxilliary modules needed to run test into retention ---*/
+        /**--- Step 1f: Place all Auxilliary modules needed to run test into retention ---*/
         if (testResult == 0)
         {
             int i;
@@ -364,8 +296,7 @@ int32_t LBIST_runTest(uint32_t coreIndex)
             for ( i = 0; i < LBIST_TestHandleArray[coreIndex].numAuxDevices; i++)
             {
 #ifdef DEBUG
-                AppUtils_Printf(MSG_NORMAL,
-                                "  Putting into Retention Device number %d Device Id %x\n",
+                UART_printf("  Putting into Retention Device number %d Device Id %x\n",
                                 i,
                                 LBIST_TestHandleArray[coreIndex].auxDeviceIdsP[i]);
 #endif
@@ -376,8 +307,7 @@ int32_t LBIST_runTest(uint32_t coreIndex)
                                                     SCICLIENT_SERVICE_WAIT_FOREVER);
                 if (status != CSL_PASS)
                 {
-                    AppUtils_Printf(MSG_NORMAL,
-                                    "  Sciclient_pmSetModuleState 0x%x ...FAILED \n",
+                    UART_printf("  Sciclient_pmSetModuleState 0x%x ...FAILED \n",
                                     LBIST_TestHandleArray[coreIndex].auxDeviceIdsP[i]);
                     testResult = -1;
                     break;
@@ -385,15 +315,14 @@ int32_t LBIST_runTest(uint32_t coreIndex)
             }
         }
 
-        /**--- Step 2g: Place Primary core into retention ---*/
+        /**--- Step 1g: Place Primary core into retention ---*/
         if (testResult == 0)
         {
             if (LBIST_TestHandleArray[coreIndex].tisciDeviceId != 0u)
             {
                 /* Placing Primary core into Retention */
 #ifdef DEBUG
-                AppUtils_Printf(MSG_NORMAL,
-                                "  Primary core: Putting into Retention %s \n",
+                UART_printf("  Primary core: Putting into Retention %s \n",
                                 LBIST_TestHandleArray[coreIndex].coreName);
 #endif
                 status =  Sciclient_pmSetModuleState(LBIST_TestHandleArray[coreIndex].tisciDeviceId,
@@ -402,22 +331,20 @@ int32_t LBIST_runTest(uint32_t coreIndex)
                                                      SCICLIENT_SERVICE_WAIT_FOREVER);
                 if (status != CSL_PASS)
                 {
-                    AppUtils_Printf(MSG_NORMAL,
-                                    "   Primary core: Sciclient_pmSetModuleState...FAILED \n");
+                    UART_printf("   Primary core: Sciclient_pmSetModuleState...FAILED \n");
                     testResult = -1;
                 }
             }
         }
 
-        /**--- Step 2h: Place Secondary core into retention ---*/
+        /**--- Step 1h: Place Secondary core into retention ---*/
         if (testResult == 0)
         {
             if (LBIST_TestHandleArray[coreIndex].tisciSecDeviceId != 0u)
             {
                 /* Placing Secondary core into Retention */
 #ifdef DEBUG
-                AppUtils_Printf(MSG_NORMAL,
-                                "  Secondary core: Putting into Retention %s \n",
+                UART_printf("  Secondary core: Putting into Retention %s \n",
                                 LBIST_TestHandleArray[coreIndex].secCoreName);
 #endif
                 status =  Sciclient_pmSetModuleState(LBIST_TestHandleArray[coreIndex].tisciSecDeviceId,
@@ -426,194 +353,24 @@ int32_t LBIST_runTest(uint32_t coreIndex)
                                                      SCICLIENT_SERVICE_WAIT_FOREVER);
                 if (status != CSL_PASS)
                 {
-                    AppUtils_Printf(MSG_NORMAL,
-                                    "   Secondary core: Sciclient_pmSetModuleState...FAILED \n");
+                    UART_printf("   Secondary core: Sciclient_pmSetModuleState...FAILED \n");
                     testResult = -1;
                 }
             }
         }
 
-        /**-- Step 3: Configure LBIST --*/
-        if (testResult == 0)
-        {
-            /* Configure LBIST */
-
-            status = CSL_LBIST_programConfig(pLBISTRegs, &LBIST_TestHandleArray[coreIndex].LBISTConfig);
-            if (status != CSL_PASS)
-            {
-                AppUtils_Printf(MSG_NORMAL, "    LBIST program config failed \n");
-                testResult = -1;
-            }
-        }
-
-        /**-- Step 4: Run LBIST test --*/
+        /**-- Step 2: Run LBIST test --*/
 #if defined(PROFILE_LBIST_TIMING)
         /* Get start time for LBIST test */
         testStartTime = TimerP_getTimeInUsecs();
 #endif
 
-        /**--- Step 4a: Enable Isolation ---*/
-        if (testResult == 0)
-        {
-#ifdef DEBUG
-            AppUtils_Printf(MSG_NORMAL, "\n Starting CSL_LBIST_enableIsolation\n");
-#endif
-            /* Call CSL API */
-            status = CSL_LBIST_enableIsolation(pLBISTRegs);
-            if (status != CSL_PASS)
-            {
-                AppUtils_Printf(MSG_NORMAL, "   CSL_LBIST_enableIsolation...FAILED \n");
-                testResult = -1;
-            }
-        }
-
-        /**--- Step 4b: reset LBIST ---*/
         if (testResult == 0)
         {
-#ifdef DEBUG
-            AppUtils_Printf(MSG_NORMAL, "\n Starting CSL_LBIST_reset \n");
-#endif
-            status = CSL_LBIST_reset(pLBISTRegs);
-            if (status != CSL_PASS)
+            status = SDL_LBIST_selfTest(LBIST_TestHandleArray[coreIndex].instance, SDL_LBIST_TEST, &result);
+            if ((status != SDL_PASS) || (result == false))
             {
-                AppUtils_Printf(MSG_NORMAL, "   CSL_LBIST_reset...FAILED \n");
-                testResult = -1;
-            }
-        }
-
-        /**--- Step 4c: Enable Run BIST Mode ---*/
-        if (testResult == 0)
-        {
-#ifdef DEBUG
-            AppUtils_Printf(MSG_NORMAL, "\n Starting CSL_LBIST_enabledRunBISTMode\n");
-#endif
-            status = CSL_LBIST_enableRunBISTMode(pLBISTRegs);
-            if (status != CSL_PASS)
-            {
-                AppUtils_Printf(MSG_NORMAL, "   CSL_LBIST_enableRunBISTMode...FAILED \n");
-                testResult = -1;
-            }
-        }
-
-        /**--- Step 4d: Start LBIST ---*/
-        if (testResult == 0)
-        {
-#ifdef DEBUG
-            AppUtils_Printf(MSG_NORMAL, "\n Starting CSL_LBIST_start\n");
-#endif
-            status = CSL_LBIST_start(pLBISTRegs);
-            if (status != CSL_PASS)
-            {
-                AppUtils_Printf(MSG_NORMAL, "   CSL_LBIST_start...FAILED \n");
-                testResult = -1;
-            }
-        }
-
-        /**--- Step 4e: Check LBIST Running status ---*/
-        if (testResult == 0)
-        {
-#ifdef DEBUG
-            AppUtils_Printf(MSG_NORMAL, "\n Starting CSL_LBIST_isRunning\n");
-#endif
-            status = CSL_LBIST_isRunning(pLBISTRegs, &isLBISTRunning);
-            if (status != CSL_PASS)
-            {
-                AppUtils_Printf(MSG_NORMAL, "   CSL_LBIST_isRunning...FAILED \n");
-                testResult = -1;
-            }
-        }
-
-        /**--- Step 4f: Wait for LBIST Interrupt ---*/
-        if (testResult == 0)
-        {
-            /* Just checking if LBIST in running state */
-            if ( isLBISTRunning != CSL_TRUE )
-            {
-#ifdef DEBUG
-                AppUtils_Printf(MSG_NORMAL, "   LBIST not running \n");
-#endif
-            }
-
-            /* Timeout if exceeds time */
-            while ((!LBIST_TestHandleArray[coreIndex].doneFlag)
-                   && (timeoutCount++ < LBIST_MAX_TIMEOUT_VALUE));
-
-            if (!(LBIST_TestHandleArray[coreIndex].doneFlag))
-            {
-                AppUtils_Printf(MSG_NORMAL, "   LBIST test timed out \n");
-                testResult = -1;
-            }
-            /* reset Done flag so we can run again */
-            LBIST_TestHandleArray[coreIndex].doneFlag = false;
-        }
-
-        /**--- Step 4g: Get Signature of test ---*/
-        if (testResult == 0)
-        {
-#ifdef DEBUG
-            AppUtils_Printf(MSG_NORMAL, "\n Starting CSL_LBIST_getMISR\n");
-#endif
-            status = CSL_LBIST_getMISR(pLBISTRegs, &calculatedMISR);
-            if (status != CSL_PASS)
-            {
-                AppUtils_Printf(MSG_NORMAL, "   Get MISR failed \n");
-                testResult = -1;
-            }
-        }
-
-        /**--- Step 4h: Get Expected Signature ---*/
-        if (testResult == 0)
-        {
-#ifdef DEBUG
-            AppUtils_Printf(MSG_NORMAL, "\n Starting CSL_LBIST_getExpectedMISR\n");
-#endif
-            status = CSL_LBIST_getExpectedMISR(pLBISTSig, &expectedMISR);
-            if ( status != CSL_PASS)
-            {
-                AppUtils_Printf(MSG_NORMAL, "   Get Expected MISR failed \n");
-                testResult = -1;
-            }
-        }
-
-        /**--- Step 4i: Clear Run BIST Mode ---*/
-        if (testResult == 0)
-        {
-#ifdef DEBUG
-            AppUtils_Printf(MSG_NORMAL, "\n Starting CSL_LBIST_clearRunBISTMode\n");
-#endif
-            status = CSL_LBIST_clearRunBISTMode(pLBISTRegs);
-            if ( status != CSL_PASS)
-            {
-                AppUtils_Printf(MSG_NORMAL,
-                                "   CSL_LBIST_clearRunBISTMode failed \n");
-                testResult = -1;
-            }
-        }
-
-        /**--- Step 4j: Stop LBIST ---*/
-        if (testResult == 0)
-        {
-#ifdef DEBUG
-            AppUtils_Printf(MSG_NORMAL, "\n Starting CSL_LBIST_stop\n");
-#endif
-            status = CSL_LBIST_stop(pLBISTRegs);
-            if ( status != CSL_PASS)
-            {
-                AppUtils_Printf(MSG_NORMAL, "   CSL_LBIST_stop failed \n");
-                testResult = -1;
-            }
-        }
-
-        /**--- Step 4k: Reset LBIST ---*/
-        if (testResult == 0)
-        {
-#ifdef DEBUG
-            AppUtils_Printf(MSG_NORMAL, "\n Starting CSL_LBIST_reset\n");
-#endif
-            status = CSL_LBIST_reset(pLBISTRegs);
-            if ( status != CSL_PASS)
-            {
-                AppUtils_Printf(MSG_NORMAL, "   CSL_LBIST_reset failed \n");
+                UART_printf("    LBIST selfTest failed \n");
                 testResult = -1;
             }
         }
@@ -623,18 +380,17 @@ int32_t LBIST_runTest(uint32_t coreIndex)
         testEndTime = TimerP_getTimeInUsecs();
 #endif
 
-        /**-- Step 5: Restore cores --*/
+        /**-- Step 3: Restore cores --*/
         /* The following sequence is needed to restore core to normal operation */
 
-        /**--- Step 5a: Switch off Secondary core ---*/
+        /**--- Step 3a: Switch off Secondary core ---*/
         if (testResult == 0)
         {
             if (LBIST_TestHandleArray[coreIndex].secondaryCoreNeeded)
             {
                 /* Power off Secondary core */
 #ifdef DEBUG
-                AppUtils_Printf(MSG_NORMAL,
-                                "  Secondary core: Powering off %s \n",
+                UART_printf("  Secondary core: Powering off %s \n",
                                 LBIST_TestHandleArray[coreIndex].secCoreName);
 #endif
                 status =  Sciclient_pmSetModuleState(LBIST_TestHandleArray[coreIndex].tisciSecDeviceId,
@@ -643,19 +399,18 @@ int32_t LBIST_runTest(uint32_t coreIndex)
                                                      SCICLIENT_SERVICE_WAIT_FOREVER);
                 if (status != CSL_PASS)
                 {
-                    AppUtils_Printf(MSG_NORMAL,
-                                    "   Secondary core: Sciclient_pmSetModuleState:  Power off FAILED \n");
+                    UART_printf("   Secondary core: Sciclient_pmSetModuleState:  Power off FAILED \n");
                     testResult = -1;
                 }
             }
         }
 
-        /**--- Step 5b: Switch off Primary core ---*/
+        /**--- Step 3b: Switch off Primary core ---*/
         if (testResult == 0)
         {
             /* Power off Primary core */
 #ifdef DEBUG
-            AppUtils_Printf(MSG_NORMAL, "  Primary core: Powering off %s \n",
+            UART_printf("  Primary core: Powering off %s \n",
                         LBIST_TestHandleArray[coreIndex].coreName);
 #endif
             status =  Sciclient_pmSetModuleState(LBIST_TestHandleArray[coreIndex].tisciDeviceId,
@@ -664,12 +419,11 @@ int32_t LBIST_runTest(uint32_t coreIndex)
                                                  SCICLIENT_SERVICE_WAIT_FOREVER);
             if (status != CSL_PASS)
             {
-                AppUtils_Printf(MSG_NORMAL,
-                                "   Primary core: Sciclient_pmSetModuleState: Power off FAILED \n");
+                UART_printf("   Primary core: Sciclient_pmSetModuleState: Power off FAILED \n");
             }
         }
 
-        /**--- Step 5c: Switch off Auxilliary modules ---*/
+        /**--- Step 3c: Switch off Auxilliary modules ---*/
         if (testResult == 0)
         {
             int i;
@@ -678,8 +432,7 @@ int32_t LBIST_runTest(uint32_t coreIndex)
             for ( i = 0; i < LBIST_TestHandleArray[coreIndex].numAuxDevices; i++)
             {
 #ifdef DEBUG
-                AppUtils_Printf(MSG_NORMAL,
-                                "  Powering off Device number %d Device Id %x\n",
+                UART_printf("  Powering off Device number %d Device Id %x\n",
                                 i,
                                 LBIST_TestHandleArray[coreIndex].auxDeviceIdsP[i]);
 #endif
@@ -690,8 +443,7 @@ int32_t LBIST_runTest(uint32_t coreIndex)
                                                     SCICLIENT_SERVICE_WAIT_FOREVER);
                 if (status != CSL_PASS)
                 {
-                    AppUtils_Printf(MSG_NORMAL,
-                                    "  Sciclient_pmSetModuleState 0x%x ...FAILED \n",
+                    UART_printf("  Sciclient_pmSetModuleState 0x%x ...FAILED \n",
                                     LBIST_TestHandleArray[coreIndex].auxDeviceIdsP[i]);
                     testResult = -1;
                     break;
@@ -699,21 +451,21 @@ int32_t LBIST_runTest(uint32_t coreIndex)
             }
         }
 
-        /**--- Step 5d: Disable Isolation ---*/
+        /**--- Step 3d: Disable Isolation ---*/
         if (testResult == 0)
         {
 #ifdef DEBUG
-            AppUtils_Printf(MSG_NORMAL, "  Disabling isolation \n");
+            UART_printf("  Disabling isolation \n");
 #endif
-            status = CSL_LBIST_disableIsolation(pLBISTRegs);
-            if (status != CSL_PASS)
+            status = SDL_LBIST_selfTest(LBIST_TestHandleArray[coreIndex].instance, SDL_LBIST_TEST_RELEASE, &result);
+            if (status != SDL_PASS)
             {
-                AppUtils_Printf(MSG_NORMAL, "   CSL_LBIST_disableIsolation ...FAILED \n");
+                UART_printf("   SDL_LBIST_disableIsolation ...FAILED \n");
                 testResult = -1;
             }
         }
 
-        /**--- Step 5e: Place all Auxilliary modules into retention ---*/
+        /**--- Step 3e: Place all Auxilliary modules into retention ---*/
         if (testResult == 0)
         {
             int i;
@@ -722,8 +474,7 @@ int32_t LBIST_runTest(uint32_t coreIndex)
             for ( i = 0; i < LBIST_TestHandleArray[coreIndex].numAuxDevices; i++)
             {
 #ifdef DEBUG
-                AppUtils_Printf(MSG_NORMAL,
-                                "  Putting into Retention Device number %d Device Id %x\n",
+                UART_printf("  Putting into Retention Device number %d Device Id %x\n",
                                 i,
                                 LBIST_TestHandleArray[coreIndex].auxDeviceIdsP[i]);
 #endif
@@ -734,8 +485,7 @@ int32_t LBIST_runTest(uint32_t coreIndex)
                                                     SCICLIENT_SERVICE_WAIT_FOREVER);
                 if (status != CSL_PASS)
                 {
-                    AppUtils_Printf(MSG_NORMAL,
-                                    "  Sciclient_pmSetModuleState 0x%x ...FAILED \n",
+                    UART_printf("  Sciclient_pmSetModuleState 0x%x ...FAILED \n",
                                     LBIST_TestHandleArray[coreIndex].auxDeviceIdsP[i]);
                     testResult = -1;
                     break;
@@ -743,12 +493,12 @@ int32_t LBIST_runTest(uint32_t coreIndex)
             }
         }
 
-        /**--- Step 5f: Place Primary core into retention ---*/
+        /**--- Step 3f: Place Primary core into retention ---*/
         if (testResult == 0)
         {
             /* Placing Primary core into Retention */
 #ifdef DEBUG
-            AppUtils_Printf(MSG_NORMAL, "  Primary core: Putting into Retention %s \n",
+            UART_printf("  Primary core: Putting into Retention %s \n",
                             LBIST_TestHandleArray[coreIndex].coreName);
 #endif
             status = Sciclient_pmSetModuleState(LBIST_TestHandleArray[coreIndex].tisciDeviceId,
@@ -758,22 +508,20 @@ int32_t LBIST_runTest(uint32_t coreIndex)
 
             if (status != CSL_PASS)
             {
-                AppUtils_Printf(MSG_NORMAL,
-                                "   Primary core: Sciclient_pmSetModuleState 0x%x ...FAILED \n",
+                UART_printf("   Primary core: Sciclient_pmSetModuleState 0x%x ...FAILED \n",
                             LBIST_TestHandleArray[coreIndex].tisciDeviceId);
                 testResult = -1;
             }
         }
 
-        /**--- Step 5g: Place Secondary core into retention ---*/
+        /**--- Step 3g: Place Secondary core into retention ---*/
         if (testResult == 0)
         {
             if (LBIST_TestHandleArray[coreIndex].secondaryCoreNeeded)
             {
                 /* Placing Secondary core into Retention */
 #ifdef DEBUG
-                AppUtils_Printf(MSG_NORMAL,
-                                "  Secondary core: Putting into Retention %s \n",
+                UART_printf("  Secondary core: Putting into Retention %s \n",
                                 LBIST_TestHandleArray[coreIndex].secCoreName);
 #endif
                 status = Sciclient_pmSetModuleState(LBIST_TestHandleArray[coreIndex].tisciSecDeviceId,
@@ -782,8 +530,7 @@ int32_t LBIST_runTest(uint32_t coreIndex)
                                                     SCICLIENT_SERVICE_WAIT_FOREVER);
                 if (status != CSL_PASS)
                 {
-                    AppUtils_Printf(MSG_NORMAL,
-                                    "   Secondary core: Sciclient_pmSetModuleState 0x%x ...FAILED \n",
+                    UART_printf("   Secondary core: Sciclient_pmSetModuleState 0x%x ...FAILED \n",
                                 LBIST_TestHandleArray[coreIndex].tisciSecDeviceId);
                     testResult = -1;
                     return testResult;
@@ -791,31 +538,14 @@ int32_t LBIST_runTest(uint32_t coreIndex)
             }
         }
 
-        /**--- Step 5h: Double check LBIST not running ---*/
-        if (testResult == 0)
-        {
-#ifdef DEBUG
-            AppUtils_Printf(MSG_NORMAL,
-                            "  Checking that LBIST is not running\n");
-#endif
-            /* Check to make sure LBIST is not running */
-            status = CSL_LBIST_isRunning(pLBISTRegs, &isLBISTRunning);
-            if ( status != CSL_PASS )
-            {
-                AppUtils_Printf(MSG_NORMAL, "\n CSL_LBIST_isRunning failed \n");
-                testResult = -1;
-            }
-        }
-
-        /**--- Step 5i: Power off Secondary core ---*/
+        /**--- Step 3h: Power off Secondary core ---*/
         if (testResult == 0)
         {
             if (LBIST_TestHandleArray[coreIndex].secondaryCoreNeeded)
             {
                 /* Power off Secondary core */
 #ifdef DEBUG
-                AppUtils_Printf(MSG_NORMAL,
-                                "  Secondary core: Powering off %s \n",
+                UART_printf("  Secondary core: Powering off %s \n",
                                 LBIST_TestHandleArray[coreIndex].secCoreName);
 #endif
                 status =  Sciclient_pmSetModuleState(LBIST_TestHandleArray[coreIndex].tisciSecDeviceId,
@@ -824,20 +554,18 @@ int32_t LBIST_runTest(uint32_t coreIndex)
                                                      SCICLIENT_SERVICE_WAIT_FOREVER);
                 if (status != CSL_PASS)
                 {
-                    AppUtils_Printf(MSG_NORMAL,
-                                    "   Secondary core: Sciclient_pmSetModuleState:  Power off FAILED \n");
+                    UART_printf("   Secondary core: Sciclient_pmSetModuleState:  Power off FAILED \n");
                     testResult = -1;
                 }
             }
         }
 
-        /**--- Step 5j: Power off Primary core ---*/
+        /**--- Step 3i: Power off Primary core ---*/
         if (testResult == 0)
         {
             /* Power off Primary core */
 #ifdef DEBUG
-            AppUtils_Printf(MSG_NORMAL,
-                            "  Primary core: Powering off %s \n",
+            UART_printf("  Primary core: Powering off %s \n",
                             LBIST_TestHandleArray[coreIndex].coreName);
 #endif
             status =  Sciclient_pmSetModuleState(LBIST_TestHandleArray[coreIndex].tisciDeviceId,
@@ -846,12 +574,11 @@ int32_t LBIST_runTest(uint32_t coreIndex)
                                                  SCICLIENT_SERVICE_WAIT_FOREVER);
             if (status != CSL_PASS)
             {
-                AppUtils_Printf(MSG_NORMAL,
-                                "   Primary core: Sciclient_pmSetModuleState: Power off FAILED \n");
+                UART_printf("   Primary core: Sciclient_pmSetModuleState: Power off FAILED \n");
             }
         }
 
-        /**--- Step 5k: Power off Auxilliary modules ---*/
+        /**--- Step 3j: Power off Auxilliary modules ---*/
         if (testResult == 0)
         {
             int i;
@@ -860,8 +587,7 @@ int32_t LBIST_runTest(uint32_t coreIndex)
             for ( i = 0; i < LBIST_TestHandleArray[coreIndex].numAuxDevices; i++)
             {
 #ifdef DEBUG
-                AppUtils_Printf(MSG_NORMAL,
-                                "  Powering off Device number %d Device Id %x\n",
+                UART_printf("  Powering off Device number %d Device Id %x\n",
                                 i,
                                 LBIST_TestHandleArray[coreIndex].auxDeviceIdsP[i]);
 #endif
@@ -872,8 +598,7 @@ int32_t LBIST_runTest(uint32_t coreIndex)
                                                     SCICLIENT_SERVICE_WAIT_FOREVER);
                 if (status != CSL_PASS)
                 {
-                    AppUtils_Printf(MSG_NORMAL,
-                                    "  Sciclient_pmSetModuleState 0x%x ...FAILED \n",
+                    UART_printf("  Sciclient_pmSetModuleState 0x%x ...FAILED \n",
                                     LBIST_TestHandleArray[coreIndex].auxDeviceIdsP[i]);
                     testResult = -1;
                     break;
@@ -881,12 +606,11 @@ int32_t LBIST_runTest(uint32_t coreIndex)
             }
         }
 
-        /**--- Step 5l: Take Primary core out of local reset ---*/
-        if ((testResult == 0) && (LBIST_TestHandleArray[coreIndex].tisciDeviceId != NULL))
+        /**--- Step 3k: Take Primary core out of local reset ---*/
+        if ((testResult == 0) && (LBIST_TestHandleArray[coreIndex].tisciDeviceId != 0U))
         {
 #ifdef DEBUG
-            AppUtils_Printf(MSG_NORMAL,
-                            "  Primary core: Taking out of local reset the core %s \n",
+            UART_printf("  Primary core: Taking out of local reset the core %s \n",
                             LBIST_TestHandleArray[coreIndex].coreName);
 #endif
             status = Sciclient_pmSetModuleRst(LBIST_TestHandleArray[coreIndex].tisciDeviceId,
@@ -894,19 +618,17 @@ int32_t LBIST_runTest(uint32_t coreIndex)
                                               SCICLIENT_SERVICE_WAIT_FOREVER);
             if (status != CSL_PASS)
             {
-                AppUtils_Printf(MSG_NORMAL,
-                                "  Sciclient_pmSetModuleRst 0x%x ...FAILED \n",
+                UART_printf("  Sciclient_pmSetModuleRst 0x%x ...FAILED \n",
                                 LBIST_TestHandleArray[coreIndex].tisciDeviceId);
                 testResult = -1;
             }
         }
 
-        /**--- Step 5m: Take Secondary core out of local reset ---*/
-        if ((testResult == 0) && (LBIST_TestHandleArray[coreIndex].tisciSecDeviceId != NULL))
+        /**--- Step 3l: Take Secondary core out of local reset ---*/
+        if ((testResult == 0) && (LBIST_TestHandleArray[coreIndex].tisciSecDeviceId != 0U))
         {
 #ifdef DEBUG
-            AppUtils_Printf(MSG_NORMAL,
-                            "  Secondary core: Taking out of local reset the core %s \n",
+            UART_printf("  Secondary core: Taking out of local reset the core %s \n",
                             LBIST_TestHandleArray[coreIndex].secCoreName);
 #endif
             status = Sciclient_pmSetModuleRst(LBIST_TestHandleArray[coreIndex].tisciSecDeviceId,
@@ -914,14 +636,13 @@ int32_t LBIST_runTest(uint32_t coreIndex)
                                               SCICLIENT_SERVICE_WAIT_FOREVER);
             if (status != CSL_PASS)
             {
-                AppUtils_Printf(MSG_NORMAL,
-                                "  Sciclient_pmSetModuleRst 0x%x ...FAILED \n",
+                UART_printf("  Sciclient_pmSetModuleRst 0x%x ...FAILED \n",
                                 LBIST_TestHandleArray[coreIndex].tisciSecDeviceId);
                 testResult = -1;
             }
         }
 
-        /**--- Step 5n: Take Auxilliary modules out of module reset ---*/
+        /**--- Step 3m: Take Auxilliary modules out of module reset ---*/
         if (testResult == 0)
         {
             int i;
@@ -930,8 +651,7 @@ int32_t LBIST_runTest(uint32_t coreIndex)
             for ( i = 0; i < LBIST_TestHandleArray[coreIndex].numAuxDevices; i++)
             {
 #ifdef DEBUG
-                AppUtils_Printf(MSG_NORMAL,
-                                "  Putting into module reset Device number %d Device Id %x\n",
+                UART_printf("  Putting into module reset Device number %d Device Id %x\n",
                                 i,
                                 LBIST_TestHandleArray[coreIndex].auxDeviceIdsP[i]);
 #endif
@@ -941,8 +661,7 @@ int32_t LBIST_runTest(uint32_t coreIndex)
                                                   SCICLIENT_SERVICE_WAIT_FOREVER);
                 if (status != CSL_PASS)
                 {
-                    AppUtils_Printf(MSG_NORMAL,
-                                    "  Sciclient_pmSetModuleState 0x%x ...FAILED \n",
+                    UART_printf("  Sciclient_pmSetModuleState 0x%x ...FAILED \n",
                                     LBIST_TestHandleArray[coreIndex].auxDeviceIdsP[i]);
                     testResult = -1;
                     break;
@@ -950,13 +669,12 @@ int32_t LBIST_runTest(uint32_t coreIndex)
             }
         }
 
-        /**--- Step 5o: Release Primary core ---*/
+        /**--- Step 3n: Release Primary core ---*/
         if ((testResult == 0) && (LBIST_TestHandleArray[coreIndex].tisciProcId !=0))
         {
             /* release processor Primary core */
 #ifdef DEBUG
-            AppUtils_Printf(MSG_NORMAL,
-                            "  Primary core: Releasing %s \n",
+            UART_printf("  Primary core: Releasing %s \n",
                             LBIST_TestHandleArray[coreIndex].coreName);
 #endif
 
@@ -965,14 +683,13 @@ int32_t LBIST_runTest(uint32_t coreIndex)
                                                         SCICLIENT_SERVICE_WAIT_FOREVER);
             if (status != CSL_PASS)
             {
-                AppUtils_Printf(MSG_NORMAL,
-                                "   Primary core: Sciclient_procBootReleaseProcessor, ProcId 0x%x...FAILED \n",
+                UART_printf("   Primary core: Sciclient_procBootReleaseProcessor, ProcId 0x%x...FAILED \n",
                                 LBIST_TestHandleArray[coreIndex].tisciProcId);
                 testResult = -1;
             }
         }
 
-        /**--- Step 5p: Release Secondary core ---*/
+        /**--- Step 3o: Release Secondary core ---*/
         if (testResult == 0)
         {
             if ((LBIST_TestHandleArray[coreIndex].secondaryCoreNeeded)
@@ -980,8 +697,7 @@ int32_t LBIST_runTest(uint32_t coreIndex)
             {
                 /* release processor Secondary core */
 #ifdef DEBUG
-                AppUtils_Printf(MSG_NORMAL,
-                                "  Secondary core: Releasing %s \n",
+                UART_printf("  Secondary core: Releasing %s \n",
                                 LBIST_TestHandleArray[coreIndex].secCoreName);
 #endif
                 status = Sciclient_procBootReleaseProcessor(LBIST_TestHandleArray[coreIndex].tisciSecProcId,
@@ -989,75 +705,25 @@ int32_t LBIST_runTest(uint32_t coreIndex)
                                                             SCICLIENT_SERVICE_WAIT_FOREVER);
                 if (status != CSL_PASS)
                 {
-                    AppUtils_Printf(MSG_NORMAL,
-                                    "   Secondary core: Sciclient_procBootReleaseProcessor, ProcId 0x%x...FAILED \n",
+                    UART_printf("   Secondary core: Sciclient_procBootReleaseProcessor, ProcId 0x%x...FAILED \n",
                                     LBIST_TestHandleArray[coreIndex].tisciSecProcId);
                     testResult = -1;
                 }
             }
         }
 
-        /**--- Step 5q: Double check LBIST not running ---*/
-        if (testResult == 0)
-        {
-            status = CSL_LBIST_isRunning(pLBISTRegs, &isLBISTRunning);
-            if (status != CSL_PASS)
-            {
-                AppUtils_Printf(MSG_NORMAL, "    CSL_LBIST_isRunning failed\n");
-                testResult = -1;
-            }
-            else
-            {
-                /* Make sure that the LBIST is not running */
-                if (isLBISTRunning == CSL_TRUE)
-                {
-                    AppUtils_Printf(MSG_NORMAL,
-                                    "\n   LBIST is found to be still running at the end of the test\n");
-                    testResult = -1;
-                }
-            }
-        }
-#if defined(PROFILE_LBIST_TIMING)
-        /* Here LBIST test is complete , get end time of test */
-        endTime = TimerP_getTimeInUsecs();
-#endif
-
-        /**--- Step 6: Check result of LBIST  ---*/
-        if (testResult == 0)
-        {
-            /* TODO: Temporarily hard coding to expected MISR */
-            expectedMISR = LBIST_TestHandleArray[coreIndex].expectedMISR;
-            if (calculatedMISR != expectedMISR)
-            {
-                AppUtils_Printf(MSG_NORMAL,
-                                "\n   LBIST failed with MISR mismatch: Expected 0x%x got 0x%x \n",
-                            expectedMISR, calculatedMISR);
-                testResult = -1;
-            }
-#if defined(PROFILE_LBIST_TIMING)
-            else
-            {
-                AppUtils_Printf(MSG_NORMAL, "\n   LBIST MISR matched \n");
-            }
-#endif
-        }
-
 #if defined(PROFILE_LBIST_TIMING)
         prepTime = testStartTime - startTime;
         diffTime = testEndTime - testStartTime;
         restoreTime = endTime - testEndTime;
 
-        AppUtils_Printf(MSG_NORMAL,
-                        "  Delta Cores prep time in micro secs %d \n",
+        UART_printf("  Delta Cores prep time in micro secs %d \n",
                         (uint32_t)prepTime);
-        AppUtils_Printf(MSG_NORMAL,
-                        "  Delta LBIST execution time in micro secs %d \n",
+        UART_printf("  Delta LBIST execution time in micro secs %d \n",
                         (uint32_t)diffTime);
-        AppUtils_Printf(MSG_NORMAL,
-                        "  Delta Cores restore time in micro secs %d \n",
+        UART_printf("  Delta Cores restore time in micro secs %d \n",
                         (uint32_t)restoreTime);
-        AppUtils_Printf(MSG_NORMAL,
-                        "  LBIST complete for %s \n",
+        UART_printf("  LBIST complete for %s \n",
                         LBIST_TestHandleArray[coreIndex].coreName);
 #endif
     } /* else clause of "if ((testResult == 0) &&
@@ -1066,8 +732,6 @@ int32_t LBIST_runTest(uint32_t coreIndex)
     return (testResult);
 }
 
-/* HW POST-related functions */
-
 const char *LBIST_hwPostStatusPrint(int32_t postStatus)
 {
     char *name;
@@ -1096,183 +760,3 @@ const char *LBIST_hwPostStatusPrint(int32_t postStatus)
 
     return name;
 }
-
-static int32_t LBIST_isPostLbistTimeout(uint32_t postStatMmrRegVal,
-                                        uint8_t section,
-                                        Bool *pIsTimedOut)
-{
-    int32_t status = CSL_PASS;
-    uint32_t shift;
-
-    if ((pIsTimedOut == NULL) || (section > LBIST_POST_CORE_MAX))
-    {
-        status = CSL_EBADARGS;
-    }
-    else
-    {
-        if (section == LBIST_POST_CORE_DMSC)
-        {
-            shift = CSL_WKUP_CTRL_MMR_CFG0_WKUP_POST_STAT_POST_DMSC_LBIST_TIMEOUT_SHIFT;
-        }
-        else if (section == LBIST_POST_CORE_MCU)
-        {
-            shift = CSL_WKUP_CTRL_MMR_CFG0_WKUP_POST_STAT_POST_MCU_LBIST_TIMEOUT_SHIFT;
-        }
-
-        *pIsTimedOut = ((postStatMmrRegVal >> shift) & 0x1u) ? CSL_TRUE : CSL_FALSE;
-    }
-
-    return status;
-}
-
-static int32_t LBIST_isPostLbistDone(uint32_t postStatMmrRegVal,
-                                     uint8_t section,
-                                     Bool *pIsDone)
-{
-    int32_t status = CSL_PASS;
-    uint32_t shift;
-
-    if ((pIsDone == NULL) || (section > LBIST_POST_CORE_MAX))
-    {
-        status = CSL_EBADARGS;
-    }
-    else
-    {
-        if (section == LBIST_POST_CORE_DMSC)
-        {
-            shift = CSL_WKUP_CTRL_MMR_CFG0_WKUP_POST_STAT_POST_DMSC_LBIST_DONE_SHIFT;
-        }
-        else if (section == LBIST_POST_CORE_MCU)
-        {
-            shift = CSL_WKUP_CTRL_MMR_CFG0_WKUP_POST_STAT_POST_MCU_LBIST_DONE_SHIFT;
-        }
-
-        *pIsDone = ((postStatMmrRegVal >> shift) & 0x1u) ? CSL_TRUE : CSL_FALSE;
-    }
-    return status;
-}
-
-static int32_t LBIST_runPostLbistCheck(uint32_t hwPostCoreNum,
-                                       CSL_lbistRegs *pLBISTRegs,
-                                       uint32_t *pLBISTSig)
-{
-    int32_t  status = 0;
-    uint32_t calculatedMISR;
-    uint32_t expectedMISR;
-    int32_t  postStatus = LBIST_POST_COMPLETED_SUCCESS;
-    uint32_t postRegVal;
-    Bool     LBISTResult;
-
-    /* Read HW POST status register */
-    postRegVal = CSL_REG32_RD(CSL_WKUP_CTRL_MMR0_CFG0_BASE +
-                              CSL_WKUP_CTRL_MMR_CFG0_WKUP_POST_STAT);
-
-    /* Check if HW POST LBIST was performed */
-    status = LBIST_isPostLbistDone(postRegVal, hwPostCoreNum, &LBISTResult);
-    if (status != CSL_PASS)
-    {
-        AppUtils_Printf(MSG_NORMAL,
-                        "   HW POST: LBIST_isPostLbistDone failed for LBIST core ID #%d\n",
-                        hwPostCoreNum);
-    }
-    else
-    {
-        if (LBISTResult != true)
-        {
-            /* HW POST: LBIST not completed, check if it timed out */
-            status = LBIST_isPostLbistTimeout(postRegVal,
-                                              hwPostCoreNum,
-                                              &LBISTResult);
-            if (LBISTResult != true)
-            {
-                /* HW POST: LBIST was not performed at all on this device
-                 * for this core */
-                postStatus = LBIST_POST_NOT_RUN;
-#ifdef DEBUG
-                AppUtils_Printf(MSG_NORMAL,
-                                "\n   HW POST: LBIST not run on this device for LBIST core ID #%d\n",
-                                hwPostCoreNum);
-#endif
-            }
-            else
-            {
-                /* HW POST: LBIST was attempted but timed out for this section */
-                postStatus = LBIST_POST_ATTEMPTED_TIMEOUT;
-#ifdef DEBUG
-                AppUtils_Printf(MSG_NORMAL,
-                                "\n   HW POST: LBIST failed with HW POST timeout for LBIST core ID #%d\n",
-                                hwPostCoreNum);
-#endif
-            }
-        }
-        else
-        {
-            /* Get the output MISR and the expected MISR */
-            if (status == 0)
-            {
-                status = CSL_LBIST_getMISR(pLBISTRegs, &calculatedMISR);
-                if (status != CSL_PASS)
-                {
-                    AppUtils_Printf(MSG_NORMAL,
-                                    "\n HW POST: Get MISR failed for LBIST core ID#%d\n",
-                                    hwPostCoreNum);
-                }
-            }
-
-            if (status == 0)
-            {
-                status = CSL_LBIST_getExpectedMISR(pLBISTSig, &expectedMISR);
-                if ( status != CSL_PASS)
-                {
-                    AppUtils_Printf(MSG_NORMAL,
-                                    "\n HW POST: Get Expected MISR failed for LBIST core ID#%d\n",
-                                    hwPostCoreNum);
-                }
-            }
-
-            if (status == 0)
-            {
-                /* Compare the results, and set failure if they do not match */
-#ifdef DEBUG
-                AppUtils_Printf(MSG_NORMAL,
-                                " For HW POST LBIST core %d, Expected MISR= 0x%x, Calculated MISR = 0x%x\n",
-                                hwPostCoreNum,
-                                expectedMISR,
-                                calculatedMISR);
-#endif
-                if (calculatedMISR != expectedMISR)
-                {
-                    /* HW POST: LBIST was completed, but the test failed for this
-                     * core */
-                    postStatus = LBIST_POST_COMPLETED_FAILURE;
-                    AppUtils_Printf(MSG_NORMAL,
-                                    "\n   HW POST: LBIST core ID#%d failed with MISR mismatch: Expected 0x%x got 0x%x\n",
-                                    hwPostCoreNum,
-                                    expectedMISR,
-                                    calculatedMISR);
-                }
-                else if ((calculatedMISR == 0) && (expectedMISR == 0))
-                {
-                    postStatus = LBIST_POST_INVALID_MISR_SEED_INPUT;
-#ifdef DEBUG
-                    AppUtils_Printf(MSG_NORMAL,
-                                    "\n   HW POST: Device does not contain proper seed for MISR in eFuse - "\
-                                    "HW POST LBIST not supported on this device \n");
-#endif
-                }
-            } /* if (status == 0) */
-        } /* if (LBISTResult != true) */
-    } /* if (status != CSL_PASS) */
-
-    if (status == 0)
-    {
-        /* All function calls returned successfully */
-        return(postStatus);
-    }
-    else
-    {
-        /* Error in function calls */
-        return(status);
-    }
-}
-
diff --git a/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/lbist_utils.h b/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/lbist_utils.h
old mode 100755
new mode 100644
index 5f80d3addd9653cfb4ca4d027227a525dc8257e5..78d0a1bef2405753f06a58b5c7a8c0893062c470
--- a/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/lbist_utils.h
+++ b/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/lbist_utils.h
@@ -68,7 +68,6 @@
 /*                             Include Files                                  */
 /* ========================================================================== */
 #include <stdint.h>
-
 /* ========================================================================== */
 /*                           Macros & Typedefs                                */
 /* ========================================================================== */
diff --git a/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/makefile b/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/makefile
index 4d1e4df1cd827cf11ba8e87121cf91de65726670..031aeeb7ba7037ad07f0d4f6271bcf4472d04f00 100755
--- a/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/makefile
+++ b/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/makefile
@@ -22,9 +22,9 @@ HLOSBOOT ?= none
 DEVICETYPE ?= GP
 
 # BIST options are enabled or disabled
-BISTFUNC ?= disabled
+#BISTFUNC ?= disabled
 #Setting BISTFUNC to enabled is only supported on j721e
-#BISTFUNC ?= enabled
+BISTFUNC ?= enabled
 
 BUILD_OS_TYPE=tirtos
 
diff --git a/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/pbist_utils.c b/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/pbist_utils.c
old mode 100755
new mode 100644
index 61bdf8398bdbe67ba55f9b18eb98a8476435f9d9..1c3b1bc91e1a308911f05cd442d36d283c44dd4a
--- a/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/pbist_utils.c
+++ b/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/pbist_utils.c
@@ -1,6 +1,6 @@
 /*
 *
-* Copyright (c) 2020 Texas Instruments Incorporated
+* Copyright (c) 2022 Texas Instruments Incorporated
 *
 * All rights reserved not granted herein.
 *
@@ -69,10 +69,10 @@
 /* ========================================================================== */
 /*                             Include Files                                  */
 /* ========================================================================== */
-#include "Std_Types.h"
+#include <stdint.h>
 #include <string.h>
-#include <ti/csl/csl_types.h>
-#include <ti/csl/csl_pbist.h>
+#include <sdl_types.h>
+#include <src/sdl/sdl_pbist.h>
 #include <ti/csl/csl_rat.h>
 #include <ti/csl/csl_clec.h>
 #include <ti/csl/cslr_vpac.h>
@@ -81,11 +81,8 @@
 #include <ti/drv/uart/UART_stdio.h>
 #include <ti/drv/sciclient/sciclient.h>
 
-//#include <ti/csl/src/ip/sa/V3/cslr_cp_ace.h>
-#include <ti/csl/cslr_cp_ace.h>
 
 /* Osal API header files */
-#include <ti/osal/HwiP.h>
 #include <ti/osal/TimerP.h>
 
 #include "power_seq.h"
@@ -93,7 +90,7 @@
 #include "pbist_utils.h"
 #include "pbist_defs.h"
 
-#include "app_utils.h"
+//#include "app_utils.h"
 
 /* ========================================================================== */
 /*                           Macros & Typedefs                                */
@@ -108,23 +105,12 @@
 /* This flag gathers timing information for each PBIST test */
 //#define PROFILE_PBIST_TIMING
 
-/* POST Status definitions */
-#define PBIST_POST_COMPLETED_SUCCESS      (0u)
-#define PBIST_POST_COMPLETED_FAILURE      (1u)
-#define PBIST_POST_ATTEMPTED_TIMEOUT      (2u)
-#define PBIST_POST_NOT_RUN                (3u)
 
 /* ========================================================================== */
 /*                 Internal Function Declarations                             */
 /* ========================================================================== */
-void PBIST_eventHandler( uint32_t instanceId );
 
-static int32_t PBIST_isPostPbistTimeout(uint32_t postStatMmrRegVal,
-                                        Bool *pIsTimedOut);
-static int32_t PBIST_isPostPbistDone(uint32_t postStatMmrRegVal,
-                                     Bool *pIsDone);
-static int32_t PBIST_postCheckResult(uint32_t postStatMmrRegVal,
-                                     Bool *pResult);
+/* None */
 
 /* ========================================================================== */
 /*                         Structure Declarations                             */
@@ -153,37 +139,6 @@ static int32_t PBIST_postCheckResult(uint32_t postStatMmrRegVal,
 /* ========================================================================== */
 /*                          Function Definitions                              */
 /* ========================================================================== */
-void PBIST_eventHandler( uint32_t instanceId)
-{
-    CSL_ErrType_t status;
-
-    if (instanceId == PBIST_INSTANCE_C7X)
-    {
-        /* Clear C7x PBIST interrupt event in CLEC */
-        status = CSL_clecClearEvent((CSL_CLEC_EVTRegs *)CSL_COMPUTE_CLUSTER0_CLEC_REGS_BASE,
-                       CSLR_COMPUTE_CLUSTER0_CLEC_MSMC_EVENT_IN_COMPUTE_CLUSTER0_CORE_CORE_MSMC_INTR_12);
-        if (status != CSL_PASS) {
-            /* This is really not expected in normal operation:
-               Add exception if needed
-            */
-        }
-    }
-    if (instanceId == PBIST_INSTANCE_A72)
-    {
-        /* Clear A72 PBIST interrupt event in CLEC*/
-        status = CSL_clecClearEvent((CSL_CLEC_EVTRegs *)CSL_COMPUTE_CLUSTER0_CLEC_REGS_BASE,
-                       CSLR_COMPUTE_CLUSTER0_CLEC_MSMC_EVENT_IN_COMPUTE_CLUSTER0_CORE_CORE_MSMC_INTR_8);
-        if (status != CSL_PASS) {
-            /* This is really not expected in normal operation:
-               Add exception if needed
-            */
-        }
-    }
-
-    PBIST_TestHandleArray[instanceId].doneFlag = true;
-
-    return;
-}
 
 /* PBIST_setFirewall: Sets firewall settings to be able to access CLEC registers */
 static int32_t PBIST_setFirewall(void)
@@ -282,59 +237,77 @@ static int32_t PBIST_setFirewall(void)
     return retVal;
 }
 
+int32_t SDL_OSAL_getClecOutputEvent(uint32_t *clecOutputEvt)
+{
+    int32_t retVal = SDL_PASS;
 
-/* Captures common Initialization: currently initializes CLEC interrupt routing
-   for C7x & A72 */
-int32_t PBIST_commonInit(void)
+    *clecOutputEvt = CSLR_COMPUTE_CLUSTER0_CLEC_MSMC_EVENT_IN_COMPUTE_CLUSTER0_CORE_CORE_MSMC_INTR_12;
+
+    return retVal;
+}
+
+int32_t SDL_OSAL_releaseClecOutputEvent(uint32_t clecOutputEvt)
 {
-    CSL_ErrType_t status;
-    int32_t retValue = 0;
+    return SDL_PASS;
+}
+
+/* CLEC configuration for C7X and A72 instances */
+int32_t PBIST_clecConfig(uint32_t instance)
+{
+    SDL_ErrType_t status = SDL_EFAIL;
     CSL_ClecEventConfig evtCfg;
 
-    /* Add firewall entry to gain access to CLEC registers */
-    status = PBIST_setFirewall();
-    if (status != CSL_PASS)
-    {
-        AppUtils_Printf(MSG_NORMAL, " PBIST_setFirewall failed \n");
-        retValue = -1;
-    }
+    evtCfg.secureClaimEnable = 1U;
+    evtCfg.evtSendEnable = 1U;
+    evtCfg.rtMap = 2U;
+    evtCfg.c7xEvtNum = 0U;
 
-    if (retValue == 0)
+    if (PBIST_TestHandleArray[instance].pbistInst == SDL_PBIST_INST_A72)
     {
-        evtCfg.secureClaimEnable = 1U;
-        evtCfg.evtSendEnable = 1U;
         evtCfg.extEvtNum = CSLR_COMPUTE_CLUSTER0_CLEC_MSMC_EVENT_IN_COMPUTE_CLUSTER0_CORE_CORE_MSMC_INTR_12;
-        evtCfg.rtMap = 2U;
-        evtCfg.c7xEvtNum = 0U;
-
-        /* Configure interrupt router to take care of routing C7x PBIST interrupt event */
+        /* Configure interrupt router to take care of routing A72 PBIST interrupt event */
         status =  CSL_clecConfigEvent((CSL_CLEC_EVTRegs *)CSL_COMPUTE_CLUSTER0_CLEC_REGS_BASE,
-                                      CSLR_COMPUTE_CLUSTER0_CLEC_MSMC_EVENT_IN_COMPUTE_CLUSTER0_CORE_CORE_MSMC_INTR_12,
+                                      CSLR_COMPUTE_CLUSTER0_CLEC_MSMC_EVENT_IN_COMPUTE_CLUSTER0_CORE_CORE_MSMC_INTR_8,
                                       &evtCfg);
         if (status != CSL_PASS)
         {
-            AppUtils_Printf(MSG_NORMAL, " CSL_clecConfigEvent C7x failed \n");
-            retValue = -1;
+            UART_printf(" CSL_clecConfigEvent A72 failed \n");
         }
     }
-
-    if (retValue == 0)
+    else if (PBIST_TestHandleArray[instance].pbistInst == SDL_PBIST_INST_C7X)
     {
-        evtCfg.extEvtNum = CSLR_COMPUTE_CLUSTER0_CLEC_MSMC_EVENT_IN_COMPUTE_CLUSTER0_CORE_CORE_MSMC_INTR_8;
-        /* Configure interrupt router to take care of routing A72 PBIST interrupt event */
+        evtCfg.extEvtNum = CSLR_COMPUTE_CLUSTER0_CLEC_MSMC_EVENT_IN_COMPUTE_CLUSTER0_CORE_CORE_MSMC_INTR_12;
+        /* Configure interrupt router to take care of routing C7x PBIST interrupt event */
         status =  CSL_clecConfigEvent((CSL_CLEC_EVTRegs *)CSL_COMPUTE_CLUSTER0_CLEC_REGS_BASE,
-                                      CSLR_COMPUTE_CLUSTER0_CLEC_MSMC_EVENT_IN_COMPUTE_CLUSTER0_CORE_CORE_MSMC_INTR_8,
+                                      CSLR_COMPUTE_CLUSTER0_CLEC_MSMC_EVENT_IN_COMPUTE_CLUSTER0_CORE_CORE_MSMC_INTR_12,
                                       &evtCfg);
         if (status != CSL_PASS)
         {
-            AppUtils_Printf(MSG_NORMAL, " CSL_clecConfigEvent A72 failed \n");
-            retValue = -1;
+            UART_printf(" CSL_clecConfigEvent C7x failed \n");
         }
     }
 
     return status;
 }
 
+/* Captures common Initialization: currently initializes CLEC interrupt routing
+   for C7x & A72 */
+int32_t PBIST_commonInit(void)
+{
+    CSL_ErrType_t status;
+    int32_t retValue = 0;
+
+    /* Add firewall entry to gain access to CLEC registers */
+    status = PBIST_setFirewall();
+    if (status != CSL_PASS)
+    {
+        UART_printf( " PBIST_setFirewall failed \n");
+        retValue = -1;
+    }
+
+    return status;
+}
+
 
 /* This function runs the full PBIST test for a particular section.
  * It includes the following steps (each step has many sub-steps specificied
@@ -350,965 +323,671 @@ int32_t PBIST_commonInit(void)
  * Step 4: Restore cores
  * */
 
-int32_t PBIST_runTest(uint32_t instanceId)
+int32_t PBIST_runTest(uint32_t instanceId, bool runNegTest)
 {
     int32_t testResult = 0;
-    CSL_ErrType_t status;
-    HwiP_Params hwiParams;
-    HwiP_Handle PBIST_hwiPHandle;
-    CSL_pbistRegs *pPBISTRegs;
-    Bool PBISTResult;
-    uint32_t postRegVal;
-    uint32_t timeoutCount = 0;
+    SDL_ErrType_t status;
+    bool PBISTResult;
+    SDL_PBIST_testType testType;
+    uint32_t i = 0;
+
     uint32_t moduleState = TISCI_MSG_VALUE_DEVICE_HW_STATE_OFF;
     uint32_t resetState = 0U;
     uint32_t contextLossState = 0U;
-    CSL_RatTranslationCfgInfo translationCfg;
-    bool result;
-    int i;
-
 
 #if defined(PROFILE_PBIST_TIMING)
-#if defined(DEBUG)
-    uint8_t  postStatus = PBIST_POST_COMPLETED_SUCCESS;
-#endif
     uint64_t startTime , testStartTime,  testEndTime, endTime;
     uint64_t prepTime, diffTime, restoreTime;
-    AppUtils_Printf(MSG_NORMAL,
-                    "\n Starting PBIST test on %s, index %d...\n",
-                    PBIST_TestHandleArray[instanceId].testName,
-                    instanceId);
 #endif
-    /*-- Step 1: Configure interrupt handler --*/
-    /* Disable interrupt */
-    HwiP_disableInterrupt(PBIST_TestHandleArray[instanceId].interruptNumber);
-
-    /* Default parameter initialization */
-    HwiP_Params_init(&hwiParams);
-
-    /* Pass core Index as argument to handler*/
-    hwiParams.arg = instanceId;
 #ifdef DEBUG
-    AppUtils_Printf(MSG_NORMAL, "\n HwiP_Params_init complete \n");
-#endif
-    /* Register call back function for PBIST Interrupt */
-    PBIST_hwiPHandle = HwiP_create(PBIST_TestHandleArray[instanceId].interruptNumber,
-                                       (HwiP_Fxn)PBIST_eventHandler,
-                                       (void *)&hwiParams);
-    if (PBIST_hwiPHandle == NULL)
+    if (runNegTest == true)
+    {
+        UART_printf("\n Starting PBIST failure insertion test on %s, index %d...\n",
+                    PBIST_TestHandleArray[instanceId].testName,
+                    instanceId);
+        testType = SDL_PBIST_NEG_TEST;
+    }
+    else
     {
-        AppUtils_Printf(MSG_NORMAL, " Interrupt registration failed \n");
-        testResult = -1;
+        UART_printf("\n Starting PBIST test on %s, index %d...\n",
+                    PBIST_TestHandleArray[instanceId].testName,
+                    instanceId);
+        testType = SDL_PBIST_TEST;
     }
-
+#endif
 #if defined(PROFILE_PBIST_TIMING)
     /* Get start time of test */
     startTime = TimerP_getTimeInUsecs();
 #endif
 
-    /* Step 2: (if HW Power-On Self Test, i.e. POST) Check POST results  */
+    /* Step 1: (if HW Power-On Self Test, i.e. POST) Check POST results  */
     if ((testResult == 0) &&
         (PBIST_TestHandleArray[instanceId].numPostPbistToCheck > 0))
     {
+        if (runNegTest == false)
+        {
 #ifdef DEBUG
-        UART_printf("  HW POST: Running test on HW POST, %d Instances \n",
-                    PBIST_TestHandleArray[instanceId].numPostPbistToCheck);
+            UART_printf("  HW POST: Running test on HW POST, %d Instances \n",
+                        PBIST_TestHandleArray[instanceId].numPostPbistToCheck);
 #endif
-        postRegVal = CSL_REG32_RD(CSL_WKUP_CTRL_MMR0_CFG0_BASE +
-                                  CSL_WKUP_CTRL_MMR_CFG0_WKUP_POST_STAT);
+            SDL_PBIST_postResult result;
 
-        /* Check if HW POST PBIST was performed */
-        status = PBIST_isPostPbistDone(postRegVal, &PBISTResult);
-        if (status != CSL_PASS)
-        {
-            UART_printf("   HW POST: CSL_PBIST_isPostPbistDone failed\n");
-            testResult = -1;
-        }
-        else
-        {
-            if (PBISTResult != true)
+            status = SDL_PBIST_getPOSTStatus(&result);
+
+            if (status != SDL_PASS)
             {
-                /* HW POST: PBIST not completed, check if it timed out */
-                status = PBIST_isPostPbistTimeout(postRegVal, &PBISTResult);
-                if (PBISTResult != true)
-                {
-                    /* HW POST: PBIST was not performed at all on this device */
-#if defined(DEBUG) && defined(PROFILE_PBIST_TIMING)
-                    postStatus = PBIST_POST_NOT_RUN;
-#endif
-                }
-                else
-                {
-                    /* HW POST: PBIST was attempted but timed out */
-#if defined(DEBUG) && defined(PROFILE_PBIST_TIMING)
-                    postStatus = PBIST_POST_ATTEMPTED_TIMEOUT;
-#endif
-                    testResult = -1;
-                }
+                testResult = -1;
+                UART_printf("    SDL_PBIST_getPOSTStatus failed: Status %d \n", status);
             }
             else
             {
-                /* HW POST: PBIST was completed on this device, check the result */
-                status = PBIST_postCheckResult(postRegVal, &PBISTResult);
-                if (PBISTResult != true)
-                {
-                    /* HW POST: PBIST was completed, but the test failed */
-#if defined(DEBUG) && defined(PROFILE_PBIST_TIMING)
-                    postStatus = PBIST_POST_COMPLETED_FAILURE;
-#endif
-                    testResult = -1;
-                    UART_printf("\n HW POST: PBIST test failed\n");
-                }
-            } /* if (PBISTResult != true) */
-        } /* if (status != CSL_PASS) */
-    } /* if ((testResult == 0) &&
-       *     (PBIST_TestHandleArray[instanceId].numPostPbistToCheck > 0)) */
-
-    /* Step 2: (if SW-initiated PBIST) Configure processor to correct state  */
-
-    /**--- Step 2a: Request Primary core ---*/
-    if ((testResult == 0) && (PBIST_TestHandleArray[instanceId].procRstNeeded))
+                PBIST_printPostStatus(&result);
+            }
+        }
+    }
+    else
     {
-        if (PBIST_TestHandleArray[instanceId].tisciProcId != 0u)
+        /* Step 2: (if SW-initiated PBIST) Configure processor to correct state  */
+
+        /**--- Step 2a: Request Primary core ---*/
+        if ((testResult == 0) && (PBIST_TestHandleArray[instanceId].procRstNeeded))
         {
+            if (PBIST_TestHandleArray[instanceId].tisciProcId != 0u)
+            {
 #ifdef DEBUG
-            AppUtils_Printf(MSG_NORMAL,
-                            "  Primary core: %s: Requesting processor \n",
+                UART_printf("  Primary core: %s: Requesting processor \n",
                             PBIST_TestHandleArray[instanceId].coreName);
 #endif
-            /* Request Primary core */
-            status = Sciclient_procBootRequestProcessor(PBIST_TestHandleArray[instanceId].tisciProcId,
-                                                        SCICLIENT_SERVICE_WAIT_FOREVER);
-            if (status != CSL_PASS)
-            {
-                AppUtils_Printf(MSG_NORMAL,
-                                "   Primary core: Sciclient_procBootRequestProcessor, ProcId 0x%x...FAILED \n",
+                /* Request Primary core */
+                status = Sciclient_procBootRequestProcessor(PBIST_TestHandleArray[instanceId].tisciProcId,
+                                                            SCICLIENT_SERVICE_WAIT_FOREVER);
+                if (status != CSL_PASS)
+                {
+                    UART_printf("   Primary core: Sciclient_procBootRequestProcessor, ProcId 0x%x...FAILED \n",
                                 PBIST_TestHandleArray[instanceId].tisciProcId);
-                testResult = -1;
+                    testResult = -1;
+                }
             }
         }
-    }
 
-    /**--- Step 2b: Request Secondary core ---*/
-    if ((testResult == 0) && (PBIST_TestHandleArray[instanceId].procRstNeeded))
-    {
-        if ((PBIST_TestHandleArray[instanceId].secondaryCoreNeeded)
-            && (PBIST_TestHandleArray[instanceId].tisciSecProcId != 0u))
+        /**--- Step 2b: Request Secondary core ---*/
+        if ((testResult == 0) && (PBIST_TestHandleArray[instanceId].procRstNeeded))
         {
+            if ((PBIST_TestHandleArray[instanceId].secondaryCoreNeeded)
+                && (PBIST_TestHandleArray[instanceId].tisciSecProcId != 0u))
+            {
 
 #ifdef DEBUG
-            AppUtils_Printf(MSG_NORMAL,
-                            "  Secondary core: %s: Requesting processor \n",
+                UART_printf("  Secondary core: %s: Requesting processor \n",
                             PBIST_TestHandleArray[instanceId].secCoreName);
 #endif
-            /* Request secondary core */
-            status = Sciclient_procBootRequestProcessor(PBIST_TestHandleArray[instanceId].tisciSecProcId,
-                                                        SCICLIENT_SERVICE_WAIT_FOREVER);
-            if (status != CSL_PASS)
-            {
-                AppUtils_Printf(MSG_NORMAL,
-                                "   Secondary core: Sciclient_procBootRequestProcessor, ProcId 0x%x...FAILED \n",
+                /* Request secondary core */
+                status = Sciclient_procBootRequestProcessor(PBIST_TestHandleArray[instanceId].tisciSecProcId,
+                                                            SCICLIENT_SERVICE_WAIT_FOREVER);
+                if (status != CSL_PASS)
+                {
+                    UART_printf("   Secondary core: Sciclient_procBootRequestProcessor, ProcId 0x%x...FAILED \n",
                                 PBIST_TestHandleArray[instanceId].tisciSecProcId);
-                testResult = -1;
+                    testResult = -1;
+                }
             }
         }
-    }
 
-    /**--- Step 2c: Put Primary core in local reset ---*/
-    if ((testResult == 0) && (PBIST_TestHandleArray[instanceId].procRstNeeded))
-    {
-        if (PBIST_TestHandleArray[instanceId].tisciDeviceId != 0u)
+        /**--- Step 2c: Put Primary core in local reset ---*/
+        if ((testResult == 0) && (PBIST_TestHandleArray[instanceId].procRstNeeded))
         {
-            /* Set Local reset for Primary core */
+            if (PBIST_TestHandleArray[instanceId].tisciDeviceId != 0u)
+            {
+                /* Set Local reset for Primary core */
 #ifdef DEBUG
-            AppUtils_Printf(MSG_NORMAL,
-                            "  %s: Primary core: Set module reset \n",
+                UART_printf("  %s: Primary core: Set module reset \n",
                             PBIST_TestHandleArray[instanceId].coreName);
 #endif
-            status =  Sciclient_pmSetModuleRst(PBIST_TestHandleArray[instanceId].tisciDeviceId,
-                                               0x1, /* Local Reset asserted */
-                                               SCICLIENT_SERVICE_WAIT_FOREVER);
-            if (status != CSL_PASS)
-            {
-                AppUtils_Printf(MSG_NORMAL,
-                                "   Primary core: Sciclient_pmSetModuleRst...FAILED \n");
-                testResult = -1;
+                status =  Sciclient_pmSetModuleRst(PBIST_TestHandleArray[instanceId].tisciDeviceId,
+                                                   0x1, /* Local Reset asserted */
+                                                   SCICLIENT_SERVICE_WAIT_FOREVER);
+                if (status != CSL_PASS)
+                {
+                    UART_printf("   Primary core: Sciclient_pmSetModuleRst...FAILED \n");
+                    testResult = -1;
+                }
             }
         }
-    }
 
-    /**--- Step 2d: Put Secondary core in local reset ---*/
-    if ((testResult == 0) && (PBIST_TestHandleArray[instanceId].procRstNeeded))
-    {
-        if ((PBIST_TestHandleArray[instanceId].secondaryCoreNeeded)
-            && (PBIST_TestHandleArray[instanceId].tisciSecDeviceId != 0u))
+        /**--- Step 2d: Put Secondary core in local reset ---*/
+        if ((testResult == 0) && (PBIST_TestHandleArray[instanceId].procRstNeeded))
         {
-            /* Set Local reset for Secondary core */
+            if ((PBIST_TestHandleArray[instanceId].secondaryCoreNeeded)
+                && (PBIST_TestHandleArray[instanceId].tisciSecDeviceId != 0u))
+            {
+                /* Set Local reset for Secondary core */
 #ifdef DEBUG
-            AppUtils_Printf(MSG_NORMAL,
-                            "  %s: Secondary core: Set Module reset \n",
+                UART_printf("  %s: Secondary core: Set Module reset \n",
                             PBIST_TestHandleArray[instanceId].secCoreName);
 #endif
-            status =  Sciclient_pmSetModuleRst(PBIST_TestHandleArray[instanceId].tisciSecDeviceId,
-                                               0x1, /* Local Reset asserted */
-                                               SCICLIENT_SERVICE_WAIT_FOREVER);
-            if (status != CSL_PASS)
-            {
-                AppUtils_Printf(MSG_NORMAL,
-                                "   Secondary core: Sciclient_pmSetModuleRst...FAILED \n");
-                testResult = -1;
+                status =  Sciclient_pmSetModuleRst(PBIST_TestHandleArray[instanceId].tisciSecDeviceId,
+                                                   0x1, /* Local Reset asserted */
+                                                   SCICLIENT_SERVICE_WAIT_FOREVER);
+                if (status != CSL_PASS)
+                {
+                    UART_printf("   Secondary core: Sciclient_pmSetModuleRst...FAILED \n");
+                    testResult = -1;
+                }
             }
         }
-    }
 #ifdef POWERUP_CORES_BEFORE_TEST
-    /**--- Step 2e: Perform any additional power sequencing, if needed ---*/
-    /* Custom core power restore sequence - needed to allow core to be powered
-     * up later by Secondary Bootloader (SBL) */
-    if ((testResult == 0) &&
-        (PBIST_TestHandleArray[instanceId].coreCustPwrSeqNeeded) &&
-        (PBIST_TestHandleArray[instanceId].tisciProcId != 0u))
-    {
-        status = customPrepareForPowerUpSequence(PBIST_TestHandleArray[instanceId].tisciProcId);
-        if (status != CSL_PASS)
-        {
-            UART_printf("  Custom core power restore sequence, ProcId 0x%x ...FAILED \n",
-                        PBIST_TestHandleArray[instanceId].tisciProcId);
-            testResult = -1;
-        }
-    }
-
-    /**--- Step 2f: Power up of Auxilliary modules needed to run test */
-    if (testResult == 0)
-    {
-        /* Power all modules required for test */
-        for ( i = 0; i < PBIST_TestHandleArray[instanceId].numAuxDevices; i++)
-        {
-#ifdef DEBUG
-        AppUtils_Printf(MSG_NORMAL,
-                        "  Powering on Device number %d Device Id %x\n",
-                        i, PBIST_TestHandleArray[instanceId].auxDeviceIdsP[i]);
-#endif
-
-            status = Sciclient_pmSetModuleState(PBIST_TestHandleArray[instanceId].auxDeviceIdsP[i],
-                                                TISCI_MSG_VALUE_DEVICE_SW_STATE_ON,
-                                                TISCI_MSG_FLAG_AOP,
-                                                SCICLIENT_SERVICE_WAIT_FOREVER);
+        /**--- Step 2e: Perform any additional power sequencing, if needed ---*/
+        /* Custom core power restore sequence - needed to allow core to be powered
+         * up later by Secondary Bootloader (SBL) */
+        if ((testResult == 0) &&
+            (PBIST_TestHandleArray[instanceId].coreCustPwrSeqNeeded) &&
+            (PBIST_TestHandleArray[instanceId].tisciProcId != 0u))
+        {
+            status = customPrepareForPowerUpSequence(PBIST_TestHandleArray[instanceId].tisciProcId);
             if (status != CSL_PASS)
             {
-                UART_printf("  Sciclient_pmSetModuleState 0x%x ...FAILED \n",
-                            PBIST_TestHandleArray[instanceId].auxDeviceIdsP[i]);
+                UART_printf("  Custom core power restore sequence, ProcId 0x%x ...FAILED \n",
+                            PBIST_TestHandleArray[instanceId].tisciProcId);
                 testResult = -1;
-                break;
             }
         }
-    }
 
-    /**--- Step 2g: Power up Primary core */
-    if ((testResult == 0) && (PBIST_TestHandleArray[instanceId].procRstNeeded)
-                          && (PBIST_TestHandleArray[instanceId].tisciDeviceId != NULL))
-    {
-        /* power on Primary core*/
+        /**--- Step 2f: Power up of Auxilliary modules needed to run test */
+        if (testResult == 0)
+        {
+            /* Power all modules required for test */
+            for ( i = 0; i < PBIST_TestHandleArray[instanceId].numAuxDevices; i++)
+            {
 #ifdef DEBUG
-        AppUtils_Printf(MSG_NORMAL,
-                        "  Primary core: Powering on %s \n",
-                        PBIST_TestHandleArray[instanceId].coreName);
+                UART_printf("  Powering on Device number %d Device Id %x\n",
+                            i, PBIST_TestHandleArray[instanceId].auxDeviceIdsP[i]);
 #endif
-        status = Sciclient_pmSetModuleState(PBIST_TestHandleArray[instanceId].tisciDeviceId,
-                                            TISCI_MSG_VALUE_DEVICE_SW_STATE_ON,
-                                            TISCI_MSG_FLAG_AOP,
-                                            SCICLIENT_SERVICE_WAIT_FOREVER);
 
-        if (status != CSL_PASS)
-        {
-            AppUtils_Printf(MSG_NORMAL,
-                            "   Primary core: Sciclient_pmSetModuleState 0x%x ...FAILED \n",
-                            PBIST_TestHandleArray[instanceId].tisciDeviceId);
-            testResult = -1;
+                status = Sciclient_pmSetModuleState(PBIST_TestHandleArray[instanceId].auxDeviceIdsP[i],
+                                                    TISCI_MSG_VALUE_DEVICE_SW_STATE_ON,
+                                                    TISCI_MSG_FLAG_AOP,
+                                                    SCICLIENT_SERVICE_WAIT_FOREVER);
+                if (status != CSL_PASS)
+                {
+                    UART_printf("  Sciclient_pmSetModuleState 0x%x ...FAILED \n",
+                                PBIST_TestHandleArray[instanceId].auxDeviceIdsP[i]);
+                    testResult = -1;
+                    break;
+                }
+            }
         }
-    }
 
-    /**--- Step 2h: Power up Secondary core */
-    if ((testResult == 0) && (PBIST_TestHandleArray[instanceId].procRstNeeded)
-                          && (PBIST_TestHandleArray[instanceId].tisciSecDeviceId != NULL))
-    {
-        if (PBIST_TestHandleArray[instanceId].secondaryCoreNeeded)
+        /**--- Step 2g: Power up Primary core */
+        if ((testResult == 0) && (PBIST_TestHandleArray[instanceId].procRstNeeded)
+                              && (PBIST_TestHandleArray[instanceId].tisciDeviceId != 0U))
         {
-            /* power on Secondary core*/
+            /* power on Primary core*/
 #ifdef DEBUG
-            AppUtils_Printf(MSG_NORMAL,
-                            "  Secondary core: Powering on %s \n",
-                            PBIST_TestHandleArray[instanceId].secCoreName);
+            UART_printf("  Primary core: Powering on %s \n",
+                        PBIST_TestHandleArray[instanceId].coreName);
 #endif
-            status = Sciclient_pmSetModuleState(PBIST_TestHandleArray[instanceId].tisciSecDeviceId,
+            status = Sciclient_pmSetModuleState(PBIST_TestHandleArray[instanceId].tisciDeviceId,
                                                 TISCI_MSG_VALUE_DEVICE_SW_STATE_ON,
                                                 TISCI_MSG_FLAG_AOP,
                                                 SCICLIENT_SERVICE_WAIT_FOREVER);
+
             if (status != CSL_PASS)
             {
-                AppUtils_Printf(MSG_NORMAL,
-                                "   Secondary core: Sciclient_pmSetModuleState 0x%x ...FAILED \n",
-                                PBIST_TestHandleArray[instanceId].tisciSecDeviceId);
+                UART_printf("   Primary core: Sciclient_pmSetModuleState 0x%x ...FAILED \n",
+                            PBIST_TestHandleArray[instanceId].tisciDeviceId);
                 testResult = -1;
-                return testResult;
             }
         }
-    }
 
-    /**--- Step 2i: Double check the Power up of Auxilliary modules needed to run test
-     * and wait until they are powered up */
-    if (testResult == 0)
-    {
-        /* Wait for all modules required for test to be powered up */
-        for ( i = 0; i < PBIST_TestHandleArray[instanceId].numAuxDevices; i++)
+        /**--- Step 2h: Power up Secondary core */
+        if ((testResult == 0) && (PBIST_TestHandleArray[instanceId].procRstNeeded)
+                              && (PBIST_TestHandleArray[instanceId].tisciSecDeviceId != 0U))
         {
+            if (PBIST_TestHandleArray[instanceId].secondaryCoreNeeded)
+            {
+                /* power on Secondary core*/
 #ifdef DEBUG
-        AppUtils_Printf(MSG_NORMAL,
-                        "  Double checking Powering on Device number %d Device Id %x\n",
-                        i, PBIST_TestHandleArray[instanceId].auxDeviceIdsP[i]);
+                UART_printf("  Secondary core: Powering on %s \n",
+                            PBIST_TestHandleArray[instanceId].secCoreName);
 #endif
-            do
-            {
-                status = Sciclient_pmGetModuleState(PBIST_TestHandleArray[instanceId].auxDeviceIdsP[i],
-                                                    &moduleState,
-                                                    &resetState,
-                                                    &contextLossState,
+                status = Sciclient_pmSetModuleState(PBIST_TestHandleArray[instanceId].tisciSecDeviceId,
+                                                    TISCI_MSG_VALUE_DEVICE_SW_STATE_ON,
+                                                    TISCI_MSG_FLAG_AOP,
                                                     SCICLIENT_SERVICE_WAIT_FOREVER);
                 if (status != CSL_PASS)
                 {
-                    UART_printf("  Sciclient_pmGetModuleState 0x%x ...FAILED \n",
-                                PBIST_TestHandleArray[instanceId].auxDeviceIdsP[i]);
+                    UART_printf("   Secondary core: Sciclient_pmSetModuleState 0x%x ...FAILED \n",
+                                PBIST_TestHandleArray[instanceId].tisciSecDeviceId);
                     testResult = -1;
-                    break;
+                    return testResult;
                 }
-            } while (moduleState != TISCI_MSG_VALUE_DEVICE_HW_STATE_ON);
+            }
         }
-    }
 
-    /**--- Step 2j: Double check the Power up of Primary core and wait until it is
-     * powered up */
-    if ((testResult == 0) && (PBIST_TestHandleArray[instanceId].procRstNeeded)
-                          && (PBIST_TestHandleArray[instanceId].tisciDeviceId != NULL))
-    {
-        /* Double check power on Primary core*/
-#ifdef DEBUG
-        AppUtils_Printf(MSG_NORMAL,
-                        "  Primary core: Double checking Powering on %s \n",
-                        PBIST_TestHandleArray[instanceId].coreName);
-#endif
-        do
+        /**--- Step 2i: Double check the Power up of Auxilliary modules needed to run test
+         * and wait until they are powered up */
+        if (testResult == 0)
         {
-            status = Sciclient_pmGetModuleState(PBIST_TestHandleArray[instanceId].tisciDeviceId,
-                                                &moduleState,
-                                                &resetState,
-                                                &contextLossState,
-                                                SCICLIENT_SERVICE_WAIT_FOREVER);
-            if (status != CSL_PASS)
+            /* Wait for all modules required for test to be powered up */
+            for ( i = 0; i < PBIST_TestHandleArray[instanceId].numAuxDevices; i++)
             {
-                UART_printf("   Primary core: Sciclient_pmGetModuleState 0x%x ...FAILED \n",
-                            PBIST_TestHandleArray[instanceId].tisciDeviceId);
-                testResult = -1;
-                break;
+#ifdef DEBUG
+                UART_printf("  Double checking Powering on Device number %d Device Id %x\n",
+                            i, PBIST_TestHandleArray[instanceId].auxDeviceIdsP[i]);
+#endif
+                do
+                {
+                    status = Sciclient_pmGetModuleState(PBIST_TestHandleArray[instanceId].auxDeviceIdsP[i],
+                                                        &moduleState,
+                                                        &resetState,
+                                                        &contextLossState,
+                                                        SCICLIENT_SERVICE_WAIT_FOREVER);
+                    if (status != CSL_PASS)
+                    {
+                        UART_printf("  Sciclient_pmGetModuleState 0x%x ...FAILED \n",
+                                    PBIST_TestHandleArray[instanceId].auxDeviceIdsP[i]);
+                        testResult = -1;
+                        break;
+                    }
+                } while (moduleState != TISCI_MSG_VALUE_DEVICE_HW_STATE_ON);
             }
-        } while (moduleState != TISCI_MSG_VALUE_DEVICE_HW_STATE_ON);
-    }
+        }
 
-    /**--- Step 2k: Double check the Power up of Primary core and wait until it is
-     * powered up */
-    if ((testResult == 0) && (PBIST_TestHandleArray[instanceId].procRstNeeded)
-                          && (PBIST_TestHandleArray[instanceId].tisciSecDeviceId != NULL))
-    {
-        if (PBIST_TestHandleArray[instanceId].secondaryCoreNeeded)
+        /**--- Step 2j: Double check the Power up of Primary core and wait until it is
+         * powered up */
+        if ((testResult == 0) && (PBIST_TestHandleArray[instanceId].procRstNeeded)
+                              && (PBIST_TestHandleArray[instanceId].tisciDeviceId != 0U))
         {
-            /* Double check power on Secondary core*/
+            /* Double check power on Primary core*/
 #ifdef DEBUG
-            AppUtils_Printf(MSG_NORMAL,
-                            "  Secondary core: Double checking Powering on %s \n",
-                            PBIST_TestHandleArray[instanceId].coreName);
+            UART_printf("  Primary core: Double checking Powering on %s \n",
+                        PBIST_TestHandleArray[instanceId].coreName);
 #endif
             do
             {
-                status = Sciclient_pmGetModuleState(PBIST_TestHandleArray[instanceId].tisciSecDeviceId,
+                status = Sciclient_pmGetModuleState(PBIST_TestHandleArray[instanceId].tisciDeviceId,
                                                     &moduleState,
                                                     &resetState,
                                                     &contextLossState,
                                                     SCICLIENT_SERVICE_WAIT_FOREVER);
                 if (status != CSL_PASS)
                 {
-                    UART_printf("   Secondary core: Sciclient_pmGetModuleState 0x%x ...FAILED \n",
-                                PBIST_TestHandleArray[instanceId].tisciSecDeviceId);
+                    UART_printf("   Primary core: Sciclient_pmGetModuleState 0x%x ...FAILED \n",
+                                PBIST_TestHandleArray[instanceId].tisciDeviceId);
                     testResult = -1;
                     break;
                 }
             } while (moduleState != TISCI_MSG_VALUE_DEVICE_HW_STATE_ON);
         }
-    }
+
+        /**--- Step 2k: Double check the Power up of Primary core and wait until it is
+         * powered up */
+        if ((testResult == 0) && (PBIST_TestHandleArray[instanceId].procRstNeeded)
+                              && (PBIST_TestHandleArray[instanceId].tisciSecDeviceId != 0U))
+        {
+            if (PBIST_TestHandleArray[instanceId].secondaryCoreNeeded)
+            {
+                /* Double check power on Secondary core*/
+#ifdef DEBUG
+                UART_printf("  Secondary core: Double checking Powering on %s \n",
+                            PBIST_TestHandleArray[instanceId].coreName);
+#endif
+                do
+                {
+                    status = Sciclient_pmGetModuleState(PBIST_TestHandleArray[instanceId].tisciSecDeviceId,
+                                                        &moduleState,
+                                                        &resetState,
+                                                        &contextLossState,
+                                                        SCICLIENT_SERVICE_WAIT_FOREVER);
+                    if (status != CSL_PASS)
+                    {
+                        UART_printf("   Secondary core: Sciclient_pmGetModuleState 0x%x ...FAILED \n",
+                                    PBIST_TestHandleArray[instanceId].tisciSecDeviceId);
+                        testResult = -1;
+                        break;
+                    }
+                } while (moduleState != TISCI_MSG_VALUE_DEVICE_HW_STATE_ON);
+            }
+        }
 
 #endif /* #ifdef POWERUP_CORES_BEFORE_TEST */
-    /**--- Step 2l: Power up PBIST */
-    if ((testResult == 0) && (PBIST_TestHandleArray[instanceId].tisciPBISTDeviceId != 0u))
-    {
+        /**--- Step 2l: Power up PBIST */
+        if ((testResult == 0) && (PBIST_TestHandleArray[instanceId].tisciPBISTDeviceId != 0u))
+        {
 #ifdef DEBUG
-        AppUtils_Printf(MSG_NORMAL,
-                        "  Powering on PBIST %d \n",
+            UART_printf("  Powering on PBIST %d \n",
                         PBIST_TestHandleArray[instanceId].tisciPBISTDeviceId);
 #endif
-        status = Sciclient_pmSetModuleState(PBIST_TestHandleArray[instanceId].tisciPBISTDeviceId,
-                                            TISCI_MSG_VALUE_DEVICE_SW_STATE_ON,
-                                            TISCI_MSG_FLAG_AOP,
-                                            SCICLIENT_SERVICE_WAIT_FOREVER);
+            status = Sciclient_pmSetModuleState(PBIST_TestHandleArray[instanceId].tisciPBISTDeviceId,
+                                                TISCI_MSG_VALUE_DEVICE_SW_STATE_ON,
+                                                TISCI_MSG_FLAG_AOP,
+                                                SCICLIENT_SERVICE_WAIT_FOREVER);
 
-        if (status != CSL_PASS)
-        {
-            AppUtils_Printf(MSG_NORMAL,
-                            "   PBIST Sciclient_pmSetModuleState 0x%x ...FAILED: retValue %d\n",
+            if (status != CSL_PASS)
+            {
+                UART_printf("   PBIST Sciclient_pmSetModuleState 0x%x ...FAILED: retValue %d\n",
                             PBIST_TestHandleArray[instanceId].tisciPBISTDeviceId, status);
-            testResult = -1;
+                testResult = -1;
+            }
         }
-    }
 
-    /**--- Step 2m: Execute Auxialliary init function for any final core-internal register
-     * setup needed for the PBIST test */
-    if (testResult == 0)
-    {
-        if (PBIST_TestHandleArray[instanceId].auxInitRestoreFunction != 0)
+        /**--- Step 2m: Execute Auxialliary init function for any final core-internal register
+         * setup needed for the PBIST test */
+        if (testResult == 0)
         {
-            status = PBIST_TestHandleArray[instanceId].auxInitRestoreFunction(TRUE);
-            if (status != CSL_PASS)
+            if (PBIST_TestHandleArray[instanceId].auxInitRestoreFunction != 0)
             {
-                testResult = -1;
+                status = PBIST_TestHandleArray[instanceId].auxInitRestoreFunction(TRUE);
+                if (status != CSL_PASS)
+                {
+                    testResult = -1;
+                }
             }
         }
-    }
 
-    /**--- Step 2n: Get PBIST register space Pointer */
-    pPBISTRegs = PBIST_TestHandleArray[instanceId].pPBISTRegs;
+#if defined(PROFILE_PBIST_TIMING)
+        /* Get start time for PBIST test */
+        testStartTime = TimerP_getTimeInUsecs();
+#endif
 
-    if ((testResult == 0) && (PBIST_TestHandleArray[instanceId].PBISTRegsHiAddress != 0u))
-    {
-        /* Add RAT configuration to access address > 32bit address range */
-        translationCfg.translatedAddress = PBIST_TestHandleArray[instanceId].PBISTRegsHiAddress;
-        translationCfg.sizeInBytes = PBIST_REG_REGION_SIZE;
-        translationCfg.baseAddress = (uint32_t)pPBISTRegs;
-
-        /* Set up RAT translation */
-        result = CSL_ratConfigRegionTranslation((CSL_ratRegs *)CSL_MCU_ARMSS_RAT_CFG_BASE,
-                                                PBIST_RAT_REGION_INDEX, &translationCfg);
-        if (result == false) {
-            AppUtils_Printf(MSG_NORMAL, "   CSL_ratConfigRegionTranslation...FAILED \n");
+        /**-- Step 3: Run PBIST test. --*/
+        status = SDL_PBIST_selfTest((SDL_PBIST_inst)PBIST_TestHandleArray[instanceId].pbistInst, testType, NULL, &PBISTResult);
+        if ((status != SDL_PASS) || (PBISTResult == false))
+        {
             testResult = -1;
         }
-    }
-
-    PBIST_TestHandleArray[instanceId].doneFlag = false;
 
 #if defined(PROFILE_PBIST_TIMING)
-    /* Get start time for PBIST test */
-    testStartTime = TimerP_getTimeInUsecs();
+        /* Record test end time */
+        testEndTime = TimerP_getTimeInUsecs();
 #endif
 
-    /**-- Step 3: Run PBIST test (the test may have multiple passes as designated
-     * by the particular SOC, see soc/<SOC Device>/pbist_defs.c for details. --*/
-    for (i = 0; i < PBIST_TestHandleArray[instanceId].numPBISTRuns; i++)
-    {
-        /**--- Step 3a: Start the PBIST test */
-#ifdef DEBUG
-        AppUtils_Printf(MSG_NORMAL, "\n Starting PBIST Run %d for Instance %s\n",
-                        i, pbistName(instanceId));
-#endif
-        if (testResult == 0)
-        {
-#ifdef DEBUG
-            AppUtils_Printf(MSG_NORMAL, "\n Starting CSL_PBIST_start in PBIST Run %d\n", i);
-#endif
-            status = CSL_PBIST_start(pPBISTRegs, &PBIST_TestHandleArray[instanceId].PBISTConfigRun[i]);
-            if (status != CSL_PASS)
-            {
-                AppUtils_Printf(MSG_NORMAL, " CSL_PBIST_start failed in PBIST Run %d\n", i);
-                testResult = -1;
-            }
-        }
+        /**-- Step 4: Restore cores --*/
 
-        /**--- Step 3b: Wait for interrupt indicating completion of the PBIST test */
+        /**--- Step 4a: Execute Auxilliary restore function to restore core-internal
+         * registers to original state */
         if (testResult == 0)
         {
-            /* Timeout if exceeds time */
-            while ((!PBIST_TestHandleArray[instanceId].doneFlag)
-                   && (timeoutCount++ < PBIST_MAX_TIMEOUT_VALUE));
-
-            if (!(PBIST_TestHandleArray[instanceId].doneFlag))
-            {
-                AppUtils_Printf(MSG_NORMAL, " PBIST test timed out in PBIST Run %d\n", i);
-                testResult = -1;
-            }
-            /* reset Done flag so we can run again */
-            PBIST_TestHandleArray[instanceId].doneFlag = false;
-        }
 
-        /**--- Step 3c: Check the result of the PBIST test */
-        if (testResult == 0)
-        {
-#ifdef DEBUG
-            AppUtils_Printf(MSG_NORMAL, "\n Starting CSL_PBIST_checkResult in PBIST Run %d\n", i);
-#endif
-            status = CSL_PBIST_checkResult(pPBISTRegs, &PBISTResult);
-            if (status != CSL_PASS)
+            if (PBIST_TestHandleArray[instanceId].auxInitRestoreFunction != 0)
             {
-                AppUtils_Printf(MSG_NORMAL, " CSL_PBIST_checkResult failed in PBIST Run %d\n", i);
-                testResult = -1;
-            }
-            else
-            {
-                /* Check the PBIST result */
-                if (PBISTResult != true)
+                status = PBIST_TestHandleArray[instanceId].auxInitRestoreFunction(FALSE);
+                if (status != CSL_PASS)
                 {
-                    AppUtils_Printf(MSG_NORMAL, "\n PBIST test failed in PBIST Run %d\n", i);
                     testResult = -1;
                 }
             }
         }
 
-        /**--- Step 3d: Do a Soft Reset */
-        if (testResult == 0)
+        /**--- Step 4b: Power off PBIST */
+        if ((testResult == 0) && (PBIST_TestHandleArray[instanceId].tisciPBISTDeviceId != 0u))
         {
 #ifdef DEBUG
-            UART_printf("\n Starting CSL_PBIST_softReset \n");
+            UART_printf("  Powering off PBIST %d \n",
+                        PBIST_TestHandleArray[instanceId].tisciPBISTDeviceId);
 #endif
+            status = Sciclient_pmSetModuleState(PBIST_TestHandleArray[instanceId].tisciPBISTDeviceId,
+                                                TISCI_MSG_VALUE_DEVICE_SW_STATE_AUTO_OFF,
+                                                TISCI_MSG_FLAG_AOP,
+                                                SCICLIENT_SERVICE_WAIT_FOREVER);
 
-            /* Run PBIST test */
-            status = CSL_PBIST_softReset(pPBISTRegs);
             if (status != CSL_PASS)
             {
-                UART_printf(" CSL_PBIST_softReset failed \n");
+                UART_printf("   PBIST Sciclient_pmSetModuleState 0x%x ...FAILED \n",
+                            PBIST_TestHandleArray[instanceId].tisciPBISTDeviceId);
                 testResult = -1;
             }
         }
 
-        /**--- Step 3e: Execute exit sequence */
-        if (testResult == 0)
+#ifdef POWERUP_CORES_BEFORE_TEST
+        /**--- Step 4c: Power off Secondary core */
+        if ((testResult == 0) && (PBIST_TestHandleArray[instanceId].procRstNeeded)
+                              && (PBIST_TestHandleArray[instanceId].tisciSecDeviceId != 0U))
         {
+            if (PBIST_TestHandleArray[instanceId].secondaryCoreNeeded)
+            {
+                /* power off Secondary core*/
 #ifdef DEBUG
-            UART_printf("\n Starting CSL_PBIST_releaseTestMode \n");
+                UART_printf("  Secondary core: Powering off %s \n",
+                            PBIST_TestHandleArray[instanceId].secCoreName);
 #endif
-            /* Exit PBIST test */
-            status = CSL_PBIST_releaseTestMode(pPBISTRegs);
-            if (status != CSL_PASS)
-            {
-                UART_printf(" CSL_PBIST_releaseTestMode failed \n");
-                testResult = -1;
+                status = Sciclient_pmSetModuleState(PBIST_TestHandleArray[instanceId].tisciSecDeviceId,
+                                                    TISCI_MSG_VALUE_DEVICE_SW_STATE_AUTO_OFF,
+                                                    TISCI_MSG_FLAG_AOP,
+                                                    SCICLIENT_SERVICE_WAIT_FOREVER);
+                if (status != CSL_PASS)
+                {
+                    UART_printf("   Secondary core: Sciclient_pmSetModuleState Power off 0x%x ...FAILED \n",
+                                PBIST_TestHandleArray[instanceId].tisciSecDeviceId);
+                    testResult = -1;
+                    return testResult;
+                }
             }
         }
-    } /* for (i = 0; i < PBIST_TestHandleArray[instanceId].numPBISTRuns; i++) */
-
-#if defined(PROFILE_PBIST_TIMING)
-    /* Record test end time */
-    testEndTime = TimerP_getTimeInUsecs();
-#endif
-
-    /**-- Step 4: Restore cores --*/
-
-    /**--- Step 4a: Execute Auxilliary restore function to restore core-internal
-     * registers to original state */
-    if (testResult == 0)
-    {
 
-        if (PBIST_TestHandleArray[instanceId].auxInitRestoreFunction != 0)
+        /**--- Step 4d: Perform any custom/core-specific power down sequence */
+        if ((testResult == 0) &&
+            (PBIST_TestHandleArray[instanceId].coreCustPwrSeqNeeded) &&
+            (PBIST_TestHandleArray[instanceId].tisciProcId != 0u))
         {
-            status = PBIST_TestHandleArray[instanceId].auxInitRestoreFunction(FALSE);
+            status = customPowerDownSequence(PBIST_TestHandleArray[instanceId].tisciProcId);
             if (status != CSL_PASS)
             {
+                UART_printf("  Custom core power down sequence, ProcId 0x%x ...FAILED \n",
+                            PBIST_TestHandleArray[instanceId].tisciProcId);
                 testResult = -1;
             }
         }
 
-    }
-
-    /**--- Step 4b: Power off PBIST */
-    if ((testResult == 0) && (PBIST_TestHandleArray[instanceId].tisciPBISTDeviceId != 0u))
-    {
-#ifdef DEBUG
-        AppUtils_Printf(MSG_NORMAL,
-                        "  Powering off PBIST %d \n",
-                        PBIST_TestHandleArray[instanceId].tisciPBISTDeviceId);
-#endif
-        status = Sciclient_pmSetModuleState(PBIST_TestHandleArray[instanceId].tisciPBISTDeviceId,
-                                            TISCI_MSG_VALUE_DEVICE_SW_STATE_AUTO_OFF,
-                                            TISCI_MSG_FLAG_AOP,
-                                            SCICLIENT_SERVICE_WAIT_FOREVER);
-
-        if (status != CSL_PASS)
+        /**--- Step 4e: Power off Primary core */
+        if ((testResult == 0) && (PBIST_TestHandleArray[instanceId].tisciProcId != 0u)
+                        && (PBIST_TestHandleArray[instanceId].procRstNeeded))
         {
-            AppUtils_Printf(MSG_NORMAL,
-                            "   PBIST Sciclient_pmSetModuleState 0x%x ...FAILED \n",
-                            PBIST_TestHandleArray[instanceId].tisciPBISTDeviceId);
-            testResult = -1;
-        }
-    }
-
-#ifdef POWERUP_CORES_BEFORE_TEST
-    /**--- Step 4c: Power off Secondary core */
-    if ((testResult == 0) && (PBIST_TestHandleArray[instanceId].procRstNeeded)
-                          && (PBIST_TestHandleArray[instanceId].tisciSecDeviceId != NULL))
-    {
-        if (PBIST_TestHandleArray[instanceId].secondaryCoreNeeded)
-        {
-            /* power off Secondary core*/
+            /* power off Primary core*/
 #ifdef DEBUG
-            AppUtils_Printf(MSG_NORMAL,
-                            "  Secondary core: Powering off %s \n",
-                            PBIST_TestHandleArray[instanceId].secCoreName);
+            UART_printf("  Primary core: Powering off %s \n",
+                        PBIST_TestHandleArray[instanceId].coreName);
 #endif
-            status = Sciclient_pmSetModuleState(PBIST_TestHandleArray[instanceId].tisciSecDeviceId,
+            status = Sciclient_pmSetModuleState(PBIST_TestHandleArray[instanceId].tisciDeviceId,
                                                 TISCI_MSG_VALUE_DEVICE_SW_STATE_AUTO_OFF,
                                                 TISCI_MSG_FLAG_AOP,
                                                 SCICLIENT_SERVICE_WAIT_FOREVER);
+
             if (status != CSL_PASS)
             {
-                AppUtils_Printf(MSG_NORMAL,
-                                "   Secondary core: Sciclient_pmSetModuleState Power off 0x%x ...FAILED \n",
-                                PBIST_TestHandleArray[instanceId].tisciSecDeviceId);
+                UART_printf("   Primary core: Sciclient_pmSetModuleState Power off 0x%x ...FAILED \n",
+                            PBIST_TestHandleArray[instanceId].tisciDeviceId);
                 testResult = -1;
-                return testResult;
             }
         }
-    }
 
-    /**--- Step 4d: Perform any custom/core-specific power down sequence */
-    if ((testResult == 0) &&
-        (PBIST_TestHandleArray[instanceId].coreCustPwrSeqNeeded) &&
-        (PBIST_TestHandleArray[instanceId].tisciProcId != 0u))
-    {
-        status = customPowerDownSequence(PBIST_TestHandleArray[instanceId].tisciProcId);
-        if (status != CSL_PASS)
+        /**--- Step 4f: Power off of Auxilliary modules needed to run test */
+        if (testResult == 0)
         {
-            UART_printf("  Custom core power down sequence, ProcId 0x%x ...FAILED \n",
-                        PBIST_TestHandleArray[instanceId].tisciProcId);
-            testResult = -1;
-        }
-    }
-
-    /**--- Step 4e: Power off Primary core */
-    if ((testResult == 0) && (PBIST_TestHandleArray[instanceId].tisciProcId != 0u)
-                    && (PBIST_TestHandleArray[instanceId].procRstNeeded))
-    {
-        /* power off Primary core*/
+            /* Power all modules required for test */
+            for ( i = 0; i < PBIST_TestHandleArray[instanceId].numAuxDevices; i++)
+            {
 #ifdef DEBUG
-        AppUtils_Printf(MSG_NORMAL,
-                        "  Primary core: Powering off %s \n",
-                        PBIST_TestHandleArray[instanceId].coreName);
+                UART_printf("  Powering off Device number %d Device Id %x\n",
+                            i, PBIST_TestHandleArray[instanceId].auxDeviceIdsP[i]);
 #endif
-        status = Sciclient_pmSetModuleState(PBIST_TestHandleArray[instanceId].tisciDeviceId,
-                                            TISCI_MSG_VALUE_DEVICE_SW_STATE_AUTO_OFF,
-                                            TISCI_MSG_FLAG_AOP,
-                                            SCICLIENT_SERVICE_WAIT_FOREVER);
-
-        if (status != CSL_PASS)
-        {
-            AppUtils_Printf(MSG_NORMAL,
-                            "   Primary core: Sciclient_pmSetModuleState Power off 0x%x ...FAILED \n",
-                            PBIST_TestHandleArray[instanceId].tisciDeviceId);
-            testResult = -1;
+                status = Sciclient_pmSetModuleState(PBIST_TestHandleArray[instanceId].auxDeviceIdsP[i],
+                                                    TISCI_MSG_VALUE_DEVICE_SW_STATE_AUTO_OFF,
+                                                    TISCI_MSG_FLAG_AOP,
+                                                    SCICLIENT_SERVICE_WAIT_FOREVER);
+                if (status != CSL_PASS)
+                {
+                    UART_printf("  Sciclient_pmSetModuleState 0x%x ...FAILED \n",
+                                PBIST_TestHandleArray[instanceId].auxDeviceIdsP[i]);
+                    testResult = -1;
+                    break;
+                }
+            }
         }
-    }
 
-    /**--- Step 4f: Power off of Auxilliary modules needed to run test */
-    if (testResult == 0)
-    {
-        /* Power all modules required for test */
-        for ( i = 0; i < PBIST_TestHandleArray[instanceId].numAuxDevices; i++)
+        /**--- Step 4g: Perform any custom/core-specific power restore sequence needed to
+         * allow core to be powered up properly later */
+        if ((testResult == 0) &&
+            (PBIST_TestHandleArray[instanceId].coreCustPwrSeqNeeded) &&
+            (PBIST_TestHandleArray[instanceId].tisciProcId != 0u))
         {
-#ifdef DEBUG
-            AppUtils_Printf(MSG_NORMAL,
-                            "  Powering off Device number %d Device Id %x\n",
-                            i, PBIST_TestHandleArray[instanceId].auxDeviceIdsP[i]);
-#endif
-            status = Sciclient_pmSetModuleState(PBIST_TestHandleArray[instanceId].auxDeviceIdsP[i],
-                                                TISCI_MSG_VALUE_DEVICE_SW_STATE_AUTO_OFF,
-                                                TISCI_MSG_FLAG_AOP,
-                                                SCICLIENT_SERVICE_WAIT_FOREVER);
+            status = customPrepareForPowerUpSequence(PBIST_TestHandleArray[instanceId].tisciProcId);
             if (status != CSL_PASS)
             {
-                UART_printf("  Sciclient_pmSetModuleState 0x%x ...FAILED \n",
-                            PBIST_TestHandleArray[instanceId].auxDeviceIdsP[i]);
+                UART_printf("  Custom core power restore sequence, ProcId 0x%x ...FAILED \n",
+                            PBIST_TestHandleArray[instanceId].tisciProcId);
                 testResult = -1;
-                break;
             }
         }
-    }
 
-    /**--- Step 4g: Perform any custom/core-specific power restore sequence needed to
-     * allow core to be powered up properly later */
-    if ((testResult == 0) &&
-        (PBIST_TestHandleArray[instanceId].coreCustPwrSeqNeeded) &&
-        (PBIST_TestHandleArray[instanceId].tisciProcId != 0u))
-    {
-        status = customPrepareForPowerUpSequence(PBIST_TestHandleArray[instanceId].tisciProcId);
-        if (status != CSL_PASS)
+        /**--- Step 4h: Take Primary core out of local reset */
+        if ((testResult == 0) && (PBIST_TestHandleArray[instanceId].procRstNeeded)
+                              && (PBIST_TestHandleArray[instanceId].tisciDeviceId != 0U))
         {
-            UART_printf("  Custom core power restore sequence, ProcId 0x%x ...FAILED \n",
-                        PBIST_TestHandleArray[instanceId].tisciProcId);
-            testResult = -1;
-        }
-    }
-
-    /**--- Step 4h: Take Primary core out of local reset */
-    if ((testResult == 0) && (PBIST_TestHandleArray[instanceId].procRstNeeded)
-                          && (PBIST_TestHandleArray[instanceId].tisciDeviceId != NULL))
-    {
 #ifdef DEBUG
-        AppUtils_Printf(MSG_NORMAL,
-                        "  Primary core: Taking out of local reset the core %s \n",
+            UART_printf("  Primary core: Taking out of local reset the core %s \n",
                         PBIST_TestHandleArray[instanceId].coreName);
 #endif
-        status = Sciclient_pmSetModuleRst(PBIST_TestHandleArray[instanceId].tisciDeviceId,
-                                          0x0, /* Local Reset de-asserted */
-                                          SCICLIENT_SERVICE_WAIT_FOREVER);
-        if (status != CSL_PASS)
-        {
-             UART_printf("  Sciclient_pmSetModuleRst 0x%x ...FAILED \n",
-                         PBIST_TestHandleArray[instanceId].tisciDeviceId);
-             testResult = -1;
+            status = Sciclient_pmSetModuleRst(PBIST_TestHandleArray[instanceId].tisciDeviceId,
+                                              0x0, /* Local Reset de-asserted */
+                                              SCICLIENT_SERVICE_WAIT_FOREVER);
+            if (status != CSL_PASS)
+            {
+                 UART_printf("  Sciclient_pmSetModuleRst 0x%x ...FAILED \n",
+                             PBIST_TestHandleArray[instanceId].tisciDeviceId);
+                 testResult = -1;
+            }
         }
-    }
 
-    /**--- Step 4i: Take Secondary core out of local reset */
-    if ((testResult == 0) && (PBIST_TestHandleArray[instanceId].procRstNeeded)
-                          && (PBIST_TestHandleArray[instanceId].tisciSecDeviceId != NULL))
-    {
+        /**--- Step 4i: Take Secondary core out of local reset */
+        if ((testResult == 0) && (PBIST_TestHandleArray[instanceId].procRstNeeded)
+                              && (PBIST_TestHandleArray[instanceId].tisciSecDeviceId != 0U))
+        {
 #ifdef DEBUG
-        AppUtils_Printf(MSG_NORMAL,
-                        "  Secondary core: Taking out of local reset the core %s \n",
+            UART_printf("  Secondary core: Taking out of local reset the core %s \n",
                         PBIST_TestHandleArray[instanceId].secCoreName);
 #endif
-        status = Sciclient_pmSetModuleRst(PBIST_TestHandleArray[instanceId].tisciSecProcId,
-                                          0x0, /* Local Reset de-asserted */
-                                          SCICLIENT_SERVICE_WAIT_FOREVER);
-        if (status != CSL_PASS)
-        {
-             UART_printf("  Sciclient_pmSetModuleRst 0x%x ...FAILED \n",
-                         PBIST_TestHandleArray[instanceId].tisciSecDeviceId);
-             testResult = -1;
+            status = Sciclient_pmSetModuleRst(PBIST_TestHandleArray[instanceId].tisciSecProcId,
+                                              0x0, /* Local Reset de-asserted */
+                                              SCICLIENT_SERVICE_WAIT_FOREVER);
+            if (status != CSL_PASS)
+            {
+                 UART_printf("  Sciclient_pmSetModuleRst 0x%x ...FAILED \n",
+                             PBIST_TestHandleArray[instanceId].tisciSecDeviceId);
+                 testResult = -1;
+            }
         }
-    }
 #endif /* #ifdef POWERUP_CORES_BEFORE_TEST */
-    /* Ensure that cores have been turned off to prepare for booting of the cores */
+        /* Ensure that cores have been turned off to prepare for booting of the cores */
 
-    /**--- Step 4j: Power off Primary core */
-    if ((testResult == 0) && (PBIST_TestHandleArray[instanceId].procRstNeeded))
-    {
-        if (PBIST_TestHandleArray[instanceId].tisciDeviceId != 0u)
+        /**--- Step 4j: Power off Primary core */
+        if ((testResult == 0) && (PBIST_TestHandleArray[instanceId].procRstNeeded))
         {
-            /* Set Software Reset Disable State for Primary core */
+            if (PBIST_TestHandleArray[instanceId].tisciDeviceId != 0u)
+            {
+                /* Set Software Reset Disable State for Primary core */
 #ifdef DEBUG
-            AppUtils_Printf(MSG_NORMAL,
-                            "  %s: Primary core: Put in Software Reset Disable \n",
+                UART_printf("  %s: Primary core: Put in Software Reset Disable \n",
                             PBIST_TestHandleArray[instanceId].coreName);
 #endif
-            status =  Sciclient_pmSetModuleState(PBIST_TestHandleArray[instanceId].tisciDeviceId,
-                                                 TISCI_MSG_VALUE_DEVICE_SW_STATE_AUTO_OFF,
-                                                 TISCI_MSG_FLAG_AOP,
-                                                 SCICLIENT_SERVICE_WAIT_FOREVER);
-            if (status != CSL_PASS)
-            {
-                AppUtils_Printf(MSG_NORMAL,
-                                "   Primary core: Sciclient_pmSetModuleState...FAILED \n");
-                testResult = -1;
+                status =  Sciclient_pmSetModuleState(PBIST_TestHandleArray[instanceId].tisciDeviceId,
+                                                     TISCI_MSG_VALUE_DEVICE_SW_STATE_AUTO_OFF,
+                                                     TISCI_MSG_FLAG_AOP,
+                                                     SCICLIENT_SERVICE_WAIT_FOREVER);
+                if (status != CSL_PASS)
+                {
+                    UART_printf("   Primary core: Sciclient_pmSetModuleState...FAILED \n");
+                    testResult = -1;
+                }
             }
         }
-    }
 
-    /**--- Step 4k: Power off Secondary core */
-    if ((testResult == 0) && (PBIST_TestHandleArray[instanceId].procRstNeeded))
-    {
-        if ((PBIST_TestHandleArray[instanceId].secondaryCoreNeeded)
-            && (PBIST_TestHandleArray[instanceId].tisciSecDeviceId != 0u))
+        /**--- Step 4k: Power off Secondary core */
+        if ((testResult == 0) && (PBIST_TestHandleArray[instanceId].procRstNeeded))
         {
-            /* Set Software Reset Disable State for Secondary core */
+            if ((PBIST_TestHandleArray[instanceId].secondaryCoreNeeded)
+                && (PBIST_TestHandleArray[instanceId].tisciSecDeviceId != 0u))
+            {
+                /* Set Software Reset Disable State for Secondary core */
 #ifdef DEBUG
-            AppUtils_Printf(MSG_NORMAL,
-                            "  %s: Secondary Core Put in Software Reset Disable \n",
+                UART_printf("  %s: Secondary Core Put in Software Reset Disable \n",
                             PBIST_TestHandleArray[instanceId].secCoreName);
 #endif
-            status =  Sciclient_pmSetModuleState(PBIST_TestHandleArray[instanceId].tisciSecDeviceId,
-                                                 TISCI_MSG_VALUE_DEVICE_SW_STATE_AUTO_OFF,
-                                                 TISCI_MSG_FLAG_AOP,
-                                                 SCICLIENT_SERVICE_WAIT_FOREVER);
-            if (status != CSL_PASS)
-            {
-                AppUtils_Printf(MSG_NORMAL,
-                                "   Secondary core Sciclient_pmSetModuleState...FAILED \n");
-                testResult = -1;
+                status =  Sciclient_pmSetModuleState(PBIST_TestHandleArray[instanceId].tisciSecDeviceId,
+                                                     TISCI_MSG_VALUE_DEVICE_SW_STATE_AUTO_OFF,
+                                                     TISCI_MSG_FLAG_AOP,
+                                                     SCICLIENT_SERVICE_WAIT_FOREVER);
+                if (status != CSL_PASS)
+                {
+                    UART_printf("   Secondary core Sciclient_pmSetModuleState...FAILED \n");
+                    testResult = -1;
+                }
             }
         }
-    }
-
-    /**--- Step 4l: Disable RAT translation */
-    if ((testResult == 0) && (PBIST_TestHandleArray[instanceId].PBISTRegsHiAddress != 0u))
-    {
-        /* Disable RAT translation */
-        result = CSL_ratDisableRegionTranslation((CSL_ratRegs *)CSL_MCU_ARMSS_RAT_CFG_BASE,
-                                                PBIST_RAT_REGION_INDEX);
-        if (result == false) {
-            AppUtils_Printf(MSG_NORMAL, "   CSL_ratDisableRegionTranslation...FAILED \n");
-            testResult = -1;
-        }
-    }
 
-    /**--- Step 4m: Release Primary core */
-    if ((testResult == 0) && (PBIST_TestHandleArray[instanceId].tisciProcId != 0u)
-            && (PBIST_TestHandleArray[instanceId].procRstNeeded))
-    {
-        /* release processor Primary core */
+        /**--- Step 4m: Release Primary core */
+        if ((testResult == 0) && (PBIST_TestHandleArray[instanceId].tisciProcId != 0u)
+                && (PBIST_TestHandleArray[instanceId].procRstNeeded))
+        {
+            /* release processor Primary core */
 #ifdef DEBUG
-        AppUtils_Printf(MSG_NORMAL,
-                        "  Primary core: Releasing %s \n",
+            UART_printf("  Primary core: Releasing %s \n",
                         PBIST_TestHandleArray[instanceId].coreName);
 #endif
 
-        status = Sciclient_procBootReleaseProcessor(PBIST_TestHandleArray[instanceId].tisciProcId,
-                                                    TISCI_MSG_FLAG_AOP,
-                                                    SCICLIENT_SERVICE_WAIT_FOREVER);
-        if (status != CSL_PASS)
-        {
-            AppUtils_Printf(MSG_NORMAL,
-                            "   Primary core: Sciclient_procBootReleaseProcessor, ProcId 0x%x...FAILED \n",
+            status = Sciclient_procBootReleaseProcessor(PBIST_TestHandleArray[instanceId].tisciProcId,
+                                                        TISCI_MSG_FLAG_AOP,
+                                                        SCICLIENT_SERVICE_WAIT_FOREVER);
+            if (status != CSL_PASS)
+            {
+                UART_printf("   Primary core: Sciclient_procBootReleaseProcessor, ProcId 0x%x...FAILED \n",
                             PBIST_TestHandleArray[instanceId].tisciProcId);
-            testResult = -1;
-        }
-    }    
+                testResult = -1;
+            }
+        }    
 
-    /**--- Step 4n: Release Secondary core */
-    if (testResult == 0)
-    {
-        if ((PBIST_TestHandleArray[instanceId].secondaryCoreNeeded)
-            && (PBIST_TestHandleArray[instanceId].tisciSecProcId != 0u)
-            && (PBIST_TestHandleArray[instanceId].procRstNeeded))
+        /**--- Step 4n: Release Secondary core */
+        if (testResult == 0)
         {
-            /* release processor Secondary core */
+            if ((PBIST_TestHandleArray[instanceId].secondaryCoreNeeded)
+                && (PBIST_TestHandleArray[instanceId].tisciSecProcId != 0u)
+                && (PBIST_TestHandleArray[instanceId].procRstNeeded))
+            {
+                /* release processor Secondary core */
 #ifdef DEBUG
-            AppUtils_Printf(MSG_NORMAL,
-                            "  Secondary core: Releasing %s \n",
+                UART_printf("  Secondary core: Releasing %s \n",
                             PBIST_TestHandleArray[instanceId].secCoreName);
 #endif
-            status = Sciclient_procBootReleaseProcessor(PBIST_TestHandleArray[instanceId].tisciSecProcId,
-                                                        TISCI_MSG_FLAG_AOP,
-                                                        SCICLIENT_SERVICE_WAIT_FOREVER);
-            if (status != CSL_PASS)
-            {
-                AppUtils_Printf(MSG_NORMAL,
-                                "   Secondary core: Sciclient_procBootReleaseProcessor, ProcId 0x%x...FAILED \n",
+                status = Sciclient_procBootReleaseProcessor(PBIST_TestHandleArray[instanceId].tisciSecProcId,
+                                                            TISCI_MSG_FLAG_AOP,
+                                                            SCICLIENT_SERVICE_WAIT_FOREVER);
+                if (status != CSL_PASS)
+                {
+                    UART_printf("   Secondary core: Sciclient_procBootReleaseProcessor, ProcId 0x%x...FAILED \n",
                                 PBIST_TestHandleArray[instanceId].tisciSecProcId);
-                testResult = -1;
+                    testResult = -1;
+                }
             }
         }
-    }
 
 #if defined(PROFILE_PBIST_TIMING)
-    /* Record end time */
-    endTime = TimerP_getTimeInUsecs();
-
-    prepTime = testStartTime - startTime;
-    diffTime = testEndTime - testStartTime;
-    restoreTime = endTime - testEndTime;
-    AppUtils_Printf(MSG_NORMAL,
-                    "  Delta Cores prep time in micro secs %d \n",
+        /* Record end time */
+        endTime = TimerP_getTimeInUsecs();
+
+        prepTime = testStartTime - startTime;
+        diffTime = testEndTime - testStartTime;
+        restoreTime = endTime - testEndTime;
+        UART_printf("  Delta Cores prep time in micro secs %d \n",
                     (uint32_t)prepTime);
-    AppUtils_Printf(MSG_NORMAL,
-                    "  Delta PBIST execution time in micro secs %d \n",
+         UART_printf("  Delta PBIST execution time in micro secs %d \n",
                     (uint32_t)diffTime);
-    AppUtils_Printf(MSG_NORMAL,
-                    "  Delta Cores restore time in micro secs %d \n",
+        UART_printf("  Delta Cores restore time in micro secs %d \n",
                     (uint32_t)restoreTime);
-    AppUtils_Printf(MSG_NORMAL,
-                    " PBIST complete %s, test index %d\n",
+        UART_printf(" PBIST complete %s, test index %d\n",
                     PBIST_TestHandleArray[instanceId].testName,
                     instanceId);
-#if defined(DEBUG)
-    if (PBIST_TestHandleArray[instanceId].numPostPbistToCheck > 0)
-    {
-        switch(postStatus)
-        {
-            case PBIST_POST_COMPLETED_FAILURE:
-                UART_printf("\n HW POST: PBIST test failed\n");
-                break;
-
-            case PBIST_POST_ATTEMPTED_TIMEOUT:
-                UART_printf("\n HW POST: PBIST was attempted but timed out\n");
-                break;
-
-            case PBIST_POST_NOT_RUN:
-                UART_printf("\n HW POST: PBIST was not performed on this device\n");
-                break;
-
-            case PBIST_POST_COMPLETED_SUCCESS:
-            default:
-                UART_printf("\n HW POST: PBIST ran and succeeded\n");
-                break;
-        }
-    }
-#endif
 #endif
-
-    return (testResult);
-}
-
-/* HW POST-related functions */
-static int32_t PBIST_isPostPbistTimeout(uint32_t postStatMmrRegVal, Bool *pIsTimedOut)
-{
-    int32_t status = CSL_PASS;
-
-    if (pIsTimedOut == NULL)
-    {
-        status = CSL_EBADARGS;
     }
-    else
-    {
-        *pIsTimedOut = ((postStatMmrRegVal >>
-                         CSL_WKUP_CTRL_MMR_CFG0_WKUP_POST_STAT_POST_MCU_PBIST_TIMEOUT_SHIFT) &
-                         0x1u) ? CSL_TRUE : CSL_FALSE;
-    }
-    return status;
-}
-
-static int32_t PBIST_isPostPbistDone(uint32_t postStatMmrRegVal, Bool *pIsDone)
-{
-    int32_t status = CSL_PASS;
-
-    if (pIsDone == NULL)
-    {
-        status = CSL_EBADARGS;
-    }
-    else
-    {
-        *pIsDone = ((postStatMmrRegVal >>
-                    CSL_WKUP_CTRL_MMR_CFG0_WKUP_POST_STAT_POST_MCU_PBIST_DONE_SHIFT) &
-                    0x1u) ? CSL_TRUE : CSL_FALSE;
-    }
-    return status;
-}
 
-static int32_t PBIST_postCheckResult(uint32_t postStatMmrRegVal, Bool *pResult)
-{
-    int32_t cslResult= CSL_PASS;
-
-    if(pResult == NULL)
-    {
-        cslResult = CSL_EFAIL;
-    }
-    else
-    {
-        if ((postStatMmrRegVal &
-            CSL_WKUP_CTRL_MMR_CFG0_WKUP_POST_STAT_POST_MCU_PBIST_FAIL_MASK) ==
-            ((uint32_t)0x00000000u))
-        {
-            *pResult = CSL_TRUE;
-        }
-        else
-        {
-            *pResult = CSL_FALSE;
-        }
-    }
-
-    return cslResult;
+    return (testResult);
 }
-
-
diff --git a/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/pbist_utils.h b/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/pbist_utils.h
old mode 100755
new mode 100644
index b30a8f78728d1c42670ddd7be86dbad401608d8f..7a805f8369f2c0b910faab7260aed267e179cdb6
--- a/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/pbist_utils.h
+++ b/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/pbist_utils.h
@@ -67,7 +67,10 @@
 /* ========================================================================== */
 /*                             Include Files                                  */
 /* ========================================================================== */
-/* None */
+
+#include <stdint.h>
+#include <string.h>
+#include <sdl_types.h>
 
 /* ========================================================================== */
 /*                           Macros & Typedefs                                */
@@ -79,7 +82,8 @@
 /* ========================================================================== */
 /*                          Function Declarations                             */
 /* ========================================================================== */
+int32_t PBIST_clecConfig(uint32_t instance);
 int32_t PBIST_commonInit(void);
-int32_t PBIST_runTest(uint32_t instanceId);
+int32_t PBIST_runTest(uint32_t instanceId, bool runNegTest);
 
 #endif /* PBIST_UTILS_H_ */
diff --git a/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/power_seq.c b/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/power_seq.c
old mode 100755
new mode 100644
index ffe8d2b316c7876f2b96dba90f44b2119f6a8533..78846038d7499268dcc11ffe03eba45052257b40
--- a/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/power_seq.c
+++ b/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/power_seq.c
@@ -71,12 +71,15 @@
 /*                             Include Files                                  */
 /* ========================================================================== */
 
-#include "Std_Types.h"
-#include <ti/csl/csl_types.h>
-#include "boot_cfg.h"
+#include <stdint.h>
+#include <sdl_types.h>
+#include <ti/drv/uart/UART_stdio.h>
+#include <ti/drv/sciclient/sciclient.h>
+
+#ifdef SOC_J721E
 #include "armv8_power_utils.h"
-#include "app_utils.h"
 #include "power_seq.h"
+#endif
 
 /* ========================================================================== */
 /*                           Macros & Typedefs                                */
@@ -122,16 +125,17 @@
  * needed prior to powering up, outside of device/power domain controls */
 int32_t customPrepareForPowerUpSequence(uint8_t processorId)
 {
-    int32_t status = CSL_EFAIL;
+    int32_t status = SDL_EFAIL;
 
     switch(processorId)
     {
+#ifdef SOC_J721E
         case (SCICLIENT_PROC_ID_A72SS0_CORE0):
             status = armv8_powerPrepareForPowerUpSequence(processorId);
             break;
+#endif
         default:
-            AppUtils_Printf(MSG_NORMAL,
-                            "customPrepareForPowerUpSequence - Invalid ProcId %d\n",
+            UART_printf("customPrepareForPowerUpSequence - Invalid ProcId %d\n",
                             processorId);
             break;
     }
@@ -143,20 +147,20 @@ int32_t customPrepareForPowerUpSequence(uint8_t processorId)
  * needed to be properly powered down, outside of device/power domain controls */
 int32_t customPowerDownSequence(uint8_t processorId)
 {
-    int32_t status = CSL_EFAIL;
+    int32_t status = SDL_EFAIL;
 
     switch(processorId)
     {
+#ifdef SOC_J721E
         case (SCICLIENT_PROC_ID_A72SS0_CORE0):
             status = armv8_powerDownSequence(processorId);
             break;
+#endif
         default:
-            AppUtils_Printf(MSG_NORMAL,
-                            "customPowerDownSequence - Invalid ProcId %d\n",
+            UART_printf("customPowerDownSequence - Invalid ProcId %d\n",
                             processorId);
             break;
     }
 
     return (status);
 }
-
diff --git a/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/soc/j7200/armv8_power_utils.c b/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/soc/j7200/armv8_power_utils.c
index 97b159e0289218ad91c38f807233e1a9bc34f3d6..c4fc39c52517a4e41785f231a289218675bc501e 100644
--- a/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/soc/j7200/armv8_power_utils.c
+++ b/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/soc/j7200/armv8_power_utils.c
@@ -74,7 +74,7 @@
 
 #include <ti/drv/sciclient/sciclient.h>
 
-#include "app_utils.h"
+//#include "app_utils.h"
 
 /* ========================================================================== */
 /*                           Macros & Typedefs                                */
diff --git a/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/soc/j721e/armv8_power_utils.c b/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/soc/j721e/armv8_power_utils.c
index 97b159e0289218ad91c38f807233e1a9bc34f3d6..63afe311235088dfd750b57c883188bbd153c2df 100644
--- a/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/soc/j721e/armv8_power_utils.c
+++ b/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/soc/j721e/armv8_power_utils.c
@@ -69,13 +69,12 @@
 /* ========================================================================== */
 /*                             Include Files                                  */
 /* ========================================================================== */
-#include "Std_Types.h"
-#include <ti/csl/csl_types.h>
+#include <stdint.h>
+#include <sdl_types.h>
+#include <ti/drv/uart/UART_stdio.h>
 
 #include <ti/drv/sciclient/sciclient.h>
 
-#include "app_utils.h"
-
 /* ========================================================================== */
 /*                           Macros & Typedefs                                */
 /* ========================================================================== */
@@ -105,85 +104,77 @@
  * 5. Assert ACINACTM (to idle the AXI master interface)
  * 6. Wait for STANDBY_WFI_L2 (STANDBYWFIL2) bit to be asserted
  */
-// TODO - OPTIMIZE TIMING
 int32_t armv8_powerDownSequence(uint8_t processorId)
 {
-    int32_t status = CSL_EFAIL;
+    int32_t status = SDL_EFAIL;
 
 #ifdef DEBUG
-    AppUtils_Printf(APP_UTILS_PRINT_MSG_NORMAL,
-                    "  Running custom powerdown sequence for ARMv8 core\n");
+    UART_printf("  Running custom powerdown sequence for ARMv8 core\n");
 #endif
 
     /* Assert AINACTS first (to idle the ACP) - Set Bit 1 to 1 for asserting AINACTS */
     status = Sciclient_procBootSetSequenceCtrl(processorId, 0x00000002, 0x0, 0,
                                                SCICLIENT_SERVICE_WAIT_FOREVER);
-    if (status != CSL_PASS)
+    if (status != SDL_PASS)
     {
-        AppUtils_Printf(APP_UTILS_PRINT_MSG_NORMAL,
-                        "Sciclient_procBootSetSequenceCtrl...FAILED for AINACTS assert\n");
+        UART_printf("Sciclient_procBootSetSequenceCtrl...FAILED for AINACTS assert\n");
     }
 
     /* Assert L2FLUSHREQ - Set Bit 8 to 1 for asserting L2FLUSHREQ */
-    if (status == CSL_PASS) {
+    if (status == SDL_PASS) {
         status = Sciclient_procBootSetSequenceCtrl(processorId, 0x00000100, 0x0, 0,
                                                    SCICLIENT_SERVICE_WAIT_FOREVER);
-        if (status != CSL_PASS)
+        if (status != SDL_PASS)
         {
-            AppUtils_Printf(APP_UTILS_PRINT_MSG_NORMAL,
-                            "Sciclient_procBootSetSequenceCtrl...FAILED for " \
-                            "L2FLUSHREQ assert/set\n");
+            UART_printf("Sciclient_procBootSetSequenceCtrl...FAILED for " \
+                        "L2FLUSHREQ assert/set\n");
         }
     }
     /* Check L2FLUSH_DONE has been asserted - Ensure that Bit 4 has been set to 1 */
-    if (status == CSL_PASS) {
+    if (status == SDL_PASS) {
 
         status = Sciclient_procBootWaitProcessorState(processorId, 1, 1,
                                                       0x00000010, 0x0,
                                                       0x0, 0x0, 0,
                                                       SCICLIENT_SERVICE_WAIT_FOREVER);
-        if (status != CSL_PASS)
+        if (status != SDL_PASS)
         {
-            AppUtils_Printf(APP_UTILS_PRINT_MSG_NORMAL,
-                            "Sciclient_procBootWaitProcessorState...FAILED for " \
-                            "L2FLUSH_DONE set\n");
+            UART_printf("Sciclient_procBootWaitProcessorState...FAILED for " \
+                        "L2FLUSH_DONE set\n");
         }
     }
     /* Deassert L2FLUSHREQ - Clear Bit 8 to 0 for deasserting L2FLUSHREQ */
-    if (status == CSL_PASS) {
+    if (status == SDL_PASS) {
         status = Sciclient_procBootSetSequenceCtrl(processorId, 0x0, 0x00000100, 0,
                                                    SCICLIENT_SERVICE_WAIT_FOREVER);
-        if (status != CSL_PASS)
+        if (status != SDL_PASS)
         {
-            AppUtils_Printf(APP_UTILS_PRINT_MSG_NORMAL,
-                            "Sciclient_procBootSetSequenceCtrl...FAILED for " \
-                            "L2FLUSHREQ deassert/clear\n");
+            UART_printf("Sciclient_procBootSetSequenceCtrl...FAILED for " \
+                        "L2FLUSHREQ deassert/clear\n");
         }
     }
 
     /* Check L2FLUSH_DONE has been deasserted - Ensure that Bit 4 has been cleared to 0 */
-    if (status == CSL_PASS) {
+    if (status == SDL_PASS) {
 
         status = Sciclient_procBootWaitProcessorState(processorId, 1, 1,
                                                       0x0, 0x0,
                                                       0x00000010, 0x0, 0,
                                                       SCICLIENT_SERVICE_WAIT_FOREVER);
-        if (status != CSL_PASS)
+        if (status != SDL_PASS)
         {
-            AppUtils_Printf(APP_UTILS_PRINT_MSG_NORMAL,
-                            "Sciclient_procBootWaitProcessorState...FAILED for " \
-                            "L2FLUSH_DONE clear \n");
+            UART_printf("Sciclient_procBootWaitProcessorState...FAILED for " \
+                        "L2FLUSH_DONE clear \n");
         }
     }
     /* Assert ACINACTM (to idle the AXI master interface) - Set Bit 0 to 1 for asserting ACINACTM */
-    if (status == CSL_PASS) {
+    if (status == SDL_PASS) {
         status = Sciclient_procBootSetSequenceCtrl(processorId, 0x00000001, 0x0, 0,
                                                    SCICLIENT_SERVICE_WAIT_FOREVER);
-        if (status != CSL_PASS)
+        if (status != SDL_PASS)
         {
-            AppUtils_Printf(APP_UTILS_PRINT_MSG_NORMAL,
-                            "Sciclient_procBootSetSequenceCtrl...FAILED for " \
-                            "ACINACTM assert/set \n");
+            UART_printf("Sciclient_procBootSetSequenceCtrl...FAILED for " \
+                        "ACINACTM assert/set \n");
         }
     }
 
@@ -201,43 +192,39 @@ int32_t armv8_powerDownSequence(uint8_t processorId)
  */
 int32_t armv8_powerPrepareForPowerUpSequence(uint8_t processorId)
 {
-    int32_t status = CSL_EFAIL;
+    int32_t status = SDL_EFAIL;
 
 #ifdef DEBUG
-    AppUtils_Printf(APP_UTILS_PRINT_MSG_NORMAL,
-                    "  Running custom power restore sequence for ARMv8 core\n");
+    UART_printf("  Running custom power restore sequence for ARMv8 core\n");
 #endif
 
     /* Deassert L2FLUSHREQ - Clear Bit 8 to 0 for deasserting L2FLUSHREQ */
-    if (status == CSL_PASS) {
+    if (status == SDL_PASS) {
         status = Sciclient_procBootSetSequenceCtrl(processorId, 0x0, 0x00000100, 0,
                                                    SCICLIENT_SERVICE_WAIT_FOREVER);
-        if (status != CSL_PASS)
+        if (status != SDL_PASS)
         {
-            AppUtils_Printf(APP_UTILS_PRINT_MSG_NORMAL,
-                            "Sciclient_procBootSetSequenceCtrl...FAILED for " \
-                            "L2FLUSHREQ deassert/clear\n");
+            UART_printf("Sciclient_procBootSetSequenceCtrl...FAILED for " \
+                        "L2FLUSHREQ deassert/clear\n");
         }
     }
     /* Deassert AINACTS  - Clear Bit 1 to 0 for deasserting AINACTS */
     status = Sciclient_procBootSetSequenceCtrl(processorId, 0x0, 0x00000002, 0,
                                                SCICLIENT_SERVICE_WAIT_FOREVER);
-    if (status != CSL_PASS)
+    if (status != SDL_PASS)
     {
-        AppUtils_Printf(APP_UTILS_PRINT_MSG_NORMAL,
-                        "Sciclient_procBootSetSequenceCtrl...FAILED for AINACTS " \
-                        "deassert\n");
+        UART_printf("Sciclient_procBootSetSequenceCtrl...FAILED for AINACTS " \
+                    "deassert\n");
     }
 
     /* Deassert ACINACTM - Clear Bit 0 to 0 for deasserting ACINACTM */
-    if (status == CSL_PASS) {
+    if (status == SDL_PASS) {
         status = Sciclient_procBootSetSequenceCtrl(processorId, 0x0, 0x00000001, 0,
                                                    SCICLIENT_SERVICE_WAIT_FOREVER);
-        if (status != CSL_PASS)
+        if (status != SDL_PASS)
         {
-            AppUtils_Printf(APP_UTILS_PRINT_MSG_NORMAL,
-                            "Sciclient_procBootSetSequenceCtrl...FAILED for " \
-                            "ACINACTM deassert/clear \n");
+            UART_printf("Sciclient_procBootSetSequenceCtrl...FAILED for " \
+                        "ACINACTM deassert/clear \n");
         }
     }
 
diff --git a/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/soc/j721e/bist_core_defs.c b/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/soc/j721e/bist_core_defs.c
index e9363ec2dffb096c9104666f3c74d31c6d25b724..9f8fc8dcae133b0063e693620b81ee6032b8e400 100644
--- a/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/soc/j721e/bist_core_defs.c
+++ b/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/soc/j721e/bist_core_defs.c
@@ -70,7 +70,6 @@
 /* ========================================================================== */
 #include <stdint.h>
 #include "bist_core_defs.h"
-#include "boot_stage_defs.h"
 
 /* ========================================================================== */
 /*                           Macros & Typedefs                                */
@@ -106,14 +105,23 @@
  * boot sequence for J721E SOC */
 int pbist_pre_boot_stage[] =
 {
+    PBIST_HWPOST_MCU_INDEX,    /* Read results of HW POST MCU PBIST */
     PBIST_INSTANCE_MAIN_INFRA, /* Main Infra - Must be in pre-boot stage */
-    PBIST_INSTANCE_MSMC        /* MSMC RAM - Must be in pre-boot stage */
+//    PBIST_INSTANCE_MSMC        /* MSMC RAM - Must be in pre-boot stage */
 };
 
 int pbist_pre_boot_stage_status[] =
 {
-    0,  /* MCU */
-    0   /* NAVSS */
+    0,  /* HW Post status */
+    0,  /* Main Infra */
+    0   /* MSMC */
+};
+
+int pbist_pre_boot_stage_neg_status[] =
+{
+    0,  /* HW Post status */
+    0,  /* Main Infra */
+    0   /* MSMC */
 };
 
 /* Defines LBIST's needed for all cores before the first stage of the Main Domain
@@ -172,8 +180,6 @@ int lbist_second_boot_stage[] =
 int pbist_third_boot_stage[] =
 {
     PBIST_INSTANCE_A72,      /* A72 */
-    PBIST_INSTANCE_HC,       /* HC - MLB PBIST */
-    PBIST_INSTANCE_ENCODER   /* Encoder */
 };
 
 
@@ -225,6 +231,9 @@ const char *pbistName(uint32_t pbistID)
 
     switch(pbistID)
     {
+        case (PBIST_HWPOST_MCU_INDEX):
+            name="PBIST_HWPOST_MCU_INDEX";
+            break;
         case (PBIST_INSTANCE_MCU):
             name="PBIST_INSTANCE_MCU";
             break;
@@ -267,6 +276,9 @@ const char *pbistName(uint32_t pbistID)
         case (PBIST_INSTANCE_ENCODER):
             name="PBIST_INSTANCE_ENCODER";
             break;
+	case (PBIST_INSTANCE_DECODER):
+            name="PBIST_INSTANCE_DECODER";
+            break;
         default:
             name="INVALID ID";
             break;
diff --git a/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/soc/j721e/bist_core_defs.h b/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/soc/j721e/bist_core_defs.h
index ca5c5edaa7cf822e289168438de9818a8bbabdb5..6f547c5222c1d287175ac5b9ec99ddffbe827807 100644
--- a/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/soc/j721e/bist_core_defs.h
+++ b/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/soc/j721e/bist_core_defs.h
@@ -42,29 +42,35 @@ extern "C"
 /* ========================================================================== */
 /*                             Include Files                                  */
 /* ========================================================================== */
-#include "boot_stage_defs.h"
+
+/* None */
 
 /* ========================================================================== */
 /*                           Macros & Typedefs                                */
 /* ========================================================================== */
-#define PBIST_INSTANCE_MCU                (0U) // Not supported in BootApp
-#define PBIST_INSTANCE_MAIN_PULSAR_0      (1U)
-#define PBIST_INSTANCE_MAIN_PULSAR_1      (2U)
-#define PBIST_INSTANCE_C7X                (3U)
-#define PBIST_INSTANCE_A72                (4U)
-#define PBIST_INSTANCE_VPAC               (5U)
-#define PBIST_INSTANCE_DMPAC              (6U)
-#define PBIST_INSTANCE_MAIN_NAVSS         (7U)
-#define PBIST_INSTANCE_HC                 (8U)
-#define PBIST_INSTANCE_C66X_0             (9U)
-#define PBIST_INSTANCE_C66X_1             (10U)
-#define PBIST_INSTANCE_MAIN_INFRA         (11U)
-#define PBIST_INSTANCE_MSMC               (12U)
-#define PBIST_INSTANCE_ENCODER            (13U) // Not supported in BootApp
-#define PBIST_INSTANCE_DECODER            (14U) // Not supported in BootApp
-#define PBIST_INSTANCE_GPU                (15U) // Not supported in BootApp
-#define PBIST_INSTANCE_DSS_EDP_DSI        (16U) // Not supported in BootApp
-#define PBIST_INSTANCE_MCU_PULSAR         (17U) // Not supported in BootApp
+/* Defines total number of Boot Stages for the Main Domain
+ * multi-stage boot sequence for J721E SOC */
+#define NUM_BOOT_STAGES     3
+
+#define PBIST_HWPOST_MCU_INDEX            (0U)
+#define PBIST_INSTANCE_MCU                (1U) // Not supported in example 
+#define PBIST_INSTANCE_MAIN_PULSAR_0      (2U)
+#define PBIST_INSTANCE_MAIN_PULSAR_1      (3U)
+#define PBIST_INSTANCE_C7X                (4U)
+#define PBIST_INSTANCE_A72                (5U)
+#define PBIST_INSTANCE_VPAC               (6U)
+#define PBIST_INSTANCE_DMPAC              (7U)
+#define PBIST_INSTANCE_MAIN_NAVSS         (8U)
+#define PBIST_INSTANCE_HC                 (9U)
+#define PBIST_INSTANCE_C66X_0             (10U)
+#define PBIST_INSTANCE_C66X_1             (11U)
+#define PBIST_INSTANCE_MAIN_INFRA         (12U)
+#define PBIST_INSTANCE_MSMC               (13U)
+#define PBIST_INSTANCE_ENCODER            (14U)
+#define PBIST_INSTANCE_DECODER            (15U)
+#define PBIST_INSTANCE_GPU                (16U) // Not supported in BootApp
+#define PBIST_INSTANCE_DSS_EDP_DSI        (17U) // Not supported in BootApp
+#define PBIST_INSTANCE_MCU_PULSAR         (18U) // Not supported in BootApp
 
 #define PBIST_MAX_INSTANCE                (PBIST_INSTANCE_MCU_PULSAR+1U)
 
@@ -101,6 +107,9 @@ extern int pbist_pre_boot_stage[];
 /* Structure to save the status of the PBIST tests run as part of the pre-boot stage */
 extern int pbist_pre_boot_stage_status[];
 
+/* Structure to save the status of the PBIST negative tests run as part of the pre-boot stage */
+extern int pbist_pre_boot_stage_neg_status[];
+
 /* Number of LBIST tests run in the pre-boot stage, i.e. before any Main Domain
  * cores are booted */
 extern int lbist_pre_boot_stage[];
diff --git a/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/soc/j721e/lbist_defs.c b/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/soc/j721e/lbist_defs.c
index b4ceb825bfd809a84d07d33d922267e371207fb0..4322ba79dafa157cf1e39ba3ece7ca6b46bf48d9 100755
--- a/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/soc/j721e/lbist_defs.c
+++ b/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/soc/j721e/lbist_defs.c
@@ -69,10 +69,12 @@
 /* ========================================================================== */
 /*                             Include Files                                  */
 /* ========================================================================== */
-#include <stdbool.h>
-#include <ti/csl/csl_types.h>
-#include <ti/csl/csl_lbist.h>
-#include <ti/csl/soc.h>
+#include <stdint.h>
+#include <string.h>
+#include <sdl_types.h>
+#include <soc.h>
+#include <src/sdl/sdl_lbist.h>
+#include <ti/drv/uart/UART_stdio.h>
 #include <ti/drv/sciclient/sciclient.h>
 
 #include "lbist_utils.h"
@@ -82,44 +84,17 @@
 /*                           Macros & Typedefs                                */
 /* ========================================================================== */
 
-/* LBIST clocks should target 200MHz for each core */
-
-/* Lbist Parameters */
-#define LBIST_DC_DEF                   (0x3u)
-#define LBIST_DIVIDE_RATIO             (0x02u)
-#define LBIST_STATIC_PC_DEF            (0x3fffu)
-#define LBIST_RESET_PC_DEF             (0x0fu)
-#define LBIST_SET_PC_DEF               (0x00u)
-#define LBIST_SCAN_PC_DEF              (0x08u)
-#define LBIST_PRPG_DEF                 (0x1fffffffffffffu)
-
-/*
-* LBIST setup parameters for each core
-*/
-#define LBIST_MAIN_R5_1_STATIC_PC_DEF  LBIST_STATIC_PC_DEF
-#define LBIST_MAIN_R5_2_STATIC_PC_DEF  LBIST_STATIC_PC_DEF
-#define LBIST_C7X_STATIC_PC_DEF        (2816)
-#define LBIST_A72_STATIC_PC_DEF        (12288)
-#define LBIST_DMPAC_STATIC_PC_DEF      (6272)
-#define LBIST_VPAC_STATIC_PC_DEF       (5056)
-
-/*
-* LBIST expected MISR's (using parameters above)
-*/
-#define MAIN_R5_MISR_EXP_VAL           (0xad7f4501)
-#define A72_MISR_EXP_VAL               (0xdd5cd3b3)
-#define C7X_MISR_EXP_VAL               (0xd67bfff1)
-#define VPAC_MISR_EXP_VAL              (0x18b373bf)
-#define DMPAC_MISR_EXP_VAL             (0xf22e52b5)
-
-#define LBIST_MAX_TIMEOUT_VALUE        10000000u
-
 #define A72_NUM_AUX_DEVICES            1
 
+/* HW POST run status definitions */
+#define LBIST_POST_COMPLETED_SUCCESS_STR      "SDL_LBIST_POST_COMPLETED_SUCCESS"
+#define LBIST_POST_COMPLETED_FAILURE_STR      "SDL_LBIST_POST_COMPLETED_FAILURE"
+#define LBIST_POST_ATTEMPTED_TIMEOUT_STR      "SDL_LBIST_POST_TIMEOUT"
+#define LBIST_POST_NOT_RUN_STR                "SDL_LBIST_POST_NOT_RUN"
+
 /* ========================================================================== */
 /*                 Internal Function Declarations                             */
 /* ========================================================================== */
-void LBIST_eventHandler(uint32_t coreIndex);
 
 /* ========================================================================== */
 /*                         Structure Declarations                             */
@@ -130,6 +105,7 @@ void LBIST_eventHandler(uint32_t coreIndex);
 /* ========================================================================== */
 /*                          Function Declarations                             */
 /* ========================================================================== */
+char * LBIST_getPostStatusString(SDL_LBIST_postStatus postStatus);
 
 /* ========================================================================== */
 /*                            Global Variables                                */
@@ -146,193 +122,101 @@ LBIST_TestHandle_t LBIST_TestHandleArray[LBIST_MAX_CORE_INDEX+1] =
  /* HW POST - DMSC - Checks MISR results only */
  {
   .coreName               = "HWPOST - DMSC",
-  .pLBISTRegs             = (CSL_lbistRegs *)(CSL_DMSC_LBIST_BASE),
-  .pLBISTSig              = (uint32_t *)(CSL_DMSC_LBIST_SIG),
-  .doneFlag               = false,                    /* Initialize done flag */
   .numAuxDevices          = 0u,                       /* No Aux devices */
   .hwPostCoreCheck        = true,
   .hwPostCoreNum          = LBIST_POST_CORE_DMSC,
-  .handler                = NULL,                     /* No LBIST event handler */
  },
  /* HW POST - MCU - Checks MISR results only */
  {
   .coreName               = "HWPOST - MCU",
-  .pLBISTRegs             = (CSL_lbistRegs *)(CSL_MCU_LBIST_BASE),
-  .pLBISTSig              = (uint32_t *)(CSL_MCU_LBIST_SIG),
-  .doneFlag               = false,                    /* Initialize done flag */
   .numAuxDevices          = 0u,                       /* No Aux devices */
   .hwPostCoreCheck        = true,
   .hwPostCoreNum          = LBIST_POST_CORE_MCU,
-  .handler                = NULL,                     /* No LBIST event handler */
  },
  /* Main R5F 0 */
  {
   .coreName               = "Main R5F0-0",
+  .instance               = SDL_LBIST_INST_MAINR5F0,
   .secondaryCoreNeeded    = true,             /* Secondary core needed */
   .wfiCheckNeeded         = false,            /* wfi check needed */
   .secCoreName            = "Main R5F1-0",    /* Secondary core */
-  .pLBISTRegs             = (CSL_lbistRegs *)(CSL_MAIN_R5F0_LBIST_BASE),
-  .pLBISTSig              = (uint32_t *)(CSL_MAIN_R5F0_LBIST_SIG),
-  .expectedMISR           = MAIN_R5_MISR_EXP_VAL,           /* Expected signature for main R5 0*/
   .cpuStatusFlagMask      = TISCI_MSG_VAL_PROC_BOOT_STATUS_FLAG_R5_WFI, /* Expected boot status value for wfi */
-  .handler                = LBIST_eventHandler,             /* LBIST event handler */
-  .interruptNumber        = CSLR_MCU_R5FSS0_CORE0_INTR_GLUELOGIC_MAIN_PULSAR0_LBIST_GLUE_DFT_LBIST_BIST_DONE_0, /* BIST DONE interrupt number */
   .tisciProcId            = SCICLIENT_PROC_ID_R5FSS0_CORE0, /* Main R5F core 0 Proc Id */
   .tisciSecProcId         = SCICLIENT_PROC_ID_R5FSS0_CORE1, /* Main R5F core 1 Proc Id */
   .tisciDeviceId          = TISCI_DEV_R5FSS0_CORE0,         /* Main R5F core 0 Device Id */
   .tisciSecDeviceId       = TISCI_DEV_R5FSS0_CORE1,         /* Main R5F core 1 Device Id */
-  .doneFlag               = false,                          /* Initialize done flag */
   .numAuxDevices          = 0u,                       /* No Aux devices */
-  .LBISTConfig = {
-      .dc_def        = LBIST_DC_DEF,
-      .divide_ratio  = LBIST_DIVIDE_RATIO,
-      .static_pc_def = LBIST_STATIC_PC_DEF,
-      .set_pc_def    = LBIST_SET_PC_DEF,
-      .reset_pc_def  = LBIST_RESET_PC_DEF,
-      .scan_pc_def   = LBIST_SCAN_PC_DEF,
-      .prpg_def      = LBIST_PRPG_DEF,
-  },
  },
-  /* Main R5F 1 */
+ /* Main R5F 1 */
  {
   .coreName               = "Main R5F1-0",
+  .instance               = SDL_LBIST_INST_MAINR5F1,
   .secondaryCoreNeeded    = true,            /* Secondary core needed */
   .wfiCheckNeeded         = false,           /* wfi check needed */
   .secCoreName            = "Main R5F1-1",   /* Secondary core */
-  .pLBISTRegs             = (CSL_lbistRegs *)(CSL_MAIN_R5F1_LBIST_BASE),
-  .pLBISTSig              = (uint32_t *)(CSL_MAIN_R5F1_LBIST_SIG),
-  .expectedMISR           = MAIN_R5_MISR_EXP_VAL,           /* Expected signature Main R5 1*/
   .cpuStatusFlagMask      = TISCI_MSG_VAL_PROC_BOOT_STATUS_FLAG_R5_WFI, /* Expected boot status value for wfi */
-  .handler                = LBIST_eventHandler,             /* LBIST event handler */
-  .interruptNumber        = CSLR_MCU_R5FSS0_CORE0_INTR_GLUELOGIC_MAIN_PULSAR1_LBIST_GLUE_DFT_LBIST_BIST_DONE_0,/* BIST DONE interrupt number */
   .tisciProcId            = SCICLIENT_PROC_ID_R5FSS1_CORE0, /* Main R5F core 0 Proc Id */
   .tisciSecProcId         = SCICLIENT_PROC_ID_R5FSS1_CORE1, /* Main R5F core 1 Proc Id */
   .tisciDeviceId          = TISCI_DEV_R5FSS1_CORE0,         /* Main R5F core 0 Device id */
   .tisciSecDeviceId       = TISCI_DEV_R5FSS1_CORE1,         /* Main R5F core 1 Device id */
   .numAuxDevices          = 0u,                             /* No Aux devices */
-  .doneFlag               = false,                          /* Initialize done flag */
-  .LBISTConfig = {
-      .dc_def        = LBIST_DC_DEF,
-      .divide_ratio  = LBIST_DIVIDE_RATIO,
-      .static_pc_def = LBIST_STATIC_PC_DEF,
-      .set_pc_def    = LBIST_SET_PC_DEF,
-      .reset_pc_def  = LBIST_RESET_PC_DEF,
-      .scan_pc_def   = LBIST_SCAN_PC_DEF,
-      .prpg_def      = LBIST_PRPG_DEF,
-  },
  },
  /* C7x */
  {
   .coreName               = "C7x ",
+  .instance               = SDL_LBIST_INST_C7X,
   .secondaryCoreNeeded    = false,    /* Secondary core needed */
   .wfiCheckNeeded         = false,    /* wfi check needed */
   .secCoreName            = "None",   /* Secondary core */
-  .pLBISTRegs             = (CSL_lbistRegs *)(CSL_C7X_LBIST_BASE),
-  .pLBISTSig              = (uint32_t *)(CSL_C7X_LBIST_SIG),
-  .expectedMISR           = C7X_MISR_EXP_VAL,          /* Expected signature for C7x*/
   .cpuStatusFlagMask      = TISCI_MSG_VAL_PROC_BOOT_STATUS_FLAG_R5_WFI, /* Expected boot status value for wfi */
-  .handler                = LBIST_eventHandler,        /* LBIST event handler */
-  .interruptNumber        = CSLR_MCU_R5FSS0_CORE0_INTR_COMPUTE_CLUSTER0_C7X_4_DFT_LBIST_DFT_LBIST_BIST_DONE_0,/* BIST DONE interrupt number */
   .tisciProcId            = SCICLIENT_PROC_ID_C71SS0,  /* C7x Proc Id */
   .tisciSecProcId         = 0,
   .tisciDeviceId          = TISCI_DEV_C71SS0,          /* C7x Device Id */
   .tisciSecDeviceId       = 0,
   .numAuxDevices          = 0u,                        /* No Aux devices */
-  .doneFlag               = false,                     /* Initialize done flag */
-  .LBISTConfig = {
-      .dc_def        = LBIST_DC_DEF,
-      .divide_ratio  = LBIST_DIVIDE_RATIO,
-      .static_pc_def = LBIST_C7X_STATIC_PC_DEF,
-      .set_pc_def    = LBIST_SET_PC_DEF,
-      .reset_pc_def  = LBIST_RESET_PC_DEF,
-      .scan_pc_def   = LBIST_SCAN_PC_DEF,
-      .prpg_def      = LBIST_PRPG_DEF,
-  },
  },
  /* VPAC */
  {
   .coreName               = "VPAC",
+  .instance               = SDL_LBIST_INST_VPAC,
   .secondaryCoreNeeded    = false,           /* Secondary core needed */
   .wfiCheckNeeded         = false,           /* wfi check needed */
   .secCoreName            = "None",          /* Secondary core */
-  .pLBISTRegs             = (CSL_lbistRegs *)(CSL_VPAC_LBIST_BASE),
-  .pLBISTSig              = (uint32_t *)(CSL_VPAC_LBIST_SIG),
-  .expectedMISR           = VPAC_MISR_EXP_VAL,                          /* Expected signature for VPAC */
   .cpuStatusFlagMask      = TISCI_MSG_VAL_PROC_BOOT_STATUS_FLAG_R5_WFI, /* Expected boot status value for wfi */
-  .handler                = LBIST_eventHandler,                         /* LBIST event handler */
-  .interruptNumber        = CSLR_MCU_R5FSS0_CORE0_INTR_GLUELOGIC_VPAC_LBIST_GLUE_DFT_LBIST_BIST_DONE_0,/* BIST DONE interrupt number */
   .tisciProcId            = 0,                /* No proc id */
   .tisciSecProcId         = 0,                /* No Proc Id */
   .tisciDeviceId          = TISCI_DEV_VPAC0,  /* VPAC Device Id */
   .tisciSecDeviceId       = 0,
   .numAuxDevices          = 0u,               /* No Aux devices */
-  .doneFlag               = false,            /* Initialize done flag */
-  .LBISTConfig = {
-      .dc_def        = LBIST_DC_DEF,
-      .divide_ratio  = LBIST_DIVIDE_RATIO,
-      .static_pc_def = LBIST_VPAC_STATIC_PC_DEF,
-      .set_pc_def    = LBIST_SET_PC_DEF,
-      .reset_pc_def  = LBIST_RESET_PC_DEF,
-      .scan_pc_def   = LBIST_SCAN_PC_DEF,
-      .prpg_def      = LBIST_PRPG_DEF,
-  },
  },
  /* DMPAC */
  {
   .coreName               = "DMPAC",
+  .instance               = SDL_LBIST_INST_DMPAC,
   .secondaryCoreNeeded    = false,            /* Secondary core needed */
   .wfiCheckNeeded         = false,            /* wfi check needed */
   .secCoreName            = "None",           /* Secondary core */
-  .pLBISTRegs             = (CSL_lbistRegs *)(CSL_DMPAC_LBIST_BASE),
-  .pLBISTSig              = (uint32_t *)(CSL_DMPAC_LBIST_SIG),
-  .expectedMISR           = DMPAC_MISR_EXP_VAL,                         /* Expected signature for DMPAC */
   .cpuStatusFlagMask      = TISCI_MSG_VAL_PROC_BOOT_STATUS_FLAG_R5_WFI, /* Expected boot status value for wfi */
-  .handler                = LBIST_eventHandler,                         /* LBIST event handler */
-  .interruptNumber        = CSLR_MCU_R5FSS0_CORE0_INTR_GLUELOGIC_DMPAC_LBIST_GLUE_DFT_LBIST_BIST_DONE_0,/* BIST DONE interrupt number */
   .tisciProcId            = 0,                /* No proc id */
   .tisciSecProcId         = 0,                /* No Proc Id */
   .tisciDeviceId          = TISCI_DEV_DMPAC0, /* DMPAC Device Id */
   .tisciSecDeviceId       = 0,
   .numAuxDevices          = 0u,               /* No Aux devices */
-  .doneFlag               = false,            /* Initialize done flag */
-  .LBISTConfig = {
-      .dc_def        = LBIST_DC_DEF,
-      .divide_ratio  = LBIST_DIVIDE_RATIO,
-      .static_pc_def = LBIST_DMPAC_STATIC_PC_DEF,
-      .set_pc_def    = LBIST_SET_PC_DEF,
-      .reset_pc_def  = LBIST_RESET_PC_DEF,
-      .scan_pc_def   = LBIST_SCAN_PC_DEF,
-      .prpg_def      = LBIST_PRPG_DEF,
-  },
  },
  /* A72 */
  {
   .coreName               = "A72 core 0",
+  .instance               = SDL_LBIST_INST_A72,
   .secondaryCoreNeeded    = true,           /* Secondary core needed */
   .wfiCheckNeeded         = false,          /* wfi check needed */
   .secCoreName            = "A72 core 1",   /* Secondary core */
-  .pLBISTRegs                = (CSL_lbistRegs *)(CSL_A72_LBIST_BASE),
-  .pLBISTSig              = (uint32_t *)(CSL_A72_LBIST_SIG),
-  .expectedMISR           = A72_MISR_EXP_VAL,                           /* Expected signature for A72 */
   .cpuStatusFlagMask      = TISCI_MSG_VAL_PROC_BOOT_STATUS_FLAG_R5_WFI, /* Expected boot status value for wfi */
-  .handler                = LBIST_eventHandler,                         /* LBIST event handler */
-  .interruptNumber        = CSLR_MCU_R5FSS0_CORE0_INTR_COMPUTE_CLUSTER0_ARM0_DFT_LBIST_DFT_LBIST_BIST_DONE_0,/* BIST DONE interrupt number */
   .tisciProcId            = SCICLIENT_PROC_ID_A72SS0_CORE0, /* A72 core 0 Proc Id */
   .tisciSecProcId         = SCICLIENT_PROC_ID_A72SS0_CORE1, /* A72 core 1 Proc Id */
   .tisciDeviceId          = TISCI_DEV_A72SS0_CORE0,  /* A72 core 0 Device Id */
   .tisciSecDeviceId       = TISCI_DEV_A72SS0_CORE1,  /* A72 core 1 Device Id */
   .numAuxDevices          = A72_NUM_AUX_DEVICES,     /* Number of Aux devices */
   .auxDeviceIdsP          = &LBIST_A72AuxDevList[0], /* Array of Aux device ids */
-  .doneFlag               = false,                   /* Initialize done flag */
-  .LBISTConfig = {
-      .dc_def        = LBIST_DC_DEF,
-      .divide_ratio  = LBIST_DIVIDE_RATIO,
-      .static_pc_def = LBIST_A72_STATIC_PC_DEF,
-      .set_pc_def    = LBIST_SET_PC_DEF,
-      .reset_pc_def  = LBIST_RESET_PC_DEF,
-      .scan_pc_def   = LBIST_SCAN_PC_DEF,
-      .prpg_def      = LBIST_PRPG_DEF,
-  },
  },
 
 };
@@ -346,21 +230,32 @@ LBIST_TestHandle_t LBIST_TestHandleArray[LBIST_MAX_CORE_INDEX+1] =
 /*                          Function Definitions                              */
 /* ========================================================================== */
 
-void LBIST_eventHandler( uint32_t coreIndex )
+char * LBIST_getPostStatusString(SDL_LBIST_postStatus postStatus)
 {
-    int32_t status;
-    Bool isLBISTDone = CSL_FALSE;
-    CSL_lbistRegs *pLBISTRegs = LBIST_TestHandleArray[coreIndex].pLBISTRegs;
-
-    /* Double check if the LBIST done flag is set */
-    status = CSL_LBIST_isDone(pLBISTRegs, &isLBISTDone);
-    if ((status == CSL_PASS) && (isLBISTDone == CSL_TRUE))
+    if (postStatus == SDL_LBIST_POST_NOT_RUN)
     {
-        LBIST_TestHandleArray[coreIndex].doneFlag = true;
-        /* Need to pull run down to low to clear the done interrupt */
-        CSL_LBIST_stop( pLBISTRegs );
+        return LBIST_POST_NOT_RUN_STR;
     }
-    return;
+    else if (postStatus == SDL_LBIST_POST_TIMEOUT)
+    {
+        return LBIST_POST_ATTEMPTED_TIMEOUT_STR;
+    }
+    else if (postStatus == SDL_LBIST_POST_COMPLETED_FAILURE)
+    {
+        return LBIST_POST_COMPLETED_FAILURE_STR;
+    }
+    else if (postStatus == SDL_LBIST_POST_COMPLETED_SUCCESS)
+    {
+        return LBIST_POST_COMPLETED_SUCCESS_STR;
+    }
+    return NULL;
+}
 
+void LBIST_printPostStatus(SDL_LBIST_postResult *result)
+{
+    UART_printf("    HW POST MCU Status : %s\n", (LBIST_getPostStatusString(result->mcuPostStatus)) ? : "Invalid");
+    UART_printf("    HW POST DMSC Status : %s\n", (LBIST_getPostStatusString(result->dmscPostStatus)) ? : "Invalid");
+
+    return;
 }
 
diff --git a/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/soc/j721e/lbist_defs.h b/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/soc/j721e/lbist_defs.h
index cdc26d20b155b22c13372f524f6b7142f3d0e2af..5f5b169346b6a85a49abb421969cda9229bb084d 100644
--- a/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/soc/j721e/lbist_defs.h
+++ b/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/soc/j721e/lbist_defs.h
@@ -56,23 +56,15 @@ typedef struct LBIST_TestHandle_s
 {
     /** Core name */
     char coreName[16];
+    /** Core instance */
+    SDL_LBIST_inst instance;
     /** Indicate secondary core need to be handled */
     bool secondaryCoreNeeded;
     bool wfiCheckNeeded;
     /** Secondary core name */
     char secCoreName[16];
-    /** Pointer to LBIST register map */
-    CSL_lbistRegs *pLBISTRegs;
-    /** Pointer to LBIST signature */
-    uint32_t *pLBISTSig;
-    /** Expected signature */
-    uint32_t expectedMISR;
     /** Mask used to check CPU Status */
     uint32_t cpuStatusFlagMask;
-    /** LBIST event handler function */
-    LBIST_handlerPtr handler;
-    /** Interrupt number for error event */
-    uint32_t interruptNumber;
     /** Core Processor Id */
     uint32_t tisciProcId;
     /** Secondary Core Processor Id */
@@ -81,10 +73,6 @@ typedef struct LBIST_TestHandle_s
     uint32_t tisciDeviceId;
     /** Secondary Core Device Id */
     uint32_t tisciSecDeviceId;
-    /** Flag to indicate test done, will be set when interrupt event comes */
-    volatile bool doneFlag;
-    /** Configuration for LBIST test */
-    CSL_LBIST_config_t LBISTConfig;
     /** Number of Auxiliary devices needed for the test */
     uint32_t      numAuxDevices;
     /** List of Auxiliary devices needed for the test */
@@ -103,8 +91,7 @@ extern LBIST_TestHandle_t LBIST_TestHandleArray[LBIST_MAX_CORE_INDEX+1];
 /* ========================================================================== */
 /*                          Function Declarations                             */
 /* ========================================================================== */
-
-/* None */
+void LBIST_printPostStatus(SDL_LBIST_postResult *result);
 
 #ifdef __cplusplus
 }
diff --git a/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/soc/j721e/pbist_defs.c b/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/soc/j721e/pbist_defs.c
index 8a9ffdee8c212337cfccead7c07bad946b4b44e5..8a92d361481ae1d9cdd26057d8ba1cb79502f8df 100755
--- a/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/soc/j721e/pbist_defs.c
+++ b/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/soc/j721e/pbist_defs.c
@@ -69,8 +69,11 @@
 /* ========================================================================== */
 /*                             Include Files                                  */
 /* ========================================================================== */
-#include "Std_Types.h"
-#include <ti/csl/csl_rat.h>
+#include <stdint.h>
+#include <sdl_types.h>
+#include <soc.h>
+#include <src/ip/sdl_ip_pbist.h>
+#include <src/sdl/sdl_pbist.h>
 #include <ti/csl/csl_clec.h>
 #include <ti/csl/cslr_vpac.h>
 #include <ti/csl/csl_cbass.h>
@@ -78,24 +81,19 @@
 #include <ti/csl/cslr_vpac.h>
 #include <ti/csl/cslr_cp_ace.h>
 
+#include <ti/drv/uart/UART.h>
+#include <ti/drv/uart/UART_stdio.h>
+
 /* SCI Client */
 #include <ti/drv/sciclient/sciclient.h>
 
 #include "pbist_utils.h"
 #include "pbist_defs.h"
 
-#include "app_utils.h"
-
 /* ========================================================================== */
 /*                           Macros & Typedefs                                */
 /* ========================================================================== */
 
-#define PBIST_REGION_LOCAL_BASE           (0x60000000u)
-
-#define PBIST_REGION2_LOCAL_BASE          (0x68000000u)
-
-#define PBIST_RAT_CFG_BASE                CSL_MCU_ARMSS_RAT_CFG_BASE
-
 #define A72_NUM_AUX_DEVICES               1
 #define MSMC_NUM_AUX_DEVICES              3
 #define MAIN_INFRA_NUM_AUX_DEVICES        18
@@ -107,6 +105,14 @@
  * on MCU is not corrupted. */
 #define PBIST_MCU_SELECTED_MEMORY
 
+/* HW POST run status definitions */
+#define PBIST_POST_COMPLETED_SUCCESS_STR      "SDL_PBIST_POST_COMPLETED_SUCCESS"
+#define PBIST_POST_COMPLETED_FAILURE_STR      "SDL_PBIST_POST_COMPLETED_FAILURE"
+#define PBIST_POST_ATTEMPTED_TIMEOUT_STR      "SDL_PBIST_POST_TIMEOUT"
+#define PBIST_POST_NOT_RUN_STR                "SDL_PBIST_POST_NOT_RUN"
+
+#define PBIST_RAT_CFG_BASE CSL_MCU_ARMSS_RAT_CFG_BASE
+
 /* ========================================================================== */
 /*                 Internal Function Declarations                             */
 /* ========================================================================== */
@@ -202,62 +208,30 @@ uint32_t PBIST_DSSAuxDevList[DSS_NUM_AUX_DEVICES] =
 
 PBIST_TestHandle_t PBIST_TestHandleArray[PBIST_MAX_INSTANCE+1] =
 {
+    /* HW POST - Used to check the status of HW POST MCU PBIST */
+    {
+        .testName              = "PBIST HWPOST MCU",
+        .pbistInst             = SDL_PBIST_INST_MCUR5F0,
+        .numPostPbistToCheck   = 1u,
+    },
     /* MCU PBIST - Not run as part of BootApp since PBIST changes the memory upon which it is run. */
     {
-        .testName            = "MCU PBIST",
-        .numPostPbistToCheck = 1u,
-        .PBISTRegsHiAddress  = 0u,
-        .deviceRegsHiAddress = 0u,
-        .pPBISTRegs          = (CSL_pbistRegs *)CSL_MCU_PBIST0_BASE,
-        .numPBISTRuns        = CSL_MCU_PBIST0_NUM_TEST_VECTORS, // Not run as part of BootApp
-        .PBISTConfigRun = {
-            /* Golden Vector Part 1 */
-            {
-                .override           = 0x0u,
-                /* Override bit set to 0 to use algorithmsBitMap & memoryGroupsBitMap */
-                .algorithmsBitMap   = CSL_MCU_PBIST0_ALGO_BITMAP_0,  /* Choose recommended Algo bitmap 0 */
-                /* NOTE: As the MCU R5f is running this code override bit cannot be set to enable all memory test */
-                .memoryGroupsBitMap = CSL_MCU_PBIST0_MEM_BITMAP_0,   /* Choose recommended mem bitmap 0  */
-                .scrambleValue      = 0xFEDCBA9876543210U,  /* Scramble Value */
-            },
-            /* Golden Vector Part 2 */
-            {
-                .override           = 0x0u,
-                /* Override bit set to 0 to use algorithmsBitMap & memoryGroupsBitMap */
-                .algorithmsBitMap   = CSL_MCU_PBIST0_ALGO_BITMAP_1, /* Choose recommended Algo bitmap 1 */
-                /* NOTE: As the MCU R5f is running this code override bit cannot be set to enable all memory test */
-                .memoryGroupsBitMap = CSL_MCU_PBIST0_MEM_BITMAP_1,  /* Choose recommended mem bitmap 1  */
-                .scrambleValue      = 0xFEDCBA9876543210U,  /* Scramble Value */
-            }
-        },
+        .testName               = "MCU PBIST",
+        .pbistInst              = SDL_PBIST_INST_MCUR5F0,
+        .numPostPbistToCheck    = 0u,
         .tisciPBISTDeviceId     = TISCI_DEV_MCU_PBIST0, /* PBIST device id  */
-        .interruptNumber        = CSLR_MCU_R5FSS0_CORE0_INTR_MCU_PBIST0_DFT_PBIST_CPU_0,
         .procRstNeeded          = false,
         .secondaryCoreNeeded    = false,                /* Secondary core needed */
         .coreCustPwrSeqNeeded   = false,
         .numAuxDevices          = 0u,                   /* No Aux devices */
         .auxInitRestoreFunction = NULL,                 /* Auxilliary init/restore function */
-        .doneFlag               = false,                /* Initialize done flag */
     },
     /* Main R5F 0 */
     {
-        .testName            = "Main R5F 0 PBIST",
-        .numPostPbistToCheck = 0u,
-        .PBISTRegsHiAddress  = 0u,
-        .deviceRegsHiAddress = 0u,
-        .pPBISTRegs          = (CSL_pbistRegs *)CSL_PBIST9_BASE, /* PBIST9: Main R5F 0 */
-        .numPBISTRuns        = CSL_PBIST9_NUM_TEST_VECTORS,
-        .PBISTConfigRun = {
-            {
-                .override           = 0x0u,
-                /* Override bit set to 0 to use algorithmsBitMap & memoryGroupsBitMap */
-                .algorithmsBitMap   = CSL_PBIST9_ALGO_BITMAP_0,   /* Choose recommended Algo bitmap 0 */
-                .memoryGroupsBitMap = CSL_PBIST9_MEM_BITMAP_0,    /* Choose recommended mem bitmap 0  */
-                .scrambleValue      = 0xFEDCBA9876543210U,        /* Scramble Value */
-            }
-        },
+        .testName               = "Main R5F 0 PBIST",
+        .pbistInst              = SDL_PBIST_INST_MAINR5F0,
+        .numPostPbistToCheck    = 0u,
         .tisciPBISTDeviceId     = TISCI_DEV_PBIST9,               /* PBIST device id  */
-        .interruptNumber        = CSLR_MCU_R5FSS0_CORE0_INTR_PBIST9_DFT_PBIST_CPU_0,
         .procRstNeeded          = true,
         .secondaryCoreNeeded    = true,                           /* Secondary core needed */
         .coreName               = "Main R5F0 core0",              /* Primary core   */
@@ -269,27 +243,13 @@ PBIST_TestHandle_t PBIST_TestHandleArray[PBIST_MAX_INSTANCE+1] =
         .coreCustPwrSeqNeeded   = false,
         .numAuxDevices          = 0u,                             /* No Aux devices */
         .auxInitRestoreFunction = NULL,                           /* Auxilliary init/restore function */
-        .doneFlag               = false,                          /* Initialize done flag */
     },
-    /* Main MCU 1 */
+    /* Main R5F 1 */
     {
-        .testName            = "Main R5F 1 PBIST",
-        .numPostPbistToCheck = 0u,
-        .PBISTRegsHiAddress  = 0u,
-        .deviceRegsHiAddress = 0u,
-        .pPBISTRegs          = (CSL_pbistRegs *)CSL_PBIST10_BASE,   /* PBIST10: Main MCU 1 */
-        .numPBISTRuns        = CSL_PBIST10_NUM_TEST_VECTORS,
-        .PBISTConfigRun = {
-            {
-                .override           = 0x0u,
-                /* Override bit set to 0 to use algorithmsBitMap & memoryGroupsBitMap */
-                .algorithmsBitMap   = CSL_PBIST10_ALGO_BITMAP_0,   /* Choose recommended Algo bitmap */
-                .memoryGroupsBitMap = CSL_PBIST10_MEM_BITMAP_0,    /* Choose recommended mem bitmap  */
-                .scrambleValue      = 0xFEDCBA9876543210U,         /* Scramble Value */
-            }
-        },
+        .testName               = "Main R5F 1 PBIST",
+        .pbistInst              = SDL_PBIST_INST_MAINR5F1,
+        .numPostPbistToCheck    = 0u,
         .tisciPBISTDeviceId     = TISCI_DEV_PBIST10,               /* PBIST device id  */
-        .interruptNumber        = CSLR_MCU_R5FSS0_CORE0_INTR_PBIST10_DFT_PBIST_CPU_0,
         .procRstNeeded          = true,
         .secondaryCoreNeeded    = true,                            /* Secondary core needed */
         .coreName               = "Main R5F1 core0",               /* Primary core   */
@@ -301,27 +261,13 @@ PBIST_TestHandle_t PBIST_TestHandleArray[PBIST_MAX_INSTANCE+1] =
         .coreCustPwrSeqNeeded   = false,
         .numAuxDevices          = 0u,                              /* No Aux devices */
         .auxInitRestoreFunction = NULL,                            /* Auxilliary init/restore function */
-        .doneFlag               = false,                           /* Initialize done flag */
     },
     /* C7X */
     {
-        .testName            = "C7X PBIST",
-        .numPostPbistToCheck = 0u,
-        .PBISTRegsHiAddress  = CSL_COMPUTE_CLUSTER0_C71SS0_PBIST_BASE,
-        .deviceRegsHiAddress = 0u,
-        .pPBISTRegs          = (CSL_pbistRegs *)PBIST_REGION_LOCAL_BASE,
-        .numPBISTRuns        = CSL_C71SS0_PBIST_WRAP_NUM_TEST_VECTORS,
-        .PBISTConfigRun = {
-            {
-                .override           = 0x0u,
-                /* Override bit set to 0 to use algorithmsBitMap & memoryGroupsBitMap */
-                .algorithmsBitMap   = CSL_C71SS0_PBIST_WRAP_ALGO_BITMAP_0,   /* Choose recommended Algo bitmap */
-                .memoryGroupsBitMap = CSL_C71SS0_PBIST_WRAP_MEM_BITMAP_0,    /* Choose recommended mem bitmap  */
-                .scrambleValue      = 0xFEDCBA9876543210U,         /* Scramble Value */
-            }
-        },
+        .testName               = "C7X PBIST",
+        .pbistInst              = SDL_PBIST_INST_C7X,
+        .numPostPbistToCheck    = 0u,
         .tisciPBISTDeviceId     = TISCI_DEV_C71X_0_PBIST_VD,       /* PBIST device id  */
-        .interruptNumber        = CSLR_MCU_R5FSS0_CORE0_INTR_COMPUTE_CLUSTER0_CLEC_SOC_EVENTS_OUT_LEVEL_12,
         .procRstNeeded          = true,
         .secondaryCoreNeeded    = false,                           /* Secondary core needed */
         .coreName               = "C7x ",
@@ -330,27 +276,12 @@ PBIST_TestHandle_t PBIST_TestHandleArray[PBIST_MAX_INSTANCE+1] =
         .coreCustPwrSeqNeeded   = false,
         .numAuxDevices          = 0u,                              /* No Aux devices */
         .auxInitRestoreFunction = NULL,                            /* Auxilliary init/restore function */
-        .doneFlag               = false,                           /* Initialize done flag */
     },
     /* A72 */
     {
-        .testName            = "A72 PBIST",
-        .numPostPbistToCheck = 0u,
-        .PBISTRegsHiAddress  = CSL_COMPUTE_CLUSTER0_A72SS0_PBIST0_BASE,
-        .deviceRegsHiAddress = 0u,
-        .pPBISTRegs          = (CSL_pbistRegs *)PBIST_REGION_LOCAL_BASE,
-        .numPBISTRuns        = CSL_A72SS0_CORE0_PBIST_WRAP_NUM_TEST_VECTORS,
-        .PBISTConfigRun = {
-            {
-                .override           = 0x0u,
-                /* Override bit set to 0 to use algorithmsBitMap & memoryGroupsBitMap */
-                .algorithmsBitMap   = CSL_A72SS0_CORE0_PBIST_WRAP_ALGO_BITMAP_0, /* Choose recommended Algo bitmap */
-                .memoryGroupsBitMap = CSL_A72SS0_CORE0_PBIST_WRAP_MEM_BITMAP_0,  /* Choose recommended mem bitmap  */
-                .scrambleValue      = 0xFEDCBA9876543210U, /* Scramble Value */
-            }
-        },
+        .testName               = "A72 PBIST",
+        .pbistInst              = SDL_PBIST_INST_A72,
         .tisciPBISTDeviceId     = TISCI_DEV_COMPUTE_CLUSTER0_PBIST_WRAP, /* Device Id for A72 PBIST */
-        .interruptNumber        = CSLR_MCU_R5FSS0_CORE0_INTR_COMPUTE_CLUSTER0_CLEC_SOC_EVENTS_OUT_LEVEL_8,
         .procRstNeeded          = true,
         .secondaryCoreNeeded    = true,                           /* Secondary core needed */
         .coreName               = "A72 core 0",                   /* Primary core   */
@@ -363,36 +294,13 @@ PBIST_TestHandle_t PBIST_TestHandleArray[PBIST_MAX_INSTANCE+1] =
         .numAuxDevices          = A72_NUM_AUX_DEVICES,            /* Number of Aux devices */
         .auxDeviceIdsP          = &PBIST_A72AuxDevList[0],        /* Array of Aux device ids */
         .auxInitRestoreFunction = PBIST_A72AuxInitRestore,        /* Auxilliary init/restore function */
-        .doneFlag               = false,                          /* Initialize done flag */
     },
     /* VPAC */
     {
-        .testName            = "VPAC PBIST",
-        .numPostPbistToCheck = 0u,
-        .PBISTRegsHiAddress  = 0u,
-        .deviceRegsHiAddress = 0u,
-        .pPBISTRegs          = (CSL_pbistRegs *)CSL_PBIST3_BASE,
-        .numPBISTRuns        = CSL_PBIST3_NUM_TEST_VECTORS,
-        .PBISTConfigRun = {
-            /* Golden Vector Part 1 */
-            {
-                .override           = 0x0u,
-                /* Override bit set to 0 to use algorithmsBitMap & memoryGroupsBitMap */
-                .algorithmsBitMap   = CSL_PBIST3_ALGO_BITMAP_0, /* Choose recommended Algo bitmap 0 */
-                .memoryGroupsBitMap = CSL_PBIST3_MEM_BITMAP_0,  /* Choose recommended mem bitmap 0  */
-                .scrambleValue      = 0xFEDCBA9876543210U,      /* Scramble Value */
-            },
-            /* Golden Vector Part 2 */
-            {
-                .override           = 0x0u,
-                /* Override bit set to 0 to use algorithmsBitMap & memoryGroupsBitMap */
-                .algorithmsBitMap   = CSL_PBIST3_ALGO_BITMAP_1, /* Choose recommended Algo bitmap 1 */
-                .memoryGroupsBitMap = CSL_PBIST3_MEM_BITMAP_1,  /* Choose recommended mem bitmap 1  */
-                .scrambleValue      = 0xFEDCBA9876543210U,      /* Scramble Value */
-            }
-        },
+        .testName               = "VPAC PBIST",
+        .pbistInst              = SDL_PBIST_INST_VPAC,
+        .numPostPbistToCheck    = 0u,
         .tisciPBISTDeviceId     = TISCI_DEV_PBIST3,          /* PBIST device id  */
-        .interruptNumber        = CSLR_MCU_R5FSS0_CORE0_INTR_PBIST3_DFT_PBIST_CPU_0,
         .procRstNeeded          = true,
         .secondaryCoreNeeded    = false,                     /* Secondary core needed */
         .coreName               = "VPAC core",               /* Primary core   */
@@ -401,36 +309,13 @@ PBIST_TestHandle_t PBIST_TestHandleArray[PBIST_MAX_INSTANCE+1] =
         .coreCustPwrSeqNeeded   = false,
         .numAuxDevices          = 0u,                        /* No Aux devices */
         .auxInitRestoreFunction = PBIST_VPACAuxInitRestore,  /* Auxilliary init/restore function */
-        .doneFlag               = false,                     /* Initialize done flag */
     },
     /* DMPAC */
     {
-        .testName            = "DMPAC PBIST",
-        .numPostPbistToCheck = 0u,
-        .PBISTRegsHiAddress  = 0u,
-        .deviceRegsHiAddress = 0u,
-        .pPBISTRegs          = (CSL_pbistRegs *)CSL_PBIST1_BASE,
-        .numPBISTRuns        = CSL_PBIST1_NUM_TEST_VECTORS,
-        .PBISTConfigRun = {
-            /* Golden Vector Part 1 */
-            {
-                .override           = 0x0u,
-                /* Override bit set to 0 to use algorithmsBitMap & memoryGroupsBitMap */
-                .algorithmsBitMap   = CSL_PBIST1_ALGO_BITMAP_0, /* Choose recommended Algo bitmap */
-                .memoryGroupsBitMap = CSL_PBIST1_MEM_BITMAP_0,  /* Choose recommended mem bitmap  */
-                .scrambleValue      = 0xFEDCBA9876543210U,      /* Scramble Value */
-            },
-            /* Golden Vector Part 2 */
-            {
-                .override           = 0x0u,
-                /* Override bit set to 0 to use algorithmsBitMap & memoryGroupsBitMap */
-                .algorithmsBitMap   = CSL_PBIST1_ALGO_BITMAP_1, /* Choose recommended Algo bitmap */
-                .memoryGroupsBitMap = CSL_PBIST1_MEM_BITMAP_1,  /* Choose recommended mem bitmap  */
-                .scrambleValue      = 0xFEDCBA9876543210U,      /* Scramble Value */
-            },
-        },
+        .testName               = "DMPAC PBIST",
+        .pbistInst              = SDL_PBIST_INST_DMPAC,
+        .numPostPbistToCheck    = 0u,
         .tisciPBISTDeviceId     = TISCI_DEV_PBIST1,           /* PBIST device id  */
-        .interruptNumber        = CSLR_MCU_R5FSS0_CORE0_INTR_PBIST1_DFT_PBIST_CPU_0,
         .procRstNeeded          = true,
         .secondaryCoreNeeded    = true,                       /* Secondary core needed */
         .coreName               = "DMPAC core",               /* Primary core   */
@@ -442,36 +327,13 @@ PBIST_TestHandle_t PBIST_TestHandleArray[PBIST_MAX_INSTANCE+1] =
         .coreCustPwrSeqNeeded   = false,
         .numAuxDevices          = 0u,                         /* No Aux devices */
         .auxInitRestoreFunction = NULL,                       /* Auxilliary init/restore function */
-        .doneFlag               = false,                      /* Initialize done flag */
     },
     /* NAVSS - Not supported in BootApp */
     {
-        .testName            = "NAVSS PBIST",
-        .numPostPbistToCheck = 0u,
-        .PBISTRegsHiAddress  = 0u,
-        .deviceRegsHiAddress = 0u,
-        .pPBISTRegs          = (CSL_pbistRegs *)CSL_PBIST7_BASE,
-        .numPBISTRuns        = CSL_PBIST7_NUM_TEST_VECTORS,
-        .PBISTConfigRun = {
-            /* Golden Vector Part 1 */
-            {
-                .override           = 0x0u,
-                /* Override bit set to 0 to use algorithmsBitMap & memoryGroupsBitMap */
-                .algorithmsBitMap   = CSL_PBIST7_ALGO_BITMAP_0,   /* Choose recommended Algo bitmap 0 */
-                .memoryGroupsBitMap = CSL_PBIST7_MEM_BITMAP_0,    /* Choose recommended mem bitmap 0  */
-                .scrambleValue      = 0xFEDCBA9876543210U,  /* Scramble Value */
-            },
-            /* Golden Vector Part 2 */
-            {
-                .override           = 0x0u,
-                /* Override bit set to 0 to use algorithmsBitMap & memoryGroupsBitMap */
-                .algorithmsBitMap   = CSL_PBIST7_ALGO_BITMAP_1,   /* Choose recommended Algo bitmap 1 */
-                .memoryGroupsBitMap = CSL_PBIST7_MEM_BITMAP_1,    /* Choose recommended mem bitmap 1  */
-                .scrambleValue      = 0xFEDCBA9876543210U,  /* Scramble Value */
-            }
-        },
+        .testName               = "NAVSS PBIST",
+        .pbistInst              = SDL_PBIST_INST_NAVSS,
+        .numPostPbistToCheck    = 0u,
         .tisciPBISTDeviceId     = TISCI_DEV_PBIST7,         /* PBIST device id  */
-        .interruptNumber        = CSLR_MCU_R5FSS0_CORE0_INTR_PBIST7_DFT_PBIST_CPU_0,
         .procRstNeeded          = true,
         .secondaryCoreNeeded    = false,                    /* Secondary core needed */
         .coreName               = "NAVSS",                  /* Primary core   */
@@ -480,43 +342,13 @@ PBIST_TestHandle_t PBIST_TestHandleArray[PBIST_MAX_INSTANCE+1] =
         .coreCustPwrSeqNeeded   = false,
         .numAuxDevices          = 0u,                       /* No Aux devices */
         .auxInitRestoreFunction = NULL,                     /* Auxilliary init/restore function */
-        .doneFlag               = false,                    /* Initialize done flag */
     },
     /* HC */
     {
-        .testName            = "HC PBIST",
-        .numPostPbistToCheck = 0u,
-        .PBISTRegsHiAddress  = 0u,
-        .deviceRegsHiAddress = 0u,
-        .pPBISTRegs          = (CSL_pbistRegs *)CSL_PBIST5_BASE,
-        .numPBISTRuns        = 1u, // TODO - ADD SECOND GOLDEN VECTOR NOT YET FUNCTIONAL
-        .PBISTConfigRun = {
-            /* Golden Vector Part 1 */
-            {
-                .override           = 0x0u,
-                /* Override bit set to 0 to use algorithmsBitMap & memoryGroupsBitMap */
-                .algorithmsBitMap   = CSL_PBIST5_ALGO_BITMAP_0, /* Choose recommended Algo bitmap 0 */
-                .memoryGroupsBitMap = CSL_PBIST5_MEM_BITMAP_0,  /* Choose recommended mem bitmap 0  */
-                .scrambleValue      = 0xFEDCBA9876543210U,      /* Scramble Value */
-            },
-#if 0
-            /* Golden Vector Part 2 */
-            {
-                //.override           = (CSL_PBIST_OVER_RINFO_MASK | CSL_PBIST_OVER_ALGO_MASK),  /* Memory and algorithm decided by ROM*/
-                .override           = 0x0u,
-                /* NOTE: Because of override memoryGroupsBitMap & algorithmsBitMap ignored */
-                .algorithmsBitMap   = CSL_PBIST5_ALGO_BITMAP_1   /* Choose recommended Algo bitmap 1 */
-
-                /* Override bit set to 0 to use memoryGroupsBitMap */
-                /* Can be set to (CSL_PBIST_OVER_RINFO_MASK << CSL_PBIST_OVER_RINFO_SHIFT) to enable all memory */
-                /* NOTE: override set to 1 is not tested */
-                .memoryGroupsBitMap = CSL_PBIST5_MEM_BITMAP_1,    /* Choose recommended mem bitmap 1 */
-                .scrambleValue      = 0xFEDCBA9876543210U,  /* Scramble Value */
-            }
-#endif
-        },
+        .testName               = "HC PBIST",
+        .pbistInst              = SDL_PBIST_INST_HC,
+        .numPostPbistToCheck    = 0u,
         .tisciPBISTDeviceId     = TISCI_DEV_PBIST5,         /* PBIST device id  */
-        .interruptNumber        = CSLR_MCU_R5FSS0_CORE0_INTR_PBIST5_DFT_PBIST_CPU_0,
         .procRstNeeded          = false,
         .secondaryCoreNeeded    = false,                    /* Secondary core needed */
         .coreName               = "HC",                     /* Primary core */
@@ -525,36 +357,13 @@ PBIST_TestHandle_t PBIST_TestHandleArray[PBIST_MAX_INSTANCE+1] =
         .coreCustPwrSeqNeeded   = false,
         .numAuxDevices          = 0u,                       /* No Aux devices */
         .auxInitRestoreFunction = NULL,                     /* Auxilliary init/restore function */
-        .doneFlag               = false,                    /* Initialize done flag */
     },
     /* C6X core 0 */
     {
-        .testName            = "C6x core 0 PBIST",
-        .numPostPbistToCheck = 0u,
-        .PBISTRegsHiAddress  = CSL_C66SS0_VBUSP_CFG_PBISTCFG_BASE,
-        .deviceRegsHiAddress = 0u,
-        .pPBISTRegs          = (CSL_pbistRegs *)PBIST_REGION_LOCAL_BASE,
-        .numPBISTRuns        = CSL_C66SS0_PBIST0_NUM_TEST_VECTORS,
-        .PBISTConfigRun = {
-            /* Golden Vector Part 1 */
-            {
-                .override           = 0x0u,
-                /* Override bit set to 0 to use algorithmsBitMap & memoryGroupsBitMap */
-                .algorithmsBitMap   = CSL_C66SS0_PBIST0_ALGO_BITMAP_0,   /* Choose recommended Algo bitmap 0 */
-                .memoryGroupsBitMap = CSL_C66SS0_PBIST0_MEM_BITMAP_0,    /* Choose recommended mem bitmap 0  */
-                .scrambleValue      = 0xFEDCBA9876543210U, /* Scramble Value */
-            },
-            /* Golden Vector Part 2 */
-            {
-                .override           = 0x0u,
-                /* Override bit set to 0 to use memoryGroupsBitMap & algorithmsBitMap */
-                .algorithmsBitMap   = CSL_C66SS0_PBIST0_ALGO_BITMAP_1,   /* Choose recommended Algo bitmap 1 */
-                .memoryGroupsBitMap = CSL_C66SS0_PBIST0_MEM_BITMAP_1,    /* Choose recommended mem bitmap 1  */
-                .scrambleValue      = 0xDCBA9876543210FEU, /* Scramble Value */
-            }
-        },
+        .testName               = "C6x core 0 PBIST",
+        .pbistInst              = SDL_PBIST_INST_C66X0,
+        .numPostPbistToCheck    = 0u,
         .tisciPBISTDeviceId     = TISCI_DEV_C66SS0_PBIST0,   /* PBIST device id  */
-        .interruptNumber        = CSLR_MCU_R5FSS0_CORE0_INTR_C66SS0_PBIST0_DFT_PBIST_CPU_0,
         .procRstNeeded          = true,
         .secondaryCoreNeeded    = false,                           /* Secondary core needed */
         .coreName               = "C6x core 0",                    /* Primary core   */
@@ -563,36 +372,13 @@ PBIST_TestHandle_t PBIST_TestHandleArray[PBIST_MAX_INSTANCE+1] =
         .coreCustPwrSeqNeeded   = false,
         .numAuxDevices          = 0u,                              /* No Aux devices */
         .auxInitRestoreFunction = NULL,                            /* Auxilliary init/restore function */
-        .doneFlag               = false,                           /* Initialize done flag */
     },
     /* C6X core 1 */
     {
-        .testName            = "C6x core 1 PBIST",
-        .numPostPbistToCheck = 0u,
-        .PBISTRegsHiAddress  = CSL_C66SS1_VBUSP_CFG_PBISTCFG_BASE,
-        .deviceRegsHiAddress = 0u,
-        .pPBISTRegs          = (CSL_pbistRegs *)PBIST_REGION_LOCAL_BASE,
-        .numPBISTRuns        = CSL_C66SS1_PBIST0_NUM_TEST_VECTORS,
-        .PBISTConfigRun = {
-            /* Golden Vector Part 1 */
-            {
-                .override           = 0x0u,
-                /* Override bit set to 0 to use memoryGroupsBitMap & algorithmsBitMap */
-                .algorithmsBitMap   = CSL_C66SS1_PBIST0_ALGO_BITMAP_0,   /* Choose recommended Algo bitmap 0 */
-                .memoryGroupsBitMap = CSL_C66SS1_PBIST0_MEM_BITMAP_0,    /* Choose recommended mem bitmap  0 */
-                .scrambleValue      = 0xFEDCBA9876543210U, /* Scramble Value */
-            },
-            /* Golden Vector Part 2 */
-            {
-                .override           = 0x0u,
-                /* Override bit set to 0 to use memoryGroupsBitMap & algorithmsBitMap */
-                .algorithmsBitMap   = CSL_C66SS1_PBIST0_ALGO_BITMAP_1,   /* Choose recommended Algo bitmap 1 */
-                .memoryGroupsBitMap = CSL_C66SS1_PBIST0_MEM_BITMAP_1,    /* Choose recommended mem bitmap 1  */
-                .scrambleValue      = 0xDCBA9876543210FEU, /* Scramble Value */
-            }
-        },
+        .testName               = "C6x core 1 PBIST",
+        .pbistInst              = SDL_PBIST_INST_C66X1,
+        .numPostPbistToCheck    = 0u,
         .tisciPBISTDeviceId     = TISCI_DEV_C66SS1_PBIST0,   /* PBIST device id  */
-        .interruptNumber        = CSLR_MCU_R5FSS0_CORE0_INTR_C66SS1_PBIST0_DFT_PBIST_CPU_0,
         .procRstNeeded          = true,                            /* Initialize done flag */
         .secondaryCoreNeeded    = false,                           /* Secondary core needed */
         .coreName               = "C6x core 1",                    /* Primary core   */
@@ -601,73 +387,29 @@ PBIST_TestHandle_t PBIST_TestHandleArray[PBIST_MAX_INSTANCE+1] =
         .coreCustPwrSeqNeeded   = false,
         .numAuxDevices          = 0u,                              /* No Aux devices */
         .auxInitRestoreFunction = NULL,                            /* Auxilliary init/restore function */
-        .doneFlag               = false,                           /* Initialize done flag */
     },
     /* Main Infra */
     {
-        .testName            = "Main Infra PBIST",
-        .numPostPbistToCheck = 0u,
-        .PBISTRegsHiAddress  = 0u,
-        .pPBISTRegs          = (CSL_pbistRegs *)CSL_PBIST6_BASE,
-        .numPBISTRuns        = CSL_PBIST6_NUM_TEST_VECTORS,
-        .PBISTConfigRun = {
-            /* Golden Vector Part 1 */
-            {
-                .override           = 0u,                  /* Memory and algorithm decided by ROM*/
-                /* Override bit set to 0 to use algorithmsBitMap & memoryGroupsBitMap */
-                .algorithmsBitMap   = CSL_PBIST6_ALGO_BITMAP_0,   /* Choose recommended Algo bitmap 0 */
-                .memoryGroupsBitMap = CSL_PBIST6_MEM_BITMAP_0,    /* Choose recommended mem bitmap 0  */
-                .scrambleValue      = 0xFEDCBA9876543210U, /* Scramble Value */
-            },
-            /* Golden Vector Part 2 */
-            {
-                .override           = 0u,                  /* Memory and algorithm decided by ROM*/
-                /* Override bit set to 0 to use algorithmsBitMap & memoryGroupsBitMap */
-                .algorithmsBitMap   = CSL_PBIST6_ALGO_BITMAP_1,   /* Choose recommended Algo bitmap 1 */
-                .memoryGroupsBitMap = CSL_PBIST6_MEM_BITMAP_1,    /* Choose recommended mem bitmap 1 */
-                .scrambleValue      = 0xFEDCBA9876543210U, /* Scramble Value */
-            }
-        },
+        .testName               = "Main Infra PBIST",
+        .pbistInst              = SDL_PBIST_INST_MAININFRA,
+        .numPostPbistToCheck    = 0u,
         .tisciPBISTDeviceId     = TISCI_DEV_PBIST6,        /* PBIST device id  */
-        .interruptNumber        = CSLR_MCU_R5FSS0_CORE0_INTR_PBIST6_DFT_PBIST_CPU_0,
         .procRstNeeded          = false,
         .secondaryCoreNeeded    = false,                   /* Secondary core needed */
-        .coreName               = 0x0u,                    /* No coreName   */
+        .coreName               = "",                      /* No coreName   */
         .tisciProcId            = 0x0u,                    /* No Proc Id needed for Main Intrastructure */
         .tisciDeviceId          = 0x0u,                    /* No Device Id needed for Main infrastructure */
         .coreCustPwrSeqNeeded   = false,
         .numAuxDevices          = MAIN_INFRA_NUM_AUX_DEVICES,    /* No Aux devices       */
         .auxDeviceIdsP          = &PBIST_MainInfraAuxDevList[0], /* Array of Aux device ids */
         .auxInitRestoreFunction = PBIST_MainInfraAuxInitRestore, /* Auxilliary init/restore function */
-        .doneFlag               = false,                         /* Initialize done flag */
     },
     /* MSMC */
     {
-        .testName            = "MSMC PBIST",
-        .numPostPbistToCheck = 0u,
-        .PBISTRegsHiAddress  = CSL_COMPUTE_CLUSTER0_MSMC_PBIST_BASE,
-        .pPBISTRegs          = (CSL_pbistRegs *)PBIST_REGION_LOCAL_BASE,
-        .numPBISTRuns        = CSL_COMPUTE_CLUSTER0_PBIST_WRAP_NUM_TEST_VECTORS,
-        .PBISTConfigRun = {
-            /* Golden Vector Part 1 */
-            {
-                .override           = 0x0u,
-                /* Override bit set to 0 to use algorithmsBitMap & memoryGroupsBitMap */
-                .algorithmsBitMap   = CSL_COMPUTE_CLUSTER0_PBIST_WRAP_ALGO_BITMAP_0,   /* Choose recommended Algo bitmap 0 */
-                .memoryGroupsBitMap = CSL_COMPUTE_CLUSTER0_PBIST_WRAP_MEM_BITMAP_0,    /* Choose recommended mem bitmap 0  */
-                .scrambleValue      = 0xFEDCBA9876543210U, /* Scramble Value */
-            },
-            /* Golden Vector Part 2 */
-            {
-                .override           = 0x0u,
-                /* Override bit set to 0 to use algorithmsBitMap & memoryGroupsBitMap */
-                .algorithmsBitMap   = CSL_COMPUTE_CLUSTER0_PBIST_WRAP_ALGO_BITMAP_1,   /* Choose recommended Algo bitmap 1 */
-                .memoryGroupsBitMap = CSL_COMPUTE_CLUSTER0_PBIST_WRAP_MEM_BITMAP_1,    /* Choose recommended mem bitmap 1  */
-                .scrambleValue      = 0xFEDCBA9876543210U, /* Scramble Value */
-            }
-        },
+        .testName               = "MSMC PBIST",
+        .pbistInst              = SDL_PBIST_INST_MSMC,
+        .numPostPbistToCheck    = 0u,
         .tisciPBISTDeviceId     = TISCI_DEV_COMPUTE_CLUSTER0_PBIST_WRAP, /* PBIST device id  */
-        .interruptNumber        = CSLR_MCU_R5FSS0_CORE0_INTR_COMPUTE_CLUSTER0_PBIST_WRAP_DFT_PBIST_CPU_0,
         .procRstNeeded          = true,
         .secondaryCoreNeeded    = true,                    /* Secondary core needed */
         .coreName               = "A72 core 0",            /* Primary core   */
@@ -680,34 +422,13 @@ PBIST_TestHandle_t PBIST_TestHandleArray[PBIST_MAX_INSTANCE+1] =
         .numAuxDevices          = MSMC_NUM_AUX_DEVICES,           /* No Aux devices       */
         .auxDeviceIdsP          = &PBIST_MSMCAuxDevList[0],       /* Array of Aux device ids */
         .auxInitRestoreFunction = NULL,                           /* Auxilliary init/restore function */
-        .doneFlag               = false,                          /* Initialize done flag */
     },
     /* Encoder */
     {
-        .testName            = "Encoder PBIST",
-        .numPostPbistToCheck = 0u,
-        .PBISTRegsHiAddress  = 0u,
-        .pPBISTRegs          = (CSL_pbistRegs *)CSL_PBIST2_BASE,
-        .numPBISTRuns        = CSL_PBIST2_NUM_TEST_VECTORS,
-        .PBISTConfigRun = {
-            {
-                .override           = 0x0u,
-                /* Override bit set to 0 to use algorithmsBitMap & memoryGroupsBitMap */
-                .algorithmsBitMap   = CSL_PBIST2_ALGO_BITMAP_0,   /* Choose recommended Algo bitmap 0 */
-                .memoryGroupsBitMap = CSL_PBIST2_MEM_BITMAP_0,    /* Choose recommended mem bitmap 0  */
-                .scrambleValue      = 0xFEDCBA9876543210U, /* Scramble Value */
-            },
-            {
-                .override           = 0x0u,
-                /* Override bit set to 0 to use algorithmsBitMap & memoryGroupsBitMap */
-                .algorithmsBitMap   = CSL_PBIST2_ALGO_BITMAP_1,   /* Choose recommended Algo bitmap 1 */
-                .memoryGroupsBitMap = CSL_PBIST2_MEM_BITMAP_1,    /* Choose recommended mem bitmap 1  */
-                .scrambleValue      = 0xFEDCBA9876543210U, /* Scramble Value */
-            },
-
-        },
+        .testName               = "Encoder PBIST",
+        .pbistInst              = SDL_PBIST_INST_ENCODER,
+        .numPostPbistToCheck    = 0u,
         .tisciPBISTDeviceId     = TISCI_DEV_PBIST2,   /* PBIST device id  */
-        .interruptNumber        = CSLR_MCU_R5FSS0_CORE0_INTR_PBIST2_DFT_PBIST_CPU_0,
         .procRstNeeded          = false,
         .secondaryCoreNeeded    = false,                /* Secondary core needed */
         .coreName               = "Encoder",            /* Primary core          */
@@ -716,36 +437,13 @@ PBIST_TestHandle_t PBIST_TestHandleArray[PBIST_MAX_INSTANCE+1] =
         .coreCustPwrSeqNeeded   = false,
         .numAuxDevices          = 0u,                   /* No Aux devices        */
         .auxInitRestoreFunction = NULL,                 /* Auxilliary init/restore function */
-        .doneFlag               = false,                /* Initialize done flag  */
     },
-    /* Remaining PBIST sections are not currently supported in BootApp */
-#if 0
     /* Decoder */
     {
-        .testName            = "Decoder PBIST",
-        .numPostPbistToCheck = 0u,
-        .PBISTRegsHiAddress  = 0u,
-        .pPBISTRegs          = (CSL_pbistRegs *)CSL_PBIST0_BASE,
-        .numPBISTRuns        = CSL_PBIST0_NUM_TEST_VECTORS,
-        .PBISTConfigRun = {
-            {
-                .override           = 0x0u,
-                /* Override bit set to 0 to use algorithmsBitMap & memoryGroupsBitMap */
-                .algorithmsBitMap   = CSL_PBIST0_ALGO_BITMAP_0,   /* Choose recommended Algo bitmap 0 */
-                .memoryGroupsBitMap = CSL_PBIST0_MEM_BITMAP_0,    /* Choose recommended mem bitmap 0  */
-                .scrambleValue      = 0xFEDCBA9876543210U, /* Scramble Value */
-            },
-            {
-                .override           = 0x0u,
-                /* Override bit set to 0 to use algorithmsBitMap & memoryGroupsBitMap */
-                .algorithmsBitMap   = CSL_PBIST0_ALGO_BITMAP_1,   /* Choose recommended Algo bitmap 1 */
-                .memoryGroupsBitMap = CSL_PBIST0_MEM_BITMAP_1,    /* Choose recommended mem bitmap 1  */
-                .scrambleValue      = 0xFEDCBA9876543210U, /* Scramble Value          */
-            },
-
-        },
+        .testName               = "Decoder PBIST",
+        .pbistInst              = SDL_PBIST_INST_DECODER,
+        .numPostPbistToCheck    = 0u,
         .tisciPBISTDeviceId     = TISCI_DEV_PBIST0,            /* PBIST device id  */
-        .interruptNumber        = CSLR_MCU_R5FSS0_CORE0_INTR_PBIST0_DFT_PBIST_CPU_0,
         .procRstNeeded          = false,
         .secondaryCoreNeeded    = false,                       /* Secondary core needed */
         .coreName               = "Decoder",                   /* Primary core          */
@@ -754,34 +452,15 @@ PBIST_TestHandle_t PBIST_TestHandleArray[PBIST_MAX_INSTANCE+1] =
         .coreCustPwrSeqNeeded   = false,
         .numAuxDevices          = 0u,                          /* No Aux devices        */
         .auxInitRestoreFunction = PBIST_decoderAuxInitRestore, /* Auxilliary init/restore function */
-        .doneFlag               = false,                       /* Initialize done flag  */
     },
+    /* Remaining PBIST sections are not currently supported in BootApp */
+#if 0
     /* GPU */
     {
-        .testName            = "GPU PBIST",
-        .numPostPbistToCheck = 0u,
-        .PBISTRegsHiAddress  = CSL_COMPUTE_CLUSTER0_MSMC_PBIST_BASE,
-        .pPBISTRegs          = (CSL_pbistRegs *)CSL_GPU0_PBIST_CFG_BASE,
-        .numPBISTRuns        = CSL_GPU0_DFT_PBIST_0_NUM_TEST_VECTORS,
-        .PBISTConfigRun = {
-            {
-                .override           = 0x0u,
-                /* Override bit set to 0 to use algorithmsBitMap & memoryGroupsBitMap */
-                .algorithmsBitMap   = CSL_GPU0_DFT_PBIST_0_ALGO_BITMAP_0,   /* Choose recommended Algo bitmap 0 */
-                .memoryGroupsBitMap = CSL_GPU0_DFT_PBIST_0_MEM_BITMAP_0,    /* Choose recommended mem bitmap 0  */
-                .scrambleValue      = 0xFEDCBA9876543210U, /* Scramble Value        */
-            },
-            {
-                .override           = 0x0u,
-                /* Override bit set to 0 to use algorithmsBitMap & memoryGroupsBitMap */
-                .algorithmsBitMap   = CSL_GPU0_DFT_PBIST_0_ALGO_BITMAP_1,   /* Choose recommended Algo bitmap 1 */
-                .memoryGroupsBitMap = CSL_GPU0_DFT_PBIST_0_MEM_BITMAP_1,    /* Choose recommended mem bitmap 1  */
-                .scrambleValue      = 0xFEDCBA9876543210U, /* Scramble Value          */
-            },
-
-        },
-        .tisciPBISTDeviceId     = TISCI_DEV_GPU0,         /* PBIST device id  */
-        .interruptNumber        = CSLR_MCU_R5FSS0_CORE0_INTR_GPU0_DFT_PBIST_0_DFT_PBIST_CPU_0,
+        .testName               = "GPU PBIST",
+        .pbistInst              = SDL_PBIST_INST_GPU,
+        .numPostPbistToCheck    = 0u,
+        .tisciPBISTDeviceId     = TISCI_DEV_GPU0_DFT_PBIST_0, /* PBIST device id  */
         .procRstNeeded          = false,
         .secondaryCoreNeeded    = false,                    /* Secondary core needed */
         .coreName               = "GPU",                    /* Primary core   */
@@ -791,34 +470,13 @@ PBIST_TestHandle_t PBIST_TestHandleArray[PBIST_MAX_INSTANCE+1] =
         .numAuxDevices          = GPU_NUM_AUX_DEVICES,      /* Number of Aux devices   */
         .auxDeviceIdsP          = &PBIST_GPUAuxDevList[0],  /* Array of Aux device ids */
         .auxInitRestoreFunction = PBIST_GPUAuxInitRestore,  /* Auxilliary init/restore function */
-        .doneFlag               = false,                    /* Initialize done flag */
     },
     /* DSS EDP DSI */
     {
-        .testName            = "DSS EDP PBIST",
-        .numPostPbistToCheck = 0u,
-        .PBISTRegsHiAddress  = CSL_COMPUTE_CLUSTER0_MSMC_PBIST_BASE,
-        .pPBISTRegs          = (CSL_pbistRegs *)PBIST_REGION_LOCAL_BASE,
-        .numPBISTRuns        = CSL_PBIST4_NUM_TEST_VECTORS,
-        .PBISTConfigRun = {
-            {
-                .override           = 0x0u,
-                /* Override bit set to 0 to use algorithmsBitMap & memoryGroupsBitMap */
-                .algorithmsBitMap   = CSL_PBIST4_ALGO_BITMAP_0,   /* Choose recommended Algo bitmap 0 */
-                .memoryGroupsBitMap = CSL_PBIST4_MEM_BITMAP_0,    /* Choose recommended mem bitmap  0 */
-                .scrambleValue      = 0xFEDCBA9876543210U, /* Scramble Value */
-            },
-            {
-                .override           = 0x0u,
-                /* Override bit set to 0 to use algorithmsBitMap & memoryGroupsBitMap */
-                .algorithmsBitMap   = CSL_PBIST4_ALGO_BITMAP_1,   /* Choose recommended Algo bitmap 1 */
-                .memoryGroupsBitMap = CSL_PBIST4_MEM_BITMAP_1,    /* Choose recommended mem bitmap  1 */
-                .scrambleValue      = 0xFEDCBA9876543210U, /* Scramble Value */
-            },
-
-        },
+        .testName               = "DSS EDP PBIST",
+        .pbistInst              = SDL_PBIST_INST_DSS,
+        .numPostPbistToCheck    = 0u,
         .tisciPBISTDeviceId     = TISCI_DEV_PBIST4,        /* PBIST device id  */
-        .interruptNumber        = CSLR_MCU_R5FSS0_CORE0_INTR_PBIST4_DFT_PBIST_CPU_0,
         .procRstNeeded          = false,
         .secondaryCoreNeeded    = false,                   /* Secondary core needed */
         .coreName               = "DSS",                   /* Primary core   */
@@ -828,33 +486,18 @@ PBIST_TestHandle_t PBIST_TestHandleArray[PBIST_MAX_INSTANCE+1] =
         .numAuxDevices          = DSS_NUM_AUX_DEVICES,     /* Number of Aux devices   */
         .auxDeviceIdsP          = &PBIST_DSSAuxDevList[0], /* Array of Aux device ids */
         .auxInitRestoreFunction = NULL,                    /* Auxilliary init/restore function */
-        .doneFlag               = false,                   /* Initialize done flag */
     },
     /* MCU PULSAR PBIST */
     {
-        .testName            = "MCU PULSAR PBIST",
-        .numPostPbistToCheck = 0u,
-        .PBISTRegsHiAddress  = 0u,
-        .pPBISTRegs          = (CSL_pbistRegs *)CSL_MCU_PBIST1_BASE,
-        .numPBISTRuns        = CSL_MCU_PBIST1_NUM_TEST_VECTORS,
-        .PBISTConfigRun = {
-            {
-                .override           = 0x0u,
-                /* Override bit set to 0 to use memoryGroupsBitMap */
-                .algorithmsBitMap   = CSL_MCU_PBIST1_ALGO_BITMAP_0,   /* Choose recommended Algo bitmap */
-                /* NOTE: As the MCU R5f is running this code override bit cannot be set to enable all memory test */
-                .memoryGroupsBitMap = CSL_MCU_PBIST1_MEM_BITMAP_0,    /* Choose recommended mem bitmap  */
-                .scrambleValue      = 0xFEDCBA9876543210U, /* Scramble Value */
-            },
-        },
+        .testName               = "MCU PULSAR PBIST",
+        .pbistInst              = SDL_PBIST_INST_MCUR5F1,
+        .numPostPbistToCheck    = 0u,
         .tisciPBISTDeviceId     = TISCI_DEV_MCU_PBIST1,       /* PBIST device id */
-        .interruptNumber        = CSLR_MCU_R5FSS0_CORE0_INTR_MCU_PBIST1_DFT_PBIST_CPU_0,
         .procRstNeeded          = false,
         .secondaryCoreNeeded    = false,                   /* Secondary core needed */
         .coreCustPwrSeqNeeded   = false,
         .numAuxDevices          = 0u,                      /* No Aux devices */
         .auxInitRestoreFunction = NULL,                    /* Auxilliary init/restore function */
-        .doneFlag               = false,                   /* Initialize done flag */
     },
 #endif
 };
@@ -890,8 +533,7 @@ int32_t PBIST_A72AuxInitRestore(bool init)
     result = CSL_ratConfigRegionTranslation((CSL_ratRegs *)PBIST_RAT_CFG_BASE,
                                             PBIST_RAT_REGION2_INDEX, &translationCfg);
     if (result == false) {
-        AppUtils_Printf(MSG_NORMAL,
-                        "   CSL_ratConfigRegionTranslation...FAILED \n");
+        UART_printf("   CSL_ratConfigRegionTranslation...FAILED \n");
         testResult = -1;
     }
 
@@ -912,8 +554,7 @@ int32_t PBIST_A72AuxInitRestore(bool init)
         result = CSL_ratDisableRegionTranslation((CSL_ratRegs *)PBIST_RAT_CFG_BASE,
                                                  PBIST_RAT_REGION2_INDEX);
         if (result == false) {
-            AppUtils_Printf(MSG_NORMAL,
-                            "   CSL_ratDisableRegionTranslation...FAILED \n");
+            UART_printf("   CSL_ratDisableRegionTranslation...FAILED \n");
             testResult = -1;
         }
     }
@@ -967,9 +608,11 @@ int32_t PBIST_decoderAuxInitRestore(bool init)
 
     if (init)
     {
-        *((uint32_t *)(((uint32_t)localP) + 0x440)) = 0xffff0113;
-        *((uint32_t *)(((uint32_t)localP) + 0x444)) = 0x00000000;
-        *((uint32_t *)(((uint32_t)localP) + 0x24020)) = 0x00070840;
+        *((uint32_t *)(((uint32_t)localP) + 0x440)) = 0xffffffff;
+        *((uint32_t *)(((uint32_t)localP) + 0x444)) = 0xffffffff;
+        *((uint32_t *)(((uint32_t)localP) + 0x24020)) = 0xffffffff;
+        *((uint32_t *)(((uint32_t)localP) + 0x4020)) = 0xffffffff;
+        *((uint32_t *)(((uint32_t)localP) + 0x3020)) = 0xffffffff;
     }
     else
     {
@@ -996,8 +639,7 @@ int32_t PBIST_GPUAuxInitRestore(bool init)
     result = CSL_ratConfigRegionTranslation((CSL_ratRegs *)PBIST_RAT_CFG_BASE,
                                             PBIST_RAT_REGION2_INDEX, &translationCfg);
     if (result == false) {
-        AppUtils_Printf(MSG_NORMAL,
-                        "   CSL_ratConfigRegionTranslation...FAILED \n");
+        UART_printf("   CSL_ratConfigRegionTranslation...FAILED \n");
         testResult = -1;
     }
 
@@ -1005,7 +647,7 @@ int32_t PBIST_GPUAuxInitRestore(bool init)
     {
         if (init)
         {
-            *((uint64_t *)(((uint32_t)localP) + 0xA100)) = 0xffff0113;
+            *((uint64_t *)(((uint32_t)localP) + 0xA100)) = 0x0;
 
             while(*((uint64_t *)(((uint32_t)localP) + 0xA100)) !=  (uint64_t)0x0);
             *((uint64_t *)(((uint32_t)localP) + 0x00)) = 0x0555550015155555;
@@ -1022,11 +664,38 @@ int32_t PBIST_GPUAuxInitRestore(bool init)
         result = CSL_ratDisableRegionTranslation((CSL_ratRegs *)PBIST_RAT_CFG_BASE,
                                                  PBIST_RAT_REGION2_INDEX);
         if (result == false) {
-            AppUtils_Printf(MSG_NORMAL,
-                            "   CSL_ratDisableRegionTranslation...FAILED \n");
+            UART_printf("   CSL_ratDisableRegionTranslation...FAILED \n");
             testResult = -1;
         }
     }
 
     return testResult;
 }
+
+char * PBIST_getPostStatusString(SDL_PBIST_postStatus postStatus)
+{
+    if (postStatus == SDL_PBIST_POST_NOT_RUN)
+    {
+        return PBIST_POST_NOT_RUN_STR;
+    }
+    else if (postStatus == SDL_PBIST_POST_TIMEOUT)
+    {
+        return PBIST_POST_ATTEMPTED_TIMEOUT_STR;
+    }
+    else if (postStatus == SDL_PBIST_POST_COMPLETED_FAILURE)
+    {
+        return PBIST_POST_COMPLETED_FAILURE_STR;
+    }
+    else if (postStatus == SDL_PBIST_POST_COMPLETED_SUCCESS)
+    {
+        return PBIST_POST_COMPLETED_SUCCESS_STR;
+    }
+    return NULL;
+}
+
+void PBIST_printPostStatus(SDL_PBIST_postResult *result)
+{
+    UART_printf("    HW POST MCU Status : %s\n", (PBIST_getPostStatusString(result->mcuPostStatus)) ? : "Invalid");
+
+    return;
+}
diff --git a/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/soc/j721e/pbist_defs.h b/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/soc/j721e/pbist_defs.h
index fd0427c8d5396e845890c136b666099b468ac9e6..881dc30f476b6a6b37e6a3099973d8775920de1e 100644
--- a/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/soc/j721e/pbist_defs.h
+++ b/psdkra/mcusw/mcuss_demos/boot_app_mcu_rtos/soc/j721e/pbist_defs.h
@@ -1,5 +1,5 @@
 /********************************************************************
- * Copyright (C) 2020 Texas Instruments Incorporated.
+ * Copyright (C) 2022 Texas Instruments Incorporated.
  *
  *  Redistribution and use in source and binary forms, with or without
  *  modification, are permitted provided that the following conditions
@@ -52,16 +52,17 @@ extern "C"
 /* ========================================================================== */
 /*                           Macros & Typedefs                                */
 /* ========================================================================== */
+
+#define PBIST_REGION_LOCAL_BASE           (0x60000000u)
+
+#define PBIST_REGION2_LOCAL_BASE          (0x68000000u)
+
 #define PBIST_RAT_REGION_INDEX            0
 #define PBIST_RAT_REGION2_INDEX           1
 
 #define PBIST_REG_REGION_SIZE             (0x400u)
 #define PBIST_REG_REGION2_SIZE            (0x10000u)
 
-#define PBIST_MAX_TIMEOUT_VALUE           (100000000u)
-
-#define PBIST_MAX_NUM_RUNS                2
-
 /* Firewall definitions */
 #define FW_REGION_ENABLE                  (0xAU)
 #define FW_MCU_R5F0_PRIVID                (96U)
@@ -78,13 +79,8 @@ typedef int32_t (*PBIST_auxInitRestoreFunctionPtr)(bool init);
 typedef struct PBIST_TestHandle_s
 {
     char               testName[PBIST_INSTANCE_NAME_MAX_LENGTH];
-    uint64_t           PBISTRegsHiAddress;
-    uint64_t           deviceRegsHiAddress;
-    CSL_pbistRegs     *pPBISTRegs;
-    CSL_PBIST_config_t PBISTConfigRun[PBIST_MAX_NUM_RUNS];
-    uint32_t           numPBISTRuns;
+    SDL_PBIST_inst     pbistInst;
     uint32_t           tisciPBISTDeviceId;
-    uint32_t           interruptNumber;
     bool               procRstNeeded;
     bool               secondaryCoreNeeded;
     char               coreName[16];
@@ -93,7 +89,6 @@ typedef struct PBIST_TestHandle_s
     uint32_t           tisciSecProcId;
     uint32_t           tisciDeviceId;
     uint32_t           tisciSecDeviceId;
-    volatile bool      doneFlag;
     bool               coreCustPwrSeqNeeded;
     uint8_t            numPostPbistToCheck;
     uint32_t           numAuxDevices;
@@ -107,7 +102,7 @@ extern PBIST_TestHandle_t PBIST_TestHandleArray[PBIST_MAX_INSTANCE+1];
 /*                          Function Declarations                             */
 /* ========================================================================== */
 
-/* None */
+void PBIST_printPostStatus(SDL_PBIST_postResult *result);
 
 #ifdef __cplusplus
 }
