diff --git a/psdkla/board-support/linux-5.10.120+gitAUTOINC+95b90aa828-g95b90aa828/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/psdkla/board-support/linux-5.10.120+gitAUTOINC+95b90aa828-g95b90aa828/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
index c20ecc5fd..a4ad4ca1d 100755
--- a/psdkla/board-support/linux-5.10.120+gitAUTOINC+95b90aa828-g95b90aa828/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
+++ b/psdkla/board-support/linux-5.10.120+gitAUTOINC+95b90aa828-g95b90aa828/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
@@ -94,9 +94,9 @@
 	};
 
 	sound0: sound@0 {
+		status = "disabled";
 		compatible = "ti,j721e-cpb-audio";
 		model = "j721e-cpb";
-
 		ti,cpb-mcasp = <&mcasp10>;
 		ti,cpb-codec = <&pcm3168a_1>;
 
@@ -139,7 +139,7 @@
 		compatible = "ti,j721e-cpsw-virt-mac";
 		dma-coherent;
 		ti,psil-base = <0x4a00>;
-		ti,remote-name = "mpu_1_0_ethmac-device-1";
+		ti,remote-name = "mpu_1_0_ethmac-device-6";
 
 		dmas = <&main_udmap 0xca00>,
 		       <&main_udmap 0xca01>,
@@ -782,6 +782,7 @@
 	};
 
 	pcm3168a_1: audio-codec@44 {
+					status = "disabled";
 		compatible = "ti,pcm3168a";
 		reg = <0x44>;
 
@@ -847,7 +848,7 @@
 	 * VP2 - DSI
 	 * VP3 - DPI1
 	 */
-
+	status = "disabled";
 	assigned-clocks = <&k3_clks 152 1>,
 			  <&k3_clks 152 4>,
 			  <&k3_clks 152 9>,
@@ -859,6 +860,7 @@
 };
 
 &dss_ports {
+	status = "disabled";
 	port@0 {
 		reg = <0>;
 
@@ -933,6 +935,7 @@
 };
 
 &mcasp10 {
+	status = "disabled";
 	#sound-dai-cells = <0>;
 
 	pinctrl-names = "default";
diff --git a/psdkra/ethfw/utils/board/src/j721e/board_j721e_evm.c b/psdkra/ethfw/utils/board/src/j721e/board_j721e_evm.c
index dfc21e61c..29da111bc 100755
--- a/psdkra/ethfw/utils/board/src/j721e/board_j721e_evm.c
+++ b/psdkra/ethfw/utils/board/src/j721e/board_j721e_evm.c
@@ -293,6 +293,23 @@ static EthFwBoard_MacPortCfg gEthFw_gesiMacPortCfg[] =
         //.sgmiiMode = ENET_MAC_SGMIIMODE_INVALID,
 		.linkCfg   = { ENET_SPEED_AUTO, ENET_DUPLEX_AUTO },
     },
+
+    {   /* "PRG0_RGMII02_T" */
+        .macPort   = ENET_MAC_PORT_6,
+        .mii       = { ENET_MAC_LAYER_GMII, ENET_MAC_SUBLAYER_REDUCED },
+        .phyCfg    =
+        {
+            .phyAddr         = 7U,
+            .isStrapped      = false,
+            .skipExtendedCfg = false,
+            //.extendedCfg     = &gEnetGesiBoard_dp83867PhyCfg,
+            //.extendedCfgSize = sizeof(gEnetGesiBoard_dp83867PhyCfg),
+            .extendedCfg     = NULL,
+            .extendedCfgSize = 0U,
+        },
+        //.sgmiiMode = ENET_MAC_SGMIIMODE_INVALID,
+		.linkCfg   = { ENET_SPEED_AUTO, ENET_DUPLEX_AUTO },
+    },
 };
 
 /* 4 x QSGMII ports in QEnet expansion board */
diff --git a/psdkra/pdk_jacinto_08_04_00_21/packages/ti/board/src/j721e_evm/J721E_pinmux_data_gesi_cpsw9g.c b/psdkra/pdk_jacinto_08_04_00_21/packages/ti/board/src/j721e_evm/J721E_pinmux_data_gesi_cpsw9g.c
index 3cf3b3cd9..8402981d9 100755
--- a/psdkra/pdk_jacinto_08_04_00_21/packages/ti/board/src/j721e_evm/J721E_pinmux_data_gesi_cpsw9g.c
+++ b/psdkra/pdk_jacinto_08_04_00_21/packages/ti/board/src/j721e_evm/J721E_pinmux_data_gesi_cpsw9g.c
@@ -591,6 +591,70 @@ static pinmuxPerCfg_t gRgmii8PinCfg[] =
     {PINMUX_END}
 };
 
+static pinmuxPerCfg_t gRgmii6PinCfg[] =
+{
+    /* MyRGMII1 -> RGMII6_RD0 -> W25 */
+    {
+        PIN_RGMII6_RD0, PIN_MODE(0) | \
+        ((PIN_PULL_DISABLE | PIN_INPUT_ENABLE) & (~PIN_PULL_DIRECTION))
+    },
+    /* MyRGMII1 -> RGMII6_RD1 -> W24 */
+    {
+        PIN_RGMII6_RD1, PIN_MODE(0) | \
+        ((PIN_PULL_DISABLE | PIN_INPUT_ENABLE) & (~PIN_PULL_DIRECTION))
+    },
+    /* MyRGMII1 -> RGMII6_RD2 -> Y27 */
+    {
+        PIN_RGMII6_RD2, PIN_MODE(0) | \
+        ((PIN_PULL_DISABLE | PIN_INPUT_ENABLE) & (~PIN_PULL_DIRECTION))
+    },
+    /* MyRGMII1 -> RGMII6_RD3 -> Y29 */
+    {
+        PIN_RGMII6_RD3, PIN_MODE(0) | \
+        ((PIN_PULL_DISABLE | PIN_INPUT_ENABLE) & (~PIN_PULL_DIRECTION))
+    },
+    /* MyRGMII1 -> RGMII6_RXC -> W26 */
+    {
+        PIN_RGMII6_RXC, PIN_MODE(0) | \
+        ((PIN_PULL_DISABLE | PIN_INPUT_ENABLE) & (~PIN_PULL_DIRECTION))
+    },
+    /* MyRGMII1 -> RGMII6_RX_CTL -> V23 */
+    {
+        PIN_RGMII6_RX_CTL, PIN_MODE(0) | \
+        ((PIN_PULL_DISABLE | PIN_INPUT_ENABLE) & (~PIN_PULL_DIRECTION))
+    },
+    /* MyRGMII1 -> RGMII6_TD0 -> W27 */
+    {
+        PIN_RGMII6_TD0, PIN_MODE(0) | \
+        ((PIN_PULL_DISABLE) & (~PIN_PULL_DIRECTION & ~PIN_INPUT_ENABLE))
+    },
+    /* MyRGMII1 -> RGMII6_TD1 -> V25 */
+    {
+        PIN_RGMII6_TD1, PIN_MODE(0) | \
+        ((PIN_PULL_DISABLE) & (~PIN_PULL_DIRECTION & ~PIN_INPUT_ENABLE))
+    },
+    /* MyRGMII1 -> RGMII6_TD2 -> W28 */
+    {
+        PIN_RGMII6_TD2, PIN_MODE(0) | \
+        ((PIN_PULL_DISABLE) & (~PIN_PULL_DIRECTION & ~PIN_INPUT_ENABLE))
+    },
+    /* MyRGMII1 -> RGMII6_TD3 -> W23 */
+    {
+        PIN_RGMII6_TD3, PIN_MODE(0) | \
+        ((PIN_PULL_DISABLE) & (~PIN_PULL_DIRECTION & ~PIN_INPUT_ENABLE))
+    },
+    /* MyRGMII1 -> RGMII6_TXC -> W29 */
+    {
+        PIN_RGMII6_TXC, PIN_MODE(0) | \
+        ((PIN_PULL_DISABLE) & (~PIN_PULL_DIRECTION & ~PIN_INPUT_ENABLE))
+    },
+    /* MyRGMII1 -> RGMII6_TX_CTL -> Y28 */
+    {
+        PIN_RGMII6_TX_CTL, PIN_MODE(0) | \
+        ((PIN_PULL_DISABLE) & (~PIN_PULL_DIRECTION & ~PIN_INPUT_ENABLE))
+    },
+    {PINMUX_END}
+};
 /*static pinmuxModuleCfg_t gRgmiiPinCfg[] =
 {
     {3, TRUE, gRgmii3PinCfg},
@@ -605,6 +669,7 @@ static pinmuxModuleCfg_t g_MtRgmiiPinCfg[] =
 	{3, FALSE, gRgmii3PinCfg},
 	{4, FALSE, gRmii4PinCfg},
 	{1, TRUE, gRmii1PinCfg},
+	{6, TRUE, gRgmii6PinCfg},
 	{2, FALSE, gRgmii2PinCfg},
     {PINMUX_END}
 };
diff --git a/psdkra/pdk_jacinto_08_04_00_21/packages/ti/board/src/j721e_evm/board_ethernet_config.c b/psdkra/pdk_jacinto_08_04_00_21/packages/ti/board/src/j721e_evm/board_ethernet_config.c
index 8fb4422f0..5c312b062 100755
--- a/psdkra/pdk_jacinto_08_04_00_21/packages/ti/board/src/j721e_evm/board_ethernet_config.c
+++ b/psdkra/pdk_jacinto_08_04_00_21/packages/ti/board/src/j721e_evm/board_ethernet_config.c
@@ -713,6 +713,10 @@ Board_STATUS Board_ethConfigCpsw9g(void)
         {
             status = Board_cpsw9gEthConfig(portNum, RMII);
         }
+		else if( 5u == portNum || 7u == portNum)
+		{
+            status = Board_cpsw9gEthConfig(portNum, RGMII);
+		}
         else
         {
             if (1U == portNum)
diff --git a/psdkra/pdk_jacinto_08_04_00_21/packages/ti/drv/enet/soc/j7x/j721e/enet_soc.c b/psdkra/pdk_jacinto_08_04_00_21/packages/ti/drv/enet/soc/j7x/j721e/enet_soc.c
index f67bcf81b..00baefad1 100755
--- a/psdkra/pdk_jacinto_08_04_00_21/packages/ti/drv/enet/soc/j7x/j721e/enet_soc.c
+++ b/psdkra/pdk_jacinto_08_04_00_21/packages/ti/drv/enet/soc/j7x/j721e/enet_soc.c
@@ -1463,7 +1463,7 @@ int32_t EnetSoc_getMacPortMii(Enet_Type enetType,
             EnetSoc_assert(false, "Invalid peripheral type: %u\n", enetType);
             break;
     }
-
+	/*EnetSoc_assert(false,"jinmin--- enetType=%d, modesel=%d\n",,enetType,modeSel);*/
     if (status == ENET_SOK)
     {
         switch (modeSel)
diff --git a/psdkra/pdk_jacinto_08_04_00_21/packages/ti/drv/enet/src/mod/cpsw_macport.c b/psdkra/pdk_jacinto_08_04_00_21/packages/ti/drv/enet/src/mod/cpsw_macport.c
index 1fb23b830..6dad3f626 100644
--- a/psdkra/pdk_jacinto_08_04_00_21/packages/ti/drv/enet/src/mod/cpsw_macport.c
+++ b/psdkra/pdk_jacinto_08_04_00_21/packages/ti/drv/enet/src/mod/cpsw_macport.c
@@ -906,6 +906,7 @@ int32_t CpswMacPort_ioctl(EnetMod_Handle hMod,
                 const EnetMacPort_LinkCfg *linkCfg = (const EnetMacPort_LinkCfg *)prms->inArgs;
                 EnetMacPort_Interface mii;
 
+                ENETTRACE_ERR("jinmin--- enetType=%d,instId=%d,macport=%d\n", hPort->enetType, hPort->instId, macPort);
                 status = EnetSoc_getMacPortMii(hPort->enetType, hPort->instId, macPort, &mii);
                 if (status == ENET_SOK)
                 {
diff --git a/psdkra/pdk_jacinto_08_04_00_21/packages/ti/drv/enet/src/phy/enetphy.c b/psdkra/pdk_jacinto_08_04_00_21/packages/ti/drv/enet/src/phy/enetphy.c
index 70a575163..69753a654 100644
--- a/psdkra/pdk_jacinto_08_04_00_21/packages/ti/drv/enet/src/phy/enetphy.c
+++ b/psdkra/pdk_jacinto_08_04_00_21/packages/ti/drv/enet/src/phy/enetphy.c
@@ -180,10 +180,12 @@ extern EnetPhy_Drv gEnetPhyDrvDp83822;
 extern EnetPhy_Drv gEnetPhyDrvDp83867;
 extern EnetPhy_Drv gEnetPhyDrvVsc8514;
 extern EnetPhy_Drv gEnetPhyDrvTja1101;
+extern EnetPhy_Drv gEnetPhyDrvDummy;
 
 /*! \brief All the registered PHY specific drivers. */
 static EnetPhyDrv_Handle gEnetPhyDrvs[] =
 {
+    &gEnetPhyDrvDummy,   /*Dummy */
     &gEnetPhyDrvVsc8514,   /* VSC8514 */
     &gEnetPhyDrvDp83822,   /* DP83822 */
     &gEnetPhyDrvDp83867,   /* DP83867 */
@@ -313,7 +315,10 @@ EnetPhy_Handle EnetPhy_open(const EnetPhy_Cfg *phyCfg,
         /* Take a shortcut to FOUND state if PHY is already alive, will save some
          * hundreds of msecs.  Take a shorter shortcut to LINK_WAIT state if PHY
          * is strap configured */
-        alive = EnetPhy_isAlive(hPhy);
+		if(hPhy->addr == 7)
+			alive = true;
+		else
+			alive = EnetPhy_isAlive(hPhy);
         if (alive)
         {
             EnetPhy_initState(hPhy);
@@ -508,13 +513,22 @@ bool EnetPhy_isAlive(EnetPhy_Handle hPhy)
     /* Get PHY alive status */
     if (hMdio->isAlive != NULL)
     {
-        /* Get alive status from MDIO driver (i.e. hardware assisted) */
-        status = hMdio->isAlive(phyAddr, &isAlive, hPhy->mdioArgs);
-        ENETTRACE_ERR_IF(status != ENETPHY_SOK,
-                         "PHY %u: Failed to get alive status: %d\n", phyAddr, status);
+		ENETTRACE_ERR_IF(true,"jinmin----- in 1\n");
+		if(hPhy->addr == 7)
+			return true;
+		else
+		{
+			/* Get alive status from MDIO driver (i.e. hardware assisted) */
+			status = hMdio->isAlive(phyAddr, &isAlive, hPhy->mdioArgs);
+			ENETTRACE_ERR_IF(status != ENETPHY_SOK,
+					"PHY %u: Failed to get alive status: %d\n", phyAddr, status);
+		}
     }
     else
     {
+		ENETTRACE_ERR_IF(true,"jinmin----- in 2\n");
+		if(hPhy->addr == 7)
+			return true;
         /* Alternatively, read BMSR - PHY is alive if transaction is successful */
         status = hMdio->readC22(phyGroup, phyAddr, PHY_BMSR, &val, hPhy->mdioArgs);
         ENETTRACE_ERR_IF(status != ENETPHY_SOK,
@@ -543,21 +557,21 @@ int32_t EnetPhy_getId(EnetPhy_Handle hPhy,
         status = ENETPHY_EFAIL;
     }
 
-    if (status == ENETPHY_SOK)
+    if (status == ENETPHY_SOK && hPhy->addr !=7)
     {
         status = EnetPhy_readReg(hPhy, PHY_PHYIDR1, &id1);
         ENETTRACE_ERR_IF(status != ENETPHY_SOK,
                          "PHY %u: Failed to read ID1 register: %d\n", phyAddr, status);
     }
 
-    if (status == ENETPHY_SOK)
+    if (status == ENETPHY_SOK && hPhy->addr !=7)
     {
         status = EnetPhy_readReg(hPhy, PHY_PHYIDR2, &id2);
         ENETTRACE_ERR_IF(status != ENETPHY_SOK,
                          "PHY %u: Failed to read ID2 register: %d\n", phyAddr, status);
     }
 
-    if (status == ENETPHY_SOK)
+    if (status == ENETPHY_SOK && hPhy->addr !=7)
     {
         version->oui      = ((uint32_t)id1 << PHYIDR1_OUI_OFFSET);
         version->oui     |= (id2 & PHYIDR2_OUI_MASK)  >> PHYIDR2_OUI_OFFSET;
@@ -565,6 +579,13 @@ int32_t EnetPhy_getId(EnetPhy_Handle hPhy,
         version->revision = (id2 & PHYIDR2_VREV_MASK) >> PHYIDR2_VREV_OFFSET;
     }
 
+	if(hPhy->addr == 7)
+	{
+		version->oui=0x6038;
+		version->model=0x11;
+		version->revision=0x2;
+	}
+
     return status;
 }
 
@@ -951,6 +972,12 @@ static void EnetPhy_initState(EnetPhy_Handle hPhy)
 		state->duplexity = ENETPHY_DUPLEX_FULL;
 		state->phyLinkCaps = 0U;
 	}
+	else if(hPhy->addr == 7)
+	{
+		state->speed = ENETPHY_SPEED_1GBIT;
+		state->duplexity = ENETPHY_DUPLEX_FULL;
+		state->phyLinkCaps = 0U;
+	}
 	else
 	{
 		state->speed = ENETPHY_SPEED_10MBIT;
@@ -1080,8 +1107,9 @@ static void EnetPhy_enableState(EnetPhy_Handle hPhy)
 
     /* Enable PHY (resetting it if applicable) can be done only when
      * entering the ENABLE state for the first time */
-    if (state->needsNwayCfg ||
-        state->needsManualCfg)
+    if ((state->needsNwayCfg ||
+        state->needsManualCfg) && 
+		(hPhy->addr != 7))
     {
         /* Set PHY in normal mode */
         ENETTRACE_DBG("PHY %u: enable\n", hPhy->addr);
@@ -1101,8 +1129,11 @@ static void EnetPhy_enableState(EnetPhy_Handle hPhy)
 
 	if(hPhy->addr == 4)
 		state->phyLinkCaps =  ENETPHY_LINK_CAP_FD100;
+	else if (hPhy->addr == 7)
+		state->phyLinkCaps =  ENETPHY_LINK_CAP_FD1000;
 	else
 		state->phyLinkCaps = EnetPhy_getLocalCaps(hPhy);
+	ENETTRACE_DBG("jinmin-------- 1\n");
     ENETTRACE_DBG("PHY %u: PHY caps: %s\n",
                   hPhy->addr, EnetPhy_getCapsString(state->phyLinkCaps));
 
@@ -1122,7 +1153,11 @@ static void EnetPhy_enableState(EnetPhy_Handle hPhy)
 
         /* Enable NWAY if requested by app (via auto-speed or auto-duplex) and
          * supported by PHY */
+		if(hPhy->addr!=7)
         state->isNwayCapable = EnetPhy_isNwayCapable(hPhy);
+		else
+			state->isNwayCapable = false;
+
         ENETTRACE_DBG("PHY %u: PHY is %sNWAY-capable\n",
                       hPhy->addr, state->isNwayCapable ? "" : "not ");
 
@@ -1282,6 +1317,7 @@ static void EnetPhy_setupManual(EnetPhy_Handle hPhy,
             val |= BMCR_LOOPBACK;
         }
 
+		if(hPhy->addr !=7 )
         EnetPhy_rmwReg(hPhy, PHY_BMCR,
                        BMCR_LOOPBACK | BMCR_SPEED1000 | BMCR_SPEED100 | BMCR_FD,
                        val);
@@ -1407,38 +1443,43 @@ static void EnetPhy_linkWaitState(EnetPhy_Handle hPhy)
     EnetPhy_State *state = &hPhy->state;
     uint32_t nwayCaps;
     uint16_t status;
-
-    EnetPhy_readReg(hPhy, PHY_BMSR, &status);
-
-    if ((status & BMSR_LINKSTS) != 0U)
-    {
-        /* Populate FSM state now as most FSM states are bypassed for strapped PHYs */
-        if (hPhy->phyCfg.isStrapped)
-        {
-            state->phyLinkCaps = EnetPhy_getLocalCaps(hPhy);
-            nwayCaps = EnetPhy_findCommonNwayCaps(hPhy);
-            if (nwayCaps != 0U)
-            {
-                EnetPhy_capToMode(nwayCaps, &state->speed, &state->duplexity);
-
-                ENETTRACE_DBG("PHY %u: negotiated mode: %s\n",
-                              hPhy->addr, EnetPhy_getModeString(state->speed, state->duplexity));
-            }
-        }
-
+	
+	if(hPhy->addr != 7)
+	{
+		EnetPhy_readReg(hPhy, PHY_BMSR, &status);
+
+		if ((status & BMSR_LINKSTS) != 0U)
+		{
+			/* Populate FSM state now as most FSM states are bypassed for strapped PHYs */
+			if (hPhy->phyCfg.isStrapped)
+			{
+				state->phyLinkCaps = EnetPhy_getLocalCaps(hPhy);
+				nwayCaps = EnetPhy_findCommonNwayCaps(hPhy);
+				if (nwayCaps != 0U)
+				{
+					EnetPhy_capToMode(nwayCaps, &state->speed, &state->duplexity);
+
+					ENETTRACE_DBG("PHY %u: negotiated mode: %s\n",
+							hPhy->addr, EnetPhy_getModeString(state->speed, state->duplexity));
+				}
+			}
+
+			EnetPhy_setNextState(hPhy, ENETPHY_FSM_STATE_LINKED);
+		}
+		else
+		{
+			if (state->timeout != 0U)
+			{
+				state->timeout--;
+			}
+			else
+			{
+				EnetPhy_phyTimeout(hPhy);
+			}
+		}
+	}
+	else
         EnetPhy_setNextState(hPhy, ENETPHY_FSM_STATE_LINKED);
-    }
-    else
-    {
-        if (state->timeout != 0U)
-        {
-            state->timeout--;
-        }
-        else
-        {
-            EnetPhy_phyTimeout(hPhy);
-        }
-    }
 }
 
 static void EnetPhy_linkedState(EnetPhy_Handle hPhy)
@@ -1662,7 +1703,8 @@ static bool EnetPhy_isPhyLinked(EnetPhy_Handle hPhy)
     bool isLinked = false;
     uint16_t val = 0U;
     int32_t status;
-
+	if(hPhy->addr==7)
+		return true;
     /* Get PHY link status */
     if (hMdio->isLinked != NULL)
     {
diff --git a/psdkra/pdk_jacinto_08_04_00_21/packages/ti/drv/enet/src/phy/makefile b/psdkra/pdk_jacinto_08_04_00_21/packages/ti/drv/enet/src/phy/makefile
index f6715cfb2..1f1ac17b7 100644
--- a/psdkra/pdk_jacinto_08_04_00_21/packages/ti/drv/enet/src/phy/makefile
+++ b/psdkra/pdk_jacinto_08_04_00_21/packages/ti/drv/enet/src/phy/makefile
@@ -19,7 +19,7 @@ INCLUDE_INTERNAL_INTERFACES =
 
 # Common source files and CFLAGS across all platforms and cores
 SRCS_COMMON += enetphy.c generic_phy.c
-SRCS_COMMON += dp83867.c dp83822.c vsc8514.c tja1101.c
+SRCS_COMMON += dp83867.c dp83822.c vsc8514.c tja1101.c dummy.c
 
 PACKAGE_SRCS_COMMON = $(SRCDIR)
 CFLAGS_LOCAL_COMMON = $(PDK_CFLAGS) $(ENET_CFLAGS)
