From 9b8a4c2e21e14ded4e6b4bac55719297d395da4a Mon Sep 17 00:00:00 2001 From: Dusan Date: Mon, 9 Sep 2024 12:34:07 +0000 Subject: [PATCH] Modifying U-Boot to reduce RAM memory 32GB->16GB --- arch/arm/dts/k3-j784s4-ddr-evm-lp4-4266.dtsi | 2 +- arch/arm/dts/k3-j784s4-ddr.dtsi | 2 ++ arch/arm/dts/k3-j784s4-evm.dts | 4 ++-- 3 files changed, 5 insertions(+), 3 deletions(-) diff --git a/arch/arm/dts/k3-j784s4-ddr-evm-lp4-4266.dtsi b/arch/arm/dts/k3-j784s4-ddr-evm-lp4-4266.dtsi index 0e16d2f2..b7fb907f 100644 --- a/arch/arm/dts/k3-j784s4-ddr-evm-lp4-4266.dtsi +++ b/arch/arm/dts/k3-j784s4-ddr-evm-lp4-4266.dtsi @@ -14,7 +14,7 @@ #define MULTI_DDR_CFG_INTRLV_SIZE 12 #define MULTI_DDR_CFG_ECC_ENABLE 0 #define MULTI_DDR_CFG_HYBRID_SELECT 24 -#define MULTI_DDR_CFG_EMIFS_ACTIVE 15 +#define MULTI_DDR_CFG_EMIFS_ACTIVE 3 #define DDRSS0_CTL_00_DATA 0x00000B00 #define DDRSS0_CTL_01_DATA 0x00000000 diff --git a/arch/arm/dts/k3-j784s4-ddr.dtsi b/arch/arm/dts/k3-j784s4-ddr.dtsi index fc74c539..4538521c 100644 --- a/arch/arm/dts/k3-j784s4-ddr.dtsi +++ b/arch/arm/dts/k3-j784s4-ddr.dtsi @@ -4446,6 +4446,7 @@ }; memorycontroller2: memorycontroller@29d0000 { + status = "disabled"; compatible = "ti,j721s2-ddrss"; reg = <0x0 0x029d0000 0x0 0x4000>, <0x0 0x0114000 0x0 0x100>, @@ -6655,6 +6656,7 @@ }; memorycontroller3: memorycontroller@29f0000 { + status = "disabled"; compatible = "ti,j721s2-ddrss"; reg = <0x0 0x029f0000 0x0 0x4000>, <0x0 0x0114000 0x0 0x100>, diff --git a/arch/arm/dts/k3-j784s4-evm.dts b/arch/arm/dts/k3-j784s4-evm.dts index afd84a6d..e4b80a55 100644 --- a/arch/arm/dts/k3-j784s4-evm.dts +++ b/arch/arm/dts/k3-j784s4-evm.dts @@ -34,9 +34,9 @@ memory@80000000 { device_type = "memory"; bootph-all; - /* 32G RAM */ + /* 16G RAM */ reg = <0x00000000 0x80000000 0x00000000 0x80000000>, - <0x00000008 0x80000000 0x00000007 0x80000000>; + <0x00000008 0x80000000 0x00000003 0x80000000>; }; reserved_memory: reserved-memory { -- 2.34.1