-------------------------------------------------------------------------------
--  TI AM62 SOC with Boundary Scan                                           --
-------------------------------------------------------------------------------
--  Supported Devices: AM62 Revision 1.0                                     --
-------------------------------------------------------------------------------
--  Created by    : Texas Instruments Incorporated                           --
--  Documentation : AM62 Users Guide                                         --
--                                                                           --
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
--                                                                           --
--                          IMPORTANT NOTICE                                 --
--  Texas Instruments and its subsidiaries (TI) reserve the right to make    --
--  changes to their products or to discontinue any product or service       --
--  without notice, and advise customers to obtain the latest version of     --
--  relevant information to verify, before placing orders, that information  --
--  being relied on is current and complete. All products are sold subject   --
--  to the terms and conditions of sale supplied at the time of order        --
--  acknowledgment, including those pertaining to warranty, patent infringe- --
--  ment, and limitation of liability.                                       --
--                                                                           --
--  TI warrants performance of its products to the specifications applicable --
--  at the time of sale in accordance with TI's standard warranty. Testing   --
--  and other quality control techniques are utilized to the extent TI deems --
--  necessary to support this warranty. Specific testing of all parameters   --
--  of each device is not necessarily performed, except those mandated by    --
--  government requirements.                                                 --
--                                                                           --
--  Customers are responsible for their applications using TI components.    --
--  In order to minimize risks associated with the customer's applications,  --
--  adequate design and operating safeguards must be provided by the         --
--  customer to minimize inherent or procedural hazards.                     --
--                                                                           --
--  TI assumes no liability for applications assistance or customer product  --
--  design. TI does not warrant or represent that any license, either        --
--  express or implied, is granted under any patent right, copyright, mask   --
--  work right, or other intellectual property right of TI covering or       --
--  relating to any combination, machine, or process in which such products  --
--  or services might be or are used. TI's publication of information        --
--  regarding any third party's products or services does not constitute     --
--  TI's approval, license, warranty or endorsement thereof.                 --
--                                                                           --
--  Reproduction of information in TI data books or data sheets is           --
--  permissible only if reproduction is without alteration and is            --
--  accompanied by all associated warranties, conditions, limitations and    --
--  notices.  Representation or reproduction of this information with        --
--  alteration voids all warranties provided for an associated TI product or --
--  service, is an unfair and deceptive business practice, and TI is not     --
--  responsible nor liable for any such use.                                 --
--                                                                           --
--  Resale of TI's products or services with statements different from or    --
--  beyond the parameters stated by TI for that product or service voids     --
--  all express and any implied warranties for the associated TI product or  --
--  service, is an unfair and deceptive business practice, and TI is not     --
--  responsible nor liable for any such use.                                 --
--                                                                           --
--  Also see: Standard Terms and Conditions of Sale for Semiconductor        --
--  Products. www.ti.com/sc/docs/stdterms.htm                                --
--                                                                           --
--  Mailing Address:                                                         --
--                                                                           --
--             Texas Instruments                                             --
--             Post Office Box 655303                                        --
--             Dallas, Texas 75265                                           --
--                                                                           --
--             Copyright © 2020, Texas Instruments Incorporated              --
-------------------------------------------------------------------------------

entity AM62 is

  generic(PHYSICAL_PIN_MAP : string := "ALF");

  port(
    atest0           : linkage bit;
    atest1           : linkage bit;
    cap_vdds0        : linkage bit;
    cap_vdds1        : linkage bit;
    cap_vdds2        : linkage bit;
    cap_vdds3        : linkage bit;
    cap_vdds4        : linkage bit;
    cap_vdds5        : linkage bit;
    cap_vdds6        : linkage bit;
    cap_vdds_canuart : linkage bit;
    cap_vdds_mcu     : linkage bit;
    csi0_atb_0_h     : linkage bit;
    csi0_atb_1_h     : linkage bit;
    csi0_rxclkn      : in      bit;
    csi0_rxclkp      : in      bit;
    csi0_rxn0        : in      bit;
    csi0_rxn1        : in      bit;
    csi0_rxn2        : in      bit;
    csi0_rxn3        : in      bit;
    csi0_rxp0        : in      bit;
    csi0_rxp1        : in      bit;
    csi0_rxp2        : in      bit;
    csi0_rxp3        : in      bit;
    csi0_rxrcalib    : linkage bit;
    ddr0_a0          : inout   bit;
    ddr0_a1          : inout   bit;
    ddr0_a10         : inout   bit;
    ddr0_a11         : inout   bit;
    ddr0_a12         : inout   bit;
    ddr0_a13         : inout   bit;
    ddr0_a2          : inout   bit;
    ddr0_a3          : inout   bit;
    ddr0_a4          : inout   bit;
    ddr0_a5          : inout   bit;
    ddr0_a6          : inout   bit;
    ddr0_a7          : inout   bit;
    ddr0_a8          : inout   bit;
    ddr0_a9          : inout   bit;
    ddr0_act_n       : inout   bit;
    ddr0_alert_n     : inout   bit;
    ddr0_atb0        : linkage bit;
    ddr0_atb1        : linkage bit;
    ddr0_ba0         : inout   bit;
    ddr0_ba1         : inout   bit;
    ddr0_bg0         : inout   bit;
    ddr0_bg1         : inout   bit;
    ddr0_cal0        : linkage bit;
    ddr0_cas_n       : inout   bit;
    ddr0_ck0         : inout   bit;
    ddr0_ck0_n       : inout   bit;
    ddr0_cke0        : inout   bit;
    ddr0_cke1        : inout   bit;
    ddr0_cs0_n       : inout   bit;
    ddr0_cs1_n       : inout   bit;
    ddr0_dm0         : inout   bit;
    ddr0_dm1         : inout   bit;
    ddr0_dq0         : inout   bit;
    ddr0_dq1         : inout   bit;
    ddr0_dq10        : inout   bit;
    ddr0_dq11        : inout   bit;
    ddr0_dq12        : inout   bit;
    ddr0_dq13        : inout   bit;
    ddr0_dq14        : inout   bit;
    ddr0_dq15        : inout   bit;
    ddr0_dq2         : inout   bit;
    ddr0_dq3         : inout   bit;
    ddr0_dq4         : inout   bit;
    ddr0_dq5         : inout   bit;
    ddr0_dq6         : inout   bit;
    ddr0_dq7         : inout   bit;
    ddr0_dq8         : inout   bit;
    ddr0_dq9         : inout   bit;
    ddr0_dqs0        : inout   bit;
    ddr0_dqs0_n      : inout   bit;
    ddr0_dqs1        : inout   bit;
    ddr0_dqs1_n      : inout   bit;
    ddr0_odt0        : inout   bit;
    ddr0_odt1        : inout   bit;
    ddr0_par         : inout   bit;
    ddr0_ras_n       : inout   bit;
    ddr0_reset0_n    : inout   bit;
    ddr0_we_n        : inout   bit;
    emu0             : in      bit;
    emu1             : in      bit;
    ext_refclk1      : linkage bit;
    extintn          : inout   bit;
    gpmc0_ad0        : inout   bit;
    gpmc0_ad1        : inout   bit;
    gpmc0_ad10       : inout   bit;
    gpmc0_ad11       : inout   bit;
    gpmc0_ad12       : inout   bit;
    gpmc0_ad13       : inout   bit;
    gpmc0_ad14       : inout   bit;
    gpmc0_ad15       : inout   bit;
    gpmc0_ad2        : inout   bit;
    gpmc0_ad3        : inout   bit;
    gpmc0_ad4        : inout   bit;
    gpmc0_ad5        : inout   bit;
    gpmc0_ad6        : inout   bit;
    gpmc0_ad7        : inout   bit;
    gpmc0_ad8        : inout   bit;
    gpmc0_ad9        : inout   bit;
    gpmc0_advn_ale   : inout   bit;
    gpmc0_be0n_cle   : inout   bit;
    gpmc0_be1n       : inout   bit;
    gpmc0_clk        : inout   bit;
    gpmc0_csn0       : inout   bit;
    gpmc0_csn1       : inout   bit;
    gpmc0_csn2       : inout   bit;
    gpmc0_csn3       : inout   bit;
    gpmc0_dir        : inout   bit;
    gpmc0_oen_ren    : inout   bit;
    gpmc0_wait0      : inout   bit;
    gpmc0_wait1      : inout   bit;
    gpmc0_wen        : inout   bit;
    gpmc0_wpn        : inout   bit;
    i2c0_scl         : inout   bit;
    i2c0_sda         : inout   bit;
    i2c1_scl         : inout   bit;
    i2c1_sda         : inout   bit;
    iforce           : linkage bit;
    mcan0_rx         : inout   bit;
    mcan0_tx         : inout   bit;
    mcasp0_aclkr     : inout   bit;
    mcasp0_aclkx     : inout   bit;
    mcasp0_afsr      : inout   bit;
    mcasp0_afsx      : inout   bit;
    mcasp0_axr0      : inout   bit;
    mcasp0_axr1      : inout   bit;
    mcasp0_axr2      : inout   bit;
    mcasp0_axr3      : inout   bit;
    mcu_errorn       : inout   bit;
    mcu_i2c0_scl     : inout   bit;
    mcu_i2c0_sda     : inout   bit;
    mcu_mcan0_rx     : inout   bit;
    mcu_mcan0_tx     : inout   bit;
    mcu_mcan1_rx     : inout   bit;
    mcu_mcan1_tx     : inout   bit;
    mcu_osc0_xi      : in      bit;
    mcu_osc0_xo      : linkage bit;
    mcu_porz         : in      bit;
    mcu_resetstatz   : inout   bit;
    mcu_resetz       : in      bit;
    mcu_spi0_clk     : inout   bit;
    mcu_spi0_cs0     : inout   bit;
    mcu_spi0_cs1     : inout   bit;
    mcu_spi0_d0      : inout   bit;
    mcu_spi0_d1      : inout   bit;
    mcu_uart0_ctsn   : inout   bit;
    mcu_uart0_rtsn   : inout   bit;
    mcu_uart0_rxd    : inout   bit;
    mcu_uart0_txd    : inout   bit;
    mdio0_mdc        : inout   bit;
    mdio0_mdio       : inout   bit;
    mmc0_clk         : inout   bit;
    mmc0_cmd         : inout   bit;
    mmc0_dat0        : inout   bit;
    mmc0_dat1        : inout   bit;
    mmc0_dat2        : inout   bit;
    mmc0_dat3        : inout   bit;
    mmc0_dat4        : inout   bit;
    mmc0_dat5        : inout   bit;
    mmc0_dat6        : inout   bit;
    mmc0_dat7        : inout   bit;
    mmc1_clk         : inout   bit;
    mmc1_cmd         : inout   bit;
    mmc1_dat0        : inout   bit;
    mmc1_dat1        : inout   bit;
    mmc1_dat2        : inout   bit;
    mmc1_dat3        : inout   bit;
    mmc1_sdcd        : inout   bit;
    mmc1_sdwp        : inout   bit;
    mmc2_clk         : inout   bit;
    mmc2_cmd         : inout   bit;
    mmc2_dat0        : inout   bit;
    mmc2_dat1        : inout   bit;
    mmc2_dat2        : inout   bit;
    mmc2_dat3        : inout   bit;
    mmc2_sdcd        : inout   bit;
    mmc2_sdwp        : inout   bit;
    oldi0_a0n        : inout   bit;
    oldi0_a0p        : inout   bit;
    oldi0_a1n        : inout   bit;
    oldi0_a1p        : inout   bit;
    oldi0_a2n        : inout   bit;
    oldi0_a2p        : inout   bit;
    oldi0_a3n        : inout   bit;
    oldi0_a3p        : inout   bit;
    oldi0_a4n        : inout   bit;
    oldi0_a4p        : inout   bit;
    oldi0_a5n        : inout   bit;
    oldi0_a5p        : inout   bit;
    oldi0_a6n        : inout   bit;
    oldi0_a6p        : inout   bit;
    oldi0_a7n        : inout   bit;
    oldi0_a7p        : inout   bit;
    oldi0_clk0n      : inout   bit;
    oldi0_clk0p      : inout   bit;
    oldi0_clk1n      : inout   bit;
    oldi0_clk1p      : inout   bit;
    ospi0_clk        : inout   bit;
    ospi0_csn0       : inout   bit;
    ospi0_csn1       : inout   bit;
    ospi0_csn2       : inout   bit;
    ospi0_csn3       : inout   bit;
    ospi0_d0         : inout   bit;
    ospi0_d1         : inout   bit;
    ospi0_d2         : inout   bit;
    ospi0_d3         : inout   bit;
    ospi0_d4         : inout   bit;
    ospi0_d5         : inout   bit;
    ospi0_d6         : inout   bit;
    ospi0_d7         : inout   bit;
    ospi0_dqs        : inout   bit;
    ospi0_lbclko     : inout   bit;
    pmic_lpm_en0     : inout   bit;
    porz_out         : inout   bit;
    reset_reqz       : in      bit;
    resetstatz       : inout   bit;
    rgmii1_rd0       : inout   bit;
    rgmii1_rd1       : inout   bit;
    rgmii1_rd2       : inout   bit;
    rgmii1_rd3       : inout   bit;
    rgmii1_rx_ctl    : inout   bit;
    rgmii1_rxc       : inout   bit;
    rgmii1_td0       : inout   bit;
    rgmii1_td1       : inout   bit;
    rgmii1_td2       : inout   bit;
    rgmii1_td3       : inout   bit;
    rgmii1_tx_ctl    : inout   bit;
    rgmii1_txc       : inout   bit;
    rgmii2_rd0       : inout   bit;
    rgmii2_rd1       : inout   bit;
    rgmii2_rd2       : inout   bit;
    rgmii2_rd3       : inout   bit;
    rgmii2_rx_ctl    : inout   bit;
    rgmii2_rxc       : inout   bit;
    rgmii2_td0       : inout   bit;
    rgmii2_td1       : inout   bit;
    rgmii2_td2       : inout   bit;
    rgmii2_td3       : inout   bit;
    rgmii2_tx_ctl    : inout   bit;
    rgmii2_txc       : inout   bit;
    spi0_clk         : inout   bit;
    spi0_cs0         : inout   bit;
    spi0_cs1         : inout   bit;
    spi0_d0          : inout   bit;
    spi0_d1          : inout   bit;
    tck              : in      bit;
    tdi              : in      bit;
    tdo              : out     bit;
    temp_diode_p     : linkage bit;
    tms              : in      bit;
    trstn            : in      bit;
    uart0_ctsn       : inout   bit;
    uart0_rtsn       : inout   bit;
    uart0_rxd        : inout   bit;
    uart0_txd        : inout   bit;
    usb0_dm          : linkage bit;
    usb0_dp          : linkage bit;
    usb0_drvvbus     : inout   bit;
    usb0_rcalib      : linkage bit;
    usb0_vbus        : linkage bit;
    usb1_dm          : linkage bit;
    usb1_dp          : linkage bit;
    usb1_drvvbus     : inout   bit;
    usb1_rcalib      : linkage bit;
    usb1_vbus        : linkage bit;
    vdd_canuart      : linkage bit;
    vdd_core         : linkage bit_vector(1 to 17);
    vdda_1p8_csirx0  : linkage bit;
    vdda_1p8_oldi0   : linkage bit_vector(1 to 2);
    vdda_1p8_usb     : linkage bit;
    vdda_3p3_usb     : linkage bit;
    vdda_core_csirx0 : linkage bit;
    vdda_core_usb    : linkage bit;
    vdda_mcu         : linkage bit;
    vdda_pll0        : linkage bit;
    vdda_pll1        : linkage bit;
    vdda_pll2        : linkage bit;
    vdda_temp0       : linkage bit;
    vdda_temp1       : linkage bit;
    vddr_core        : linkage bit_vector(1 to 8);
    vdds_ddr         : linkage bit_vector(1 to 4);
    vdds_ddr_c       : linkage bit;
    vdds_osc0        : linkage bit;
    vddshv0          : linkage bit_vector(1 to 2);
    vddshv1          : linkage bit_vector(1 to 2);
    vddshv2          : linkage bit_vector(1 to 2);
    vddshv3          : linkage bit_vector(1 to 4);
    vddshv4          : linkage bit;
    vddshv5          : linkage bit;
    vddshv6          : linkage bit;
    vddshv_canuart   : linkage bit;
    vddshv_mcu       : linkage bit_vector(1 to 2);
    vmon_1p8_soc     : linkage bit;
    vmon_3p3_soc     : linkage bit;
    vmon_er_vsys     : linkage bit;
    vout0_data0      : inout   bit;
    vout0_data1      : inout   bit;
    vout0_data10     : inout   bit;
    vout0_data11     : inout   bit;
    vout0_data12     : inout   bit;
    vout0_data13     : inout   bit;
    vout0_data14     : inout   bit;
    vout0_data15     : inout   bit;
    vout0_data2      : inout   bit;
    vout0_data3      : inout   bit;
    vout0_data4      : inout   bit;
    vout0_data5      : inout   bit;
    vout0_data6      : inout   bit;
    vout0_data7      : inout   bit;
    vout0_data8      : inout   bit;
    vout0_data9      : inout   bit;
    vout0_de         : inout   bit;
    vout0_hsync      : inout   bit;
    vout0_pclk       : inout   bit;
    vout0_vsync      : inout   bit;
    vpp              : linkage bit;
    vsense           : linkage bit;
    vss              : linkage bit_vector(1 to 62);
    wkup_clkout0     : inout   bit;
    wkup_i2c0_scl    : inout   bit;
    wkup_i2c0_sda    : inout   bit;
    wkup_lfosc0_xi   : linkage bit;
    wkup_lfosc0_xo   : linkage bit;
    wkup_uart0_ctsn  : inout   bit;
    wkup_uart0_rtsn  : inout   bit;
    wkup_uart0_rxd   : inout   bit;
    wkup_uart0_txd   : inout   bit);

  use STD_1149_1_2001.all;

  attribute COMPONENT_CONFORMANCE of AM62 : entity is "STD_1149_1_2001";


  attribute      PIN_MAP          of AM62 : entity is PHYSICAL_PIN_MAP;
  constant ALF : PIN_MAP_STRING :=
    "atest0           : F6," & 
    "atest1           : AE2," & 
    "cap_vdds0        : H15," & 
    "cap_vdds1        : K18," & 
    "cap_vdds2        : W17," & 
    "cap_vdds3        : P19," & 
    "cap_vdds4        : U7," & 
    "cap_vdds5        : H17," & 
    "cap_vdds6        : J19," & 
    "cap_vdds_canuart : G9," & 
    "cap_vdds_mcu     : H11," & 
    "csi0_atb_0_h     : AA12," & 
    "csi0_atb_1_h     : Y15," & 
    "csi0_rxclkn      : AD15," & 
    "csi0_rxclkp      : AE15," & 
    "csi0_rxn0        : AB14," & 
    "csi0_rxn1        : AD14," & 
    "csi0_rxn2        : AD13," & 
    "csi0_rxn3        : AB12," & 
    "csi0_rxp0        : AC15," & 
    "csi0_rxp1        : AE14," & 
    "csi0_rxp2        : AE13," & 
    "csi0_rxp3        : AC13," & 
    "csi0_rxrcalib    : AA14," & 
    "ddr0_a0          : J1," & 
    "ddr0_a1          : J2," & 
    "ddr0_a10         : R5," & 
    "ddr0_a11         : P5," & 
    "ddr0_a12         : R6," & 
    "ddr0_a13         : R1," & 
    "ddr0_a2          : K3," & 
    "ddr0_a3          : L5," & 
    "ddr0_a4          : K4," & 
    "ddr0_a5          : K1," & 
    "ddr0_a6          : R2," & 
    "ddr0_a7          : P2," & 
    "ddr0_a8          : P1," & 
    "ddr0_a9          : P4," & 
    "ddr0_act_n       : N6," & 
    "ddr0_alert_n     : R3," & 
    "ddr0_atb0        : T2," & 
    "ddr0_atb1        : U4," & 
    "ddr0_ba0         : M1," & 
    "ddr0_ba1         : N1," & 
    "ddr0_bg0         : T4," & 
    "ddr0_bg1         : N2," & 
    "ddr0_cal0        : M2," & 
    "ddr0_cas_n       : M4," & 
    "ddr0_ck0         : L1," & 
    "ddr0_ck0_n       : L2," & 
    "ddr0_cke0        : H2," & 
    "ddr0_cke1        : J4," & 
    "ddr0_cs0_n       : L6," & 
    "ddr0_cs1_n       : K2," & 
    "ddr0_dm0         : H5," & 
    "ddr0_dm1         : W5," & 
    "ddr0_dq0         : F4," & 
    "ddr0_dq1         : G5," & 
    "ddr0_dq10        : U2," & 
    "ddr0_dq11        : V5," & 
    "ddr0_dq12        : W2," & 
    "ddr0_dq13        : V6," & 
    "ddr0_dq14        : Y1," & 
    "ddr0_dq15        : W1," & 
    "ddr0_dq2         : F3," & 
    "ddr0_dq3         : H6," & 
    "ddr0_dq4         : E3," & 
    "ddr0_dq5         : G2," & 
    "ddr0_dq6         : F2," & 
    "ddr0_dq7         : F1," & 
    "ddr0_dq8         : U1," & 
    "ddr0_dq9         : U3," & 
    "ddr0_dqs0        : E1," & 
    "ddr0_dqs0_n      : E2," & 
    "ddr0_dqs1        : V1," & 
    "ddr0_dqs1_n      : V2," & 
    "ddr0_odt0        : H1," & 
    "ddr0_odt1        : J3," & 
    "ddr0_par         : T1," & 
    "ddr0_ras_n       : M5," & 
    "ddr0_reset0_n    : G1," & 
    "ddr0_we_n        : N3," & 
    "emu0             : E12," & 
    "emu1             : C11," & 
    "ext_refclk1      : A18," & 
    "extintn          : D16," & 
    "gpmc0_ad0        : M25," & 
    "gpmc0_ad1        : N23," & 
    "gpmc0_ad10       : T25," & 
    "gpmc0_ad11       : R21," & 
    "gpmc0_ad12       : T22," & 
    "gpmc0_ad13       : T24," & 
    "gpmc0_ad14       : U25," & 
    "gpmc0_ad15       : U24," & 
    "gpmc0_ad2        : N24," & 
    "gpmc0_ad3        : N25," & 
    "gpmc0_ad4        : P24," & 
    "gpmc0_ad5        : P22," & 
    "gpmc0_ad6        : P21," & 
    "gpmc0_ad7        : R23," & 
    "gpmc0_ad8        : R24," & 
    "gpmc0_ad9        : R25," & 
    "gpmc0_advn_ale   : L23," & 
    "gpmc0_be0n_cle   : M24," & 
    "gpmc0_be1n       : N20," & 
    "gpmc0_clk        : P25," & 
    "gpmc0_csn0       : M21," & 
    "gpmc0_csn1       : L21," & 
    "gpmc0_csn2       : K22," & 
    "gpmc0_csn3       : K24," & 
    "gpmc0_dir        : M22," & 
    "gpmc0_oen_ren    : L24," & 
    "gpmc0_wait0      : U23," & 
    "gpmc0_wait1      : V25," & 
    "gpmc0_wen        : L25," & 
    "gpmc0_wpn        : K25," & 
    "i2c0_scl         : B16," & 
    "i2c0_sda         : A16," & 
    "i2c1_scl         : B17," & 
    "i2c1_sda         : A17," & 
    "iforce           : B1," & 
    "mcan0_rx         : E15," & 
    "mcan0_tx         : C15," & 
    "mcasp0_aclkr     : A20," & 
    "mcasp0_aclkx     : B20," & 
    "mcasp0_afsr      : E19," & 
    "mcasp0_afsx      : D20," & 
    "mcasp0_axr0      : E18," & 
    "mcasp0_axr1      : B18," & 
    "mcasp0_axr2      : A19," & 
    "mcasp0_axr3      : B19," & 
    "mcu_errorn       : D1," & 
    "mcu_i2c0_scl     : A8," & 
    "mcu_i2c0_sda     : D10," & 
    "mcu_mcan0_rx     : B3," & 
    "mcu_mcan0_tx     : D6," & 
    "mcu_mcan1_rx     : D4," & 
    "mcu_mcan1_tx     : E5," & 
    "mcu_osc0_xi      : B2," & 
    "mcu_osc0_xo      : A3," & 
    "mcu_porz         : D2," & 
    "mcu_resetstatz   : B12," & 
    "mcu_resetz       : E11," & 
    "mcu_spi0_clk     : A7," & 
    "mcu_spi0_cs0     : E8," & 
    "mcu_spi0_cs1     : B8," & 
    "mcu_spi0_d0      : D9," & 
    "mcu_spi0_d1      : C9," & 
    "mcu_uart0_ctsn   : A6," & 
    "mcu_uart0_rtsn   : B6," & 
    "mcu_uart0_rxd    : B5," & 
    "mcu_uart0_txd    : A5," & 
    "mdio0_mdc        : AD24," & 
    "mdio0_mdio       : AB22," & 
    "mmc0_clk         : AB1," & 
    "mmc0_cmd         : Y3," & 
    "mmc0_dat0        : AA2," & 
    "mmc0_dat1        : AA1," & 
    "mmc0_dat2        : AA3," & 
    "mmc0_dat3        : Y4," & 
    "mmc0_dat4        : AB2," & 
    "mmc0_dat5        : AC1," & 
    "mmc0_dat6        : AD2," & 
    "mmc0_dat7        : AC2," & 
    "mmc1_clk         : B22," & 
    "mmc1_cmd         : A21," & 
    "mmc1_dat0        : A22," & 
    "mmc1_dat1        : B21," & 
    "mmc1_dat2        : C21," & 
    "mmc1_dat3        : D22," & 
    "mmc1_sdcd        : D17," & 
    "mmc1_sdwp        : C17," & 
    "mmc2_clk         : D25," & 
    "mmc2_cmd         : C24," & 
    "mmc2_dat0        : B24," & 
    "mmc2_dat1        : C25," & 
    "mmc2_dat2        : E23," & 
    "mmc2_dat3        : D24," & 
    "mmc2_sdcd        : A23," & 
    "mmc2_sdwp        : B23," & 
    "oldi0_a0n        : AA5," & 
    "oldi0_a0p        : Y6," & 
    "oldi0_a1n        : AD3," & 
    "oldi0_a1p        : AB4," & 
    "oldi0_a2n        : Y8," & 
    "oldi0_a2p        : AA8," & 
    "oldi0_a3n        : AB6," & 
    "oldi0_a3p        : AA7," & 
    "oldi0_a4n        : AC6," & 
    "oldi0_a4p        : AC5," & 
    "oldi0_a5n        : AE5," & 
    "oldi0_a5p        : AD6," & 
    "oldi0_a6n        : AE6," & 
    "oldi0_a6p        : AD7," & 
    "oldi0_a7n        : AD8," & 
    "oldi0_a7p        : AE7," & 
    "oldi0_clk0n      : AD4," & 
    "oldi0_clk0p      : AE3," & 
    "oldi0_clk1n      : AE4," & 
    "oldi0_clk1p      : AD5," & 
    "ospi0_clk        : H24," & 
    "ospi0_csn0       : F23," & 
    "ospi0_csn1       : G21," & 
    "ospi0_csn2       : H21," & 
    "ospi0_csn3       : E24," & 
    "ospi0_d0         : E25," & 
    "ospi0_d1         : G24," & 
    "ospi0_d2         : F25," & 
    "ospi0_d3         : F24," & 
    "ospi0_d4         : J23," & 
    "ospi0_d5         : J25," & 
    "ospi0_d6         : H25," & 
    "ospi0_d7         : J22," & 
    "ospi0_dqs        : J24," & 
    "ospi0_lbclko     : G25," & 
    "pmic_lpm_en0     : B7," & 
    "porz_out         : E21," & 
    "reset_reqz       : F20," & 
    "resetstatz       : F22," & 
    "rgmii1_rd0       : AB17," & 
    "rgmii1_rd1       : AC17," & 
    "rgmii1_rd2       : AB16," & 
    "rgmii1_rd3       : AA15," & 
    "rgmii1_rx_ctl    : AE17," & 
    "rgmii1_rxc       : AD17," & 
    "rgmii1_td0       : AE20," & 
    "rgmii1_td1       : AD20," & 
    "rgmii1_td2       : AE18," & 
    "rgmii1_td3       : AD18," & 
    "rgmii1_tx_ctl    : AD19," & 
    "rgmii1_txc       : AE19," & 
    "rgmii2_rd0       : AE23," & 
    "rgmii2_rd1       : AB20," & 
    "rgmii2_rd2       : AC21," & 
    "rgmii2_rd3       : AE22," & 
    "rgmii2_rx_ctl    : AD22," & 
    "rgmii2_rxc       : AD23," & 
    "rgmii2_td0       : Y18," & 
    "rgmii2_td1       : AA18," & 
    "rgmii2_td2       : AD21," & 
    "rgmii2_td3       : AC20," & 
    "rgmii2_tx_ctl    : AA19," & 
    "rgmii2_txc       : AE21," & 
    "spi0_clk         : A14," & 
    "spi0_cs0         : A13," & 
    "spi0_cs1         : C13," & 
    "spi0_d0          : B13," & 
    "spi0_d1          : B14," & 
    "tck              : A10," & 
    "tdi              : A11," & 
    "tdo              : D12," & 
    "temp_diode_p     : E7," & 
    "tms              : B11," & 
    "trstn            : B10," & 
    "uart0_ctsn       : A15," & 
    "uart0_rtsn       : B15," & 
    "uart0_rxd        : D14," & 
    "uart0_txd        : E14," & 
    "usb0_dm          : AE11," & 
    "usb0_dp          : AD11," & 
    "usb0_drvvbus     : C20," & 
    "usb0_rcalib      : AE10," & 
    "usb0_vbus        : AC11," & 
    "usb1_dm          : AD10," & 
    "usb1_dp          : AE9," & 
    "usb1_drvvbus     : F18," & 
    "usb1_rcalib      : AC9," & 
    "usb1_vbus        : AB10," & 
    "vdd_canuart      : F8," & 
    "vdd_core         : (V17, V15, V8, U12, R14, R11, P17, N13, N11, N8, M16, L15, L12, K17, J14, J11, H8)," & 
    "vdda_1p8_csirx0  : W14," & 
    "vdda_1p8_oldi0   : (W10, W9)," & 
    "vdda_1p8_usb     : Y11," & 
    "vdda_3p3_usb     : Y13," & 
    "vdda_core_csirx0 : W13," & 
    "vdda_core_usb    : W12," & 
    "vdda_mcu         : L11," & 
    "vdda_pll0        : U11," & 
    "vdda_pll1        : U15," & 
    "vdda_pll2        : L14," & 
    "vdda_temp0       : T9," & 
    "vdda_temp1       : G16," & 
    "vddr_core        : (U14, T10, R12, P16, N14, N12, K16, J12)," & 
    "vdds_ddr         : (R8, P9, L8, K9)," & 
    "vdds_ddr_c       : M9," & 
    "vdds_osc0        : G7," & 
    "vddshv0          : (G14, F15)," & 
    "vddshv1          : (M19, L18)," & 
    "vddshv2          : (W19, W16)," & 
    "vddshv3          : (U18, T19, P18, N18)," & 
    "vddshv4          : T7," & 
    "vddshv5          : G17," & 
    "vddshv6          : J18," & 
    "vddshv_canuart   : H9," & 
    "vddshv_mcu       : (G12, F11)," & 
    "vmon_1p8_soc     : G10," & 
    "vmon_3p3_soc     : K10," & 
    "vmon_er_vsys     : H10," & 
    "vout0_data0      : U22," & 
    "vout0_data1      : V24," & 
    "vout0_data10     : V20," & 
    "vout0_data11     : AA23," & 
    "vout0_data12     : AB25," & 
    "vout0_data13     : AA24," & 
    "vout0_data14     : Y22," & 
    "vout0_data15     : AA21," & 
    "vout0_data2      : W25," & 
    "vout0_data3      : W24," & 
    "vout0_data4      : Y25," & 
    "vout0_data5      : Y24," & 
    "vout0_data6      : Y23," & 
    "vout0_data7      : AA25," & 
    "vout0_data8      : V21," & 
    "vout0_data9      : W21," & 
    "vout0_de         : Y20," & 
    "vout0_hsync      : AB24," & 
    "vout0_pclk       : AC24," & 
    "vout0_vsync      : AC25," & 
    "vpp              : J8," & 
    "vsense           : A2," & 
    "vss              : (AE25, AE24, AE16, AE12, AE8, AE1, AD25, AD16, AD12, AD9, AD1, AB9, AA11, Y2, W7, V18, V16, V13, V11, V10, V9, U19, U8, T18, T17, T16, T14, T13, T8, R20, R18, R15, R13, P13, P10, P7, N15, M18, M17, M13, M12, M10, M8, M7, L20, K19, K15, K13, K7, J13, J7, H20, H18, H16, H13, G19, G13, F13, B25, A25, A24, A1)," & 
    "wkup_clkout0     : A12," & 
    "wkup_i2c0_scl    : B9," & 
    "wkup_i2c0_sda    : A9," & 
    "wkup_lfosc0_xi   : C2," & 
    "wkup_lfosc0_xo   : C1," & 
    "wkup_uart0_ctsn  : C6," & 
    "wkup_uart0_rtsn  : A4," & 
    "wkup_uart0_rxd   : B4," & 
    "wkup_uart0_txd   : C5";

  attribute PORT_GROUPING of AM62 : entity is
    "Differential_Voltage  (                 "&
    "(ddr0_ck0, ddr0_ck0_n),                 "&
    "(ddr0_dqs0, ddr0_dqs0_n),               "&
    "(ddr0_dqs1, ddr0_dqs1_n)) ";

  attribute TAP_SCAN_IN    of tdi    : signal is true;
  attribute TAP_SCAN_MODE  of tms    : signal is true;
  attribute TAP_SCAN_OUT   of tdo    : signal is true;
  attribute TAP_SCAN_CLOCK of tck    : signal is (30.0e6,BOTH);
  attribute TAP_SCAN_RESET of trstn  : signal is true;

  attribute COMPLIANCE_PATTERNS of AM62 : entity is "(emu0, emu1, mcu_osc0_xi, mcu_porz, mcu_resetz, reset_reqz)(10X111)";

  attribute INSTRUCTION_LENGTH  of AM62 : entity is 4;

  attribute INSTRUCTION_OPCODE  of AM62 : entity is
      "EXTEST            (0001),          "&
      "SAMPLE            (0010),          "&
      "PRELOAD           (0010),          "&
      "EXTEST_PULSE      (0111),          "&
      "EXTEST_TRAIN      (0110),          "&
      "IDCODE            (1101),          "&
      "BYPASS            (0000,1111)";

  attribute INSTRUCTION_CAPTURE of AM62 : entity is "0001";
  
  attribute IDCODE_REGISTER     of AM62 : entity is
      "0000" &                            -- Version Number
      "1011101101111110" &                -- Part Number                          
      "00000010111" &                     -- Manufacturer ID
      "1";                                -- Required by IEEE Std. 1149.1-1990

  attribute REGISTER_ACCESS of AM62 : entity is
      "DEVICE_ID     (IDCODE),            "&
      "BOUNDARY      (EXTEST),            "&
      "BOUNDARY      (SAMPLE),            "&
      "BOUNDARY      (PRELOAD),           "&
      "BOUNDARY      (EXTEST_PULSE),      "&
      "BOUNDARY      (EXTEST_TRAIN),      "&
      "BYPASS        (BYPASS)             ";

  attribute BOUNDARY_LENGTH of AM62 : entity is 507;

  attribute BOUNDARY_REGISTER of AM62 : entity is
--    num  cell   port                          function           safe [ ccell  disval  rslt]
    " 506 (BC_7 , spi0_cs0                 , bidir       ,      X,     505,   1,      Z          )," &
    " 505 (BC_2 , *                        , control     ,      1                                )," &
    " 504 (BC_7 , spi0_clk                 , bidir       ,      X,     503,   1,      Z          )," &
    " 503 (BC_2 , *                        , control     ,      1                                )," &
    " 502 (BC_7 , spi0_d1                  , bidir       ,      X,     501,   1,      Z          )," &
    " 501 (BC_2 , *                        , control     ,      1                                )," &
    " 500 (BC_7 , uart0_txd                , bidir       ,      X,     499,   1,      Z          )," &
    " 499 (BC_2 , *                        , control     ,      1                                )," &
    " 498 (BC_7 , uart0_rtsn               , bidir       ,      X,     497,   1,      Z          )," &
    " 497 (BC_2 , *                        , control     ,      1                                )," &
    " 496 (BC_7 , mcan0_rx                 , bidir       ,      X,     495,   1,      Z          )," &
    " 495 (BC_2 , *                        , control     ,      1                                )," &
    " 494 (BC_7 , i2c0_sda                 , bidir       ,      X,     493,   1,      Z          )," &
    " 493 (BC_2 , *                        , control     ,      1                                )," &
    " 492 (BC_7 , i2c1_scl                 , bidir       ,      X,     491,   1,      Z          )," &
    " 491 (BC_2 , *                        , control     ,      1                                )," &
    " 490 (BC_1 , extintn                  , output2     ,      1,     490,   1,      WEAK1      )," &
    " 489 (BC_1 , *                        , internal    ,      0                                )," &
    " 488 (BC_3 , extintn                  , input       ,      X                                )," &
    " 487 (BC_7 , mmc1_sdwp                , bidir       ,      X,     486,   1,      Z          )," &
    " 486 (BC_2 , *                        , control     ,      1                                )," &
    " 485 (BC_7 , mcasp0_axr2              , bidir       ,      X,     484,   1,      Z          )," &
    " 484 (BC_2 , *                        , control     ,      1                                )," &
    " 483 (BC_7 , mcasp0_axr0              , bidir       ,      X,     482,   1,      Z          )," &
    " 482 (BC_2 , *                        , control     ,      1                                )," &
    " 481 (BC_7 , mcasp0_afsx              , bidir       ,      X,     480,   1,      Z          )," &
    " 480 (BC_2 , *                        , control     ,      1                                )," &
    " 479 (BC_7 , mcasp0_afsr              , bidir       ,      X,     478,   1,      Z          )," &
    " 478 (BC_2 , *                        , control     ,      1                                )," &
    " 477 (BC_7 , usb1_drvvbus             , bidir       ,      X,     476,   1,      PULL0      )," &
    " 476 (BC_2 , *                        , control     ,      1                                )," &
    " 475 (BC_7 , resetstatz               , bidir       ,      X,     474,   1,      Z          )," &
    " 474 (BC_2 , *                        , control     ,      1                                )," &
    " 473 (BC_7 , mmc1_cmd                 , bidir       ,      X,     472,   1,      Z          )," &
    " 472 (BC_2 , *                        , control     ,      1                                )," &
    " 471 (BC_7 , mmc1_dat1                , bidir       ,      X,     470,   1,      Z          )," &
    " 470 (BC_2 , *                        , control     ,      1                                )," &
    " 469 (BC_1 , *                        , internal    ,      0                                )," &
    " 468 (BC_1 , *                        , internal    ,      0                                )," &
    " 467 (BC_7 , mmc1_dat3                , bidir       ,      X,     466,   1,      Z          )," &
    " 466 (BC_2 , *                        , control     ,      1                                )," &
    " 465 (BC_7 , mmc2_sdwp                , bidir       ,      X,     464,   1,      Z          )," &
    " 464 (BC_2 , *                        , control     ,      1                                )," &
    " 463 (BC_7 , mmc2_dat0                , bidir       ,      X,     462,   1,      Z          )," &
    " 462 (BC_2 , *                        , control     ,      1                                )," &
    " 461 (BC_7 , mmc2_clk                 , bidir       ,      X,     460,   1,      Z          )," &
    " 460 (BC_2 , *                        , control     ,      1                                )," &
    " 459 (BC_7 , mmc2_dat2                , bidir       ,      X,     458,   1,      Z          )," &
    " 458 (BC_2 , *                        , control     ,      1                                )," &
    " 457 (BC_7 , ospi0_csn3               , bidir       ,      X,     456,   1,      Z          )," &
    " 456 (BC_2 , *                        , control     ,      1                                )," &
    " 455 (BC_7 , ospi0_csn1               , bidir       ,      X,     454,   1,      Z          )," &
    " 454 (BC_2 , *                        , control     ,      1                                )," &
    " 453 (BC_7 , ospi0_d0                 , bidir       ,      X,     452,   1,      Z          )," &
    " 452 (BC_2 , *                        , control     ,      1                                )," &
    " 451 (BC_7 , ospi0_d2                 , bidir       ,      X,     450,   1,      Z          )," &
    " 450 (BC_2 , *                        , control     ,      1                                )," &
    " 449 (BC_7 , ospi0_clk                , bidir       ,      X,     448,   1,      Z          )," &
    " 448 (BC_2 , *                        , control     ,      1                                )," &
    " 447 (BC_7 , ospi0_dqs                , bidir       ,      X,     446,   1,      Z          )," &
    " 446 (BC_2 , *                        , control     ,      1                                )," &
    " 445 (BC_7 , ospi0_d5                 , bidir       ,      X,     444,   1,      Z          )," &
    " 444 (BC_2 , *                        , control     ,      1                                )," &
    " 443 (BC_7 , ospi0_d7                 , bidir       ,      X,     442,   1,      Z          )," &
    " 442 (BC_2 , *                        , control     ,      1                                )," &
    " 441 (BC_7 , gpmc0_csn2               , bidir       ,      X,     440,   1,      Z          )," &
    " 440 (BC_2 , *                        , control     ,      1                                )," &
    " 439 (BC_7 , gpmc0_csn0               , bidir       ,      X,     438,   1,      Z          )," &
    " 438 (BC_2 , *                        , control     ,      1                                )," &
    " 437 (BC_7 , gpmc0_wpn                , bidir       ,      X,     436,   1,      Z          )," &
    " 436 (BC_2 , *                        , control     ,      1                                )," &
    " 435 (BC_7 , gpmc0_oen_ren            , bidir       ,      X,     434,   1,      Z          )," &
    " 434 (BC_2 , *                        , control     ,      1                                )," &
    " 433 (BC_7 , gpmc0_be0n_cle           , bidir       ,      X,     432,   1,      Z          )," &
    " 432 (BC_2 , *                        , control     ,      1                                )," &
    " 431 (BC_7 , gpmc0_ad0                , bidir       ,      X,     430,   1,      Z          )," &
    " 430 (BC_2 , *                        , control     ,      1                                )," &
    " 429 (BC_7 , gpmc0_ad2                , bidir       ,      X,     428,   1,      Z          )," &
    " 428 (BC_2 , *                        , control     ,      1                                )," &
    " 427 (BC_7 , gpmc0_ad4                , bidir       ,      X,     426,   1,      Z          )," &
    " 426 (BC_2 , *                        , control     ,      1                                )," &
    " 425 (BC_7 , gpmc0_ad6                , bidir       ,      X,     424,   1,      Z          )," &
    " 424 (BC_2 , *                        , control     ,      1                                )," &
    " 423 (BC_7 , gpmc0_clk                , bidir       ,      X,     422,   1,      Z          )," &
    " 422 (BC_2 , *                        , control     ,      1                                )," &
    " 421 (BC_7 , gpmc0_ad8                , bidir       ,      X,     420,   1,      Z          )," &
    " 420 (BC_2 , *                        , control     ,      1                                )," &
    " 419 (BC_7 , gpmc0_ad10               , bidir       ,      X,     418,   1,      Z          )," &
    " 418 (BC_2 , *                        , control     ,      1                                )," &
    " 417 (BC_7 , gpmc0_ad12               , bidir       ,      X,     416,   1,      Z          )," &
    " 416 (BC_2 , *                        , control     ,      1                                )," &
    " 415 (BC_7 , gpmc0_ad14               , bidir       ,      X,     414,   1,      Z          )," &
    " 414 (BC_2 , *                        , control     ,      1                                )," &
    " 413 (BC_7 , gpmc0_wait0              , bidir       ,      X,     412,   1,      Z          )," &
    " 412 (BC_2 , *                        , control     ,      1                                )," &
    " 411 (BC_7 , vout0_data0              , bidir       ,      X,     410,   1,      Z          )," &
    " 410 (BC_2 , *                        , control     ,      1                                )," &
    " 409 (BC_7 , vout0_data2              , bidir       ,      X,     408,   1,      Z          )," &
    " 408 (BC_2 , *                        , control     ,      1                                )," &
    " 407 (BC_7 , vout0_data4              , bidir       ,      X,     406,   1,      Z          )," &
    " 406 (BC_2 , *                        , control     ,      1                                )," &
    " 405 (BC_7 , vout0_data6              , bidir       ,      X,     404,   1,      Z          )," &
    " 404 (BC_2 , *                        , control     ,      1                                )," &
    " 403 (BC_7 , vout0_data8              , bidir       ,      X,     402,   1,      Z          )," &
    " 402 (BC_2 , *                        , control     ,      1                                )," &
    " 401 (BC_7 , vout0_data10             , bidir       ,      X,     400,   1,      Z          )," &
    " 400 (BC_2 , *                        , control     ,      1                                )," &
    " 399 (BC_7 , vout0_data12             , bidir       ,      X,     398,   1,      Z          )," &
    " 398 (BC_2 , *                        , control     ,      1                                )," &
    " 397 (BC_7 , vout0_data14             , bidir       ,      X,     396,   1,      Z          )," &
    " 396 (BC_2 , *                        , control     ,      1                                )," &
    " 395 (BC_7 , vout0_hsync              , bidir       ,      X,     394,   1,      Z          )," &
    " 394 (BC_2 , *                        , control     ,      1                                )," &
    " 393 (BC_7 , vout0_vsync              , bidir       ,      X,     392,   1,      Z          )," &
    " 392 (BC_2 , *                        , control     ,      1                                )," &
    " 391 (BC_7 , mdio0_mdio               , bidir       ,      X,     390,   1,      Z          )," &
    " 390 (BC_2 , *                        , control     ,      1                                )," &
    " 389 (BC_7 , rgmii2_rxc               , bidir       ,      X,     388,   1,      Z          )," &
    " 388 (BC_2 , *                        , control     ,      1                                )," &
    " 387 (BC_7 , rgmii2_rd0               , bidir       ,      X,     386,   1,      Z          )," &
    " 386 (BC_2 , *                        , control     ,      1                                )," &
    " 385 (BC_7 , rgmii2_rd2               , bidir       ,      X,     384,   1,      Z          )," &
    " 384 (BC_2 , *                        , control     ,      1                                )," &
    " 383 (BC_7 , rgmii2_tx_ctl            , bidir       ,      X,     382,   1,      Z          )," &
    " 382 (BC_2 , *                        , control     ,      1                                )," &
    " 381 (BC_7 , rgmii2_td1               , bidir       ,      X,     380,   1,      Z          )," &
    " 380 (BC_2 , *                        , control     ,      1                                )," &
    " 379 (BC_7 , rgmii2_td2               , bidir       ,      X,     378,   1,      Z          )," &
    " 378 (BC_2 , *                        , control     ,      1                                )," &
    " 377 (BC_7 , rgmii1_tx_ctl            , bidir       ,      X,     376,   1,      Z          )," &
    " 376 (BC_2 , *                        , control     ,      1                                )," &
    " 375 (BC_7 , rgmii1_td1               , bidir       ,      X,     374,   1,      Z          )," &
    " 374 (BC_2 , *                        , control     ,      1                                )," &
    " 373 (BC_7 , rgmii1_td2               , bidir       ,      X,     372,   1,      Z          )," &
    " 372 (BC_2 , *                        , control     ,      1                                )," &
    " 371 (BC_7 , rgmii1_rd0               , bidir       ,      X,     370,   1,      Z          )," &
    " 370 (BC_2 , *                        , control     ,      1                                )," &
    " 369 (BC_7 , rgmii1_rd2               , bidir       ,      X,     368,   1,      Z          )," &
    " 368 (BC_2 , *                        , control     ,      1                                )," &
    " 367 (BC_7 , rgmii1_rx_ctl            , bidir       ,      X,     366,   1,      Z          )," &
    " 366 (BC_2 , *                        , control     ,      1                                )," &
    " 365 (BC_1 , csi0_rxp3                , input       ,      X                                )," & -- 9 (BC_1,rx_p_dl_l_3,INPUT,X)
    " 364 (BC_1 , csi0_rxn3                , input       ,      X                                )," & -- 8 (BC_1,rx_m_dl_l_3,INPUT,X)
    " 363 (BC_1 , csi0_rxp2                , input       ,      X                                )," & -- 7 (BC_1,rx_p_dl_l_2,INPUT,X)
    " 362 (BC_1 , csi0_rxn2                , input       ,      X                                )," & -- 6 (BC_1,rx_m_dl_l_2,INPUT,X)
    " 361 (BC_1 , csi0_rxp1                , input       ,      X                                )," & -- 5 (BC_1,rx_p_dl_l_1,INPUT,X)
    " 360 (BC_1 , csi0_rxn1                , input       ,      X                                )," & -- 4 (BC_1,rx_m_dl_l_1,INPUT,X)
    " 359 (BC_1 , csi0_rxp0                , input       ,      X                                )," & -- 3 (BC_1,rx_p_dl_l_0,INPUT,X)
    " 358 (BC_1 , csi0_rxn0                , input       ,      X                                )," & -- 2 (BC_1,rx_m_dl_l_0,INPUT,X)
    " 357 (BC_1 , csi0_rxclkp              , input       ,      X                                )," & -- 1 (BC_1,rx_p_cl_l,INPUT,X)
    " 356 (BC_1 , csi0_rxclkn              , input       ,      X                                )," & -- 0 (BC_1,rx_m_cl_l,INPUT,X)
    " 355 (BC_7 , oldi0_a6n                , bidir       ,      X,     354,   1,      Z          )," &
    " 354 (BC_2 , *                        , control     ,      1                                )," &
    " 353 (BC_7 , oldi0_a6p                , bidir       ,      X,     352,   1,      Z          )," &
    " 352 (BC_2 , *                        , control     ,      1                                )," &
    " 351 (BC_7 , oldi0_a4n                , bidir       ,      X,     350,   1,      Z          )," &
    " 350 (BC_2 , *                        , control     ,      1                                )," &
    " 349 (BC_7 , oldi0_a4p                , bidir       ,      X,     348,   1,      Z          )," &
    " 348 (BC_2 , *                        , control     ,      1                                )," &
    " 347 (BC_7 , oldi0_clk0n              , bidir       ,      X,     346,   1,      Z          )," &
    " 346 (BC_2 , *                        , control     ,      1                                )," &
    " 345 (BC_7 , oldi0_clk0p              , bidir       ,      X,     344,   1,      Z          )," &
    " 344 (BC_2 , *                        , control     ,      1                                )," &
    " 343 (BC_7 , oldi0_a2n                , bidir       ,      X,     342,   1,      Z          )," &
    " 342 (BC_2 , *                        , control     ,      1                                )," &
    " 341 (BC_7 , oldi0_a2p                , bidir       ,      X,     340,   1,      Z          )," &
    " 340 (BC_2 , *                        , control     ,      1                                )," &
    " 339 (BC_7 , oldi0_a0n                , bidir       ,      X,     338,   1,      Z          )," &
    " 338 (BC_2 , *                        , control     ,      1                                )," &
    " 337 (BC_7 , oldi0_a0p                , bidir       ,      X,     336,   1,      Z          )," &
    " 336 (BC_2 , *                        , control     ,      1                                )," &
    " 335 (BC_7 , mmc0_dat6                , bidir       ,      X,     334,   1,      Z          )," &
    " 334 (BC_2 , *                        , control     ,      1                                )," &
    " 333 (BC_7 , mmc0_dat4                , bidir       ,      X,     332,   1,      Z          )," &
    " 332 (BC_2 , *                        , control     ,      1                                )," &
    " 331 (BC_7 , mmc0_clk                 , bidir       ,      X,     330,   1,      Z          )," &
    " 330 (BC_2 , *                        , control     ,      1                                )," &
    " 329 (BC_7 , mmc0_dat2                , bidir       ,      X,     328,   1,      Z          )," &
    " 328 (BC_2 , *                        , control     ,      1                                )," &
    " 327 (BC_7 , mmc0_dat0                , bidir       ,      X,     326,   1,      Z          )," &
    " 326 (BC_2 , *                        , control     ,      1                                )," &
    " 325 (BC_7 , ddr0_act_n               , bidir       ,      X,     324,   1,      Z          )," &
    " 324 (BC_2 , *                        , control     ,      1                                )," &
    " 323 (BC_7 , ddr0_a0                  , bidir       ,      X,     322,   1,      Z          )," &
    " 322 (BC_2 , *                        , control     ,      1                                )," &
    " 321 (BC_7 , ddr0_a1                  , bidir       ,      X,     320,   1,      Z          )," &
    " 320 (BC_2 , *                        , control     ,      1                                )," &
    " 319 (BC_7 , ddr0_a2                  , bidir       ,      X,     318,   1,      Z          )," &
    " 318 (BC_2 , *                        , control     ,      1                                )," &
    " 317 (BC_7 , ddr0_a3                  , bidir       ,      X,     316,   1,      Z          )," &
    " 316 (BC_2 , *                        , control     ,      1                                )," &
    " 315 (BC_7 , ddr0_a4                  , bidir       ,      X,     314,   1,      Z          )," &
    " 314 (BC_2 , *                        , control     ,      1                                )," &
    " 313 (BC_7 , ddr0_a5                  , bidir       ,      X,     312,   1,      Z          )," &
    " 312 (BC_2 , *                        , control     ,      1                                )," &
    " 311 (BC_7 , ddr0_a6                  , bidir       ,      X,     310,   1,      Z          )," &
    " 310 (BC_2 , *                        , control     ,      1                                )," &
    " 309 (BC_7 , ddr0_a7                  , bidir       ,      X,     308,   1,      Z          )," &
    " 308 (BC_2 , *                        , control     ,      1                                )," &
    " 307 (BC_7 , ddr0_a8                  , bidir       ,      X,     306,   1,      Z          )," &
    " 306 (BC_2 , *                        , control     ,      1                                )," &
    " 305 (BC_7 , ddr0_a9                  , bidir       ,      X,     304,   1,      Z          )," &
    " 304 (BC_2 , *                        , control     ,      1                                )," &
    " 303 (BC_7 , ddr0_a10                 , bidir       ,      X,     302,   1,      Z          )," &
    " 302 (BC_2 , *                        , control     ,      1                                )," &
    " 301 (BC_7 , ddr0_a11                 , bidir       ,      X,     300,   1,      Z          )," &
    " 300 (BC_2 , *                        , control     ,      1                                )," &
    " 299 (BC_7 , ddr0_a12                 , bidir       ,      X,     298,   1,      Z          )," &
    " 298 (BC_2 , *                        , control     ,      1                                )," &
    " 297 (BC_7 , ddr0_a13                 , bidir       ,      X,     296,   1,      Z          )," &
    " 296 (BC_2 , *                        , control     ,      1                                )," &
    " 295 (BC_7 , ddr0_ba0                 , bidir       ,      X,     294,   1,      Z          )," &
    " 294 (BC_2 , *                        , control     ,      1                                )," &
    " 293 (BC_7 , ddr0_ba1                 , bidir       ,      X,     292,   1,      Z          )," &
    " 292 (BC_2 , *                        , control     ,      1                                )," &
    " 291 (BC_7 , ddr0_bg0                 , bidir       ,      X,     290,   1,      Z          )," &
    " 290 (BC_2 , *                        , control     ,      1                                )," &
    " 289 (BC_7 , ddr0_bg1                 , bidir       ,      X,     288,   1,      Z          )," &
    " 288 (BC_2 , *                        , control     ,      1                                )," &
    " 287 (BC_7 , ddr0_cas_n               , bidir       ,      X,     286,   1,      Z          )," &
    " 286 (BC_2 , *                        , control     ,      1                                )," &
    " 285 (BC_7 , ddr0_cke0                , bidir       ,      X,     284,   1,      Z          )," &
    " 284 (BC_2 , *                        , control     ,      1                                )," &
    " 283 (BC_7 , ddr0_cke1                , bidir       ,      X,     282,   1,      Z          )," &
    " 282 (BC_2 , *                        , control     ,      1                                )," &
    " 281 (BC_7 , ddr0_cs0_n               , bidir       ,      X,     280,   1,      Z          )," &
    " 280 (BC_2 , *                        , control     ,      1                                )," &
    " 279 (BC_7 , ddr0_cs1_n               , bidir       ,      X,     278,   1,      Z          )," &
    " 278 (BC_2 , *                        , control     ,      1                                )," &
    " 277 (BC_7 , ddr0_dq0                 , bidir       ,      X,     276,   1,      Z          )," &
    " 276 (BC_2 , *                        , control     ,      1                                )," &
    " 275 (BC_7 , ddr0_dq1                 , bidir       ,      X,     274,   1,      Z          )," &
    " 274 (BC_2 , *                        , control     ,      1                                )," &
    " 273 (BC_7 , ddr0_dq2                 , bidir       ,      X,     272,   1,      Z          )," &
    " 272 (BC_2 , *                        , control     ,      1                                )," &
    " 271 (BC_7 , ddr0_dq3                 , bidir       ,      X,     270,   1,      Z          )," &
    " 270 (BC_2 , *                        , control     ,      1                                )," &
    " 269 (BC_7 , ddr0_dq4                 , bidir       ,      X,     268,   1,      Z          )," &
    " 268 (BC_2 , *                        , control     ,      1                                )," &
    " 267 (BC_7 , ddr0_dq5                 , bidir       ,      X,     266,   1,      Z          )," &
    " 266 (BC_2 , *                        , control     ,      1                                )," &
    " 265 (BC_7 , ddr0_dq6                 , bidir       ,      X,     264,   1,      Z          )," &
    " 264 (BC_2 , *                        , control     ,      1                                )," &
    " 263 (BC_7 , ddr0_dq7                 , bidir       ,      X,     262,   1,      Z          )," &
    " 262 (BC_2 , *                        , control     ,      1                                )," &
    " 261 (BC_7 , ddr0_dq8                 , bidir       ,      X,     260,   1,      Z          )," &
    " 260 (BC_2 , *                        , control     ,      1                                )," &
    " 259 (BC_7 , ddr0_dq9                 , bidir       ,      X,     258,   1,      Z          )," &
    " 258 (BC_2 , *                        , control     ,      1                                )," &
    " 257 (BC_7 , ddr0_dq10                , bidir       ,      X,     256,   1,      Z          )," &
    " 256 (BC_2 , *                        , control     ,      1                                )," &
    " 255 (BC_7 , ddr0_dq11                , bidir       ,      X,     254,   1,      Z          )," &
    " 254 (BC_2 , *                        , control     ,      1                                )," &
    " 253 (BC_7 , ddr0_dq12                , bidir       ,      X,     252,   1,      Z          )," &
    " 252 (BC_2 , *                        , control     ,      1                                )," &
    " 251 (BC_7 , ddr0_dq13                , bidir       ,      X,     250,   1,      Z          )," &
    " 250 (BC_2 , *                        , control     ,      1                                )," &
    " 249 (BC_7 , ddr0_dq14                , bidir       ,      X,     248,   1,      Z          )," &
    " 248 (BC_2 , *                        , control     ,      1                                )," &
    " 247 (BC_7 , ddr0_dq15                , bidir       ,      X,     246,   1,      Z          )," &
    " 246 (BC_2 , *                        , control     ,      1                                )," &
    " 245 (BC_7 , ddr0_dm0                 , bidir       ,      X,     244,   1,      Z          )," &
    " 244 (BC_2 , *                        , control     ,      1                                )," &
    " 243 (BC_7 , ddr0_dm1                 , bidir       ,      X,     242,   1,      Z          )," &
    " 242 (BC_2 , *                        , control     ,      1                                )," &
    " 241 (BC_7 , ddr0_dqs0                , bidir       ,      X,     240,   1,      Z          )," &
    " 240 (BC_2 , *                        , control     ,      1                                )," &
    " 239 (BC_7 , ddr0_dqs1                , bidir       ,      X,     238,   1,      Z          )," &
    " 238 (BC_2 , *                        , control     ,      1                                )," &
    " 237 (BC_7 , ddr0_alert_n             , bidir       ,      X,     236,   1,      Z          )," &
    " 236 (BC_2 , *                        , control     ,      1                                )," &
    " 235 (BC_7 , ddr0_ck0                 , bidir       ,      X,     234,   1,      Z          )," &
    " 234 (BC_2 , *                        , control     ,      1                                )," &
    " 233 (BC_7 , ddr0_odt0                , bidir       ,      X,     232,   1,      Z          )," &
    " 232 (BC_2 , *                        , control     ,      1                                )," &
    " 231 (BC_7 , ddr0_odt1                , bidir       ,      X,     230,   1,      Z          )," &
    " 230 (BC_2 , *                        , control     ,      1                                )," &
    " 229 (BC_7 , ddr0_par                 , bidir       ,      X,     228,   1,      Z          )," &
    " 228 (BC_2 , *                        , control     ,      1                                )," &
    " 227 (BC_7 , ddr0_ras_n               , bidir       ,      X,     226,   1,      Z          )," &
    " 226 (BC_2 , *                        , control     ,      1                                )," &
    " 225 (BC_7 , ddr0_reset0_n            , bidir       ,      X,     224,   1,      Z          )," &
    " 224 (BC_2 , *                        , control     ,      1                                )," &
    " 223 (BC_7 , ddr0_we_n                , bidir       ,      X,     222,   1,      Z          )," &
    " 222 (BC_2 , *                        , control     ,      1                                )," &
    " 221 (BC_7 , mmc0_cmd                 , bidir       ,      X,     220,   1,      Z          )," &
    " 220 (BC_2 , *                        , control     ,      1                                )," &
    " 219 (BC_7 , mmc0_dat1                , bidir       ,      X,     218,   1,      Z          )," &
    " 218 (BC_2 , *                        , control     ,      1                                )," &
    " 217 (BC_7 , mmc0_dat3                , bidir       ,      X,     216,   1,      Z          )," &
    " 216 (BC_2 , *                        , control     ,      1                                )," &
    " 215 (BC_1 , *                        , internal    ,      0                                )," &
    " 214 (BC_1 , *                        , internal    ,      0                                )," &
    " 213 (BC_7 , mmc0_dat5                , bidir       ,      X,     212,   1,      Z          )," &
    " 212 (BC_2 , *                        , control     ,      1                                )," &
    " 211 (BC_7 , mmc0_dat7                , bidir       ,      X,     210,   1,      Z          )," &
    " 210 (BC_2 , *                        , control     ,      1                                )," &
    " 209 (BC_7 , oldi0_a1n                , bidir       ,      X,     208,   1,      Z          )," &
    " 208 (BC_2 , *                        , control     ,      1                                )," &
    " 207 (BC_7 , oldi0_a1p                , bidir       ,      X,     206,   1,      Z          )," &
    " 206 (BC_2 , *                        , control     ,      1                                )," &
    " 205 (BC_7 , oldi0_a3n                , bidir       ,      X,     204,   1,      Z          )," &
    " 204 (BC_2 , *                        , control     ,      1                                )," &
    " 203 (BC_7 , oldi0_a3p                , bidir       ,      X,     202,   1,      Z          )," &
    " 202 (BC_2 , *                        , control     ,      1                                )," &
    " 201 (BC_7 , oldi0_clk1n              , bidir       ,      X,     200,   1,      Z          )," &
    " 200 (BC_2 , *                        , control     ,      1                                )," &
    " 199 (BC_7 , oldi0_clk1p              , bidir       ,      X,     198,   1,      Z          )," &
    " 198 (BC_2 , *                        , control     ,      1                                )," &
    " 197 (BC_7 , oldi0_a5n                , bidir       ,      X,     196,   1,      Z          )," &
    " 196 (BC_2 , *                        , control     ,      1                                )," &
    " 195 (BC_7 , oldi0_a5p                , bidir       ,      X,     194,   1,      Z          )," &
    " 194 (BC_2 , *                        , control     ,      1                                )," &
    " 193 (BC_7 , oldi0_a7n                , bidir       ,      X,     192,   1,      Z          )," &
    " 192 (BC_2 , *                        , control     ,      1                                )," &
    " 191 (BC_7 , oldi0_a7p                , bidir       ,      X,     190,   1,      Z          )," &
    " 190 (BC_2 , *                        , control     ,      1                                )," &
    " 189 (BC_7 , rgmii1_rxc               , bidir       ,      X,     188,   1,      Z          )," &
    " 188 (BC_2 , *                        , control     ,      1                                )," &
    " 187 (BC_7 , rgmii1_rd3               , bidir       ,      X,     186,   1,      Z          )," &
    " 186 (BC_2 , *                        , control     ,      1                                )," &
    " 185 (BC_7 , rgmii1_rd1               , bidir       ,      X,     184,   1,      Z          )," &
    " 184 (BC_2 , *                        , control     ,      1                                )," &
    " 183 (BC_7 , rgmii1_td3               , bidir       ,      X,     182,   1,      Z          )," &
    " 182 (BC_2 , *                        , control     ,      1                                )," &
    " 181 (BC_7 , rgmii1_txc               , bidir       ,      X,     180,   1,      Z          )," &
    " 180 (BC_2 , *                        , control     ,      1                                )," &
    " 179 (BC_7 , rgmii1_td0               , bidir       ,      X,     178,   1,      Z          )," &
    " 178 (BC_2 , *                        , control     ,      1                                )," &
    " 177 (BC_7 , rgmii2_td3               , bidir       ,      X,     176,   1,      Z          )," &
    " 176 (BC_2 , *                        , control     ,      1                                )," &
    " 175 (BC_7 , rgmii2_txc               , bidir       ,      X,     174,   1,      Z          )," &
    " 174 (BC_2 , *                        , control     ,      1                                )," &
    " 173 (BC_7 , rgmii2_td0               , bidir       ,      X,     172,   1,      Z          )," &
    " 172 (BC_2 , *                        , control     ,      1                                )," &
    " 171 (BC_7 , rgmii2_rd3               , bidir       ,      X,     170,   1,      Z          )," &
    " 170 (BC_2 , *                        , control     ,      1                                )," &
    " 169 (BC_7 , rgmii2_rd1               , bidir       ,      X,     168,   1,      Z          )," &
    " 168 (BC_2 , *                        , control     ,      1                                )," &
    " 167 (BC_7 , rgmii2_rx_ctl            , bidir       ,      X,     166,   1,      Z          )," &
    " 166 (BC_2 , *                        , control     ,      1                                )," &
    " 165 (BC_7 , mdio0_mdc                , bidir       ,      X,     164,   1,      Z          )," &
    " 164 (BC_2 , *                        , control     ,      1                                )," &
    " 163 (BC_7 , vout0_pclk               , bidir       ,      X,     162,   1,      Z          )," &
    " 162 (BC_2 , *                        , control     ,      1                                )," &
    " 161 (BC_7 , vout0_de                 , bidir       ,      X,     160,   1,      Z          )," &
    " 160 (BC_2 , *                        , control     ,      1                                )," &
    " 159 (BC_7 , vout0_data15             , bidir       ,      X,     158,   1,      Z          )," &
    " 158 (BC_2 , *                        , control     ,      1                                )," &
    " 157 (BC_7 , vout0_data13             , bidir       ,      X,     156,   1,      Z          )," &
    " 156 (BC_2 , *                        , control     ,      1                                )," &
    " 155 (BC_7 , vout0_data11             , bidir       ,      X,     154,   1,      Z          )," &
    " 154 (BC_2 , *                        , control     ,      1                                )," &
    " 153 (BC_7 , vout0_data9              , bidir       ,      X,     152,   1,      Z          )," &
    " 152 (BC_2 , *                        , control     ,      1                                )," &
    " 151 (BC_7 , vout0_data7              , bidir       ,      X,     150,   1,      Z          )," &
    " 150 (BC_2 , *                        , control     ,      1                                )," &
    " 149 (BC_7 , vout0_data5              , bidir       ,      X,     148,   1,      Z          )," &
    " 148 (BC_2 , *                        , control     ,      1                                )," &
    " 147 (BC_7 , vout0_data3              , bidir       ,      X,     146,   1,      Z          )," &
    " 146 (BC_2 , *                        , control     ,      1                                )," &
    " 145 (BC_7 , vout0_data1              , bidir       ,      X,     144,   1,      Z          )," &
    " 144 (BC_2 , *                        , control     ,      1                                )," &
    " 143 (BC_7 , gpmc0_wait1              , bidir       ,      X,     142,   1,      Z          )," &
    " 142 (BC_2 , *                        , control     ,      1                                )," &
    " 141 (BC_7 , gpmc0_ad15               , bidir       ,      X,     140,   1,      Z          )," &
    " 140 (BC_2 , *                        , control     ,      1                                )," &
    " 139 (BC_7 , gpmc0_ad13               , bidir       ,      X,     138,   1,      Z          )," &
    " 138 (BC_2 , *                        , control     ,      1                                )," &
    " 137 (BC_7 , gpmc0_ad11               , bidir       ,      X,     136,   1,      Z          )," &
    " 136 (BC_2 , *                        , control     ,      1                                )," &
    " 135 (BC_7 , gpmc0_ad9                , bidir       ,      X,     134,   1,      Z          )," &
    " 134 (BC_2 , *                        , control     ,      1                                )," &
    " 133 (BC_1 , *                        , internal    ,      0                                )," &
    " 132 (BC_1 , *                        , internal    ,      0                                )," &
    " 131 (BC_7 , gpmc0_ad7                , bidir       ,      X,     130,   1,      Z          )," &
    " 130 (BC_2 , *                        , control     ,      1                                )," &
    " 129 (BC_7 , gpmc0_ad5                , bidir       ,      X,     128,   1,      Z          )," &
    " 128 (BC_2 , *                        , control     ,      1                                )," &
    " 127 (BC_7 , gpmc0_ad3                , bidir       ,      X,     126,   1,      Z          )," &
    " 126 (BC_2 , *                        , control     ,      1                                )," &
    " 125 (BC_7 , gpmc0_ad1                , bidir       ,      X,     124,   1,      Z          )," &
    " 124 (BC_2 , *                        , control     ,      1                                )," &
    " 123 (BC_7 , gpmc0_be1n               , bidir       ,      X,     122,   1,      Z          )," &
    " 122 (BC_2 , *                        , control     ,      1                                )," &
    " 121 (BC_7 , gpmc0_wen                , bidir       ,      X,     120,   1,      Z          )," &
    " 120 (BC_2 , *                        , control     ,      1                                )," &
    " 119 (BC_7 , gpmc0_advn_ale           , bidir       ,      X,     118,   1,      Z          )," &
    " 118 (BC_2 , *                        , control     ,      1                                )," &
    " 117 (BC_7 , gpmc0_dir                , bidir       ,      X,     116,   1,      Z          )," &
    " 116 (BC_2 , *                        , control     ,      1                                )," &
    " 115 (BC_7 , gpmc0_csn1               , bidir       ,      X,     114,   1,      Z          )," &
    " 114 (BC_2 , *                        , control     ,      1                                )," &
    " 113 (BC_7 , gpmc0_csn3               , bidir       ,      X,     112,   1,      Z          )," &
    " 112 (BC_2 , *                        , control     ,      1                                )," &
    " 111 (BC_7 , ospi0_d6                 , bidir       ,      X,     110,   1,      Z          )," &
    " 110 (BC_2 , *                        , control     ,      1                                )," &
    " 109 (BC_7 , ospi0_d4                 , bidir       ,      X,     108,   1,      Z          )," &
    " 108 (BC_2 , *                        , control     ,      1                                )," &
    " 107 (BC_7 , ospi0_lbclko             , bidir       ,      X,     106,   1,      Z          )," &
    " 106 (BC_2 , *                        , control     ,      1                                )," &
    " 105 (BC_7 , ospi0_d3                 , bidir       ,      X,     104,   1,      Z          )," &
    " 104 (BC_2 , *                        , control     ,      1                                )," &
    " 103 (BC_7 , ospi0_d1                 , bidir       ,      X,     102,   1,      Z          )," &
    " 102 (BC_2 , *                        , control     ,      1                                )," &
    " 101 (BC_7 , ospi0_csn0               , bidir       ,      X,     100,   1,      Z          )," &
    " 100 (BC_2 , *                        , control     ,      1                                )," &
    "  99 (BC_7 , ospi0_csn2               , bidir       ,      X,      98,   1,      Z          )," &
    "  98 (BC_2 , *                        , control     ,      1                                )," &
    "  97 (BC_7 , mmc2_dat3                , bidir       ,      X,      96,   1,      Z          )," &
    "  96 (BC_2 , *                        , control     ,      1                                )," &
    "  95 (BC_1 , *                        , internal    ,      0                                )," &
    "  94 (BC_1 , *                        , internal    ,      0                                )," &
    "  93 (BC_7 , mmc2_dat1                , bidir       ,      X,      92,   1,      Z          )," &
    "  92 (BC_2 , *                        , control     ,      1                                )," &
    "  91 (BC_7 , mmc2_cmd                 , bidir       ,      X,      90,   1,      Z          )," &
    "  90 (BC_2 , *                        , control     ,      1                                )," &
    "  89 (BC_7 , mmc2_sdcd                , bidir       ,      X,      88,   1,      Z          )," &
    "  88 (BC_2 , *                        , control     ,      1                                )," &
    "  87 (BC_7 , mmc1_dat2                , bidir       ,      X,      86,   1,      Z          )," &
    "  86 (BC_2 , *                        , control     ,      1                                )," &
    "  85 (BC_7 , mmc1_clk                 , bidir       ,      X,      84,   1,      Z          )," &
    "  84 (BC_2 , *                        , control     ,      1                                )," &
    "  83 (BC_7 , mmc1_dat0                , bidir       ,      X,      82,   1,      Z          )," &
    "  82 (BC_2 , *                        , control     ,      1                                )," &
    "  81 (BC_7 , porz_out                 , bidir       ,      X,      80,   1,      Z          )," &
    "  80 (BC_2 , *                        , control     ,      1                                )," &
    "  79 (BC_7 , usb0_drvvbus             , bidir       ,      X,      78,   1,      PULL0      )," &
    "  78 (BC_2 , *                        , control     ,      1                                )," &
    "  77 (BC_7 , mcasp0_aclkr             , bidir       ,      X,      76,   1,      Z          )," &
    "  76 (BC_2 , *                        , control     ,      1                                )," &
    "  75 (BC_7 , mcasp0_aclkx             , bidir       ,      X,      74,   1,      Z          )," &
    "  74 (BC_2 , *                        , control     ,      1                                )," &
    "  73 (BC_7 , mcasp0_axr1              , bidir       ,      X,      72,   1,      Z          )," &
    "  72 (BC_2 , *                        , control     ,      1                                )," &
    "  71 (BC_7 , mcasp0_axr3              , bidir       ,      X,      70,   1,      Z          )," &
    "  70 (BC_2 , *                        , control     ,      1                                )," &
    "  69 (BC_7 , mmc1_sdcd                , bidir       ,      X,      68,   1,      Z          )," &
    "  68 (BC_2 , *                        , control     ,      1                                )," &
    "  67 (BC_7 , i2c1_sda                 , bidir       ,      X,      66,   1,      Z          )," &
    "  66 (BC_2 , *                        , control     ,      1                                )," &
    "  65 (BC_7 , i2c0_scl                 , bidir       ,      X,      64,   1,      Z          )," &
    "  64 (BC_2 , *                        , control     ,      1                                )," &
    "  63 (BC_7 , mcan0_tx                 , bidir       ,      X,      62,   1,      Z          )," &
    "  62 (BC_2 , *                        , control     ,      1                                )," &
    "  61 (BC_7 , uart0_ctsn               , bidir       ,      X,      60,   1,      Z          )," &
    "  60 (BC_2 , *                        , control     ,      1                                )," &
    "  59 (BC_7 , uart0_rxd                , bidir       ,      X,      58,   1,      Z          )," &
    "  58 (BC_2 , *                        , control     ,      1                                )," &
    "  57 (BC_7 , spi0_d0                  , bidir       ,      X,      56,   1,      Z          )," &
    "  56 (BC_2 , *                        , control     ,      1                                )," &
    "  55 (BC_7 , spi0_cs1                 , bidir       ,      X,      54,   1,      Z          )," &
    "  54 (BC_2 , *                        , control     ,      1                                )," &
    "  53 (BC_7 , mcu_uart0_ctsn           , bidir       ,      X,      52,   1,      Z          )," &
    "  52 (BC_2 , *                        , control     ,      1                                )," &
    "  51 (BC_7 , mcu_uart0_rxd            , bidir       ,      X,      50,   1,      Z          )," &
    "  50 (BC_2 , *                        , control     ,      1                                )," &
    "  49 (BC_7 , wkup_uart0_ctsn          , bidir       ,      X,      48,   1,      Z          )," &
    "  48 (BC_2 , *                        , control     ,      1                                )," &
    "  47 (BC_7 , wkup_uart0_rxd           , bidir       ,      X,      46,   1,      Z          )," &
    "  46 (BC_2 , *                        , control     ,      1                                )," &
    "  45 (BC_7 , mcu_mcan0_rx             , bidir       ,      X,      44,   1,      Z          )," &
    "  44 (BC_2 , *                        , control     ,      1                                )," &
    "  43 (BC_7 , mcu_mcan1_rx             , bidir       ,      X,      42,   1,      Z          )," &
    "  42 (BC_2 , *                        , control     ,      1                                )," &
    "  41 (BC_7 , pmic_lpm_en0             , bidir       ,      X,      40,   1,      Z          )," &
    "  40 (BC_2 , *                        , control     ,      1                                )," &
    "  39 (BC_7 , mcu_spi0_clk             , bidir       ,      X,      38,   1,      Z          )," &
    "  38 (BC_2 , *                        , control     ,      1                                )," &
    "  37 (BC_7 , mcu_spi0_d1              , bidir       ,      X,      36,   1,      Z          )," &
    "  36 (BC_2 , *                        , control     ,      1                                )," &
    "  35 (BC_1 , mcu_i2c0_scl             , output2     ,      1,      35,   1,      WEAK1      )," &
    "  34 (BC_1 , *                        , internal    ,      0                                )," &
    "  33 (BC_3 , mcu_i2c0_scl             , input       ,      X                                )," &
    "  32 (BC_1 , wkup_i2c0_scl            , output2     ,      1,      32,   1,      WEAK1      )," &
    "  31 (BC_1 , *                        , internal    ,      0                                )," &
    "  30 (BC_3 , wkup_i2c0_scl            , input       ,      X                                )," &
    "  29 (BC_7 , wkup_clkout0             , bidir       ,      X,      28,   1,      Z          )," &
    "  28 (BC_2 , *                        , control     ,      1                                )," &
    "  27 (BC_7 , mcu_errorn               , bidir       ,      X,      26,   1,      PULL0      )," &
    "  26 (BC_2 , *                        , control     ,      1                                )," &
    "  25 (BC_7 , mcu_resetstatz           , bidir       ,      X,      24,   1,      Z          )," &
    "  24 (BC_2 , *                        , control     ,      1                                )," &
    "  23 (BC_1 , wkup_i2c0_sda            , output2     ,      1,      23,   1,      WEAK1      )," &
    "  22 (BC_1 , *                        , internal    ,      0                                )," &
    "  21 (BC_3 , wkup_i2c0_sda            , input       ,      X                                )," &
    "  20 (BC_1 , mcu_i2c0_sda             , output2     ,      1,      20,   1,      WEAK1      )," &
    "  19 (BC_1 , *                        , internal    ,      0                                )," &
    "  18 (BC_3 , mcu_i2c0_sda             , input       ,      X                                )," &
    "  17 (BC_7 , mcu_spi0_d0              , bidir       ,      X,      16,   1,      Z          )," &
    "  16 (BC_2 , *                        , control     ,      1                                )," &
    "  15 (BC_7 , mcu_spi0_cs1             , bidir       ,      X,      14,   1,      Z          )," &
    "  14 (BC_2 , *                        , control     ,      1                                )," &
    "  13 (BC_7 , mcu_spi0_cs0             , bidir       ,      X,      12,   1,      Z          )," &
    "  12 (BC_2 , *                        , control     ,      1                                )," &
    "  11 (BC_7 , mcu_mcan1_tx             , bidir       ,      X,      10,   1,      Z          )," &
    "  10 (BC_2 , *                        , control     ,      1                                )," &
    "   9 (BC_7 , mcu_mcan0_tx             , bidir       ,      X,       8,   1,      Z          )," &
    "   8 (BC_2 , *                        , control     ,      1                                )," &
    "   7 (BC_7 , wkup_uart0_txd           , bidir       ,      X,       6,   1,      Z          )," &
    "   6 (BC_2 , *                        , control     ,      1                                )," &
    "   5 (BC_7 , wkup_uart0_rtsn          , bidir       ,      X,       4,   1,      Z          )," &
    "   4 (BC_2 , *                        , control     ,      1                                )," &
    "   3 (BC_7 , mcu_uart0_txd            , bidir       ,      X,       2,   1,      Z          )," &
    "   2 (BC_2 , *                        , control     ,      1                                )," &
    "   1 (BC_7 , mcu_uart0_rtsn           , bidir       ,      X,       0,   1,      Z          )," &
    "   0 (BC_2 , *                        , control     ,      1                                )";

  attribute DESIGN_WARNING of AM62 : entity is
   " According to simulation, BSD JTAG TAP may not work correctly unless  "&
   " device has completed RESET sequence first.                           "&
   " Forcing PORz low then release (no clock pulses required) would meet  "&
   " the requirement.                                                     "&
   "                                                                      "&
   " Note that boundary scan registers with disable result WEAK1 are      "&
   " open drain type pins, which will require external pull-ups for       "&
   " test to perform correctly.                                           "&
   "                                                                      "&
   " In order to enter bscan mode correctly, TMS must be low at the       "&
   " rising edge of TRSTz and at least one cycle after TRSTz is high.     ";

end AM62;
