diff --git a/source/drivers/hw_include/am64x_am243x/cslr_soc_baseaddress.h b/source/drivers/hw_include/am64x_am243x/cslr_soc_baseaddress.h
index 67060d6..2939b61 100755
--- a/source/drivers/hw_include/am64x_am243x/cslr_soc_baseaddress.h
+++ b/source/drivers/hw_include/am64x_am243x/cslr_soc_baseaddress.h
@@ -826,6 +826,8 @@ extern "C"
 #define CSL_GPMC0_DATA_SIZE                                                                        (0x8000000UL)
 #define CSL_FSS0_DAT_REG1_BASE                                                                     (0x60000000UL)
 #define CSL_FSS0_DAT_REG1_SIZE                                                                     (0x8000000UL)
+#define CSL_FSS0_DAT_REG2_BASE                                                                     (0x90000000UL)
+#define CSL_FSS0_DAT_REG2_SIZE                                                                     (0x10000000UL)
 #define CSL_PCIE0_DAT0_BASE                                                                        (0x68000000UL)
 #define CSL_PCIE0_DAT0_SIZE                                                                        (0x8000000UL)
 #define CSL_MSRAM_256K0_RAM_BASE                                                                   (0x70000000UL)
diff --git a/source/drivers/soc/am64x_am243x/soc.c b/source/drivers/soc/am64x_am243x/soc.c
index 7e2491b..9e3bffd 100644
--- a/source/drivers/soc/am64x_am243x/soc.c
+++ b/source/drivers/soc/am64x_am243x/soc.c
@@ -1251,7 +1251,7 @@ int32_t SOC_isHsDevice(void)
 
 uint32_t SOC_getFlashDataBaseAddr(void)
 {
-    return CSL_FSS0_DAT_REG1_BASE;
+    return CSL_FSS0_DAT_REG2_BASE;
 }
 
 /* Fast mode drive strength fix
diff --git a/source/drivers/soc/am64x_am243x/soc.h b/source/drivers/soc/am64x_am243x/soc.h
index d68baab..54252da 100755
--- a/source/drivers/soc/am64x_am243x/soc.h
+++ b/source/drivers/soc/am64x_am243x/soc.h
@@ -213,7 +213,7 @@ static inline int32_t MMCSD_lld_isBaseAddrValid(uint32_t ctrlBaseAddr,
 #define IS_OSPI_BASE_ADDR_VALID(baseAddr)    (baseAddr == CSL_FSS0_OSPI0_CTRL_BASE)
 
 /** \brief Macro to check if the OSPI base address is valid */
-#define IS_OSPI_DATA_BASE_ADDR_VALID(baseAddr)    (baseAddr == CSL_FSS0_DAT_REG1_BASE)
+#define IS_OSPI_DATA_BASE_ADDR_VALID(baseAddr)    (baseAddr == CSL_FSS0_DAT_REG2_BASE)
 
 /**
  * \brief Enable clock to specified module
diff --git a/source/sysconfig/drivers/.meta/ospi/soc/ospi_am64x.syscfg.js b/source/sysconfig/drivers/.meta/ospi/soc/ospi_am64x.syscfg.js
index fa61315..d57947a 100644
--- a/source/sysconfig/drivers/.meta/ospi/soc/ospi_am64x.syscfg.js
+++ b/source/sysconfig/drivers/.meta/ospi/soc/ospi_am64x.syscfg.js
@@ -6,7 +6,7 @@ const ospi_config_r5fss = [
     {
         name            : "OSPI0",
         baseAddr        : "CSL_FSS0_OSPI0_CTRL_BASE",
-        dataBaseAddr    : "CSL_FSS0_DAT_REG1_BASE",
+        dataBaseAddr    : "CSL_FSS0_DAT_REG2_BASE",
         inputClkFreq    : ospi_input_clk_freq,
         dacEnable       : false,
         baudRateDiv     : 4,