diff --git a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts index e362bfbb6..85331a7f8 100644 --- a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts @@ -12,10 +12,13 @@ #include #include "k3-j722s.dtsi" #include "k3-serdes.h" +#include +#include +#include / { compatible = "ti,j722s-evm", "ti,j722s"; - model = "Texas Instruments J722S EVM"; + model = "6K15"; aliases { serial0 = &wkup_uart0; @@ -23,6 +26,10 @@ aliases { serial3 = &main_uart5; mmc0 = &sdhci0; mmc1 = &sdhci1; + ethernet0 = &cpsw_port1; + ethernet1 = &cpsw_port2; + usb0 = &usb0; + usb1 = &usb1; }; chosen { @@ -157,20 +164,16 @@ vdd_mmc1: regulator-mmc1 { regulator-max-microvolt = <3300000>; regulator-boot-on; enable-active-high; - gpio = <&exp1 15 GPIO_ACTIVE_HIGH>; bootph-all; }; vdd_sd_dv: regulator-TLV71033 { compatible = "regulator-gpio"; regulator-name = "tlv71033"; - pinctrl-names = "default"; - pinctrl-0 = <&vdd_sd_dv_pins_default>; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <3300000>; regulator-boot-on; vin-supply = <&vsys_5v0>; - gpios = <&main_gpio0 70 GPIO_ACTIVE_HIGH>; states = <1800000 0x0>, <3300000 0x1>; }; @@ -202,70 +205,494 @@ vsys_io_1v2: regulator-vsys-io-1v2 { regulator-boot-on; }; - codec_audio: sound { - compatible = "simple-audio-card"; - simple-audio-card,name = "J722S-EVM"; - simple-audio-card,widgets = - "Headphone", "Headphone Jack", - "Line", "Line In", - "Microphone", "Microphone Jack"; - simple-audio-card,routing = - "Headphone Jack", "HPLOUT", - "Headphone Jack", "HPROUT", - "LINE1L", "Line In", - "LINE1R", "Line In", - "MIC3R", "Microphone Jack", - "Microphone Jack", "Mic Bias"; - simple-audio-card,format = "dsp_b"; - simple-audio-card,bitclock-master = <&sound_master>; - simple-audio-card,frame-master = <&sound_master>; - simple-audio-card,bitclock-inversion; - - simple-audio-card,cpu { - sound-dai = <&mcasp1>; + leds: leds { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&run_led_pins_default + &main_usb0_pins_default + &main_usb1_pins_default + &mcu_usb1_reset_pins_default + &wifi_en_pins_default + &mcu_eqep1_led_pins_default>; + compatible = "gpio-leds"; + + run { + label = "run"; + gpios = <&main_gpio1 49 GPIO_ACTIVE_LOW>; + linux,default-trigger = "heartbeat"; + default-state = "on"; + }; + + usb0-drvvbus { + label = "usb0-drvvbus"; + gpios = <&main_gpio1 50 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "default-on"; + default-state = "on"; + }; + + usb1-drvvbus { + label = "usb1-drvvbus"; + gpios = <&main_gpio1 51 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "default-on"; + default-state = "on"; + }; + + usb1-rst { + label = "usb1-rst"; + gpios = <&mcu_gpio0 22 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "default-on"; + default-state = "on"; + }; + + wifi-en { + label = "wifi-en"; + gpios = <&mcu_gpio0 23 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "default-on"; + default-state = "on"; + }; + + blue { + label = "blue"; + gpios = <&mcu_gpio0 10 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "default-on"; + default-state = "on"; + }; + + green { + label = "green"; + gpios = <&mcu_gpio0 11 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "default-on"; + default-state = "on"; }; - sound_master: simple-audio-card,codec { - sound-dai = <&tlv320aic3106>; - clocks = <&audio_refclk1>; + red { + label = "red"; + gpios = <&mcu_gpio0 12 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "default-on"; + default-state = "on"; }; }; - transceiver0: can-phy0 { - compatible = "ti,tcan1042"; - #phy-cells = <0>; - max-bitrate = <5000000>; + // codec_audio: sound { + // compatible = "simple-audio-card"; + // simple-audio-card,name = "J722S-EVM"; + // simple-audio-card,widgets = + // "Headphone", "Headphone Jack", + // "Line", "Line In", + // "Microphone", "Microphone Jack"; + // simple-audio-card,routing = + // "Headphone Jack", "HPLOUT", + // "Headphone Jack", "HPROUT", + // "LINE1L", "Line In", + // "LINE1R", "Line In", + // "MIC3R", "Microphone Jack", + // "Microphone Jack", "Mic Bias"; + // simple-audio-card,format = "dsp_b"; + // simple-audio-card,bitclock-master = <&sound_master>; + // simple-audio-card,frame-master = <&sound_master>; + // simple-audio-card,bitclock-inversion; + + // simple-audio-card,cpu { + // sound-dai = <&mcasp1>; + // }; + + // sound_master: simple-audio-card,codec { + // sound-dai = <&tlv320aic3106>; + // clocks = <&audio_refclk1>; + // }; + // }; + + // transceiver0: can-phy0 { + // compatible = "ti,tcan1042"; + // #phy-cells = <0>; + // max-bitrate = <5000000>; + // pinctrl-names = "default"; + // pinctrl-0 = <&mcu_mcan0_gpio_pins_default>; + // standby-gpios = <&mcu_gpio0 12 GPIO_ACTIVE_HIGH>; + // }; + + // transceiver1: can-phy1 { + // compatible = "ti,tcan1042"; + // #phy-cells = <0>; + // max-bitrate = <5000000>; + // }; + + // transceiver2: can-phy2 { + // compatible = "ti,tcan1042"; + // #phy-cells = <0>; + // max-bitrate = <5000000>; + // standby-gpios = <&exp1 17 GPIO_ACTIVE_HIGH>; + // }; + + // hdmi0: connector-hdmi { + // compatible = "hdmi-connector"; + // label = "hdmi"; + // type = "a"; + // port { + // hdmi_connector_in: endpoint { + // remote-endpoint = <&sii9022_out>; + // }; + // }; + // }; + + lvds_backlight: lvds_backlight { + status = "disabled"; + compatible = "pwm-backlight"; pinctrl-names = "default"; - pinctrl-0 = <&mcu_mcan0_gpio_pins_default>; - standby-gpios = <&mcu_gpio0 12 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&lvds_bl_en_pins_default>; + pwms = <&epwm1 0 1000000 1000000>; + brightness-levels = <0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 75 80 85 90 95 100>; + default-brightness-level = <20>; + enable-gpios = <&main_gpio1 7 GPIO_ACTIVE_HIGH>; }; - transceiver1: can-phy1 { - compatible = "ti,tcan1042"; - #phy-cells = <0>; - max-bitrate = <5000000>; + edp_backlight: edp_backlight { + status = "okay"; + compatible = "pwm-backlight"; + pinctrl-names = "default"; + pinctrl-0 = <&edp_bl_en_pins_default>; + pwms = <&epwm2 0 1000000 1000000>; + brightness-levels = <0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 75 80 85 90 95 100>; + default-brightness-level = <20>; + enable-gpios = <&main_gpio0 43 GPIO_ACTIVE_HIGH>; }; - transceiver2: can-phy2 { - compatible = "ti,tcan1042"; - #phy-cells = <0>; - max-bitrate = <5000000>; - standby-gpios = <&exp1 17 GPIO_ACTIVE_HIGH>; - }; + display { + compatible = "ct,inc15"; + backlight = <&edp_backlight>; + /* + * Note that the OLDI TX 0 transmits the odd set of pixels + * while the OLDI TX 1 transmits the even set. This is a + * fixed configuration in the IP integration and is not + * changeable. The properties, "dual-lvds-odd-pixels" and + * "dual-lvds-even-pixels" have been used to merely + * identify if a Dual Link configuration is required. + * Swapping them will cause an error in the dss oldi driver. + */ + ports { + #address-cells = <1>; + #size-cells = <0>; - hdmi0: connector-hdmi { - compatible = "hdmi-connector"; - label = "hdmi"; - type = "a"; - port { - hdmi_connector_in: endpoint { - remote-endpoint = <&sii9022_out>; + port@0 { + reg = <0>; + dual-lvds-odd-pixels; + + lcd_in0: endpoint { + remote-endpoint = <&oldi0_dss0_out>; + }; + }; + + port@1 { + reg = <1>; + dual-lvds-even-pixels; + + lcd_in1: endpoint { + remote-endpoint = <&oldi1_dss0_out>; + }; }; }; }; + + pwm-beeper { + status = "okay"; + compatible = "pwm-beeper"; + pwms = <&epwm0 0 100000 0>; + amp-supply = <&vsys_5v0>; + beeper-hz = <100000>; + }; + + power_cut { + status = "okay"; + compatible = "cotrust,power"; + pinctrl-names = "default"; + pinctrl-0 = <&pwr_pins_default>; + irq = <&main_gpio1 31 GPIO_ACTIVE_LOW>; + }; + + matrix_keyboard: matrix_keyboard0 { + compatible = "gpio-matrix-keypad"; + pinctrl-names = "default"; + pinctrl-0 = <&gpio_matrix_keypad_pins_default>; + debounce-delay-ms = <10>; + col-scan-delay-us = <20>; + drive-inactive-cols; + gpio-activelow; + + /* row input */ + row-gpios = < + &main_gpio0 40 GPIO_ACTIVE_LOW /* (N25) GPMC0_DIR.GPIO0_40 */ /* KEYL0 */ + &main_gpio0 72 GPIO_ACTIVE_LOW /* (H21) MMC2_SDWP.GPIO0_72 */ /* KEYL1 */ + &main_gpio0 68 GPIO_ACTIVE_LOW /* (G26) MMC2_DAT0.GPIO0_68 */ /* KEYL2 */ + &main_gpio0 66 GPIO_ACTIVE_LOW /* (H27) MMC2_DAT2.GPIO0_66 */ /* KEYL3 */ + &main_gpio0 52 GPIO_ACTIVE_LOW /* (Y27) VOUT0_DATA7.GPIO0_52 */ /* KEYL4 */ + &main_gpio0 51 GPIO_ACTIVE_LOW /* (Y26) VOUT0_DATA6.GPIO0_51 */ /* KEYL5 */ + &main_gpio0 50 GPIO_ACTIVE_LOW /* (W21) VOUT0_DATA5.GPIO0_50 */ /* KEYL6 */ + &main_gpio0 49 GPIO_ACTIVE_LOW /* (W22) VOUT0_DATA4.GPIO0_49 */ /* KEYL7 */ + &main_gpio0 47 GPIO_ACTIVE_LOW /* (W24) VOUT0_DATA2.GPIO0_47 */ /* KEYL8 */ + >; + /* col output */ + col-gpios = < + &main_gpio0 0 GPIO_ACTIVE_LOW /* (L24) OSPI0_CLK.GPIO0_0 */ /* KEYR0 */ + &main_gpio0 2 GPIO_ACTIVE_LOW /* (L22) OSPI0_DQS.GPIO0_2 */ /* KEYR1 */ + &main_gpio0 3 GPIO_ACTIVE_LOW /* (K27) OSPI0_D0.GPIO0_3 */ /* KEYR2 */ + &main_gpio0 4 GPIO_ACTIVE_LOW /* (L27) OSPI0_D1.GPIO0_4 */ /* KEYR3 */ + &main_gpio0 5 GPIO_ACTIVE_LOW /* (L26) OSPI0_D2.GPIO0_5 */ /* KEYR4 */ + &main_gpio0 6 GPIO_ACTIVE_LOW /* (L25) OSPI0_D3.GPIO0_6 */ /* KEYR5 */ + &main_gpio0 11 GPIO_ACTIVE_LOW /* (K26) OSPI0_CSn0.GPIO0_11 */ /* KEYR6 */ + &main_gpio0 12 GPIO_ACTIVE_LOW /* (K23) OSPI0_CSn1.GPIO0_12 */ /* KEYR7 */ + &main_gpio0 31 GPIO_ACTIVE_LOW /* (T23) GPMC0_CLK.GPIO0_31 */ /* KEYR8 */ + &main_gpio0 33 GPIO_ACTIVE_LOW /* (N22) GPMC0_OEn_REn.GPIO0_33 */ /* KEYR9 */ + &main_gpio0 36 GPIO_ACTIVE_LOW /* (P26) GPMC0_BE1n.GPIO0_36 */ /* KEYR10 */ + &main_gpio0 38 GPIO_ACTIVE_LOW /* (W26) GPMC0_WAIT1.GPIO0_38 */ /* KEYR11 */ + &main_gpio0 39 GPIO_ACTIVE_LOW /* (N24) GPMC0_WPn.GPIO0_39 */ /* KEYR12 */ + >; + + linux,keymap = < + MATRIX_KEY(0x00, 0x00, KEY_RESERVED) + MATRIX_KEY(0x00, 0x01, KEY_RESERVED) + MATRIX_KEY(0x00, 0x02, KEY_RESERVED) + MATRIX_KEY(0x00, 0x03, KEY_RESERVED) + MATRIX_KEY(0x00, 0x04, KEY_RESERVED) + MATRIX_KEY(0x00, 0x05, KEY_RESERVED) + MATRIX_KEY(0x00, 0x06, KEY_RESERVED) + MATRIX_KEY(0x00, 0x07, KEY_RESERVED) + MATRIX_KEY(0x00, 0x08, KEY_RESERVED) + MATRIX_KEY(0x00, 0x09, KEY_RESERVED) + MATRIX_KEY(0x00, 0x0a, KEY_RESERVED) + MATRIX_KEY(0x00, 0x0b, KEY_RESERVED) + MATRIX_KEY(0x00, 0x0c, KEY_RESERVED) + + MATRIX_KEY(0x01, 0x00, KEY_RESERVED) + MATRIX_KEY(0x01, 0x01, KEY_RESERVED) + MATRIX_KEY(0x01, 0x02, KEY_RESERVED) + MATRIX_KEY(0x01, 0x03, KEY_RESERVED) + MATRIX_KEY(0x01, 0x04, KEY_RESERVED) + MATRIX_KEY(0x01, 0x05, KEY_RESERVED) + MATRIX_KEY(0x01, 0x06, KEY_RESERVED) + MATRIX_KEY(0x01, 0x07, KEY_RESERVED) + MATRIX_KEY(0x01, 0x08, KEY_RESERVED) + MATRIX_KEY(0x01, 0x09, KEY_RESERVED) + MATRIX_KEY(0x01, 0x0a, KEY_RESERVED) + MATRIX_KEY(0x01, 0x0b, KEY_RESERVED) + MATRIX_KEY(0x01, 0x0c, KEY_RESERVED) + + MATRIX_KEY(0x02, 0x00, KEY_RESERVED) + MATRIX_KEY(0x02, 0x01, KEY_RESERVED) + MATRIX_KEY(0x02, 0x02, KEY_RESERVED) + MATRIX_KEY(0x02, 0x03, KEY_RESERVED) + MATRIX_KEY(0x02, 0x04, KEY_RESERVED) + MATRIX_KEY(0x02, 0x05, KEY_RESERVED) + MATRIX_KEY(0x02, 0x06, KEY_RESERVED) + MATRIX_KEY(0x02, 0x07, KEY_RESERVED) + MATRIX_KEY(0x02, 0x08, KEY_RESERVED) + MATRIX_KEY(0x02, 0x09, KEY_RESERVED) + MATRIX_KEY(0x02, 0x0a, KEY_RESERVED) + MATRIX_KEY(0x02, 0x0b, KEY_RESERVED) + MATRIX_KEY(0x02, 0x0c, KEY_RESERVED) + + MATRIX_KEY(0x03, 0x00, KEY_RESERVED) + MATRIX_KEY(0x03, 0x01, KEY_RESERVED) + MATRIX_KEY(0x03, 0x02, KEY_RESERVED) + MATRIX_KEY(0x03, 0x03, KEY_RESERVED) + MATRIX_KEY(0x03, 0x04, KEY_RESERVED) + MATRIX_KEY(0x03, 0x05, KEY_RESERVED) + MATRIX_KEY(0x03, 0x06, KEY_RESERVED) + MATRIX_KEY(0x03, 0x07, KEY_MUTE) + MATRIX_KEY(0x03, 0x08, KEY_SETUP) + MATRIX_KEY(0x03, 0x09, KEY_CANCEL) + MATRIX_KEY(0x03, 0x0a, KEY_PROGRAM) + MATRIX_KEY(0x03, 0x0b, KEY_CHANNELUP) + MATRIX_KEY(0x03, 0x0c, KEY_RESERVED) + + MATRIX_KEY(0x04, 0x00, KEY_RESERVED) + MATRIX_KEY(0x04, 0x01, KEY_RESERVED) + MATRIX_KEY(0x04, 0x02, KEY_RESERVED) + MATRIX_KEY(0x04, 0x03, KEY_RESERVED) + MATRIX_KEY(0x04, 0x04, KEY_RESERVED) + MATRIX_KEY(0x04, 0x05, KEY_RESERVED) + MATRIX_KEY(0x04, 0x06, KEY_RESERVED) + MATRIX_KEY(0x04, 0x07, KEY_VOLUMEDOWN) + MATRIX_KEY(0x04, 0x08, KEY_RECORD) + MATRIX_KEY(0x04, 0x09, KEY_MICMUTE) + MATRIX_KEY(0x04, 0x0a, KEY_CALENDAR) + MATRIX_KEY(0x04, 0x0b, KEY_CHANNELDOWN) + MATRIX_KEY(0x04, 0x0c, KEY_RESERVED) + + MATRIX_KEY(0x05, 0x00, KEY_RESERVED) + MATRIX_KEY(0x05, 0x01, KEY_RESERVED) + MATRIX_KEY(0x05, 0x02, KEY_RESERVED) + MATRIX_KEY(0x05, 0x03, KEY_RESERVED) + MATRIX_KEY(0x05, 0x04, KEY_RESERVED) + MATRIX_KEY(0x05, 0x05, KEY_RESERVED) + MATRIX_KEY(0x05, 0x06, KEY_RESERVED) + MATRIX_KEY(0x05, 0x07, KEY_VOLUMEUP) + MATRIX_KEY(0x05, 0x08, KEY_REWIND) + MATRIX_KEY(0x05, 0x09, KEY_SELECT) + MATRIX_KEY(0x05, 0x0a, KEY_RED) + MATRIX_KEY(0x05, 0x0b, KEY_TOUCHPAD_TOGGLE) + MATRIX_KEY(0x05, 0x0c, KEY_RESERVED) + + MATRIX_KEY(0x06, 0x00, KEY_RESERVED) + MATRIX_KEY(0x06, 0x01, KEY_RESERVED) + MATRIX_KEY(0x06, 0x02, KEY_RESERVED) + MATRIX_KEY(0x06, 0x03, KEY_RESERVED) + MATRIX_KEY(0x06, 0x04, KEY_RESERVED) + MATRIX_KEY(0x06, 0x05, KEY_RESERVED) + MATRIX_KEY(0x06, 0x06, KEY_RESERVED) + MATRIX_KEY(0x06, 0x07, KEY_POWER) + MATRIX_KEY(0x06, 0x08, KEY_PLAYPAUSE) + MATRIX_KEY(0x06, 0x09, KEY_CLEAR) + MATRIX_KEY(0x06, 0x0a, KEY_GREEN) + MATRIX_KEY(0x06, 0x0b, KEY_TOUCHPAD_ON) + MATRIX_KEY(0x06, 0x0c, KEY_RESERVED) + + MATRIX_KEY(0x07, 0x00, KEY_RESERVED) + MATRIX_KEY(0x07, 0x01, KEY_RESERVED) + MATRIX_KEY(0x07, 0x02, KEY_RESERVED) + MATRIX_KEY(0x07, 0x03, KEY_RESERVED) + MATRIX_KEY(0x07, 0x04, KEY_RESERVED) + MATRIX_KEY(0x07, 0x05, KEY_RESERVED) + MATRIX_KEY(0x07, 0x06, KEY_RESERVED) + MATRIX_KEY(0x07, 0x07, KEY_PAUSE) + MATRIX_KEY(0x07, 0x08, KEY_PLAY) + MATRIX_KEY(0x07, 0x09, KEY_EXIT) + MATRIX_KEY(0x07, 0x0a, KEY_YELLOW) + MATRIX_KEY(0x07, 0x0b, KEY_TOUCHPAD_OFF) + MATRIX_KEY(0x07, 0x0c, KEY_RESERVED) + + MATRIX_KEY(0x08, 0x00, KEY_RESERVED) + MATRIX_KEY(0x08, 0x01, KEY_RESERVED) + MATRIX_KEY(0x08, 0x02, KEY_RESERVED) + MATRIX_KEY(0x08, 0x03, KEY_RESERVED) + MATRIX_KEY(0x08, 0x04, KEY_RESERVED) + MATRIX_KEY(0x08, 0x05, KEY_RESERVED) + MATRIX_KEY(0x08, 0x06, KEY_RESERVED) + MATRIX_KEY(0x08, 0x07, KEY_STOP) + MATRIX_KEY(0x08, 0x08, KEY_FASTFORWARD) + MATRIX_KEY(0x08, 0x09, KEY_INFO) + MATRIX_KEY(0x08, 0x0a, KEY_BLUE) + MATRIX_KEY(0x08, 0x0b, KEY_SLEEP) + MATRIX_KEY(0x08, 0x0c, KEY_RESERVED) + >; + }; }; &main_pmx0 { + eqep1_pins_default: eqep1-default-pins { + pinctrl-single,pins = < + J722S_IOPAD(0x01a4, PIN_INPUT, 8) /* (D25) MCASP0_ACLKX.EQEP1_A */ + J722S_IOPAD(0x01a8, PIN_INPUT, 8) /* (C26) MCASP0_AFSX.EQEP1_B */ + J722S_IOPAD(0x01b0, PIN_INPUT, 8) /* (F24) MCASP0_ACLKR.EQEP1_I */ + J722S_IOPAD(0x01ac, PIN_INPUT, 8) /* (C27) MCASP0_AFSR.EQEP1_S */ + >; + }; + + gpio_matrix_keypad_pins_default: gpio_matrix_keypad-pins-default { + pinctrl-single,pins = < + /* col output R */ + J722S_IOPAD(0x0000, PIN_OUTPUT, 7) /* (L24) OSPI0_CLK.GPIO0_0 */ + J722S_IOPAD(0x0008, PIN_OUTPUT, 7) /* (L22) OSPI0_DQS.GPIO0_2 */ + J722S_IOPAD(0x000c, PIN_OUTPUT, 7) /* (K27) OSPI0_D0.GPIO0_3 */ + J722S_IOPAD(0x0010, PIN_OUTPUT, 7) /* (L27) OSPI0_D1.GPIO0_4 */ + J722S_IOPAD(0x0014, PIN_OUTPUT, 7) /* (L26) OSPI0_D2.GPIO0_5 */ + J722S_IOPAD(0x0018, PIN_OUTPUT, 7) /* (L25) OSPI0_D3.GPIO0_6 */ + J722S_IOPAD(0x002c, PIN_OUTPUT, 7) /* (K26) OSPI0_CSn0.GPIO0_11 */ + J722S_IOPAD(0x0030, PIN_OUTPUT, 7) /* (K23) OSPI0_CSn1.GPIO0_12 */ + J722S_IOPAD(0x007c, PIN_OUTPUT, 7) /* (T23) GPMC0_CLK.GPIO0_31 */ + J722S_IOPAD(0x0088, PIN_OUTPUT, 7) /* (N22) GPMC0_OEn_REn.GPIO0_33 */ + J722S_IOPAD(0x0094, PIN_OUTPUT, 7) /* (P26) GPMC0_BE1n.GPIO0_36 */ + J722S_IOPAD(0x009c, PIN_OUTPUT, 7) /* (W26) GPMC0_WAIT1.GPIO0_38 */ + J722S_IOPAD(0x00a0, PIN_OUTPUT, 7) /* (N24) GPMC0_WPn.GPIO0_39 */ + + /* row input L*/ + J722S_IOPAD(0x00a4, PIN_INPUT, 7) /* (N25) GPMC0_DIR.GPIO0_40 */ + J722S_IOPAD(0x0128, PIN_INPUT, 7) /* (H21) MMC2_SDWP.GPIO0_72 */ + J722S_IOPAD(0x0114, PIN_INPUT, 7) /* (G26) MMC2_DAT0.GPIO0_68 */ + J722S_IOPAD(0x010c, PIN_INPUT, 7) /* (H27) MMC2_DAT2.GPIO0_66 */ + J722S_IOPAD(0x00d4, PIN_INPUT, 7) /* (Y27) VOUT0_DATA7.GPIO0_52 */ + J722S_IOPAD(0x00d0, PIN_INPUT, 7) /* (Y26) VOUT0_DATA6.GPIO0_51 */ + J722S_IOPAD(0x00cc, PIN_INPUT, 7) /* (W21) VOUT0_DATA5.GPIO0_50 */ + J722S_IOPAD(0x00c8, PIN_INPUT, 7) /* (W22) VOUT0_DATA4.GPIO0_49 */ + J722S_IOPAD(0x00c0, PIN_INPUT, 7) /* (W24) VOUT0_DATA2.GPIO0_47 */ + >; + }; + + pwr_pins_default: pwr-pins-default { + pinctrl-single,pins = < + J722S_IOPAD(0x01f4, PIN_INPUT, 7) /* (B23) EXTINTn.GPIO1_31 */ + >; + }; + + epwm0_pins_defaults: epwm0-default-pins { + pinctrl-single,pins = < + J722S_IOPAD(0x0108, PIN_OUTPUT, 4) /* (J27) MMC2_DAT3.EHRPWM0_A */ + >; + }; + + lvds_bl_en_pins_default: lvds_bl_en_pins_default{ + pinctrl-single,pins = < + J722S_IOPAD(0x0194, PIN_OUTPUT, 7) /* (A25) MCASP0_AXR3.GPIO1_7 */ + >; + }; + + lvds_bl_epwm1_pins_default: lvds_bl_epwm1_pins_default{ + pinctrl-single,pins = < + J722S_IOPAD(0x0110, PIN_OUTPUT, 4) /* (G27) MMC2_DAT1.EHRPWM1_A */ + >; + }; + + edp_bl_en_pins_default: edp_bl_en_pins_default{ + pinctrl-single,pins = < + J722S_IOPAD(0x00b0, PIN_OUTPUT, 7) /* (P22) GPMC0_CSn2.GPIO0_43 */ + >; + }; + + edp_bl_epwm2_pins_default: edp_bl_epwm2_pins_default{ + pinctrl-single,pins = < + J722S_IOPAD(0x0124, PIN_INPUT, 4) /* (F26) MMC2_SDCD.EHRPWM2_A */ + >; + }; + + oldi0_pins_default: oldi0-default-pins { + pinctrl-single,pins = < + J722S_IOPAD(0x0260, PIN_OUTPUT, 0) /* (AF23) OLDI0_A0N */ + J722S_IOPAD(0x025c, PIN_OUTPUT, 0) /* (AG24) OLDI0_A0P */ + J722S_IOPAD(0x0268, PIN_OUTPUT, 0) /* (AG22) OLDI0_A1N */ + J722S_IOPAD(0x0264, PIN_OUTPUT, 0) /* (AG23) OLDI0_A1P */ + J722S_IOPAD(0x0270, PIN_OUTPUT, 0) /* (AB20) OLDI0_A2N */ + J722S_IOPAD(0x026c, PIN_OUTPUT, 0) /* (AB21) OLDI0_A2P */ + J722S_IOPAD(0x0278, PIN_OUTPUT, 0) /* (AG20) OLDI0_A3N */ + J722S_IOPAD(0x0274, PIN_OUTPUT, 0) /* (AG21) OLDI0_A3P */ + J722S_IOPAD(0x0280, PIN_OUTPUT, 0) /* (AD21) OLDI0_A4N */ + J722S_IOPAD(0x027c, PIN_OUTPUT, 0) /* (AC21) OLDI0_A4P */ + J722S_IOPAD(0x0288, PIN_OUTPUT, 0) /* (AF19) OLDI0_A5N */ + J722S_IOPAD(0x0284, PIN_OUTPUT, 0) /* (AF18) OLDI0_A5P */ + J722S_IOPAD(0x0290, PIN_OUTPUT, 0) /* (AG17) OLDI0_A6N */ + J722S_IOPAD(0x028c, PIN_OUTPUT, 0) /* (AG18) OLDI0_A6P */ + J722S_IOPAD(0x0298, PIN_OUTPUT, 0) /* (AB19) OLDI0_A7N */ + J722S_IOPAD(0x0294, PIN_OUTPUT, 0) /* (AA20) OLDI0_A7P */ + J722S_IOPAD(0x02a0, PIN_OUTPUT, 0) /* (AF21) OLDI0_CLK0N */ + J722S_IOPAD(0x029c, PIN_OUTPUT, 0) /* (AE20) OLDI0_CLK0P */ + J722S_IOPAD(0x02a8, PIN_OUTPUT, 0) /* (AD20) OLDI0_CLK1N */ + J722S_IOPAD(0x02a4, PIN_OUTPUT, 0) /* (AE19) OLDI0_CLK1P */ + >; + }; + + spi0_pins_default: spi0-default-pins { + pinctrl-single,pins = < + J722S_IOPAD(0x01bc, PIN_OUTPUT, 0) /* (D20) SPI0_CLK */ + J722S_IOPAD(0x01b4, PIN_OUTPUT, 0) /* (B20) SPI0_CS0 */ + J722S_IOPAD(0x01b8, PIN_OUTPUT, 0) /* (C20) SPI0_CS1 */ + J722S_IOPAD(0x01c0, PIN_OUTPUT, 0) /* (E19) SPI0_D0 */ + J722S_IOPAD(0x01c4, PIN_INPUT, 0) /* (E20) SPI0_D1 */ + >; + }; + + run_led_pins_default: run-led-pins-default { + pinctrl-single,pins = < + J722S_IOPAD(0x0244, PIN_INPUT, 7) /* (A24) MMC1_SDWP.GPIO1_49 */ + >; + }; main_mcan0_pins_default: main-mcan0-default-pins { pinctrl-single,pins = < @@ -290,13 +717,6 @@ J722S_IOPAD(0x01ec, PIN_INPUT_PULLUP, 0) /* (A22) I2C1_SDA */ bootph-all; }; - main_i2c2_pins_default: main-i2c2-default-pins { - pinctrl-single,pins = < - J722S_IOPAD(0x00b0, PIN_INPUT_PULLUP, 1) /* (P22) GPMC0_CSn2.I2C2_SCL */ - J722S_IOPAD(0x00b4, PIN_INPUT_PULLUP, 1) /* (P23) GPMC0_CSn3.I2C2_SDA */ - >; - }; - main_uart0_pins_default: main-uart0-default-pins { pinctrl-single,pins = < J722S_IOPAD(0x01c8, PIN_INPUT, 0) /* (A22) UART0_RXD */ @@ -305,13 +725,6 @@ J722S_IOPAD(0x01cc, PIN_OUTPUT, 0) /* (B22) UART0_TXD */ bootph-all; }; - main_uart5_pins_default: main-uart5-default-pins { - pinctrl-single,pins = < - J722S_IOPAD(0x0108, PIN_INPUT, 3) /* (J27) UART5_RXD */ - J722S_IOPAD(0x010c, PIN_OUTPUT, 3) /* (H27) UART5_TXD */ - >; - }; - vdd_sd_dv_pins_default: vdd-sd-dv-default-pins { pinctrl-single,pins = < J722S_IOPAD(0x0120, PIN_INPUT, 7) /* (F27) MMC2_CMD.GPIO0_70 */ @@ -340,105 +753,72 @@ J722S_IOPAD(0x015c, PIN_INPUT, 0) /* (AD25) MDIO0_MDIO */ bootph-all; }; - ospi0_pins_default: ospi0-default-pins { + rmii1_pins_default: rmii1-default-pins { pinctrl-single,pins = < - J722S_IOPAD(0x0000, PIN_OUTPUT, 0) /* (L24) OSPI0_CLK */ - J722S_IOPAD(0x002c, PIN_OUTPUT, 0) /* (K26) OSPI0_CSn0 */ - J722S_IOPAD(0x000c, PIN_INPUT, 0) /* (K27) OSPI0_D0 */ - J722S_IOPAD(0x0010, PIN_INPUT, 0) /* (L27) OSPI0_D1 */ - J722S_IOPAD(0x0014, PIN_INPUT, 0) /* (L26) OSPI0_D2 */ - J722S_IOPAD(0x0018, PIN_INPUT, 0) /* (L25) OSPI0_D3 */ - J722S_IOPAD(0x001c, PIN_INPUT, 0) /* (L21) OSPI0_D4 */ - J722S_IOPAD(0x0020, PIN_INPUT, 0) /* (M26) OSPI0_D5 */ - J722S_IOPAD(0x0024, PIN_INPUT, 0) /* (N27) OSPI0_D6 */ - J722S_IOPAD(0x0028, PIN_INPUT, 0) /* (M27) OSPI0_D7 */ - J722S_IOPAD(0x0008, PIN_INPUT, 0) /* (L22) OSPI0_DQS */ + J722S_IOPAD(0x0130, PIN_INPUT, 1) /* (AG26) RGMII1_TXC.RMII1_CRS_DV */ + J722S_IOPAD(0x0148, PIN_INPUT, 1) /* (AE27) RGMII1_RXC.RMII1_REF_CLK */ + J722S_IOPAD(0x014c, PIN_INPUT, 1) /* (AC25) RGMII1_RD0.RMII1_RXD0 */ + J722S_IOPAD(0x0150, PIN_INPUT, 1) /* (AD27) RGMII1_RD1.RMII1_RXD1 */ + /* J722S_IOPAD(0x0144, PIN_INPUT, 1) /* (AD23) RGMII1_RX_CTL.RMII1_RX_ER */ + J722S_IOPAD(0x0134, PIN_OUTPUT, 1) /* (AF27) RGMII1_TD0.RMII1_TXD0 */ + J722S_IOPAD(0x0138, PIN_OUTPUT, 1) /* (AE23) RGMII1_TD1.RMII1_TXD1 */ + J722S_IOPAD(0x012c, PIN_OUTPUT, 1) /* (AF25) RGMII1_TX_CTL.RMII1_TX_EN */ >; - bootph-all; }; - rgmii1_pins_default: rgmii1-default-pins { + rgmii2_pins_default: rgmii2-default-pins { pinctrl-single,pins = < - J722S_IOPAD(0x014c, PIN_INPUT, 0) /* (AC25) RGMII1_RD0 */ - J722S_IOPAD(0x0150, PIN_INPUT, 0) /* (AD27) RGMII1_RD1 */ - J722S_IOPAD(0x0154, PIN_INPUT, 0) /* (AE24) RGMII1_RD2 */ - J722S_IOPAD(0x0158, PIN_INPUT, 0) /* (AE26) RGMII1_RD3 */ - J722S_IOPAD(0x0148, PIN_INPUT, 0) /* (AE27) RGMII1_RXC */ - J722S_IOPAD(0x0144, PIN_INPUT, 0) /* (AD23) RGMII1_RX_CTL */ - J722S_IOPAD(0x0134, PIN_OUTPUT, 0) /* (AF27) RGMII1_TD0 */ - J722S_IOPAD(0x0138, PIN_OUTPUT, 0) /* (AE23) RGMII1_TD1 */ - J722S_IOPAD(0x013c, PIN_OUTPUT, 0) /* (AG25) RGMII1_TD2 */ - J722S_IOPAD(0x0140, PIN_OUTPUT, 0) /* (AF24) RGMII1_TD3 */ - J722S_IOPAD(0x0130, PIN_OUTPUT, 0) /* (AG26) RGMII1_TXC */ - J722S_IOPAD(0x012c, PIN_OUTPUT, 0) /* (AF25) RGMII1_TX_CTL */ + J722S_IOPAD(0x00f8, PIN_INPUT, 2) /* (AB24) VOUT0_HSYNC.RGMII2_RD0 */ + J722S_IOPAD(0x00fc, PIN_INPUT, 2) /* (AC27) VOUT0_DE.RGMII2_RD1 */ + J722S_IOPAD(0x0100, PIN_INPUT, 2) /* (AB23) VOUT0_VSYNC.RGMII2_RD2 */ + J722S_IOPAD(0x0104, PIN_INPUT, 2) /* (AC26) VOUT0_PCLK.RGMII2_RD3 */ + J722S_IOPAD(0x00f4, PIN_INPUT, 2) /* (AB27) VOUT0_DATA15.RGMII2_RXC */ + J722S_IOPAD(0x00f0, PIN_INPUT, 2) /* (AB26) VOUT0_DATA14.RGMII2_RX_CTL */ + J722S_IOPAD(0x00e0, PIN_OUTPUT, 2) /* (AA25) VOUT0_DATA10.RGMII2_TD0 */ + J722S_IOPAD(0x00e4, PIN_OUTPUT, 2) /* (AB25) VOUT0_DATA11.RGMII2_TD1 */ + J722S_IOPAD(0x00e8, PIN_OUTPUT, 2) /* (AA23) VOUT0_DATA12.RGMII2_TD2 */ + J722S_IOPAD(0x00ec, PIN_OUTPUT, 2) /* (AA22) VOUT0_DATA13.RGMII2_TD3 */ + J722S_IOPAD(0x00dc, PIN_OUTPUT, 2) /* (AA27) VOUT0_DATA9.RGMII2_TXC */ + J722S_IOPAD(0x00d8, PIN_OUTPUT, 2) /* (AA24) VOUT0_DATA8.RGMII2_TX_CTL */ >; - bootph-all; }; - main_usb1_pins_default: main-usb1-default-pins { + rmii1_rst_pins_default: rmii1_rst-pins-default { pinctrl-single,pins = < - J722S_IOPAD(0x0258, PIN_INPUT, 0) /* (B27) USB1_DRVVBUS */ + J722S_IOPAD(0x00b4, PIN_OUTPUT, 7) /* (P23) GPMC0_CSn3.GPIO0_44 */ >; }; - main_mcasp1_pins_default: main-mcasp1-default-pins { + rmii2_rst_pins_default: rmii2_rst-pins-default { pinctrl-single,pins = < - J722S_IOPAD(0x0090, PIN_INPUT, 2) /* (P27) GPMC0_BE0n_CLE.MCASP1_ACLKX */ - J722S_IOPAD(0x0098, PIN_INPUT, 2) /* (V21) GPMC0_WAIT0.MCASP1_AFSX */ - J722S_IOPAD(0x008c, PIN_OUTPUT, 2) /* (N23) GPMC0_WEn.MCASP1_AXR0 */ - J722S_IOPAD(0x0084, PIN_INPUT, 2) /* (N21) GPMC0_ADVn_ALE.MCASP1_AXR2 */ + J722S_IOPAD(0x01f0, PIN_OUTPUT, 7) /* (A23) EXT_REFCLK1.GPIO1_30 */ >; }; - audio_ext_refclk1_pins_default: audio-ext-refclk1-default-pins { + main_usb0_pins_default: main-usb0-default-pins { pinctrl-single,pins = < - J722S_IOPAD(0x00a0, PIN_OUTPUT, 1) /* (N24) GPMC0_WPn.AUDIO_EXT_REFCLK1 */ + J722S_IOPAD(0x0254, PIN_OUTPUT, 7) /* (E25) USB0_DRVVBUS.GPIO1_50 */ >; }; - pmic_irq_pins_default: pmic-irq-default-pins { + main_usb1_pins_default: main-usb1-default-pins { pinctrl-single,pins = < - J722S_IOPAD(0x030, PIN_INPUT, 7) /* (K23) GPIO0_12 */ + J722S_IOPAD(0x0258, PIN_OUTPUT, 7) /* (B27) USB1_DRVVBUS.GPIO1_51 */ >; }; - main_gpio0_ioexp_intr_pins_default: main-gpio0-ioexp-intr-default-pins { + main_mcasp1_pins_default: main-mcasp1-default-pins { pinctrl-single,pins = < - J722S_IOPAD(0x0110, PIN_INPUT, 7) /* (G27) MMC2_DAT1.GPIO0_67 */ + J722S_IOPAD(0x0090, PIN_INPUT, 2) /* (P27) GPMC0_BE0n_CLE.MCASP1_ACLKX */ + J722S_IOPAD(0x0098, PIN_INPUT, 2) /* (V21) GPMC0_WAIT0.MCASP1_AFSX */ + J722S_IOPAD(0x008c, PIN_OUTPUT, 2) /* (N23) GPMC0_WEn.MCASP1_AXR0 */ + J722S_IOPAD(0x0084, PIN_INPUT, 2) /* (N21) GPMC0_ADVn_ALE.MCASP1_AXR2 */ >; }; - main_dpi_pins_default: main-dpi-default-pins { + pmic_irq_pins_default: pmic-irq-default-pins { pinctrl-single,pins = < - J722S_IOPAD(0x0100, PIN_OUTPUT, 0) /* (AB23) VOUT0_VSYNC */ - J722S_IOPAD(0x00f8, PIN_OUTPUT, 0) /* (AB24) VOUT0_HSYNC */ - J722S_IOPAD(0x0104, PIN_OUTPUT, 0) /* (AC26) VOUT0_PCLK */ - J722S_IOPAD(0x00fc, PIN_OUTPUT, 0) /* (AC27) VOUT0_DE */ - J722S_IOPAD(0x00b8, PIN_OUTPUT, 0) /* (W27) VOUT0_DATA0 */ - J722S_IOPAD(0x00bc, PIN_OUTPUT, 0) /* (W25) VOUT0_DATA1 */ - J722S_IOPAD(0x00c0, PIN_OUTPUT, 0) /* (W24) VOUT0_DATA2 */ - J722S_IOPAD(0x00c4, PIN_OUTPUT, 0) /* (W23) VOUT0_DATA3 */ - J722S_IOPAD(0x00c8, PIN_OUTPUT, 0) /* (W22) VOUT0_DATA4 */ - J722S_IOPAD(0x00cc, PIN_OUTPUT, 0) /* (W21) VOUT0_DATA5 */ - J722S_IOPAD(0x00d0, PIN_OUTPUT, 0) /* (Y26) VOUT0_DATA6 */ - J722S_IOPAD(0x00d4, PIN_OUTPUT, 0) /* (Y27) VOUT0_DATA7 */ - J722S_IOPAD(0x00d8, PIN_OUTPUT, 0) /* (AA24) VOUT0_DATA8 */ - J722S_IOPAD(0x00dc, PIN_OUTPUT, 0) /* (AA27) VOUT0_DATA9 */ - J722S_IOPAD(0x00e0, PIN_OUTPUT, 0) /* (AA25) VOUT0_DATA10 */ - J722S_IOPAD(0x00e4, PIN_OUTPUT, 0) /* (AB25) VOUT0_DATA11 */ - J722S_IOPAD(0x00e8, PIN_OUTPUT, 0) /* (AA23) VOUT0_DATA12 */ - J722S_IOPAD(0x00ec, PIN_OUTPUT, 0) /* (AA22) VOUT0_DATA13 */ - J722S_IOPAD(0x00f0, PIN_OUTPUT, 0) /* (AB26) VOUT0_DATA14 */ - J722S_IOPAD(0x00f4, PIN_OUTPUT, 0) /* (AB27) VOUT0_DATA15 */ - J722S_IOPAD(0x005c, PIN_OUTPUT, 1) /* (U27) GPMC0_AD8.VOUT0_DATA16 */ - J722S_IOPAD(0x0060, PIN_OUTPUT, 1) /* (U26) GPMC0_AD9.VOUT0_DATA17 */ - J722S_IOPAD(0x0064, PIN_OUTPUT, 1) /* (V27) GPMC0_AD10.VOUT0_DATA18 */ - J722S_IOPAD(0x0068, PIN_OUTPUT, 1) /* (V25) GPMC0_AD11.VOUT0_DATA19 */ - J722S_IOPAD(0x006c, PIN_OUTPUT, 1) /* (V26) GPMC0_AD12.VOUT0_DATA20 */ - J722S_IOPAD(0x0070, PIN_OUTPUT, 1) /* (V24) GPMC0_AD13.VOUT0_DATA21 */ - J722S_IOPAD(0x0074, PIN_OUTPUT, 1) /* (V22) GPMC0_AD14.VOUT0_DATA22 */ - J722S_IOPAD(0x0078, PIN_OUTPUT, 1) /* (V23) GPMC0_AD15.VOUT0_DATA23 */ - J722S_IOPAD(0x009c, PIN_OUTPUT, 1) /* (W26) GPMC0_WAIT1.VOUT0_EXTPCLKIN */ + J722S_IOPAD(0x030, PIN_INPUT, 7) /* (K23) GPIO0_12 */ >; }; }; @@ -446,7 +826,13 @@ J722S_IOPAD(0x009c, PIN_OUTPUT, 1) /* (W26) GPMC0_WAIT1.VOUT0_EXTPCLKIN */ &cpsw3g { status = "okay"; pinctrl-names = "default"; - pinctrl-0 = <&rgmii1_pins_default>; + pinctrl-0 = <&rmii1_pins_default + &rgmii2_pins_default + &rmii1_rst_pins_default + &rmii2_rst_pins_default>; + + rmii1-reset-gpios = <&main_gpio0 44 GPIO_ACTIVE_HIGH>; + rmii2-reset-gpios = <&main_gpio1 30 GPIO_ACTIVE_HIGH>; }; &cpsw3g_mdio { @@ -456,17 +842,27 @@ &cpsw3g_mdio { cpsw3g_phy0: ethernet-phy@0 { reg = <0>; - bootph-all; - ti,rx-internal-delay = ; - ti,fifo-depth = ; - ti,min-output-impedance; }; + + // cpsw3g_phy1: ethernet-phy@1 { + // reg = <1>; + // ti,rx-internal-delay = ; + // ti,fifo-depth = ; + // ti,min-output-impedance; + // }; }; &cpsw_port1 { - phy-mode = "rgmii-rxid"; + phy-mode = "rmii"; phy-handle = <&cpsw3g_phy0>; status = "okay"; + rmii-clock-ext; +}; + +&cpsw_port2 { + status = "disabled"; + phy-mode = "rmii"; + phy-handle = <&cpsw3g_phy0>; }; &main_gpio1 { @@ -482,12 +878,37 @@ &main_uart0 { &main_uart5 { /* MAIN UART 5 is used by System firmware */ - pinctrl-names = "default"; - pinctrl-0 = <&main_uart5_pins_default>; - status = "reserved"; + //pinctrl-names = "default"; + //pinctrl-0 = <&main_uart5_pins_default>; + status = "disabled"; }; &mcu_pmx0 { + mcu_usb1_reset_pins_default: mcu-usb1-reset-default-pins { + pinctrl-single,pins = < + J722S_MCU_IOPAD(0x0080, PIN_OUTPUT, 7) /* (A8) PMIC_LPM_EN0.MCU_GPIO0_22 */ + >; + }; + + wifi_en_pins_default: wifi_en-pins-default { + pinctrl-single,pins = < + J722S_MCU_IOPAD(0x0084, PIN_OUTPUT, 7) /* (F12) WKUP_CLKOUT0.MCU_GPIO0_23 */ + >; + }; + + mcu_eqep1_led_pins_default: mcu-eqep-led-default-pins { + pinctrl-single,pins = < + J722S_MCU_IOPAD(0x0028, PIN_OUTPUT, 7) /* (C8) WKUP_UART0_TXD.MCU_GPIO0_10 */ + J722S_MCU_IOPAD(0x002c, PIN_OUTPUT, 7) /* (C4) WKUP_UART0_CTSn.MCU_GPIO0_11 */ + J722S_MCU_IOPAD(0x0030, PIN_OUTPUT, 7) /* (C3) WKUP_UART0_RTSn.MCU_GPIO0_12 */ + >; + }; + + mcu_lt8911ex_pins_default: mcu-lt8911ex-default-pins { + pinctrl-single,pins = < + J722S_MCU_IOPAD(0x004c, PIN_OUTPUT, 7) /* (B9) WKUP_I2C0_SCL.MCU_GPIO0_19 */ + >; + }; mcu_i2c0_pins_default: mcu-i2c0-default-pins { pinctrl-single,pins = < @@ -510,12 +931,6 @@ J722S_MCU_IOPAD(0x03C, PIN_OUTPUT, 0) /*(C1) MCU_MCAN1_TX */ >; }; - mcu_mcan0_gpio_pins_default: mcu-mcan0-gpio-default-pins { - pinctrl-single,pins = < - J722S_MCU_IOPAD(0x0030, PIN_OUTPUT, 7) /* (C3) MCU_GPIO0_12 */ - >; - }; - wkup_uart0_pins_default: wkup-uart0-default-pins { pinctrl-single,pins = < J722S_MCU_IOPAD(0x02c, PIN_INPUT, 0) /* (C7) WKUP_UART0_CTSn */ @@ -547,7 +962,7 @@ &wkup_i2c0 { pinctrl-names = "default"; pinctrl-0 = <&wkup_i2c0_pins_default>; clock-frequency = <400000>; - status = "okay"; + status = "disabled"; bootph-all; tps65224: pmic@48 { @@ -634,311 +1049,154 @@ ldo3: ldo3 { &k3_clks { /* Configure AUDIO_EXT_REFCLK1 pin as output */ - pinctrl-names = "default"; - pinctrl-0 = <&audio_ext_refclk1_pins_default>; + //pinctrl-names = "default"; + //pinctrl-0 = <&audio_ext_refclk1_pins_default>; }; &main_i2c0 { pinctrl-names = "default"; - pinctrl-0 = <&main_i2c0_pins_default>; + pinctrl-0 = <&main_i2c0_pins_default + &mcu_lt8911ex_pins_default>; clock-frequency = <400000>; status = "okay"; bootph-all; - exp1: gpio@23 { - compatible = "ti,tca6424"; - reg = <0x23>; - gpio-controller; - #gpio-cells = <2>; - gpio-line-names = "TRC_MUX_SEL", "OSPI/ONAND_MUX_SEL", - "MCASP1_FET_SEL", "CTRL_PM_I2C_OE#", - "CSI_VIO_SEL", "USB2.0_MUX_SEL", - "CSI01_MUX_SEL_2", "CSI23_MUX_SEL_2", - "LMK1_OE1", "LMK1_OE0", - "LMK2_OE0", "LMK2_OE1", - "GPIO_RGMII1_RST#", "GPIO_AUD_RSTn", - "GPIO_eMMC_RSTn", "GPIO_uSD_PWR_EN", - "USER_LED2", "MCAN0_STB", - "PCIe0_1L_RC_RSTz", "PCIe0_1L_PRSNT#", - "ENET1_EXP_SPARE2", "ENET1_EXP_PWRDN", - "PD_I2ENET1_I2CMUX_SELC_IRQ", "ENET1_EXP_RESETZ"; - bootph-all; - - p05-hog { - /* P05 - USB2.0_MUX_SEL */ - gpio-hog; - gpios = <5 GPIO_ACTIVE_LOW>; - output-high; - }; - - p01_hog: p01-hog { - /* P01 - TRC_MUX_SEL */ - gpio-hog; - gpios = <0 GPIO_ACTIVE_HIGH>; - output-low; - line-name = "TRC_MUX_SEL"; - }; - - p02_hog: p02-hog { - /* P02 - MCASP1_FET_SEL */ - gpio-hog; - gpios = <2 GPIO_ACTIVE_HIGH>; - output-high; - line-name = "MCASP1_FET_SEL"; - }; - - p13_hog: p13-hog { - /* P13 - GPIO_AUD_RSTn */ - gpio-hog; - gpios = <13 GPIO_ACTIVE_HIGH>; - output-high; - line-name = "GPIO_AUD_RSTn"; - }; + lt8911ex@29 { + compatible = "lontium,lt8911ex"; + reg = <0x29>; + //power-gpio = <&gpio1 GPIO_B4 GPIO_ACTIVE_HIGH>; + reset-gpio = <&mcu_gpio0 19 GPIO_ACTIVE_HIGH>; + + lontium,pclk = <148500000>; + lontium,hact = <1920>; + lontium,vact = <1080>; + lontium,hbp = <192>; + lontium,hfp = <48>; + lontium,vbp = <71>; + lontium,vfp = <3>; + lontium,hs = <32>; + lontium,vs = <6>; + + lontium,mipi_lane = <4>; + lontium,lane_cnt = <2>; + lontium,color = <1>; //Color Depth 0:6bit 1:8bit + lontium,test = <0>; }; - tlv320aic3106: audio-codec@1b { - #sound-dai-cells = <0>; - compatible = "ti,tlv320aic3106"; - reg = <0x1b>; - ai3x-micbias-vg = <1>; /* 2.0V */ - AVDD-supply = <&vsys_io_3v3>; - IOVDD-supply = <&vsys_io_3v3>; - DRVDD-supply = <&vsys_io_3v3>; - DVDD-supply = <&vsys_io_1v8>; + rtc0: rtc-pcf8563@51 { + compatible = "nxp,pcf8563"; + reg = <0x51>; + #clock-cells = <0>; }; + + // tlv320aic3106: audio-codec@1b { + // #sound-dai-cells = <0>; + // compatible = "ti,tlv320aic3106"; + // reg = <0x1b>; + // ai3x-micbias-vg = <1>; /* 2.0V */ + // AVDD-supply = <&vsys_io_3v3>; + // IOVDD-supply = <&vsys_io_3v3>; + // DRVDD-supply = <&vsys_io_3v3>; + // DVDD-supply = <&vsys_io_1v8>; + // }; }; &main_i2c1 { - status = "okay"; + status = "disabled"; pinctrl-names = "default"; pinctrl-0 = <&main_i2c1_pins_default>; clock-frequency = <100000>; - exp2: gpio@20 { - compatible = "ti,tca6416"; - reg = <0x20>; - gpio-controller; - #gpio-cells = <2>; - gpio-line-names = "DSI_Mux_SEL_2", "GPIO_eDP_ENABLE", - "DP0_PWR_SW_EN", "GPIO_OLDI_RSTn", - "GPIO_HDMI_RSTn", "HDMI_LS_OE", - "", "", - "DSI_GPIO0", "DSI_GPIO1", - "DSI_EDID", "IO_eDP_IRQ", - "OLDI_INT#", "HDMI_INTn", - "", ""; - - interrupt-parent = <&main_gpio0>; - interrupts = <67 IRQ_TYPE_EDGE_FALLING>; - interrupt-controller; - #interrupt-cells = <2>; - - pinctrl-names = "default"; - pinctrl-0 = <&main_gpio0_ioexp_intr_pins_default>; - bootph-all; - - p04-hog { - /* P04 - GPIO_HDMI_RSTn */ - gpio-hog; - gpios = <4 GPIO_ACTIVE_LOW>; - output-low; - line-name = "GPIO_HDMI_RSTn"; - }; - - p03-hog { - /* P03 - GPIO_OLDI_RSTn */ - gpio-hog; - gpios = <3 GPIO_ACTIVE_LOW>; - output-low; - line-name = "GPIO_OLDI_RSTn"; - }; - - p05-hog { - /* P05 - HDMI_LS_OE */ - gpio-hog; - gpios = <5 GPIO_ACTIVE_HIGH>; - output-high; - line-name = "HDMI_LS_OE"; - }; - }; - - sii9022: bridge-hdmi@3b { - compatible = "sil,sii9022"; - reg = <0x3b>; - interrupt-parent = <&exp2>; - interrupts = <13 IRQ_TYPE_EDGE_FALLING>; - #sound-dai-cells = <0>; - sil,i2s-data-lanes = < 0 >; - - hdmi_tx_ports: ports { - #address-cells = <1>; - #size-cells = <0>; - - /* - * HDMI can be serviced with 3 potential VPs - - * (DSS0 VP1 / DSS1 VP0 / DSS1 VP1). - * For now, we will service it with DSS1 VP0. - */ - port@0 { - reg = <0>; - - sii9022_in: endpoint { - remote-endpoint = <&dss1_dpi0_out>; - }; - }; - - port@1 { - reg = <1>; - - sii9022_out: endpoint { - remote-endpoint = <&hdmi_connector_in>; - }; - }; - }; - }; + // exp2: gpio@20 { + // compatible = "ti,tca6416"; + // reg = <0x20>; + // gpio-controller; + // #gpio-cells = <2>; + // gpio-line-names = "DSI_Mux_SEL_2", "GPIO_eDP_ENABLE", + // "DP0_PWR_SW_EN", "GPIO_OLDI_RSTn", + // "GPIO_HDMI_RSTn", "HDMI_LS_OE", + // "", "", + // "DSI_GPIO0", "DSI_GPIO1", + // "DSI_EDID", "IO_eDP_IRQ", + // "OLDI_INT#", "HDMI_INTn", + // "", ""; + + // interrupt-parent = <&main_gpio0>; + // interrupts = <67 IRQ_TYPE_EDGE_FALLING>; + // interrupt-controller; + // #interrupt-cells = <2>; + + // pinctrl-names = "default"; + // pinctrl-0 = <&main_gpio0_ioexp_intr_pins_default>; + // bootph-all; + + // p04-hog { + // /* P04 - GPIO_HDMI_RSTn */ + // gpio-hog; + // gpios = <4 GPIO_ACTIVE_LOW>; + // output-low; + // line-name = "GPIO_HDMI_RSTn"; + // }; + + // p03-hog { + // /* P03 - GPIO_OLDI_RSTn */ + // gpio-hog; + // gpios = <3 GPIO_ACTIVE_LOW>; + // output-low; + // line-name = "GPIO_OLDI_RSTn"; + // }; + + // p05-hog { + // /* P05 - HDMI_LS_OE */ + // gpio-hog; + // gpios = <5 GPIO_ACTIVE_HIGH>; + // output-high; + // line-name = "HDMI_LS_OE"; + // }; + // }; + + // sii9022: bridge-hdmi@3b { + // compatible = "sil,sii9022"; + // reg = <0x3b>; + // interrupt-parent = <&exp2>; + // interrupts = <13 IRQ_TYPE_EDGE_FALLING>; + // #sound-dai-cells = <0>; + // sil,i2s-data-lanes = < 0 >; + + // hdmi_tx_ports: ports { + // #address-cells = <1>; + // #size-cells = <0>; + + // /* + // * HDMI can be serviced with 3 potential VPs - + // * (DSS0 VP1 / DSS1 VP0 / DSS1 VP1). + // * For now, we will service it with DSS1 VP0. + // */ + // port@0 { + // reg = <0>; + + // sii9022_in: endpoint { + // remote-endpoint = <&dss1_dpi0_out>; + // }; + // }; + + // port@1 { + // reg = <1>; + + // sii9022_out: endpoint { + // remote-endpoint = <&hdmi_connector_in>; + // }; + // }; + // }; + // }; }; &main_i2c2 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&main_i2c2_pins_default>; - clock-frequency = <400000>; - - pca9543_0: i2c-mux@70 { - compatible = "nxp,pca9543"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x70>; - }; - - pca9543_1: i2c-mux@71 { - compatible = "nxp,pca9543"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x71>; - }; + status = "disabled"; }; &ospi0 { - pinctrl-names = "default"; - pinctrl-0 = <&ospi0_pins_default>; - status = "okay"; - - flash@0 { - compatible = "jedec,spi-nor"; - reg = <0x0>; - spi-tx-bus-width = <8>; - spi-rx-bus-width = <8>; - spi-max-frequency = <25000000>; - cdns,tshsl-ns = <60>; - cdns,tsd2d-ns = <60>; - cdns,tchsh-ns = <60>; - cdns,tslch-ns = <60>; - cdns,read-delay = <4>; - cdns,phy-mode; - bootph-all; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "ospi.tiboot3"; - reg = <0x00 0x80000>; - }; - - partition@80000 { - label = "ospi.tispl"; - reg = <0x80000 0x200000>; - }; - - partition@280000 { - label = "ospi.u-boot"; - reg = <0x280000 0x400000>; - }; - - partition@680000 { - label = "ospi.env"; - reg = <0x680000 0x40000>; - }; - - partition@6c0000 { - label = "ospi.env.backup"; - reg = <0x6c0000 0x40000>; - }; - - partition@800000 { - label = "ospi.rootfs"; - reg = <0x800000 0x37c0000>; - }; - - partition@3fc0000 { - bootph-all; - label = "ospi.phypattern"; - reg = <0x3fc0000 0x40000>; - }; - }; - }; - - ospi0_nand: nand@0 { - compatible = "spi-nand"; - reg = <0x0>; - spi-tx-bus-width = <8>; - spi-rx-bus-width = <8>; - spi-max-frequency = <25000000>; - cdns,tshsl-ns = <60>; - cdns,tsd2d-ns = <60>; - cdns,tchsh-ns = <60>; - cdns,tslch-ns = <60>; - cdns,read-delay = <2>; - #address-cells = <1>; - #size-cells = <1>; - bootph-all; - cdns,phy-mode; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "ospi_nand.tiboot3"; - reg = <0x0 0x80000>; - }; - - partition@80000 { - label = "ospi_nand.tispl"; - reg = <0x80000 0x200000>; - }; - - partition@280000 { - label = "ospi_nand.u-boot"; - reg = <0x280000 0x400000>; - }; - - partition@680000 { - label = "ospi_nand.env"; - reg = <0x680000 0x40000>; - }; - - partition@6c0000 { - label = "ospi_nand.env.backup"; - reg = <0x6c0000 0x40000>; - }; - - partition@2000000 { - label = "ospi_nand.rootfs"; - reg = <0x2000000 0x5fc0000>; - }; - - partition@7fc0000 { - bootph-all; - label = "ospi_nand.phypattern"; - reg = <0x7fc0000 0x40000>; - }; - }; - }; + status = "disabled"; }; &sdhci0 { @@ -956,6 +1214,7 @@ &sdhci1 { pinctrl-0 = <&main_mmc1_pins_default>; ti,driver-strength-ohm = <50>; disable-wp; + sdhci-caps-mask = <0x00000003 0x00000000>; status = "okay"; bootph-all; }; @@ -1085,12 +1344,12 @@ serdes1_pcie_link: phy@0 { }; }; -&pcie0_rc { - reset-gpios = <&exp1 18 GPIO_ACTIVE_HIGH>; - phys = <&serdes1_pcie_link>; - phy-names = "pcie-phy"; - status = "okay"; -}; +// &pcie0_rc { +// reset-gpios = <&exp1 18 GPIO_ACTIVE_HIGH>; +// phys = <&serdes1_pcie_link>; +// phy-names = "pcie-phy"; +// status = "okay"; +// }; &usbss0 { ti,vbus-divider; @@ -1098,18 +1357,17 @@ &usbss0 { }; &usb0 { - dr_mode = "otg"; - usb-role-switch; + status = "okay"; + dr_mode = "host"; }; &usbss1 { - pinctrl-names = "default"; - pinctrl-0 = <&main_usb1_pins_default>; ti,vbus-divider; status = "okay"; }; &usb1 { + status = "okay"; dr_mode = "host"; maximum-speed = "super-speed"; phys = <&serdes0_usb_link>; @@ -1131,65 +1389,62 @@ &mcasp1 { >; }; -&mcu_mcan0 { - pinctrl-names = "default"; - pinctrl-0 = <&mcu_mcan0_pins_default>; - phys = <&transceiver0>; - status = "okay"; -}; - -&mcu_mcan1 { - pinctrl-names = "default"; - pinctrl-0 = <&mcu_mcan1_pins_default>; - phys = <&transceiver1>; - status = "okay"; -}; - -&main_mcan0 { - pinctrl-names = "default"; - pinctrl-0 = <&main_mcan0_pins_default>; - phys = <&transceiver2>; - status = "okay"; -}; +// &mcu_mcan0 { +// pinctrl-names = "default"; +// pinctrl-0 = <&mcu_mcan0_pins_default>; +// phys = <&transceiver0>; +// status = "okay"; +// }; + +// &mcu_mcan1 { +// pinctrl-names = "default"; +// pinctrl-0 = <&mcu_mcan1_pins_default>; +// phys = <&transceiver1>; +// status = "okay"; +// }; + +// &main_mcan0 { +// pinctrl-names = "default"; +// pinctrl-0 = <&main_mcan0_pins_default>; +// phys = <&transceiver2>; +// status = "okay"; +// }; &mcu_gpio0 { status = "okay"; }; &mcu_i2c0 { - pinctrl-names = "default"; - pinctrl-0 = <&mcu_i2c0_pins_default>; - clock-frequency = <400000>; - status = "okay"; + status = "disabled"; }; &dss1 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&main_dpi_pins_default>; + // status = "okay"; + // pinctrl-names = "default"; + // pinctrl-0 = <&main_dpi_pins_default>; - clocks = <&k3_clks 232 8>, - <&k3_clks 232 0>, - <&k3_clks 232 4>; + // clocks = <&k3_clks 232 8>, + // <&k3_clks 232 0>, + // <&k3_clks 232 4>; - assigned-clocks = <&k3_clks 241 0>, /* DSS1-VP0 */ - <&k3_clks 240 0>, /* DSS1-VP1 */ - <&k3_clks 245 0>; /* DPI Output */ + // assigned-clocks = <&k3_clks 241 0>, /* DSS1-VP0 */ + // <&k3_clks 240 0>, /* DSS1-VP1 */ + // <&k3_clks 245 0>; /* DPI Output */ - assigned-clock-parents = <&k3_clks 241 2>, /* PLL 17 HDMI */ - <&k3_clks 240 1>, /* PLL 18 DSI */ - <&k3_clks 245 2>; /* DSS1-DPI0 */ + // assigned-clock-parents = <&k3_clks 241 2>, /* PLL 17 HDMI */ + // <&k3_clks 240 1>, /* PLL 18 DSI */ + // <&k3_clks 245 2>; /* DSS1-DPI0 */ }; &dss1_ports { /* DSS1-VP0: DPI/HDMI Output */ - port@0 { - reg = <0>; + // port@0 { + // reg = <0>; - dss1_dpi0_out: endpoint { - remote-endpoint = <&sii9022_in>; - }; - }; + // dss1_dpi0_out: endpoint { + // remote-endpoint = <&sii9022_in>; + // }; + // }; }; &mcu_rti0 { @@ -1211,3 +1466,132 @@ &main_rti2 { &main_rti3 { assigned-clock-parents = <&k3_clks 128 4>; }; + +&main_spi0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins_default>; + ti,pindir-d0-out-d1-in; + ti,spi-num-cs = <2>; + + hc595: gpio_spi@0 { + status = "okay"; + compatible = "fairchild,74hc595"; + reg = <0>; + #gpio-cells = <2>; + registers-number = <3>; + spi-max-frequency = <100000>; + }; + + rfid: rfid@1 { + status = "okay"; + compatible = "rohm,dh2228fv"; + reg = <1>; + spi-max-frequency = <24000000>; + }; +}; + +&dss0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&oldi0_pins_default>; +}; + +&oldi0_dss0 { + status = "okay"; +}; + +&oldi1_dss0 { + status = "okay"; +}; + +&oldi0_dss0_ports { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + oldi0_dss0_in: endpoint { + remote-endpoint = <&dss0_dpi0_out0>; + }; + }; + + port@1 { + reg = <1>; + + oldi0_dss0_out: endpoint { + remote-endpoint = <&lcd_in0>; + }; + }; +}; + +&oldi1_dss0_ports { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + oldi1_dss0_in: endpoint { + remote-endpoint = <&dss0_dpi0_out1>; + }; + }; + + port@1 { + reg = <1>; + + oldi1_dss0_out: endpoint { + remote-endpoint = <&lcd_in1>; + }; + }; +}; + +&dss0_ports { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + /* VP1: Output to OLDI */ + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + dss0_dpi0_out0: endpoint@0 { + reg = <0>; + remote-endpoint = <&oldi0_dss0_in>; + }; + + dss0_dpi0_out1: endpoint@1 { + reg = <1>; + remote-endpoint = <&oldi1_dss0_in>; + }; + }; +}; + +&epwm0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&epwm0_pins_defaults>; +}; + +&epwm1 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&lvds_bl_epwm1_pins_default>; +}; + +&epwm2 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&edp_bl_epwm2_pins_default>; +}; + +&eqep1 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&eqep1_pins_default>; +};