diff --git a/build/build_cdd_ipc_app_mcu2-1_debug.sh b/build/build_cdd_ipc_app_mcu2-1_debug.sh
new file mode 100755
index 0000000..8a3c959
--- /dev/null
+++ b/build/build_cdd_ipc_app_mcu2-1_debug.sh
@@ -0,0 +1 @@
+make cdd_ipc_app CORE=mcu2_1 BOARD=j721e_evm SOC=j721e BUILD_PROFILE=debug -sj
diff --git a/mcal_drv/mcal/examples/CddIpc/CddIpcApp.c b/mcal_drv/mcal/examples/CddIpc/CddIpcApp.c
index 26301eb..fe84e00 100755
--- a/mcal_drv/mcal/examples/CddIpc/CddIpcApp.c
+++ b/mcal_drv/mcal/examples/CddIpc/CddIpcApp.c
@@ -123,15 +123,15 @@ void Cdd_IpcApp_WaitCtrlSendCntPing(void);
 uint32  Cdd_IpcAppDemoStatus = E_OK;
 /**< Flag used for Demo status */
 uint32 Cdd_IpcAppIterCntMpu10, Cdd_IpcAppIterCntMcu20, 
-                Cdd_IpcAppIterCntMcu21;
+                Cdd_IpcAppIterCntMcu21, Cdd_IpcAppIterCntMcu10;
 /**< Counter to track number of messages to be transmitted & received */
 volatile uint32 Cdd_IpcAppNmsgCntMpu10, Cdd_IpcAppNmsgCntMcu20,
-                Cdd_IpcAppNmsgCntMcu21;
+                Cdd_IpcAppNmsgCntMcu21, Cdd_IpcAppNmsgCntMcu10;
 /**< Counter to to indicate availability of messages from remote cores */
 
 #if (STD_ON == CDD_IPC_ANNOUNCE_API)
 volatile uint32 Cdd_IpcAppCtrlMsgMpu10, Cdd_IpcAppCtrlMsgMcu20,
-                Cdd_IpcAppCtrlMsgMcu21;
+                Cdd_IpcAppCtrlMsgMcu21, Cdd_IpcAppCtrlMsgMcu10;
 /**< Flag to indicate which core has announced its availability */
 #endif /* CDD_IPC_ANNOUNCE_API */
 
@@ -150,6 +150,11 @@ static uint8 Cdd_IpcAppMcu21Buffer[CDD_IPC_APP_MSG_DATA_SIZE];
 /**< Buffer used to transmit and receive messages, to/from MCU 21 */
 #endif /* CDD_IPC_REMOTE_CORE_MCU2_1_USED */
 
+#ifdef CDD_IPC_REMOTE_CORE_MCU1_0_USED
+static uint8 Cdd_IpcAppMcu10Buffer[CDD_IPC_APP_MSG_DATA_SIZE];
+/**< Buffer used to transmit and receive messages, to/from MCU 21 */
+#endif /* CDD_IPC_REMOTE_CORE_MCU2_1_USED */
+
 #if (STD_ON == CDD_IPC_ANNOUNCE_API)
 static uint8 Cdd_IpcAppCtrlMsgBuffer[50U];
 /**< Buffer used to receive control message from remote cores */
@@ -188,6 +193,12 @@ void Cdd_IpcNewMessageNotify(uint32 comId)
     }
 #endif
 
+#ifdef CDD_IPC_REMOTE_CORE_MCU1_0_USED
+    if (CddIpcConf_IpcComChanId_Cdd_IpcMcu10 == comId)
+    {
+        Cdd_IpcAppNmsgCntMcu10++;
+    }
+#endif
     return;
 }
 
@@ -228,6 +239,12 @@ void Cdd_IpcNewCtrlMessageNotify(uint32 remoteProcId)
     }
 #endif
 
+#ifdef CDD_IPC_REMOTE_CORE_MCU1_0_USED
+    if (CddIpcConf_IpcComChanId_Cdd_IpcMcu10 == commId)
+    {
+        Cdd_IpcAppCtrlMsgMcu10 = 1U;
+    }
+#endif
 }
 
 #endif /* (STD_ON == CDD_IPC_ANNOUNCE_API) */
@@ -248,7 +265,10 @@ void Cdd_IpcNewCtrlMessageNotify(uint32 remoteProcId)
 int main(void)
 {
     uint32 length;
+    int32_t     status = 0;
+    int32_t     n;
     volatile uint32 tempVar;
+    Std_ReturnType rtnVal = (Std_ReturnType)E_NOT_OK;
 #if (STD_ON == CDD_IPC_ANNOUNCE_API)
     uint32 coreIdx, comId, rCoreId;
 #endif
@@ -265,8 +285,12 @@ int main(void)
     uint32 mpu10Bufsize = 7U;
 #endif
 
+#ifdef CDD_IPC_REMOTE_CORE_MCU1_0_USED
+    uint32 mcu10Bufsize = 7U;
+#endif
+
 #if (STD_ON == CDD_IPC_ANNOUNCE_API)
-    const char announceMsg[32U] = "ti.ipc4.ping-pong";
+    const char announceMsg[32U] = "ti.ipc4.cdd-ipc";
 #endif
 
     /* Step 1 */
@@ -287,6 +311,7 @@ int main(void)
     Cdd_IpcAppIterCntMcu20 = CDD_IPC_APP_MSG_TX_RX_CNT;
     Cdd_IpcAppIterCntMcu21 = CDD_IPC_APP_MSG_TX_RX_CNT;
     Cdd_IpcAppIterCntMpu10 = CDD_IPC_APP_MSG_TX_RX_CNT;
+    Cdd_IpcAppIterCntMcu10 = CDD_IPC_APP_MSG_TX_RX_CNT;
 
 #ifndef CDD_IPC_REMOTE_CORE_MCU2_0_USED
     Cdd_IpcAppIterCntMcu20 = 0U;
@@ -303,10 +328,16 @@ int main(void)
 #endif
     Cdd_IpcAppNmsgCntMpu10 = 0U;
 
+#ifndef CDD_IPC_REMOTE_CORE_MCU1_0_USED
+    Cdd_IpcAppIterCntMcu10 = 0U;
+#endif
+    Cdd_IpcAppNmsgCntMcu10 = 0U;
+
 #if (STD_ON == CDD_IPC_ANNOUNCE_API)
     Cdd_IpcAppCtrlMsgMpu10 = 0U;
     Cdd_IpcAppCtrlMsgMcu20 = 0U;
     Cdd_IpcAppCtrlMsgMcu21 = 0U;
+    Cdd_IpcAppCtrlMsgMcu10 = 0U;
 #endif /* CDD_IPC_ANNOUNCE_API */
 
     /* Step 2 */
@@ -333,7 +364,7 @@ int main(void)
 #endif
 
     while (((0U != Cdd_IpcAppIterCntMpu10) || (0U != Cdd_IpcAppIterCntMcu20)) ||
-            (0U != Cdd_IpcAppIterCntMcu21))
+            (0U != Cdd_IpcAppIterCntMcu21) || (0U != Cdd_IpcAppIterCntMcu10))
     {
 
         /* Step 4 */
@@ -422,6 +453,56 @@ int main(void)
         }
 #endif /* CDD_IPC_REMOTE_CORE_MPU1_0_USED */
 
+        /* Step 5 */
+#ifdef CDD_IPC_REMOTE_CORE_MCU1_0_USED
+        tempVar = Cdd_IpcAppNmsgCntMcu10;
+        while ((0U != tempVar) && (0U != Cdd_IpcAppIterCntMcu10))
+        {
+            rtnVal = Cdd_IpcReceiveMsg(CddIpcConf_IpcComChanId_Cdd_IpcMcu10,
+                                &Cdd_IpcAppMcu10Buffer[0U], &mcu10Bufsize);
+            if(E_NOT_OK == rtnVal)
+            {
+                AppUtils_Printf(MSG_NORMAL, CDD_IPC_APP
+                        "Fail to received from MCU 1 0\n");
+                break;
+            }
+            else
+            {
+                Cdd_IpcAppMcu10Buffer[mcu10Bufsize] = '\0';
+                AppUtils_Printf(MSG_NORMAL, CDD_IPC_APP
+                        " Received %s from MCU 1 0\n",
+                        &Cdd_IpcAppMcu10Buffer[0U]);
+            }
+            SchM_Enter_Cdd_Ipc_IPC_EXCLUSIVE_AREA_0();
+                tempVar--;
+                Cdd_IpcAppNmsgCntMcu10--;
+            SchM_Exit_Cdd_Ipc_IPC_EXCLUSIVE_AREA_0();
+
+            status = sscanf((char *)Cdd_IpcAppMcu10Buffer, "ping %d", &n);
+            if(status == 1)
+            {
+                length = snprintf((char *)Cdd_IpcAppMcu10Buffer, CDD_IPC_APP_MSG_DATA_SIZE-1, "pong %d", n);
+            }
+
+            Cdd_IpcAppIterCntMcu10--;
+
+            rtnVal = Cdd_IpcSendMsg(CddIpcConf_IpcComChanId_Cdd_IpcMcu10,
+                            &Cdd_IpcAppMcu10Buffer[0U], length);
+            if(E_NOT_OK == rtnVal)
+            {
+                AppUtils_Printf(MSG_NORMAL, CDD_IPC_APP
+                        "Fail to send to MCU 1 0\n");
+                break;
+            }
+            else
+            {
+                Cdd_IpcAppMcu10Buffer[length] = '\0';
+                AppUtils_Printf(MSG_NORMAL, CDD_IPC_APP
+                        " send %s to MCU 1 0\n",
+                        &Cdd_IpcAppMcu10Buffer[0U]);
+            }
+        }
+#endif /* CDD_IPC_REMOTE_CORE_MCU1_0_USED */
     }
 
     AppUtils_Printf(MSG_NORMAL, CDD_IPC_APP
@@ -594,6 +675,21 @@ void Cdd_IpcApp_WaitCtrlSendCntPing(void)
     }
 #endif /* CDD_IPC_REMOTE_CORE_MPU1_0_USED */
 
+#ifdef CDD_IPC_REMOTE_CORE_MCU1_0_USED
+    if (((Std_ReturnType)E_OK == rtnVal) && (0U != Cdd_IpcAppCtrlMsgMcu10))
+    {
+        /* One could add checks to confirm the control message here */
+        AppUtils_Printf(MSG_NORMAL, CDD_IPC_APP
+                    " Received %s as ctrl MSG from MCU 1 0\n",
+                    &Cdd_IpcAppCtrlMsgBuffer[0U]);
+
+        /* This variable is shared between ISR and app, care should be taken
+            to ensure, ISR or interrutps are disabled while updating this
+            variable */
+        Cdd_IpcAppCtrlMsgMcu10 = 0U;
+    }
+#endif /* CDD_IPC_REMOTE_CORE_MCU1_0_USED */
+
     return;
 }
 #endif
diff --git a/mcal_drv/mcal/examples/CddIpc/soc/j721e/mcu2_1/CddIpcAppStartup.c b/mcal_drv/mcal/examples/CddIpc/soc/j721e/mcu2_1/CddIpcAppStartup.c
index 75c8eaa..a4f5255 100755
--- a/mcal_drv/mcal/examples/CddIpc/soc/j721e/mcu2_1/CddIpcAppStartup.c
+++ b/mcal_drv/mcal/examples/CddIpc/soc/j721e/mcu2_1/CddIpcAppStartup.c
@@ -111,6 +111,7 @@ static void Cdd_IpcApp_PowerAndClkSrc(void);
 static void Cdd_IpcApp_InterruptConfig(void);
 
 void Cdd_IpcAppMsgFromMpu10Isr(uintptr_t notUsed);
+void Cdd_IpcAppMsgFromMcu10Isr(uintptr_t notUsed);
 void Cdd_IpcAppMsgFromMcu20Isr(uintptr_t notUsed);
 void Cdd_IpcAppMsgFromMcu21Isr(uintptr_t notUsed);
 
@@ -342,6 +343,55 @@ static void Cdd_IpcApp_MbIntRegForMcu20(void)
 }
 #endif /* CDD_IPC_REMOTE_CORE_MCU2_0_USED */
 
+#if defined(CDD_IPC_REMOTE_CORE_MCU1_0_USED)
+/** \brief Register interrupt handler for new message notification from
+ *          core MCU 10
+ */
+static void Cdd_IpcApp_MbIntRegForMcu10(void)
+{
+    struct tisci_msg_rm_irq_set_req     rmIrqReq;
+    struct tisci_msg_rm_irq_set_resp    rmIrqResp;
+    OsalRegisterIntrParams_t    intrPrms;
+    OsalInterruptRetCode_e      osalRetVal;
+    Int32 retVal;
+    HwiP_Handle hwiHandle;
+
+    rmIrqReq.valid_params           = TISCI_MSG_VALUE_RM_DST_ID_VALID;
+    rmIrqReq.valid_params          |= TISCI_MSG_VALUE_RM_DST_HOST_IRQ_VALID;
+    rmIrqReq.valid_params          |= TISCI_MSG_VALUE_RM_SECONDARY_HOST_VALID;
+
+    rmIrqReq.src_id                 = TISCI_DEV_NAVSS0_MAILBOX_5;
+    rmIrqReq.src_index              = 2U; /* 0 for User 0, 1 for user 1... */
+    rmIrqReq.dst_id                 = TISCI_DEV_R5FSS0_CORE1;
+    rmIrqReq.secondary_host         = TISCI_HOST_ID_MAIN_0_R5_2;
+    rmIrqReq.dst_host_irq           = INTRTR_CFG_MBX_CLST5_USR2_418_MCU_1_0_TO_MCU_2_1_252;
+
+    retVal = Sciclient_rmIrqSet(
+                 &rmIrqReq, &rmIrqResp, APP_SCICLIENT_TIMEOUT);
+    if(CSL_PASS != retVal)
+    {
+        AppUtils_Printf(MSG_NORMAL,CDD_IPC_APP
+        ": Error in SciClient Interrupt Params Configuration!!!\n");
+    }
+
+    /* Interrupt hookup */
+    Osal_RegisterInterrupt_initParams(&intrPrms);
+    intrPrms.corepacConfig.arg          = (uintptr_t)NULL;
+    intrPrms.corepacConfig.isrRoutine   = &Cdd_IpcAppMsgFromMcu10Isr;
+    intrPrms.corepacConfig.priority     = 1U;
+    intrPrms.corepacConfig.corepacEventNum = 0U;
+    intrPrms.corepacConfig.intVecNum    = INTRTR_CFG_MBX_CLST5_USR2_418_MCU_1_0_TO_MCU_2_1_252;
+
+    osalRetVal = Osal_RegisterInterrupt(&intrPrms, &hwiHandle);
+    if(OSAL_INT_SUCCESS != osalRetVal)
+    {
+        AppUtils_Printf(MSG_NORMAL,
+                        CDD_IPC_APP ": Error Could not register ISR to receive"
+                        " from MCU 2 0 !!!\n");
+    }
+    return;
+}
+#endif /* CDD_IPC_REMOTE_CORE_MCU1_0_USED */
 
 /** \brief Interrupt from mailbox for all cores registrations */
 static void Cdd_IpcApp_InterruptConfig(void)
@@ -354,6 +404,10 @@ static void Cdd_IpcApp_InterruptConfig(void)
     Cdd_IpcApp_MbIntRegForMcu20 ();
 #endif
 
+#if defined(CDD_IPC_REMOTE_CORE_MCU1_0_USED)
+    Cdd_IpcApp_MbIntRegForMcu10 ();
+#endif
+
     return;
 }
 
@@ -381,6 +435,13 @@ CDD_IPC_ISR_TEXT_SECTION FUNC(void, CDD_IPC_CODE_FAST)
     Cdd_IpcIrqMbxFromMcu_21();
 }
 
+CDD_IPC_ISR_TEXT_SECTION FUNC(void, CDD_IPC_CODE_FAST)
+                                Cdd_IpcAppMsgFromMcu10Isr(uintptr_t notUsed)
+{
+    /* Invoke MCU 10 Isr handler */
+    Cdd_IpcIrqMbxFromMcu_10();
+}
+
 #define CDD_IPC_STOP_SEC_ISR_CODE
 #include "Cdd_Ipc_MemMap.h"
 
diff --git a/mcal_drv/mcal/examples/CddIpc/soc/j721e/mcu2_1/CddIpcR5Mpu.c b/mcal_drv/mcal/examples/CddIpc/soc/j721e/mcu2_1/CddIpcR5Mpu.c
index 5f1967c..215967c 100644
--- a/mcal_drv/mcal/examples/CddIpc/soc/j721e/mcu2_1/CddIpcR5Mpu.c
+++ b/mcal_drv/mcal/examples/CddIpc/soc/j721e/mcu2_1/CddIpcR5Mpu.c
@@ -208,7 +208,7 @@ const CSL_ArmR5MpuRegionCfg gCslR5MpuCfg[CSL_ARM_R5F_MPU_REGIONS_MAX] =
         /* Region 7 configuration: 2 MB for IPC Shared memory */
         .regionId         = 7U,
         .enable           = 1U,
-        .baseAddr         = 0xAA000000,
+        .baseAddr         = 0xB0000000,
         .size             = CSL_ARM_R5_MPU_REGION_SIZE_32MB,
         .subRegionEnable  = CSL_ARM_R5_MPU_SUB_REGION_ENABLE_ALL,
         .exeNeverControl  = 0U,
diff --git a/mcal_drv/mcal/examples_config/CddIpc_Demo_Cfg/output/generated/soc/j721e/mcu2_1/include/Cdd_IpcCfg.h b/mcal_drv/mcal/examples_config/CddIpc_Demo_Cfg/output/generated/soc/j721e/mcu2_1/include/Cdd_IpcCfg.h
index d0680d2..3f83d56 100644
--- a/mcal_drv/mcal/examples_config/CddIpc_Demo_Cfg/output/generated/soc/j721e/mcu2_1/include/Cdd_IpcCfg.h
+++ b/mcal_drv/mcal/examples_config/CddIpc_Demo_Cfg/output/generated/soc/j721e/mcu2_1/include/Cdd_IpcCfg.h
@@ -276,6 +276,8 @@ extern "C" {
 /**< Remote core MCU 2 0 is being used */
 #define CDD_IPC_REMOTE_CORE_MCU1_1_USED
 /**< Remote core MCU 1 1 is being used */
+#define CDD_IPC_REMOTE_CORE_MCU1_0_USED
+/**< Remote core MCU 1 0 is being used */
 
 /* @} */
 
@@ -309,7 +311,8 @@ extern "C" {
 /**< Channel identifiers */
 #define CddIpcConf_IpcComChanId_Cdd_IpcMcu11      (2U)
 /**< Channel identifiers */
-
+#define CddIpcConf_IpcComChanId_Cdd_IpcMcu10      (3U)
+/**< Channel identifiers */
 /*
  * Design : DES_CDD_IPC_016
  */
@@ -324,7 +327,9 @@ extern "C" {
 /**< Size of buffer allocated to the channel */
 #define CDD_IPC_CH_2_BUFF_SIZE   ((256U * 512U) + CDD_IPC_RPMSG_OBJ_SIZE)
 /**< Size of buffer allocated to the channel */
-#define CDD_IPC_MAX_CHANNEL_CFG  (3U)
+#define CDD_IPC_CH_3_BUFF_SIZE   ((256U * 512U) + CDD_IPC_RPMSG_OBJ_SIZE)
+/**< Size of buffer allocated to the channel */
+#define CDD_IPC_MAX_CHANNEL_CFG  (4U)
 /**< Maximum number of communication channels configured */
 
 /* @} */
diff --git a/mcal_drv/mcal/examples_config/CddIpc_Demo_Cfg/output/generated/soc/j721e/mcu2_1/src/Cdd_IpcCfg.c b/mcal_drv/mcal/examples_config/CddIpc_Demo_Cfg/output/generated/soc/j721e/mcu2_1/src/Cdd_IpcCfg.c
index 236925d..3048b1e 100755
--- a/mcal_drv/mcal/examples_config/CddIpc_Demo_Cfg/output/generated/soc/j721e/mcu2_1/src/Cdd_IpcCfg.c
+++ b/mcal_drv/mcal/examples_config/CddIpc_Demo_Cfg/output/generated/soc/j721e/mcu2_1/src/Cdd_IpcCfg.c
@@ -118,6 +118,9 @@ CDD_IPC_CONFIG_DATA_SECTION static uint8
 CDD_IPC_CONFIG_DATA_SECTION static uint8
             Cdd_IpcCommChBuf_2[CDD_IPC_CH_2_BUFF_SIZE];
 /**< Communication Channel local buffer */
+CDD_IPC_CONFIG_DATA_SECTION static uint8
+            Cdd_IpcCommChBuf_3[CDD_IPC_CH_3_BUFF_SIZE];
+/**< Communication Channel local buffer */
 
 #define CDD_IPC_STOP_SEC_VAR_NO_INIT_8_ALIGN_8B
 #include "Cdd_Ipc_MemMap.h"
@@ -154,6 +157,11 @@ CDD_IPC_CONFIG_DATA_SECTION CONST(Cdd_IpcChannelBufType,
     {
         .pBuf = &Cdd_IpcCommChBuf_2[0U],
         .bufSize = CDD_IPC_CH_2_BUFF_SIZE,
+    },
+    [3U] =
+    {
+        .pBuf = &Cdd_IpcCommChBuf_3[0U],
+        .bufSize = CDD_IPC_CH_3_BUFF_SIZE,
     }
 };
 
@@ -169,7 +177,7 @@ CDD_IPC_CONFIG_DATA_SECTION CONST(Cdd_IpcChannelBufType,
  *
  */
 CDD_IPC_CONFIG_DATA_SECTION CONST(struct Cdd_IpcChannelType_s,
-            CDD_IPC_CONFIG_DATA) CddIpcCommChs[3U] =
+            CDD_IPC_CONFIG_DATA) CddIpcCommChs[4U] =
 {
     [0U] =
     {
@@ -221,6 +229,23 @@ CDD_IPC_CONFIG_DATA_SECTION CONST(struct Cdd_IpcChannelType_s,
         /**< Defines the pointer to memory */
         .reserved = 0U,
         /**< Future use if any */
+    },
+    [3U] =
+    {
+        .id = CddIpcConf_IpcComChanId_Cdd_IpcMcu10,
+        /**< Unique identifiers for a channel */
+        .localEp = 61U,
+        /**< Local End Point identifier, on which MCAL/AUTOSAR is hosted */
+        .remoteEp = 41U,
+        /**< Remote End Point identifier, on remote cores */
+        .remoteProcId = CDD_IPC_CORE_MCU1_0,
+        /**< Remote Processor Identifier */
+        .numMsgQueued = 256U,
+        /**< Number of buffer allocated to this communication channel */
+        .maxMsgSize = 512,
+        /**< Defines the pointer to memory */
+        .reserved = 0U,
+        /**< Future use if any */
     }
 };
 
@@ -255,13 +280,14 @@ CDD_IPC_CONFIG_DATA_SECTION CONST(Cdd_IpcConfigType, CDD_IPC_CONFIG_DATA)
     {
         .ownProcID = CDD_IPC_CORE_MCU2_1,
         /**< Defines processor ID on which MCAL/AUTOSAR is being hosted */
-        .numProcs = 3,
+        .numProcs = 4,
         /**< Number of processor which with IPC is desired */
         .remoteProcID = 
         {
             CDD_IPC_CORE_MPU1_0,
             CDD_IPC_CORE_MCU2_0,
-            CDD_IPC_CORE_MCU1_1
+            CDD_IPC_CORE_MCU1_1,
+            CDD_IPC_CORE_MCU1_0,
         },
         /**< Remote processor identifiers */
         .reserved = 0U,
@@ -270,7 +296,7 @@ CDD_IPC_CONFIG_DATA_SECTION CONST(Cdd_IpcConfigType, CDD_IPC_CONFIG_DATA)
 
     .vertIoCfg =
     {
-        .vertIoRingAddr = (void *)0xaa000000U,
+        .vertIoRingAddr = (void *)0xb0000000U,
         /**< Defines address that shall be shared between cores */
         .vertIoRingSize = 0x1c00000U,
         /**< Size of the shared memory */
@@ -278,7 +304,7 @@ CDD_IPC_CONFIG_DATA_SECTION CONST(Cdd_IpcConfigType, CDD_IPC_CONFIG_DATA)
         /**< Future use if any */
     },
 
-    .channelCount = 3U,
+    .channelCount = 4U,
     /**<  Number of channels configured  */
     .pChCfg = CddIpcCommChs,
     /**< Pointer to array of channel conditions */
diff --git a/mcal_drv/mcal/examples_config/IntRtr_Cfg/soc/j721e/mcu2_1/IntRtr_Cfg.h b/mcal_drv/mcal/examples_config/IntRtr_Cfg/soc/j721e/mcu2_1/IntRtr_Cfg.h
index 84cad5e..9254307 100755
--- a/mcal_drv/mcal/examples_config/IntRtr_Cfg/soc/j721e/mcu2_1/IntRtr_Cfg.h
+++ b/mcal_drv/mcal/examples_config/IntRtr_Cfg/soc/j721e/mcu2_1/IntRtr_Cfg.h
@@ -168,6 +168,7 @@ extern "C"
 /**< J721E Main domain MAILBOX 0, Cluster 0 and User 1 */
 #define INTRTR_CFG_MBX_CLST7_USR0_408_MCU_2_0_TO_MCU_1_0_377    (377U)
 /**< J721E Main domain MAILBOX 0, Cluster 7 and User 0 */
+#define INTRTR_CFG_MBX_CLST5_USR2_418_MCU_1_0_TO_MCU_2_1_252    (252U)
 #define INTRTR_CFG_MBX_CLST1_USR2_434_MPU_1_0_TO_MCU_2_1_248    (248U)
 #define INTRTR_CFG_MBX_CLST1_USR2_434_MCU_1_1_TO_MCU_2_1_249    (249U)
 #define INTRTR_CFG_MBX_CLST1_USR2_434_MCU_2_0_TO_MCU_2_1_250    (250U)
