/**
* @file icss_switch_init_cfg.h
*
* @brief Switch Init configuration file
*
* \par
* Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/
* \par
*/
#ifndef _ICSS_SWITCH_INIT_CFG_H
#define _ICSS_SWITCH_INIT_CFG_H

#ifdef __cplusplus
extern "C" {
#endif

/**
* @def SWITCH_DEFAULT_TX_CHANNEL
*      Default Tx channel
*/
#define SWITCH_DEFAULT_TX_CHANNEL        0u
/**
* @def SWITCH_DEFAULT_RX_CHANNEL
*      Default Tx channel
*/
#define SWITCH_DEFAULT_RX_CHANNEL        0u
/**
* @def SWITCH_MIB_TIMER_TIMEOUT
*      MIB Timer Timeout
*/
#define SWITCH_MIB_TIMER_TIMEOUT             5000u /* 5 seconds should be enough */
/**
* @def ALE_AGE_OUT_TIME
*      ALE time out value
*/
#define ALE_AGE_OUT_TIME            300000u
/**
* @def CPGMAC_DEFAULT_MAX_MULTICAST_ADDRESSES
*      maximum multicast addresses
*/
#define CPGMAC_DEFAULT_MAX_MULTICAST_ADDRESSES  64u

/**
* @def SWITCH_DEFAULT_P2_PASSPRIOTAG
*      Port2 Priority Tagging
*/
#define SWITCH_DEFAULT_P2_PASSPRIOTAG                          0u
/**
* @def SWITCH_DEFAULT_P1_PASSPRIOTAG
*      Port1 Priority Tagging
*/
#define SWITCH_DEFAULT_P1_PASSPRIOTAG                          0u
/**
* @def SWITCH_DEFAULT_P0_PASSPRIOTAG
*      Port0 Priority Tagging
*/
#define SWITCH_DEFAULT_P0_PASSPRIOTAG                          0u

/*flow enable*/
/**
* @def SWITCH_DEFAULT_P2_P2RXFLOWEN
*      Port2- Port2 Rx FLow enable
*/
#define SWITCH_DEFAULT_P2_P2RXFLOWEN                           1u
/**
* @def SWITCH_DEFAULT_P2_P1TXFLOWEN
*      Port2- Port1 Tx FLow enable
*/
#define SWITCH_DEFAULT_P2_P1TXFLOWEN                           1u
/**
* @def SWITCH_DEFAULT_P2_P0TXFLOWEN
*      Port2- Port0 Tx FLow enable
*/
#define SWITCH_DEFAULT_P2_P0TXFLOWEN                           1u
/**
* @def SWITCH_DEFAULT_P1_P2TXFLOWEN
*      Port1- Port2 Tx FLow enable
*/
#define SWITCH_DEFAULT_P1_P2TXFLOWEN                           1u
/**
* @def SWITCH_DEFAULT_P1_P0TXFLOWEN
*      Port1- Port0 Tx FLow enable
*/
#define SWITCH_DEFAULT_P1_P0TXFLOWEN                           0u
/**
* @def SWITCH_DEFAULT_P0_P2TXFLOWEN
*      Port0- Port2 Tx FLow enable
*/
#define SWITCH_DEFAULT_P0_P2TXFLOWEN                           1u
/**
* @def SWITCH_DEFAULT_P0_P1TXFLOWEN
*      Port0- Port1 Tx FLow enable
*/
#define SWITCH_DEFAULT_P0_P1TXFLOWEN                           0u
/**
* @def SWITCH_DEFAULT_FIFO_LOOPBACK
*      Switch FIFO Loopback enable
*/
#define SWITCH_DEFAULT_FIFO_LOOPBACK                           0u
/**
* @def SWITCH_DEFAULT_P2PTYPE_ESC
*
*/
#define SWITCH_DEFAULT_P2PTYPE_ESC                             0u
/**
* @def SWITCH_DEFAULT_P1PTYPE_ESC
*
*/
#define SWITCH_DEFAULT_P1PTYPE_ESC                         0u
/**
* @def SWITCH_DEFAULT_P0PTYPE_ESC
*
*/
#define SWITCH_DEFAULT_P0PTYPE_ESC                         0u
/**
* @def SWITCH_DEFAULT_ESCPRI_LD_VAL
*
*/
#define SWITCH_DEFAULT_ESCPRI_LD_VAL                       0u
/**
* @def SWITCH_DEFAULT_P2STATEN
*      Port 2 Statistics Enable
*/
#define SWITCH_DEFAULT_P2STATEN                            1u
/**
* @def SWITCH_DEFAULT_P1STATEN
*      Port 1 Statistics Enable
*/
#define SWITCH_DEFAULT_P1STATEN                            1u
/**
* @def SWITCH_DEFAULT_P0STATEN
*      Port 0 Statistics Enable
*/
#define SWITCH_DEFAULT_P0STATEN                            1u

/**
* @def SWITCH_DEFAULT_MDIOBUSFREQ
*      ICSS MDIO Bus Frequency
*/
#define SWITCH_DEFAULT_MDIOBUSFREQ               			 (2200000u)
/**
* @def SWITCH_DEFAULT_MDIOCLOCKFREQ
*      ICSS MDIO Clock Frequency
*/
#define SWITCH_DEFAULT_MDIOCLOCKFREQ                        (200000000)
/**
* @def SWITCH_DEFAULT_CPMACBUSFREQ
*
*/
#define SWITCH_DEFAULT_CPMACBUSFREQ                         (125000000u)
/**
* @def SWITCH_DEFAULT_MDIOTICK
*      ICSS MDIO Tick
*/
#define SWITCH_DEFAULT_MDIOTICK                              1000u


/*Default Ale Config*/
/**
* @def SWITCH_DEFAULT_ENABLEALE
*      Switch Default ALE Enable
*/
#define SWITCH_DEFAULT_ENABLEALE                                1u
/**
* @def SWITCH_DEFAULT_CLEARTABLE
*      Switch Default Clear ALE Table
*/
#define SWITCH_DEFAULT_CLEARTABLE                               1u
/**
* @def SWITCH_DEFAULT_AGEOUTNOW
*      Switch Default ALE Ageout
*/
#define SWITCH_DEFAULT_AGEOUTNOW                								0u
/**
* @def SWITCH_DEFAULT_LEARNNOVID
*      Switch Default Learn No VLAN ID
*/
#define SWITCH_DEFAULT_LEARNNOVID                               0u
/**
* @def SWITCH_DEFAULT_ENVID0MODE
*
*/
#define SWITCH_DEFAULT_ENVID0MODE                               0u
/**
* @def SWITCH_DEFAULT_ENABLEOUIDENY
*
*/
#define SWITCH_DEFAULT_ENABLEOUIDENY                            0u
/**
* @def SWITCH_DEFAULT_RATELIMITTX
*      Switch Default Tx RateLinit
*/
#define SWITCH_DEFAULT_RATELIMITTX                              0u
/**
* @def SWITCH_DEFAULT_ALEVLANAWARE
*      Switch Default Enable Vlan aware mode
*/
#define SWITCH_DEFAULT_ALEVLANAWARE                             1u
/**
* @def SWITCH_DEFAULT_ENAUTHMODE
*
*/
#define SWITCH_DEFAULT_ENAUTHMODE                               0u
/**
* @def SWITCH_DEFAULT_EnRATELIMIT
*      Switch Default Enable Rate Limit
*/
#define SWITCH_DEFAULT_EnRATELIMIT                              0u
/**
* @def SWITCH_DEFAULT_ALEPRESCALE
*      Prescalar divides down to 1ms interval
*/
#define SWITCH_DEFAULT_ALEPRESCALE                           	(SWITCH_DEFAULT_CPMACBUSFREQ /1000u)
/**
* @def SWITCH_DEFAULT_UNK_FORCE_UNTAG_EGR
*
*/
#define SWITCH_DEFAULT_UNK_FORCE_UNTAG_EGR                      63u
/**
* @def SWITCH_DEFAULT_UNK_REGMCAST_FLOODMASK
*
*/
#define SWITCH_DEFAULT_UNK_REGMCAST_FLOODMASK                   6u
/**
* @def SWITCH_DEFAULT_UNK_MCAST_FLOODMASK
*
*/
#define SWITCH_DEFAULT_UNK_MCAST_FLOODMASK                      6u
/**
* @def SWITCH_DEFAULT_UNK_VLANMEMLIST
*
*/
#define SWITCH_DEFAULT_UNK_VLANMEMLIST                          63u
/**
* @def CPGMAC_DEFAULT_UNK_FORCE_UNTAG_EGR
*
*/
#define CPGMAC_DEFAULT_UNK_FORCE_UNTAG_EGR                      7u
/**
* @def CPGMAC_DEFAULT_UNK_REGMCAST_FLOODMASK
*
*/
#define CPGMAC_DEFAULT_UNK_REGMCAST_FLOODMASK                   0u
/**
* @def CPGMAC_DEFAULT_UNK_MCAST_FLOODMASK
*
*/
#define CPGMAC_DEFAULT_UNK_MCAST_FLOODMASK                      0u
/**
* @def CPGMAC_DEFAULT_UNK_VLANMEMLIST
*
*/
#define CPGMAC_DEFAULT_UNK_VLANMEMLIST                          4u


/* Default Ale Port Config*/
/**
* @def SWITCH_DEFAULT_BCASTLIMIT
*      Default Broadcast Limit rate
*/
#define SWITCH_DEFAULT_BCASTLIMIT                               0u
/**
* @def SWITCH_DEFAULT_MCASTLIMIT
*      Default Multicast Limit rate
*/
#define SWITCH_DEFAULT_MCASTLIMIT                               0u
/**
* @def SWITCH_DEFAULT_LEARN
*      Switch Learn enable
*/
#define SWITCH_DEFAULT_LEARN                                    0u
/**
* @def SWITCH_DEFAULT_NOLEARN
*      Switch Learn disable
*/
#define SWITCH_DEFAULT_NOLEARN                                  1u

/**
* @def SWITCH_DEFAULT_VIDINGRESSCHECK
*      Switch Check VLANID of Ingress packet
*/
#define SWITCH_DEFAULT_VIDINGRESSCHECK                          0u
/**
* @def SWITCH_DEFAULT_DROPUNTAGGED
*      Switch dropp untagged packet
*/
#define SWITCH_DEFAULT_DROPUNTAGGED                             0u
/**
* @def SWITCH_DEFAULT_PORTSTATE
*      Switch default port state
*/
#define SWITCH_DEFAULT_PORTSTATE                		3u


/* Default Dma config*/
/**
* @def SWITCH_DEFAULT_DMA_PORTPRI
*      DMA Port Priority
*/
#define SWITCH_DEFAULT_DMA_PORTPRI                              0u
/**
* @def SWITCH_DEFAULT_DMA_PORTCFI
*      DMA Port CFI
*/
#define SWITCH_DEFAULT_DMA_PORTCFI                              0u
/**
* @def SWITCH_DEFAULT_DMA_PORTVID
*      DMA Port Vlanid
*/
#define SWITCH_DEFAULT_DMA_PORTVID                              1u


/**
* @def SWITCH_DEFAULT_RXBUFOFF
*
*/
#define SWITCH_DEFAULT_RXBUFOFF                                 0u
/**
* @def SWITCH_DEFAULT_RXCEF
*
*/
#define SWITCH_DEFAULT_RXCEF                                    0u
/**
* @def SWITCH_DEFAULT_CMDIDLE
*
*/
#define SWITCH_DEFAULT_CMDIDLE                                  0u
/**
* @def SWITCH_DEFAULT_RXOFFLEN
*
*/
#define SWITCH_DEFAULT_RXOFFLEN                                 0u
/**
* @def SWITCH_DEFAULT_RXOWNERSHIP
*
*/
#define SWITCH_DEFAULT_RXOWNERSHIP                              0u
/**
* @def SWITCH_DEFAULT_TXPTYPE
*
*/
#define SWITCH_DEFAULT_TXPTYPE                                  1u
/**
* @def SWITCH_DEFAULT_TXPTYPE
*
*/
#define SWITCH_DEFAULT_SL0_PRI0                                 0u
/**
* @def SWITCH_DEFAULT_SL0_PRI1
*
*/
#define SWITCH_DEFAULT_SL0_PRI1                                 0u
/**
* @def SWITCH_DEFAULT_SL0_PRI2
*
*/
#define SWITCH_DEFAULT_SL0_PRI2                                 0u
/**
* @def SWITCH_DEFAULT_SL0_PRI3
*
*/
#define SWITCH_DEFAULT_SL0_PRI3                                 0u
/**
* @def SWITCH_DEFAULT_SL1_PRI0
*
*/
#define SWITCH_DEFAULT_SL1_PRI0                                 1u
/**
* @def SWITCH_DEFAULT_SL1_PRI1
*
*/
#define SWITCH_DEFAULT_SL1_PRI1                                 1u
/**
* @def SWITCH_DEFAULT_SL1_PRI2
*
*/
#define SWITCH_DEFAULT_SL1_PRI2                                 1u
/**
* @def SWITCH_DEFAULT_SL1_PRI3
*
*/
#define SWITCH_DEFAULT_SL1_PRI3                                 1u

/* Default MAC  config*/
/**
* @def SWITCH_DEFAULT_MAC_PORTPRI
*      Switch default  Port priority
*/
#define SWITCH_DEFAULT_MAC_PORTPRI                              0u
/**
* @def SWITCH_DEFAULT_MAC_PORTCFI
*      Switch default  Port CFI
*/
#define SWITCH_DEFAULT_MAC_PORTCFI                              0u
/**
* @def SWITCH_DEFAULT_MAC_PORTVID
*      Switch default  Port Vlanid
*/
#define SWITCH_DEFAULT_MAC_PORTVID                              1u
/**
* @def SWITCH_DEFAULT_PASSCRC
*
*/
#define SWITCH_DEFAULT_PASSCRC                                  0u
/**
* @def SWITCH_DEFAULT_RXCMFEN
*      Switch default   RX CMF Enable
*/
#define SWITCH_DEFAULT_RXCMFEN                                  0u
/**
* @def SWITCH_DEFAULT_RXCSFEN
*      Switch default   RX CSF Enable
*/
#define SWITCH_DEFAULT_RXCSFEN                                  0u
/**
* @def SWITCH_DEFAULT_RXCEFEN
*      Switch default   RX CEF Enable
*/
#define SWITCH_DEFAULT_RXCEFEN                                  0u
/**
* @def SWITCH_DEFAULT_EXTEN
*
*/
#define SWITCH_DEFAULT_EXTEN                                    1u
/**
* @def SWITCH_DEFAULT_GIGFORCE
*      Switch default Force  Gigabit mode
*/
#define SWITCH_DEFAULT_GIGFORCE                                 0u
/**
* @def SWITCH_DEFAULT_IFCTLB
*      Switch default IFCTLB
*/
#define SWITCH_DEFAULT_IFCTLB                                   0u
/**
* @def SWITCH_DEFAULT_IFCTLA
*      Switch default IFCTLA
*/
#define SWITCH_DEFAULT_IFCTLA                                   1u
/**
* @def SWITCH_DEFAULT_MAC_CMDIDLE
*
*/
#define SWITCH_DEFAULT_MAC_CMDIDLE                              0u
/**
* @def SWITCH_DEFAULT_TXSHORTGAPEN
*
*/
#define SWITCH_DEFAULT_TXSHORTGAPEN                             0u


#ifdef AM335x
/**
* @def SWITCH_DEFAULT_GIGABITEN
*      Switch default Gigabit mode enable
*/
#define SWITCH_DEFAULT_GIGABITEN                                0u
#else
/**
* @def SWITCH_DEFAULT_GIGABITEN
*      Switch default Gigabit mode enable
*/
#define SWITCH_DEFAULT_GIGABITEN                                1u
#endif
/**
* @def SWITCH_DEFAULT_TXPACINGEN
*      Switch default Enable TX interrupt pacing
*/
#define SWITCH_DEFAULT_TXPACINGEN                               0u
#ifdef AM335x
/**
* @def SWITCH_DEFAULT_GMIIEN
*      Switch default GMII enable
*/
#define SWITCH_DEFAULT_GMIIEN                                   0u
#else
/**
* @def SWITCH_DEFAULT_GMIIEN
*      Switch default GMII enable
*/
#define SWITCH_DEFAULT_GMIIEN                                   1u
#endif

/**
* @def SWITCH_DEFAULT_TXFLOWEN
*      Switch default Tx Flow enable
*/
#define SWITCH_DEFAULT_TXFLOWEN                                 1u
/**
* @def SWITCH_DEFAULT_RXFLOWEN
*      Switch default Rx Flow enable
*/
#define SWITCH_DEFAULT_RXFLOWEN                                 1u
/**
* @def SWITCH_DEFAULT_LOOPBKEN
*      Switch default Loop Back enable
*/
#define SWITCH_DEFAULT_LOOPBKEN                                 0u
/**
* @def SWITCH_DEFAULT_RXMAXLEN
*      Switch default  Max length for RX packet
*/
#define SWITCH_DEFAULT_RXMAXLEN                                 1518u
/**
* @def SWITCH_DEFAULT_FD
*
*/
#define SWITCH_DEFAULT_FD                                       1u


/* In future use default init string - parse from static defined init string to derive the init params*/

/* format for specifier is as follows:
 * "speed0:duplex0:intPhy0:BroadEn0:MultiEn0:speed1:duplex1:intPhy1
 * :BroadEn1:MultiEn1:txNumBDs:txNumChannel:rxNumBDs:rxNumChannel:PromEn:vlanAware"
 */
/**
* @def SWITCH_INITPARAM_SPEED0
*      Switch InitParam Speed Port0
*/
#define SWITCH_INITPARAM_SPEED0    	0u
/**
* @def SWITCH_INITPARAM_DUPLEX0
*      Switch InitParam duplexity Port0
*/
#define SWITCH_INITPARAM_DUPLEX0	0u
/**
* @def SWITCH_INITPARAM_INTPHY0
*
*/
#define SWITCH_INITPARAM_INTPHY0	1u
/**
* @def SWITCH_INITPARAM_BROADEN0
*      Switch InitParam Broadcast enable Port0
*/
#define SWITCH_INITPARAM_BROADEN0	0u
/**
* @def SWITCH_INITPARAM_MULTIEN0
*      Switch InitParam Multicast enable Port0
*/
#define SWITCH_INITPARAM_MULTIEN0	0u
/**
* @def SWITCH_INITPARAM_SPEED1
*     Switch InitParam Speed Port1
*/
#define SWITCH_INITPARAM_SPEED1		0u
/**
* @def SWITCH_INITPARAM_DUPLEX1
*      Switch InitParam duplexity Port1
*/
#define SWITCH_INITPARAM_DUPLEX1	0u
/**
* @def SWITCH_INITPARAM_INTPHY1
*
*/
#define SWITCH_INITPARAM_INTPHY1	1u
/**
* @def SWITCH_INITPARAM_BROADEN1
*      Switch InitParam Broadcast enable Port1
*/
#define SWITCH_INITPARAM_BROADEN1	0u
/**
* @def SWITCH_INITPARAM_MULTIEN1
*      Switch InitParam Multicast enable Port1
*/
#define SWITCH_INITPARAM_MULTIEN1	0u
/**
* @def SWITCH_INITPARAM_PROMEN
*      Switch InitParam Promiscuous mode enable
*/
#define SWITCH_INITPARAM_PROMEN		0u
/**
* @def SWITCH_INITPARAM_VLANAWARE
*      Switch InitParam Vlan aware mode enable
*/
#define SWITCH_INITPARAM_VLANAWARE	1u
/**
* @def SWITCH_INITPARAM_TXNUMBDS
*      Switch InitParam Number of Tx Buffer descriptors
*/
#define SWITCH_INITPARAM_TXNUMBDS	192u
/**
* @def SWITCH_INITPARAM_RXNUMBDS
*      Switch InitParam Number of Rx Buffer descriptors
*/
#define SWITCH_INITPARAM_RXNUMBDS   64u


#ifdef __cplusplus
}
#endif

#endif /* _ICSS_SWITCH_INIT_CFG_H */



