453.90> 
  453.91> =====================DSS clock script===================
  453.91> Dumps internal clocks and muxes of DSS
  453.91> 
  453.97> CTRL_CORE_DSS_PLL_CONTROL (0x4a002538) = 0x000002A6
  453.99> video1 PLL :  Enabled
  453.99> video2 PLL :  Disabled
  453.99> HDMI   PLL :  Disabled
  453.99> DSI1_A_CLK mux : DPLL Video1
  453.99> DSI1_B_CLK mux : DPLL video2
  453.99> DSI1_C_CLK mux : DPLL Video2
  453.99> 
  453.99> DSS_CTRL (0x58000040) = 0x00010001
  453.99>  2: LCD1 clk switch :  DSI1_A_CLK
  453.99>  3: LCD2 clk switch :  DSS clk
  454.00> 10: LCD3 clk switch :  DSS clk
  454.00>  1: func clk switch :  DSS clk
  454.00> 13: DPI1 output     :  LCD1
  454.00> 
  454.05> ========================================================
  454.05> Register dump for DPLL video1
  454.07> |----------------------------|
  454.07> | Address (hex) | Data (hex) |
  454.07> |----------------------------|
  454.07> | 0x58004300    | 0x00000018 |
  454.07> | 0x58004304    | 0x00002283 |
  454.07> | 0x58004308    | 0x00000000 |
  454.07> | 0x5800430C    | 0x00801600 |
  454.07> | 0x58004310    | 0x00616008 |
  454.07> | 0x58004314    | 0x00000000 |
  454.07> | 0x58004318    | 0x00000000 |
  454.07> | 0x5800431C    | 0x00000000 |
  454.07> | 0x58004320    | 0x00000000 |
  454.07> |----------------------------|
  454.08> 
  454.08> Details for DPLL video1
  454.08> PLL status  :  Locked
  454.08> M4 hsdiv(1) :  Active
  454.08> M5 hsdiv(2) :  inactive
  454.08> M6 hsdiv(3) :  inactive
  454.08> M7 hsdiv(4) :  inactive
  454.08> 
  454.16> PLL_REGM =  11
  454.16> PLL_REGN =  0
  454.18> M4 DIV   =  4
  454.18> M6 DIV   =  0
  454.18> M7 DIV   =  0
  454.18> 
  454.18> Clock calculations (DPLL video1)
  454.18> sysclk = 20000000
  454.18> DCO clk = sysclk * 2 * REGM / (REGN + 1) = 440000000
  454.18> M4clk (clkcout1) = DCO clk / (M4 DIV + 1) = 88000000
  454.18> M6clk (clkcout1) = DCO clk / (M6 DIV + 1) = 0
  454.18> M7clk (clkcout1) = DCO clk / (M7 DIV + 1) = 0
  454.18> 
  454.18> ========================================================
  454.18> Clock O/P of MUXes
  454.18> Error: I2C Read failed
  454.18> Error: I2C Read failed
  454.19> Error: I2C Read failed
  454.19> omapconf: powerdm_deinit(): cpu not supported!!!
  454.19> omapconf: clockdm_deinit(): cpu not supported!!!
  454.19> DSI1_A_CLK :  88000000
  454.19> DSI1_B_CLK :  0
  454.19> DSI1_C_CLK :  0
  454.19> 
  454.21>  2: LCD1 clk :  88000000
  454.21>  3: LCD2 clk :  192000000
  454.21> 10: LCD3 clk :  192000000
  454.21>  1: func clk :  192000000
  454.21> 
  454.29> LCD1 logic clk(/ 1 ) :  88000000  pix clk(/ 1 ) :  88000000
  454.30> LCD2 logic clk(/ 4 ) :  48000000  pix clk(/ 1 ) :  48000000
  454.30> LCD3 logic clk(/ 4 ) :  48000000  pix clk(/ 1 ) :  48000000