//------------------------------------------------------------------------------
// Copyright (c) 2017 Cadence Design Systems, Inc. All rights reserved worldwide
//------------------------------------------------------------------------------
// WARNING: this file is auto-generated with the script gen_c_headers.py
//------------------------------------------------------------------------------
//Found as ddr_subsystem/func_ver/sanity/demo_tb/verif/uvc_lib/cdns_ddrss_demo/c/DDRSS_addr_map_sfr_offs_ew_32bit.h

/* Macros for register block DDR_Controller */
#define DDRSS_DDR_Controller_REGISTER_BLOCK__OFFS	0x0

#define DDRSS_CTL_0__SFR_OFFS	0x0
#define DDRSS_CTL_1__SFR_OFFS	0x4
#define DDRSS_CTL_2__SFR_OFFS	0x8
#define DDRSS_CTL_3__SFR_OFFS	0xc
#define DDRSS_CTL_4__SFR_OFFS	0x10
#define DDRSS_CTL_5__SFR_OFFS	0x14
#define DDRSS_CTL_6__SFR_OFFS	0x18
#define DDRSS_CTL_7__SFR_OFFS	0x1c
#define DDRSS_CTL_8__SFR_OFFS	0x20
#define DDRSS_CTL_9__SFR_OFFS	0x24
#define DDRSS_CTL_10__SFR_OFFS	0x28
#define DDRSS_CTL_11__SFR_OFFS	0x2c
#define DDRSS_CTL_12__SFR_OFFS	0x30
#define DDRSS_CTL_13__SFR_OFFS	0x34
#define DDRSS_CTL_14__SFR_OFFS	0x38
#define DDRSS_CTL_15__SFR_OFFS	0x3c
#define DDRSS_CTL_16__SFR_OFFS	0x40
#define DDRSS_CTL_17__SFR_OFFS	0x44
#define DDRSS_CTL_18__SFR_OFFS	0x48
#define DDRSS_CTL_19__SFR_OFFS	0x4c
#define DDRSS_CTL_20__SFR_OFFS	0x50
#define DDRSS_CTL_21__SFR_OFFS	0x54
#define DDRSS_CTL_22__SFR_OFFS	0x58
#define DDRSS_CTL_23__SFR_OFFS	0x5c
#define DDRSS_CTL_24__SFR_OFFS	0x60
#define DDRSS_CTL_25__SFR_OFFS	0x64
#define DDRSS_CTL_26__SFR_OFFS	0x68
#define DDRSS_CTL_27__SFR_OFFS	0x6c
#define DDRSS_CTL_28__SFR_OFFS	0x70
#define DDRSS_CTL_29__SFR_OFFS	0x74
#define DDRSS_CTL_30__SFR_OFFS	0x78
#define DDRSS_CTL_31__SFR_OFFS	0x7c
#define DDRSS_CTL_32__SFR_OFFS	0x80
#define DDRSS_CTL_33__SFR_OFFS	0x84
#define DDRSS_CTL_34__SFR_OFFS	0x88
#define DDRSS_CTL_35__SFR_OFFS	0x8c
#define DDRSS_CTL_36__SFR_OFFS	0x90
#define DDRSS_CTL_37__SFR_OFFS	0x94
#define DDRSS_CTL_38__SFR_OFFS	0x98
#define DDRSS_CTL_39__SFR_OFFS	0x9c
#define DDRSS_CTL_40__SFR_OFFS	0xa0
#define DDRSS_CTL_41__SFR_OFFS	0xa4
#define DDRSS_CTL_42__SFR_OFFS	0xa8
#define DDRSS_CTL_43__SFR_OFFS	0xac
#define DDRSS_CTL_44__SFR_OFFS	0xb0
#define DDRSS_CTL_45__SFR_OFFS	0xb4
#define DDRSS_CTL_46__SFR_OFFS	0xb8
#define DDRSS_CTL_47__SFR_OFFS	0xbc
#define DDRSS_CTL_48__SFR_OFFS	0xc0
#define DDRSS_CTL_49__SFR_OFFS	0xc4
#define DDRSS_CTL_50__SFR_OFFS	0xc8
#define DDRSS_CTL_51__SFR_OFFS	0xcc
#define DDRSS_CTL_52__SFR_OFFS	0xd0
#define DDRSS_CTL_53__SFR_OFFS	0xd4
#define DDRSS_CTL_54__SFR_OFFS	0xd8
#define DDRSS_CTL_55__SFR_OFFS	0xdc
#define DDRSS_CTL_56__SFR_OFFS	0xe0
#define DDRSS_CTL_57__SFR_OFFS	0xe4
#define DDRSS_CTL_58__SFR_OFFS	0xe8
#define DDRSS_CTL_59__SFR_OFFS	0xec
#define DDRSS_CTL_60__SFR_OFFS	0xf0
#define DDRSS_CTL_61__SFR_OFFS	0xf4
#define DDRSS_CTL_62__SFR_OFFS	0xf8
#define DDRSS_CTL_63__SFR_OFFS	0xfc
#define DDRSS_CTL_64__SFR_OFFS	0x100
#define DDRSS_CTL_65__SFR_OFFS	0x104
#define DDRSS_CTL_66__SFR_OFFS	0x108
#define DDRSS_CTL_67__SFR_OFFS	0x10c
#define DDRSS_CTL_68__SFR_OFFS	0x110
#define DDRSS_CTL_69__SFR_OFFS	0x114
#define DDRSS_CTL_70__SFR_OFFS	0x118
#define DDRSS_CTL_71__SFR_OFFS	0x11c
#define DDRSS_CTL_72__SFR_OFFS	0x120
#define DDRSS_CTL_73__SFR_OFFS	0x124
#define DDRSS_CTL_74__SFR_OFFS	0x128
#define DDRSS_CTL_75__SFR_OFFS	0x12c
#define DDRSS_CTL_76__SFR_OFFS	0x130
#define DDRSS_CTL_77__SFR_OFFS	0x134
#define DDRSS_CTL_78__SFR_OFFS	0x138
#define DDRSS_CTL_79__SFR_OFFS	0x13c
#define DDRSS_CTL_80__SFR_OFFS	0x140
#define DDRSS_CTL_81__SFR_OFFS	0x144
#define DDRSS_CTL_82__SFR_OFFS	0x148
#define DDRSS_CTL_83__SFR_OFFS	0x14c
#define DDRSS_CTL_84__SFR_OFFS	0x150
#define DDRSS_CTL_85__SFR_OFFS	0x154
#define DDRSS_CTL_86__SFR_OFFS	0x158
#define DDRSS_CTL_87__SFR_OFFS	0x15c
#define DDRSS_CTL_88__SFR_OFFS	0x160
#define DDRSS_CTL_89__SFR_OFFS	0x164
#define DDRSS_CTL_90__SFR_OFFS	0x168
#define DDRSS_CTL_91__SFR_OFFS	0x16c
#define DDRSS_CTL_92__SFR_OFFS	0x170
#define DDRSS_CTL_93__SFR_OFFS	0x174
#define DDRSS_CTL_94__SFR_OFFS	0x178
#define DDRSS_CTL_95__SFR_OFFS	0x17c
#define DDRSS_CTL_96__SFR_OFFS	0x180
#define DDRSS_CTL_97__SFR_OFFS	0x184
#define DDRSS_CTL_98__SFR_OFFS	0x188
#define DDRSS_CTL_99__SFR_OFFS	0x18c
#define DDRSS_CTL_100__SFR_OFFS	0x190
#define DDRSS_CTL_101__SFR_OFFS	0x194
#define DDRSS_CTL_102__SFR_OFFS	0x198
#define DDRSS_CTL_103__SFR_OFFS	0x19c
#define DDRSS_CTL_104__SFR_OFFS	0x1a0
#define DDRSS_CTL_105__SFR_OFFS	0x1a4
#define DDRSS_CTL_106__SFR_OFFS	0x1a8
#define DDRSS_CTL_107__SFR_OFFS	0x1ac
#define DDRSS_CTL_108__SFR_OFFS	0x1b0
#define DDRSS_CTL_109__SFR_OFFS	0x1b4
#define DDRSS_CTL_110__SFR_OFFS	0x1b8
#define DDRSS_CTL_111__SFR_OFFS	0x1bc
#define DDRSS_CTL_112__SFR_OFFS	0x1c0
#define DDRSS_CTL_113__SFR_OFFS	0x1c4
#define DDRSS_CTL_114__SFR_OFFS	0x1c8
#define DDRSS_CTL_115__SFR_OFFS	0x1cc
#define DDRSS_CTL_116__SFR_OFFS	0x1d0
#define DDRSS_CTL_117__SFR_OFFS	0x1d4
#define DDRSS_CTL_118__SFR_OFFS	0x1d8
#define DDRSS_CTL_119__SFR_OFFS	0x1dc
#define DDRSS_CTL_120__SFR_OFFS	0x1e0
#define DDRSS_CTL_121__SFR_OFFS	0x1e4
#define DDRSS_CTL_122__SFR_OFFS	0x1e8
#define DDRSS_CTL_123__SFR_OFFS	0x1ec
#define DDRSS_CTL_124__SFR_OFFS	0x1f0
#define DDRSS_CTL_125__SFR_OFFS	0x1f4
#define DDRSS_CTL_126__SFR_OFFS	0x1f8
#define DDRSS_CTL_127__SFR_OFFS	0x1fc
#define DDRSS_CTL_128__SFR_OFFS	0x200
#define DDRSS_CTL_129__SFR_OFFS	0x204
#define DDRSS_CTL_130__SFR_OFFS	0x208
#define DDRSS_CTL_131__SFR_OFFS	0x20c
#define DDRSS_CTL_132__SFR_OFFS	0x210
#define DDRSS_CTL_133__SFR_OFFS	0x214
#define DDRSS_CTL_134__SFR_OFFS	0x218
#define DDRSS_CTL_135__SFR_OFFS	0x21c
#define DDRSS_CTL_136__SFR_OFFS	0x220
#define DDRSS_CTL_137__SFR_OFFS	0x224
#define DDRSS_CTL_138__SFR_OFFS	0x228
#define DDRSS_CTL_139__SFR_OFFS	0x22c
#define DDRSS_CTL_140__SFR_OFFS	0x230
#define DDRSS_CTL_141__SFR_OFFS	0x234
#define DDRSS_CTL_142__SFR_OFFS	0x238
#define DDRSS_CTL_143__SFR_OFFS	0x23c
#define DDRSS_CTL_144__SFR_OFFS	0x240
#define DDRSS_CTL_145__SFR_OFFS	0x244
#define DDRSS_CTL_146__SFR_OFFS	0x248
#define DDRSS_CTL_147__SFR_OFFS	0x24c
#define DDRSS_CTL_148__SFR_OFFS	0x250
#define DDRSS_CTL_149__SFR_OFFS	0x254
#define DDRSS_CTL_150__SFR_OFFS	0x258
#define DDRSS_CTL_151__SFR_OFFS	0x25c
#define DDRSS_CTL_152__SFR_OFFS	0x260
#define DDRSS_CTL_153__SFR_OFFS	0x264
#define DDRSS_CTL_154__SFR_OFFS	0x268
#define DDRSS_CTL_155__SFR_OFFS	0x26c
#define DDRSS_CTL_156__SFR_OFFS	0x270
#define DDRSS_CTL_157__SFR_OFFS	0x274
#define DDRSS_CTL_158__SFR_OFFS	0x278
#define DDRSS_CTL_159__SFR_OFFS	0x27c
#define DDRSS_CTL_160__SFR_OFFS	0x280
#define DDRSS_CTL_161__SFR_OFFS	0x284
#define DDRSS_CTL_162__SFR_OFFS	0x288
#define DDRSS_CTL_163__SFR_OFFS	0x28c
#define DDRSS_CTL_164__SFR_OFFS	0x290
#define DDRSS_CTL_165__SFR_OFFS	0x294
#define DDRSS_CTL_166__SFR_OFFS	0x298
#define DDRSS_CTL_167__SFR_OFFS	0x29c
#define DDRSS_CTL_168__SFR_OFFS	0x2a0
#define DDRSS_CTL_169__SFR_OFFS	0x2a4
#define DDRSS_CTL_170__SFR_OFFS	0x2a8
#define DDRSS_CTL_171__SFR_OFFS	0x2ac
#define DDRSS_CTL_172__SFR_OFFS	0x2b0
#define DDRSS_CTL_173__SFR_OFFS	0x2b4
#define DDRSS_CTL_174__SFR_OFFS	0x2b8
#define DDRSS_CTL_175__SFR_OFFS	0x2bc
#define DDRSS_CTL_176__SFR_OFFS	0x2c0
#define DDRSS_CTL_177__SFR_OFFS	0x2c4
#define DDRSS_CTL_178__SFR_OFFS	0x2c8
#define DDRSS_CTL_179__SFR_OFFS	0x2cc
#define DDRSS_CTL_180__SFR_OFFS	0x2d0
#define DDRSS_CTL_181__SFR_OFFS	0x2d4
#define DDRSS_CTL_182__SFR_OFFS	0x2d8
#define DDRSS_CTL_183__SFR_OFFS	0x2dc
#define DDRSS_CTL_184__SFR_OFFS	0x2e0
#define DDRSS_CTL_185__SFR_OFFS	0x2e4
#define DDRSS_CTL_186__SFR_OFFS	0x2e8
#define DDRSS_CTL_187__SFR_OFFS	0x2ec
#define DDRSS_CTL_188__SFR_OFFS	0x2f0
#define DDRSS_CTL_189__SFR_OFFS	0x2f4
#define DDRSS_CTL_190__SFR_OFFS	0x2f8
#define DDRSS_CTL_191__SFR_OFFS	0x2fc
#define DDRSS_CTL_192__SFR_OFFS	0x300
#define DDRSS_CTL_193__SFR_OFFS	0x304
#define DDRSS_CTL_194__SFR_OFFS	0x308
#define DDRSS_CTL_195__SFR_OFFS	0x30c
#define DDRSS_CTL_196__SFR_OFFS	0x310
#define DDRSS_CTL_197__SFR_OFFS	0x314
#define DDRSS_CTL_198__SFR_OFFS	0x318
#define DDRSS_CTL_199__SFR_OFFS	0x31c
#define DDRSS_CTL_200__SFR_OFFS	0x320
#define DDRSS_CTL_201__SFR_OFFS	0x324
#define DDRSS_CTL_202__SFR_OFFS	0x328
#define DDRSS_CTL_203__SFR_OFFS	0x32c
#define DDRSS_CTL_204__SFR_OFFS	0x330
#define DDRSS_CTL_205__SFR_OFFS	0x334
#define DDRSS_CTL_206__SFR_OFFS	0x338
#define DDRSS_CTL_207__SFR_OFFS	0x33c
#define DDRSS_CTL_208__SFR_OFFS	0x340
#define DDRSS_CTL_209__SFR_OFFS	0x344
#define DDRSS_CTL_210__SFR_OFFS	0x348
#define DDRSS_CTL_211__SFR_OFFS	0x34c
#define DDRSS_CTL_212__SFR_OFFS	0x350
#define DDRSS_CTL_213__SFR_OFFS	0x354
#define DDRSS_CTL_214__SFR_OFFS	0x358
#define DDRSS_CTL_215__SFR_OFFS	0x35c
#define DDRSS_CTL_216__SFR_OFFS	0x360
#define DDRSS_CTL_217__SFR_OFFS	0x364
#define DDRSS_CTL_218__SFR_OFFS	0x368
#define DDRSS_CTL_219__SFR_OFFS	0x36c
#define DDRSS_CTL_220__SFR_OFFS	0x370
#define DDRSS_CTL_221__SFR_OFFS	0x374
#define DDRSS_CTL_222__SFR_OFFS	0x378
#define DDRSS_CTL_223__SFR_OFFS	0x37c
#define DDRSS_CTL_224__SFR_OFFS	0x380
#define DDRSS_CTL_225__SFR_OFFS	0x384
#define DDRSS_CTL_226__SFR_OFFS	0x388
#define DDRSS_CTL_227__SFR_OFFS	0x38c
#define DDRSS_CTL_228__SFR_OFFS	0x390
#define DDRSS_CTL_229__SFR_OFFS	0x394
#define DDRSS_CTL_230__SFR_OFFS	0x398
#define DDRSS_CTL_231__SFR_OFFS	0x39c
#define DDRSS_CTL_232__SFR_OFFS	0x3a0
#define DDRSS_CTL_233__SFR_OFFS	0x3a4
#define DDRSS_CTL_234__SFR_OFFS	0x3a8
#define DDRSS_CTL_235__SFR_OFFS	0x3ac
#define DDRSS_CTL_236__SFR_OFFS	0x3b0
#define DDRSS_CTL_237__SFR_OFFS	0x3b4
#define DDRSS_CTL_238__SFR_OFFS	0x3b8
#define DDRSS_CTL_239__SFR_OFFS	0x3bc
#define DDRSS_CTL_240__SFR_OFFS	0x3c0
#define DDRSS_CTL_241__SFR_OFFS	0x3c4
#define DDRSS_CTL_242__SFR_OFFS	0x3c8
#define DDRSS_CTL_243__SFR_OFFS	0x3cc
#define DDRSS_CTL_244__SFR_OFFS	0x3d0
#define DDRSS_CTL_245__SFR_OFFS	0x3d4
#define DDRSS_CTL_246__SFR_OFFS	0x3d8
#define DDRSS_CTL_247__SFR_OFFS	0x3dc
#define DDRSS_CTL_248__SFR_OFFS	0x3e0
#define DDRSS_CTL_249__SFR_OFFS	0x3e4
#define DDRSS_CTL_250__SFR_OFFS	0x3e8
#define DDRSS_CTL_251__SFR_OFFS	0x3ec
#define DDRSS_CTL_252__SFR_OFFS	0x3f0
#define DDRSS_CTL_253__SFR_OFFS	0x3f4
#define DDRSS_CTL_254__SFR_OFFS	0x3f8
#define DDRSS_CTL_255__SFR_OFFS	0x3fc
#define DDRSS_CTL_256__SFR_OFFS	0x400
#define DDRSS_CTL_257__SFR_OFFS	0x404
#define DDRSS_CTL_258__SFR_OFFS	0x408
#define DDRSS_CTL_259__SFR_OFFS	0x40c
#define DDRSS_CTL_260__SFR_OFFS	0x410
#define DDRSS_CTL_261__SFR_OFFS	0x414
#define DDRSS_CTL_262__SFR_OFFS	0x418
#define DDRSS_CTL_263__SFR_OFFS	0x41c
#define DDRSS_CTL_264__SFR_OFFS	0x420
#define DDRSS_CTL_265__SFR_OFFS	0x424
#define DDRSS_CTL_266__SFR_OFFS	0x428
#define DDRSS_CTL_267__SFR_OFFS	0x42c
#define DDRSS_CTL_268__SFR_OFFS	0x430
#define DDRSS_CTL_269__SFR_OFFS	0x434
#define DDRSS_CTL_270__SFR_OFFS	0x438
#define DDRSS_CTL_271__SFR_OFFS	0x43c
#define DDRSS_CTL_272__SFR_OFFS	0x440
#define DDRSS_CTL_273__SFR_OFFS	0x444
#define DDRSS_CTL_274__SFR_OFFS	0x448
#define DDRSS_CTL_275__SFR_OFFS	0x44c
#define DDRSS_CTL_276__SFR_OFFS	0x450
#define DDRSS_CTL_277__SFR_OFFS	0x454
#define DDRSS_CTL_278__SFR_OFFS	0x458
#define DDRSS_CTL_279__SFR_OFFS	0x45c
#define DDRSS_CTL_280__SFR_OFFS	0x460
#define DDRSS_CTL_281__SFR_OFFS	0x464
#define DDRSS_CTL_282__SFR_OFFS	0x468
#define DDRSS_CTL_283__SFR_OFFS	0x46c
#define DDRSS_CTL_284__SFR_OFFS	0x470
#define DDRSS_CTL_285__SFR_OFFS	0x474
#define DDRSS_CTL_286__SFR_OFFS	0x478
#define DDRSS_CTL_287__SFR_OFFS	0x47c
#define DDRSS_CTL_288__SFR_OFFS	0x480
#define DDRSS_CTL_289__SFR_OFFS	0x484
#define DDRSS_CTL_290__SFR_OFFS	0x488
#define DDRSS_CTL_291__SFR_OFFS	0x48c
#define DDRSS_CTL_292__SFR_OFFS	0x490
#define DDRSS_CTL_293__SFR_OFFS	0x494
#define DDRSS_CTL_294__SFR_OFFS	0x498
#define DDRSS_CTL_295__SFR_OFFS	0x49c
#define DDRSS_CTL_296__SFR_OFFS	0x4a0
#define DDRSS_CTL_297__SFR_OFFS	0x4a4
#define DDRSS_CTL_298__SFR_OFFS	0x4a8
#define DDRSS_CTL_299__SFR_OFFS	0x4ac
#define DDRSS_CTL_300__SFR_OFFS	0x4b0
#define DDRSS_CTL_301__SFR_OFFS	0x4b4
#define DDRSS_CTL_302__SFR_OFFS	0x4b8
#define DDRSS_CTL_303__SFR_OFFS	0x4bc
#define DDRSS_CTL_304__SFR_OFFS	0x4c0
#define DDRSS_CTL_305__SFR_OFFS	0x4c4
#define DDRSS_CTL_306__SFR_OFFS	0x4c8
#define DDRSS_CTL_307__SFR_OFFS	0x4cc
#define DDRSS_CTL_308__SFR_OFFS	0x4d0
#define DDRSS_CTL_309__SFR_OFFS	0x4d4
#define DDRSS_CTL_310__SFR_OFFS	0x4d8
#define DDRSS_CTL_311__SFR_OFFS	0x4dc
#define DDRSS_CTL_312__SFR_OFFS	0x4e0
#define DDRSS_CTL_313__SFR_OFFS	0x4e4
#define DDRSS_CTL_314__SFR_OFFS	0x4e8
#define DDRSS_CTL_315__SFR_OFFS	0x4ec
#define DDRSS_CTL_316__SFR_OFFS	0x4f0
#define DDRSS_CTL_317__SFR_OFFS	0x4f4
#define DDRSS_CTL_318__SFR_OFFS	0x4f8
#define DDRSS_CTL_319__SFR_OFFS	0x4fc
#define DDRSS_CTL_320__SFR_OFFS	0x500
#define DDRSS_CTL_321__SFR_OFFS	0x504
#define DDRSS_CTL_322__SFR_OFFS	0x508
#define DDRSS_CTL_323__SFR_OFFS	0x50c
#define DDRSS_CTL_324__SFR_OFFS	0x510
#define DDRSS_CTL_325__SFR_OFFS	0x514
#define DDRSS_CTL_326__SFR_OFFS	0x518
#define DDRSS_CTL_327__SFR_OFFS	0x51c
#define DDRSS_CTL_328__SFR_OFFS	0x520
#define DDRSS_CTL_329__SFR_OFFS	0x524
#define DDRSS_CTL_330__SFR_OFFS	0x528
#define DDRSS_CTL_331__SFR_OFFS	0x52c
#define DDRSS_CTL_332__SFR_OFFS	0x530
#define DDRSS_CTL_333__SFR_OFFS	0x534
#define DDRSS_CTL_334__SFR_OFFS	0x538
#define DDRSS_CTL_335__SFR_OFFS	0x53c
#define DDRSS_CTL_336__SFR_OFFS	0x540
#define DDRSS_CTL_337__SFR_OFFS	0x544
#define DDRSS_CTL_338__SFR_OFFS	0x548
#define DDRSS_CTL_339__SFR_OFFS	0x54c
#define DDRSS_CTL_340__SFR_OFFS	0x550
#define DDRSS_CTL_341__SFR_OFFS	0x554
#define DDRSS_CTL_342__SFR_OFFS	0x558
#define DDRSS_CTL_343__SFR_OFFS	0x55c
#define DDRSS_CTL_344__SFR_OFFS	0x560
#define DDRSS_CTL_345__SFR_OFFS	0x564
#define DDRSS_CTL_346__SFR_OFFS	0x568
#define DDRSS_CTL_347__SFR_OFFS	0x56c
#define DDRSS_CTL_348__SFR_OFFS	0x570
#define DDRSS_CTL_349__SFR_OFFS	0x574
#define DDRSS_CTL_350__SFR_OFFS	0x578
#define DDRSS_CTL_351__SFR_OFFS	0x57c
#define DDRSS_CTL_352__SFR_OFFS	0x580
#define DDRSS_CTL_353__SFR_OFFS	0x584
#define DDRSS_CTL_354__SFR_OFFS	0x588
#define DDRSS_CTL_355__SFR_OFFS	0x58c
#define DDRSS_CTL_356__SFR_OFFS	0x590
#define DDRSS_CTL_357__SFR_OFFS	0x594
#define DDRSS_CTL_358__SFR_OFFS	0x598
#define DDRSS_CTL_359__SFR_OFFS	0x59c
#define DDRSS_CTL_360__SFR_OFFS	0x5a0
#define DDRSS_CTL_361__SFR_OFFS	0x5a4
#define DDRSS_CTL_362__SFR_OFFS	0x5a8
#define DDRSS_CTL_363__SFR_OFFS	0x5ac
#define DDRSS_CTL_364__SFR_OFFS	0x5b0
#define DDRSS_CTL_365__SFR_OFFS	0x5b4
#define DDRSS_CTL_366__SFR_OFFS	0x5b8
#define DDRSS_CTL_367__SFR_OFFS	0x5bc
#define DDRSS_CTL_368__SFR_OFFS	0x5c0
#define DDRSS_CTL_369__SFR_OFFS	0x5c4
#define DDRSS_CTL_370__SFR_OFFS	0x5c8
#define DDRSS_CTL_371__SFR_OFFS	0x5cc
#define DDRSS_CTL_372__SFR_OFFS	0x5d0
#define DDRSS_CTL_373__SFR_OFFS	0x5d4
#define DDRSS_CTL_374__SFR_OFFS	0x5d8
#define DDRSS_CTL_375__SFR_OFFS	0x5dc
#define DDRSS_CTL_376__SFR_OFFS	0x5e0
#define DDRSS_CTL_377__SFR_OFFS	0x5e4
#define DDRSS_CTL_378__SFR_OFFS	0x5e8
#define DDRSS_CTL_379__SFR_OFFS	0x5ec
#define DDRSS_CTL_380__SFR_OFFS	0x5f0
#define DDRSS_CTL_381__SFR_OFFS	0x5f4
#define DDRSS_CTL_382__SFR_OFFS	0x5f8
#define DDRSS_CTL_383__SFR_OFFS	0x5fc
#define DDRSS_CTL_384__SFR_OFFS	0x600
#define DDRSS_CTL_385__SFR_OFFS	0x604
#define DDRSS_CTL_386__SFR_OFFS	0x608
#define DDRSS_CTL_387__SFR_OFFS	0x60c
#define DDRSS_CTL_388__SFR_OFFS	0x610
#define DDRSS_CTL_389__SFR_OFFS	0x614
#define DDRSS_CTL_390__SFR_OFFS	0x618
#define DDRSS_CTL_391__SFR_OFFS	0x61c
#define DDRSS_CTL_392__SFR_OFFS	0x620
#define DDRSS_CTL_393__SFR_OFFS	0x624
#define DDRSS_CTL_394__SFR_OFFS	0x628
#define DDRSS_CTL_395__SFR_OFFS	0x62c
#define DDRSS_CTL_396__SFR_OFFS	0x630
#define DDRSS_CTL_397__SFR_OFFS	0x634
#define DDRSS_CTL_398__SFR_OFFS	0x638
#define DDRSS_CTL_399__SFR_OFFS	0x63c
#define DDRSS_CTL_400__SFR_OFFS	0x640
#define DDRSS_CTL_401__SFR_OFFS	0x644
#define DDRSS_CTL_402__SFR_OFFS	0x648
#define DDRSS_CTL_403__SFR_OFFS	0x64c
#define DDRSS_CTL_404__SFR_OFFS	0x650
#define DDRSS_CTL_405__SFR_OFFS	0x654
#define DDRSS_CTL_406__SFR_OFFS	0x658
#define DDRSS_CTL_407__SFR_OFFS	0x65c
#define DDRSS_CTL_408__SFR_OFFS	0x660
#define DDRSS_CTL_409__SFR_OFFS	0x664
#define DDRSS_CTL_410__SFR_OFFS	0x668
#define DDRSS_CTL_411__SFR_OFFS	0x66c
#define DDRSS_CTL_412__SFR_OFFS	0x670
#define DDRSS_CTL_413__SFR_OFFS	0x674
#define DDRSS_CTL_414__SFR_OFFS	0x678
#define DDRSS_CTL_415__SFR_OFFS	0x67c
#define DDRSS_CTL_416__SFR_OFFS	0x680
#define DDRSS_CTL_417__SFR_OFFS	0x684
#define DDRSS_CTL_418__SFR_OFFS	0x688
#define DDRSS_CTL_419__SFR_OFFS	0x68c
#define DDRSS_CTL_420__SFR_OFFS	0x690
#define DDRSS_CTL_421__SFR_OFFS	0x694
#define DDRSS_CTL_422__SFR_OFFS	0x698
#define DDRSS_CTL_423__SFR_OFFS	0x69c
#define DDRSS_CTL_424__SFR_OFFS	0x6a0
#define DDRSS_CTL_425__SFR_OFFS	0x6a4
#define DDRSS_CTL_426__SFR_OFFS	0x6a8
#define DDRSS_CTL_427__SFR_OFFS	0x6ac
#define DDRSS_CTL_428__SFR_OFFS	0x6b0
#define DDRSS_CTL_429__SFR_OFFS	0x6b4
#define DDRSS_CTL_430__SFR_OFFS	0x6b8
#define DDRSS_CTL_431__SFR_OFFS	0x6bc
#define DDRSS_CTL_432__SFR_OFFS	0x6c0
#define DDRSS_CTL_433__SFR_OFFS	0x6c4
#define DDRSS_CTL_434__SFR_OFFS	0x6c8

/* Macros for register block PI */
#define DDRSS_PI_REGISTER_BLOCK__OFFS	0x2000

#define DDRSS_PI_0__SFR_OFFS	0x0
#define DDRSS_PI_1__SFR_OFFS	0x4
#define DDRSS_PI_2__SFR_OFFS	0x8
#define DDRSS_PI_3__SFR_OFFS	0xc
#define DDRSS_PI_4__SFR_OFFS	0x10
#define DDRSS_PI_5__SFR_OFFS	0x14
#define DDRSS_PI_6__SFR_OFFS	0x18
#define DDRSS_PI_7__SFR_OFFS	0x1c
#define DDRSS_PI_8__SFR_OFFS	0x20
#define DDRSS_PI_9__SFR_OFFS	0x24
#define DDRSS_PI_10__SFR_OFFS	0x28
#define DDRSS_PI_11__SFR_OFFS	0x2c
#define DDRSS_PI_12__SFR_OFFS	0x30
#define DDRSS_PI_13__SFR_OFFS	0x34
#define DDRSS_PI_14__SFR_OFFS	0x38
#define DDRSS_PI_15__SFR_OFFS	0x3c
#define DDRSS_PI_16__SFR_OFFS	0x40
#define DDRSS_PI_17__SFR_OFFS	0x44
#define DDRSS_PI_18__SFR_OFFS	0x48
#define DDRSS_PI_19__SFR_OFFS	0x4c
#define DDRSS_PI_20__SFR_OFFS	0x50
#define DDRSS_PI_21__SFR_OFFS	0x54
#define DDRSS_PI_22__SFR_OFFS	0x58
#define DDRSS_PI_23__SFR_OFFS	0x5c
#define DDRSS_PI_24__SFR_OFFS	0x60
#define DDRSS_PI_25__SFR_OFFS	0x64
#define DDRSS_PI_26__SFR_OFFS	0x68
#define DDRSS_PI_27__SFR_OFFS	0x6c
#define DDRSS_PI_28__SFR_OFFS	0x70
#define DDRSS_PI_29__SFR_OFFS	0x74
#define DDRSS_PI_30__SFR_OFFS	0x78
#define DDRSS_PI_31__SFR_OFFS	0x7c
#define DDRSS_PI_32__SFR_OFFS	0x80
#define DDRSS_PI_33__SFR_OFFS	0x84
#define DDRSS_PI_34__SFR_OFFS	0x88
#define DDRSS_PI_35__SFR_OFFS	0x8c
#define DDRSS_PI_36__SFR_OFFS	0x90
#define DDRSS_PI_37__SFR_OFFS	0x94
#define DDRSS_PI_38__SFR_OFFS	0x98
#define DDRSS_PI_39__SFR_OFFS	0x9c
#define DDRSS_PI_40__SFR_OFFS	0xa0
#define DDRSS_PI_41__SFR_OFFS	0xa4
#define DDRSS_PI_42__SFR_OFFS	0xa8
#define DDRSS_PI_43__SFR_OFFS	0xac
#define DDRSS_PI_44__SFR_OFFS	0xb0
#define DDRSS_PI_45__SFR_OFFS	0xb4
#define DDRSS_PI_46__SFR_OFFS	0xb8
#define DDRSS_PI_47__SFR_OFFS	0xbc
#define DDRSS_PI_48__SFR_OFFS	0xc0
#define DDRSS_PI_49__SFR_OFFS	0xc4
#define DDRSS_PI_50__SFR_OFFS	0xc8
#define DDRSS_PI_51__SFR_OFFS	0xcc
#define DDRSS_PI_52__SFR_OFFS	0xd0
#define DDRSS_PI_53__SFR_OFFS	0xd4
#define DDRSS_PI_54__SFR_OFFS	0xd8
#define DDRSS_PI_55__SFR_OFFS	0xdc
#define DDRSS_PI_56__SFR_OFFS	0xe0
#define DDRSS_PI_57__SFR_OFFS	0xe4
#define DDRSS_PI_58__SFR_OFFS	0xe8
#define DDRSS_PI_59__SFR_OFFS	0xec
#define DDRSS_PI_60__SFR_OFFS	0xf0
#define DDRSS_PI_61__SFR_OFFS	0xf4
#define DDRSS_PI_62__SFR_OFFS	0xf8
#define DDRSS_PI_63__SFR_OFFS	0xfc
#define DDRSS_PI_64__SFR_OFFS	0x100
#define DDRSS_PI_65__SFR_OFFS	0x104
#define DDRSS_PI_66__SFR_OFFS	0x108
#define DDRSS_PI_67__SFR_OFFS	0x10c
#define DDRSS_PI_68__SFR_OFFS	0x110
#define DDRSS_PI_69__SFR_OFFS	0x114
#define DDRSS_PI_70__SFR_OFFS	0x118
#define DDRSS_PI_71__SFR_OFFS	0x11c
#define DDRSS_PI_72__SFR_OFFS	0x120
#define DDRSS_PI_73__SFR_OFFS	0x124
#define DDRSS_PI_74__SFR_OFFS	0x128
#define DDRSS_PI_75__SFR_OFFS	0x12c
#define DDRSS_PI_76__SFR_OFFS	0x130
#define DDRSS_PI_77__SFR_OFFS	0x134
#define DDRSS_PI_78__SFR_OFFS	0x138
#define DDRSS_PI_79__SFR_OFFS	0x13c
#define DDRSS_PI_80__SFR_OFFS	0x140
#define DDRSS_PI_81__SFR_OFFS	0x144
#define DDRSS_PI_82__SFR_OFFS	0x148
#define DDRSS_PI_83__SFR_OFFS	0x14c
#define DDRSS_PI_84__SFR_OFFS	0x150
#define DDRSS_PI_85__SFR_OFFS	0x154
#define DDRSS_PI_86__SFR_OFFS	0x158
#define DDRSS_PI_87__SFR_OFFS	0x15c
#define DDRSS_PI_88__SFR_OFFS	0x160
#define DDRSS_PI_89__SFR_OFFS	0x164
#define DDRSS_PI_90__SFR_OFFS	0x168
#define DDRSS_PI_91__SFR_OFFS	0x16c
#define DDRSS_PI_92__SFR_OFFS	0x170
#define DDRSS_PI_93__SFR_OFFS	0x174
#define DDRSS_PI_94__SFR_OFFS	0x178
#define DDRSS_PI_95__SFR_OFFS	0x17c
#define DDRSS_PI_96__SFR_OFFS	0x180
#define DDRSS_PI_97__SFR_OFFS	0x184
#define DDRSS_PI_98__SFR_OFFS	0x188
#define DDRSS_PI_99__SFR_OFFS	0x18c
#define DDRSS_PI_100__SFR_OFFS	0x190
#define DDRSS_PI_101__SFR_OFFS	0x194
#define DDRSS_PI_102__SFR_OFFS	0x198
#define DDRSS_PI_103__SFR_OFFS	0x19c
#define DDRSS_PI_104__SFR_OFFS	0x1a0
#define DDRSS_PI_105__SFR_OFFS	0x1a4
#define DDRSS_PI_106__SFR_OFFS	0x1a8
#define DDRSS_PI_107__SFR_OFFS	0x1ac
#define DDRSS_PI_108__SFR_OFFS	0x1b0
#define DDRSS_PI_109__SFR_OFFS	0x1b4
#define DDRSS_PI_110__SFR_OFFS	0x1b8
#define DDRSS_PI_111__SFR_OFFS	0x1bc
#define DDRSS_PI_112__SFR_OFFS	0x1c0
#define DDRSS_PI_113__SFR_OFFS	0x1c4
#define DDRSS_PI_114__SFR_OFFS	0x1c8
#define DDRSS_PI_115__SFR_OFFS	0x1cc
#define DDRSS_PI_116__SFR_OFFS	0x1d0
#define DDRSS_PI_117__SFR_OFFS	0x1d4
#define DDRSS_PI_118__SFR_OFFS	0x1d8
#define DDRSS_PI_119__SFR_OFFS	0x1dc
#define DDRSS_PI_120__SFR_OFFS	0x1e0
#define DDRSS_PI_121__SFR_OFFS	0x1e4
#define DDRSS_PI_122__SFR_OFFS	0x1e8
#define DDRSS_PI_123__SFR_OFFS	0x1ec
#define DDRSS_PI_124__SFR_OFFS	0x1f0
#define DDRSS_PI_125__SFR_OFFS	0x1f4
#define DDRSS_PI_126__SFR_OFFS	0x1f8
#define DDRSS_PI_127__SFR_OFFS	0x1fc
#define DDRSS_PI_128__SFR_OFFS	0x200
#define DDRSS_PI_129__SFR_OFFS	0x204
#define DDRSS_PI_130__SFR_OFFS	0x208
#define DDRSS_PI_131__SFR_OFFS	0x20c
#define DDRSS_PI_132__SFR_OFFS	0x210
#define DDRSS_PI_133__SFR_OFFS	0x214
#define DDRSS_PI_134__SFR_OFFS	0x218
#define DDRSS_PI_135__SFR_OFFS	0x21c
#define DDRSS_PI_136__SFR_OFFS	0x220
#define DDRSS_PI_137__SFR_OFFS	0x224
#define DDRSS_PI_138__SFR_OFFS	0x228
#define DDRSS_PI_139__SFR_OFFS	0x22c
#define DDRSS_PI_140__SFR_OFFS	0x230
#define DDRSS_PI_141__SFR_OFFS	0x234
#define DDRSS_PI_142__SFR_OFFS	0x238
#define DDRSS_PI_143__SFR_OFFS	0x23c
#define DDRSS_PI_144__SFR_OFFS	0x240
#define DDRSS_PI_145__SFR_OFFS	0x244
#define DDRSS_PI_146__SFR_OFFS	0x248
#define DDRSS_PI_147__SFR_OFFS	0x24c
#define DDRSS_PI_148__SFR_OFFS	0x250
#define DDRSS_PI_149__SFR_OFFS	0x254
#define DDRSS_PI_150__SFR_OFFS	0x258
#define DDRSS_PI_151__SFR_OFFS	0x25c
#define DDRSS_PI_152__SFR_OFFS	0x260
#define DDRSS_PI_153__SFR_OFFS	0x264
#define DDRSS_PI_154__SFR_OFFS	0x268
#define DDRSS_PI_155__SFR_OFFS	0x26c
#define DDRSS_PI_156__SFR_OFFS	0x270
#define DDRSS_PI_157__SFR_OFFS	0x274
#define DDRSS_PI_158__SFR_OFFS	0x278
#define DDRSS_PI_159__SFR_OFFS	0x27c
#define DDRSS_PI_160__SFR_OFFS	0x280
#define DDRSS_PI_161__SFR_OFFS	0x284
#define DDRSS_PI_162__SFR_OFFS	0x288
#define DDRSS_PI_163__SFR_OFFS	0x28c
#define DDRSS_PI_164__SFR_OFFS	0x290
#define DDRSS_PI_165__SFR_OFFS	0x294
#define DDRSS_PI_166__SFR_OFFS	0x298
#define DDRSS_PI_167__SFR_OFFS	0x29c
#define DDRSS_PI_168__SFR_OFFS	0x2a0
#define DDRSS_PI_169__SFR_OFFS	0x2a4
#define DDRSS_PI_170__SFR_OFFS	0x2a8
#define DDRSS_PI_171__SFR_OFFS	0x2ac
#define DDRSS_PI_172__SFR_OFFS	0x2b0
#define DDRSS_PI_173__SFR_OFFS	0x2b4
#define DDRSS_PI_174__SFR_OFFS	0x2b8
#define DDRSS_PI_175__SFR_OFFS	0x2bc
#define DDRSS_PI_176__SFR_OFFS	0x2c0
#define DDRSS_PI_177__SFR_OFFS	0x2c4
#define DDRSS_PI_178__SFR_OFFS	0x2c8
#define DDRSS_PI_179__SFR_OFFS	0x2cc
#define DDRSS_PI_180__SFR_OFFS	0x2d0
#define DDRSS_PI_181__SFR_OFFS	0x2d4
#define DDRSS_PI_182__SFR_OFFS	0x2d8
#define DDRSS_PI_183__SFR_OFFS	0x2dc
#define DDRSS_PI_184__SFR_OFFS	0x2e0
#define DDRSS_PI_185__SFR_OFFS	0x2e4
#define DDRSS_PI_186__SFR_OFFS	0x2e8
#define DDRSS_PI_187__SFR_OFFS	0x2ec
#define DDRSS_PI_188__SFR_OFFS	0x2f0
#define DDRSS_PI_189__SFR_OFFS	0x2f4
#define DDRSS_PI_190__SFR_OFFS	0x2f8
#define DDRSS_PI_191__SFR_OFFS	0x2fc
#define DDRSS_PI_192__SFR_OFFS	0x300
#define DDRSS_PI_193__SFR_OFFS	0x304
#define DDRSS_PI_194__SFR_OFFS	0x308
#define DDRSS_PI_195__SFR_OFFS	0x30c
#define DDRSS_PI_196__SFR_OFFS	0x310
#define DDRSS_PI_197__SFR_OFFS	0x314
#define DDRSS_PI_198__SFR_OFFS	0x318
#define DDRSS_PI_199__SFR_OFFS	0x31c
#define DDRSS_PI_200__SFR_OFFS	0x320
#define DDRSS_PI_201__SFR_OFFS	0x324
#define DDRSS_PI_202__SFR_OFFS	0x328
#define DDRSS_PI_203__SFR_OFFS	0x32c
#define DDRSS_PI_204__SFR_OFFS	0x330
#define DDRSS_PI_205__SFR_OFFS	0x334
#define DDRSS_PI_206__SFR_OFFS	0x338
#define DDRSS_PI_207__SFR_OFFS	0x33c
#define DDRSS_PI_208__SFR_OFFS	0x340
#define DDRSS_PI_209__SFR_OFFS	0x344
#define DDRSS_PI_210__SFR_OFFS	0x348
#define DDRSS_PI_211__SFR_OFFS	0x34c
#define DDRSS_PI_212__SFR_OFFS	0x350
#define DDRSS_PI_213__SFR_OFFS	0x354
#define DDRSS_PI_214__SFR_OFFS	0x358
#define DDRSS_PI_215__SFR_OFFS	0x35c
#define DDRSS_PI_216__SFR_OFFS	0x360
#define DDRSS_PI_217__SFR_OFFS	0x364
#define DDRSS_PI_218__SFR_OFFS	0x368
#define DDRSS_PI_219__SFR_OFFS	0x36c
#define DDRSS_PI_220__SFR_OFFS	0x370
#define DDRSS_PI_221__SFR_OFFS	0x374
#define DDRSS_PI_222__SFR_OFFS	0x378
#define DDRSS_PI_223__SFR_OFFS	0x37c
#define DDRSS_PI_224__SFR_OFFS	0x380
#define DDRSS_PI_225__SFR_OFFS	0x384
#define DDRSS_PI_226__SFR_OFFS	0x388
#define DDRSS_PI_227__SFR_OFFS	0x38c
#define DDRSS_PI_228__SFR_OFFS	0x390
#define DDRSS_PI_229__SFR_OFFS	0x394
#define DDRSS_PI_230__SFR_OFFS	0x398
#define DDRSS_PI_231__SFR_OFFS	0x39c
#define DDRSS_PI_232__SFR_OFFS	0x3a0
#define DDRSS_PI_233__SFR_OFFS	0x3a4
#define DDRSS_PI_234__SFR_OFFS	0x3a8
#define DDRSS_PI_235__SFR_OFFS	0x3ac
#define DDRSS_PI_236__SFR_OFFS	0x3b0
#define DDRSS_PI_237__SFR_OFFS	0x3b4
#define DDRSS_PI_238__SFR_OFFS	0x3b8
#define DDRSS_PI_239__SFR_OFFS	0x3bc
#define DDRSS_PI_240__SFR_OFFS	0x3c0
#define DDRSS_PI_241__SFR_OFFS	0x3c4
#define DDRSS_PI_242__SFR_OFFS	0x3c8
#define DDRSS_PI_243__SFR_OFFS	0x3cc
#define DDRSS_PI_244__SFR_OFFS	0x3d0
#define DDRSS_PI_245__SFR_OFFS	0x3d4
#define DDRSS_PI_246__SFR_OFFS	0x3d8
#define DDRSS_PI_247__SFR_OFFS	0x3dc
#define DDRSS_PI_248__SFR_OFFS	0x3e0
#define DDRSS_PI_249__SFR_OFFS	0x3e4
#define DDRSS_PI_250__SFR_OFFS	0x3e8
#define DDRSS_PI_251__SFR_OFFS	0x3ec
#define DDRSS_PI_252__SFR_OFFS	0x3f0
#define DDRSS_PI_253__SFR_OFFS	0x3f4
#define DDRSS_PI_254__SFR_OFFS	0x3f8
#define DDRSS_PI_255__SFR_OFFS	0x3fc
#define DDRSS_PI_256__SFR_OFFS	0x400
#define DDRSS_PI_257__SFR_OFFS	0x404
#define DDRSS_PI_258__SFR_OFFS	0x408
#define DDRSS_PI_259__SFR_OFFS	0x40c
#define DDRSS_PI_260__SFR_OFFS	0x410
#define DDRSS_PI_261__SFR_OFFS	0x414
#define DDRSS_PI_262__SFR_OFFS	0x418
#define DDRSS_PI_263__SFR_OFFS	0x41c
#define DDRSS_PI_264__SFR_OFFS	0x420
#define DDRSS_PI_265__SFR_OFFS	0x424
#define DDRSS_PI_266__SFR_OFFS	0x428
#define DDRSS_PI_267__SFR_OFFS	0x42c
#define DDRSS_PI_268__SFR_OFFS	0x430
#define DDRSS_PI_269__SFR_OFFS	0x434
#define DDRSS_PI_270__SFR_OFFS	0x438
#define DDRSS_PI_271__SFR_OFFS	0x43c
#define DDRSS_PI_272__SFR_OFFS	0x440
#define DDRSS_PI_273__SFR_OFFS	0x444
#define DDRSS_PI_274__SFR_OFFS	0x448
#define DDRSS_PI_275__SFR_OFFS	0x44c
#define DDRSS_PI_276__SFR_OFFS	0x450
#define DDRSS_PI_277__SFR_OFFS	0x454
#define DDRSS_PI_278__SFR_OFFS	0x458
#define DDRSS_PI_279__SFR_OFFS	0x45c
#define DDRSS_PI_280__SFR_OFFS	0x460
#define DDRSS_PI_281__SFR_OFFS	0x464
#define DDRSS_PI_282__SFR_OFFS	0x468
#define DDRSS_PI_283__SFR_OFFS	0x46c
#define DDRSS_PI_284__SFR_OFFS	0x470
#define DDRSS_PI_285__SFR_OFFS	0x474
#define DDRSS_PI_286__SFR_OFFS	0x478
#define DDRSS_PI_287__SFR_OFFS	0x47c
#define DDRSS_PI_288__SFR_OFFS	0x480
#define DDRSS_PI_289__SFR_OFFS	0x484
#define DDRSS_PI_290__SFR_OFFS	0x488
#define DDRSS_PI_291__SFR_OFFS	0x48c
#define DDRSS_PI_292__SFR_OFFS	0x490
#define DDRSS_PI_293__SFR_OFFS	0x494
#define DDRSS_PI_294__SFR_OFFS	0x498
#define DDRSS_PI_295__SFR_OFFS	0x49c
#define DDRSS_PI_296__SFR_OFFS	0x4a0
#define DDRSS_PI_297__SFR_OFFS	0x4a4
#define DDRSS_PI_298__SFR_OFFS	0x4a8
#define DDRSS_PI_299__SFR_OFFS	0x4ac
#define DDRSS_PI_300__SFR_OFFS	0x4b0
#define DDRSS_PI_301__SFR_OFFS	0x4b4
#define DDRSS_PI_302__SFR_OFFS	0x4b8
#define DDRSS_PI_303__SFR_OFFS	0x4bc
#define DDRSS_PI_304__SFR_OFFS	0x4c0
#define DDRSS_PI_305__SFR_OFFS	0x4c4
#define DDRSS_PI_306__SFR_OFFS	0x4c8
#define DDRSS_PI_307__SFR_OFFS	0x4cc
#define DDRSS_PI_308__SFR_OFFS	0x4d0
#define DDRSS_PI_309__SFR_OFFS	0x4d4
#define DDRSS_PI_310__SFR_OFFS	0x4d8
#define DDRSS_PI_311__SFR_OFFS	0x4dc
#define DDRSS_PI_312__SFR_OFFS	0x4e0
#define DDRSS_PI_313__SFR_OFFS	0x4e4
#define DDRSS_PI_314__SFR_OFFS	0x4e8
#define DDRSS_PI_315__SFR_OFFS	0x4ec
#define DDRSS_PI_316__SFR_OFFS	0x4f0
#define DDRSS_PI_317__SFR_OFFS	0x4f4
#define DDRSS_PI_318__SFR_OFFS	0x4f8
#define DDRSS_PI_319__SFR_OFFS	0x4fc
#define DDRSS_PI_320__SFR_OFFS	0x500
#define DDRSS_PI_321__SFR_OFFS	0x504
#define DDRSS_PI_322__SFR_OFFS	0x508
#define DDRSS_PI_323__SFR_OFFS	0x50c
#define DDRSS_PI_324__SFR_OFFS	0x510
#define DDRSS_PI_325__SFR_OFFS	0x514
#define DDRSS_PI_326__SFR_OFFS	0x518
#define DDRSS_PI_327__SFR_OFFS	0x51c
#define DDRSS_PI_328__SFR_OFFS	0x520
#define DDRSS_PI_329__SFR_OFFS	0x524
#define DDRSS_PI_330__SFR_OFFS	0x528
#define DDRSS_PI_331__SFR_OFFS	0x52c
#define DDRSS_PI_332__SFR_OFFS	0x530
#define DDRSS_PI_333__SFR_OFFS	0x534
#define DDRSS_PI_334__SFR_OFFS	0x538
#define DDRSS_PI_335__SFR_OFFS	0x53c
#define DDRSS_PI_336__SFR_OFFS	0x540
#define DDRSS_PI_337__SFR_OFFS	0x544
#define DDRSS_PI_338__SFR_OFFS	0x548
#define DDRSS_PI_339__SFR_OFFS	0x54c
#define DDRSS_PI_340__SFR_OFFS	0x550
#define DDRSS_PI_341__SFR_OFFS	0x554
#define DDRSS_PI_342__SFR_OFFS	0x558
#define DDRSS_PI_343__SFR_OFFS	0x55c
#define DDRSS_PI_344__SFR_OFFS	0x560
#define DDRSS_PI_345__SFR_OFFS	0x564
#define DDRSS_PI_346__SFR_OFFS	0x568
#define DDRSS_PI_347__SFR_OFFS	0x56c
#define DDRSS_PI_348__SFR_OFFS	0x570
#define DDRSS_PI_349__SFR_OFFS	0x574
#define DDRSS_PI_350__SFR_OFFS	0x578
#define DDRSS_PI_351__SFR_OFFS	0x57c
#define DDRSS_PI_352__SFR_OFFS	0x580
#define DDRSS_PI_353__SFR_OFFS	0x584
#define DDRSS_PI_354__SFR_OFFS	0x588
#define DDRSS_PI_355__SFR_OFFS	0x58c
#define DDRSS_PI_356__SFR_OFFS	0x590
#define DDRSS_PI_357__SFR_OFFS	0x594
#define DDRSS_PI_358__SFR_OFFS	0x598
#define DDRSS_PI_359__SFR_OFFS	0x59c
#define DDRSS_PI_360__SFR_OFFS	0x5a0
#define DDRSS_PI_361__SFR_OFFS	0x5a4
#define DDRSS_PI_362__SFR_OFFS	0x5a8
#define DDRSS_PI_363__SFR_OFFS	0x5ac
#define DDRSS_PI_364__SFR_OFFS	0x5b0
#define DDRSS_PI_365__SFR_OFFS	0x5b4
#define DDRSS_PI_366__SFR_OFFS	0x5b8
#define DDRSS_PI_367__SFR_OFFS	0x5bc
#define DDRSS_PI_368__SFR_OFFS	0x5c0
#define DDRSS_PI_369__SFR_OFFS	0x5c4
#define DDRSS_PI_370__SFR_OFFS	0x5c8
#define DDRSS_PI_371__SFR_OFFS	0x5cc
#define DDRSS_PI_372__SFR_OFFS	0x5d0
#define DDRSS_PI_373__SFR_OFFS	0x5d4
#define DDRSS_PI_374__SFR_OFFS	0x5d8
#define DDRSS_PI_375__SFR_OFFS	0x5dc
#define DDRSS_PI_376__SFR_OFFS	0x5e0
#define DDRSS_PI_377__SFR_OFFS	0x5e4
#define DDRSS_PI_378__SFR_OFFS	0x5e8
#define DDRSS_PI_379__SFR_OFFS	0x5ec
#define DDRSS_PI_380__SFR_OFFS	0x5f0
#define DDRSS_PI_381__SFR_OFFS	0x5f4
#define DDRSS_PI_382__SFR_OFFS	0x5f8
#define DDRSS_PI_383__SFR_OFFS	0x5fc
#define DDRSS_PI_384__SFR_OFFS	0x600
#define DDRSS_PI_385__SFR_OFFS	0x604
#define DDRSS_PI_386__SFR_OFFS	0x608
#define DDRSS_PI_387__SFR_OFFS	0x60c
#define DDRSS_PI_388__SFR_OFFS	0x610
#define DDRSS_PI_389__SFR_OFFS	0x614
#define DDRSS_PI_390__SFR_OFFS	0x618
#define DDRSS_PI_391__SFR_OFFS	0x61c
#define DDRSS_PI_392__SFR_OFFS	0x620
#define DDRSS_PI_393__SFR_OFFS	0x624
#define DDRSS_PI_394__SFR_OFFS	0x628
#define DDRSS_PI_395__SFR_OFFS	0x62c
#define DDRSS_PI_396__SFR_OFFS	0x630
#define DDRSS_PI_397__SFR_OFFS	0x634
#define DDRSS_PI_398__SFR_OFFS	0x638
#define DDRSS_PI_399__SFR_OFFS	0x63c
#define DDRSS_PI_400__SFR_OFFS	0x640
#define DDRSS_PI_401__SFR_OFFS	0x644
#define DDRSS_PI_402__SFR_OFFS	0x648
#define DDRSS_PI_403__SFR_OFFS	0x64c
#define DDRSS_PI_404__SFR_OFFS	0x650
#define DDRSS_PI_405__SFR_OFFS	0x654
#define DDRSS_PI_406__SFR_OFFS	0x658
#define DDRSS_PI_407__SFR_OFFS	0x65c
#define DDRSS_PI_408__SFR_OFFS	0x660
#define DDRSS_PI_409__SFR_OFFS	0x664
#define DDRSS_PI_410__SFR_OFFS	0x668
#define DDRSS_PI_411__SFR_OFFS	0x66c
#define DDRSS_PI_412__SFR_OFFS	0x670
#define DDRSS_PI_413__SFR_OFFS	0x674
#define DDRSS_PI_414__SFR_OFFS	0x678
#define DDRSS_PI_415__SFR_OFFS	0x67c
#define DDRSS_PI_416__SFR_OFFS	0x680
#define DDRSS_PI_417__SFR_OFFS	0x684
#define DDRSS_PI_418__SFR_OFFS	0x688
#define DDRSS_PI_419__SFR_OFFS	0x68c
#define DDRSS_PI_420__SFR_OFFS	0x690
#define DDRSS_PI_421__SFR_OFFS	0x694
#define DDRSS_PI_422__SFR_OFFS	0x698
#define DDRSS_PI_423__SFR_OFFS	0x69c

/* Macros for register block Data_Slice_0 */
#define DDRSS_Data_Slice_0_REGISTER_BLOCK__OFFS	0x4000

#define DDRSS_PHY_0__SFR_OFFS	0x0
#define DDRSS_PHY_1__SFR_OFFS	0x4
#define DDRSS_PHY_2__SFR_OFFS	0x8
#define DDRSS_PHY_3__SFR_OFFS	0xc
#define DDRSS_PHY_4__SFR_OFFS	0x10
#define DDRSS_PHY_5__SFR_OFFS	0x14
#define DDRSS_PHY_6__SFR_OFFS	0x18
#define DDRSS_PHY_7__SFR_OFFS	0x1c
#define DDRSS_PHY_8__SFR_OFFS	0x20
#define DDRSS_PHY_9__SFR_OFFS	0x24
#define DDRSS_PHY_10__SFR_OFFS	0x28
#define DDRSS_PHY_11__SFR_OFFS	0x2c
#define DDRSS_PHY_12__SFR_OFFS	0x30
#define DDRSS_PHY_13__SFR_OFFS	0x34
#define DDRSS_PHY_14__SFR_OFFS	0x38
#define DDRSS_PHY_15__SFR_OFFS	0x3c
#define DDRSS_PHY_16__SFR_OFFS	0x40
#define DDRSS_PHY_17__SFR_OFFS	0x44
#define DDRSS_PHY_18__SFR_OFFS	0x48
#define DDRSS_PHY_19__SFR_OFFS	0x4c
#define DDRSS_PHY_20__SFR_OFFS	0x50
#define DDRSS_PHY_21__SFR_OFFS	0x54
#define DDRSS_PHY_22__SFR_OFFS	0x58
#define DDRSS_PHY_23__SFR_OFFS	0x5c
#define DDRSS_PHY_24__SFR_OFFS	0x60
#define DDRSS_PHY_25__SFR_OFFS	0x64
#define DDRSS_PHY_26__SFR_OFFS	0x68
#define DDRSS_PHY_27__SFR_OFFS	0x6c
#define DDRSS_PHY_28__SFR_OFFS	0x70
#define DDRSS_PHY_29__SFR_OFFS	0x74
#define DDRSS_PHY_30__SFR_OFFS	0x78
#define DDRSS_PHY_31__SFR_OFFS	0x7c
#define DDRSS_PHY_32__SFR_OFFS	0x80
#define DDRSS_PHY_33__SFR_OFFS	0x84
#define DDRSS_PHY_34__SFR_OFFS	0x88
#define DDRSS_PHY_35__SFR_OFFS	0x8c
#define DDRSS_PHY_36__SFR_OFFS	0x90
#define DDRSS_PHY_37__SFR_OFFS	0x94
#define DDRSS_PHY_38__SFR_OFFS	0x98
#define DDRSS_PHY_39__SFR_OFFS	0x9c
#define DDRSS_PHY_40__SFR_OFFS	0xa0
#define DDRSS_PHY_41__SFR_OFFS	0xa4
#define DDRSS_PHY_42__SFR_OFFS	0xa8
#define DDRSS_PHY_43__SFR_OFFS	0xac
#define DDRSS_PHY_44__SFR_OFFS	0xb0
#define DDRSS_PHY_45__SFR_OFFS	0xb4
#define DDRSS_PHY_46__SFR_OFFS	0xb8
#define DDRSS_PHY_47__SFR_OFFS	0xbc
#define DDRSS_PHY_48__SFR_OFFS	0xc0
#define DDRSS_PHY_49__SFR_OFFS	0xc4
#define DDRSS_PHY_50__SFR_OFFS	0xc8
#define DDRSS_PHY_51__SFR_OFFS	0xcc
#define DDRSS_PHY_52__SFR_OFFS	0xd0
#define DDRSS_PHY_53__SFR_OFFS	0xd4
#define DDRSS_PHY_54__SFR_OFFS	0xd8
#define DDRSS_PHY_55__SFR_OFFS	0xdc
#define DDRSS_PHY_56__SFR_OFFS	0xe0
#define DDRSS_PHY_57__SFR_OFFS	0xe4
#define DDRSS_PHY_58__SFR_OFFS	0xe8
#define DDRSS_PHY_59__SFR_OFFS	0xec
#define DDRSS_PHY_60__SFR_OFFS	0xf0
#define DDRSS_PHY_61__SFR_OFFS	0xf4
#define DDRSS_PHY_62__SFR_OFFS	0xf8
#define DDRSS_PHY_63__SFR_OFFS	0xfc
#define DDRSS_PHY_64__SFR_OFFS	0x100
#define DDRSS_PHY_65__SFR_OFFS	0x104
#define DDRSS_PHY_66__SFR_OFFS	0x108
#define DDRSS_PHY_67__SFR_OFFS	0x10c
#define DDRSS_PHY_68__SFR_OFFS	0x110
#define DDRSS_PHY_69__SFR_OFFS	0x114
#define DDRSS_PHY_70__SFR_OFFS	0x118
#define DDRSS_PHY_71__SFR_OFFS	0x11c
#define DDRSS_PHY_72__SFR_OFFS	0x120
#define DDRSS_PHY_73__SFR_OFFS	0x124
#define DDRSS_PHY_74__SFR_OFFS	0x128
#define DDRSS_PHY_75__SFR_OFFS	0x12c
#define DDRSS_PHY_76__SFR_OFFS	0x130
#define DDRSS_PHY_77__SFR_OFFS	0x134
#define DDRSS_PHY_78__SFR_OFFS	0x138
#define DDRSS_PHY_79__SFR_OFFS	0x13c
#define DDRSS_PHY_80__SFR_OFFS	0x140
#define DDRSS_PHY_81__SFR_OFFS	0x144
#define DDRSS_PHY_82__SFR_OFFS	0x148
#define DDRSS_PHY_83__SFR_OFFS	0x14c
#define DDRSS_PHY_84__SFR_OFFS	0x150
#define DDRSS_PHY_85__SFR_OFFS	0x154
#define DDRSS_PHY_86__SFR_OFFS	0x158
#define DDRSS_PHY_87__SFR_OFFS	0x15c
#define DDRSS_PHY_88__SFR_OFFS	0x160
#define DDRSS_PHY_89__SFR_OFFS	0x164
#define DDRSS_PHY_90__SFR_OFFS	0x168
#define DDRSS_PHY_91__SFR_OFFS	0x16c
#define DDRSS_PHY_92__SFR_OFFS	0x170
#define DDRSS_PHY_93__SFR_OFFS	0x174
#define DDRSS_PHY_94__SFR_OFFS	0x178
#define DDRSS_PHY_95__SFR_OFFS	0x17c
#define DDRSS_PHY_96__SFR_OFFS	0x180
#define DDRSS_PHY_97__SFR_OFFS	0x184
#define DDRSS_PHY_98__SFR_OFFS	0x188
#define DDRSS_PHY_99__SFR_OFFS	0x18c
#define DDRSS_PHY_100__SFR_OFFS	0x190
#define DDRSS_PHY_101__SFR_OFFS	0x194
#define DDRSS_PHY_102__SFR_OFFS	0x198
#define DDRSS_PHY_103__SFR_OFFS	0x19c
#define DDRSS_PHY_104__SFR_OFFS	0x1a0
#define DDRSS_PHY_105__SFR_OFFS	0x1a4
#define DDRSS_PHY_106__SFR_OFFS	0x1a8
#define DDRSS_PHY_107__SFR_OFFS	0x1ac
#define DDRSS_PHY_108__SFR_OFFS	0x1b0
#define DDRSS_PHY_109__SFR_OFFS	0x1b4
#define DDRSS_PHY_110__SFR_OFFS	0x1b8
#define DDRSS_PHY_111__SFR_OFFS	0x1bc
#define DDRSS_PHY_112__SFR_OFFS	0x1c0
#define DDRSS_PHY_113__SFR_OFFS	0x1c4
#define DDRSS_PHY_114__SFR_OFFS	0x1c8
#define DDRSS_PHY_115__SFR_OFFS	0x1cc
#define DDRSS_PHY_116__SFR_OFFS	0x1d0
#define DDRSS_PHY_117__SFR_OFFS	0x1d4
#define DDRSS_PHY_118__SFR_OFFS	0x1d8
#define DDRSS_PHY_119__SFR_OFFS	0x1dc
#define DDRSS_PHY_120__SFR_OFFS	0x1e0
#define DDRSS_PHY_121__SFR_OFFS	0x1e4
#define DDRSS_PHY_122__SFR_OFFS	0x1e8
#define DDRSS_PHY_123__SFR_OFFS	0x1ec
#define DDRSS_PHY_124__SFR_OFFS	0x1f0
#define DDRSS_PHY_125__SFR_OFFS	0x1f4
#define DDRSS_PHY_126__SFR_OFFS	0x1f8
#define DDRSS_PHY_127__SFR_OFFS	0x1fc
#define DDRSS_PHY_128__SFR_OFFS	0x200
#define DDRSS_PHY_129__SFR_OFFS	0x204
#define DDRSS_PHY_130__SFR_OFFS	0x208
#define DDRSS_PHY_131__SFR_OFFS	0x20c
#define DDRSS_PHY_132__SFR_OFFS	0x210
#define DDRSS_PHY_133__SFR_OFFS	0x214
#define DDRSS_PHY_134__SFR_OFFS	0x218
#define DDRSS_PHY_135__SFR_OFFS	0x21c
#define DDRSS_PHY_136__SFR_OFFS	0x220

/* Macros for register block Data_Slice_1 */
#define DDRSS_Data_Slice_1_REGISTER_BLOCK__OFFS	0x4400

#define DDRSS_PHY_256__SFR_OFFS	0x0
#define DDRSS_PHY_257__SFR_OFFS	0x4
#define DDRSS_PHY_258__SFR_OFFS	0x8
#define DDRSS_PHY_259__SFR_OFFS	0xc
#define DDRSS_PHY_260__SFR_OFFS	0x10
#define DDRSS_PHY_261__SFR_OFFS	0x14
#define DDRSS_PHY_262__SFR_OFFS	0x18
#define DDRSS_PHY_263__SFR_OFFS	0x1c
#define DDRSS_PHY_264__SFR_OFFS	0x20
#define DDRSS_PHY_265__SFR_OFFS	0x24
#define DDRSS_PHY_266__SFR_OFFS	0x28
#define DDRSS_PHY_267__SFR_OFFS	0x2c
#define DDRSS_PHY_268__SFR_OFFS	0x30
#define DDRSS_PHY_269__SFR_OFFS	0x34
#define DDRSS_PHY_270__SFR_OFFS	0x38
#define DDRSS_PHY_271__SFR_OFFS	0x3c
#define DDRSS_PHY_272__SFR_OFFS	0x40
#define DDRSS_PHY_273__SFR_OFFS	0x44
#define DDRSS_PHY_274__SFR_OFFS	0x48
#define DDRSS_PHY_275__SFR_OFFS	0x4c
#define DDRSS_PHY_276__SFR_OFFS	0x50
#define DDRSS_PHY_277__SFR_OFFS	0x54
#define DDRSS_PHY_278__SFR_OFFS	0x58
#define DDRSS_PHY_279__SFR_OFFS	0x5c
#define DDRSS_PHY_280__SFR_OFFS	0x60
#define DDRSS_PHY_281__SFR_OFFS	0x64
#define DDRSS_PHY_282__SFR_OFFS	0x68
#define DDRSS_PHY_283__SFR_OFFS	0x6c
#define DDRSS_PHY_284__SFR_OFFS	0x70
#define DDRSS_PHY_285__SFR_OFFS	0x74
#define DDRSS_PHY_286__SFR_OFFS	0x78
#define DDRSS_PHY_287__SFR_OFFS	0x7c
#define DDRSS_PHY_288__SFR_OFFS	0x80
#define DDRSS_PHY_289__SFR_OFFS	0x84
#define DDRSS_PHY_290__SFR_OFFS	0x88
#define DDRSS_PHY_291__SFR_OFFS	0x8c
#define DDRSS_PHY_292__SFR_OFFS	0x90
#define DDRSS_PHY_293__SFR_OFFS	0x94
#define DDRSS_PHY_294__SFR_OFFS	0x98
#define DDRSS_PHY_295__SFR_OFFS	0x9c
#define DDRSS_PHY_296__SFR_OFFS	0xa0
#define DDRSS_PHY_297__SFR_OFFS	0xa4
#define DDRSS_PHY_298__SFR_OFFS	0xa8
#define DDRSS_PHY_299__SFR_OFFS	0xac
#define DDRSS_PHY_300__SFR_OFFS	0xb0
#define DDRSS_PHY_301__SFR_OFFS	0xb4
#define DDRSS_PHY_302__SFR_OFFS	0xb8
#define DDRSS_PHY_303__SFR_OFFS	0xbc
#define DDRSS_PHY_304__SFR_OFFS	0xc0
#define DDRSS_PHY_305__SFR_OFFS	0xc4
#define DDRSS_PHY_306__SFR_OFFS	0xc8
#define DDRSS_PHY_307__SFR_OFFS	0xcc
#define DDRSS_PHY_308__SFR_OFFS	0xd0
#define DDRSS_PHY_309__SFR_OFFS	0xd4
#define DDRSS_PHY_310__SFR_OFFS	0xd8
#define DDRSS_PHY_311__SFR_OFFS	0xdc
#define DDRSS_PHY_312__SFR_OFFS	0xe0
#define DDRSS_PHY_313__SFR_OFFS	0xe4
#define DDRSS_PHY_314__SFR_OFFS	0xe8
#define DDRSS_PHY_315__SFR_OFFS	0xec
#define DDRSS_PHY_316__SFR_OFFS	0xf0
#define DDRSS_PHY_317__SFR_OFFS	0xf4
#define DDRSS_PHY_318__SFR_OFFS	0xf8
#define DDRSS_PHY_319__SFR_OFFS	0xfc
#define DDRSS_PHY_320__SFR_OFFS	0x100
#define DDRSS_PHY_321__SFR_OFFS	0x104
#define DDRSS_PHY_322__SFR_OFFS	0x108
#define DDRSS_PHY_323__SFR_OFFS	0x10c
#define DDRSS_PHY_324__SFR_OFFS	0x110
#define DDRSS_PHY_325__SFR_OFFS	0x114
#define DDRSS_PHY_326__SFR_OFFS	0x118
#define DDRSS_PHY_327__SFR_OFFS	0x11c
#define DDRSS_PHY_328__SFR_OFFS	0x120
#define DDRSS_PHY_329__SFR_OFFS	0x124
#define DDRSS_PHY_330__SFR_OFFS	0x128
#define DDRSS_PHY_331__SFR_OFFS	0x12c
#define DDRSS_PHY_332__SFR_OFFS	0x130
#define DDRSS_PHY_333__SFR_OFFS	0x134
#define DDRSS_PHY_334__SFR_OFFS	0x138
#define DDRSS_PHY_335__SFR_OFFS	0x13c
#define DDRSS_PHY_336__SFR_OFFS	0x140
#define DDRSS_PHY_337__SFR_OFFS	0x144
#define DDRSS_PHY_338__SFR_OFFS	0x148
#define DDRSS_PHY_339__SFR_OFFS	0x14c
#define DDRSS_PHY_340__SFR_OFFS	0x150
#define DDRSS_PHY_341__SFR_OFFS	0x154
#define DDRSS_PHY_342__SFR_OFFS	0x158
#define DDRSS_PHY_343__SFR_OFFS	0x15c
#define DDRSS_PHY_344__SFR_OFFS	0x160
#define DDRSS_PHY_345__SFR_OFFS	0x164
#define DDRSS_PHY_346__SFR_OFFS	0x168
#define DDRSS_PHY_347__SFR_OFFS	0x16c
#define DDRSS_PHY_348__SFR_OFFS	0x170
#define DDRSS_PHY_349__SFR_OFFS	0x174
#define DDRSS_PHY_350__SFR_OFFS	0x178
#define DDRSS_PHY_351__SFR_OFFS	0x17c
#define DDRSS_PHY_352__SFR_OFFS	0x180
#define DDRSS_PHY_353__SFR_OFFS	0x184
#define DDRSS_PHY_354__SFR_OFFS	0x188
#define DDRSS_PHY_355__SFR_OFFS	0x18c
#define DDRSS_PHY_356__SFR_OFFS	0x190
#define DDRSS_PHY_357__SFR_OFFS	0x194
#define DDRSS_PHY_358__SFR_OFFS	0x198
#define DDRSS_PHY_359__SFR_OFFS	0x19c
#define DDRSS_PHY_360__SFR_OFFS	0x1a0
#define DDRSS_PHY_361__SFR_OFFS	0x1a4
#define DDRSS_PHY_362__SFR_OFFS	0x1a8
#define DDRSS_PHY_363__SFR_OFFS	0x1ac
#define DDRSS_PHY_364__SFR_OFFS	0x1b0
#define DDRSS_PHY_365__SFR_OFFS	0x1b4
#define DDRSS_PHY_366__SFR_OFFS	0x1b8
#define DDRSS_PHY_367__SFR_OFFS	0x1bc
#define DDRSS_PHY_368__SFR_OFFS	0x1c0
#define DDRSS_PHY_369__SFR_OFFS	0x1c4
#define DDRSS_PHY_370__SFR_OFFS	0x1c8
#define DDRSS_PHY_371__SFR_OFFS	0x1cc
#define DDRSS_PHY_372__SFR_OFFS	0x1d0
#define DDRSS_PHY_373__SFR_OFFS	0x1d4
#define DDRSS_PHY_374__SFR_OFFS	0x1d8
#define DDRSS_PHY_375__SFR_OFFS	0x1dc
#define DDRSS_PHY_376__SFR_OFFS	0x1e0
#define DDRSS_PHY_377__SFR_OFFS	0x1e4
#define DDRSS_PHY_378__SFR_OFFS	0x1e8
#define DDRSS_PHY_379__SFR_OFFS	0x1ec
#define DDRSS_PHY_380__SFR_OFFS	0x1f0
#define DDRSS_PHY_381__SFR_OFFS	0x1f4
#define DDRSS_PHY_382__SFR_OFFS	0x1f8
#define DDRSS_PHY_383__SFR_OFFS	0x1fc
#define DDRSS_PHY_384__SFR_OFFS	0x200
#define DDRSS_PHY_385__SFR_OFFS	0x204
#define DDRSS_PHY_386__SFR_OFFS	0x208
#define DDRSS_PHY_387__SFR_OFFS	0x20c
#define DDRSS_PHY_388__SFR_OFFS	0x210
#define DDRSS_PHY_389__SFR_OFFS	0x214
#define DDRSS_PHY_390__SFR_OFFS	0x218
#define DDRSS_PHY_391__SFR_OFFS	0x21c
#define DDRSS_PHY_392__SFR_OFFS	0x220

/* Macros for register block Data_Slice_2 */
#define DDRSS_Data_Slice_2_REGISTER_BLOCK__OFFS	0x4800

#define DDRSS_PHY_512__SFR_OFFS	0x0
#define DDRSS_PHY_513__SFR_OFFS	0x4
#define DDRSS_PHY_514__SFR_OFFS	0x8
#define DDRSS_PHY_515__SFR_OFFS	0xc
#define DDRSS_PHY_516__SFR_OFFS	0x10
#define DDRSS_PHY_517__SFR_OFFS	0x14
#define DDRSS_PHY_518__SFR_OFFS	0x18
#define DDRSS_PHY_519__SFR_OFFS	0x1c
#define DDRSS_PHY_520__SFR_OFFS	0x20
#define DDRSS_PHY_521__SFR_OFFS	0x24
#define DDRSS_PHY_522__SFR_OFFS	0x28
#define DDRSS_PHY_523__SFR_OFFS	0x2c
#define DDRSS_PHY_524__SFR_OFFS	0x30
#define DDRSS_PHY_525__SFR_OFFS	0x34
#define DDRSS_PHY_526__SFR_OFFS	0x38
#define DDRSS_PHY_527__SFR_OFFS	0x3c
#define DDRSS_PHY_528__SFR_OFFS	0x40
#define DDRSS_PHY_529__SFR_OFFS	0x44
#define DDRSS_PHY_530__SFR_OFFS	0x48
#define DDRSS_PHY_531__SFR_OFFS	0x4c
#define DDRSS_PHY_532__SFR_OFFS	0x50
#define DDRSS_PHY_533__SFR_OFFS	0x54
#define DDRSS_PHY_534__SFR_OFFS	0x58
#define DDRSS_PHY_535__SFR_OFFS	0x5c
#define DDRSS_PHY_536__SFR_OFFS	0x60
#define DDRSS_PHY_537__SFR_OFFS	0x64
#define DDRSS_PHY_538__SFR_OFFS	0x68
#define DDRSS_PHY_539__SFR_OFFS	0x6c
#define DDRSS_PHY_540__SFR_OFFS	0x70
#define DDRSS_PHY_541__SFR_OFFS	0x74
#define DDRSS_PHY_542__SFR_OFFS	0x78
#define DDRSS_PHY_543__SFR_OFFS	0x7c
#define DDRSS_PHY_544__SFR_OFFS	0x80
#define DDRSS_PHY_545__SFR_OFFS	0x84
#define DDRSS_PHY_546__SFR_OFFS	0x88
#define DDRSS_PHY_547__SFR_OFFS	0x8c
#define DDRSS_PHY_548__SFR_OFFS	0x90
#define DDRSS_PHY_549__SFR_OFFS	0x94
#define DDRSS_PHY_550__SFR_OFFS	0x98
#define DDRSS_PHY_551__SFR_OFFS	0x9c
#define DDRSS_PHY_552__SFR_OFFS	0xa0
#define DDRSS_PHY_553__SFR_OFFS	0xa4
#define DDRSS_PHY_554__SFR_OFFS	0xa8
#define DDRSS_PHY_555__SFR_OFFS	0xac
#define DDRSS_PHY_556__SFR_OFFS	0xb0
#define DDRSS_PHY_557__SFR_OFFS	0xb4
#define DDRSS_PHY_558__SFR_OFFS	0xb8
#define DDRSS_PHY_559__SFR_OFFS	0xbc
#define DDRSS_PHY_560__SFR_OFFS	0xc0
#define DDRSS_PHY_561__SFR_OFFS	0xc4
#define DDRSS_PHY_562__SFR_OFFS	0xc8
#define DDRSS_PHY_563__SFR_OFFS	0xcc
#define DDRSS_PHY_564__SFR_OFFS	0xd0
#define DDRSS_PHY_565__SFR_OFFS	0xd4
#define DDRSS_PHY_566__SFR_OFFS	0xd8
#define DDRSS_PHY_567__SFR_OFFS	0xdc
#define DDRSS_PHY_568__SFR_OFFS	0xe0
#define DDRSS_PHY_569__SFR_OFFS	0xe4
#define DDRSS_PHY_570__SFR_OFFS	0xe8
#define DDRSS_PHY_571__SFR_OFFS	0xec
#define DDRSS_PHY_572__SFR_OFFS	0xf0
#define DDRSS_PHY_573__SFR_OFFS	0xf4
#define DDRSS_PHY_574__SFR_OFFS	0xf8
#define DDRSS_PHY_575__SFR_OFFS	0xfc
#define DDRSS_PHY_576__SFR_OFFS	0x100
#define DDRSS_PHY_577__SFR_OFFS	0x104
#define DDRSS_PHY_578__SFR_OFFS	0x108
#define DDRSS_PHY_579__SFR_OFFS	0x10c
#define DDRSS_PHY_580__SFR_OFFS	0x110
#define DDRSS_PHY_581__SFR_OFFS	0x114
#define DDRSS_PHY_582__SFR_OFFS	0x118
#define DDRSS_PHY_583__SFR_OFFS	0x11c
#define DDRSS_PHY_584__SFR_OFFS	0x120
#define DDRSS_PHY_585__SFR_OFFS	0x124
#define DDRSS_PHY_586__SFR_OFFS	0x128
#define DDRSS_PHY_587__SFR_OFFS	0x12c
#define DDRSS_PHY_588__SFR_OFFS	0x130
#define DDRSS_PHY_589__SFR_OFFS	0x134
#define DDRSS_PHY_590__SFR_OFFS	0x138
#define DDRSS_PHY_591__SFR_OFFS	0x13c
#define DDRSS_PHY_592__SFR_OFFS	0x140
#define DDRSS_PHY_593__SFR_OFFS	0x144
#define DDRSS_PHY_594__SFR_OFFS	0x148
#define DDRSS_PHY_595__SFR_OFFS	0x14c
#define DDRSS_PHY_596__SFR_OFFS	0x150
#define DDRSS_PHY_597__SFR_OFFS	0x154
#define DDRSS_PHY_598__SFR_OFFS	0x158
#define DDRSS_PHY_599__SFR_OFFS	0x15c
#define DDRSS_PHY_600__SFR_OFFS	0x160
#define DDRSS_PHY_601__SFR_OFFS	0x164
#define DDRSS_PHY_602__SFR_OFFS	0x168
#define DDRSS_PHY_603__SFR_OFFS	0x16c
#define DDRSS_PHY_604__SFR_OFFS	0x170
#define DDRSS_PHY_605__SFR_OFFS	0x174
#define DDRSS_PHY_606__SFR_OFFS	0x178
#define DDRSS_PHY_607__SFR_OFFS	0x17c
#define DDRSS_PHY_608__SFR_OFFS	0x180
#define DDRSS_PHY_609__SFR_OFFS	0x184
#define DDRSS_PHY_610__SFR_OFFS	0x188
#define DDRSS_PHY_611__SFR_OFFS	0x18c
#define DDRSS_PHY_612__SFR_OFFS	0x190
#define DDRSS_PHY_613__SFR_OFFS	0x194
#define DDRSS_PHY_614__SFR_OFFS	0x198
#define DDRSS_PHY_615__SFR_OFFS	0x19c
#define DDRSS_PHY_616__SFR_OFFS	0x1a0
#define DDRSS_PHY_617__SFR_OFFS	0x1a4
#define DDRSS_PHY_618__SFR_OFFS	0x1a8
#define DDRSS_PHY_619__SFR_OFFS	0x1ac
#define DDRSS_PHY_620__SFR_OFFS	0x1b0
#define DDRSS_PHY_621__SFR_OFFS	0x1b4
#define DDRSS_PHY_622__SFR_OFFS	0x1b8
#define DDRSS_PHY_623__SFR_OFFS	0x1bc
#define DDRSS_PHY_624__SFR_OFFS	0x1c0
#define DDRSS_PHY_625__SFR_OFFS	0x1c4
#define DDRSS_PHY_626__SFR_OFFS	0x1c8
#define DDRSS_PHY_627__SFR_OFFS	0x1cc
#define DDRSS_PHY_628__SFR_OFFS	0x1d0
#define DDRSS_PHY_629__SFR_OFFS	0x1d4
#define DDRSS_PHY_630__SFR_OFFS	0x1d8
#define DDRSS_PHY_631__SFR_OFFS	0x1dc
#define DDRSS_PHY_632__SFR_OFFS	0x1e0
#define DDRSS_PHY_633__SFR_OFFS	0x1e4
#define DDRSS_PHY_634__SFR_OFFS	0x1e8
#define DDRSS_PHY_635__SFR_OFFS	0x1ec
#define DDRSS_PHY_636__SFR_OFFS	0x1f0
#define DDRSS_PHY_637__SFR_OFFS	0x1f4
#define DDRSS_PHY_638__SFR_OFFS	0x1f8
#define DDRSS_PHY_639__SFR_OFFS	0x1fc
#define DDRSS_PHY_640__SFR_OFFS	0x200
#define DDRSS_PHY_641__SFR_OFFS	0x204
#define DDRSS_PHY_642__SFR_OFFS	0x208
#define DDRSS_PHY_643__SFR_OFFS	0x20c
#define DDRSS_PHY_644__SFR_OFFS	0x210
#define DDRSS_PHY_645__SFR_OFFS	0x214
#define DDRSS_PHY_646__SFR_OFFS	0x218
#define DDRSS_PHY_647__SFR_OFFS	0x21c
#define DDRSS_PHY_648__SFR_OFFS	0x220

/* Macros for register block Data_Slice_3 */
#define DDRSS_Data_Slice_3_REGISTER_BLOCK__OFFS	0x4c00

#define DDRSS_PHY_768__SFR_OFFS	0x0
#define DDRSS_PHY_769__SFR_OFFS	0x4
#define DDRSS_PHY_770__SFR_OFFS	0x8
#define DDRSS_PHY_771__SFR_OFFS	0xc
#define DDRSS_PHY_772__SFR_OFFS	0x10
#define DDRSS_PHY_773__SFR_OFFS	0x14
#define DDRSS_PHY_774__SFR_OFFS	0x18
#define DDRSS_PHY_775__SFR_OFFS	0x1c
#define DDRSS_PHY_776__SFR_OFFS	0x20
#define DDRSS_PHY_777__SFR_OFFS	0x24
#define DDRSS_PHY_778__SFR_OFFS	0x28
#define DDRSS_PHY_779__SFR_OFFS	0x2c
#define DDRSS_PHY_780__SFR_OFFS	0x30
#define DDRSS_PHY_781__SFR_OFFS	0x34
#define DDRSS_PHY_782__SFR_OFFS	0x38
#define DDRSS_PHY_783__SFR_OFFS	0x3c
#define DDRSS_PHY_784__SFR_OFFS	0x40
#define DDRSS_PHY_785__SFR_OFFS	0x44
#define DDRSS_PHY_786__SFR_OFFS	0x48
#define DDRSS_PHY_787__SFR_OFFS	0x4c
#define DDRSS_PHY_788__SFR_OFFS	0x50
#define DDRSS_PHY_789__SFR_OFFS	0x54
#define DDRSS_PHY_790__SFR_OFFS	0x58
#define DDRSS_PHY_791__SFR_OFFS	0x5c
#define DDRSS_PHY_792__SFR_OFFS	0x60
#define DDRSS_PHY_793__SFR_OFFS	0x64
#define DDRSS_PHY_794__SFR_OFFS	0x68
#define DDRSS_PHY_795__SFR_OFFS	0x6c
#define DDRSS_PHY_796__SFR_OFFS	0x70
#define DDRSS_PHY_797__SFR_OFFS	0x74
#define DDRSS_PHY_798__SFR_OFFS	0x78
#define DDRSS_PHY_799__SFR_OFFS	0x7c
#define DDRSS_PHY_800__SFR_OFFS	0x80
#define DDRSS_PHY_801__SFR_OFFS	0x84
#define DDRSS_PHY_802__SFR_OFFS	0x88
#define DDRSS_PHY_803__SFR_OFFS	0x8c
#define DDRSS_PHY_804__SFR_OFFS	0x90
#define DDRSS_PHY_805__SFR_OFFS	0x94
#define DDRSS_PHY_806__SFR_OFFS	0x98
#define DDRSS_PHY_807__SFR_OFFS	0x9c
#define DDRSS_PHY_808__SFR_OFFS	0xa0
#define DDRSS_PHY_809__SFR_OFFS	0xa4
#define DDRSS_PHY_810__SFR_OFFS	0xa8
#define DDRSS_PHY_811__SFR_OFFS	0xac
#define DDRSS_PHY_812__SFR_OFFS	0xb0
#define DDRSS_PHY_813__SFR_OFFS	0xb4
#define DDRSS_PHY_814__SFR_OFFS	0xb8
#define DDRSS_PHY_815__SFR_OFFS	0xbc
#define DDRSS_PHY_816__SFR_OFFS	0xc0
#define DDRSS_PHY_817__SFR_OFFS	0xc4
#define DDRSS_PHY_818__SFR_OFFS	0xc8
#define DDRSS_PHY_819__SFR_OFFS	0xcc
#define DDRSS_PHY_820__SFR_OFFS	0xd0
#define DDRSS_PHY_821__SFR_OFFS	0xd4
#define DDRSS_PHY_822__SFR_OFFS	0xd8
#define DDRSS_PHY_823__SFR_OFFS	0xdc
#define DDRSS_PHY_824__SFR_OFFS	0xe0
#define DDRSS_PHY_825__SFR_OFFS	0xe4
#define DDRSS_PHY_826__SFR_OFFS	0xe8
#define DDRSS_PHY_827__SFR_OFFS	0xec
#define DDRSS_PHY_828__SFR_OFFS	0xf0
#define DDRSS_PHY_829__SFR_OFFS	0xf4
#define DDRSS_PHY_830__SFR_OFFS	0xf8
#define DDRSS_PHY_831__SFR_OFFS	0xfc
#define DDRSS_PHY_832__SFR_OFFS	0x100
#define DDRSS_PHY_833__SFR_OFFS	0x104
#define DDRSS_PHY_834__SFR_OFFS	0x108
#define DDRSS_PHY_835__SFR_OFFS	0x10c
#define DDRSS_PHY_836__SFR_OFFS	0x110
#define DDRSS_PHY_837__SFR_OFFS	0x114
#define DDRSS_PHY_838__SFR_OFFS	0x118
#define DDRSS_PHY_839__SFR_OFFS	0x11c
#define DDRSS_PHY_840__SFR_OFFS	0x120
#define DDRSS_PHY_841__SFR_OFFS	0x124
#define DDRSS_PHY_842__SFR_OFFS	0x128
#define DDRSS_PHY_843__SFR_OFFS	0x12c
#define DDRSS_PHY_844__SFR_OFFS	0x130
#define DDRSS_PHY_845__SFR_OFFS	0x134
#define DDRSS_PHY_846__SFR_OFFS	0x138
#define DDRSS_PHY_847__SFR_OFFS	0x13c
#define DDRSS_PHY_848__SFR_OFFS	0x140
#define DDRSS_PHY_849__SFR_OFFS	0x144
#define DDRSS_PHY_850__SFR_OFFS	0x148
#define DDRSS_PHY_851__SFR_OFFS	0x14c
#define DDRSS_PHY_852__SFR_OFFS	0x150
#define DDRSS_PHY_853__SFR_OFFS	0x154
#define DDRSS_PHY_854__SFR_OFFS	0x158
#define DDRSS_PHY_855__SFR_OFFS	0x15c
#define DDRSS_PHY_856__SFR_OFFS	0x160
#define DDRSS_PHY_857__SFR_OFFS	0x164
#define DDRSS_PHY_858__SFR_OFFS	0x168
#define DDRSS_PHY_859__SFR_OFFS	0x16c
#define DDRSS_PHY_860__SFR_OFFS	0x170
#define DDRSS_PHY_861__SFR_OFFS	0x174
#define DDRSS_PHY_862__SFR_OFFS	0x178
#define DDRSS_PHY_863__SFR_OFFS	0x17c
#define DDRSS_PHY_864__SFR_OFFS	0x180
#define DDRSS_PHY_865__SFR_OFFS	0x184
#define DDRSS_PHY_866__SFR_OFFS	0x188
#define DDRSS_PHY_867__SFR_OFFS	0x18c
#define DDRSS_PHY_868__SFR_OFFS	0x190
#define DDRSS_PHY_869__SFR_OFFS	0x194
#define DDRSS_PHY_870__SFR_OFFS	0x198
#define DDRSS_PHY_871__SFR_OFFS	0x19c
#define DDRSS_PHY_872__SFR_OFFS	0x1a0
#define DDRSS_PHY_873__SFR_OFFS	0x1a4
#define DDRSS_PHY_874__SFR_OFFS	0x1a8
#define DDRSS_PHY_875__SFR_OFFS	0x1ac
#define DDRSS_PHY_876__SFR_OFFS	0x1b0
#define DDRSS_PHY_877__SFR_OFFS	0x1b4
#define DDRSS_PHY_878__SFR_OFFS	0x1b8
#define DDRSS_PHY_879__SFR_OFFS	0x1bc
#define DDRSS_PHY_880__SFR_OFFS	0x1c0
#define DDRSS_PHY_881__SFR_OFFS	0x1c4
#define DDRSS_PHY_882__SFR_OFFS	0x1c8
#define DDRSS_PHY_883__SFR_OFFS	0x1cc
#define DDRSS_PHY_884__SFR_OFFS	0x1d0
#define DDRSS_PHY_885__SFR_OFFS	0x1d4
#define DDRSS_PHY_886__SFR_OFFS	0x1d8
#define DDRSS_PHY_887__SFR_OFFS	0x1dc
#define DDRSS_PHY_888__SFR_OFFS	0x1e0
#define DDRSS_PHY_889__SFR_OFFS	0x1e4
#define DDRSS_PHY_890__SFR_OFFS	0x1e8
#define DDRSS_PHY_891__SFR_OFFS	0x1ec
#define DDRSS_PHY_892__SFR_OFFS	0x1f0
#define DDRSS_PHY_893__SFR_OFFS	0x1f4
#define DDRSS_PHY_894__SFR_OFFS	0x1f8
#define DDRSS_PHY_895__SFR_OFFS	0x1fc
#define DDRSS_PHY_896__SFR_OFFS	0x200
#define DDRSS_PHY_897__SFR_OFFS	0x204
#define DDRSS_PHY_898__SFR_OFFS	0x208
#define DDRSS_PHY_899__SFR_OFFS	0x20c
#define DDRSS_PHY_900__SFR_OFFS	0x210
#define DDRSS_PHY_901__SFR_OFFS	0x214
#define DDRSS_PHY_902__SFR_OFFS	0x218
#define DDRSS_PHY_903__SFR_OFFS	0x21c
#define DDRSS_PHY_904__SFR_OFFS	0x220

/* Macros for register block Address_Slice_0 */
#define DDRSS_Address_Slice_0_REGISTER_BLOCK__OFFS	0x5000

#define DDRSS_PHY_1024__SFR_OFFS	0x0
#define DDRSS_PHY_1025__SFR_OFFS	0x4
#define DDRSS_PHY_1026__SFR_OFFS	0x8
#define DDRSS_PHY_1027__SFR_OFFS	0xc
#define DDRSS_PHY_1028__SFR_OFFS	0x10
#define DDRSS_PHY_1029__SFR_OFFS	0x14
#define DDRSS_PHY_1030__SFR_OFFS	0x18
#define DDRSS_PHY_1031__SFR_OFFS	0x1c
#define DDRSS_PHY_1032__SFR_OFFS	0x20
#define DDRSS_PHY_1033__SFR_OFFS	0x24
#define DDRSS_PHY_1034__SFR_OFFS	0x28
#define DDRSS_PHY_1035__SFR_OFFS	0x2c
#define DDRSS_PHY_1036__SFR_OFFS	0x30
#define DDRSS_PHY_1037__SFR_OFFS	0x34
#define DDRSS_PHY_1038__SFR_OFFS	0x38
#define DDRSS_PHY_1039__SFR_OFFS	0x3c
#define DDRSS_PHY_1040__SFR_OFFS	0x40
#define DDRSS_PHY_1041__SFR_OFFS	0x44
#define DDRSS_PHY_1042__SFR_OFFS	0x48
#define DDRSS_PHY_1043__SFR_OFFS	0x4c
#define DDRSS_PHY_1044__SFR_OFFS	0x50
#define DDRSS_PHY_1045__SFR_OFFS	0x54
#define DDRSS_PHY_1046__SFR_OFFS	0x58
#define DDRSS_PHY_1047__SFR_OFFS	0x5c
#define DDRSS_PHY_1048__SFR_OFFS	0x60
#define DDRSS_PHY_1049__SFR_OFFS	0x64
#define DDRSS_PHY_1050__SFR_OFFS	0x68
#define DDRSS_PHY_1051__SFR_OFFS	0x6c
#define DDRSS_PHY_1052__SFR_OFFS	0x70
#define DDRSS_PHY_1053__SFR_OFFS	0x74
#define DDRSS_PHY_1054__SFR_OFFS	0x78
#define DDRSS_PHY_1055__SFR_OFFS	0x7c
#define DDRSS_PHY_1056__SFR_OFFS	0x80
#define DDRSS_PHY_1057__SFR_OFFS	0x84
#define DDRSS_PHY_1058__SFR_OFFS	0x88
#define DDRSS_PHY_1059__SFR_OFFS	0x8c
#define DDRSS_PHY_1060__SFR_OFFS	0x90
#define DDRSS_PHY_1061__SFR_OFFS	0x94
#define DDRSS_PHY_1062__SFR_OFFS	0x98
#define DDRSS_PHY_1063__SFR_OFFS	0x9c
#define DDRSS_PHY_1064__SFR_OFFS	0xa0
#define DDRSS_PHY_1065__SFR_OFFS	0xa4
#define DDRSS_PHY_1066__SFR_OFFS	0xa8
#define DDRSS_PHY_1067__SFR_OFFS	0xac
#define DDRSS_PHY_1068__SFR_OFFS	0xb0
#define DDRSS_PHY_1069__SFR_OFFS	0xb4
#define DDRSS_PHY_1070__SFR_OFFS	0xb8
#define DDRSS_PHY_1071__SFR_OFFS	0xbc
#define DDRSS_PHY_1072__SFR_OFFS	0xc0

/* Macros for register block Address_Slice_1 */
#define DDRSS_Address_Slice_1_REGISTER_BLOCK__OFFS	0x5400

#define DDRSS_PHY_1280__SFR_OFFS	0x0
#define DDRSS_PHY_1281__SFR_OFFS	0x4
#define DDRSS_PHY_1282__SFR_OFFS	0x8
#define DDRSS_PHY_1283__SFR_OFFS	0xc
#define DDRSS_PHY_1284__SFR_OFFS	0x10
#define DDRSS_PHY_1285__SFR_OFFS	0x14
#define DDRSS_PHY_1286__SFR_OFFS	0x18
#define DDRSS_PHY_1287__SFR_OFFS	0x1c
#define DDRSS_PHY_1288__SFR_OFFS	0x20
#define DDRSS_PHY_1289__SFR_OFFS	0x24
#define DDRSS_PHY_1290__SFR_OFFS	0x28
#define DDRSS_PHY_1291__SFR_OFFS	0x2c
#define DDRSS_PHY_1292__SFR_OFFS	0x30
#define DDRSS_PHY_1293__SFR_OFFS	0x34
#define DDRSS_PHY_1294__SFR_OFFS	0x38
#define DDRSS_PHY_1295__SFR_OFFS	0x3c
#define DDRSS_PHY_1296__SFR_OFFS	0x40
#define DDRSS_PHY_1297__SFR_OFFS	0x44
#define DDRSS_PHY_1298__SFR_OFFS	0x48
#define DDRSS_PHY_1299__SFR_OFFS	0x4c
#define DDRSS_PHY_1300__SFR_OFFS	0x50
#define DDRSS_PHY_1301__SFR_OFFS	0x54
#define DDRSS_PHY_1302__SFR_OFFS	0x58
#define DDRSS_PHY_1303__SFR_OFFS	0x5c
#define DDRSS_PHY_1304__SFR_OFFS	0x60
#define DDRSS_PHY_1305__SFR_OFFS	0x64
#define DDRSS_PHY_1306__SFR_OFFS	0x68
#define DDRSS_PHY_1307__SFR_OFFS	0x6c
#define DDRSS_PHY_1308__SFR_OFFS	0x70
#define DDRSS_PHY_1309__SFR_OFFS	0x74
#define DDRSS_PHY_1310__SFR_OFFS	0x78
#define DDRSS_PHY_1311__SFR_OFFS	0x7c
#define DDRSS_PHY_1312__SFR_OFFS	0x80
#define DDRSS_PHY_1313__SFR_OFFS	0x84
#define DDRSS_PHY_1314__SFR_OFFS	0x88
#define DDRSS_PHY_1315__SFR_OFFS	0x8c
#define DDRSS_PHY_1316__SFR_OFFS	0x90
#define DDRSS_PHY_1317__SFR_OFFS	0x94
#define DDRSS_PHY_1318__SFR_OFFS	0x98
#define DDRSS_PHY_1319__SFR_OFFS	0x9c
#define DDRSS_PHY_1320__SFR_OFFS	0xa0
#define DDRSS_PHY_1321__SFR_OFFS	0xa4
#define DDRSS_PHY_1322__SFR_OFFS	0xa8
#define DDRSS_PHY_1323__SFR_OFFS	0xac
#define DDRSS_PHY_1324__SFR_OFFS	0xb0
#define DDRSS_PHY_1325__SFR_OFFS	0xb4
#define DDRSS_PHY_1326__SFR_OFFS	0xb8
#define DDRSS_PHY_1327__SFR_OFFS	0xbc
#define DDRSS_PHY_1328__SFR_OFFS	0xc0

/* Macros for register block Address_Slice_2 */
#define DDRSS_Address_Slice_2_REGISTER_BLOCK__OFFS	0x5800

#define DDRSS_PHY_1536__SFR_OFFS	0x0
#define DDRSS_PHY_1537__SFR_OFFS	0x4
#define DDRSS_PHY_1538__SFR_OFFS	0x8
#define DDRSS_PHY_1539__SFR_OFFS	0xc
#define DDRSS_PHY_1540__SFR_OFFS	0x10
#define DDRSS_PHY_1541__SFR_OFFS	0x14
#define DDRSS_PHY_1542__SFR_OFFS	0x18
#define DDRSS_PHY_1543__SFR_OFFS	0x1c
#define DDRSS_PHY_1544__SFR_OFFS	0x20
#define DDRSS_PHY_1545__SFR_OFFS	0x24
#define DDRSS_PHY_1546__SFR_OFFS	0x28
#define DDRSS_PHY_1547__SFR_OFFS	0x2c
#define DDRSS_PHY_1548__SFR_OFFS	0x30
#define DDRSS_PHY_1549__SFR_OFFS	0x34
#define DDRSS_PHY_1550__SFR_OFFS	0x38
#define DDRSS_PHY_1551__SFR_OFFS	0x3c
#define DDRSS_PHY_1552__SFR_OFFS	0x40
#define DDRSS_PHY_1553__SFR_OFFS	0x44
#define DDRSS_PHY_1554__SFR_OFFS	0x48
#define DDRSS_PHY_1555__SFR_OFFS	0x4c
#define DDRSS_PHY_1556__SFR_OFFS	0x50
#define DDRSS_PHY_1557__SFR_OFFS	0x54
#define DDRSS_PHY_1558__SFR_OFFS	0x58
#define DDRSS_PHY_1559__SFR_OFFS	0x5c
#define DDRSS_PHY_1560__SFR_OFFS	0x60
#define DDRSS_PHY_1561__SFR_OFFS	0x64
#define DDRSS_PHY_1562__SFR_OFFS	0x68
#define DDRSS_PHY_1563__SFR_OFFS	0x6c
#define DDRSS_PHY_1564__SFR_OFFS	0x70
#define DDRSS_PHY_1565__SFR_OFFS	0x74
#define DDRSS_PHY_1566__SFR_OFFS	0x78
#define DDRSS_PHY_1567__SFR_OFFS	0x7c
#define DDRSS_PHY_1568__SFR_OFFS	0x80
#define DDRSS_PHY_1569__SFR_OFFS	0x84
#define DDRSS_PHY_1570__SFR_OFFS	0x88
#define DDRSS_PHY_1571__SFR_OFFS	0x8c
#define DDRSS_PHY_1572__SFR_OFFS	0x90
#define DDRSS_PHY_1573__SFR_OFFS	0x94
#define DDRSS_PHY_1574__SFR_OFFS	0x98
#define DDRSS_PHY_1575__SFR_OFFS	0x9c
#define DDRSS_PHY_1576__SFR_OFFS	0xa0
#define DDRSS_PHY_1577__SFR_OFFS	0xa4
#define DDRSS_PHY_1578__SFR_OFFS	0xa8
#define DDRSS_PHY_1579__SFR_OFFS	0xac
#define DDRSS_PHY_1580__SFR_OFFS	0xb0
#define DDRSS_PHY_1581__SFR_OFFS	0xb4
#define DDRSS_PHY_1582__SFR_OFFS	0xb8
#define DDRSS_PHY_1583__SFR_OFFS	0xbc
#define DDRSS_PHY_1584__SFR_OFFS	0xc0

/* Macros for register block PHY_Core */
#define DDRSS_PHY_Core_REGISTER_BLOCK__OFFS	0x5c00

#define DDRSS_PHY_1792__SFR_OFFS	0x0
#define DDRSS_PHY_1793__SFR_OFFS	0x4
#define DDRSS_PHY_1794__SFR_OFFS	0x8
#define DDRSS_PHY_1795__SFR_OFFS	0xc
#define DDRSS_PHY_1796__SFR_OFFS	0x10
#define DDRSS_PHY_1797__SFR_OFFS	0x14
#define DDRSS_PHY_1798__SFR_OFFS	0x18
#define DDRSS_PHY_1799__SFR_OFFS	0x1c
#define DDRSS_PHY_1800__SFR_OFFS	0x20
#define DDRSS_PHY_1801__SFR_OFFS	0x24
#define DDRSS_PHY_1802__SFR_OFFS	0x28
#define DDRSS_PHY_1803__SFR_OFFS	0x2c
#define DDRSS_PHY_1804__SFR_OFFS	0x30
#define DDRSS_PHY_1805__SFR_OFFS	0x34
#define DDRSS_PHY_1806__SFR_OFFS	0x38
#define DDRSS_PHY_1807__SFR_OFFS	0x3c
#define DDRSS_PHY_1808__SFR_OFFS	0x40
#define DDRSS_PHY_1809__SFR_OFFS	0x44
#define DDRSS_PHY_1810__SFR_OFFS	0x48
#define DDRSS_PHY_1811__SFR_OFFS	0x4c
#define DDRSS_PHY_1812__SFR_OFFS	0x50
#define DDRSS_PHY_1813__SFR_OFFS	0x54
#define DDRSS_PHY_1814__SFR_OFFS	0x58
#define DDRSS_PHY_1815__SFR_OFFS	0x5c
#define DDRSS_PHY_1816__SFR_OFFS	0x60
#define DDRSS_PHY_1817__SFR_OFFS	0x64
#define DDRSS_PHY_1818__SFR_OFFS	0x68
#define DDRSS_PHY_1819__SFR_OFFS	0x6c
#define DDRSS_PHY_1820__SFR_OFFS	0x70
#define DDRSS_PHY_1821__SFR_OFFS	0x74
#define DDRSS_PHY_1822__SFR_OFFS	0x78
#define DDRSS_PHY_1823__SFR_OFFS	0x7c
#define DDRSS_PHY_1824__SFR_OFFS	0x80
#define DDRSS_PHY_1825__SFR_OFFS	0x84
#define DDRSS_PHY_1826__SFR_OFFS	0x88
#define DDRSS_PHY_1827__SFR_OFFS	0x8c
#define DDRSS_PHY_1828__SFR_OFFS	0x90
#define DDRSS_PHY_1829__SFR_OFFS	0x94
#define DDRSS_PHY_1830__SFR_OFFS	0x98
#define DDRSS_PHY_1831__SFR_OFFS	0x9c
#define DDRSS_PHY_1832__SFR_OFFS	0xa0
#define DDRSS_PHY_1833__SFR_OFFS	0xa4
#define DDRSS_PHY_1834__SFR_OFFS	0xa8
#define DDRSS_PHY_1835__SFR_OFFS	0xac
#define DDRSS_PHY_1836__SFR_OFFS	0xb0
#define DDRSS_PHY_1837__SFR_OFFS	0xb4
#define DDRSS_PHY_1838__SFR_OFFS	0xb8
#define DDRSS_PHY_1839__SFR_OFFS	0xbc
#define DDRSS_PHY_1840__SFR_OFFS	0xc0
#define DDRSS_PHY_1841__SFR_OFFS	0xc4
#define DDRSS_PHY_1842__SFR_OFFS	0xc8
#define DDRSS_PHY_1843__SFR_OFFS	0xcc
#define DDRSS_PHY_1844__SFR_OFFS	0xd0
#define DDRSS_PHY_1845__SFR_OFFS	0xd4
#define DDRSS_PHY_1846__SFR_OFFS	0xd8
#define DDRSS_PHY_1847__SFR_OFFS	0xdc
#define DDRSS_PHY_1848__SFR_OFFS	0xe0
#define DDRSS_PHY_1849__SFR_OFFS	0xe4
#define DDRSS_PHY_1850__SFR_OFFS	0xe8
#define DDRSS_PHY_1851__SFR_OFFS	0xec
#define DDRSS_PHY_1852__SFR_OFFS	0xf0
#define DDRSS_PHY_1853__SFR_OFFS	0xf4
#define DDRSS_PHY_1854__SFR_OFFS	0xf8
#define DDRSS_PHY_1855__SFR_OFFS	0xfc
#define DDRSS_PHY_1856__SFR_OFFS	0x100
#define DDRSS_PHY_1857__SFR_OFFS	0x104
#define DDRSS_PHY_1858__SFR_OFFS	0x108
#define DDRSS_PHY_1859__SFR_OFFS	0x10c
#define DDRSS_PHY_1860__SFR_OFFS	0x110
#define DDRSS_PHY_1861__SFR_OFFS	0x114
#define DDRSS_PHY_1862__SFR_OFFS	0x118
#define DDRSS_PHY_1863__SFR_OFFS	0x11c
#define DDRSS_PHY_1864__SFR_OFFS	0x120
#define DDRSS_PHY_1865__SFR_OFFS	0x124
#define DDRSS_PHY_1866__SFR_OFFS	0x128
#define DDRSS_PHY_1867__SFR_OFFS	0x12c
#define DDRSS_PHY_1868__SFR_OFFS	0x130
#define DDRSS_PHY_1869__SFR_OFFS	0x134
#define DDRSS_PHY_1870__SFR_OFFS	0x138
#define DDRSS_PHY_1871__SFR_OFFS	0x13c
#define DDRSS_PHY_1872__SFR_OFFS	0x140
#define DDRSS_PHY_1873__SFR_OFFS	0x144
#define DDRSS_PHY_1874__SFR_OFFS	0x148
#define DDRSS_PHY_1875__SFR_OFFS	0x14c
#define DDRSS_PHY_1876__SFR_OFFS	0x150
#define DDRSS_PHY_1877__SFR_OFFS	0x154
#define DDRSS_PHY_1878__SFR_OFFS	0x158
#define DDRSS_PHY_1879__SFR_OFFS	0x15c
#define DDRSS_PHY_1880__SFR_OFFS	0x160
#define DDRSS_PHY_1881__SFR_OFFS	0x164
#define DDRSS_PHY_1882__SFR_OFFS	0x168
#define DDRSS_PHY_1883__SFR_OFFS	0x16c
#define DDRSS_PHY_1884__SFR_OFFS	0x170
#define DDRSS_PHY_1885__SFR_OFFS	0x174
#define DDRSS_PHY_1886__SFR_OFFS	0x178
#define DDRSS_PHY_1887__SFR_OFFS	0x17c
#define DDRSS_PHY_1888__SFR_OFFS	0x180
#define DDRSS_PHY_1889__SFR_OFFS	0x184
#define DDRSS_PHY_1890__SFR_OFFS	0x188
#define DDRSS_PHY_1891__SFR_OFFS	0x18c
#define DDRSS_PHY_1892__SFR_OFFS	0x190
#define DDRSS_PHY_1893__SFR_OFFS	0x194
#define DDRSS_PHY_1894__SFR_OFFS	0x198
#define DDRSS_PHY_1895__SFR_OFFS	0x19c
#define DDRSS_PHY_1896__SFR_OFFS	0x1a0
#define DDRSS_PHY_1897__SFR_OFFS	0x1a4
#define DDRSS_PHY_1898__SFR_OFFS	0x1a8
#define DDRSS_PHY_1899__SFR_OFFS	0x1ac
#define DDRSS_PHY_1900__SFR_OFFS	0x1b0
#define DDRSS_PHY_1901__SFR_OFFS	0x1b4
#define DDRSS_PHY_1902__SFR_OFFS	0x1b8
#define DDRSS_PHY_1903__SFR_OFFS	0x1bc
#define DDRSS_PHY_1904__SFR_OFFS	0x1c0
#define DDRSS_PHY_1905__SFR_OFFS	0x1c4
#define DDRSS_PHY_1906__SFR_OFFS	0x1c8
#define DDRSS_PHY_1907__SFR_OFFS	0x1cc
#define DDRSS_PHY_1908__SFR_OFFS	0x1d0
#define DDRSS_PHY_1909__SFR_OFFS	0x1d4
#define DDRSS_PHY_1910__SFR_OFFS	0x1d8
#define DDRSS_PHY_1911__SFR_OFFS	0x1dc
#define DDRSS_PHY_1912__SFR_OFFS	0x1e0
#define DDRSS_PHY_1913__SFR_OFFS	0x1e4
#define DDRSS_PHY_1914__SFR_OFFS	0x1e8
#define DDRSS_PHY_1915__SFR_OFFS	0x1ec
#define DDRSS_PHY_1916__SFR_OFFS	0x1f0
#define DDRSS_PHY_1917__SFR_OFFS	0x1f4
#define DDRSS_PHY_1918__SFR_OFFS	0x1f8
#define DDRSS_PHY_1919__SFR_OFFS	0x1fc
#define DDRSS_PHY_1920__SFR_OFFS	0x200
#define DDRSS_PHY_1921__SFR_OFFS	0x204
#define DDRSS_PHY_1922__SFR_OFFS	0x208
#define DDRSS_PHY_1923__SFR_OFFS	0x20c
