Core Registers (Cortex-R5F) _2_L_SerDes _4_L_SerDes AASRC ADC ATL C66x_DSP_Subsystem C71SS_ECC_AGGR CCMR5 CLEC Compute_Cluster COMPUTE_CLUSTER0_MSMC_ECC_AGGR0 COMPUTE_CLUSTER0_MSMC_ECC_AGGR1 COMPUTE_CLUSTER0_MSMC_ECC_AGGR2 CPSW0_ALE CPSW0_CONTROL CPSW0_CPINT CPSW0_CPTS CPSW0_ECC CPSW0_MDIO CPSW0_NUSS_Subsystem__SS_ CPSW0_PCSR CPSW0_RAM CPSW0_SGMII CPSW0_STAT CPU0_ECC_AGGR_CFG_REGS CPU1_ECC_AGGR_CFG_REGS CSI_RX_IF CSI_TX_IF CTRL_MMR0 DCC DDR_Controller DDR_PHY DDR_Subsystem DDRSS0_ECC_AGGR_CFG DDRSS0_ECC_AGGR_CTL DDRSS0_ECC_AGGR_VBUS DECODER DMPAC_CFG DMPAC_CP_INTD DMPAC_CTSET DMPAC_DOF_CORE DMPAC_ECC_AGGR DMPAC_FOCO_0 DMPAC_FOCO_1 DMPAC_HTS DMPAC_SDE DMPAC_UTC_DRU DPHY_RX DPHY_TX DRU DRU_FW DRU_FW_GLB DRU_MMR_FW DRU_MMR_FW_GLB DSI_ECC_AGGR DSI_TOP DSI_WRAP DSS_COMMON DSS0_DISPC_0_COMMON_M DSS0_COMMON_DSS_REVISION 64003201 MODID 6400 REVRTL 6 REVMAJOR 2 CUSTOM 0 REVMIN 1 DSS0_COMMON_DSS_SYSCONFIG 00000011 WARMRESET 0 IDLEMODE 2 SOFTRESET 0 AUTOCLKGATING 1 DSS0_COMMON_DSS_SYSSTATUS 0000001F DISPC_IDLE_STATUS 0 DISPC_VP_RESETDONE 15 DISPC_FUNC_RESETDONE 1 DSS0_COMMON_DISPC_IRQSTATUS_RAW 00000006 DUMMY_IRQ 0 DUMMY1_IRQ 0 WB_IRQ 0 VID_IRQ 0 VP_IRQ 6 DSS0_COMMON_DISPC_IRQSTATUS 00000006 DUMMY_IRQ 0 DUMMY1_IRQ 0 WB_IRQ 0 VID_IRQ 0 VP_IRQ 6 DSS0_COMMON_DISPC_IRQENABLE_SET 000040FF SET_DUMMY_IRQ 0 SET_DUMMY1_IRQ 0 SET_WB_IRQ 1 SET_VID_IRQ 15 SET_VP_IRQ 15 DSS0_COMMON_DISPC_IRQENABLE_CLR 000040FF CLR_DUMMY_IRQ 0 CLR_DUMMY1_IRQ 0 CLR_WB_IRQ 1 CLR_VID_IRQ 15 CLR_VP_IRQ 15 DSS0_COMMON_VP_IRQENABLE_0 0000005A SAFETYREGION1_EN 0 DUMMY_EN 0 VPSYNC_EN 0 SECURITYVIOLATION_EN 0 SAFETYREGION_EN 1 ACBIASCOUNTSTATUS_EN 0 VPSYNCLOST_EN 1 VPPROGRAMMEDLINENUMBER_EN 1 VPVSYNC_ODD_EN 0 VPVSYNC_EN 1 VPFRAMEDONE_EN 0 DSS0_COMMON_VP_IRQENABLE_1 0000001A SAFETYREGION1_EN 0 DUMMY_EN 0 VPSYNC_EN 0 SECURITYVIOLATION_EN 0 SAFETYREGION_EN 0 ACBIASCOUNTSTATUS_EN 0 VPSYNCLOST_EN 1 VPPROGRAMMEDLINENUMBER_EN 1 VPVSYNC_ODD_EN 0 VPVSYNC_EN 1 VPFRAMEDONE_EN 0 DSS0_COMMON_VP_IRQENABLE_2 0000001A SAFETYREGION1_EN 0 DUMMY_EN 0 VPSYNC_EN 0 SECURITYVIOLATION_EN 0 SAFETYREGION_EN 0 ACBIASCOUNTSTATUS_EN 0 VPSYNCLOST_EN 1 VPPROGRAMMEDLINENUMBER_EN 1 VPVSYNC_ODD_EN 0 VPVSYNC_EN 1 VPFRAMEDONE_EN 0 DSS0_COMMON_VP_IRQENABLE_3 0000001A SAFETYREGION1_EN 0 DUMMY_EN 0 VPSYNC_EN 0 SECURITYVIOLATION_EN 0 SAFETYREGION_EN 0 ACBIASCOUNTSTATUS_EN 0 VPSYNCLOST_EN 1 VPPROGRAMMEDLINENUMBER_EN 1 VPVSYNC_ODD_EN 0 VPVSYNC_EN 1 VPFRAMEDONE_EN 0 DSS0_COMMON_VP_IRQSTATUS_0 00000000 SAFETYREGION1_IRQ 0 DUMMY_IRQ 0 VPSYNC_IRQ 0 SECURITYVIOLATION_IRQ 0 SAFETYREGION_IRQ 0 ACBIASCOUNTSTATUS_IRQ 0 VPSYNCLOST_IRQ 0 VPPROGRAMMEDLINENUMBER_IRQ 0 VPVSYNC_ODD_IRQ 0 VPVSYNC_IRQ 0 VPFRAMEDONE_IRQ 0 DSS0_COMMON_VP_IRQSTATUS_1 0000000A SAFETYREGION1_IRQ 0 DUMMY_IRQ 0 VPSYNC_IRQ 0 SECURITYVIOLATION_IRQ 0 SAFETYREGION_IRQ 0 ACBIASCOUNTSTATUS_IRQ 0 VPSYNCLOST_IRQ 0 VPPROGRAMMEDLINENUMBER_IRQ 1 VPVSYNC_ODD_IRQ 0 VPVSYNC_IRQ 1 VPFRAMEDONE_IRQ 0 DSS0_COMMON_VP_IRQSTATUS_2 0000000A SAFETYREGION1_IRQ 0 DUMMY_IRQ 0 VPSYNC_IRQ 0 SECURITYVIOLATION_IRQ 0 SAFETYREGION_IRQ 0 ACBIASCOUNTSTATUS_IRQ 0 VPSYNCLOST_IRQ 0 VPPROGRAMMEDLINENUMBER_IRQ 1 VPVSYNC_ODD_IRQ 0 VPVSYNC_IRQ 1 VPFRAMEDONE_IRQ 0 DSS0_COMMON_VP_IRQSTATUS_3 00000000 SAFETYREGION1_IRQ 0 DUMMY_IRQ 0 VPSYNC_IRQ 0 SECURITYVIOLATION_IRQ 0 SAFETYREGION_IRQ 0 ACBIASCOUNTSTATUS_IRQ 0 VPSYNCLOST_IRQ 0 VPPROGRAMMEDLINENUMBER_IRQ 0 VPVSYNC_ODD_IRQ 0 VPVSYNC_IRQ 0 VPFRAMEDONE_IRQ 0 DSS0_COMMON_WB_IRQENABLE 00000005 WBSYNC_EN 0 SECURITYVIOLATION_EN 0 WBFRAMEDONE_EN 1 WBUNCOMPLETEERROR_EN 0 WBBUFFEROVERFLOW_EN 1 DSS0_COMMON_WB_IRQSTATUS 00000000 WBSYNC_IRQ 0 SECURITYVIOLATION_IRQ 0 WBFRAMEDONE_IRQ 0 WBUNCOMPLETEERROR_IRQ 0 WBBUFFEROVERFLOW_IRQ 0 DSS0_COMMON_DISPC_IRQ_EOI_FUNC 00000000 EOI 0 DSS0_COMMON_DISPC_IRQ_EOI_SAFETY 00000000 EOI 0 DSS0_COMMON_DISPC_IRQ_EOI_SECURITY 00000000 EOI 0 DSS0_COMMON_DISPC_SECURE_DISABLE 00000000 SECURE_DISABLE 0 DSS0_COMMON_DISPC_GLOBAL_MFLAG_ATTRIBUTE 00000000 MFLAG_START 0 MFLAG_CTRL 0 DSS0_COMMON_DISPC_GLOBAL_OUTPUT_ENABLE 00000000 VP_GO 0 VP_ENABLE 0 DSS0_COMMON_DISPC_GLOBAL_BUFFER 00004688 BUFFERFILLING 0 SHAREDBUFENABLE 0 WB_BUFFER 4 VIDL2_BUFFER 3 VID2_BUFFER 2 VIDL1_BUFFER 1 VID1_BUFFER 0 DSS0_COMMON_DSS_CBA_CFG 0000000C DMA_BACKLOGSTATUS_DISABLE_VAL 0 DMA_BACKLOGSTATUS_DISABLE 0 PRI_HI 1 PRI_LO 4 DSS0_COMMON_DISPC_DBG_CONTROL 00000000 DBGMUXSEL 00 DBGEN 0 DSS0_COMMON_DISPC_DBG_STATUS 00000000 DSS0_COMMON_DISPC_CLKGATING_DISABLE 00000000 VP 0 OVR 0 WB 0 VID 0 DMA 0 DSS0_COMMON_FBDC_REVISION_1 00000000 PRODUCTCODE 0000 DSS0_COMMON_FBDC_REVISION_2 00000000 BRANCHCODE 0000 DSS0_COMMON_FBDC_REVISION_3 00000000 VERSIONCODE 0000 DSS0_COMMON_FBDC_REVISION_4 00000000 CORECODE 0000 DSS0_COMMON_FBDC_REVISION_5 00000000 CONFIGCODE 0000 DSS0_COMMON_FBDC_REVISION_6 00000000 DSS0_COMMON_FBDC_COMMON_CONTROL 00000000 GPUTYPE 0 CLKGATE 0 IDLEGATE 0 DSS0_COMMON_FBDC_CONSTANT_COLOR_0 00000000 DSS0_COMMON_FBDC_CONSTANT_COLOR_1 00000000 DSS0_COMMON_DISPC_CONNECTIONS 00000002 VIRTUALVP_CONN 0 WB_CONN 0 DPI_1_CONN 0 DPI_0_CONN 2 DSS0_COMMON_GLOBAL_DMA_THREADSIZE 00000010 WBTHREADSIZE 0 VP3THREADSIZE 0 VP2THREADSIZE 0 VP1THREADSIZE 0 VP0THREADSIZE 16 DSS0_COMMON_GLOBAL_DMA_THREADSIZESTATUS 00000010 WBTHREADSIZE 0 VP3THREADSIZE 0 VP2THREADSIZE 0 VP1THREADSIZE 0 VP0THREADSIZE 16 DSS0_COMMON_GLOBAL_GOBITMODE 00000000 MODE 0 DSS0_COMMON_DISPC_MSS_VP1 00000000 MSSFORMAT 0 MSSTYPE 0 MSSENABLE 0 DSS0_COMMON_DISPC_MSS_VP3 00000000 MSSFORMAT 0 MSSTYPE 0 MSSENABLE 0 DSS0_COMMON_VID_IRQSTATUS_0 00000000 FBDC_ILLEGALTILEREQ_IRQ 0 FBDC_CORRUPTTILE_IRQ 0 SAFETYREGION_IRQ 0 VIDENDWINDOW_IRQ 0 VIDBUFFERUNDERFLOW_IRQ 0 DSS0_COMMON_VID_IRQSTATUS_1 00000000 FBDC_ILLEGALTILEREQ_IRQ 0 FBDC_CORRUPTTILE_IRQ 0 SAFETYREGION_IRQ 0 VIDENDWINDOW_IRQ 0 VIDBUFFERUNDERFLOW_IRQ 0 DSS0_COMMON_VID_IRQSTATUS_2 00000000 FBDC_ILLEGALTILEREQ_IRQ 0 FBDC_CORRUPTTILE_IRQ 0 SAFETYREGION_IRQ 0 VIDENDWINDOW_IRQ 0 VIDBUFFERUNDERFLOW_IRQ 0 DSS0_COMMON_VID_IRQSTATUS_3 00000000 FBDC_ILLEGALTILEREQ_IRQ 0 FBDC_CORRUPTTILE_IRQ 0 SAFETYREGION_IRQ 0 VIDENDWINDOW_IRQ 0 VIDBUFFERUNDERFLOW_IRQ 0 DSS0_COMMON_VID_IRQENABLE_0 00000001 FBDC_ILLEGALTILEREQ_EN 0 FBDC_CORRUPTTILE_EN 0 SAFETYREGION_EN 0 VIDENDWINDOW_EN 0 VIDBUFFERUNDERFLOW_EN 1 DSS0_COMMON_VID_IRQENABLE_1 00000001 FBDC_ILLEGALTILEREQ_EN 0 FBDC_CORRUPTTILE_EN 0 SAFETYREGION_EN 0 VIDENDWINDOW_EN 0 VIDBUFFERUNDERFLOW_EN 1 DSS0_COMMON_VID_IRQENABLE_2 00000001 FBDC_ILLEGALTILEREQ_EN 0 FBDC_CORRUPTTILE_EN 0 SAFETYREGION_EN 0 VIDENDWINDOW_EN 0 VIDBUFFERUNDERFLOW_EN 1 DSS0_COMMON_VID_IRQENABLE_3 00000001 FBDC_ILLEGALTILEREQ_EN 0 FBDC_CORRUPTTILE_EN 0 SAFETYREGION_EN 0 VIDENDWINDOW_EN 0 VIDBUFFERUNDERFLOW_EN 1 DSS_OVR DSS0_OVR1 DSS0_OVR2 DSS0_OVR3 DSS0_OVR4 DSS_VID DSS_VP DSS0_VP1 DSS0_VP_CONFIG 00000000 COLORCONVPOS 0 FULLRANGE 0 COLORCONVENABLE 0 FIDFIRST 0 OUTPUTMODEENABLE 0 BT1120ENABLE 0 BT656ENABLE 0 BUFFERHANDSHAKE 0 CPR 0 EXTERNALSYNCEN 0 VSYNCGATED 0 HSYNCGATED 0 PIXELCLOCKGATED 0 PIXELDATAGATED 0 HDMIMODE 0 GAMMAENABLE 0 DATAENABLEGATED 0 PIXELGATED 0 DSS0_VP_CONTROL 00000040 SPATIALTEMPORALDITHERINGFRAMES 0 TDMUNUSEDBITS 0 TDMCYCLEFORMAT 0 TDMPARALLELMODE 0 TDMENABLE 0 HT 0 STALLMODETYPE 0 STALLMODE 0 DATALINES 0 STDITHERENABLE 0 DPIENABLE 1 GOBIT 0 M8B 0 STN 0 MONOCOLOR 0 VPPROGLINENUMBERMODULO 0 ENABLE 0 DSS0_VP_CSC_COEF0 00000000 C01 0000 C00 0000 DSS0_VP_CSC_COEF1 00000000 C10 0000 C02 0000 DSS0_VP_CSC_COEF2 00000000 C12 0000 C11 0000 DSS0_VP_LINE_NUMBER 00000000 LINENUMBER 0000 DSS0_VP_POL_FREQ 00000000 ALIGN 0 ONOFF 0 RF 0 IEO 0 IPC 0 IHS 0 IVS 0 ACBI 0 ACB 00 DSS0_VP_SIZE_SCREEN 00000000 LPP 0000 DELTA_LPP 0 PPL 0000 DSS0_VP_TIMING_H 00000000 HBP 0000 HFP 0000 HSW 00 DSS0_VP_TIMING_V 00000000 VBP 0000 VFP 0000 VSW 00 DSS0_VP_CSC_COEF3 00000000 C21 0000 C20 0000 DSS0_VP_CSC_COEF4 00000000 C22 0000 DSS0_VP_CSC_COEF5 00000000 PREOFFSET2 0000 PREOFFSET1 0000 DSS0_VP_CSC_COEF6 00000000 POSTOFFSET1 0000 PREOFFSET3 0000 DSS0_VP_CSC_COEF7 00000000 POSTOFFSET3 0000 POSTOFFSET2 0000 DSS0_VP_SAFETY_LFSR_SEED 00000000 DSS0_VP_SECURE 00000000 SECURE 0 DSS0_VP_GAMMA_TABLE_0 00000000 INDEX 0 VALUE_R 0000 VALUE_G 0000 VALUE_B 0000 DSS0_VP_GAMMA_TABLE_1 00000000 INDEX 0 VALUE_R 0000 VALUE_G 0000 VALUE_B 0000 DSS0_VP_GAMMA_TABLE_2 00000000 INDEX 0 VALUE_R 0000 VALUE_G 0000 VALUE_B 0000 DSS0_VP_GAMMA_TABLE_3 00000000 INDEX 0 VALUE_R 0000 VALUE_G 0000 VALUE_B 0000 DSS0_VP_GAMMA_TABLE_4 00000000 INDEX 0 VALUE_R 0000 VALUE_G 0000 VALUE_B 0000 DSS0_VP_GAMMA_TABLE_5 00000000 INDEX 0 VALUE_R 0000 VALUE_G 0000 VALUE_B 0000 DSS0_VP_GAMMA_TABLE_6 00000000 INDEX 0 VALUE_R 0000 VALUE_G 0000 VALUE_B 0000 DSS0_VP_GAMMA_TABLE_7 00000000 INDEX 0 VALUE_R 0000 VALUE_G 0000 VALUE_B 0000 DSS0_VP_GAMMA_TABLE_8 00000000 INDEX 0 VALUE_R 0000 VALUE_G 0000 VALUE_B 0000 DSS0_VP_GAMMA_TABLE_9 00000000 INDEX 0 VALUE_R 0000 VALUE_G 0000 VALUE_B 0000 DSS0_VP_GAMMA_TABLE_10 00000000 INDEX 0 VALUE_R 0000 VALUE_G 0000 VALUE_B 0000 DSS0_VP_GAMMA_TABLE_11 00000000 INDEX 0 VALUE_R 0000 VALUE_G 0000 VALUE_B 0000 DSS0_VP_GAMMA_TABLE_12 00000000 INDEX 0 VALUE_R 0000 VALUE_G 0000 VALUE_B 0000 DSS0_VP_GAMMA_TABLE_13 00000000 INDEX 0 VALUE_R 0000 VALUE_G 0000 VALUE_B 0000 DSS0_VP_GAMMA_TABLE_14 00000000 INDEX 0 VALUE_R 0000 VALUE_G 0000 VALUE_B 0000 DSS0_VP_GAMMA_TABLE_15 00000000 INDEX 0 VALUE_R 0000 VALUE_G 0000 VALUE_B 0000 DSS0_VP_SAFETY_SIZE_0 00080008 SIZEY 0008 SIZEX 0008 DSS0_VP_SAFETY_SIZE_1 00000000 SIZEY 0000 SIZEX 0000 DSS0_VP_SAFETY_SIZE_2 00000000 SIZEY 0000 SIZEX 0000 DSS0_VP_SAFETY_SIZE_3 00000000 SIZEY 0000 SIZEX 0000 DSS0_VP_SAFETY_SIZE_4 00000000 SIZEY 0000 SIZEX 0000 DSS0_VP_SAFETY_SIZE_5 00000000 SIZEY 0000 SIZEX 0000 DSS0_VP_SAFETY_SIZE_6 00000000 SIZEY 0000 SIZEX 0000 DSS0_VP_SAFETY_SIZE_7 00000000 SIZEY 0000 SIZEX 0000 DSS0_VP_SAFETY_REF_SIGNATURE_0 00001234 DSS0_VP_SAFETY_REF_SIGNATURE_1 00000000 DSS0_VP_SAFETY_REF_SIGNATURE_2 00000000 DSS0_VP_SAFETY_REF_SIGNATURE_3 00000000 DSS0_VP_SAFETY_REF_SIGNATURE_4 00000000 DSS0_VP_SAFETY_REF_SIGNATURE_5 00000000 DSS0_VP_SAFETY_REF_SIGNATURE_6 00000000 DSS0_VP_SAFETY_REF_SIGNATURE_7 00000000 DSS0_VP_SAFETY_POSITION_0 00000000 POSY 0000 POSX 0000 DSS0_VP_SAFETY_POSITION_1 00000000 POSY 0000 POSX 0000 DSS0_VP_SAFETY_POSITION_2 00000000 POSY 0000 POSX 0000 DSS0_VP_SAFETY_POSITION_3 00000000 POSY 0000 POSX 0000 DSS0_VP_SAFETY_POSITION_4 00000000 POSY 0000 POSX 0000 DSS0_VP_SAFETY_POSITION_5 00000000 POSY 0000 POSX 0000 DSS0_VP_SAFETY_POSITION_6 00000000 POSY 0000 POSX 0000 DSS0_VP_SAFETY_POSITION_7 00000000 POSY 0000 POSX 0000 DSS0_VP_SAFETY_CAPT_SIGNATURE_0 00000000 DSS0_VP_SAFETY_CAPT_SIGNATURE_1 00000000 DSS0_VP_SAFETY_CAPT_SIGNATURE_2 00000000 DSS0_VP_SAFETY_CAPT_SIGNATURE_3 00000000 DSS0_VP_SAFETY_CAPT_SIGNATURE_4 00000000 DSS0_VP_SAFETY_CAPT_SIGNATURE_5 00000000 DSS0_VP_SAFETY_CAPT_SIGNATURE_6 00000000 DSS0_VP_SAFETY_CAPT_SIGNATURE_7 00000000 DSS0_VP_SAFETY_ATTRIBUTES_0 00000003 FRAMESKIP 0 THRESHOLD 00 SEEDSELECT 0 CAPTUREMODE 1 ENABLE 1 DSS0_VP_SAFETY_ATTRIBUTES_1 00000000 FRAMESKIP 0 THRESHOLD 00 SEEDSELECT 0 CAPTUREMODE 0 ENABLE 0 DSS0_VP_SAFETY_ATTRIBUTES_2 00000000 FRAMESKIP 0 THRESHOLD 00 SEEDSELECT 0 CAPTUREMODE 0 ENABLE 0 DSS0_VP_SAFETY_ATTRIBUTES_3 00000000 FRAMESKIP 0 THRESHOLD 00 SEEDSELECT 0 CAPTUREMODE 0 ENABLE 0 DSS0_VP_SAFETY_ATTRIBUTES_4 00000000 FRAMESKIP 0 THRESHOLD 00 SEEDSELECT 0 CAPTUREMODE 0 ENABLE 0 DSS0_VP_SAFETY_ATTRIBUTES_5 00000000 FRAMESKIP 0 THRESHOLD 00 SEEDSELECT 0 CAPTUREMODE 0 ENABLE 0 DSS0_VP_SAFETY_ATTRIBUTES_6 00000000 FRAMESKIP 0 THRESHOLD 00 SEEDSELECT 0 CAPTUREMODE 0 ENABLE 0 DSS0_VP_SAFETY_ATTRIBUTES_7 00000000 FRAMESKIP 0 THRESHOLD 00 SEEDSELECT 0 CAPTUREMODE 0 ENABLE 0 DSS0_VP_DATA_CYCLE_0 00000000 BITALIGNMENTPIXEL2 0 NBBITSPIXEL2 0 BITALIGNMENTPIXEL1 0 NBBITSPIXEL1 0 DSS0_VP_DATA_CYCLE_1 00000000 BITALIGNMENTPIXEL2 0 NBBITSPIXEL2 0 BITALIGNMENTPIXEL1 0 NBBITSPIXEL1 0 DSS0_VP_DATA_CYCLE_2 00000000 BITALIGNMENTPIXEL2 0 NBBITSPIXEL2 0 BITALIGNMENTPIXEL1 0 NBBITSPIXEL1 0 DSS0_VP2 DSS0_VP3 DSS0_VP4 DSS_WB DSS0_WB DSS0_WB_ATTRIBUTES 00000000 IDLENUMBER 0 IDLESIZE 0 CAPTUREMODE 0 ARBITRATION 0 VERTICALTAPS 0 GOBIT 0 WRITEBACKMODE 0 FULLRANGE 0 COLORCONVENABLE 0 ALPHAENABLE 0 RESIZEENABLE 0 FORMAT 0 ENABLE 0 DSS0_WB_ATTRIBUTES2 3C000000 TAGS 15 YUV_ALIGN 0 YUV_MODE 0 YUV_SIZE 0 DSS0_WB_BUF_SIZE_STATUS 00001000 BUFSIZE 1000 DSS0_WB_BUF_THRESHOLD 0FFF0FF8 BUFHIGHTHRESHOLD 0FFF BUFLOWTHRESHOLD 0FF8 DSS0_WB_CSC_COEF0 00000000 C01 0000 C00 0000 DSS0_WB_CSC_COEF1 00000000 C10 0000 C02 0000 DSS0_WB_CSC_COEF2 00000000 C12 0000 C11 0000 DSS0_WB_CSC_COEF3 00000000 C21 0000 C20 0000 DSS0_WB_CSC_COEF4 00000000 C22 0000 DSS0_WB_CSC_COEF5 00000000 PREOFFSET2 0000 PREOFFSET1 0000 DSS0_WB_CSC_COEF6 00000000 POSTOFFSET1 0000 PREOFFSET3 0000 DSS0_WB_FIRH 00200000 FIRHINC 200000 DSS0_WB_FIRH2 00200000 FIRHINC 200000 DSS0_WB_FIRV 00200000 FIRVINC 200000 DSS0_WB_FIRV2 00200000 FIRVINC 200000 DSS0_WB_MFLAG_THRESHOLD 00000000 HT_MFLAG 0000 LT_MFLAG 0000 DSS0_WB_PICTURE_SIZE 00000000 MEMSIZEY 0000 MEMSIZEX 0000 DSS0_WB_SIZE 00000000 SIZEY 0000 SIZEX 0000 DSS0_WB_POSITION 00000000 POSY 0000 POSX 0000 DSS0_WB_CSC_COEF7 00000000 POSTOFFSET3 0000 POSTOFFSET2 0000 DSS0_WB_ROW_INC 00000001 DSS0_WB_ROW_INC_UV 00000001 DSS0_WB_SECURE 00000000 SECURE 0 DSS0_WB_BA_UV_EXT_0 00000000 BA_UV_EXT 0000 DSS0_WB_BA_UV_EXT_1 00000000 BA_UV_EXT 0000 DSS0_WB_BA_EXT_0 00000000 BA_EXT 0000 DSS0_WB_BA_EXT_1 00000000 BA_EXT 0000 DSS0_WB_FIR_COEF_V12_C_0 00000000 FIRVC2 0000 FIRVC1 0000 DSS0_WB_FIR_COEF_V12_C_1 00000000 FIRVC2 0000 FIRVC1 0000 DSS0_WB_FIR_COEF_V12_C_2 00000000 FIRVC2 0000 FIRVC1 0000 DSS0_WB_FIR_COEF_V12_C_3 00000000 FIRVC2 0000 FIRVC1 0000 DSS0_WB_FIR_COEF_V12_C_4 00000000 FIRVC2 0000 FIRVC1 0000 DSS0_WB_FIR_COEF_V12_C_5 00000000 FIRVC2 0000 FIRVC1 0000 DSS0_WB_FIR_COEF_V12_C_6 00000000 FIRVC2 0000 FIRVC1 0000 DSS0_WB_FIR_COEF_V12_C_7 00000000 FIRVC2 0000 FIRVC1 0000 DSS0_WB_FIR_COEF_V12_C_8 00000000 FIRVC2 0000 FIRVC1 0000 DSS0_WB_FIR_COEF_V12_C_9 00000000 FIRVC2 0000 FIRVC1 0000 DSS0_WB_FIR_COEF_V12_C_10 00000000 FIRVC2 0000 FIRVC1 0000 DSS0_WB_FIR_COEF_V12_C_11 00000000 FIRVC2 0000 FIRVC1 0000 DSS0_WB_FIR_COEF_V12_C_12 00000000 FIRVC2 0000 FIRVC1 0000 DSS0_WB_FIR_COEF_V12_C_13 00000000 FIRVC2 0000 FIRVC1 0000 DSS0_WB_FIR_COEF_V12_C_14 00000000 FIRVC2 0000 FIRVC1 0000 DSS0_WB_FIR_COEF_V12_C_15 00000000 FIRVC2 0000 FIRVC1 0000 DSS0_WB_FIR_COEF_V12_0 00000000 FIRVC2 0000 FIRVC1 0000 DSS0_WB_FIR_COEF_V12_1 00000000 FIRVC2 0000 FIRVC1 0000 DSS0_WB_FIR_COEF_V12_2 00000000 FIRVC2 0000 FIRVC1 0000 DSS0_WB_FIR_COEF_V12_3 00000000 FIRVC2 0000 FIRVC1 0000 DSS0_WB_FIR_COEF_V12_4 00000000 FIRVC2 0000 FIRVC1 0000 DSS0_WB_FIR_COEF_V12_5 00000000 FIRVC2 0000 FIRVC1 0000 DSS0_WB_FIR_COEF_V12_6 00000000 FIRVC2 0000 FIRVC1 0000 DSS0_WB_FIR_COEF_V12_7 00000000 FIRVC2 0000 FIRVC1 0000 DSS0_WB_FIR_COEF_V12_8 00000000 FIRVC2 0000 FIRVC1 0000 DSS0_WB_FIR_COEF_V12_9 00000000 FIRVC2 0000 FIRVC1 0000 DSS0_WB_FIR_COEF_V12_10 00000000 FIRVC2 0000 FIRVC1 0000 DSS0_WB_FIR_COEF_V12_11 00000000 FIRVC2 0000 FIRVC1 0000 DSS0_WB_FIR_COEF_V12_12 00000000 FIRVC2 0000 FIRVC1 0000 DSS0_WB_FIR_COEF_V12_13 00000000 FIRVC2 0000 FIRVC1 0000 DSS0_WB_FIR_COEF_V12_14 00000000 FIRVC2 0000 FIRVC1 0000 DSS0_WB_FIR_COEF_V12_15 00000000 FIRVC2 0000 FIRVC1 0000 DSS0_WB_FIR_COEF_V0_C_0 00000000 FIRVC0 0000 DSS0_WB_FIR_COEF_V0_C_1 00000000 FIRVC0 0000 DSS0_WB_FIR_COEF_V0_C_2 00000000 FIRVC0 0000 DSS0_WB_FIR_COEF_V0_C_3 00000000 FIRVC0 0000 DSS0_WB_FIR_COEF_V0_C_4 00000000 FIRVC0 0000 DSS0_WB_FIR_COEF_V0_C_5 00000000 FIRVC0 0000 DSS0_WB_FIR_COEF_V0_C_6 00000000 FIRVC0 0000 DSS0_WB_FIR_COEF_V0_C_7 00000000 FIRVC0 0000 DSS0_WB_FIR_COEF_V0_C_8 00000000 FIRVC0 0000 DSS0_WB_FIR_COEF_V0_0 00000000 FIRVC0 0000 DSS0_WB_FIR_COEF_V0_1 00000000 FIRVC0 0000 DSS0_WB_FIR_COEF_V0_2 00000000 FIRVC0 0000 DSS0_WB_FIR_COEF_V0_3 00000000 FIRVC0 0000 DSS0_WB_FIR_COEF_V0_4 00000000 FIRVC0 0000 DSS0_WB_FIR_COEF_V0_5 00000000 FIRVC0 0000 DSS0_WB_FIR_COEF_V0_6 00000000 FIRVC0 0000 DSS0_WB_FIR_COEF_V0_7 00000000 FIRVC0 0000 DSS0_WB_FIR_COEF_V0_8 00000000 FIRVC0 0000 DSS0_WB_FIR_COEF_H12_C_0 00000000 FIRHC2 0000 FIRHC1 0000 DSS0_WB_FIR_COEF_H12_C_1 00000000 FIRHC2 0000 FIRHC1 0000 DSS0_WB_FIR_COEF_H12_C_2 00000000 FIRHC2 0000 FIRHC1 0000 DSS0_WB_FIR_COEF_H12_C_3 00000000 FIRHC2 0000 FIRHC1 0000 DSS0_WB_FIR_COEF_H12_C_4 00000000 FIRHC2 0000 FIRHC1 0000 DSS0_WB_FIR_COEF_H12_C_5 00000000 FIRHC2 0000 FIRHC1 0000 DSS0_WB_FIR_COEF_H12_C_6 00000000 FIRHC2 0000 FIRHC1 0000 DSS0_WB_FIR_COEF_H12_C_7 00000000 FIRHC2 0000 FIRHC1 0000 DSS0_WB_FIR_COEF_H12_C_8 00000000 FIRHC2 0000 FIRHC1 0000 DSS0_WB_FIR_COEF_H12_C_9 00000000 FIRHC2 0000 FIRHC1 0000 DSS0_WB_FIR_COEF_H12_C_10 00000000 FIRHC2 0000 FIRHC1 0000 DSS0_WB_FIR_COEF_H12_C_11 00000000 FIRHC2 0000 FIRHC1 0000 DSS0_WB_FIR_COEF_H12_C_12 00000000 FIRHC2 0000 FIRHC1 0000 DSS0_WB_FIR_COEF_H12_C_13 00000000 FIRHC2 0000 FIRHC1 0000 DSS0_WB_FIR_COEF_H12_C_14 00000000 FIRHC2 0000 FIRHC1 0000 DSS0_WB_FIR_COEF_H12_C_15 00000000 FIRHC2 0000 FIRHC1 0000 DSS0_WB_FIR_COEF_H12_0 00000000 FIRHC2 0000 FIRHC1 0000 DSS0_WB_FIR_COEF_H12_1 00000000 FIRHC2 0000 FIRHC1 0000 DSS0_WB_FIR_COEF_H12_2 00000000 FIRHC2 0000 FIRHC1 0000 DSS0_WB_FIR_COEF_H12_3 00000000 FIRHC2 0000 FIRHC1 0000 DSS0_WB_FIR_COEF_H12_4 00000000 FIRHC2 0000 FIRHC1 0000 DSS0_WB_FIR_COEF_H12_5 00000000 FIRHC2 0000 FIRHC1 0000 DSS0_WB_FIR_COEF_H12_6 00000000 FIRHC2 0000 FIRHC1 0000 DSS0_WB_FIR_COEF_H12_7 00000000 FIRHC2 0000 FIRHC1 0000 DSS0_WB_FIR_COEF_H12_8 00000000 FIRHC2 0000 FIRHC1 0000 DSS0_WB_FIR_COEF_H12_9 00000000 FIRHC2 0000 FIRHC1 0000 DSS0_WB_FIR_COEF_H12_10 00000000 FIRHC2 0000 FIRHC1 0000 DSS0_WB_FIR_COEF_H12_11 00000000 FIRHC2 0000 FIRHC1 0000 DSS0_WB_FIR_COEF_H12_12 00000000 FIRHC2 0000 FIRHC1 0000 DSS0_WB_FIR_COEF_H12_13 00000000 FIRHC2 0000 FIRHC1 0000 DSS0_WB_FIR_COEF_H12_14 00000000 FIRHC2 0000 FIRHC1 0000 DSS0_WB_FIR_COEF_H12_15 00000000 FIRHC2 0000 FIRHC1 0000 DSS0_WB_FIR_COEF_H0_C_0 00000000 FIRHC0 0000 DSS0_WB_FIR_COEF_H0_C_1 00000000 FIRHC0 0000 DSS0_WB_FIR_COEF_H0_C_2 00000000 FIRHC0 0000 DSS0_WB_FIR_COEF_H0_C_3 00000000 FIRHC0 0000 DSS0_WB_FIR_COEF_H0_C_4 00000000 FIRHC0 0000 DSS0_WB_FIR_COEF_H0_C_5 00000000 FIRHC0 0000 DSS0_WB_FIR_COEF_H0_C_6 00000000 FIRHC0 0000 DSS0_WB_FIR_COEF_H0_C_7 00000000 FIRHC0 0000 DSS0_WB_FIR_COEF_H0_C_8 00000000 FIRHC0 0000 DSS0_WB_FIR_COEF_H0_0 00000000 FIRHC0 0000 DSS0_WB_FIR_COEF_H0_1 00000000 FIRHC0 0000 DSS0_WB_FIR_COEF_H0_2 00000000 FIRHC0 0000 DSS0_WB_FIR_COEF_H0_3 00000000 FIRHC0 0000 DSS0_WB_FIR_COEF_H0_4 00000000 FIRHC0 0000 DSS0_WB_FIR_COEF_H0_5 00000000 FIRHC0 0000 DSS0_WB_FIR_COEF_H0_6 00000000 FIRHC0 0000 DSS0_WB_FIR_COEF_H0_7 00000000 FIRHC0 0000 DSS0_WB_FIR_COEF_H0_8 00000000 FIRHC0 0000 DSS0_WB_BA_UV_0 00000000 DSS0_WB_BA_UV_1 00000000 DSS0_WB_BA_0 00000000 DSS0_WB_BA_1 00000000 DSS0_WB_ACCUV2_0 00000000 VERTICALACCU 000000 DSS0_WB_ACCUV2_1 00000000 VERTICALACCU 000000 DSS0_WB_ACCUV_0 00000000 VERTICALACCU 000000 DSS0_WB_ACCUV_1 00000000 VERTICALACCU 000000 DSS0_WB_ACCUH2_0 00000000 HORIZONTALACCU 000000 DSS0_WB_ACCUH2_1 00000000 HORIZONTALACCU 000000 DSS0_WB_ACCUH_0 00000000 HORIZONTALACCU 000000 DSS0_WB_ACCUH_1 00000000 HORIZONTALACCU 000000 ECAP EDP_CFG EDP_CORE_APB EDP_CORE_SAPB EDP_ECC_CORE EDP_ECC_DSC EDP_ECC_PHY ELM ENCODER EPWM EQEP ESM Firewall_Exception FSS GIC_ECC_AGGR GPIO GPMC GPU GTC0_GTC_CFG0 GTC0_GTC_CFG1 GTC0_GTC_CFG2 GTC0_GTC_CFG3 HyperBus I2C I3C INTR0_INTR_ROUTER_CFG Mailbox MCAN_Core MCAN_ECC_Aggregator MCAN_Subsystem MCASP MCSPI MCU_CPSW0_ALE MCU_CPSW0_CONTROL MCU_CPSW0_CPINT MCU_CPSW0_CPTS MCU_CPSW0_ECC MCU_CPSW0_MDIO MCU_CPSW0_NUSS_Subsystem__SS_ MCU_CPSW0_RAM MCU_CPSW0_SGMII MCU_CPSW0_STAT0 MCU_CPSW0_STAT1 MCU_CTRL_MMR0 MCU_NAVSS0_UDMASS_ECCAGGR0 MCU_PLL0_CFG MCU_SEC_MMR0_DBG_CTRL MLBSS MLBSS_Configuration MLBSS_ECC_Aggregator MLBSS_RAT MMCSD0_Host_Controller MMCSD0_RX_RAM_ECC_Aggregator MMCSD0_Subsystem MMCSD0_TX_RAM_ECC_Aggregator MMCSD1___MMCSD2_Host_Controller MMCSD1___MMCSD2_RX_RAM_ECC_Aggregator MMCSD1___MMCSD2_Subsystem MMCSD1___MMCSD2_TX_RAM_ECC_Aggregator MODSS_INTA_CFG MODSS_INTA_CFG_IMAP MODSS_INTA_CFG_INTR MSMC NAVSS0_CFG NAVSS0_CPTS NAVSS0_MCRC NAVSS0_NBSS_CFG_REGS0_MMRS NAVSS0_NBSS_NB0_MEM_ATTR0_CFG NAVSS0_NBSS_NB0_MEM_ATTR1_CFG NAVSS0_NBSS_NB1_MEM_ATTR0_CFG NAVSS0_NBSS_NB1_MEM_ATTR1_CFG NAVSS0_NBSS_NB_CFG_MMRS NAVSS0_PROXY0_BUF_CFG NAVSS0_PROXY0_CFG_BUF_CFG NAVSS0_PROXY_BUF NAVSS0_PROXY_TARGET0_DATA NAVSS0_PVU_CFG_TLBIF NAVSS0_SEC_PROXY0_CFG_MMRS NAVSS0_SEC_PROXY0_CFG_RT NAVSS0_SEC_PROXY0_CFG_SCFG NAVSS0_SEC_PROXY0_SRC_TARGET_DATA NAVSS0_UDMASS_RINGACC0_CFG NAVSS0_UDMASS_RINGACC0_CFG_MON NAVSS0_UDMASS_RINGACC0_CFG_RT NAVSS0_UDMASS_RINGACC0_GCFG NAVSS0_UDMASS_RINGACC0_SRC_FIFOS NAVSS_PVU_CFG Null_Error_Reporting OSPI PAT_CFG_MMRS PCIE_CORE_AXI PCIE_CORE_EP PCIE_CORE_EP_PF PCIE_CORE_EP_VF PCIE_CORE_LM PCIE0_CORE_DBN_CFG_PCIE_CORE PCIE1_CORE_DBN_CFG_PCIE_CORE PCIE2_CORE_DBN_CFG_PCIE_CORE PCIE3_CORE_DBN_CFG_PCIE_CORE PCIE_CPTS PCIE_ECC_AGGR0 PCIE_ECC_AGGR1 PCIE_HP_DAT0 PCIE_HP_DAT1 PCIE_INTD PCIE_LP_DAT0 PCIE_LP_DAT1 PCIE_USER_CFG PCIE_VMAP_HP PCIE_VMAP_LP PDMA5_ECC PI PLL0_CFG PLLCTRL0 PSC PSI_L_CFG_PROXY RAT RTI SEC_MMR0_DBG_CTRL Spinlock Time_Sync_Routers TIMERMGR_CFG_CFG TIMERMGR_CFG_OES TIMERMGR_CFG_TIMERS Timers UART UDMASS_INTA0_CFG UDMASS_INTA0_CFG_GCNTCFG UDMASS_INTA0_CFG_GCNTRTI UDMASS_INTA0_CFG_IMAP UDMASS_INTA0_CFG_INTR UDMASS_INTA0_CFG_L2G UDMASS_INTA0_CFG_MCAST UDMASS_RINGACC0_ISC_ISC UDMASS_UDMAP0_CFG UDMASS_UDMAP0_CFG_RCHAN UDMASS_UDMAP0_CFG_RCHANRT UDMASS_UDMAP0_CFG_RFLOW UDMASS_UDMAP0_CFG_TCHAN UDMASS_UDMAP0_CFG_TCHANRT UFS0_HCLK_ECC_AGGR_CFG UFS0_IPS_TCLK_ERR_INJ_CFG UFS0_P2A_WRAP_CFG_VBP_UFSHCI UFS0_SYSCFG_SS_CFG USB3P0SS_MMR_MMRVBP_USBSS_CMN USB_ECC_AGGR_CFG USB_RAMS_INJ_CFG VIM VIRTID_CFG_MMRS VPAC_CP_INTD VPAC_CTSET VPAC_ECC_AGGR VPAC_HTS VPAC_LDC VPAC_LDC_LSE VPAC_LDC_MEMCFG_LOOP_CBCR VPAC_LDC_MEMCFG_LOOP_MESH VPAC_LDC_MEMCFG_LOOP_Y VPAC_LDC_PIXWRINTF_DUALC_LUT VPAC_LDC_PIXWRINTF_DUALY_LUT VPAC_MSC_CORE VPAC_MSC_LSE VPAC_NF_CORE VPAC_NF_LSE VPAC_TOP VPAC_UTC0_RT_DRU VPAC_UTC0_RT_DRU_CAUSE VPAC_UTC0_RT_DRU_CHATOMIC_DEBUG VPAC_UTC0_RT_DRU_CHNRT VPAC_UTC0_RT_DRU_CHRT VPAC_UTC0_RT_DRU_QUEUE VPAC_UTC0_RT_DRU_SET VPAC_UTC1_NRT_DRU VPAC_UTC1_NRT_DRU_CAUSE VPAC_UTC1_NRT_DRU_CHATOMIC_DEBUG VPAC_UTC1_NRT_DRU_CHNRT VPAC_UTC1_NRT_DRU_CHRT VPAC_UTC1_NRT_DRU_QUEUE VPAC_UTC1_NRT_DRU_SET VPAC_VISS_ECC_AGGR VPAC_VISS_FCP_CFA VPAC_VISS_FCP_EE VPAC_VISS_FCP_FCC VPAC_VISS_FCP_FCC_C8G8 VPAC_VISS_FCP_FCC_CONTRASTC1 VPAC_VISS_FCP_FCC_CONTRASTC2 VPAC_VISS_FCP_FCC_CONTRASTC3 VPAC_VISS_FCP_FCC_HIST VPAC_VISS_FCP_FCC_LINE VPAC_VISS_FCP_FCC_S8B8 VPAC_VISS_FCP_FCC_Y8R8 VPAC_VISS_GLBCE_STATMEM VPAC_VISS_GLBCE_TOP VPAC_VISS_LSE VPAC_VISS_NSF4V VPAC_VISS_NSF4V_RAM VPAC_VISS_RAWFE VPAC_VISS_RAWFE_H3A VPAC_VISS_TOP VPFE WKUP_CTRL_MMR0 WKUP_GPIOMUX_INTRTR0 WKUP_VTM0