DDR3 PHY Config:-

          .pllcr          = 0x0005C000ul,
          .pgcr1_mask     = (IODDRM_MASK | ZCKSEL_MASK),
          .pgcr1_val      = ((1 << 2) | (1 << 7) | (1 << 23)),
          .ptr0           = 0x42C21590ul,
          .ptr1           = 0xD05612C0ul,
          .ptr2           = 0, /* not set in gel */
          .ptr3           = 0x0B4515C2ul,
          .ptr4           = 0x0A6E08B4ul,
          .dcr_mask       = (PDQ_MASK | MPRDQ_MASK | BYTEMASK_MASK),
          .dcr_val        = ((1 << 10)),
          .dtpr0          = 0x8558AA55ul,
          .dtpr1          = 0x32857280ul,
          .dtpr2          = 0x5002C200ul,
          .mr0            = 0x00001A60ul,
          .mr1            = 0x00000006ul,
          .mr2            = 0x00000010ul,
          .dtcr           = 0x710035C7ul,
          .pgcr2          = 0x00F065B8ul,
          .zq0cr1         = 0x0000005Dul,
          .zq1cr1         = 0x0000005Bul,
          .zq2cr1         = 0x0000005Bul,
          .pir_v1         = 0x00000033ul,
          .pir_v2         = 0x0000FF81ul,


DDR3 EMIF Config:-

          .sdcfg          = 0x66008AE2, 
          .sdtim1         = 0x125C8044ul,
          .sdtim2         = 0x00001D29ul,
          .sdtim3         = 0x32CDFF43ul,
          .sdtim4         = 0x543F0ADFul,
          .zqcfg          = 0x70073200ul,
          .sdrfc          = 0x00001457ul,