CCCCCCCC U-Boot SPL 2018.01-g313dcd69c2 (Dec 16 2018 - 09:01:09) Trying to boot from MMC1 *** Warning - bad CRC, using default environment U-Boot 2018.01-g313dcd69c2 (Dec 16 2018 - 09:01:09 +0000) CPU : AM335X-GP rev 2.1 Model: TI AM335x EVM DRAM: 1 GiB NAND: 256 MiB MMC: OMAP SD/MMC: 0 *** Warning - bad CRC, using default environment not set. Validating first E-fuse MAC Net: cpsw, usb_ether Hit any key to stop autoboot: 0 switch to partitions #0, OK mmc0 is current device SD/MMC found on device 0 ** Unable to read file boot.scr ** ** Unable to read file uEnv.txt ** switch to partitions #0, OK mmc0 is current device Scanning mmc 0:1... switch to partitions #0, OK mmc0 is current device SD/MMC found on device 0 3871232 bytes read in 388 ms (9.5 MiB/s) 41311 bytes read in 28 ms (1.4 MiB/s) ## Flattened Device Tree blob at 88000000 Booting using the fdt blob at 0x88000000 Loading Device Tree to 8fff2000, end 8ffff15e ... OK Starting kernel ... [ 0.000000] Booting Linux on physical CPU 0x0 [ 0.000000] Linux version 4.14.79-gbde58ab01e (oe-user@oe-host) (gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11)) #1 PREEMPT Thu Dec 20 04:12:32 UTC 2018 [ 0.000000] CPU: ARMv7 Processor [413fc082] revision 2 (ARMv7), cr=10c5387d [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache [ 0.000000] OF: fdt: Machine model: TI AM335x EVM [ 0.000000] Memory policy: Data cache writeback [ 0.000000] efi: Getting EFI parameters from FDT: [ 0.000000] efi: UEFI not found. [ 0.000000] cma: Reserved 48 MiB at 0xbd000000 [ 0.000000] CPU: All CPU(s) started in SVC mode. [ 0.000000] AM335X ES2.1 (sgx neon) [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 260416 [ 0.000000] Kernel command line: console=ttyO0,115200n8 root=PARTUUID=e66449b1-02 rw rootfstype=ext4 rootwait [ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) [ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) [ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) [ 0.000000] Memory: 976296K/1048576K available (8192K kernel code, 319K rwdata, 2544K rodata, 1024K init, 267K bss, 23128K reserved, 49152K cma-reserved, 212992K highmem) [ 0.000000] Virtual kernel memory layout: [ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) [ 0.000000] fixmap : 0xffc00000 - 0xfff00000 (3072 kB) [ 0.000000] vmalloc : 0xf0800000 - 0xff800000 ( 240 MB) [ 0.000000] lowmem : 0xc0000000 - 0xf0000000 ( 768 MB) [ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) [ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) [ 0.000000] .text : 0xc0008000 - 0xc0900000 (9184 kB) [ 0.000000] .init : 0xc0c00000 - 0xc0d00000 (1024 kB) [ 0.000000] .data : 0xc0d00000 - 0xc0d4fd40 ( 320 kB) [ 0.000000] .bss : 0xc0d4fd40 - 0xc0d92a8c ( 268 kB) [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1 [ 0.000000] Preemptible hierarchical RCU implementation. [ 0.000000] Tasks RCU enabled. [ 0.000000] NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16 [ 0.000000] IRQ: Found an INTC at 0xfa200000 (revision 5.0) with 128 interrupts [ 0.000000] OMAP clockevent source: timer2 at 24000000 Hz [ 0.000016] sched_clock: 32 bits at 24MHz, resolution 41ns, wraps every 89478484971ns [ 0.000034] clocksource: timer1: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 79635851949 ns [ 0.000044] OMAP clocksource: timer1 at 24000000 Hz [ 0.000209] timer_probe: no matching timers found [ 0.000410] Console: colour dummy device 80x30 [ 0.000438] WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0' [ 0.000444] This ensures that you still see kernel messages. Please [ 0.000449] update your kernel commandline. [ 0.000481] Calibrating delay loop... 996.14 BogoMIPS (lpj=4980736) [ 0.089189] pid_max: default: 32768 minimum: 301 [ 0.089368] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.089387] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.090143] CPU: Testing write buffer coherency: ok [ 0.090208] CPU0: Spectre v2: using BPIALL workaround [ 0.090900] Setting up static identity map for 0x80100000 - 0x80100060 [ 0.091044] Hierarchical SRCU implementation. [ 0.091361] EFI services will not be available. [ 0.092662] devtmpfs: initialized [ 0.100366] random: get_random_u32 called from bucket_table_alloc+0x8c/0x1ac with crng_init=0 [ 0.100830] VFP support v0.3: implementor 41 architecture 3 part 30 variant c rev 3 [ 0.101132] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns [ 0.101153] futex hash table entries: 256 (order: -1, 3072 bytes) [ 0.104656] pinctrl core: initialized pinctrl subsystem [ 0.105377] DMI not present or invalid. [ 0.105787] NET: Registered protocol family 16 [ 0.107841] DMA: preallocated 256 KiB pool for atomic coherent allocations [ 0.120658] omap_hwmod: debugss: _wait_target_disable failed [ 0.172929] cpuidle: using governor ladder [ 0.172963] cpuidle: using governor menu [ 0.176952] OMAP GPIO hardware version 0.1 [ 0.184978] omap-gpmc 50000000.gpmc: could not find pctldev for node /ocp/l4_wkup@44c00000/scm@210000/pinmux@800/nandflash_pins_s0, deferring probe [ 0.187656] No ATAGs? [ 0.187672] hw-breakpoint: debug architecture 0x4 unsupported. [ 0.199952] edma 49000000.edma: TI EDMA DMA engine driver [ 0.203526] omap_i2c 44e0b000.i2c: could not find pctldev for node /ocp/l4_wkup@44c00000/scm@210000/pinmux@800/pinmux_i2c0_pins, deferring probe [ 0.203591] omap_i2c 4802a000.i2c: could not find pctldev for node /ocp/l4_wkup@44c00000/scm@210000/pinmux@800/pinmux_i2c1_pins, deferring probe [ 0.203720] media: Linux media interface: v0.10 [ 0.203758] Linux video capture interface: v2.00 [ 0.203864] pps_core: LinuxPPS API ver. 1 registered [ 0.203871] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti [ 0.203891] PTP clock support registered [ 0.203923] EDAC MC: Ver: 3.0.0 [ 0.204406] dmi: Firmware registration failed. [ 0.204820] omap-mailbox 480c8000.mailbox: omap mailbox rev 0x400 [ 0.205160] Advanced Linux Sound Architecture Driver Initialized. [ 0.206299] clocksource: Switched to clocksource timer1 [ 0.213811] NET: Registered protocol family 2 [ 0.214522] TCP established hash table entries: 8192 (order: 3, 32768 bytes) [ 0.214601] TCP bind hash table entries: 8192 (order: 3, 32768 bytes) [ 0.214669] TCP: Hash tables configured (established 8192 bind 8192) [ 0.214801] UDP hash table entries: 512 (order: 1, 8192 bytes) [ 0.214825] UDP-Lite hash table entries: 512 (order: 1, 8192 bytes) [ 0.214981] NET: Registered protocol family 1 [ 0.215430] RPC: Registered named UNIX socket transport module. [ 0.215444] RPC: Registered udp transport module. [ 0.215450] RPC: Registered tcp transport module. [ 0.215456] RPC: Registered tcp NFSv4.1 backchannel transport module. [ 0.216587] hw perfevents: no interrupt-affinity property for /pmu, guessing. [ 0.216717] hw perfevents: enabled with armv7_cortex_a8 PMU driver, 5 counters available [ 0.218164] workingset: timestamp_bits=14 max_order=18 bucket_order=4 [ 0.221941] squashfs: version 4.0 (2009/01/31) Phillip Lougher [ 0.222751] NFS: Registering the id_resolver key type [ 0.222797] Key type id_resolver registered [ 0.222805] Key type id_legacy registered [ 0.222847] ntfs: driver 2.1.32 [Flags: R/O]. [ 0.224810] bounce: pool size: 64 pages [ 0.224909] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 245) [ 0.224921] io scheduler noop registered [ 0.224928] io scheduler deadline registered [ 0.225114] io scheduler cfq registered (default) [ 0.225124] io scheduler mq-deadline registered [ 0.225131] io scheduler kyber registered [ 0.226537] pinctrl-single 44e10800.pinmux: 142 pins at pa f9e10800 size 568 [ 0.229659] pwm-backlight backlight: backlight supply power not found, using dummy regulator [ 0.273722] Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled [ 0.276840] 44e09000.serial: ttyS0 at MMIO 0x44e09000 (irq = 30, base_baud = 3000000) is a 8250 [ 0.936117] console [ttyS0] enabled [ 0.940707] 48022000.serial: ttyS1 at MMIO 0x48022000 (irq = 31, base_baud = 3000000) is a 8250 [ 0.951348] omap_rng 48310000.rng: Random Number Generator ver. 20 [ 0.959353] panel panel: found backlight [ 0.963616] OF: graph: no port node found in /ocp/lcdc@4830e000 [ 0.969934] OF: graph: no port node found in /ocp/lcdc@4830e000 [ 0.976418] OF: graph: no port node found in /ocp/lcdc@4830e000 [ 0.982375] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). [ 0.989036] [drm] No driver support for vblank timestamp query. [ 1.037729] Console: switching to colour frame buffer device 100x30 [ 1.060064] tilcdc 4830e000.lcdc: fb0: frame buffer device [ 1.066223] [drm] Initialized tilcdc 1.0.0 20121205 for 4830e000.lcdc on minor 0 [ 1.084972] brd: module loaded [ 1.094861] loop: module loaded [ 1.100547] libphy: Fixed MDIO Bus: probed [ 1.176348] davinci_mdio 4a101000.mdio: davinci mdio revision 1.6, bus freq 1000000 [ 1.184059] davinci_mdio 4a101000.mdio: detected phy mask fffffffe [ 1.191482] libphy: 4a101000.mdio: probed [ 1.195555] davinci_mdio 4a101000.mdio: phy[0]: device 4a101000.mdio:00, driver Atheros 8031 ethernet [ 1.205820] cpsw 4a100000.ethernet: Detected MACID = d0:39:72:2a:1d:c4 [ 1.212662] cpsw 4a100000.ethernet: initialized cpsw ale version 1.4 [ 1.219145] cpsw 4a100000.ethernet: ALE Table size 1024 [ 1.224448] cpsw 4a100000.ethernet: cpts: overflow check period 500 (jiffies) [ 1.233061] i2c /dev entries driver [ 1.237148] IR NEC protocol handler initialized [ 1.241705] IR RC5(x/sz) protocol handler initialized [ 1.246844] IR RC6 protocol handler initialized [ 1.251391] IR JVC protocol handler initialized [ 1.255936] IR Sony protocol handler initialized [ 1.260587] IR SANYO protocol handler initialized [ 1.265309] IR Sharp protocol handler initialized [ 1.270039] IR MCE Keyboard/mouse protocol handler initialized [ 1.275900] IR XMP protocol handler initialized [ 1.281993] cpuidle: enable-method property 'ti,am3352' found operations [ 1.289185] sdhci: Secure Digital Host Controller Interface driver [ 1.295418] sdhci: Copyright(c) Pierre Ossman [ 1.300579] omap_hsmmc 48060000.mmc: Got CD GPIO [ 1.456622] sdhci-pltfm: SDHCI platform and OF driver helper [ 1.466205] ledtrig-cpu: registered to indicate activity on CPUs [ 1.478608] NET: Registered protocol family 10 [ 1.484259] Segment Routing with IPv6 [ 1.488200] sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver [ 1.494826] NET: Registered protocol family 17 [ 1.499706] Key type dns_resolver registered [ 1.504233] omap_voltage_late_init: Voltage driver support not added [ 1.516200] omap-gpmc 50000000.gpmc: GPMC revision 6.0 [ 1.521598] gpmc_mem_init: disabling cs 0 mapped at 0x0-0x1000000 [ 1.529586] nand: device found, Manufacturer ID: 0x2c, Chip ID: 0xda [ 1.536013] nand: Micron MT29F2G08ABAEAWP [ 1.540164] nand: 256 MiB, SLC, erase size: 128 KiB, page size: 2048, OOB size: 64 [ 1.547892] nand: using OMAP_ECC_BCH8_CODE_HW ECC scheme [ 1.553373] 10 ofpart partitions found on MTD device omap2-nand.0 [ 1.559518] Creating 10 MTD partitions on "omap2-nand.0": [ 1.564948] 0x000000000000-0x000000020000 : "NAND.SPL" [ 1.571203] 0x000000020000-0x000000040000 : "NAND.SPL.backup1" [ 1.577977] 0x000000040000-0x000000060000 : "NAND.SPL.backup2" [ 1.584663] 0x000000060000-0x000000080000 : "NAND.SPL.backup3" [ 1.591408] 0x000000080000-0x0000000c0000 : "NAND.u-boot-spl-os" [ 1.598327] 0x0000000c0000-0x0000001c0000 : "NAND.u-boot" [ 1.604956] 0x0000001c0000-0x0000001e0000 : "NAND.u-boot-env" [ 1.611587] 0x0000001e0000-0x000000200000 : "NAND.u-boot-env.backup1" [ 1.618921] 0x000000200000-0x000000a00000 : "NAND.kernel" [ 1.628834] 0x000000a00000-0x000010000000 : "NAND.file-system" [ 1.776563] tps65910 0-002d: No interrupt support, no core IRQ [ 1.784306] vrtc: supplied by vbat [ 1.791082] random: fast init done [ 1.794840] vio: supplied by vbat [ 1.799656] vdd1: supplied by vbat [ 1.804783] vdd2: supplied by vbat [ 1.811341] vdig1: supplied by vbat [ 1.816152] vdig2: supplied by vbat [ 1.820974] vpll: supplied by vbat [ 1.825693] vdac: supplied by vbat [ 1.830413] vaux1: supplied by vbat [ 1.835184] vaux2: supplied by vbat [ 1.840090] vaux33: supplied by vbat [ 1.845009] vmmc: supplied by vbat [ 1.849770] vbb: supplied by vbat [ 1.854216] omap_i2c 44e0b000.i2c: bus 0 rev0.11 at 400 kHz [ 1.861876] omap_i2c 4802a000.i2c: bus 1 rev0.11 at 100 kHz [ 1.869778] omap_hsmmc 48060000.mmc: Got CD GPIO [ 1.929617] input: volume_keys0 as /devices/platform/volume_keys0/input/input0 [ 1.941503] hctosys: unable to open rtc device (rtc0) [ 1.947579] lis3_reg: disabling [ 1.950822] wlan-en-regulator: disabling [ 1.955063] ALSA device list: [ 1.958328] No soundcards found. [ 1.965734] Waiting for root device PARTUUID=e66449b1-02... [ 2.066574] mmc1: host does not support reading read-only switch, assuming write-enable [ 2.078668] mmc1: new high speed SDHC card at address e624 [ 2.084892] mmcblk1: mmc1:e624 SU32G 29.7 GiB [ 2.093067] mmcblk1: p1 p2 [ 4.416042] EXT4-fs (mmcblk1p2): recovery complete [ 4.423903] EXT4-fs (mmcblk1p2): mounted filesystem with ordered data mode. Opts: (null) [ 4.432218] VFS: Mounted root (ext4 filesystem) on device 179:2. [ 4.444748] devtmpfs: mounted [ 4.449314] Freeing unused kernel memory: 1024K [ 4.815001] systemd[1]: System time before build time, advancing clock. [ 4.881778] systemd[1]: systemd 234 running in system mode. (+PAM -AUDIT -SELINUX +IMA -APPARMOR +SMACK +SYSVINIT +UTMP -LIBCRYPTSETUP -GCRYPT -GNUTLS +ACL +XZ -LZ4 -SECCOMP +BLKID -ELFUTILS +KMOD -IDN2 -IDN default-hierarchy=hybrid) [ 4.903503] systemd[1]: Detected architecture arm. Welcome to Arago 2018.10! [ 4.939278] systemd[1]: Set hostname to . [ 5.355271] systemd[1]: /lib/systemd/system/gadget-init.service:15: Unknown lvalue 'ExecStopPre' in section 'Service' [ 5.698814] random: systemd: uninitialized urandom read (16 bytes read) [ 5.709290] systemd[1]: Created slice User and Session Slice. [ OK ] Created slice User and Session Slice. [ 5.737262] random: systemd: uninitialized urandom read (16 bytes read) [ 5.744270] systemd[1]: Listening on Network Service Netlink Socket. [ OK ] Listening on Network Service Netlink Socket. [ 5.786991] random: systemd: uninitialized urandom read (16 bytes read) [ 5.794449] systemd[1]: Listening on Syslog Socket. [ OK ] Listening on Syslog Socket. [ 5.827224] systemd[1]: Reached target Remote File Systems. [ OK ] Reached target Remote File Systems. [ 5.858700] systemd[1]: Created slice System Slice. [ OK ] Created slice System Slice. [ 5.899102] systemd[1]: Mounting Kernel Debug File System... Mounting Kernel Debug File System... [ OK ] Listening on udev Control Socket. [ OK ] Reached target Swap. [ OK ] Created slice system-getty.slice. [ OK ] Listening on Journal Socket. Starting Create list of required stcce nodes for the current kernel... Mounting POSIX Message Queue File System... [ OK ] Listening on /dev/initctl Compatibility Named Pipe. [ OK ] Listening on udev Kernel Socket. [ OK ] Reached target Slices. [ OK ] Listening on Journal Socket (/dev/log). Mounting Temporary Directory (/tmp)... Starting Load Kernel Modules... [ OK ] Listening on Process Core Dump Socket. [ 6.380572] cryptodev: loading out-of-tree module taints kernel. [ 6.389519] cryptodev: driver 1.9 loaded. Starting Remount Root and Kernel File Systems... Starting Journal Service... [ 6.443815] usbcore: registered new interface driver usbfs [ OK ] Created slice system-serial\x2dgetty.slice. [ 6.476873] usbcore: registered new interface driver hub [ OK ] Started Forward Password Requests to Wall Directory Watch. [ 6.514229] EXT4-fs (mmcblk1p2): re-mounted. Opts: (null) [ 6.533656] usbcore: registered new device driver usb [ OK ] Started Dispatch Password Requests to Console[ 6.557351] usbcore: registered new interface driver usbserial Directory Watch. [ OK ] Reached target Paths. [ 6.602648] usbcore: registered new interface driver ftdi_sio [ 6.616687] usbserial: USB Serial support registered for FTDI USB Serial Device [ OK ] Mounted Kernel Debug File System. [ OK ] Mounted POSIX Message Queue File System. [ OK ] Mounted Temporary Directory (/tmp). [ OK ] Started Journal Service. [ OK ] Started Create list of required stacvice nodes for the current kernel. [ OK ] Started Load Kernel Modules. [ OK ] Started Remount Root and Kernel File Systems. Starting Rebuild Hardware Database... Starting Create System Users... Mounting Kernel Configuration File System... Starting Apply Kernel Variables... Starting Flush Journal to Persistent Storage... [ OK ] Mounted Kernel Configuration File System. [ OK ] Started Create System Users. [ OK ] Started Apply Kernel Variables. [ 7.297847] systemd-journald[68]: Received request to flush runtime journal from PID 1 Starting Create Static Device Nodes in /dev... [ OK ] Started Flush Journal to Persistent Storage. [ OK ] Started Create Static Device Nodes in /dev. [ OK ] Reached target Local File Systems (Pre). Mounting /var/volatile... Mounting /media/ram... Starting udev Kernel Device Manager... [ OK ] Mounted /var/volatile. [ OK ] Mounted /media/ram. Starting Load/Save Random Seed... [ OK ] Reached target Local File Systems. Starting Rebuild Journal Catalog... Starting Rebuild Dynamic Linker Cache... Starting Create Volatile Files and Directories... [ OK ] Started udev Kernel Device Manager. [ OK ] Started Load/Save Random Seed. [ OK ] Started Rebuild Journal Catalog. [ OK ] Started Create Volatile Files and Directories. Starting Update UTMP about System Boot/Shutdown... Starting Network Time Synchronization... [ OK ] Started Update UTMP about System Boot/Shutdown. [ OK ] Started Rebuild Dynamic Linker Cache. [ OK ] Started Network Time Synchronization. [ OK ] Reached target System Time Synchronized. [ OK ] Started Rebuild Hardware Database. Starting udev Coldplug all Devices... Starting Update is Completed... [ OK ] Started Update is Completed. [ OK ] Started udev Coldplug all Devices. [ OK ] Reached target System Initialization. [ OK ] Started Daily rotation of log files. [ 15.209507] input: matrix_keypad0 as /devices/platform/matrix_keypad0/input/input1 [ OK ] Started Daily Cleanup of Temporary Directories. [ OK ] Reached target Timers. [ OK ] Listening on RPCbind Server Activation Socket. [ OK ] Listening on D-Bus System Message Bus Socket. [ OK ] Listening on Avahi mDNS/DNS-SD Stack Activation Socket. [ 15.414431] omap_wdt: OMAP Watchdog Timer Rev 0x01: initial timeout 60 sec [ 15.439491] omap_rtc 44e3e000.rtc: registered as rtc0 [ OK ] Listening on dropbear.socket. [ OK ] Reached target Sockets. [ OK ] Reached target Basic System. [ OK ] Started Periodic Command Scheduler. [ OK ] Started Hardware RNG Entropy Gatherer Daemon. Starting RPC Bind Service... [ 15.785135] random: crng init done [ 15.825171] random: 7 urandom warning(s) missed due to ratelimiting Starting Login Service... Starting uim-sysfs.service... [ OK ] Started Kernel Logging Service. Starting Print notice about GPLv3 packages... [ OK ] Started D-Bus System Message Bus. [ 16.417548] tlv320aic3x-codec 1-001b: Too high supply voltage(s) AVDD: 3300000, DVDD: 5000000 [ OK ] Reached target Containers. [ OK ] Started Job spooling tools. Starting Avahi mDNS/DNS-SD Stack... [ OK ] Started System Logging Service. Starting Network Service... [ OK ] Started RPC Bind Service. [ OK ] Found device /dev/ttyS0. [ 17.857817] omap-sham 53100000.sham: hw accel on OMAP rev 4.3 [ OK ] Started Avahi mDNS/DNS-SD Stack. [ OK ] Started Login Service. [ OK ] Created slice system-systemd\x2dbacklight.slice. [ 18.067937] omap-aes 53500000.aes: OMAP AES hw accel rev: 3.2 Starting Load/Save Screen Backlightcightness of backlight:backlight... [ 18.106541] omap-aes 53500000.aes: will run requests pump with realtime priority [ OK ] Started Network Service. Starting Wait for Network to be Configured... [ OK ] Reached target Network. [ 18.366266] remoteproc remoteproc0: wkup_m3 is available [ 18.476174] [drm] Initialized pvr 1.14.3699939 20110701 for 56000000.sgx on minor 1 [ OK ] Started Redis In-Memory Data Store. Starting Lightning Fast Webserver With Light System Requirements... Starting Permit User Sessions... Starting Enable and configure wl18xx bluetooth stack... Starting Simple Network Management Protocol (SNMP) Daemon.... Starting Network Name Resolution... [ OK ] Started Load/Save Screen Backlight Brightness of backlight:backlight. [ OK ] Started Lightning Fast Webserver With Light System Requirements. [ OK ] Started Permit User Sessions. [ OK ] Started Getty on tty1. [ OK ] Started Serial Getty on ttyS0. [ 20.548133] remoteproc remoteproc0: powering up wkup_m3 [ 20.569847] PM: Cannot get wkup_m3_ipc handle [ 20.665939] remoteproc remoteproc0: Booting fw image am335x-pm-firmware.elf, size 224628 [ 20.666205] remoteproc remoteproc0: remote processor wkup_m3 is now up [ 20.666231] wkup_m3_ipc 44e11324.wkup_m3_ipc: CM3 Firmware Version = 0x192 [ 20.691419] net eth0: initializing cpsw version 1.12 (0) [ 20.838205] Atheros 8031 ethernet 4a101000.mdio:00: attached PHY driver [Atheros 8031 ethernet] (mii_bus:phy_addr=4a101000.mdio:00, irq=POLL) [ 20.926615] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready [ 20.962738] FAT-fs (mmcblk1p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck. [ OK ] Started Network Name Resolution. [ 21.613109] asoc-simple-card sound: tlv320aic3x-hifi <-> 4803c000.mcasp mapping ok [ 21.703332] asoc-simple-card sound: ASoC: no DMI vendor name! [ 21.795948] PM: bootloader does not support rtc-only! [ OK ] Found device /dev/ttyS3. [ OK ] Started Enable and configure wl18xx bluetooth stack. [ OK ] Started Simple Network Management Protocol (SNMP) Daemon.. [ OK ] Started uim-sysfs.service. [ OK ] Listening on Load/Save RF Kill Switch Status /dev/rfkill Watch. Starting rc.pvr.service... [ OK ] Started Serial Getty on ttyS3. [ OK ] Reached target Host and Network Name Lookups. [ OK ] Started NFS status monitor for NFSv2/3 locking.. [ 25.455823] PVR_K: UM DDK-(3699939) and KM DDK-(3699939) match. [ OK ] _____ _____ _ _ | _ |___ ___ ___ ___ | _ |___ ___ |_|___ ___| |_ | | _| .'| . | . | | __| _| . | | | -_| _| _| |__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_| |___| |___| Arago Project http://arago-project.org am335x-evm ttyS0 Arago 2018.10 am335x-evm ttyS0 am335x-evm login: [ 28.842989] input: ti-tsc as /devices/platform/ocp/44e0d000.tscadc/44e0d000.tscadc:tsc/input/input2 [ 28.989672] am335x-phy-driver 47401300.usb-phy: 47401300.usb-phy supply vcc not found, using dummy regulator [ 29.027882] am335x-phy-driver 47401b00.usb-phy: 47401b00.usb-phy supply vcc not found, using dummy regulator [ 29.044227] musb-hdrc musb-hdrc.0: MUSB HDRC host driver [ 29.044275] musb-hdrc musb-hdrc.0: new USB bus registered, assigned bus number 1 [ 29.129772] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002 [ 29.129782] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1 [ 29.129787] usb usb1: Product: MUSB HDRC host driver [ 29.129792] usb usb1: Manufacturer: Linux 4.14.79-gbde58ab01e musb-hcd [ 29.129797] usb usb1: SerialNumber: musb-hdrc.0 [ 29.130599] hub 1-0:1.0: USB hub found [ 29.130647] hub 1-0:1.0: 1 port detected [ 29.154834] musb-hdrc musb-hdrc.1: MUSB HDRC host driver [ 29.154866] musb-hdrc musb-hdrc.1: new USB bus registered, assigned bus number 2 [ 29.247373] usb usb2: New USB device found, idVendor=1d6b, idProduct=0002 [ 29.247382] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1 [ 29.247388] usb usb2: Product: MUSB HDRC host driver [ 29.247393] usb usb2: Manufacturer: Linux 4.14.79-gbde58ab01e musb-hcd [ 29.247397] usb usb2: SerialNumber: musb-hdrc.1 [ 29.248146] hub 2-0:1.0: USB hub found [ 29.248200] hub 2-0:1.0: 1 port detected [ 29.518840] pruss 4a300000.pruss: creating PRU cores and other child platform devices [ 30.535322] remoteproc remoteproc1: 4a334000.pru is available [ 30.574501] pru-rproc 4a334000.pru: PRU rproc node /ocp/pruss_soc_bus@4a326004/pruss@0/pru@34000 probed successfully [ 30.667574] remoteproc remoteproc2: 4a338000.pru is available [ 30.716680] pru-rproc 4a338000.pru: PRU rproc node /ocp/pruss_soc_bus@4a326004/pruss@0/pru@38000 probed successfully *************************************************************** *************************************************************** NOTICE: This file system contains the following GPLv3 packages: autoconf bash-dev bash binutils cifs-utils cpio cpp-symlinks cpp dosfstools elfutils findutils g++-symlinks g++ gawk gcc-symlinks gcc gdb gdbserver gettext glmark2 gstreamer1.0-libav gzip hidapi libdw1 libelf1 libgdbm-compat4 libgdbm-dev libgdbm4 libgettextlib libgettextsrc libgmp10 libidn11 libmavconn libmpc3 libmpfr4 libreadline-dev libreadline7 libunistring2 m4-dev m4 make mavlink mavros-extras mavros-msgs mavros nettle python3-pycairo socketcan-interface which If you do not wish to distribute GPLv3 components please remove the above packages prior to distribution. This can be done using the opkg remove command. i.e.: opkg remove Where is the name printed in the list above NOTE: If the package is a dependency of another package you will be notified of the dependent packages. You should use the --force-removal-of-dependent-packages option to also remove the dependent packages as well *************************************************************** *************************************************************** [ 139.272131] NET: Registered protocol family 15 [ 139.483307] Initializing XFRM netlink socket root root@am335x-evm:~# omapconf show dpll OMAPCONF (rev v1.73 built Sun Dec 16 06:48:07 UTC 2018) HW Platform: Generic AM33XX (Flattened Device Tree) AM3358 ES2.1 GP Device (UNKNOWN performance ZCZ package (1.0GHz)) Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed UNKNOWN POWER IC Error: I2C Read failed UNKNOWN AUDIO IC SW Build Details: Build: Version: _____ _____ _ _ Kernel: Version: 4.14.79-gbde58ab01e Author: oe-user@oe-host Toolchain: gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11 Type: #1 PREEMPT Date: Thu Dec 20 04:12:32 UTC 2018 |--------------------------------------------| | DPLL Configuration | DPLL_PER | |--------------------------------------------| | Status | Locked | | | | | Mode | Lock | | Automatic Control | Not Supported | | LPST = Low-Power STop | | | LPBP = Low-Power ByPass | | | FRBP = Fast-Relock ByPass | | | MNBP = MN ByPass | | | | | | Sigma-Delta Divider | 4 | | SELFREQDCO | 0 | | | | | Ref. Frequency (MHz) | 24.000 | | M Multiplier Factor | 400 | | N Divider Factor | 9 | | Lock Frequency (MHz) | 960 | | | | | CLKOUT Output | | | Status | Enabled | | Clock Divider | 5 | | Clock Speed (MHz) | 192 | | | | | CLK_DCO_LDO Output | | | Status | Gated | | Clock Speed (MHz) | 960 | | | | |--------------------------------------------| |---------------------------------------------------------------------------------------------| | DPLL Configuration | DPLL_CORE | DPLL_MPU | DPLL_DDR | DPLL_DISP | |---------------------------------------------------------------------------------------------| | Status | Locked | Locked | Locked | Locked | | | | | | | | Mode | Lock | Lock | Lock | Lock | | Automatic Control | Not Supported | Not Supported | Not Supported | Not Supported | | LPBP = Low-Power ByPass | | | | | | FRBP = Fast-Relock ByPass | | | | | | MNBP = MN ByPass | | | | | | Low-Power Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Automatic Recalibration | Disabled | Disabled | Disabled | Disabled | | Clock Ramping during Relock | Disabled | Disabled | Disabled | Disabled | | Ramping Rate (x REFCLK(s)) | 2 | 2 | 2 | 2 | | Ramping Levels | No Ramp | No Ramp | No Ramp | No Ramp | | | | | | | | Bypass Clock | CLKINP | CLKINP | CLKINP | CLKINP | | Bypass Clock Divider | | | | | | REGM4XEN Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Ref. Frequency (MHz) | 24.000 | 24.000 | 24.000 | 24.000 | | M Multiplier Factor | 125 | 25 | 101 | 5 | | N Divider Factor | 2 | 1 | 3 | 1 | | Lock Frequency (MHz) | 1000 | 300 | 606 | 60 | | | | | | | | M2 Output | | | | | | Status | | Enabled | Enabled | Enabled | | Clock Divider | | 1 | 2 | 1 | | Clock Speed (MHz) | | 300 | 303 | 60 | | | | | | | | CLK_DCO_LDO Output | | | | | | Status | Gated | | | | | Clock Speed (MHz) | 2000 | | | | | | | | | | | | | | | | | M4 Output | | | | | | Status | Enabled | | | | | Clock Divider | 10 | | | | | Clock Speed (MHz) | 200 | | | | | | | | | | | M5 Output | | | | | | Status | Enabled | | | | | Clock Divider | 8 | | | | | Clock Speed (MHz) | 250 | | | | | | | | | | | M6 Output | | | | | | Status | Gated | | | | | Clock Divider | 4 | | | | | Clock Speed (MHz) | 500 | | | | |---------------------------------------------------------------------------------------------| root@am335x-evm:~# omapconf dump dpll OMAPCONF (rev v1.73 built Sun Dec 16 06:48:07 UTC 2018) HW Platform: Generic AM33XX (Flattened Device Tree) AM3358 ES2.1 GP Device (UNKNOWN performance ZCZ package (1.0GHz)) Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed UNKNOWN POWER IC Error: I2C Read failed UNKNOWN AUDIO IC SW Build Details: Build: Version: _____ _____ _ _ Kernel: Version: 4.14.79-gbde58ab01e Author: oe-user@oe-host Toolchain: gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11 Type: #1 PREEMPT Date: Thu Dec 20 04:12:32 UTC 2018 |--------------------------------------------------------| | DPLL_PER Reg. Name | Reg. Address | Reg. Value | |--------------------------------------------------------| | CM_CLKMODE_DPLL_PER | 0x44E0048C | 0x00000007 | | CM_IDLEST_DPLL_PER | 0x44E00470 | 0x00000001 | | CM_AUTOIDLE_DPLL_PER | 0x44E0046C | 0x00000000 | | CM_CLKSEL_DPLL_PERIPH | 0x44E0049C | 0x04019009 | | CM_DIV_M2_DPLL_PER | 0x44E004AC | 0x00000285 | | CM_SSC_DELTAMSTEP_DPLL_PER | 0x44E00474 | 0x00000000 | | CM_SSC_MODFREQDIV_DPLL_PER | 0x44E00478 | 0x00000000 | | CM_CLKDCOLDO_DPLL_PER | 0x44E0047C | 0x00000000 | |--------------------------------------------------------| |---------------------------------------------------------| | DPLL_CORE Reg. Name | Reg. Address | Reg. Value | |---------------------------------------------------------| | CM_CLKMODE_DPLL_CORE | 0x44E00490 | 0x00000007 | | CM_IDLEST_DPLL_CORE | 0x44E0045C | 0x00000001 | | CM_AUTOIDLE_DPLL_CORE | 0x44E00458 | 0x00000000 | | CM_CLKSEL_DPLL_CORE | 0x44E00468 | 0x00007D02 | | CM_SSC_DELTAMSTEP_DPLL_CORE | 0x44E00460 | 0x00000000 | | CM_SSC_MODFREQDIV_DPLL_CORE | 0x44E00464 | 0x00000000 | | CM_DIV_M4_DPLL_CORE | 0x44E00480 | 0x0000022A | | CM_DIV_M5_DPLL_CORE | 0x44E00484 | 0x00000228 | | CM_DIV_M6_DPLL_CORE | 0x44E004D8 | 0x00000004 | |---------------------------------------------------------| |--------------------------------------------------------| | DPLL_MPU Reg. Name | Reg. Address | Reg. Value | |--------------------------------------------------------| | CM_CLKMODE_DPLL_MPU | 0x44E00488 | 0x00000007 | | CM_IDLEST_DPLL_MPU | 0x44E00420 | 0x00000001 | | CM_AUTOIDLE_DPLL_MPU | 0x44E0041C | 0x00000000 | | CM_CLKSEL_DPLL_MPU | 0x44E0042C | 0x00007D02 | | CM_DIV_M2_DPLL_MPU | 0x44E004A8 | 0x00000201 | | CM_SSC_DELTAMSTEP_DPLL_MPU | 0x44E00424 | 0x00000000 | | CM_SSC_MODFREQDIV_DPLL_MPU | 0x44E00428 | 0x00000000 | |--------------------------------------------------------| |--------------------------------------------------------| | DPLL_DDR Reg. Name | Reg. Address | Reg. Value | |--------------------------------------------------------| | CM_CLKMODE_DPLL_DDR | 0x44E00494 | 0x00000007 | | CM_IDLEST_DPLL_DDR | 0x44E00434 | 0x00000001 | | CM_AUTOIDLE_DPLL_DDR | 0x44E00430 | 0x00000000 | | CM_CLKSEL_DPLL_DDR | 0x44E00440 | 0x00006503 | | CM_DIV_M2_DPLL_DDR | 0x44E004A0 | 0x00000222 | | CM_SSC_DELTAMSTEP_DPLL_DDR | 0x44E00438 | 0x00000000 | | CM_SSC_MODFREQDIV_DPLL_DDR | 0x44E0043C | 0x00000000 | |--------------------------------------------------------| |---------------------------------------------------------| | DPLL_DISP Reg. Name | Reg. Address | Reg. Value | |---------------------------------------------------------| | CM_CLKMODE_DPLL_DISP | 0x44E00498 | 0x00000007 | | CM_IDLEST_DPLL_DISP | 0x44E00448 | 0x00000001 | | CM_AUTOIDLE_DPLL_DISP | 0x44E00444 | 0x00000000 | | CM_CLKSEL_DPLL_DISP | 0x44E00454 | 0x00000501 | | CM_DIV_M2_DPLL_DISP | 0x44E004A4 | 0x00000201 | | CM_SSC_DELTAMSTEP_DPLL_DISP | 0x44E0044C | 0x00000000 | | CM_SSC_MODFREQDIV_DPLL_DISP | 0x44E00450 | 0x00000000 | |---------------------------------------------------------| root@am335x-evm:~# omapconf read 0x44E004a8 00000201 root@am335x-evm:~# devmem2 0x44E004A8 /dev/mem opened. Memory mapped at address 0xb6efc000. Read at address 0x44E004A8 (0xb6efc4a8): 0x00000201 root@am335x-evm:~# cat /sys/devices/system/cpu/cpu0/cpufreq/cpuinfo_cur_freq 600000 root@am335x-evm:~# omapconf show dpll OMAPCONF (rev v1.73 built Sun Dec 16 06:48:07 UTC 2018) HW Platform: Generic AM33XX (Flattened Device Tree) AM3358 ES2.1 GP Device (UNKNOWN performance ZCZ package (1.0GHz)) Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed UNKNOWN POWER IC Error: I2C Read failed UNKNOWN AUDIO IC SW Build Details: Build: Version: _____ _____ _ _ Kernel: Version: 4.14.79-gbde58ab01e Author: oe-user@oe-host Toolchain: gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11 Type: #1 PREEMPT Date: Thu Dec 20 04:12:32 UTC 2018 |--------------------------------------------| | DPLL Configuration | DPLL_PER | |--------------------------------------------| | Status | Locked | | | | | Mode | Lock | | Automatic Control | Not Supported | | LPST = Low-Power STop | | | LPBP = Low-Power ByPass | | | FRBP = Fast-Relock ByPass | | | MNBP = MN ByPass | | | | | | Sigma-Delta Divider | 4 | | SELFREQDCO | 0 | | | | | Ref. Frequency (MHz) | 24.000 | | M Multiplier Factor | 400 | | N Divider Factor | 9 | | Lock Frequency (MHz) | 960 | | | | | CLKOUT Output | | | Status | Enabled | | Clock Divider | 5 | | Clock Speed (MHz) | 192 | | | | | CLK_DCO_LDO Output | | | Status | Gated | | Clock Speed (MHz) | 960 | | | | |--------------------------------------------| |---------------------------------------------------------------------------------------------| | DPLL Configuration | DPLL_CORE | DPLL_MPU | DPLL_DDR | DPLL_DISP | |---------------------------------------------------------------------------------------------| | Status | Locked | Locked | Locked | Locked | | | | | | | | Mode | Lock | Lock | Lock | Lock | | Automatic Control | Not Supported | Not Supported | Not Supported | Not Supported | | LPBP = Low-Power ByPass | | | | | | FRBP = Fast-Relock ByPass | | | | | | MNBP = MN ByPass | | | | | | Low-Power Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Automatic Recalibration | Disabled | Disabled | Disabled | Disabled | | Clock Ramping during Relock | Disabled | Disabled | Disabled | Disabled | | Ramping Rate (x REFCLK(s)) | 2 | 2 | 2 | 2 | | Ramping Levels | No Ramp | No Ramp | No Ramp | No Ramp | | | | | | | | Bypass Clock | CLKINP | CLKINP | CLKINP | CLKINP | | Bypass Clock Divider | | | | | | REGM4XEN Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Ref. Frequency (MHz) | 24.000 | 24.000 | 24.000 | 24.000 | | M Multiplier Factor | 125 | 100 | 101 | 5 | | N Divider Factor | 2 | 2 | 3 | 1 | | Lock Frequency (MHz) | 1000 | 800 | 606 | 60 | | | | | | | | M2 Output | | | | | | Status | | Enabled | Enabled | Enabled | | Clock Divider | | 1 | 2 | 1 | | Clock Speed (MHz) | | 800 | 303 | 60 | | | | | | | | CLK_DCO_LDO Output | | | | | | Status | Gated | | | | | Clock Speed (MHz) | 2000 | | | | | | | | | | | | | | | | | M4 Output | | | | | | Status | Enabled | | | | | Clock Divider | 10 | | | | | Clock Speed (MHz) | 200 | | | | | | | | | | | M5 Output | | | | | | Status | Enabled | | | | | Clock Divider | 8 | | | | | Clock Speed (MHz) | 250 | | | | | | | | | | | M6 Output | | | | | | Status | Gated | | | | | Clock Divider | 4 | | | | | Clock Speed (MHz) | 500 | | | | |---------------------------------------------------------------------------------------------| root@am335x-evm:~# omapconf show dpll OMAPCONF (rev v1.73 built Sun Dec 16 06:48:07 UTC 2018) HW Platform: Generic AM33XX (Flattened Device Tree) AM3358 ES2.1 GP Device (UNKNOWN performance ZCZ package (1.0GHz)) Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed UNKNOWN POWER IC Error: I2C Read failed UNKNOWN AUDIO IC SW Build Details: Build: Version: _____ _____ _ _ Kernel: Version: 4.14.79-gbde58ab01e Author: oe-user@oe-host Toolchain: gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11 Type: #1 PREEMPT Date: Thu Dec 20 04:12:32 UTC 2018 |--------------------------------------------| | DPLL Configuration | DPLL_PER | |--------------------------------------------| | Status | Locked | | | | | Mode | Lock | | Automatic Control | Not Supported | | LPST = Low-Power STop | | | LPBP = Low-Power ByPass | | | FRBP = Fast-Relock ByPass | | | MNBP = MN ByPass | | | | | | Sigma-Delta Divider | 4 | | SELFREQDCO | 0 | | | | | Ref. Frequency (MHz) | 24.000 | | M Multiplier Factor | 400 | | N Divider Factor | 9 | | Lock Frequency (MHz) | 960 | | | | | CLKOUT Output | | | Status | Enabled | | Clock Divider | 5 | | Clock Speed (MHz) | 192 | | | | | CLK_DCO_LDO Output | | | Status | Enabled | | Clock Speed (MHz) | 960 | | | | |--------------------------------------------| |---------------------------------------------------------------------------------------------| | DPLL Configuration | DPLL_CORE | DPLL_MPU | DPLL_DDR | DPLL_DISP | |---------------------------------------------------------------------------------------------| | Status | Locked | Locked | Locked | Locked | | | | | | | | Mode | Lock | Lock | Lock | Lock | | Automatic Control | Not Supported | Not Supported | Not Supported | Not Supported | | LPBP = Low-Power ByPass | | | | | | FRBP = Fast-Relock ByPass | | | | | | MNBP = MN ByPass | | | | | | Low-Power Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Automatic Recalibration | Disabled | Disabled | Disabled | Disabled | | Clock Ramping during Relock | Disabled | Disabled | Disabled | Disabled | | Ramping Rate (x REFCLK(s)) | 2 | 2 | 2 | 2 | | Ramping Levels | No Ramp | No Ramp | No Ramp | No Ramp | | | | | | | | Bypass Clock | CLKINP | CLKINP | CLKINP | CLKINP | | Bypass Clock Divider | | | | | | REGM4XEN Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Ref. Frequency (MHz) | 24.000 | 24.000 | 24.000 | 24.000 | | M Multiplier Factor | 125 | 30 | 101 | 5 | | N Divider Factor | 2 | 0 | 3 | 1 | | Lock Frequency (MHz) | 1000 | 720 | 606 | 60 | | | | | | | | M2 Output | | | | | | Status | | Enabled | Enabled | Enabled | | Clock Divider | | 1 | 2 | 1 | | Clock Speed (MHz) | | 720 | 303 | 60 | | | | | | | | CLK_DCO_LDO Output | | | | | | Status | Gated | | | | | Clock Speed (MHz) | 2000 | | | | | | | | | | | | | | | | | M4 Output | | | | | | Status | Enabled | | | | | Clock Divider | 10 | | | | | Clock Speed (MHz) | 200 | | | | | | | | | | | M5 Output | | | | | | Status | Enabled | | | | | Clock Divider | 8 | | | | | Clock Speed (MHz) | 250 | | | | | | | | | | | M6 Output | | | | | | Status | Gated | | | | | Clock Divider | 4 | | | | | Clock Speed (MHz) | 500 | | | | |---------------------------------------------------------------------------------------------| root@am335x-evm:~# omapconf show dpll OMAPCONF (rev v1.73 built Sun Dec 16 06:48:07 UTC 2018) HW Platform: Generic AM33XX (Flattened Device Tree) AM3358 ES2.1 GP Device (UNKNOWN performance ZCZ package (1.0GHz)) Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed UNKNOWN POWER IC Error: I2C Read failed UNKNOWN AUDIO IC SW Build Details: Build: Version: _____ _____ _ _ Kernel: Version: 4.14.79-gbde58ab01e Author: oe-user@oe-host Toolchain: gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11 Type: #1 PREEMPT Date: Thu Dec 20 04:12:32 UTC 2018 |--------------------------------------------| | DPLL Configuration | DPLL_PER | |--------------------------------------------| | Status | Locked | | | | | Mode | Lock | | Automatic Control | Not Supported | | LPST = Low-Power STop | | | LPBP = Low-Power ByPass | | | FRBP = Fast-Relock ByPass | | | MNBP = MN ByPass | | | | | | Sigma-Delta Divider | 4 | | SELFREQDCO | 0 | | | | | Ref. Frequency (MHz) | 24.000 | | M Multiplier Factor | 400 | | N Divider Factor | 9 | | Lock Frequency (MHz) | 960 | | | | | CLKOUT Output | | | Status | Enabled | | Clock Divider | 5 | | Clock Speed (MHz) | 192 | | | | | CLK_DCO_LDO Output | | | Status | Gated | | Clock Speed (MHz) | 960 | | | | |--------------------------------------------| |---------------------------------------------------------------------------------------------| | DPLL Configuration | DPLL_CORE | DPLL_MPU | DPLL_DDR | DPLL_DISP | |---------------------------------------------------------------------------------------------| | Status | Locked | Locked | Locked | Locked | | | | | | | | Mode | Lock | Lock | Lock | Lock | | Automatic Control | Not Supported | Not Supported | Not Supported | Not Supported | | LPBP = Low-Power ByPass | | | | | | FRBP = Fast-Relock ByPass | | | | | | MNBP = MN ByPass | | | | | | Low-Power Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Automatic Recalibration | Disabled | Disabled | Disabled | Disabled | | Clock Ramping during Relock | Disabled | Disabled | Disabled | Disabled | | Ramping Rate (x REFCLK(s)) | 2 | 2 | 2 | 2 | | Ramping Levels | No Ramp | No Ramp | No Ramp | No Ramp | | | | | | | | Bypass Clock | CLKINP | CLKINP | CLKINP | CLKINP | | Bypass Clock Divider | | | | | | REGM4XEN Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Ref. Frequency (MHz) | 24.000 | 24.000 | 24.000 | 24.000 | | M Multiplier Factor | 125 | 30 | 101 | 5 | | N Divider Factor | 2 | 0 | 3 | 1 | | Lock Frequency (MHz) | 1000 | 720 | 606 | 60 | | | | | | | | M2 Output | | | | | | Status | | Enabled | Enabled | Enabled | | Clock Divider | | 1 | 2 | 1 | | Clock Speed (MHz) | | 720 | 303 | 60 | | | | | | | | CLK_DCO_LDO Output | | | | | | Status | Gated | | | | | Clock Speed (MHz) | 2000 | | | | | | | | | | | | | | | | | M4 Output | | | | | | Status | Enabled | | | | | Clock Divider | 10 | | | | | Clock Speed (MHz) | 200 | | | | | | | | | | | M5 Output | | | | | | Status | Enabled | | | | | Clock Divider | 8 | | | | | Clock Speed (MHz) | 250 | | | | | | | | | | | M6 Output | | | | | | Status | Gated | | | | | Clock Divider | 4 | | | | | Clock Speed (MHz) | 500 | | | | |---------------------------------------------------------------------------------------------| root@am335x-evm:~# omapconf show dpll OMAPCONF (rev v1.73 built Sun Dec 16 06:48:07 UTC 2018) HW Platform: Generic AM33XX (Flattened Device Tree) AM3358 ES2.1 GP Device (UNKNOWN performance ZCZ package (1.0GHz)) Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed UNKNOWN POWER IC Error: I2C Read failed UNKNOWN AUDIO IC SW Build Details: Build: Version: _____ _____ _ _ Kernel: Version: 4.14.79-gbde58ab01e Author: oe-user@oe-host Toolchain: gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11 Type: #1 PREEMPT Date: Thu Dec 20 04:12:32 UTC 2018 |--------------------------------------------| | DPLL Configuration | DPLL_PER | |--------------------------------------------| | Status | Locked | | | | | Mode | Lock | | Automatic Control | Not Supported | | LPST = Low-Power STop | | | LPBP = Low-Power ByPass | | | FRBP = Fast-Relock ByPass | | | MNBP = MN ByPass | | | | | | Sigma-Delta Divider | 4 | | SELFREQDCO | 0 | | | | | Ref. Frequency (MHz) | 24.000 | | M Multiplier Factor | 400 | | N Divider Factor | 9 | | Lock Frequency (MHz) | 960 | | | | | CLKOUT Output | | | Status | Enabled | | Clock Divider | 5 | | Clock Speed (MHz) | 192 | | | | | CLK_DCO_LDO Output | | | Status | Gated | | Clock Speed (MHz) | 960 | | | | |--------------------------------------------| |---------------------------------------------------------------------------------------------| | DPLL Configuration | DPLL_CORE | DPLL_MPU | DPLL_DDR | DPLL_DISP | |---------------------------------------------------------------------------------------------| | Status | Locked | Locked | Locked | Locked | | | | | | | | Mode | Lock | Lock | Lock | Lock | | Automatic Control | Not Supported | Not Supported | Not Supported | Not Supported | | LPBP = Low-Power ByPass | | | | | | FRBP = Fast-Relock ByPass | | | | | | MNBP = MN ByPass | | | | | | Low-Power Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Automatic Recalibration | Disabled | Disabled | Disabled | Disabled | | Clock Ramping during Relock | Disabled | Disabled | Disabled | Disabled | | Ramping Rate (x REFCLK(s)) | 2 | 2 | 2 | 2 | | Ramping Levels | No Ramp | No Ramp | No Ramp | No Ramp | | | | | | | | Bypass Clock | CLKINP | CLKINP | CLKINP | CLKINP | | Bypass Clock Divider | | | | | | REGM4XEN Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Ref. Frequency (MHz) | 24.000 | 24.000 | 24.000 | 24.000 | | M Multiplier Factor | 125 | 25 | 101 | 5 | | N Divider Factor | 2 | 0 | 3 | 1 | | Lock Frequency (MHz) | 1000 | 600 | 606 | 60 | | | | | | | | M2 Output | | | | | | Status | | Enabled | Enabled | Enabled | | Clock Divider | | 1 | 2 | 1 | | Clock Speed (MHz) | | 600 | 303 | 60 | | | | | | | | CLK_DCO_LDO Output | | | | | | Status | Gated | | | | | Clock Speed (MHz) | 2000 | | | | | | | | | | | | | | | | | M4 Output | | | | | | Status | Enabled | | | | | Clock Divider | 10 | | | | | Clock Speed (MHz) | 200 | | | | | | | | | | | M5 Output | | | | | | Status | Enabled | | | | | Clock Divider | 8 | | | | | Clock Speed (MHz) | 250 | | | | | | | | | | | M6 Output | | | | | | Status | Gated | | | | | Clock Divider | 4 | | | | | Clock Speed (MHz) | 500 | | | | |---------------------------------------------------------------------------------------------| root@am335x-evm:~# omapconf show dpll OMAPCONF (rev v1.73 built Sun Dec 16 06:48:07 UTC 2018) HW Platform: Generic AM33XX (Flattened Device Tree) AM3358 ES2.1 GP Device (UNKNOWN performance ZCZ package (1.0GHz)) Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed UNKNOWN POWER IC Error: I2C Read failed UNKNOWN AUDIO IC SW Build Details: Build: Version: _____ _____ _ _ Kernel: Version: 4.14.79-gbde58ab01e Author: oe-user@oe-host Toolchain: gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11 Type: #1 PREEMPT Date: Thu Dec 20 04:12:32 UTC 2018 |--------------------------------------------| | DPLL Configuration | DPLL_PER | |--------------------------------------------| | Status | Locked | | | | | Mode | Lock | | Automatic Control | Not Supported | | LPST = Low-Power STop | | | LPBP = Low-Power ByPass | | | FRBP = Fast-Relock ByPass | | | MNBP = MN ByPass | | | | | | Sigma-Delta Divider | 4 | | SELFREQDCO | 0 | | | | | Ref. Frequency (MHz) | 24.000 | | M Multiplier Factor | 400 | | N Divider Factor | 9 | | Lock Frequency (MHz) | 960 | | | | | CLKOUT Output | | | Status | Enabled | | Clock Divider | 5 | | Clock Speed (MHz) | 192 | | | | | CLK_DCO_LDO Output | | | Status | Enabled | | Clock Speed (MHz) | 960 | | | | |--------------------------------------------| |---------------------------------------------------------------------------------------------| | DPLL Configuration | DPLL_CORE | DPLL_MPU | DPLL_DDR | DPLL_DISP | |---------------------------------------------------------------------------------------------| | Status | Locked | Locked | Locked | Locked | | | | | | | | Mode | Lock | Lock | Lock | Lock | | Automatic Control | Not Supported | Not Supported | Not Supported | Not Supported | | LPBP = Low-Power ByPass | | | | | | FRBP = Fast-Relock ByPass | | | | | | MNBP = MN ByPass | | | | | | Low-Power Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Automatic Recalibration | Disabled | Disabled | Disabled | Disabled | | Clock Ramping during Relock | Disabled | Disabled | Disabled | Disabled | | Ramping Rate (x REFCLK(s)) | 2 | 2 | 2 | 2 | | Ramping Levels | No Ramp | No Ramp | No Ramp | No Ramp | | | | | | | | Bypass Clock | CLKINP | CLKINP | CLKINP | CLKINP | | Bypass Clock Divider | | | | | | REGM4XEN Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Ref. Frequency (MHz) | 24.000 | 24.000 | 24.000 | 24.000 | | M Multiplier Factor | 125 | 30 | 101 | 5 | | N Divider Factor | 2 | 0 | 3 | 1 | | Lock Frequency (MHz) | 1000 | 720 | 606 | 60 | | | | | | | | M2 Output | | | | | | Status | | Enabled | Enabled | Enabled | | Clock Divider | | 1 | 2 | 1 | | Clock Speed (MHz) | | 720 | 303 | 60 | | | | | | | | CLK_DCO_LDO Output | | | | | | Status | Gated | | | | | Clock Speed (MHz) | 2000 | | | | | | | | | | | | | | | | | M4 Output | | | | | | Status | Enabled | | | | | Clock Divider | 10 | | | | | Clock Speed (MHz) | 200 | | | | | | | | | | | M5 Output | | | | | | Status | Enabled | | | | | Clock Divider | 8 | | | | | Clock Speed (MHz) | 250 | | | | | | | | | | | M6 Output | | | | | | Status | Gated | | | | | Clock Divider | 4 | | | | | Clock Speed (MHz) | 500 | | | | |---------------------------------------------------------------------------------------------| root@am335x-evm:~# omapconf show dpll OMAPCONF (rev v1.73 built Sun Dec 16 06:48:07 UTC 2018) HW Platform: Generic AM33XX (Flattened Device Tree) AM3358 ES2.1 GP Device (UNKNOWN performance ZCZ package (1.0GHz)) Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed UNKNOWN POWER IC Error: I2C Read failed UNKNOWN AUDIO IC SW Build Details: Build: Version: _____ _____ _ _ Kernel: Version: 4.14.79-gbde58ab01e Author: oe-user@oe-host Toolchain: gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11 Type: #1 PREEMPT Date: Thu Dec 20 04:12:32 UTC 2018 |--------------------------------------------| | DPLL Configuration | DPLL_PER | |--------------------------------------------| | Status | Locked | | | | | Mode | Lock | | Automatic Control | Not Supported | | LPST = Low-Power STop | | | LPBP = Low-Power ByPass | | | FRBP = Fast-Relock ByPass | | | MNBP = MN ByPass | | | | | | Sigma-Delta Divider | 4 | | SELFREQDCO | 0 | | | | | Ref. Frequency (MHz) | 24.000 | | M Multiplier Factor | 400 | | N Divider Factor | 9 | | Lock Frequency (MHz) | 960 | | | | | CLKOUT Output | | | Status | Enabled | | Clock Divider | 5 | | Clock Speed (MHz) | 192 | | | | | CLK_DCO_LDO Output | | | Status | Gated | | Clock Speed (MHz) | 960 | | | | |--------------------------------------------| |---------------------------------------------------------------------------------------------| | DPLL Configuration | DPLL_CORE | DPLL_MPU | DPLL_DDR | DPLL_DISP | |---------------------------------------------------------------------------------------------| | Status | Locked | Locked | Locked | Locked | | | | | | | | Mode | Lock | Lock | Lock | Lock | | Automatic Control | Not Supported | Not Supported | Not Supported | Not Supported | | LPBP = Low-Power ByPass | | | | | | FRBP = Fast-Relock ByPass | | | | | | MNBP = MN ByPass | | | | | | Low-Power Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Automatic Recalibration | Disabled | Disabled | Disabled | Disabled | | Clock Ramping during Relock | Disabled | Disabled | Disabled | Disabled | | Ramping Rate (x REFCLK(s)) | 2 | 2 | 2 | 2 | | Ramping Levels | No Ramp | No Ramp | No Ramp | No Ramp | | | | | | | | Bypass Clock | CLKINP | CLKINP | CLKINP | CLKINP | | Bypass Clock Divider | | | | | | REGM4XEN Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Ref. Frequency (MHz) | 24.000 | 24.000 | 24.000 | 24.000 | | M Multiplier Factor | 125 | 30 | 101 | 5 | | N Divider Factor | 2 | 0 | 3 | 1 | | Lock Frequency (MHz) | 1000 | 720 | 606 | 60 | | | | | | | | M2 Output | | | | | | Status | | Enabled | Enabled | Enabled | | Clock Divider | | 1 | 2 | 1 | | Clock Speed (MHz) | | 720 | 303 | 60 | | | | | | | | CLK_DCO_LDO Output | | | | | | Status | Gated | | | | | Clock Speed (MHz) | 2000 | | | | | | | | | | | | | | | | | M4 Output | | | | | | Status | Enabled | | | | | Clock Divider | 10 | | | | | Clock Speed (MHz) | 200 | | | | | | | | | | | M5 Output | | | | | | Status | Enabled | | | | | Clock Divider | 8 | | | | | Clock Speed (MHz) | 250 | | | | | | | | | | | M6 Output | | | | | | Status | Gated | | | | | Clock Divider | 4 | | | | | Clock Speed (MHz) | 500 | | | | |---------------------------------------------------------------------------------------------| root@am335x-evm:~# omapconf show dpll OMAPCONF (rev v1.73 built Sun Dec 16 06:48:07 UTC 2018) HW Platform: Generic AM33XX (Flattened Device Tree) AM3358 ES2.1 GP Device (UNKNOWN performance ZCZ package (1.0GHz)) Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed UNKNOWN POWER IC Error: I2C Read failed UNKNOWN AUDIO IC SW Build Details: Build: Version: _____ _____ _ _ Kernel: Version: 4.14.79-gbde58ab01e Author: oe-user@oe-host Toolchain: gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11 Type: #1 PREEMPT Date: Thu Dec 20 04:12:32 UTC 2018 |--------------------------------------------| | DPLL Configuration | DPLL_PER | |--------------------------------------------| | Status | Locked | | | | | Mode | Lock | | Automatic Control | Not Supported | | LPST = Low-Power STop | | | LPBP = Low-Power ByPass | | | FRBP = Fast-Relock ByPass | | | MNBP = MN ByPass | | | | | | Sigma-Delta Divider | 4 | | SELFREQDCO | 0 | | | | | Ref. Frequency (MHz) | 24.000 | | M Multiplier Factor | 400 | | N Divider Factor | 9 | | Lock Frequency (MHz) | 960 | | | | | CLKOUT Output | | | Status | Enabled | | Clock Divider | 5 | | Clock Speed (MHz) | 192 | | | | | CLK_DCO_LDO Output | | | Status | Enabled | | Clock Speed (MHz) | 960 | | | | |--------------------------------------------| |---------------------------------------------------------------------------------------------| | DPLL Configuration | DPLL_CORE | DPLL_MPU | DPLL_DDR | DPLL_DISP | |---------------------------------------------------------------------------------------------| | Status | Locked | Locked | Locked | Locked | | | | | | | | Mode | Lock | Lock | Lock | Lock | | Automatic Control | Not Supported | Not Supported | Not Supported | Not Supported | | LPBP = Low-Power ByPass | | | | | | FRBP = Fast-Relock ByPass | | | | | | MNBP = MN ByPass | | | | | | Low-Power Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Automatic Recalibration | Disabled | Disabled | Disabled | Disabled | | Clock Ramping during Relock | Disabled | Disabled | Disabled | Disabled | | Ramping Rate (x REFCLK(s)) | 2 | 2 | 2 | 2 | | Ramping Levels | No Ramp | No Ramp | No Ramp | No Ramp | | | | | | | | Bypass Clock | CLKINP | CLKINP | CLKINP | CLKINP | | Bypass Clock Divider | | | | | | REGM4XEN Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Ref. Frequency (MHz) | 24.000 | 24.000 | 24.000 | 24.000 | | M Multiplier Factor | 125 | 125 | 101 | 5 | | N Divider Factor | 2 | 2 | 3 | 1 | | Lock Frequency (MHz) | 1000 | 1000 | 606 | 60 | | | | | | | | M2 Output | | | | | | Status | | Enabled | Enabled | Enabled | | Clock Divider | | 1 | 2 | 1 | | Clock Speed (MHz) | | 1000 | 303 | 60 | | | | | | | | CLK_DCO_LDO Output | | | | | | Status | Gated | | | | | Clock Speed (MHz) | 2000 | | | | | | | | | | | | | | | | | M4 Output | | | | | | Status | Enabled | | | | | Clock Divider | 10 | | | | | Clock Speed (MHz) | 200 | | | | | | | | | | | M5 Output | | | | | | Status | Enabled | | | | | Clock Divider | 8 | | | | | Clock Speed (MHz) | 250 | | | | | | | | | | | M6 Output | | | | | | Status | Gated | | | | | Clock Divider | 4 | | | | | Clock Speed (MHz) | 500 | | | | |---------------------------------------------------------------------------------------------| root@am335x-evm:~# omapconf show dpll OMAPCONF (rev v1.73 built Sun Dec 16 06:48:07 UTC 2018) HW Platform: Generic AM33XX (Flattened Device Tree) AM3358 ES2.1 GP Device (UNKNOWN performance ZCZ package (1.0GHz)) Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed UNKNOWN POWER IC Error: I2C Read failed UNKNOWN AUDIO IC SW Build Details: Build: Version: _____ _____ _ _ Kernel: Version: 4.14.79-gbde58ab01e Author: oe-user@oe-host Toolchain: gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11 Type: #1 PREEMPT Date: Thu Dec 20 04:12:32 UTC 2018 |--------------------------------------------| | DPLL Configuration | DPLL_PER | |--------------------------------------------| | Status | Locked | | | | | Mode | Lock | | Automatic Control | Not Supported | | LPST = Low-Power STop | | | LPBP = Low-Power ByPass | | | FRBP = Fast-Relock ByPass | | | MNBP = MN ByPass | | | | | | Sigma-Delta Divider | 4 | | SELFREQDCO | 0 | | | | | Ref. Frequency (MHz) | 24.000 | | M Multiplier Factor | 400 | | N Divider Factor | 9 | | Lock Frequency (MHz) | 960 | | | | | CLKOUT Output | | | Status | Enabled | | Clock Divider | 5 | | Clock Speed (MHz) | 192 | | | | | CLK_DCO_LDO Output | | | Status | Gated | | Clock Speed (MHz) | 960 | | | | |--------------------------------------------| |---------------------------------------------------------------------------------------------| | DPLL Configuration | DPLL_CORE | DPLL_MPU | DPLL_DDR | DPLL_DISP | |---------------------------------------------------------------------------------------------| | Status | Locked | Locked | Locked | Locked | | | | | | | | Mode | Lock | Lock | Lock | Lock | | Automatic Control | Not Supported | Not Supported | Not Supported | Not Supported | | LPBP = Low-Power ByPass | | | | | | FRBP = Fast-Relock ByPass | | | | | | MNBP = MN ByPass | | | | | | Low-Power Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Automatic Recalibration | Disabled | Disabled | Disabled | Disabled | | Clock Ramping during Relock | Disabled | Disabled | Disabled | Disabled | | Ramping Rate (x REFCLK(s)) | 2 | 2 | 2 | 2 | | Ramping Levels | No Ramp | No Ramp | No Ramp | No Ramp | | | | | | | | Bypass Clock | CLKINP | CLKINP | CLKINP | CLKINP | | Bypass Clock Divider | | | | | | REGM4XEN Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Ref. Frequency (MHz) | 24.000 | 24.000 | 24.000 | 24.000 | | M Multiplier Factor | 125 | 30 | 101 | 5 | | N Divider Factor | 2 | 0 | 3 | 1 | | Lock Frequency (MHz) | 1000 | 720 | 606 | 60 | | | | | | | | M2 Output | | | | | | Status | | Enabled | Enabled | Enabled | | Clock Divider | | 1 | 2 | 1 | | Clock Speed (MHz) | | 720 | 303 | 60 | | | | | | | | CLK_DCO_LDO Output | | | | | | Status | Gated | | | | | Clock Speed (MHz) | 2000 | | | | | | | | | | | | | | | | | M4 Output | | | | | | Status | Enabled | | | | | Clock Divider | 10 | | | | | Clock Speed (MHz) | 200 | | | | | | | | | | | M5 Output | | | | | | Status | Enabled | | | | | Clock Divider | 8 | | | | | Clock Speed (MHz) | 250 | | | | | | | | | | | M6 Output | | | | | | Status | Gated | | | | | Clock Divider | 4 | | | | | Clock Speed (MHz) | 500 | | | | |---------------------------------------------------------------------------------------------| root@am335x-evm:~# omapconf show dpll OMAPCONF (rev v1.73 built Sun Dec 16 06:48:07 UTC 2018) HW Platform: Generic AM33XX (Flattened Device Tree) AM3358 ES2.1 GP Device (UNKNOWN performance ZCZ package (1.0GHz)) Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed UNKNOWN POWER IC Error: I2C Read failed UNKNOWN AUDIO IC SW Build Details: Build: Version: _____ _____ _ _ Kernel: Version: 4.14.79-gbde58ab01e Author: oe-user@oe-host Toolchain: gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11 Type: #1 PREEMPT Date: Thu Dec 20 04:12:32 UTC 2018 |--------------------------------------------| | DPLL Configuration | DPLL_PER | |--------------------------------------------| | Status | Locked | | | | | Mode | Lock | | Automatic Control | Not Supported | | LPST = Low-Power STop | | | LPBP = Low-Power ByPass | | | FRBP = Fast-Relock ByPass | | | MNBP = MN ByPass | | | | | | Sigma-Delta Divider | 4 | | SELFREQDCO | 0 | | | | | Ref. Frequency (MHz) | 24.000 | | M Multiplier Factor | 400 | | N Divider Factor | 9 | | Lock Frequency (MHz) | 960 | | | | | CLKOUT Output | | | Status | Enabled | | Clock Divider | 5 | | Clock Speed (MHz) | 192 | | | | | CLK_DCO_LDO Output | | | Status | Enabled | | Clock Speed (MHz) | 960 | | | | |--------------------------------------------| |---------------------------------------------------------------------------------------------| | DPLL Configuration | DPLL_CORE | DPLL_MPU | DPLL_DDR | DPLL_DISP | |---------------------------------------------------------------------------------------------| | Status | Locked | Locked | Locked | Locked | | | | | | | | Mode | Lock | Lock | Lock | Lock | | Automatic Control | Not Supported | Not Supported | Not Supported | Not Supported | | LPBP = Low-Power ByPass | | | | | | FRBP = Fast-Relock ByPass | | | | | | MNBP = MN ByPass | | | | | | Low-Power Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Automatic Recalibration | Disabled | Disabled | Disabled | Disabled | | Clock Ramping during Relock | Disabled | Disabled | Disabled | Disabled | | Ramping Rate (x REFCLK(s)) | 2 | 2 | 2 | 2 | | Ramping Levels | No Ramp | No Ramp | No Ramp | No Ramp | | | | | | | | Bypass Clock | CLKINP | CLKINP | CLKINP | CLKINP | | Bypass Clock Divider | | | | | | REGM4XEN Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Ref. Frequency (MHz) | 24.000 | 24.000 | 24.000 | 24.000 | | M Multiplier Factor | 125 | 25 | 101 | 5 | | N Divider Factor | 2 | 0 | 3 | 1 | | Lock Frequency (MHz) | 1000 | 600 | 606 | 60 | | | | | | | | M2 Output | | | | | | Status | | Enabled | Enabled | Enabled | | Clock Divider | | 1 | 2 | 1 | | Clock Speed (MHz) | | 600 | 303 | 60 | | | | | | | | CLK_DCO_LDO Output | | | | | | Status | Gated | | | | | Clock Speed (MHz) | 2000 | | | | | | | | | | | | | | | | | M4 Output | | | | | | Status | Enabled | | | | | Clock Divider | 10 | | | | | Clock Speed (MHz) | 200 | | | | | | | | | | | M5 Output | | | | | | Status | Enabled | | | | | Clock Divider | 8 | | | | | Clock Speed (MHz) | 250 | | | | | | | | | | | M6 Output | | | | | | Status | Gated | | | | | Clock Divider | 4 | | | | | Clock Speed (MHz) | 500 | | | | |---------------------------------------------------------------------------------------------| root@am335x-evm:~# omapconf show dpll OMAPCONF (rev v1.73 built Sun Dec 16 06:48:07 UTC 2018) HW Platform: Generic AM33XX (Flattened Device Tree) AM3358 ES2.1 GP Device (UNKNOWN performance ZCZ package (1.0GHz)) Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed UNKNOWN POWER IC Error: I2C Read failed UNKNOWN AUDIO IC SW Build Details: Build: Version: _____ _____ _ _ Kernel: Version: 4.14.79-gbde58ab01e Author: oe-user@oe-host Toolchain: gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11 Type: #1 PREEMPT Date: Thu Dec 20 04:12:32 UTC 2018 |--------------------------------------------| | DPLL Configuration | DPLL_PER | |--------------------------------------------| | Status | Locked | | | | | Mode | Lock | | Automatic Control | Not Supported | | LPST = Low-Power STop | | | LPBP = Low-Power ByPass | | | FRBP = Fast-Relock ByPass | | | MNBP = MN ByPass | | | | | | Sigma-Delta Divider | 4 | | SELFREQDCO | 0 | | | | | Ref. Frequency (MHz) | 24.000 | | M Multiplier Factor | 400 | | N Divider Factor | 9 | | Lock Frequency (MHz) | 960 | | | | | CLKOUT Output | | | Status | Enabled | | Clock Divider | 5 | | Clock Speed (MHz) | 192 | | | | | CLK_DCO_LDO Output | | | Status | Gated | | Clock Speed (MHz) | 960 | | | | |--------------------------------------------| |---------------------------------------------------------------------------------------------| | DPLL Configuration | DPLL_CORE | DPLL_MPU | DPLL_DDR | DPLL_DISP | |---------------------------------------------------------------------------------------------| | Status | Locked | Locked | Locked | Locked | | | | | | | | Mode | Lock | Lock | Lock | Lock | | Automatic Control | Not Supported | Not Supported | Not Supported | Not Supported | | LPBP = Low-Power ByPass | | | | | | FRBP = Fast-Relock ByPass | | | | | | MNBP = MN ByPass | | | | | | Low-Power Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Automatic Recalibration | Disabled | Disabled | Disabled | Disabled | | Clock Ramping during Relock | Disabled | Disabled | Disabled | Disabled | | Ramping Rate (x REFCLK(s)) | 2 | 2 | 2 | 2 | | Ramping Levels | No Ramp | No Ramp | No Ramp | No Ramp | | | | | | | | Bypass Clock | CLKINP | CLKINP | CLKINP | CLKINP | | Bypass Clock Divider | | | | | | REGM4XEN Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Ref. Frequency (MHz) | 24.000 | 24.000 | 24.000 | 24.000 | | M Multiplier Factor | 125 | 30 | 101 | 5 | | N Divider Factor | 2 | 0 | 3 | 1 | | Lock Frequency (MHz) | 1000 | 720 | 606 | 60 | | | | | | | | M2 Output | | | | | | Status | | Enabled | Enabled | Enabled | | Clock Divider | | 1 | 2 | 1 | | Clock Speed (MHz) | | 720 | 303 | 60 | | | | | | | | CLK_DCO_LDO Output | | | | | | Status | Gated | | | | | Clock Speed (MHz) | 2000 | | | | | | | | | | | | | | | | | M4 Output | | | | | | Status | Enabled | | | | | Clock Divider | 10 | | | | | Clock Speed (MHz) | 200 | | | | | | | | | | | M5 Output | | | | | | Status | Enabled | | | | | Clock Divider | 8 | | | | | Clock Speed (MHz) | 250 | | | | | | | | | | | M6 Output | | | | | | Status | Gated | | | | | Clock Divider | 4 | | | | | Clock Speed (MHz) | 500 | | | | |---------------------------------------------------------------------------------------------| root@am335x-evm:~# omapconf show dpll OMAPCONF (rev v1.73 built Sun Dec 16 06:48:07 UTC 2018) HW Platform: Generic AM33XX (Flattened Device Tree) AM3358 ES2.1 GP Device (UNKNOWN performance ZCZ package (1.0GHz)) Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed UNKNOWN POWER IC Error: I2C Read failed UNKNOWN AUDIO IC SW Build Details: Build: Version: _____ _____ _ _ Kernel: Version: 4.14.79-gbde58ab01e Author: oe-user@oe-host Toolchain: gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11 Type: #1 PREEMPT Date: Thu Dec 20 04:12:32 UTC 2018 |--------------------------------------------| | DPLL Configuration | DPLL_PER | |--------------------------------------------| | Status | Locked | | | | | Mode | Lock | | Automatic Control | Not Supported | | LPST = Low-Power STop | | | LPBP = Low-Power ByPass | | | FRBP = Fast-Relock ByPass | | | MNBP = MN ByPass | | | | | | Sigma-Delta Divider | 4 | | SELFREQDCO | 0 | | | | | Ref. Frequency (MHz) | 24.000 | | M Multiplier Factor | 400 | | N Divider Factor | 9 | | Lock Frequency (MHz) | 960 | | | | | CLKOUT Output | | | Status | Enabled | | Clock Divider | 5 | | Clock Speed (MHz) | 192 | | | | | CLK_DCO_LDO Output | | | Status | Enabled | | Clock Speed (MHz) | 960 | | | | |--------------------------------------------| |---------------------------------------------------------------------------------------------| | DPLL Configuration | DPLL_CORE | DPLL_MPU | DPLL_DDR | DPLL_DISP | |---------------------------------------------------------------------------------------------| | Status | Locked | Locked | Locked | Locked | | | | | | | | Mode | Lock | Lock | Lock | Lock | | Automatic Control | Not Supported | Not Supported | Not Supported | Not Supported | | LPBP = Low-Power ByPass | | | | | | FRBP = Fast-Relock ByPass | | | | | | MNBP = MN ByPass | | | | | | Low-Power Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Automatic Recalibration | Disabled | Disabled | Disabled | Disabled | | Clock Ramping during Relock | Disabled | Disabled | Disabled | Disabled | | Ramping Rate (x REFCLK(s)) | 2 | 2 | 2 | 2 | | Ramping Levels | No Ramp | No Ramp | No Ramp | No Ramp | | | | | | | | Bypass Clock | CLKINP | CLKINP | CLKINP | CLKINP | | Bypass Clock Divider | | | | | | REGM4XEN Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Ref. Frequency (MHz) | 24.000 | 24.000 | 24.000 | 24.000 | | M Multiplier Factor | 125 | 30 | 101 | 5 | | N Divider Factor | 2 | 0 | 3 | 1 | | Lock Frequency (MHz) | 1000 | 720 | 606 | 60 | | | | | | | | M2 Output | | | | | | Status | | Enabled | Enabled | Enabled | | Clock Divider | | 1 | 2 | 1 | | Clock Speed (MHz) | | 720 | 303 | 60 | | | | | | | | CLK_DCO_LDO Output | | | | | | Status | Gated | | | | | Clock Speed (MHz) | 2000 | | | | | | | | | | | | | | | | | M4 Output | | | | | | Status | Enabled | | | | | Clock Divider | 10 | | | | | Clock Speed (MHz) | 200 | | | | | | | | | | | M5 Output | | | | | | Status | Enabled | | | | | Clock Divider | 8 | | | | | Clock Speed (MHz) | 250 | | | | | | | | | | | M6 Output | | | | | | Status | Gated | | | | | Clock Divider | 4 | | | | | Clock Speed (MHz) | 500 | | | | |---------------------------------------------------------------------------------------------| root@am335x-evm:~# omapconf show dpll OMAPCONF (rev v1.73 built Sun Dec 16 06:48:07 UTC 2018) HW Platform: Generic AM33XX (Flattened Device Tree) AM3358 ES2.1 GP Device (UNKNOWN performance ZCZ package (1.0GHz)) Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed UNKNOWN POWER IC Error: I2C Read failed UNKNOWN AUDIO IC SW Build Details: Build: Version: _____ _____ _ _ Kernel: Version: 4.14.79-gbde58ab01e Author: oe-user@oe-host Toolchain: gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11 Type: #1 PREEMPT Date: Thu Dec 20 04:12:32 UTC 2018 |--------------------------------------------| | DPLL Configuration | DPLL_PER | |--------------------------------------------| | Status | Locked | | | | | Mode | Lock | | Automatic Control | Not Supported | | LPST = Low-Power STop | | | LPBP = Low-Power ByPass | | | FRBP = Fast-Relock ByPass | | | MNBP = MN ByPass | | | | | | Sigma-Delta Divider | 4 | | SELFREQDCO | 0 | | | | | Ref. Frequency (MHz) | 24.000 | | M Multiplier Factor | 400 | | N Divider Factor | 9 | | Lock Frequency (MHz) | 960 | | | | | CLKOUT Output | | | Status | Enabled | | Clock Divider | 5 | | Clock Speed (MHz) | 192 | | | | | CLK_DCO_LDO Output | | | Status | Gated | | Clock Speed (MHz) | 960 | | | | |--------------------------------------------| |---------------------------------------------------------------------------------------------| | DPLL Configuration | DPLL_CORE | DPLL_MPU | DPLL_DDR | DPLL_DISP | |---------------------------------------------------------------------------------------------| | Status | Locked | Locked | Locked | Locked | | | | | | | | Mode | Lock | Lock | Lock | Lock | | Automatic Control | Not Supported | Not Supported | Not Supported | Not Supported | | LPBP = Low-Power ByPass | | | | | | FRBP = Fast-Relock ByPass | | | | | | MNBP = MN ByPass | | | | | | Low-Power Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Automatic Recalibration | Disabled | Disabled | Disabled | Disabled | | Clock Ramping during Relock | Disabled | Disabled | Disabled | Disabled | | Ramping Rate (x REFCLK(s)) | 2 | 2 | 2 | 2 | | Ramping Levels | No Ramp | No Ramp | No Ramp | No Ramp | | | | | | | | Bypass Clock | CLKINP | CLKINP | CLKINP | CLKINP | | Bypass Clock Divider | | | | | | REGM4XEN Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Ref. Frequency (MHz) | 24.000 | 24.000 | 24.000 | 24.000 | | M Multiplier Factor | 125 | 125 | 101 | 5 | | N Divider Factor | 2 | 2 | 3 | 1 | | Lock Frequency (MHz) | 1000 | 1000 | 606 | 60 | | | | | | | | M2 Output | | | | | | Status | | Enabled | Enabled | Enabled | | Clock Divider | | 1 | 2 | 1 | | Clock Speed (MHz) | | 1000 | 303 | 60 | | | | | | | | CLK_DCO_LDO Output | | | | | | Status | Gated | | | | | Clock Speed (MHz) | 2000 | | | | | | | | | | | | | | | | | M4 Output | | | | | | Status | Enabled | | | | | Clock Divider | 10 | | | | | Clock Speed (MHz) | 200 | | | | | | | | | | | M5 Output | | | | | | Status | Enabled | | | | | Clock Divider | 8 | | | | | Clock Speed (MHz) | 250 | | | | | | | | | | | M6 Output | | | | | | Status | Gated | | | | | Clock Divider | 4 | | | | | Clock Speed (MHz) | 500 | | | | |---------------------------------------------------------------------------------------------| root@am335x-evm:~# omapconf show dpll OMAPCONF (rev v1.73 built Sun Dec 16 06:48:07 UTC 2018) HW Platform: Generic AM33XX (Flattened Device Tree) AM3358 ES2.1 GP Device (UNKNOWN performance ZCZ package (1.0GHz)) Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed UNKNOWN POWER IC Error: I2C Read failed UNKNOWN AUDIO IC SW Build Details: Build: Version: _____ _____ _ _ Kernel: Version: 4.14.79-gbde58ab01e Author: oe-user@oe-host Toolchain: gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11 Type: #1 PREEMPT Date: Thu Dec 20 04:12:32 UTC 2018 |--------------------------------------------| | DPLL Configuration | DPLL_PER | |--------------------------------------------| | Status | Locked | | | | | Mode | Lock | | Automatic Control | Not Supported | | LPST = Low-Power STop | | | LPBP = Low-Power ByPass | | | FRBP = Fast-Relock ByPass | | | MNBP = MN ByPass | | | | | | Sigma-Delta Divider | 4 | | SELFREQDCO | 0 | | | | | Ref. Frequency (MHz) | 24.000 | | M Multiplier Factor | 400 | | N Divider Factor | 9 | | Lock Frequency (MHz) | 960 | | | | | CLKOUT Output | | | Status | Enabled | | Clock Divider | 5 | | Clock Speed (MHz) | 192 | | | | | CLK_DCO_LDO Output | | | Status | Gated | | Clock Speed (MHz) | 960 | | | | |--------------------------------------------| |---------------------------------------------------------------------------------------------| | DPLL Configuration | DPLL_CORE | DPLL_MPU | DPLL_DDR | DPLL_DISP | |---------------------------------------------------------------------------------------------| | Status | Locked | Locked | Locked | Locked | | | | | | | | Mode | Lock | Lock | Lock | Lock | | Automatic Control | Not Supported | Not Supported | Not Supported | Not Supported | | LPBP = Low-Power ByPass | | | | | | FRBP = Fast-Relock ByPass | | | | | | MNBP = MN ByPass | | | | | | Low-Power Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Automatic Recalibration | Disabled | Disabled | Disabled | Disabled | | Clock Ramping during Relock | Disabled | Disabled | Disabled | Disabled | | Ramping Rate (x REFCLK(s)) | 2 | 2 | 2 | 2 | | Ramping Levels | No Ramp | No Ramp | No Ramp | No Ramp | | | | | | | | Bypass Clock | CLKINP | CLKINP | CLKINP | CLKINP | | Bypass Clock Divider | | | | | | REGM4XEN Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Ref. Frequency (MHz) | 24.000 | 24.000 | 24.000 | 24.000 | | M Multiplier Factor | 125 | 25 | 101 | 5 | | N Divider Factor | 2 | 0 | 3 | 1 | | Lock Frequency (MHz) | 1000 | 600 | 606 | 60 | | | | | | | | M2 Output | | | | | | Status | | Enabled | Enabled | Enabled | | Clock Divider | | 1 | 2 | 1 | | Clock Speed (MHz) | | 600 | 303 | 60 | | | | | | | | CLK_DCO_LDO Output | | | | | | Status | Gated | | | | | Clock Speed (MHz) | 2000 | | | | | | | | | | | | | | | | | M4 Output | | | | | | Status | Enabled | | | | | Clock Divider | 10 | | | | | Clock Speed (MHz) | 200 | | | | | | | | | | | M5 Output | | | | | | Status | Enabled | | | | | Clock Divider | 8 | | | | | Clock Speed (MHz) | 250 | | | | | | | | | | | M6 Output | | | | | | Status | Gated | | | | | Clock Divider | 4 | | | | | Clock Speed (MHz) | 500 | | | | |---------------------------------------------------------------------------------------------| root@am335x-evm:~# omapconf show dpll OMAPCONF (rev v1.73 built Sun Dec 16 06:48:07 UTC 2018) HW Platform: Generic AM33XX (Flattened Device Tree) AM3358 ES2.1 GP Device (UNKNOWN performance ZCZ package (1.0GHz)) Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed UNKNOWN POWER IC Error: I2C Read failed UNKNOWN AUDIO IC SW Build Details: Build: Version: _____ _____ _ _ Kernel: Version: 4.14.79-gbde58ab01e Author: oe-user@oe-host Toolchain: gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11 Type: #1 PREEMPT Date: Thu Dec 20 04:12:32 UTC 2018 |--------------------------------------------| | DPLL Configuration | DPLL_PER | |--------------------------------------------| | Status | Locked | | | | | Mode | Lock | | Automatic Control | Not Supported | | LPST = Low-Power STop | | | LPBP = Low-Power ByPass | | | FRBP = Fast-Relock ByPass | | | MNBP = MN ByPass | | | | | | Sigma-Delta Divider | 4 | | SELFREQDCO | 0 | | | | | Ref. Frequency (MHz) | 24.000 | | M Multiplier Factor | 400 | | N Divider Factor | 9 | | Lock Frequency (MHz) | 960 | | | | | CLKOUT Output | | | Status | Enabled | | Clock Divider | 5 | | Clock Speed (MHz) | 192 | | | | | CLK_DCO_LDO Output | | | Status | Enabled | | Clock Speed (MHz) | 960 | | | | |--------------------------------------------| |---------------------------------------------------------------------------------------------| | DPLL Configuration | DPLL_CORE | DPLL_MPU | DPLL_DDR | DPLL_DISP | |---------------------------------------------------------------------------------------------| | Status | Locked | Locked | Locked | Locked | | | | | | | | Mode | Lock | Lock | Lock | Lock | | Automatic Control | Not Supported | Not Supported | Not Supported | Not Supported | | LPBP = Low-Power ByPass | | | | | | FRBP = Fast-Relock ByPass | | | | | | MNBP = MN ByPass | | | | | | Low-Power Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Automatic Recalibration | Disabled | Disabled | Disabled | Disabled | | Clock Ramping during Relock | Disabled | Disabled | Disabled | Disabled | | Ramping Rate (x REFCLK(s)) | 2 | 2 | 2 | 2 | | Ramping Levels | No Ramp | No Ramp | No Ramp | No Ramp | | | | | | | | Bypass Clock | CLKINP | CLKINP | CLKINP | CLKINP | | Bypass Clock Divider | | | | | | REGM4XEN Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Ref. Frequency (MHz) | 24.000 | 24.000 | 24.000 | 24.000 | | M Multiplier Factor | 125 | 30 | 101 | 5 | | N Divider Factor | 2 | 0 | 3 | 1 | | Lock Frequency (MHz) | 1000 | 720 | 606 | 60 | | | | | | | | M2 Output | | | | | | Status | | Enabled | Enabled | Enabled | | Clock Divider | | 1 | 2 | 1 | | Clock Speed (MHz) | | 720 | 303 | 60 | | | | | | | | CLK_DCO_LDO Output | | | | | | Status | Gated | | | | | Clock Speed (MHz) | 2000 | | | | | | | | | | | | | | | | | M4 Output | | | | | | Status | Enabled | | | | | Clock Divider | 10 | | | | | Clock Speed (MHz) | 200 | | | | | | | | | | | M5 Output | | | | | | Status | Enabled | | | | | Clock Divider | 8 | | | | | Clock Speed (MHz) | 250 | | | | | | | | | | | M6 Output | | | | | | Status | Gated | | | | | Clock Divider | 4 | | | | | Clock Speed (MHz) | 500 | | | | |---------------------------------------------------------------------------------------------| root@am335x-evm:~# omapconf show dpll OMAPCONF (rev v1.73 built Sun Dec 16 06:48:07 UTC 2018) HW Platform: Generic AM33XX (Flattened Device Tree) AM3358 ES2.1 GP Device (UNKNOWN performance ZCZ package (1.0GHz)) Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed UNKNOWN POWER IC Error: I2C Read failed UNKNOWN AUDIO IC SW Build Details: Build: Version: _____ _____ _ _ Kernel: Version: 4.14.79-gbde58ab01e Author: oe-user@oe-host Toolchain: gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11 Type: #1 PREEMPT Date: Thu Dec 20 04:12:32 UTC 2018 |--------------------------------------------| | DPLL Configuration | DPLL_PER | |--------------------------------------------| | Status | Locked | | | | | Mode | Lock | | Automatic Control | Not Supported | | LPST = Low-Power STop | | | LPBP = Low-Power ByPass | | | FRBP = Fast-Relock ByPass | | | MNBP = MN ByPass | | | | | | Sigma-Delta Divider | 4 | | SELFREQDCO | 0 | | | | | Ref. Frequency (MHz) | 24.000 | | M Multiplier Factor | 400 | | N Divider Factor | 9 | | Lock Frequency (MHz) | 960 | | | | | CLKOUT Output | | | Status | Enabled | | Clock Divider | 5 | | Clock Speed (MHz) | 192 | | | | | CLK_DCO_LDO Output | | | Status | Gated | | Clock Speed (MHz) | 960 | | | | |--------------------------------------------| |---------------------------------------------------------------------------------------------| | DPLL Configuration | DPLL_CORE | DPLL_MPU | DPLL_DDR | DPLL_DISP | |---------------------------------------------------------------------------------------------| | Status | Locked | Locked | Locked | Locked | | | | | | | | Mode | Lock | Lock | Lock | Lock | | Automatic Control | Not Supported | Not Supported | Not Supported | Not Supported | | LPBP = Low-Power ByPass | | | | | | FRBP = Fast-Relock ByPass | | | | | | MNBP = MN ByPass | | | | | | Low-Power Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Automatic Recalibration | Disabled | Disabled | Disabled | Disabled | | Clock Ramping during Relock | Disabled | Disabled | Disabled | Disabled | | Ramping Rate (x REFCLK(s)) | 2 | 2 | 2 | 2 | | Ramping Levels | No Ramp | No Ramp | No Ramp | No Ramp | | | | | | | | Bypass Clock | CLKINP | CLKINP | CLKINP | CLKINP | | Bypass Clock Divider | | | | | | REGM4XEN Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Ref. Frequency (MHz) | 24.000 | 24.000 | 24.000 | 24.000 | | M Multiplier Factor | 125 | 100 | 101 | 5 | | N Divider Factor | 2 | 2 | 3 | 1 | | Lock Frequency (MHz) | 1000 | 800 | 606 | 60 | | | | | | | | M2 Output | | | | | | Status | | Enabled | Enabled | Enabled | | Clock Divider | | 1 | 2 | 1 | | Clock Speed (MHz) | | 800 | 303 | 60 | | | | | | | | CLK_DCO_LDO Output | | | | | | Status | Gated | | | | | Clock Speed (MHz) | 2000 | | | | | | | | | | | | | | | | | M4 Output | | | | | | Status | Enabled | | | | | Clock Divider | 10 | | | | | Clock Speed (MHz) | 200 | | | | | | | | | | | M5 Output | | | | | | Status | Enabled | | | | | Clock Divider | 8 | | | | | Clock Speed (MHz) | 250 | | | | | | | | | | | M6 Output | | | | | | Status | Gated | | | | | Clock Divider | 4 | | | | | Clock Speed (MHz) | 500 | | | | |---------------------------------------------------------------------------------------------| root@am335x-evm:~# omapconf show dpll OMAPCONF (rev v1.73 built Sun Dec 16 06:48:07 UTC 2018) HW Platform: Generic AM33XX (Flattened Device Tree) AM3358 ES2.1 GP Device (UNKNOWN performance ZCZ package (1.0GHz)) Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed UNKNOWN POWER IC Error: I2C Read failed UNKNOWN AUDIO IC SW Build Details: Build: Version: _____ _____ _ _ Kernel: Version: 4.14.79-gbde58ab01e Author: oe-user@oe-host Toolchain: gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11 Type: #1 PREEMPT Date: Thu Dec 20 04:12:32 UTC 2018 |--------------------------------------------| | DPLL Configuration | DPLL_PER | |--------------------------------------------| | Status | Locked | | | | | Mode | Lock | | Automatic Control | Not Supported | | LPST = Low-Power STop | | | LPBP = Low-Power ByPass | | | FRBP = Fast-Relock ByPass | | | MNBP = MN ByPass | | | | | | Sigma-Delta Divider | 4 | | SELFREQDCO | 0 | | | | | Ref. Frequency (MHz) | 24.000 | | M Multiplier Factor | 400 | | N Divider Factor | 9 | | Lock Frequency (MHz) | 960 | | | | | CLKOUT Output | | | Status | Enabled | | Clock Divider | 5 | | Clock Speed (MHz) | 192 | | | | | CLK_DCO_LDO Output | | | Status | Enabled | | Clock Speed (MHz) | 960 | | | | |--------------------------------------------| |---------------------------------------------------------------------------------------------| | DPLL Configuration | DPLL_CORE | DPLL_MPU | DPLL_DDR | DPLL_DISP | |---------------------------------------------------------------------------------------------| | Status | Locked | Locked | Locked | Locked | | | | | | | | Mode | Lock | Lock | Lock | Lock | | Automatic Control | Not Supported | Not Supported | Not Supported | Not Supported | | LPBP = Low-Power ByPass | | | | | | FRBP = Fast-Relock ByPass | | | | | | MNBP = MN ByPass | | | | | | Low-Power Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Automatic Recalibration | Disabled | Disabled | Disabled | Disabled | | Clock Ramping during Relock | Disabled | Disabled | Disabled | Disabled | | Ramping Rate (x REFCLK(s)) | 2 | 2 | 2 | 2 | | Ramping Levels | No Ramp | No Ramp | No Ramp | No Ramp | | | | | | | | Bypass Clock | CLKINP | CLKINP | CLKINP | CLKINP | | Bypass Clock Divider | | | | | | REGM4XEN Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Ref. Frequency (MHz) | 24.000 | 24.000 | 24.000 | 24.000 | | M Multiplier Factor | 125 | 125 | 101 | 5 | | N Divider Factor | 2 | 2 | 3 | 1 | | Lock Frequency (MHz) | 1000 | 1000 | 606 | 60 | | | | | | | | M2 Output | | | | | | Status | | Enabled | Enabled | Enabled | | Clock Divider | | 1 | 2 | 1 | | Clock Speed (MHz) | | 1000 | 303 | 60 | | | | | | | | CLK_DCO_LDO Output | | | | | | Status | Gated | | | | | Clock Speed (MHz) | 2000 | | | | | | | | | | | | | | | | | M4 Output | | | | | | Status | Enabled | | | | | Clock Divider | 10 | | | | | Clock Speed (MHz) | 200 | | | | | | | | | | | M5 Output | | | | | | Status | Enabled | | | | | Clock Divider | 8 | | | | | Clock Speed (MHz) | 250 | | | | | | | | | | | M6 Output | | | | | | Status | Gated | | | | | Clock Divider | 4 | | | | | Clock Speed (MHz) | 500 | | | | |---------------------------------------------------------------------------------------------| root@am335x-evm:~# omapconf show dpll OMAPCONF (rev v1.73 built Sun Dec 16 06:48:07 UTC 2018) HW Platform: Generic AM33XX (Flattened Device Tree) AM3358 ES2.1 GP Device (UNKNOWN performance ZCZ package (1.0GHz)) Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed UNKNOWN POWER IC Error: I2C Read failed UNKNOWN AUDIO IC SW Build Details: Build: Version: _____ _____ _ _ Kernel: Version: 4.14.79-gbde58ab01e Author: oe-user@oe-host Toolchain: gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11 Type: #1 PREEMPT Date: Thu Dec 20 04:12:32 UTC 2018 |--------------------------------------------| | DPLL Configuration | DPLL_PER | |--------------------------------------------| | Status | Locked | | | | | Mode | Lock | | Automatic Control | Not Supported | | LPST = Low-Power STop | | | LPBP = Low-Power ByPass | | | FRBP = Fast-Relock ByPass | | | MNBP = MN ByPass | | | | | | Sigma-Delta Divider | 4 | | SELFREQDCO | 0 | | | | | Ref. Frequency (MHz) | 24.000 | | M Multiplier Factor | 400 | | N Divider Factor | 9 | | Lock Frequency (MHz) | 960 | | | | | CLKOUT Output | | | Status | Enabled | | Clock Divider | 5 | | Clock Speed (MHz) | 192 | | | | | CLK_DCO_LDO Output | | | Status | Gated | | Clock Speed (MHz) | 960 | | | | |--------------------------------------------| |---------------------------------------------------------------------------------------------| | DPLL Configuration | DPLL_CORE | DPLL_MPU | DPLL_DDR | DPLL_DISP | |---------------------------------------------------------------------------------------------| | Status | Locked | Locked | Locked | Locked | | | | | | | | Mode | Lock | Lock | Lock | Lock | | Automatic Control | Not Supported | Not Supported | Not Supported | Not Supported | | LPBP = Low-Power ByPass | | | | | | FRBP = Fast-Relock ByPass | | | | | | MNBP = MN ByPass | | | | | | Low-Power Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Automatic Recalibration | Disabled | Disabled | Disabled | Disabled | | Clock Ramping during Relock | Disabled | Disabled | Disabled | Disabled | | Ramping Rate (x REFCLK(s)) | 2 | 2 | 2 | 2 | | Ramping Levels | No Ramp | No Ramp | No Ramp | No Ramp | | | | | | | | Bypass Clock | CLKINP | CLKINP | CLKINP | CLKINP | | Bypass Clock Divider | | | | | | REGM4XEN Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Ref. Frequency (MHz) | 24.000 | 24.000 | 24.000 | 24.000 | | M Multiplier Factor | 125 | 30 | 101 | 5 | | N Divider Factor | 2 | 0 | 3 | 1 | | Lock Frequency (MHz) | 1000 | 720 | 606 | 60 | | | | | | | | M2 Output | | | | | | Status | | Enabled | Enabled | Enabled | | Clock Divider | | 1 | 2 | 1 | | Clock Speed (MHz) | | 720 | 303 | 60 | | | | | | | | CLK_DCO_LDO Output | | | | | | Status | Gated | | | | | Clock Speed (MHz) | 2000 | | | | | | | | | | | | | | | | | M4 Output | | | | | | Status | Enabled | | | | | Clock Divider | 10 | | | | | Clock Speed (MHz) | 200 | | | | | | | | | | | M5 Output | | | | | | Status | Enabled | | | | | Clock Divider | 8 | | | | | Clock Speed (MHz) | 250 | | | | | | | | | | | M6 Output | | | | | | Status | Gated | | | | | Clock Divider | 4 | | | | | Clock Speed (MHz) | 500 | | | | |---------------------------------------------------------------------------------------------| root@am335x-evm:~# omapconf show dpll OMAPCONF (rev v1.73 built Sun Dec 16 06:48:07 UTC 2018) HW Platform: Generic AM33XX (Flattened Device Tree) AM3358 ES2.1 GP Device (UNKNOWN performance ZCZ package (1.0GHz)) Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed UNKNOWN POWER IC Error: I2C Read failed UNKNOWN AUDIO IC SW Build Details: Build: Version: _____ _____ _ _ Kernel: Version: 4.14.79-gbde58ab01e Author: oe-user@oe-host Toolchain: gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11 Type: #1 PREEMPT Date: Thu Dec 20 04:12:32 UTC 2018 |--------------------------------------------| | DPLL Configuration | DPLL_PER | |--------------------------------------------| | Status | Locked | | | | | Mode | Lock | | Automatic Control | Not Supported | | LPST = Low-Power STop | | | LPBP = Low-Power ByPass | | | FRBP = Fast-Relock ByPass | | | MNBP = MN ByPass | | | | | | Sigma-Delta Divider | 4 | | SELFREQDCO | 0 | | | | | Ref. Frequency (MHz) | 24.000 | | M Multiplier Factor | 400 | | N Divider Factor | 9 | | Lock Frequency (MHz) | 960 | | | | | CLKOUT Output | | | Status | Enabled | | Clock Divider | 5 | | Clock Speed (MHz) | 192 | | | | | CLK_DCO_LDO Output | | | Status | Gated | | Clock Speed (MHz) | 960 | | | | |--------------------------------------------| |---------------------------------------------------------------------------------------------| | DPLL Configuration | DPLL_CORE | DPLL_MPU | DPLL_DDR | DPLL_DISP | |---------------------------------------------------------------------------------------------| | Status | Locked | Locked | Locked | Locked | | | | | | | | Mode | Lock | Lock | Lock | Lock | | Automatic Control | Not Supported | Not Supported | Not Supported | Not Supported | | LPBP = Low-Power ByPass | | | | | | FRBP = Fast-Relock ByPass | | | | | | MNBP = MN ByPass | | | | | | Low-Power Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Automatic Recalibration | Disabled | Disabled | Disabled | Disabled | | Clock Ramping during Relock | Disabled | Disabled | Disabled | Disabled | | Ramping Rate (x REFCLK(s)) | 2 | 2 | 2 | 2 | | Ramping Levels | No Ramp | No Ramp | No Ramp | No Ramp | | | | | | | | Bypass Clock | CLKINP | CLKINP | CLKINP | CLKINP | | Bypass Clock Divider | | | | | | REGM4XEN Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Ref. Frequency (MHz) | 24.000 | 24.000 | 24.000 | 24.000 | | M Multiplier Factor | 125 | 25 | 101 | 5 | | N Divider Factor | 2 | 0 | 3 | 1 | | Lock Frequency (MHz) | 1000 | 600 | 606 | 60 | | | | | | | | M2 Output | | | | | | Status | | Enabled | Enabled | Enabled | | Clock Divider | | 1 | 2 | 1 | | Clock Speed (MHz) | | 600 | 303 | 60 | | | | | | | | CLK_DCO_LDO Output | | | | | | Status | Gated | | | | | Clock Speed (MHz) | 2000 | | | | | | | | | | | | | | | | | M4 Output | | | | | | Status | Enabled | | | | | Clock Divider | 10 | | | | | Clock Speed (MHz) | 200 | | | | | | | | | | | M5 Output | | | | | | Status | Enabled | | | | | Clock Divider | 8 | | | | | Clock Speed (MHz) | 250 | | | | | | | | | | | M6 Output | | | | | | Status | Gated | | | | | Clock Divider | 4 | | | | | Clock Speed (MHz) | 500 | | | | |---------------------------------------------------------------------------------------------| root@am335x-evm:~# omapconf show dpll OMAPCONF (rev v1.73 built Sun Dec 16 06:48:07 UTC 2018) HW Platform: Generic AM33XX (Flattened Device Tree) AM3358 ES2.1 GP Device (UNKNOWN performance ZCZ package (1.0GHz)) Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed UNKNOWN POWER IC Error: I2C Read failed UNKNOWN AUDIO IC SW Build Details: Build: Version: _____ _____ _ _ Kernel: Version: 4.14.79-gbde58ab01e Author: oe-user@oe-host Toolchain: gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11 Type: #1 PREEMPT Date: Thu Dec 20 04:12:32 UTC 2018 |--------------------------------------------| | DPLL Configuration | DPLL_PER | |--------------------------------------------| | Status | Locked | | | | | Mode | Lock | | Automatic Control | Not Supported | | LPST = Low-Power STop | | | LPBP = Low-Power ByPass | | | FRBP = Fast-Relock ByPass | | | MNBP = MN ByPass | | | | | | Sigma-Delta Divider | 4 | | SELFREQDCO | 0 | | | | | Ref. Frequency (MHz) | 24.000 | | M Multiplier Factor | 400 | | N Divider Factor | 9 | | Lock Frequency (MHz) | 960 | | | | | CLKOUT Output | | | Status | Enabled | | Clock Divider | 5 | | Clock Speed (MHz) | 192 | | | | | CLK_DCO_LDO Output | | | Status | Enabled | | Clock Speed (MHz) | 960 | | | | |--------------------------------------------| |---------------------------------------------------------------------------------------------| | DPLL Configuration | DPLL_CORE | DPLL_MPU | DPLL_DDR | DPLL_DISP | |---------------------------------------------------------------------------------------------| | Status | Locked | Locked | Locked | Locked | | | | | | | | Mode | Lock | Lock | Lock | Lock | | Automatic Control | Not Supported | Not Supported | Not Supported | Not Supported | | LPBP = Low-Power ByPass | | | | | | FRBP = Fast-Relock ByPass | | | | | | MNBP = MN ByPass | | | | | | Low-Power Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Automatic Recalibration | Disabled | Disabled | Disabled | Disabled | | Clock Ramping during Relock | Disabled | Disabled | Disabled | Disabled | | Ramping Rate (x REFCLK(s)) | 2 | 2 | 2 | 2 | | Ramping Levels | No Ramp | No Ramp | No Ramp | No Ramp | | | | | | | | Bypass Clock | CLKINP | CLKINP | CLKINP | CLKINP | | Bypass Clock Divider | | | | | | REGM4XEN Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Ref. Frequency (MHz) | 24.000 | 24.000 | 24.000 | 24.000 | | M Multiplier Factor | 125 | 30 | 101 | 5 | | N Divider Factor | 2 | 0 | 3 | 1 | | Lock Frequency (MHz) | 1000 | 720 | 606 | 60 | | | | | | | | M2 Output | | | | | | Status | | Enabled | Enabled | Enabled | | Clock Divider | | 1 | 2 | 1 | | Clock Speed (MHz) | | 720 | 303 | 60 | | | | | | | | CLK_DCO_LDO Output | | | | | | Status | Gated | | | | | Clock Speed (MHz) | 2000 | | | | | | | | | | | | | | | | | M4 Output | | | | | | Status | Enabled | | | | | Clock Divider | 10 | | | | | Clock Speed (MHz) | 200 | | | | | | | | | | | M5 Output | | | | | | Status | Enabled | | | | | Clock Divider | 8 | | | | | Clock Speed (MHz) | 250 | | | | | | | | | | | M6 Output | | | | | | Status | Gated | | | | | Clock Divider | 4 | | | | | Clock Speed (MHz) | 500 | | | | |---------------------------------------------------------------------------------------------| root@am335x-evm:~# omapconf show dpll OMAPCONF (rev v1.73 built Sun Dec 16 06:48:07 UTC 2018) HW Platform: Generic AM33XX (Flattened Device Tree) AM3358 ES2.1 GP Device (UNKNOWN performance ZCZ package (1.0GHz)) Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed UNKNOWN POWER IC Error: I2C Read failed UNKNOWN AUDIO IC SW Build Details: Build: Version: _____ _____ _ _ Kernel: Version: 4.14.79-gbde58ab01e Author: oe-user@oe-host Toolchain: gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11 Type: #1 PREEMPT Date: Thu Dec 20 04:12:32 UTC 2018 |--------------------------------------------| | DPLL Configuration | DPLL_PER | |--------------------------------------------| | Status | Locked | | | | | Mode | Lock | | Automatic Control | Not Supported | | LPST = Low-Power STop | | | LPBP = Low-Power ByPass | | | FRBP = Fast-Relock ByPass | | | MNBP = MN ByPass | | | | | | Sigma-Delta Divider | 4 | | SELFREQDCO | 0 | | | | | Ref. Frequency (MHz) | 24.000 | | M Multiplier Factor | 400 | | N Divider Factor | 9 | | Lock Frequency (MHz) | 960 | | | | | CLKOUT Output | | | Status | Enabled | | Clock Divider | 5 | | Clock Speed (MHz) | 192 | | | | | CLK_DCO_LDO Output | | | Status | Gated | | Clock Speed (MHz) | 960 | | | | |--------------------------------------------| |---------------------------------------------------------------------------------------------| | DPLL Configuration | DPLL_CORE | DPLL_MPU | DPLL_DDR | DPLL_DISP | |---------------------------------------------------------------------------------------------| | Status | Locked | Locked | Locked | Locked | | | | | | | | Mode | Lock | Lock | Lock | Lock | | Automatic Control | Not Supported | Not Supported | Not Supported | Not Supported | | LPBP = Low-Power ByPass | | | | | | FRBP = Fast-Relock ByPass | | | | | | MNBP = MN ByPass | | | | | | Low-Power Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Automatic Recalibration | Disabled | Disabled | Disabled | Disabled | | Clock Ramping during Relock | Disabled | Disabled | Disabled | Disabled | | Ramping Rate (x REFCLK(s)) | 2 | 2 | 2 | 2 | | Ramping Levels | No Ramp | No Ramp | No Ramp | No Ramp | | | | | | | | Bypass Clock | CLKINP | CLKINP | CLKINP | CLKINP | | Bypass Clock Divider | | | | | | REGM4XEN Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Ref. Frequency (MHz) | 24.000 | 24.000 | 24.000 | 24.000 | | M Multiplier Factor | 125 | 30 | 101 | 5 | | N Divider Factor | 2 | 0 | 3 | 1 | | Lock Frequency (MHz) | 1000 | 720 | 606 | 60 | | | | | | | | M2 Output | | | | | | Status | | Enabled | Enabled | Enabled | | Clock Divider | | 1 | 2 | 1 | | Clock Speed (MHz) | | 720 | 303 | 60 | | | | | | | | CLK_DCO_LDO Output | | | | | | Status | Gated | | | | | Clock Speed (MHz) | 2000 | | | | | | | | | | | | | | | | | M4 Output | | | | | | Status | Enabled | | | | | Clock Divider | 10 | | | | | Clock Speed (MHz) | 200 | | | | | | | | | | | M5 Output | | | | | | Status | Enabled | | | | | Clock Divider | 8 | | | | | Clock Speed (MHz) | 250 | | | | | | | | | | | M6 Output | | | | | | Status | Gated | | | | | Clock Divider | 4 | | | | | Clock Speed (MHz) | 500 | | | | |---------------------------------------------------------------------------------------------| root@am335x-evm:~# omapconf show dpll OMAPCONF (rev v1.73 built Sun Dec 16 06:48:07 UTC 2018) HW Platform: Generic AM33XX (Flattened Device Tree) AM3358 ES2.1 GP Device (UNKNOWN performance ZCZ package (1.0GHz)) Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed UNKNOWN POWER IC Error: I2C Read failed UNKNOWN AUDIO IC SW Build Details: Build: Version: _____ _____ _ _ Kernel: Version: 4.14.79-gbde58ab01e Author: oe-user@oe-host Toolchain: gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11 Type: #1 PREEMPT Date: Thu Dec 20 04:12:32 UTC 2018 |--------------------------------------------| | DPLL Configuration | DPLL_PER | |--------------------------------------------| | Status | Locked | | | | | Mode | Lock | | Automatic Control | Not Supported | | LPST = Low-Power STop | | | LPBP = Low-Power ByPass | | | FRBP = Fast-Relock ByPass | | | MNBP = MN ByPass | | | | | | Sigma-Delta Divider | 4 | | SELFREQDCO | 0 | | | | | Ref. Frequency (MHz) | 24.000 | | M Multiplier Factor | 400 | | N Divider Factor | 9 | | Lock Frequency (MHz) | 960 | | | | | CLKOUT Output | | | Status | Enabled | | Clock Divider | 5 | | Clock Speed (MHz) | 192 | | | | | CLK_DCO_LDO Output | | | Status | Enabled | | Clock Speed (MHz) | 960 | | | | |--------------------------------------------| |---------------------------------------------------------------------------------------------| | DPLL Configuration | DPLL_CORE | DPLL_MPU | DPLL_DDR | DPLL_DISP | |---------------------------------------------------------------------------------------------| | Status | Locked | Locked | Locked | Locked | | | | | | | | Mode | Lock | Lock | Lock | Lock | | Automatic Control | Not Supported | Not Supported | Not Supported | Not Supported | | LPBP = Low-Power ByPass | | | | | | FRBP = Fast-Relock ByPass | | | | | | MNBP = MN ByPass | | | | | | Low-Power Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Automatic Recalibration | Disabled | Disabled | Disabled | Disabled | | Clock Ramping during Relock | Disabled | Disabled | Disabled | Disabled | | Ramping Rate (x REFCLK(s)) | 2 | 2 | 2 | 2 | | Ramping Levels | No Ramp | No Ramp | No Ramp | No Ramp | | | | | | | | Bypass Clock | CLKINP | CLKINP | CLKINP | CLKINP | | Bypass Clock Divider | | | | | | REGM4XEN Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Ref. Frequency (MHz) | 24.000 | 24.000 | 24.000 | 24.000 | | M Multiplier Factor | 125 | 30 | 101 | 5 | | N Divider Factor | 2 | 0 | 3 | 1 | | Lock Frequency (MHz) | 1000 | 720 | 606 | 60 | | | | | | | | M2 Output | | | | | | Status | | Enabled | Enabled | Enabled | | Clock Divider | | 1 | 2 | 1 | | Clock Speed (MHz) | | 720 | 303 | 60 | | | | | | | | CLK_DCO_LDO Output | | | | | | Status | Gated | | | | | Clock Speed (MHz) | 2000 | | | | | | | | | | | | | | | | | M4 Output | | | | | | Status | Enabled | | | | | Clock Divider | 10 | | | | | Clock Speed (MHz) | 200 | | | | | | | | | | | M5 Output | | | | | | Status | Enabled | | | | | Clock Divider | 8 | | | | | Clock Speed (MHz) | 250 | | | | | | | | | | | M6 Output | | | | | | Status | Gated | | | | | Clock Divider | 4 | | | | | Clock Speed (MHz) | 500 | | | | |---------------------------------------------------------------------------------------------| root@am335x-evm:~# omapconf show dpll OMAPCONF (rev v1.73 built Sun Dec 16 06:48:07 UTC 2018) HW Platform: Generic AM33XX (Flattened Device Tree) AM3358 ES2.1 GP Device (UNKNOWN performance ZCZ package (1.0GHz)) Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed UNKNOWN POWER IC Error: I2C Read failed UNKNOWN AUDIO IC SW Build Details: Build: Version: _____ _____ _ _ Kernel: Version: 4.14.79-gbde58ab01e Author: oe-user@oe-host Toolchain: gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11 Type: #1 PREEMPT Date: Thu Dec 20 04:12:32 UTC 2018 |--------------------------------------------| | DPLL Configuration | DPLL_PER | |--------------------------------------------| | Status | Locked | | | | | Mode | Lock | | Automatic Control | Not Supported | | LPST = Low-Power STop | | | LPBP = Low-Power ByPass | | | FRBP = Fast-Relock ByPass | | | MNBP = MN ByPass | | | | | | Sigma-Delta Divider | 4 | | SELFREQDCO | 0 | | | | | Ref. Frequency (MHz) | 24.000 | | M Multiplier Factor | 400 | | N Divider Factor | 9 | | Lock Frequency (MHz) | 960 | | | | | CLKOUT Output | | | Status | Enabled | | Clock Divider | 5 | | Clock Speed (MHz) | 192 | | | | | CLK_DCO_LDO Output | | | Status | Gated | | Clock Speed (MHz) | 960 | | | | |--------------------------------------------| |---------------------------------------------------------------------------------------------| | DPLL Configuration | DPLL_CORE | DPLL_MPU | DPLL_DDR | DPLL_DISP | |---------------------------------------------------------------------------------------------| | Status | Locked | Locked | Locked | Locked | | | | | | | | Mode | Lock | Lock | Lock | Lock | | Automatic Control | Not Supported | Not Supported | Not Supported | Not Supported | | LPBP = Low-Power ByPass | | | | | | FRBP = Fast-Relock ByPass | | | | | | MNBP = MN ByPass | | | | | | Low-Power Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Automatic Recalibration | Disabled | Disabled | Disabled | Disabled | | Clock Ramping during Relock | Disabled | Disabled | Disabled | Disabled | | Ramping Rate (x REFCLK(s)) | 2 | 2 | 2 | 2 | | Ramping Levels | No Ramp | No Ramp | No Ramp | No Ramp | | | | | | | | Bypass Clock | CLKINP | CLKINP | CLKINP | CLKINP | | Bypass Clock Divider | | | | | | REGM4XEN Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Ref. Frequency (MHz) | 24.000 | 24.000 | 24.000 | 24.000 | | M Multiplier Factor | 125 | 125 | 101 | 5 | | N Divider Factor | 2 | 2 | 3 | 1 | | Lock Frequency (MHz) | 1000 | 1000 | 606 | 60 | | | | | | | | M2 Output | | | | | | Status | | Enabled | Enabled | Enabled | | Clock Divider | | 1 | 2 | 1 | | Clock Speed (MHz) | | 1000 | 303 | 60 | | | | | | | | CLK_DCO_LDO Output | | | | | | Status | Gated | | | | | Clock Speed (MHz) | 2000 | | | | | | | | | | | | | | | | | M4 Output | | | | | | Status | Enabled | | | | | Clock Divider | 10 | | | | | Clock Speed (MHz) | 200 | | | | | | | | | | | M5 Output | | | | | | Status | Enabled | | | | | Clock Divider | 8 | | | | | Clock Speed (MHz) | 250 | | | | | | | | | | | M6 Output | | | | | | Status | Gated | | | | | Clock Divider | 4 | | | | | Clock Speed (MHz) | 500 | | | | |---------------------------------------------------------------------------------------------| root@am335x-evm:~# omapconf show dpll OMAPCONF (rev v1.73 built Sun Dec 16 06:48:07 UTC 2018) HW Platform: Generic AM33XX (Flattened Device Tree) AM3358 ES2.1 GP Device (UNKNOWN performance ZCZ package (1.0GHz)) Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed UNKNOWN POWER IC Error: I2C Read failed UNKNOWN AUDIO IC SW Build Details: Build: Version: _____ _____ _ _ Kernel: Version: 4.14.79-gbde58ab01e Author: oe-user@oe-host Toolchain: gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11 Type: #1 PREEMPT Date: Thu Dec 20 04:12:32 UTC 2018 |--------------------------------------------| | DPLL Configuration | DPLL_PER | |--------------------------------------------| | Status | Locked | | | | | Mode | Lock | | Automatic Control | Not Supported | | LPST = Low-Power STop | | | LPBP = Low-Power ByPass | | | FRBP = Fast-Relock ByPass | | | MNBP = MN ByPass | | | | | | Sigma-Delta Divider | 4 | | SELFREQDCO | 0 | | | | | Ref. Frequency (MHz) | 24.000 | | M Multiplier Factor | 400 | | N Divider Factor | 9 | | Lock Frequency (MHz) | 960 | | | | | CLKOUT Output | | | Status | Enabled | | Clock Divider | 5 | | Clock Speed (MHz) | 192 | | | | | CLK_DCO_LDO Output | | | Status | Gated | | Clock Speed (MHz) | 960 | | | | |--------------------------------------------| |---------------------------------------------------------------------------------------------| | DPLL Configuration | DPLL_CORE | DPLL_MPU | DPLL_DDR | DPLL_DISP | |---------------------------------------------------------------------------------------------| | Status | Locked | Locked | Locked | Locked | | | | | | | | Mode | Lock | Lock | Lock | Lock | | Automatic Control | Not Supported | Not Supported | Not Supported | Not Supported | | LPBP = Low-Power ByPass | | | | | | FRBP = Fast-Relock ByPass | | | | | | MNBP = MN ByPass | | | | | | Low-Power Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Automatic Recalibration | Disabled | Disabled | Disabled | Disabled | | Clock Ramping during Relock | Disabled | Disabled | Disabled | Disabled | | Ramping Rate (x REFCLK(s)) | 2 | 2 | 2 | 2 | | Ramping Levels | No Ramp | No Ramp | No Ramp | No Ramp | | | | | | | | Bypass Clock | CLKINP | CLKINP | CLKINP | CLKINP | | Bypass Clock Divider | | | | | | REGM4XEN Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Ref. Frequency (MHz) | 24.000 | 24.000 | 24.000 | 24.000 | | M Multiplier Factor | 125 | 30 | 101 | 5 | | N Divider Factor | 2 | 0 | 3 | 1 | | Lock Frequency (MHz) | 1000 | 720 | 606 | 60 | | | | | | | | M2 Output | | | | | | Status | | Enabled | Enabled | Enabled | | Clock Divider | | 1 | 2 | 1 | | Clock Speed (MHz) | | 720 | 303 | 60 | | | | | | | | CLK_DCO_LDO Output | | | | | | Status | Gated | | | | | Clock Speed (MHz) | 2000 | | | | | | | | | | | | | | | | | M4 Output | | | | | | Status | Enabled | | | | | Clock Divider | 10 | | | | | Clock Speed (MHz) | 200 | | | | | | | | | | | M5 Output | | | | | | Status | Enabled | | | | | Clock Divider | 8 | | | | | Clock Speed (MHz) | 250 | | | | | | | | | | | M6 Output | | | | | | Status | Gated | | | | | Clock Divider | 4 | | | | | Clock Speed (MHz) | 500 | | | | |---------------------------------------------------------------------------------------------| root@am335x-evm:~# omapconf show dpll OMAPCONF (rev v1.73 built Sun Dec 16 06:48:07 UTC 2018) HW Platform: Generic AM33XX (Flattened Device Tree) AM3358 ES2.1 GP Device (UNKNOWN performance ZCZ package (1.0GHz)) Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed UNKNOWN POWER IC Error: I2C Read failed UNKNOWN AUDIO IC SW Build Details: Build: Version: _____ _____ _ _ Kernel: Version: 4.14.79-gbde58ab01e Author: oe-user@oe-host Toolchain: gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11 Type: #1 PREEMPT Date: Thu Dec 20 04:12:32 UTC 2018 |--------------------------------------------| | DPLL Configuration | DPLL_PER | |--------------------------------------------| | Status | Locked | | | | | Mode | Lock | | Automatic Control | Not Supported | | LPST = Low-Power STop | | | LPBP = Low-Power ByPass | | | FRBP = Fast-Relock ByPass | | | MNBP = MN ByPass | | | | | | Sigma-Delta Divider | 4 | | SELFREQDCO | 0 | | | | | Ref. Frequency (MHz) | 24.000 | | M Multiplier Factor | 400 | | N Divider Factor | 9 | | Lock Frequency (MHz) | 960 | | | | | CLKOUT Output | | | Status | Enabled | | Clock Divider | 5 | | Clock Speed (MHz) | 192 | | | | | CLK_DCO_LDO Output | | | Status | Gated | | Clock Speed (MHz) | 960 | | | | |--------------------------------------------| |---------------------------------------------------------------------------------------------| | DPLL Configuration | DPLL_CORE | DPLL_MPU | DPLL_DDR | DPLL_DISP | |---------------------------------------------------------------------------------------------| | Status | Locked | Locked | Locked | Locked | | | | | | | | Mode | Lock | Lock | Lock | Lock | | Automatic Control | Not Supported | Not Supported | Not Supported | Not Supported | | LPBP = Low-Power ByPass | | | | | | FRBP = Fast-Relock ByPass | | | | | | MNBP = MN ByPass | | | | | | Low-Power Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Automatic Recalibration | Disabled | Disabled | Disabled | Disabled | | Clock Ramping during Relock | Disabled | Disabled | Disabled | Disabled | | Ramping Rate (x REFCLK(s)) | 2 | 2 | 2 | 2 | | Ramping Levels | No Ramp | No Ramp | No Ramp | No Ramp | | | | | | | | Bypass Clock | CLKINP | CLKINP | CLKINP | CLKINP | | Bypass Clock Divider | | | | | | REGM4XEN Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Ref. Frequency (MHz) | 24.000 | 24.000 | 24.000 | 24.000 | | M Multiplier Factor | 125 | 125 | 101 | 5 | | N Divider Factor | 2 | 2 | 3 | 1 | | Lock Frequency (MHz) | 1000 | 1000 | 606 | 60 | | | | | | | | M2 Output | | | | | | Status | | Enabled | Enabled | Enabled | | Clock Divider | | 1 | 2 | 1 | | Clock Speed (MHz) | | 1000 | 303 | 60 | | | | | | | | CLK_DCO_LDO Output | | | | | | Status | Gated | | | | | Clock Speed (MHz) | 2000 | | | | | | | | | | | | | | | | | M4 Output | | | | | | Status | Enabled | | | | | Clock Divider | 10 | | | | | Clock Speed (MHz) | 200 | | | | | | | | | | | M5 Output | | | | | | Status | Enabled | | | | | Clock Divider | 8 | | | | | Clock Speed (MHz) | 250 | | | | | | | | | | | M6 Output | | | | | | Status | Gated | | | | | Clock Divider | 4 | | | | | Clock Speed (MHz) | 500 | | | | |---------------------------------------------------------------------------------------------| root@am335x-evm:~# omapconf show dpll OMAPCONF (rev v1.73 built Sun Dec 16 06:48:07 UTC 2018) HW Platform: Generic AM33XX (Flattened Device Tree) AM3358 ES2.1 GP Device (UNKNOWN performance ZCZ package (1.0GHz)) Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed UNKNOWN POWER IC Error: I2C Read failed UNKNOWN AUDIO IC SW Build Details: Build: Version: _____ _____ _ _ Kernel: Version: 4.14.79-gbde58ab01e Author: oe-user@oe-host Toolchain: gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11 Type: #1 PREEMPT Date: Thu Dec 20 04:12:32 UTC 2018 |--------------------------------------------| | DPLL Configuration | DPLL_PER | |--------------------------------------------| | Status | Locked | | | | | Mode | Lock | | Automatic Control | Not Supported | | LPST = Low-Power STop | | | LPBP = Low-Power ByPass | | | FRBP = Fast-Relock ByPass | | | MNBP = MN ByPass | | | | | | Sigma-Delta Divider | 4 | | SELFREQDCO | 0 | | | | | Ref. Frequency (MHz) | 24.000 | | M Multiplier Factor | 400 | | N Divider Factor | 9 | | Lock Frequency (MHz) | 960 | | | | | CLKOUT Output | | | Status | Enabled | | Clock Divider | 5 | | Clock Speed (MHz) | 192 | | | | | CLK_DCO_LDO Output | | | Status | Gated | | Clock Speed (MHz) | 960 | | | | |--------------------------------------------| |---------------------------------------------------------------------------------------------| | DPLL Configuration | DPLL_CORE | DPLL_MPU | DPLL_DDR | DPLL_DISP | |---------------------------------------------------------------------------------------------| | Status | Locked | Locked | Locked | Locked | | | | | | | | Mode | Lock | Lock | Lock | Lock | | Automatic Control | Not Supported | Not Supported | Not Supported | Not Supported | | LPBP = Low-Power ByPass | | | | | | FRBP = Fast-Relock ByPass | | | | | | MNBP = MN ByPass | | | | | | Low-Power Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Automatic Recalibration | Disabled | Disabled | Disabled | Disabled | | Clock Ramping during Relock | Disabled | Disabled | Disabled | Disabled | | Ramping Rate (x REFCLK(s)) | 2 | 2 | 2 | 2 | | Ramping Levels | No Ramp | No Ramp | No Ramp | No Ramp | | | | | | | | Bypass Clock | CLKINP | CLKINP | CLKINP | CLKINP | | Bypass Clock Divider | | | | | | REGM4XEN Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Ref. Frequency (MHz) | 24.000 | 24.000 | 24.000 | 24.000 | | M Multiplier Factor | 125 | 125 | 101 | 5 | | N Divider Factor | 2 | 2 | 3 | 1 | | Lock Frequency (MHz) | 1000 | 1000 | 606 | 60 | | | | | | | | M2 Output | | | | | | Status | | Enabled | Enabled | Enabled | | Clock Divider | | 1 | 2 | 1 | | Clock Speed (MHz) | | 1000 | 303 | 60 | | | | | | | | CLK_DCO_LDO Output | | | | | | Status | Gated | | | | | Clock Speed (MHz) | 2000 | | | | | | | | | | | | | | | | | M4 Output | | | | | | Status | Enabled | | | | | Clock Divider | 10 | | | | | Clock Speed (MHz) | 200 | | | | | | | | | | | M5 Output | | | | | | Status | Enabled | | | | | Clock Divider | 8 | | | | | Clock Speed (MHz) | 250 | | | | | | | | | | | M6 Output | | | | | | Status | Gated | | | | | Clock Divider | 4 | | | | | Clock Speed (MHz) | 500 | | | | |---------------------------------------------------------------------------------------------| root@am335x-evm:~# omapconf show dpll OMAPCONF (rev v1.73 built Sun Dec 16 06:48:07 UTC 2018) HW Platform: Generic AM33XX (Flattened Device Tree) AM3358 ES2.1 GP Device (UNKNOWN performance ZCZ package (1.0GHz)) Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed UNKNOWN POWER IC Error: I2C Read failed UNKNOWN AUDIO IC SW Build Details: Build: Version: _____ _____ _ _ Kernel: Version: 4.14.79-gbde58ab01e Author: oe-user@oe-host Toolchain: gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11 Type: #1 PREEMPT Date: Thu Dec 20 04:12:32 UTC 2018 |--------------------------------------------| | DPLL Configuration | DPLL_PER | |--------------------------------------------| | Status | Locked | | | | | Mode | Lock | | Automatic Control | Not Supported | | LPST = Low-Power STop | | | LPBP = Low-Power ByPass | | | FRBP = Fast-Relock ByPass | | | MNBP = MN ByPass | | | | | | Sigma-Delta Divider | 4 | | SELFREQDCO | 0 | | | | | Ref. Frequency (MHz) | 24.000 | | M Multiplier Factor | 400 | | N Divider Factor | 9 | | Lock Frequency (MHz) | 960 | | | | | CLKOUT Output | | | Status | Enabled | | Clock Divider | 5 | | Clock Speed (MHz) | 192 | | | | | CLK_DCO_LDO Output | | | Status | Enabled | | Clock Speed (MHz) | 960 | | | | |--------------------------------------------| |---------------------------------------------------------------------------------------------| | DPLL Configuration | DPLL_CORE | DPLL_MPU | DPLL_DDR | DPLL_DISP | |---------------------------------------------------------------------------------------------| | Status | Locked | Locked | Locked | Locked | | | | | | | | Mode | Lock | Lock | Lock | Lock | | Automatic Control | Not Supported | Not Supported | Not Supported | Not Supported | | LPBP = Low-Power ByPass | | | | | | FRBP = Fast-Relock ByPass | | | | | | MNBP = MN ByPass | | | | | | Low-Power Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Automatic Recalibration | Disabled | Disabled | Disabled | Disabled | | Clock Ramping during Relock | Disabled | Disabled | Disabled | Disabled | | Ramping Rate (x REFCLK(s)) | 2 | 2 | 2 | 2 | | Ramping Levels | No Ramp | No Ramp | No Ramp | No Ramp | | | | | | | | Bypass Clock | CLKINP | CLKINP | CLKINP | CLKINP | | Bypass Clock Divider | | | | | | REGM4XEN Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Ref. Frequency (MHz) | 24.000 | 24.000 | 24.000 | 24.000 | | M Multiplier Factor | 125 | 25 | 101 | 5 | | N Divider Factor | 2 | 1 | 3 | 1 | | Lock Frequency (MHz) | 1000 | 300 | 606 | 60 | | | | | | | | M2 Output | | | | | | Status | | Enabled | Enabled | Enabled | | Clock Divider | | 1 | 2 | 1 | | Clock Speed (MHz) | | 300 | 303 | 60 | | | | | | | | CLK_DCO_LDO Output | | | | | | Status | Gated | | | | | Clock Speed (MHz) | 2000 | | | | | | | | | | | | | | | | | M4 Output | | | | | | Status | Enabled | | | | | Clock Divider | 10 | | | | | Clock Speed (MHz) | 200 | | | | | | | | | | | M5 Output | | | | | | Status | Enabled | | | | | Clock Divider | 8 | | | | | Clock Speed (MHz) | 250 | | | | | | | | | | | M6 Output | | | | | | Status | Gated | | | | | Clock Divider | 4 | | | | | Clock Speed (MHz) | 500 | | | | |---------------------------------------------------------------------------------------------| root@am335x-evm:~# omapconf show dpll OMAPCONF (rev v1.73 built Sun Dec 16 06:48:07 UTC 2018) HW Platform: Generic AM33XX (Flattened Device Tree) AM3358 ES2.1 GP Device (UNKNOWN performance ZCZ package (1.0GHz)) Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed UNKNOWN POWER IC Error: I2C Read failed UNKNOWN AUDIO IC SW Build Details: Build: Version: _____ _____ _ _ Kernel: Version: 4.14.79-gbde58ab01e Author: oe-user@oe-host Toolchain: gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11 Type: #1 PREEMPT Date: Thu Dec 20 04:12:32 UTC 2018 |--------------------------------------------| | DPLL Configuration | DPLL_PER | |--------------------------------------------| | Status | Locked | | | | | Mode | Lock | | Automatic Control | Not Supported | | LPST = Low-Power STop | | | LPBP = Low-Power ByPass | | | FRBP = Fast-Relock ByPass | | | MNBP = MN ByPass | | | | | | Sigma-Delta Divider | 4 | | SELFREQDCO | 0 | | | | | Ref. Frequency (MHz) | 24.000 | | M Multiplier Factor | 400 | | N Divider Factor | 9 | | Lock Frequency (MHz) | 960 | | | | | CLKOUT Output | | | Status | Enabled | | Clock Divider | 5 | | Clock Speed (MHz) | 192 | | | | | CLK_DCO_LDO Output | | | Status | Gated | | Clock Speed (MHz) | 960 | | | | |--------------------------------------------| |---------------------------------------------------------------------------------------------| | DPLL Configuration | DPLL_CORE | DPLL_MPU | DPLL_DDR | DPLL_DISP | |---------------------------------------------------------------------------------------------| | Status | Locked | Locked | Locked | Locked | | | | | | | | Mode | Lock | Lock | Lock | Lock | | Automatic Control | Not Supported | Not Supported | Not Supported | Not Supported | | LPBP = Low-Power ByPass | | | | | | FRBP = Fast-Relock ByPass | | | | | | MNBP = MN ByPass | | | | | | Low-Power Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Automatic Recalibration | Disabled | Disabled | Disabled | Disabled | | Clock Ramping during Relock | Disabled | Disabled | Disabled | Disabled | | Ramping Rate (x REFCLK(s)) | 2 | 2 | 2 | 2 | | Ramping Levels | No Ramp | No Ramp | No Ramp | No Ramp | | | | | | | | Bypass Clock | CLKINP | CLKINP | CLKINP | CLKINP | | Bypass Clock Divider | | | | | | REGM4XEN Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Ref. Frequency (MHz) | 24.000 | 24.000 | 24.000 | 24.000 | | M Multiplier Factor | 125 | 25 | 101 | 5 | | N Divider Factor | 2 | 0 | 3 | 1 | | Lock Frequency (MHz) | 1000 | 600 | 606 | 60 | | | | | | | | M2 Output | | | | | | Status | | Enabled | Enabled | Enabled | | Clock Divider | | 1 | 2 | 1 | | Clock Speed (MHz) | | 600 | 303 | 60 | | | | | | | | CLK_DCO_LDO Output | | | | | | Status | Gated | | | | | Clock Speed (MHz) | 2000 | | | | | | | | | | | | | | | | | M4 Output | | | | | | Status | Enabled | | | | | Clock Divider | 10 | | | | | Clock Speed (MHz) | 200 | | | | | | | | | | | M5 Output | | | | | | Status | Enabled | | | | | Clock Divider | 8 | | | | | Clock Speed (MHz) | 250 | | | | | | | | | | | M6 Output | | | | | | Status | Gated | | | | | Clock Divider | 4 | | | | | Clock Speed (MHz) | 500 | | | | |---------------------------------------------------------------------------------------------| root@am335x-evm:~# omapconf show dpll OMAPCONF (rev v1.73 built Sun Dec 16 06:48:07 UTC 2018) HW Platform: Generic AM33XX (Flattened Device Tree) AM3358 ES2.1 GP Device (UNKNOWN performance ZCZ package (1.0GHz)) Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed UNKNOWN POWER IC Error: I2C Read failed UNKNOWN AUDIO IC SW Build Details: Build: Version: _____ _____ _ _ Kernel: Version: 4.14.79-gbde58ab01e Author: oe-user@oe-host Toolchain: gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11 Type: #1 PREEMPT Date: Thu Dec 20 04:12:32 UTC 2018 |--------------------------------------------| | DPLL Configuration | DPLL_PER | |--------------------------------------------| | Status | Locked | | | | | Mode | Lock | | Automatic Control | Not Supported | | LPST = Low-Power STop | | | LPBP = Low-Power ByPass | | | FRBP = Fast-Relock ByPass | | | MNBP = MN ByPass | | | | | | Sigma-Delta Divider | 4 | | SELFREQDCO | 0 | | | | | Ref. Frequency (MHz) | 24.000 | | M Multiplier Factor | 400 | | N Divider Factor | 9 | | Lock Frequency (MHz) | 960 | | | | | CLKOUT Output | | | Status | Enabled | | Clock Divider | 5 | | Clock Speed (MHz) | 192 | | | | | CLK_DCO_LDO Output | | | Status | Gated | | Clock Speed (MHz) | 960 | | | | |--------------------------------------------| |---------------------------------------------------------------------------------------------| | DPLL Configuration | DPLL_CORE | DPLL_MPU | DPLL_DDR | DPLL_DISP | |---------------------------------------------------------------------------------------------| | Status | Locked | Locked | Locked | Locked | | | | | | | | Mode | Lock | Lock | Lock | Lock | | Automatic Control | Not Supported | Not Supported | Not Supported | Not Supported | | LPBP = Low-Power ByPass | | | | | | FRBP = Fast-Relock ByPass | | | | | | MNBP = MN ByPass | | | | | | Low-Power Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Automatic Recalibration | Disabled | Disabled | Disabled | Disabled | | Clock Ramping during Relock | Disabled | Disabled | Disabled | Disabled | | Ramping Rate (x REFCLK(s)) | 2 | 2 | 2 | 2 | | Ramping Levels | No Ramp | No Ramp | No Ramp | No Ramp | | | | | | | | Bypass Clock | CLKINP | CLKINP | CLKINP | CLKINP | | Bypass Clock Divider | | | | | | REGM4XEN Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Ref. Frequency (MHz) | 24.000 | 24.000 | 24.000 | 24.000 | | M Multiplier Factor | 125 | 100 | 101 | 5 | | N Divider Factor | 2 | 2 | 3 | 1 | | Lock Frequency (MHz) | 1000 | 800 | 606 | 60 | | | | | | | | M2 Output | | | | | | Status | | Enabled | Enabled | Enabled | | Clock Divider | | 1 | 2 | 1 | | Clock Speed (MHz) | | 800 | 303 | 60 | | | | | | | | CLK_DCO_LDO Output | | | | | | Status | Gated | | | | | Clock Speed (MHz) | 2000 | | | | | | | | | | | | | | | | | M4 Output | | | | | | Status | Enabled | | | | | Clock Divider | 10 | | | | | Clock Speed (MHz) | 200 | | | | | | | | | | | M5 Output | | | | | | Status | Enabled | | | | | Clock Divider | 8 | | | | | Clock Speed (MHz) | 250 | | | | | | | | | | | M6 Output | | | | | | Status | Gated | | | | | Clock Divider | 4 | | | | | Clock Speed (MHz) | 500 | | | | |---------------------------------------------------------------------------------------------| root@am335x-evm:~# omapconf show dpll OMAPCONF (rev v1.73 built Sun Dec 16 06:48:07 UTC 2018) HW Platform: Generic AM33XX (Flattened Device Tree) AM3358 ES2.1 GP Device (UNKNOWN performance ZCZ package (1.0GHz)) Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed UNKNOWN POWER IC Error: I2C Read failed UNKNOWN AUDIO IC SW Build Details: Build: Version: _____ _____ _ _ Kernel: Version: 4.14.79-gbde58ab01e Author: oe-user@oe-host Toolchain: gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11 Type: #1 PREEMPT Date: Thu Dec 20 04:12:32 UTC 2018 |--------------------------------------------| | DPLL Configuration | DPLL_PER | |--------------------------------------------| | Status | Locked | | | | | Mode | Lock | | Automatic Control | Not Supported | | LPST = Low-Power STop | | | LPBP = Low-Power ByPass | | | FRBP = Fast-Relock ByPass | | | MNBP = MN ByPass | | | | | | Sigma-Delta Divider | 4 | | SELFREQDCO | 0 | | | | | Ref. Frequency (MHz) | 24.000 | | M Multiplier Factor | 400 | | N Divider Factor | 9 | | Lock Frequency (MHz) | 960 | | | | | CLKOUT Output | | | Status | Enabled | | Clock Divider | 5 | | Clock Speed (MHz) | 192 | | | | | CLK_DCO_LDO Output | | | Status | Gated | | Clock Speed (MHz) | 960 | | | | |--------------------------------------------| |---------------------------------------------------------------------------------------------| | DPLL Configuration | DPLL_CORE | DPLL_MPU | DPLL_DDR | DPLL_DISP | |---------------------------------------------------------------------------------------------| | Status | Locked | Locked | Locked | Locked | | | | | | | | Mode | Lock | Lock | Lock | Lock | | Automatic Control | Not Supported | Not Supported | Not Supported | Not Supported | | LPBP = Low-Power ByPass | | | | | | FRBP = Fast-Relock ByPass | | | | | | MNBP = MN ByPass | | | | | | Low-Power Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Automatic Recalibration | Disabled | Disabled | Disabled | Disabled | | Clock Ramping during Relock | Disabled | Disabled | Disabled | Disabled | | Ramping Rate (x REFCLK(s)) | 2 | 2 | 2 | 2 | | Ramping Levels | No Ramp | No Ramp | No Ramp | No Ramp | | | | | | | | Bypass Clock | CLKINP | CLKINP | CLKINP | CLKINP | | Bypass Clock Divider | | | | | | REGM4XEN Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Ref. Frequency (MHz) | 24.000 | 24.000 | 24.000 | 24.000 | | M Multiplier Factor | 125 | 100 | 101 | 5 | | N Divider Factor | 2 | 2 | 3 | 1 | | Lock Frequency (MHz) | 1000 | 800 | 606 | 60 | | | | | | | | M2 Output | | | | | | Status | | Enabled | Enabled | Enabled | | Clock Divider | | 1 | 2 | 1 | | Clock Speed (MHz) | | 800 | 303 | 60 | | | | | | | | CLK_DCO_LDO Output | | | | | | Status | Gated | | | | | Clock Speed (MHz) | 2000 | | | | | | | | | | | | | | | | | M4 Output | | | | | | Status | Enabled | | | | | Clock Divider | 10 | | | | | Clock Speed (MHz) | 200 | | | | | | | | | | | M5 Output | | | | | | Status | Enabled | | | | | Clock Divider | 8 | | | | | Clock Speed (MHz) | 250 | | | | | | | | | | | M6 Output | | | | | | Status | Gated | | | | | Clock Divider | 4 | | | | | Clock Speed (MHz) | 500 | | | | |---------------------------------------------------------------------------------------------| root@am335x-evm:~# omapconf show dpll OMAPCONF (rev v1.73 built Sun Dec 16 06:48:07 UTC 2018) HW Platform: Generic AM33XX (Flattened Device Tree) AM3358 ES2.1 GP Device (UNKNOWN performance ZCZ package (1.0GHz)) Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed UNKNOWN POWER IC Error: I2C Read failed UNKNOWN AUDIO IC SW Build Details: Build: Version: _____ _____ _ _ Kernel: Version: 4.14.79-gbde58ab01e Author: oe-user@oe-host Toolchain: gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11 Type: #1 PREEMPT Date: Thu Dec 20 04:12:32 UTC 2018 |--------------------------------------------| | DPLL Configuration | DPLL_PER | |--------------------------------------------| | Status | Locked | | | | | Mode | Lock | | Automatic Control | Not Supported | | LPST = Low-Power STop | | | LPBP = Low-Power ByPass | | | FRBP = Fast-Relock ByPass | | | MNBP = MN ByPass | | | | | | Sigma-Delta Divider | 4 | | SELFREQDCO | 0 | | | | | Ref. Frequency (MHz) | 24.000 | | M Multiplier Factor | 400 | | N Divider Factor | 9 | | Lock Frequency (MHz) | 960 | | | | | CLKOUT Output | | | Status | Enabled | | Clock Divider | 5 | | Clock Speed (MHz) | 192 | | | | | CLK_DCO_LDO Output | | | Status | Gated | | Clock Speed (MHz) | 960 | | | | |--------------------------------------------| |---------------------------------------------------------------------------------------------| | DPLL Configuration | DPLL_CORE | DPLL_MPU | DPLL_DDR | DPLL_DISP | |---------------------------------------------------------------------------------------------| | Status | Locked | Locked | Locked | Locked | | | | | | | | Mode | Lock | Lock | Lock | Lock | | Automatic Control | Not Supported | Not Supported | Not Supported | Not Supported | | LPBP = Low-Power ByPass | | | | | | FRBP = Fast-Relock ByPass | | | | | | MNBP = MN ByPass | | | | | | Low-Power Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Automatic Recalibration | Disabled | Disabled | Disabled | Disabled | | Clock Ramping during Relock | Disabled | Disabled | Disabled | Disabled | | Ramping Rate (x REFCLK(s)) | 2 | 2 | 2 | 2 | | Ramping Levels | No Ramp | No Ramp | No Ramp | No Ramp | | | | | | | | Bypass Clock | CLKINP | CLKINP | CLKINP | CLKINP | | Bypass Clock Divider | | | | | | REGM4XEN Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Ref. Frequency (MHz) | 24.000 | 24.000 | 24.000 | 24.000 | | M Multiplier Factor | 125 | 25 | 101 | 5 | | N Divider Factor | 2 | 1 | 3 | 1 | | Lock Frequency (MHz) | 1000 | 300 | 606 | 60 | | | | | | | | M2 Output | | | | | | Status | | Enabled | Enabled | Enabled | | Clock Divider | | 1 | 2 | 1 | | Clock Speed (MHz) | | 300 | 303 | 60 | | | | | | | | CLK_DCO_LDO Output | | | | | | Status | Gated | | | | | Clock Speed (MHz) | 2000 | | | | | | | | | | | | | | | | | M4 Output | | | | | | Status | Enabled | | | | | Clock Divider | 10 | | | | | Clock Speed (MHz) | 200 | | | | | | | | | | | M5 Output | | | | | | Status | Enabled | | | | | Clock Divider | 8 | | | | | Clock Speed (MHz) | 250 | | | | | | | | | | | M6 Output | | | | | | Status | Gated | | | | | Clock Divider | 4 | | | | | Clock Speed (MHz) | 500 | | | | |---------------------------------------------------------------------------------------------| root@am335x-evm:~# omapconf show dpll OMAPCONF (rev v1.73 built Sun Dec 16 06:48:07 UTC 2018) HW Platform: Generic AM33XX (Flattened Device Tree) AM3358 ES2.1 GP Device (UNKNOWN performance ZCZ package (1.0GHz)) Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed UNKNOWN POWER IC Error: I2C Read failed UNKNOWN AUDIO IC SW Build Details: Build: Version: _____ _____ _ _ Kernel: Version: 4.14.79-gbde58ab01e Author: oe-user@oe-host Toolchain: gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11 Type: #1 PREEMPT Date: Thu Dec 20 04:12:32 UTC 2018 |--------------------------------------------| | DPLL Configuration | DPLL_PER | |--------------------------------------------| | Status | Locked | | | | | Mode | Lock | | Automatic Control | Not Supported | | LPST = Low-Power STop | | | LPBP = Low-Power ByPass | | | FRBP = Fast-Relock ByPass | | | MNBP = MN ByPass | | | | | | Sigma-Delta Divider | 4 | | SELFREQDCO | 0 | | | | | Ref. Frequency (MHz) | 24.000 | | M Multiplier Factor | 400 | | N Divider Factor | 9 | | Lock Frequency (MHz) | 960 | | | | | CLKOUT Output | | | Status | Enabled | | Clock Divider | 5 | | Clock Speed (MHz) | 192 | | | | | CLK_DCO_LDO Output | | | Status | Gated | | Clock Speed (MHz) | 960 | | | | |--------------------------------------------| |---------------------------------------------------------------------------------------------| | DPLL Configuration | DPLL_CORE | DPLL_MPU | DPLL_DDR | DPLL_DISP | |---------------------------------------------------------------------------------------------| | Status | Locked | Locked | Locked | Locked | | | | | | | | Mode | Lock | Lock | Lock | Lock | | Automatic Control | Not Supported | Not Supported | Not Supported | Not Supported | | LPBP = Low-Power ByPass | | | | | | FRBP = Fast-Relock ByPass | | | | | | MNBP = MN ByPass | | | | | | Low-Power Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Automatic Recalibration | Disabled | Disabled | Disabled | Disabled | | Clock Ramping during Relock | Disabled | Disabled | Disabled | Disabled | | Ramping Rate (x REFCLK(s)) | 2 | 2 | 2 | 2 | | Ramping Levels | No Ramp | No Ramp | No Ramp | No Ramp | | | | | | | | Bypass Clock | CLKINP | CLKINP | CLKINP | CLKINP | | Bypass Clock Divider | | | | | | REGM4XEN Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Ref. Frequency (MHz) | 24.000 | 24.000 | 24.000 | 24.000 | | M Multiplier Factor | 125 | 30 | 101 | 5 | | N Divider Factor | 2 | 0 | 3 | 1 | | Lock Frequency (MHz) | 1000 | 720 | 606 | 60 | | | | | | | | M2 Output | | | | | | Status | | Enabled | Enabled | Enabled | | Clock Divider | | 1 | 2 | 1 | | Clock Speed (MHz) | | 720 | 303 | 60 | | | | | | | | CLK_DCO_LDO Output | | | | | | Status | Gated | | | | | Clock Speed (MHz) | 2000 | | | | | | | | | | | | | | | | | M4 Output | | | | | | Status | Enabled | | | | | Clock Divider | 10 | | | | | Clock Speed (MHz) | 200 | | | | | | | | | | | M5 Output | | | | | | Status | Enabled | | | | | Clock Divider | 8 | | | | | Clock Speed (MHz) | 250 | | | | | | | | | | | M6 Output | | | | | | Status | Gated | | | | | Clock Divider | 4 | | | | | Clock Speed (MHz) | 500 | | | | |---------------------------------------------------------------------------------------------| root@am335x-evm:~# omapconf show dpll OMAPCONF (rev v1.73 built Sun Dec 16 06:48:07 UTC 2018) HW Platform: Generic AM33XX (Flattened Device Tree) AM3358 ES2.1 GP Device (UNKNOWN performance ZCZ package (1.0GHz)) Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed UNKNOWN POWER IC Error: I2C Read failed UNKNOWN AUDIO IC SW Build Details: Build: Version: _____ _____ _ _ Kernel: Version: 4.14.79-gbde58ab01e Author: oe-user@oe-host Toolchain: gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11 Type: #1 PREEMPT Date: Thu Dec 20 04:12:32 UTC 2018 |--------------------------------------------| | DPLL Configuration | DPLL_PER | |--------------------------------------------| | Status | Locked | | | | | Mode | Lock | | Automatic Control | Not Supported | | LPST = Low-Power STop | | | LPBP = Low-Power ByPass | | | FRBP = Fast-Relock ByPass | | | MNBP = MN ByPass | | | | | | Sigma-Delta Divider | 4 | | SELFREQDCO | 0 | | | | | Ref. Frequency (MHz) | 24.000 | | M Multiplier Factor | 400 | | N Divider Factor | 9 | | Lock Frequency (MHz) | 960 | | | | | CLKOUT Output | | | Status | Enabled | | Clock Divider | 5 | | Clock Speed (MHz) | 192 | | | | | CLK_DCO_LDO Output | | | Status | Gated | | Clock Speed (MHz) | 960 | | | | |--------------------------------------------| |---------------------------------------------------------------------------------------------| | DPLL Configuration | DPLL_CORE | DPLL_MPU | DPLL_DDR | DPLL_DISP | |---------------------------------------------------------------------------------------------| | Status | Locked | Locked | Locked | Locked | | | | | | | | Mode | Lock | Lock | Lock | Lock | | Automatic Control | Not Supported | Not Supported | Not Supported | Not Supported | | LPBP = Low-Power ByPass | | | | | | FRBP = Fast-Relock ByPass | | | | | | MNBP = MN ByPass | | | | | | Low-Power Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Automatic Recalibration | Disabled | Disabled | Disabled | Disabled | | Clock Ramping during Relock | Disabled | Disabled | Disabled | Disabled | | Ramping Rate (x REFCLK(s)) | 2 | 2 | 2 | 2 | | Ramping Levels | No Ramp | No Ramp | No Ramp | No Ramp | | | | | | | | Bypass Clock | CLKINP | CLKINP | CLKINP | CLKINP | | Bypass Clock Divider | | | | | | REGM4XEN Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Ref. Frequency (MHz) | 24.000 | 24.000 | 24.000 | 24.000 | | M Multiplier Factor | 125 | 30 | 101 | 5 | | N Divider Factor | 2 | 0 | 3 | 1 | | Lock Frequency (MHz) | 1000 | 720 | 606 | 60 | | | | | | | | M2 Output | | | | | | Status | | Enabled | Enabled | Enabled | | Clock Divider | | 1 | 2 | 1 | | Clock Speed (MHz) | | 720 | 303 | 60 | | | | | | | | CLK_DCO_LDO Output | | | | | | Status | Gated | | | | | Clock Speed (MHz) | 2000 | | | | | | | | | | | | | | | | | M4 Output | | | | | | Status | Enabled | | | | | Clock Divider | 10 | | | | | Clock Speed (MHz) | 200 | | | | | | | | | | | M5 Output | | | | | | Status | Enabled | | | | | Clock Divider | 8 | | | | | Clock Speed (MHz) | 250 | | | | | | | | | | | M6 Output | | | | | | Status | Gated | | | | | Clock Divider | 4 | | | | | Clock Speed (MHz) | 500 | | | | |---------------------------------------------------------------------------------------------| root@am335x-evm:~# omapconf show dpll OMAPCONF (rev v1.73 built Sun Dec 16 06:48:07 UTC 2018) HW Platform: Generic AM33XX (Flattened Device Tree) AM3358 ES2.1 GP Device (UNKNOWN performance ZCZ package (1.0GHz)) Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed UNKNOWN POWER IC Error: I2C Read failed UNKNOWN AUDIO IC SW Build Details: Build: Version: _____ _____ _ _ Kernel: Version: 4.14.79-gbde58ab01e Author: oe-user@oe-host Toolchain: gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11 Type: #1 PREEMPT Date: Thu Dec 20 04:12:32 UTC 2018 |--------------------------------------------| | DPLL Configuration | DPLL_PER | |--------------------------------------------| | Status | Locked | | | | | Mode | Lock | | Automatic Control | Not Supported | | LPST = Low-Power STop | | | LPBP = Low-Power ByPass | | | FRBP = Fast-Relock ByPass | | | MNBP = MN ByPass | | | | | | Sigma-Delta Divider | 4 | | SELFREQDCO | 0 | | | | | Ref. Frequency (MHz) | 24.000 | | M Multiplier Factor | 400 | | N Divider Factor | 9 | | Lock Frequency (MHz) | 960 | | | | | CLKOUT Output | | | Status | Enabled | | Clock Divider | 5 | | Clock Speed (MHz) | 192 | | | | | CLK_DCO_LDO Output | | | Status | Gated | | Clock Speed (MHz) | 960 | | | | |--------------------------------------------| |---------------------------------------------------------------------------------------------| | DPLL Configuration | DPLL_CORE | DPLL_MPU | DPLL_DDR | DPLL_DISP | |---------------------------------------------------------------------------------------------| | Status | Locked | Locked | Locked | Locked | | | | | | | | Mode | Lock | Lock | Lock | Lock | | Automatic Control | Not Supported | Not Supported | Not Supported | Not Supported | | LPBP = Low-Power ByPass | | | | | | FRBP = Fast-Relock ByPass | | | | | | MNBP = MN ByPass | | | | | | Low-Power Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Automatic Recalibration | Disabled | Disabled | Disabled | Disabled | | Clock Ramping during Relock | Disabled | Disabled | Disabled | Disabled | | Ramping Rate (x REFCLK(s)) | 2 | 2 | 2 | 2 | | Ramping Levels | No Ramp | No Ramp | No Ramp | No Ramp | | | | | | | | Bypass Clock | CLKINP | CLKINP | CLKINP | CLKINP | | Bypass Clock Divider | | | | | | REGM4XEN Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Ref. Frequency (MHz) | 24.000 | 24.000 | 24.000 | 24.000 | | M Multiplier Factor | 125 | 25 | 101 | 5 | | N Divider Factor | 2 | 0 | 3 | 1 | | Lock Frequency (MHz) | 1000 | 600 | 606 | 60 | | | | | | | | M2 Output | | | | | | Status | | Enabled | Enabled | Enabled | | Clock Divider | | 1 | 2 | 1 | | Clock Speed (MHz) | | 600 | 303 | 60 | | | | | | | | CLK_DCO_LDO Output | | | | | | Status | Gated | | | | | Clock Speed (MHz) | 2000 | | | | | | | | | | | | | | | | | M4 Output | | | | | | Status | Enabled | | | | | Clock Divider | 10 | | | | | Clock Speed (MHz) | 200 | | | | | | | | | | | M5 Output | | | | | | Status | Enabled | | | | | Clock Divider | 8 | | | | | Clock Speed (MHz) | 250 | | | | | | | | | | | M6 Output | | | | | | Status | Gated | | | | | Clock Divider | 4 | | | | | Clock Speed (MHz) | 500 | | | | |---------------------------------------------------------------------------------------------| root@am335x-evm:~# omapconf show dpll OMAPCONF (rev v1.73 built Sun Dec 16 06:48:07 UTC 2018) HW Platform: Generic AM33XX (Flattened Device Tree) AM3358 ES2.1 GP Device (UNKNOWN performance ZCZ package (1.0GHz)) Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed UNKNOWN POWER IC Error: I2C Read failed UNKNOWN AUDIO IC SW Build Details: Build: Version: _____ _____ _ _ Kernel: Version: 4.14.79-gbde58ab01e Author: oe-user@oe-host Toolchain: gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11 Type: #1 PREEMPT Date: Thu Dec 20 04:12:32 UTC 2018 |--------------------------------------------| | DPLL Configuration | DPLL_PER | |--------------------------------------------| | Status | Locked | | | | | Mode | Lock | | Automatic Control | Not Supported | | LPST = Low-Power STop | | | LPBP = Low-Power ByPass | | | FRBP = Fast-Relock ByPass | | | MNBP = MN ByPass | | | | | | Sigma-Delta Divider | 4 | | SELFREQDCO | 0 | | | | | Ref. Frequency (MHz) | 24.000 | | M Multiplier Factor | 400 | | N Divider Factor | 9 | | Lock Frequency (MHz) | 960 | | | | | CLKOUT Output | | | Status | Enabled | | Clock Divider | 5 | | Clock Speed (MHz) | 192 | | | | | CLK_DCO_LDO Output | | | Status | Gated | | Clock Speed (MHz) | 960 | | | | |--------------------------------------------| |---------------------------------------------------------------------------------------------| | DPLL Configuration | DPLL_CORE | DPLL_MPU | DPLL_DDR | DPLL_DISP | |---------------------------------------------------------------------------------------------| | Status | Locked | Locked | Locked | Locked | | | | | | | | Mode | Lock | Lock | Lock | Lock | | Automatic Control | Not Supported | Not Supported | Not Supported | Not Supported | | LPBP = Low-Power ByPass | | | | | | FRBP = Fast-Relock ByPass | | | | | | MNBP = MN ByPass | | | | | | Low-Power Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Automatic Recalibration | Disabled | Disabled | Disabled | Disabled | | Clock Ramping during Relock | Disabled | Disabled | Disabled | Disabled | | Ramping Rate (x REFCLK(s)) | 2 | 2 | 2 | 2 | | Ramping Levels | No Ramp | No Ramp | No Ramp | No Ramp | | | | | | | | Bypass Clock | CLKINP | CLKINP | CLKINP | CLKINP | | Bypass Clock Divider | | | | | | REGM4XEN Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Ref. Frequency (MHz) | 24.000 | 24.000 | 24.000 | 24.000 | | M Multiplier Factor | 125 | 30 | 101 | 5 | | N Divider Factor | 2 | 0 | 3 | 1 | | Lock Frequency (MHz) | 1000 | 720 | 606 | 60 | | | | | | | | M2 Output | | | | | | Status | | Enabled | Enabled | Enabled | | Clock Divider | | 1 | 2 | 1 | | Clock Speed (MHz) | | 720 | 303 | 60 | | | | | | | | CLK_DCO_LDO Output | | | | | | Status | Gated | | | | | Clock Speed (MHz) | 2000 | | | | | | | | | | | | | | | | | M4 Output | | | | | | Status | Enabled | | | | | Clock Divider | 10 | | | | | Clock Speed (MHz) | 200 | | | | | | | | | | | M5 Output | | | | | | Status | Enabled | | | | | Clock Divider | 8 | | | | | Clock Speed (MHz) | 250 | | | | | | | | | | | M6 Output | | | | | | Status | Gated | | | | | Clock Divider | 4 | | | | | Clock Speed (MHz) | 500 | | | | |---------------------------------------------------------------------------------------------| root@am335x-evm:~# omapconf show dpll OMAPCONF (rev v1.73 built Sun Dec 16 06:48:07 UTC 2018) HW Platform: Generic AM33XX (Flattened Device Tree) AM3358 ES2.1 GP Device (UNKNOWN performance ZCZ package (1.0GHz)) Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed UNKNOWN POWER IC Error: I2C Read failed UNKNOWN AUDIO IC SW Build Details: Build: Version: _____ _____ _ _ Kernel: Version: 4.14.79-gbde58ab01e Author: oe-user@oe-host Toolchain: gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11 Type: #1 PREEMPT Date: Thu Dec 20 04:12:32 UTC 2018 |--------------------------------------------| | DPLL Configuration | DPLL_PER | |--------------------------------------------| | Status | Locked | | | | | Mode | Lock | | Automatic Control | Not Supported | | LPST = Low-Power STop | | | LPBP = Low-Power ByPass | | | FRBP = Fast-Relock ByPass | | | MNBP = MN ByPass | | | | | | Sigma-Delta Divider | 4 | | SELFREQDCO | 0 | | | | | Ref. Frequency (MHz) | 24.000 | | M Multiplier Factor | 400 | | N Divider Factor | 9 | | Lock Frequency (MHz) | 960 | | | | | CLKOUT Output | | | Status | Enabled | | Clock Divider | 5 | | Clock Speed (MHz) | 192 | | | | | CLK_DCO_LDO Output | | | Status | Gated | | Clock Speed (MHz) | 960 | | | | |--------------------------------------------| |---------------------------------------------------------------------------------------------| | DPLL Configuration | DPLL_CORE | DPLL_MPU | DPLL_DDR | DPLL_DISP | |---------------------------------------------------------------------------------------------| | Status | Locked | Locked | Locked | Locked | | | | | | | | Mode | Lock | Lock | Lock | Lock | | Automatic Control | Not Supported | Not Supported | Not Supported | Not Supported | | LPBP = Low-Power ByPass | | | | | | FRBP = Fast-Relock ByPass | | | | | | MNBP = MN ByPass | | | | | | Low-Power Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Automatic Recalibration | Disabled | Disabled | Disabled | Disabled | | Clock Ramping during Relock | Disabled | Disabled | Disabled | Disabled | | Ramping Rate (x REFCLK(s)) | 2 | 2 | 2 | 2 | | Ramping Levels | No Ramp | No Ramp | No Ramp | No Ramp | | | | | | | | Bypass Clock | CLKINP | CLKINP | CLKINP | CLKINP | | Bypass Clock Divider | | | | | | REGM4XEN Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Ref. Frequency (MHz) | 24.000 | 24.000 | 24.000 | 24.000 | | M Multiplier Factor | 125 | 125 | 101 | 5 | | N Divider Factor | 2 | 2 | 3 | 1 | | Lock Frequency (MHz) | 1000 | 1000 | 606 | 60 | | | | | | | | M2 Output | | | | | | Status | | Enabled | Enabled | Enabled | | Clock Divider | | 1 | 2 | 1 | | Clock Speed (MHz) | | 1000 | 303 | 60 | | | | | | | | CLK_DCO_LDO Output | | | | | | Status | Gated | | | | | Clock Speed (MHz) | 2000 | | | | | | | | | | | | | | | | | M4 Output | | | | | | Status | Enabled | | | | | Clock Divider | 10 | | | | | Clock Speed (MHz) | 200 | | | | | | | | | | | M5 Output | | | | | | Status | Enabled | | | | | Clock Divider | 8 | | | | | Clock Speed (MHz) | 250 | | | | | | | | | | | M6 Output | | | | | | Status | Gated | | | | | Clock Divider | 4 | | | | | Clock Speed (MHz) | 500 | | | | |---------------------------------------------------------------------------------------------| root@am335x-evm:~# omapconf show dpll OMAPCONF (rev v1.73 built Sun Dec 16 06:48:07 UTC 2018) HW Platform: Generic AM33XX (Flattened Device Tree) AM3358 ES2.1 GP Device (UNKNOWN performance ZCZ package (1.0GHz)) Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed UNKNOWN POWER IC Error: I2C Read failed UNKNOWN AUDIO IC SW Build Details: Build: Version: _____ _____ _ _ Kernel: Version: 4.14.79-gbde58ab01e Author: oe-user@oe-host Toolchain: gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11 Type: #1 PREEMPT Date: Thu Dec 20 04:12:32 UTC 2018 |--------------------------------------------| | DPLL Configuration | DPLL_PER | |--------------------------------------------| | Status | Locked | | | | | Mode | Lock | | Automatic Control | Not Supported | | LPST = Low-Power STop | | | LPBP = Low-Power ByPass | | | FRBP = Fast-Relock ByPass | | | MNBP = MN ByPass | | | | | | Sigma-Delta Divider | 4 | | SELFREQDCO | 0 | | | | | Ref. Frequency (MHz) | 24.000 | | M Multiplier Factor | 400 | | N Divider Factor | 9 | | Lock Frequency (MHz) | 960 | | | | | CLKOUT Output | | | Status | Enabled | | Clock Divider | 5 | | Clock Speed (MHz) | 192 | | | | | CLK_DCO_LDO Output | | | Status | Gated | | Clock Speed (MHz) | 960 | | | | |--------------------------------------------| |---------------------------------------------------------------------------------------------| | DPLL Configuration | DPLL_CORE | DPLL_MPU | DPLL_DDR | DPLL_DISP | |---------------------------------------------------------------------------------------------| | Status | Locked | Locked | Locked | Locked | | | | | | | | Mode | Lock | Lock | Lock | Lock | | Automatic Control | Not Supported | Not Supported | Not Supported | Not Supported | | LPBP = Low-Power ByPass | | | | | | FRBP = Fast-Relock ByPass | | | | | | MNBP = MN ByPass | | | | | | Low-Power Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Automatic Recalibration | Disabled | Disabled | Disabled | Disabled | | Clock Ramping during Relock | Disabled | Disabled | Disabled | Disabled | | Ramping Rate (x REFCLK(s)) | 2 | 2 | 2 | 2 | | Ramping Levels | No Ramp | No Ramp | No Ramp | No Ramp | | | | | | | | Bypass Clock | CLKINP | CLKINP | CLKINP | CLKINP | | Bypass Clock Divider | | | | | | REGM4XEN Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Ref. Frequency (MHz) | 24.000 | 24.000 | 24.000 | 24.000 | | M Multiplier Factor | 125 | 25 | 101 | 5 | | N Divider Factor | 2 | 0 | 3 | 1 | | Lock Frequency (MHz) | 1000 | 600 | 606 | 60 | | | | | | | | M2 Output | | | | | | Status | | Enabled | Enabled | Enabled | | Clock Divider | | 1 | 2 | 1 | | Clock Speed (MHz) | | 600 | 303 | 60 | | | | | | | | CLK_DCO_LDO Output | | | | | | Status | Gated | | | | | Clock Speed (MHz) | 2000 | | | | | | | | | | | | | | | | | M4 Output | | | | | | Status | Enabled | | | | | Clock Divider | 10 | | | | | Clock Speed (MHz) | 200 | | | | | | | | | | | M5 Output | | | | | | Status | Enabled | | | | | Clock Divider | 8 | | | | | Clock Speed (MHz) | 250 | | | | | | | | | | | M6 Output | | | | | | Status | Gated | | | | | Clock Divider | 4 | | | | | Clock Speed (MHz) | 500 | | | | |---------------------------------------------------------------------------------------------| root@am335x-evm:~# omapconf show dpll OMAPCONF (rev v1.73 built Sun Dec 16 06:48:07 UTC 2018) HW Platform: Generic AM33XX (Flattened Device Tree) AM3358 ES2.1 GP Device (UNKNOWN performance ZCZ package (1.0GHz)) Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed UNKNOWN POWER IC Error: I2C Read failed UNKNOWN AUDIO IC SW Build Details: Build: Version: _____ _____ _ _ Kernel: Version: 4.14.79-gbde58ab01e Author: oe-user@oe-host Toolchain: gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11 Type: #1 PREEMPT Date: Thu Dec 20 04:12:32 UTC 2018 |--------------------------------------------| | DPLL Configuration | DPLL_PER | |--------------------------------------------| | Status | Locked | | | | | Mode | Lock | | Automatic Control | Not Supported | | LPST = Low-Power STop | | | LPBP = Low-Power ByPass | | | FRBP = Fast-Relock ByPass | | | MNBP = MN ByPass | | | | | | Sigma-Delta Divider | 4 | | SELFREQDCO | 0 | | | | | Ref. Frequency (MHz) | 24.000 | | M Multiplier Factor | 400 | | N Divider Factor | 9 | | Lock Frequency (MHz) | 960 | | | | | CLKOUT Output | | | Status | Enabled | | Clock Divider | 5 | | Clock Speed (MHz) | 192 | | | | | CLK_DCO_LDO Output | | | Status | Gated | | Clock Speed (MHz) | 960 | | | | |--------------------------------------------| |---------------------------------------------------------------------------------------------| | DPLL Configuration | DPLL_CORE | DPLL_MPU | DPLL_DDR | DPLL_DISP | |---------------------------------------------------------------------------------------------| | Status | Locked | Locked | Locked | Locked | | | | | | | | Mode | Lock | Lock | Lock | Lock | | Automatic Control | Not Supported | Not Supported | Not Supported | Not Supported | | LPBP = Low-Power ByPass | | | | | | FRBP = Fast-Relock ByPass | | | | | | MNBP = MN ByPass | | | | | | Low-Power Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Automatic Recalibration | Disabled | Disabled | Disabled | Disabled | | Clock Ramping during Relock | Disabled | Disabled | Disabled | Disabled | | Ramping Rate (x REFCLK(s)) | 2 | 2 | 2 | 2 | | Ramping Levels | No Ramp | No Ramp | No Ramp | No Ramp | | | | | | | | Bypass Clock | CLKINP | CLKINP | CLKINP | CLKINP | | Bypass Clock Divider | | | | | | REGM4XEN Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Ref. Frequency (MHz) | 24.000 | 24.000 | 24.000 | 24.000 | | M Multiplier Factor | 125 | 100 | 101 | 5 | | N Divider Factor | 2 | 2 | 3 | 1 | | Lock Frequency (MHz) | 1000 | 800 | 606 | 60 | | | | | | | | M2 Output | | | | | | Status | | Enabled | Enabled | Enabled | | Clock Divider | | 1 | 2 | 1 | | Clock Speed (MHz) | | 800 | 303 | 60 | | | | | | | | CLK_DCO_LDO Output | | | | | | Status | Gated | | | | | Clock Speed (MHz) | 2000 | | | | | | | | | | | | | | | | | M4 Output | | | | | | Status | Enabled | | | | | Clock Divider | 10 | | | | | Clock Speed (MHz) | 200 | | | | | | | | | | | M5 Output | | | | | | Status | Enabled | | | | | Clock Divider | 8 | | | | | Clock Speed (MHz) | 250 | | | | | | | | | | | M6 Output | | | | | | Status | Gated | | | | | Clock Divider | 4 | | | | | Clock Speed (MHz) | 500 | | | | |---------------------------------------------------------------------------------------------| root@am335x-evm:~# omapconf show dpll OMAPCONF (rev v1.73 built Sun Dec 16 06:48:07 UTC 2018) HW Platform: Generic AM33XX (Flattened Device Tree) AM3358 ES2.1 GP Device (UNKNOWN performance ZCZ package (1.0GHz)) Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed UNKNOWN POWER IC Error: I2C Read failed UNKNOWN AUDIO IC SW Build Details: Build: Version: _____ _____ _ _ Kernel: Version: 4.14.79-gbde58ab01e Author: oe-user@oe-host Toolchain: gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11 Type: #1 PREEMPT Date: Thu Dec 20 04:12:32 UTC 2018 |--------------------------------------------| | DPLL Configuration | DPLL_PER | |--------------------------------------------| | Status | Locked | | | | | Mode | Lock | | Automatic Control | Not Supported | | LPST = Low-Power STop | | | LPBP = Low-Power ByPass | | | FRBP = Fast-Relock ByPass | | | MNBP = MN ByPass | | | | | | Sigma-Delta Divider | 4 | | SELFREQDCO | 0 | | | | | Ref. Frequency (MHz) | 24.000 | | M Multiplier Factor | 400 | | N Divider Factor | 9 | | Lock Frequency (MHz) | 960 | | | | | CLKOUT Output | | | Status | Enabled | | Clock Divider | 5 | | Clock Speed (MHz) | 192 | | | | | CLK_DCO_LDO Output | | | Status | Gated | | Clock Speed (MHz) | 960 | | | | |--------------------------------------------| |---------------------------------------------------------------------------------------------| | DPLL Configuration | DPLL_CORE | DPLL_MPU | DPLL_DDR | DPLL_DISP | |---------------------------------------------------------------------------------------------| | Status | Locked | Locked | Locked | Locked | | | | | | | | Mode | Lock | Lock | Lock | Lock | | Automatic Control | Not Supported | Not Supported | Not Supported | Not Supported | | LPBP = Low-Power ByPass | | | | | | FRBP = Fast-Relock ByPass | | | | | | MNBP = MN ByPass | | | | | | Low-Power Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Automatic Recalibration | Disabled | Disabled | Disabled | Disabled | | Clock Ramping during Relock | Disabled | Disabled | Disabled | Disabled | | Ramping Rate (x REFCLK(s)) | 2 | 2 | 2 | 2 | | Ramping Levels | No Ramp | No Ramp | No Ramp | No Ramp | | | | | | | | Bypass Clock | CLKINP | CLKINP | CLKINP | CLKINP | | Bypass Clock Divider | | | | | | REGM4XEN Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Ref. Frequency (MHz) | 24.000 | 24.000 | 24.000 | 24.000 | | M Multiplier Factor | 125 | 25 | 101 | 5 | | N Divider Factor | 2 | 0 | 3 | 1 | | Lock Frequency (MHz) | 1000 | 600 | 606 | 60 | | | | | | | | M2 Output | | | | | | Status | | Enabled | Enabled | Enabled | | Clock Divider | | 1 | 2 | 1 | | Clock Speed (MHz) | | 600 | 303 | 60 | | | | | | | | CLK_DCO_LDO Output | | | | | | Status | Gated | | | | | Clock Speed (MHz) | 2000 | | | | | | | | | | | | | | | | | M4 Output | | | | | | Status | Enabled | | | | | Clock Divider | 10 | | | | | Clock Speed (MHz) | 200 | | | | | | | | | | | M5 Output | | | | | | Status | Enabled | | | | | Clock Divider | 8 | | | | | Clock Speed (MHz) | 250 | | | | | | | | | | | M6 Output | | | | | | Status | Gated | | | | | Clock Divider | 4 | | | | | Clock Speed (MHz) | 500 | | | | |---------------------------------------------------------------------------------------------| root@am335x-evm:~# omapconf show dpll OMAPCONF (rev v1.73 built Sun Dec 16 06:48:07 UTC 2018) HW Platform: Generic AM33XX (Flattened Device Tree) AM3358 ES2.1 GP Device (UNKNOWN performance ZCZ package (1.0GHz)) Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed UNKNOWN POWER IC Error: I2C Read failed UNKNOWN AUDIO IC SW Build Details: Build: Version: _____ _____ _ _ Kernel: Version: 4.14.79-gbde58ab01e Author: oe-user@oe-host Toolchain: gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11 Type: #1 PREEMPT Date: Thu Dec 20 04:12:32 UTC 2018 |--------------------------------------------| | DPLL Configuration | DPLL_PER | |--------------------------------------------| | Status | Locked | | | | | Mode | Lock | | Automatic Control | Not Supported | | LPST = Low-Power STop | | | LPBP = Low-Power ByPass | | | FRBP = Fast-Relock ByPass | | | MNBP = MN ByPass | | | | | | Sigma-Delta Divider | 4 | | SELFREQDCO | 0 | | | | | Ref. Frequency (MHz) | 24.000 | | M Multiplier Factor | 400 | | N Divider Factor | 9 | | Lock Frequency (MHz) | 960 | | | | | CLKOUT Output | | | Status | Enabled | | Clock Divider | 5 | | Clock Speed (MHz) | 192 | | | | | CLK_DCO_LDO Output | | | Status | Gated | | Clock Speed (MHz) | 960 | | | | |--------------------------------------------| |---------------------------------------------------------------------------------------------| | DPLL Configuration | DPLL_CORE | DPLL_MPU | DPLL_DDR | DPLL_DISP | |---------------------------------------------------------------------------------------------| | Status | Locked | Locked | Locked | Locked | | | | | | | | Mode | Lock | Lock | Lock | Lock | | Automatic Control | Not Supported | Not Supported | Not Supported | Not Supported | | LPBP = Low-Power ByPass | | | | | | FRBP = Fast-Relock ByPass | | | | | | MNBP = MN ByPass | | | | | | Low-Power Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Automatic Recalibration | Disabled | Disabled | Disabled | Disabled | | Clock Ramping during Relock | Disabled | Disabled | Disabled | Disabled | | Ramping Rate (x REFCLK(s)) | 2 | 2 | 2 | 2 | | Ramping Levels | No Ramp | No Ramp | No Ramp | No Ramp | | | | | | | | Bypass Clock | CLKINP | CLKINP | CLKINP | CLKINP | | Bypass Clock Divider | | | | | | REGM4XEN Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Ref. Frequency (MHz) | 24.000 | 24.000 | 24.000 | 24.000 | | M Multiplier Factor | 125 | 30 | 101 | 5 | | N Divider Factor | 2 | 0 | 3 | 1 | | Lock Frequency (MHz) | 1000 | 720 | 606 | 60 | | | | | | | | M2 Output | | | | | | Status | | Enabled | Enabled | Enabled | | Clock Divider | | 1 | 2 | 1 | | Clock Speed (MHz) | | 720 | 303 | 60 | | | | | | | | CLK_DCO_LDO Output | | | | | | Status | Gated | | | | | Clock Speed (MHz) | 2000 | | | | | | | | | | | | | | | | | M4 Output | | | | | | Status | Enabled | | | | | Clock Divider | 10 | | | | | Clock Speed (MHz) | 200 | | | | | | | | | | | M5 Output | | | | | | Status | Enabled | | | | | Clock Divider | 8 | | | | | Clock Speed (MHz) | 250 | | | | | | | | | | | M6 Output | | | | | | Status | Gated | | | | | Clock Divider | 4 | | | | | Clock Speed (MHz) | 500 | | | | |---------------------------------------------------------------------------------------------| root@am335x-evm:~# omapconf show dpll OMAPCONF (rev v1.73 built Sun Dec 16 06:48:07 UTC 2018) HW Platform: Generic AM33XX (Flattened Device Tree) AM3358 ES2.1 GP Device (UNKNOWN performance ZCZ package (1.0GHz)) Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed UNKNOWN POWER IC Error: I2C Read failed UNKNOWN AUDIO IC SW Build Details: Build: Version: _____ _____ _ _ Kernel: Version: 4.14.79-gbde58ab01e Author: oe-user@oe-host Toolchain: gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11 Type: #1 PREEMPT Date: Thu Dec 20 04:12:32 UTC 2018 |--------------------------------------------| | DPLL Configuration | DPLL_PER | |--------------------------------------------| | Status | Locked | | | | | Mode | Lock | | Automatic Control | Not Supported | | LPST = Low-Power STop | | | LPBP = Low-Power ByPass | | | FRBP = Fast-Relock ByPass | | | MNBP = MN ByPass | | | | | | Sigma-Delta Divider | 4 | | SELFREQDCO | 0 | | | | | Ref. Frequency (MHz) | 24.000 | | M Multiplier Factor | 400 | | N Divider Factor | 9 | | Lock Frequency (MHz) | 960 | | | | | CLKOUT Output | | | Status | Enabled | | Clock Divider | 5 | | Clock Speed (MHz) | 192 | | | | | CLK_DCO_LDO Output | | | Status | Gated | | Clock Speed (MHz) | 960 | | | | |--------------------------------------------| |---------------------------------------------------------------------------------------------| | DPLL Configuration | DPLL_CORE | DPLL_MPU | DPLL_DDR | DPLL_DISP | |---------------------------------------------------------------------------------------------| | Status | Locked | Locked | Locked | Locked | | | | | | | | Mode | Lock | Lock | Lock | Lock | | Automatic Control | Not Supported | Not Supported | Not Supported | Not Supported | | LPBP = Low-Power ByPass | | | | | | FRBP = Fast-Relock ByPass | | | | | | MNBP = MN ByPass | | | | | | Low-Power Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Automatic Recalibration | Disabled | Disabled | Disabled | Disabled | | Clock Ramping during Relock | Disabled | Disabled | Disabled | Disabled | | Ramping Rate (x REFCLK(s)) | 2 | 2 | 2 | 2 | | Ramping Levels | No Ramp | No Ramp | No Ramp | No Ramp | | | | | | | | Bypass Clock | CLKINP | CLKINP | CLKINP | CLKINP | | Bypass Clock Divider | | | | | | REGM4XEN Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Ref. Frequency (MHz) | 24.000 | 24.000 | 24.000 | 24.000 | | M Multiplier Factor | 125 | 25 | 101 | 5 | | N Divider Factor | 2 | 1 | 3 | 1 | | Lock Frequency (MHz) | 1000 | 300 | 606 | 60 | | | | | | | | M2 Output | | | | | | Status | | Enabled | Enabled | Enabled | | Clock Divider | | 1 | 2 | 1 | | Clock Speed (MHz) | | 300 | 303 | 60 | | | | | | | | CLK_DCO_LDO Output | | | | | | Status | Gated | | | | | Clock Speed (MHz) | 2000 | | | | | | | | | | | | | | | | | M4 Output | | | | | | Status | Enabled | | | | | Clock Divider | 10 | | | | | Clock Speed (MHz) | 200 | | | | | | | | | | | M5 Output | | | | | | Status | Enabled | | | | | Clock Divider | 8 | | | | | Clock Speed (MHz) | 250 | | | | | | | | | | | M6 Output | | | | | | Status | Gated | | | | | Clock Divider | 4 | | | | | Clock Speed (MHz) | 500 | | | | |---------------------------------------------------------------------------------------------| root@am335x-evm:~# omapconf show dpll OMAPCONF (rev v1.73 built Sun Dec 16 06:48:07 UTC 2018) HW Platform: Generic AM33XX (Flattened Device Tree) AM3358 ES2.1 GP Device (UNKNOWN performance ZCZ package (1.0GHz)) Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed Error: I2C Read failed UNKNOWN POWER IC Error: I2C Read failed UNKNOWN AUDIO IC SW Build Details: Build: Version: _____ _____ _ _ Kernel: Version: 4.14.79-gbde58ab01e Author: oe-user@oe-host Toolchain: gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11 Type: #1 PREEMPT Date: Thu Dec 20 04:12:32 UTC 2018 |--------------------------------------------| | DPLL Configuration | DPLL_PER | |--------------------------------------------| | Status | Locked | | | | | Mode | Lock | | Automatic Control | Not Supported | | LPST = Low-Power STop | | | LPBP = Low-Power ByPass | | | FRBP = Fast-Relock ByPass | | | MNBP = MN ByPass | | | | | | Sigma-Delta Divider | 4 | | SELFREQDCO | 0 | | | | | Ref. Frequency (MHz) | 24.000 | | M Multiplier Factor | 400 | | N Divider Factor | 9 | | Lock Frequency (MHz) | 960 | | | | | CLKOUT Output | | | Status | Enabled | | Clock Divider | 5 | | Clock Speed (MHz) | 192 | | | | | CLK_DCO_LDO Output | | | Status | Gated | | Clock Speed (MHz) | 960 | | | | |--------------------------------------------| |---------------------------------------------------------------------------------------------| | DPLL Configuration | DPLL_CORE | DPLL_MPU | DPLL_DDR | DPLL_DISP | |---------------------------------------------------------------------------------------------| | Status | Locked | Locked | Locked | Locked | | | | | | | | Mode | Lock | Lock | Lock | Lock | | Automatic Control | Not Supported | Not Supported | Not Supported | Not Supported | | LPBP = Low-Power ByPass | | | | | | FRBP = Fast-Relock ByPass | | | | | | MNBP = MN ByPass | | | | | | Low-Power Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Automatic Recalibration | Disabled | Disabled | Disabled | Disabled | | Clock Ramping during Relock | Disabled | Disabled | Disabled | Disabled | | Ramping Rate (x REFCLK(s)) | 2 | 2 | 2 | 2 | | Ramping Levels | No Ramp | No Ramp | No Ramp | No Ramp | | | | | | | | Bypass Clock | CLKINP | CLKINP | CLKINP | CLKINP | | Bypass Clock Divider | | | | | | REGM4XEN Mode | Disabled | Disabled | Disabled | Disabled | | | | | | | | Ref. Frequency (MHz) | 24.000 | 24.000 | 24.000 | 24.000 | | M Multiplier Factor | 125 | 100 | 101 | 5 | | N Divider Factor | 2 | 2 | 3 | 1 | | Lock Frequency (MHz) | 1000 | 800 | 606 | 60 | | | | | | | | M2 Output | | | | | | Status | | Enabled | Enabled | Enabled | | Clock Divider | | 1 | 2 | 1 | | Clock Speed (MHz) | | 800 | 303 | 60 | | | | | | | | CLK_DCO_LDO Output | | | | | | Status | Gated | | | | | Clock Speed (MHz) | 2000 | | | | | | | | | | | | | | | | | M4 Output | | | | | | Status | Enabled | | | | | Clock Divider | 10 | | | | | Clock Speed (MHz) | 200 | | | | | | | | | | | M5 Output | | | | | | Status | Enabled | | | | | Clock Divider | 8 | | | | | Clock Speed (MHz) | 250 | | | | | | | | | | | M6 Output | | | | | | Status | Gated | | | | | Clock Divider | 4 | | | | | Clock Speed (MHz) | 500 | | | | |---------------------------------------------------------------------------------------------| root@am335x-evm:~# exit logout _____ _____ _ _ | _ |___ ___ ___ ___ | _ |___ ___ |_|___ ___| |_ | | _| .'| . | . | | __| _| . | | | -_| _| _| |__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_| |___| |___| Arago Project http://arago-project.org am335x-evm ttyS0 Arago 2018.10 am335x-evm ttyS0 am335x-evm login: