1)FILE:u-boot/include/configs/my_custom_board.h

/* SPI */
#undef  CONFIG_OMAP3_SPI
#define CONFIG_TI_SPI_MMAP
#define CONFIG_SF_DEFAULT_SPEED                166000000                //76800000
#define CONFIG_SF_DEFAULT_MODE                 SPI_MODE_0 
#define CONFIG_QSPI_QUAD_SUPPORT 

/* SPI SPL */
#define CONFIG_SPL_SPI_SUPPORT
#define CONFIG_SPL_DMA_SUPPORT
/*#define CONFIG_TI_EDMA3*/
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SPL_SPI_FLASH_SUPPORT

2)FILE:u-boot/arch/arm/dts/dra72-evm-common.dtsi

&qspi {
        status = "okay";

      /*spi-max-frequency = <76800000>;*/
        spi-max-frequency = <166000000>;
        m25p80@0 {
                compatible = "mt25ql02g","m25p80";
                /*spi-max-frequency = <76800000>;*/
                spi-max-frequency = <166000000>;
                reg = <0>;
                spi-tx-bus-width = <1>;
                spi-rx-bus-width = <4>;
                #address-cells = <1>;
                #size-cells = <1>;
                
           ...     followed by the partition values
}

3)FILE:u-boot/arch/arm/dts/dra7-evm.dts

&qspi {
        status = "okay";
/*      pinctrl-names = "default";
        pinctrl-0 = <&qspi1_pins>; we are not muxing the qspi pins*/

        spi-max-frequency = <166000000>;
        m25p80@0 {
                compatible = "mt25ql02g","spi-flash";
                spi-max-frequency = <166000000>;
                reg = <0>;
                spi-tx-bus-width = <1>;
                spi-rx-bus-width = <4>;
                #address-cells = <1>;
                #size-cells = <1>;
}

4)FILE:u-boot/drivers/spi/ti_qspi.c ...This is the code segment that I modify to force different modes.

       switch (mode) {
//      default:
        case SPI_RX_QUAD:
                memval |= QSPI_CMD_READ_QUAD;
                memval |= QSPI_SETUP0_NUM_D_BYTES_8_BITS;                      
                memval |= QSPI_SETUP0_READ_QUAD;
                slave->mode_rx = SPI_RX_QUAD;
                break;
//      default:
        case SPI_RX_DUAL:
                memval |= QSPI_CMD_READ_DUAL;
                memval |= QSPI_SETUP0_NUM_D_BYTES_8_BITS;
                memval |= QSPI_SETUP0_READ_DUAL;
                break;
        default:
                memval |= QSPI_CMD_READ;
                memval |= QSPI_SETUP0_NUM_D_BYTES_NO_BITS;      
                memval |= QSPI_SETUP0_READ_NORMAL;
                break;
        }
        writel(memval, &priv->base->setup0);
}