/******************************************************************************
 * Copyright (c) 2017-2018 Texas Instruments Incorporated - http://www.ti.com
 *
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 *  are met:
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 *    Redistributions in binary form must reproduce the above copyright
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 *    distribution.
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 *    its contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
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#ifndef PINMUX_H
#define PINMUX_H

#ifdef __cplusplus
extern "C" {
#endif

/* ========================================================================== */
/*                           Macros & Typedefs                                */
/* ========================================================================== */

/* Below boundary check macros are not avaialable for C++ compilers */
#ifdef __cplusplus

#ifndef INT_MAX
#define INT_MAX       (0x7FFFFFFF)
#endif

#ifndef UINT32_MAX
#define UINT32_MAX    (0xFFFFFFFFU)
#endif

#endif

/**
 * \brief Invalid Frequency
 */
#define CHIPDB_INVALID_FREQUENCY        (uint32_t)0x0U

/**
 * \brief Invalid Temperature
 */
#define CHIPDB_INVALID_TEMPERATURE      (int32_t)INT_MAX

/**
 * \brief Invalid Address
 */
#define CHIPDB_INVALID_ADDRESS          (uint32_t)UINT32_MAX

/**
 * \brief Invalid Interrupt Number
 */
#define CHIPDB_INVALID_INTERRUPT_NUM    (UINT32_MAX)

/**
 * \brief Invalid instance Number
 */
#define CHIPDB_INVALID_INSTANCE_NUM     (-1)

/**
 * \brief Invalid pinmux pin
 */
#define PINMUX_INVALID_PIN              (-1)

typedef enum
{
    CHIPDB_MOD_ID_CPTS,
    CHIPDB_MOD_ID_PWMSS,
    CHIPDB_MOD_ID_MCASP,
    CHIPDB_MOD_ID_DSS,
    CHIPDB_MOD_ID_TIMER,
    CHIPDB_MOD_ID_DCAN,
    CHIPDB_MOD_ID_GPIO,
    CHIPDB_MOD_ID_MCBSP,
    CHIPDB_MOD_ID_UART,
    CHIPDB_MOD_ID_PCIE,
    CHIPDB_MOD_ID_MMCSD,
    CHIPDB_MOD_ID_DEBUGSS,
    CHIPDB_MOD_ID_GPMC,
    CHIPDB_MOD_ID_EMAC,
    CHIPDB_MOD_ID_CPSW,
    CHIPDB_MOD_ID_DDR,
    CHIPDB_MOD_ID_MCSPI,
    CHIPDB_MOD_ID_USB,
    CHIPDB_MOD_ID_SYSTEM,
    CHIPDB_MOD_ID_I2C,
    CHIPDB_MOD_ID_QSPI,
    CHIPDB_MOD_ID_MLB,
    CHIPDB_MOD_ID_INVALID = UINT32_MAX
} chipdbModuleID_t;

/* ========================================================================== */
/*                         Structures and Enums                               */
/* ========================================================================== */

/**
 *  \brief Structure defining the pin configuration parameters.
 *
 */
typedef struct pinmuxPerCfg
{
    int16_t pinOffset;
    /**< Register offset for configuring the pin */
    int16_t optParam;
    /**< Optional param to hold the peripheral specific data */
    int32_t pinSettings;
    /**< Value to be configured,
          - Active mode configurations like Mux mode, pull config, Rx enable &
            slew rate
          - Sleep mode configurations like Deep sleep enable, o/p value &
            pull config
          - Wake up enable/disable
        Refer TRM section "7.2.1 Pad Control Registers" for more details.
    */
}pinmuxPerCfg_t;

/**
 *  \brief Structure defining the pin configuration for different instances of
 *         a module.
 */
typedef struct pinmuxModuleCfg
{
    int16_t modInstNum;
    /**< Instance number of the ip */
    int16_t doPinConfig;
    /**< Flag indicating whether this instance has to be configured. This flag
         can be altered with separate API (PinMuxConfigEnable()).
         Default configuration will be set to TRUE, but can be altered for
         different scenarios (like power management). */
    pinmuxPerCfg_t* instPins;
    /**< Pointer to list of pins corresponding to this instance */
}pinmuxModuleCfg_t;

/**
 *  \brief Structure defining the pin configuration of a board.
 */
typedef struct pinmuxBoardCfg
{
    chipdbModuleID_t moduleId;
    /**< Module ID */
    pinmuxModuleCfg_t* modulePinCfg;
    /**< Pin config info of a module: #pinmuxModuleCfg_t */
}pinmuxBoardCfg_t;

#ifdef __cplusplus
}
#endif

#endif
