// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
 */

/* AM437x GP EVM */

/dts-v1/;

#include "am4372.dtsi"
#include "am4372-u-boot.dtsi"
#include <dt-bindings/pinctrl/am43xx.h>
#include <dt-bindings/pwm/pwm.h>
#include <dt-bindings/gpio/gpio.h>

/ {
	model = "TI AM437x UPE1";
	compatible = "ti,am437x-gp-evm","ti,am4372","ti,am43";

	ocp {
		bootph-pre-ram;
	};

	//aliases {
	//	display0 = &lcd0;
	//};

	chosen {
		stdout-path = &uart0;
		tick-timer = &timer2;
	};

	/* 3.3V fixed regulator (eMMC/SD 공용) */
	vmmcsd_fixed: fixedregulator-sd {
		compatible = "regulator-fixed";
		regulator-name = "vmmcsd_fixed";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		enable-active-high;
	};

	backlight {
		compatible = "pwm-backlight";
		pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>;
		brightness-levels = <0 51 53 56 62 75 101 152 255>;
		default-brightness-level = <8>;
	};
};

&am43xx_pinmux {
	pinctrl-names = "default", "sleep";
	/* I2C0: PMIC, EEPROM */
	i2c0_pins: i2c0_pins {
		pinctrl-single,pins = <
			AM4372_IOPAD(0x98c, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)  /* i2c0_sda */
			AM4372_IOPAD(0x988, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)  /* i2c0_scl */
		>;
	};

	/* I2C1 */
	i2c1_pins: i2c1_pins {
		pinctrl-single,pins = <
			AM4372_IOPAD(0xa40, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE1)  /* spi0_cs0.i2c1_scl */
			AM4372_IOPAD(0xa48, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE1)  /* spi0_d1.i2c1_sda  */
		>;
	};

	/* SD card */
	mmc1_pins: mmc1-pins {
		pinctrl-single,pins = <
			AM4372_IOPAD(0x900, PIN_INPUT | MUX_MODE0) /* (D1) mmc0_clk.mmc0_clk */
			AM4372_IOPAD(0x904, PIN_INPUT | MUX_MODE0) /* (D2) mmc0_cmd.mmc0_cmd */
			AM4372_IOPAD(0x8fc, PIN_INPUT | MUX_MODE0) /* (C1) mmc0_dat0.mmc0_dat0 */
			AM4372_IOPAD(0x8f8, PIN_INPUT | MUX_MODE0) /* (C2) mmc0_dat1.mmc0_dat1 */
			AM4372_IOPAD(0x8f4, PIN_INPUT | MUX_MODE0) /* (B2) mmc0_dat2.mmc0_dat2 */
			AM4372_IOPAD(0x8f0, PIN_INPUT | MUX_MODE0) /* (B1) mmc0_dat3.mmc0_dat3 */
			AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* (R25) spi0_cs1.mmc0_sdcd */
		>;
	};
	
	/* eMMC */
	emmc_pins_default: emmc-default-pins {
		pinctrl-single,pins = <
			AM4372_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
			AM4372_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
			AM4372_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
			AM4372_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
			AM4372_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
			AM4372_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
			AM4372_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
			AM4372_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
			AM4372_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
			AM4372_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
		>;
	};

	emmc_pins_sleep: emmc-sleep-pins {
		pinctrl-single,pins = <
			AM4372_IOPAD(0x800, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad0.gpio1_0 */
			AM4372_IOPAD(0x804, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad1.gpio1_1 */
			AM4372_IOPAD(0x808, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad2.gpio1_2 */
			AM4372_IOPAD(0x80c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad3.gpio1_3 */
			AM4372_IOPAD(0x810, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad4.gpio1_4 */
			AM4372_IOPAD(0x814, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad5.gpio1_5 */
			AM4372_IOPAD(0x818, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad6.gpio1_6 */
			AM4372_IOPAD(0x81c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad7.gpio1_7 */
			AM4372_IOPAD(0x880, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn1.gpio1_30 */
			AM4372_IOPAD(0x884, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn2.gpio1_31 */
		>;
	};

	cpsw_default: cpsw_default {
		pinctrl-single,pins = <
			/* Slave 1 */
			AM4372_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txen.rgmii1_txen */
			AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxdv.rgmii1_rxctl */
			AM4372_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd1.rgmii1_txd3 */
			AM4372_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd0.rgmii1_txd2 */
			AM4372_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd1.rgmii1_txd1 */
			AM4372_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd0.rgmii1_txd0 */
			AM4372_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txclk.rmii1_tclk */
			AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxclk.rmii1_rclk */
			AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd1.rgmii1_rxd3 */
			AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd0.rgmii1_rxd2 */
			AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd1.rgmii1_rxd1 */
			AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd0.rgmii1_rxd0 */
		>;
	};

	cpsw_sleep: cpsw_sleep {
		pinctrl-single,pins = <
			/* Slave 1 reset value */
			AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM4372_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM4372_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM4372_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
		>;
	};

	davinci_mdio_default: davinci_mdio_default {
		pinctrl-single,pins = <
			/* MDIO */
			AM4372_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)	/* mdio_data.mdio_data */
			AM4372_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)			/* mdio_clk.mdio_clk */
		>;
	};

	davinci_mdio_sleep: davinci_mdio_sleep {
		pinctrl-single,pins = <
			/* MDIO reset value */
			AM4372_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM4372_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
		>;
	};
	
	ecap0_pins: backlight_pins {
		pinctrl-single,pins = <
			AM4372_IOPAD(0x964, MUX_MODE0)       /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
		>;
	};
	
	/* QSPI */
	qspi1_default: qspi1-default-pins {
		pinctrl-single,pins = <
			//AM4372_IOPAD(0x888, PIN_OUTPUT | MUX_MODE2) /* (B12) gpmc_csn3.qspi_clk */
			//AM4372_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE3) /* (A8) gpmc_csn0.qspi_csn */
			//AM4372_IOPAD(0x890, PIN_INPUT | MUX_MODE3) /* (A9) gpmc_advn_ale.qspi_d0 */
			//AM4372_IOPAD(0x894, PIN_INPUT | MUX_MODE3) /* (E10) gpmc_oen_ren.qspi_d1 */
			//AM4372_IOPAD(0x898, PIN_INPUT | MUX_MODE3) /* (D10) gpmc_wen.qspi_d2 */
			//AM4372_IOPAD(0x89c, PIN_INPUT | MUX_MODE3) /* (C10) gpmc_be0n_cle.qspi_d3 */
			
			AM4372_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE3)	/* gpmc_csn0.qspi_csn */
			AM4372_IOPAD(0x888, PIN_OUTPUT | MUX_MODE2)	/* gpmc_csn3.qspi_clk */
			AM4372_IOPAD(0x890, PIN_INPUT | MUX_MODE3)	/* gpmc_advn_ale.qspi_d0 */
			AM4372_IOPAD(0x894, PIN_INPUT | MUX_MODE3)	/* gpmc_oen_ren.qspi_d1 */
			AM4372_IOPAD(0x898, PIN_INPUT | MUX_MODE3)	/* gpmc_wen.qspi_d2 */
			AM4372_IOPAD(0x89c, PIN_INPUT | MUX_MODE3)	/* gpmc_be0n_cle.qspi_d3 */
		>;
	};
};

&i2c0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&i2c0_pins>;
	clock-frequency = <100000>;

	/* Set OPP50 (0.95V) for VDD MPU and core */
	sleep-sequence = /bits/ 8 <
		0x02 0x24 0x10 0x6b /* Password unlock 1 */
		0x02 0x24 0x16 0x8A /* Set DCDC1 (Core) to 0.95V */
		0x02 0x24 0x10 0x67 /* Password unlock 3 */
		0x02 0x24 0x1A 0x86 /* Apply DCDC changes */
		0x02 0x24 0x10 0x6F /* Password unlock for LS */
		0x02 0x24 0x12 0x0F /* ENABLE2 LS2_EN=0, LS3_EN=0 (off) */
	>;

	/* Set OPP100 (1.10V) for VDD core */
	wake-sequence = /bits/ 8 <
		0x02 0x24 0x10 0x6B /* Password unlock 2 */
		0x02 0x24 0x16 0x99 /* Set DCDC1 (Core) to 1.1V */
		0x02 0x24 0x10 0x67 /* Password unlock 3 */
		0x02 0x24 0x1A 0x86 /* Apply DCDC changes */
		0x02 0x24 0x10 0x6F /* Password unlock for LS */
		0x02 0x24 0x12 0x0F /* ENABLE2 LS2_EN=1, LS3_EN=1 (on, Bit 2/1 = 1) */
	>;
	
	tps65218: tps65218@24 {
		reg = <0x24>;
		compatible = "ti,tps65218";
		interrupts = <GIC_SPI 7 IRQ_TYPE_NONE>; /* NMIn */
		interrupt-controller;
		#interrupt-cells = <2>;

		dcdc1: regulator-dcdc1 {
			compatible = "ti,tps65218-dcdc1";
			regulator-name = "vdd_core";
			regulator-min-microvolt = <912000>;
			regulator-max-microvolt = <1144000>;
			regulator-boot-on;
			regulator-always-on;
		};

		dcdc2: regulator-dcdc2 {
			compatible = "ti,tps65218-dcdc2";
			regulator-name = "vdd_mpu";
			regulator-min-microvolt = <912000>;
			regulator-max-microvolt = <1378000>;
			regulator-boot-on;
			regulator-always-on;
		};

		dcdc3: regulator-dcdc3 {
			compatible = "ti,tps65218-dcdc3";
			regulator-name = "vdcdc3";
			regulator-min-microvolt = <1500000>;
			regulator-max-microvolt = <1500000>;
			regulator-boot-on;
			regulator-always-on;
		};
		dcdc5: regulator-dcdc5 {
			compatible = "ti,tps65218-dcdc5";
			regulator-name = "v1_0bat";
			regulator-min-microvolt = <1000000>;
			regulator-max-microvolt = <1000000>;
		};

		dcdc6: regulator-dcdc6 {
			compatible = "ti,tps65218-dcdc6";
			regulator-name = "v1_8bat";
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <1800000>;
		};

		ldo1: regulator-ldo1 {
			compatible = "ti,tps65218-ldo1";
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <1800000>;
			regulator-boot-on;
			regulator-always-on;
		};
		
		/* for usb vbus control */
		ls2: regulator-ls2 {
			compatible = "ti,tps65218-ls2";
			regulator-name = "vdd_vbus0";
			//regulator-min-microamp = <100000>;
			//regulator-max-microamp = <1000000>;
			regulator-always-on;
			regulator-boot-on;
		};
		
		ls3: regulator-ls3 {
			compatible = "ti,tps65218-ls3";
			regulator-name = "vdd_vbus1";
			//regulator-min-microamp = <100000>;
			//regulator-max-microamp = <1000000>;
			regulator-always-on;
			regulator-boot-on;
		};
	};
};

&i2c1 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&i2c1_pins>;
	clock-frequency = <100000>;
};

&gpio0 {
	status = "okay";
};

&gpio1 {
	status = "okay";
};

&gpio3 {
	status = "okay";
};

&gpio4 {
	status = "okay";
};

&gpio5 {
	status = "okay";
};

/* SD card */
&mmc1 {
	status = "okay";
	vmmc-supply = <&vmmcsd_fixed>;
	bus-width = <4>;
	pinctrl-names = "default";
	pinctrl-0 = <&mmc1_pins>;
	cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
};

/* eMMC */
&mmc2 {
	/*
	 * When enabling eMMC, disable GPMC/NAND and set
	 * SelEMMCorNAND to output-high
	 */
	status = "okay";
	vmmc-supply = <&vmmcsd_fixed>;
	bus-width = <8>;
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&emmc_pins_default>;
	pinctrl-1 = <&emmc_pins_sleep>;
	non-removable;
};

&usb2_phy1 {
	status = "okay";
};

&usb1 {
	dr_mode = "peripheral";
	status = "okay";
};

&usb2_phy2 {
	status = "okay";
};

&usb2 {
	dr_mode = "host";
	status = "okay";
};

&mac {
	slaves = <1>;
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&cpsw_default>;
	pinctrl-1 = <&cpsw_sleep>;
	status = "okay";
};

&davinci_mdio {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&davinci_mdio_default>;
	pinctrl-1 = <&davinci_mdio_sleep>;
	status = "okay";

	ethphy0: ethernet-phy@0 {
		reg = <0>;
	};
};

&cpsw_emac0 {
	phy-handle = <&ethphy0>;
	phy-mode = "rgmii";
};

&elm {
	status = "okay";
};

&epwmss0 {
	status = "okay";
};

&ecap0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&ecap0_pins>;
};

&gpmc {
    status = "disabled";
};

&qspi {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&qspi1_default>;

	spi-max-frequency = <24000000>;
	flash@0 {
		compatible = "spansion,s25fl128s", "jedec,spi-nor";
		spi-max-frequency = <24000000>;
		reg = <0>;
		spi-cpol;
		spi-cpha;
		spi-tx-bus-width = <1>;
		spi-rx-bus-width = <4>;
		#address-cells = <1>;
		#size-cells = <1>;

		/* MTD partition table.
		 * The ROM checks the first 512KiB
		 * for a valid file to boot(XIP).
		 */
		partition@0 {
			label = "QSPI.U_BOOT";
			reg = <0x00000000 0x00080000>;
		};
		partition@1 {
			label = "QSPI.U_BOOT.backup";
			reg = <0x00080000 0x00080000>;
		};
		partition@2 {
			label = "QSPI.U_BOOT_ENV";
			reg = <0x00100000 0x00020000>;
		};
		partition@3 {
			label = "QSPI.U-BOOT-ENV.backup";
			reg = <0x00120000 0x00020000>;
		};
		partition@4 {
			label = "QSPI.U-BOOT-DEVICETREE";
			reg = <0x00140000 0x00010000>;
		};
		partition@5 {
			label = "QSPI.KERNEL";
			reg = <0x00150000 0x00500000>;
		};
		partition@6 {
			label = "QSPI.FILESYSTEM";
			reg = <0x00650000 0x9B0000>;
		};
	};
};

&uart0 {
	bootph-pre-ram;
};

&mmc1 {
	bootph-pre-ram;
};

&mac {
	bootph-pre-ram;
};

&davinci_mdio {
	bootph-pre-ram;
};

&cpsw_emac0 {
	bootph-pre-ram;
};

&phy_sel {
	bootph-pre-ram;
};

&i2c0 {
	bootph-pre-ram;
};

&l4_wkup {
	bootph-pre-ram;
};

&scm {
	bootph-pre-ram;
};

&scm_conf {
	bootph-pre-ram;
};

&ethphy0 {
	bootph-pre-ram;
};