[C66xx_DSP1] 
Processing config file ..\testvecs\config\infer\tidl_config_jdetnet.txt !
Param1: 20, Param2: 10, Margin: 20
  0, TIDL_DataLayer                ,  0,  -1 ,  1 ,  x ,  x ,  x ,  x ,  x ,  x ,  x ,  x ,  0 ,    0 ,    0 ,    0 ,    0 ,    1 ,    3 ,  320 ,  768 ,
  1, TIDL_BatchNormLayer           ,  2,   1 ,  1 ,  0 ,  x ,  x ,  x ,  x ,  x ,  x ,  x ,  1 ,    1 ,    3 ,  320 ,  768 ,    1 ,    3 ,  320 ,  768 ,
  2, TIDL_ConvolutionLayer         ,  2,   1 ,  1 ,  1 ,  x ,  x ,  x ,  x ,  x ,  x ,  x ,  2 ,    1 ,    3 ,  320 ,  768 ,    1 ,   32 ,  160 ,  384 ,
  3, TIDL_ConvolutionLayer         ,  2,   1 ,  1 ,  2 ,  x ,  x ,  x ,  x ,  x ,  x ,  x ,  3 ,    1 ,   32 ,  160 ,  384 ,    1 ,   32 ,   80 ,  192 ,
  4, TIDL_ConvolutionLayer         ,  2,   1 ,  1 ,  3 ,  x ,  x ,  x ,  x ,  x ,  x ,  x ,  4 ,    1 ,   32 ,   80 ,  192 ,    1 ,   64 ,   80 ,  192 ,
  5, TIDL_ConvolutionLayer         ,  2,   1 ,  1 ,  4 ,  x ,  x ,  x ,  x ,  x ,  x ,  x ,  5 ,    1 ,   64 ,   80 ,  192 ,    1 ,   64 ,   40 ,   96 ,
  6, TIDL_ConvolutionLayer         ,  2,   1 ,  1 ,  5 ,  x ,  x ,  x ,  x ,  x ,  x ,  x ,  6 ,    1 ,   64 ,   40 ,   96 ,    1 ,  128 ,   40 ,   96 ,
  7, TIDL_ConvolutionLayer         ,  2,   1 ,  1 ,  6 ,  x ,  x ,  x ,  x ,  x ,  x ,  x ,  7 ,    1 ,  128 ,   40 ,   96 ,    1 ,  128 ,   40 ,   96 ,
  8, TIDL_PoolingLayer             ,  2,   1 ,  1 ,  7 ,  x ,  x ,  x ,  x ,  x ,  x ,  x ,  8 ,    1 ,  128 ,   40 ,   96 ,    1 ,  128 ,   20 ,   48 ,
  9, TIDL_ConvolutionLayer         ,  2,   1 ,  1 ,  8 ,  x ,  x ,  x ,  x ,  x ,  x ,  x ,  9 ,    1 ,  128 ,   20 ,   48 ,    1 ,  256 ,   20 ,   48 ,
 10, TIDL_ConvolutionLayer         ,  2,   1 ,  1 ,  9 ,  x ,  x ,  x ,  x ,  x ,  x ,  x , 10 ,    1 ,  256 ,   20 ,   48 ,    1 ,  256 ,   10 ,   24 ,
 11, TIDL_ConvolutionLayer         ,  2,   1 ,  1 , 10 ,  x ,  x ,  x ,  x ,  x ,  x ,  x , 11 ,    1 ,  256 ,   10 ,   24 ,    1 ,  512 ,   10 ,   24 ,
 12, TIDL_ConvolutionLayer         ,  2,   1 ,  1 , 11 ,  x ,  x ,  x ,  x ,  x ,  x ,  x , 12 ,    1 ,  512 ,   10 ,   24 ,    1 ,  512 ,   10 ,   24 ,
 13, TIDL_PoolingLayer             ,  2,   1 ,  1 , 12 ,  x ,  x ,  x ,  x ,  x ,  x ,  x , 13 ,    1 ,  512 ,   10 ,   24 ,    1 ,  512 ,    5 ,   12 ,
 14, TIDL_PoolingLayer             ,  2,   1 ,  1 , 13 ,  x ,  x ,  x ,  x ,  x ,  x ,  x , 14 ,    1 ,  512 ,    5 ,   12 ,    1 ,  512 ,    3 ,    6 ,
 15, TIDL_PoolingLayer             ,  2,   1 ,  1 , 14 ,  x ,  x ,  x ,  x ,  x ,  x ,  x , 15 ,    1 ,  512 ,    3 ,    6 ,    1 ,  512 ,    2 ,    3 ,
 16, TIDL_ConvolutionLayer         ,  2,   1 ,  1 ,  7 ,  x ,  x ,  x ,  x ,  x ,  x ,  x , 16 ,    1 ,  128 ,   40 ,   96 ,    1 ,  256 ,   40 ,   96 ,
 17, TIDL_ConvolutionLayer         ,  2,   1 ,  1 , 12 ,  x ,  x ,  x ,  x ,  x ,  x ,  x , 17 ,    1 ,  512 ,   10 ,   24 ,    1 ,  256 ,   10 ,   24 ,
 18, TIDL_ConvolutionLayer         ,  2,   1 ,  1 , 13 ,  x ,  x ,  x ,  x ,  x ,  x ,  x , 18 ,    1 ,  512 ,    5 ,   12 ,    1 ,  256 ,    5 ,   12 ,
 19, TIDL_ConvolutionLayer         ,  2,   1 ,  1 , 14 ,  x ,  x ,  x ,  x ,  x ,  x ,  x , 19 ,    1 ,  512 ,    3 ,    6 ,    1 ,  256 ,    3 ,    6 ,
 20, TIDL_ConvolutionLayer         ,  2,   1 ,  1 , 15 ,  x ,  x ,  x ,  x ,  x ,  x ,  x , 20 ,    1 ,  512 ,    2 ,    3 ,    1 ,  256 ,    2 ,    3 ,
 21, TIDL_ConvolutionLayer         ,  2,   1 ,  1 , 16 ,  x ,  x ,  x ,  x ,  x ,  x ,  x , 21 ,    1 ,  256 ,   40 ,   96 ,    1 ,   16 ,   40 ,   96 ,
 22, TIDL_FlattenLayer             ,  2,   1 ,  1 , 21 ,  x ,  x ,  x ,  x ,  x ,  x ,  x , 22 ,    1 ,   16 ,   40 ,   96 ,    1 ,    1 ,    1 ,61440 ,
 23, TIDL_ConvolutionLayer         ,  2,   1 ,  1 , 16 ,  x ,  x ,  x ,  x ,  x ,  x ,  x , 23 ,    1 ,  256 ,   40 ,   96 ,    1 ,   16 ,   40 ,   96 ,
 24, TIDL_FlattenLayer             ,  2,   1 ,  1 , 23 ,  x ,  x ,  x ,  x ,  x ,  x ,  x , 24 ,    1 ,   16 ,   40 ,   96 ,    1 ,    1 ,    1 ,61440 ,
 25, TIDL_ConvolutionLayer         ,  2,   1 ,  1 , 17 ,  x ,  x ,  x ,  x ,  x ,  x ,  x , 26 ,    1 ,  256 ,   10 ,   24 ,    1 ,   24 ,   10 ,   24 ,
 26, TIDL_FlattenLayer             ,  2,   1 ,  1 , 26 ,  x ,  x ,  x ,  x ,  x ,  x ,  x , 27 ,    1 ,   24 ,   10 ,   24 ,    1 ,    1 ,    1 , 5760 ,
 27, TIDL_ConvolutionLayer         ,  2,   1 ,  1 , 17 ,  x ,  x ,  x ,  x ,  x ,  x ,  x , 28 ,    1 ,  256 ,   10 ,   24 ,    1 ,   24 ,   10 ,   24 ,
 28, TIDL_FlattenLayer             ,  2,   1 ,  1 , 28 ,  x ,  x ,  x ,  x ,  x ,  x ,  x , 29 ,    1 ,   24 ,   10 ,   24 ,    1 ,    1 ,    1 , 5760 ,
 29, TIDL_ConvolutionLayer         ,  2,   1 ,  1 , 18 ,  x ,  x ,  x ,  x ,  x ,  x ,  x , 31 ,    1 ,  256 ,    5 ,   12 ,    1 ,   24 ,    5 ,   12 ,
 30, TIDL_FlattenLayer             ,  2,   1 ,  1 , 31 ,  x ,  x ,  x ,  x ,  x ,  x ,  x , 32 ,    1 ,   24 ,    5 ,   12 ,    1 ,    1 ,    1 , 1440 ,
 31, TIDL_ConvolutionLayer         ,  2,   1 ,  1 , 18 ,  x ,  x ,  x ,  x ,  x ,  x ,  x , 33 ,    1 ,  256 ,    5 ,   12 ,    1 ,   24 ,    5 ,   12 ,
 32, TIDL_FlattenLayer             ,  2,   1 ,  1 , 33 ,  x ,  x ,  x ,  x ,  x ,  x ,  x , 34 ,    1 ,   24 ,    5 ,   12 ,    1 ,    1 ,    1 , 1440 ,
 33, TIDL_ConvolutionLayer         ,  2,   1 ,  1 , 19 ,  x ,  x ,  x ,  x ,  x ,  x ,  x , 36 ,    1 ,  256 ,    3 ,    6 ,    1 ,   24 ,    3 ,    6 ,
 34, TIDL_FlattenLayer             ,  2,   1 ,  1 , 36 ,  x ,  x ,  x ,  x ,  x ,  x ,  x , 37 ,    1 ,   24 ,    3 ,    6 ,    1 ,    1 ,    1 ,  432 ,
 35, TIDL_ConvolutionLayer         ,  2,   1 ,  1 , 19 ,  x ,  x ,  x ,  x ,  x ,  x ,  x , 38 ,    1 ,  256 ,    3 ,    6 ,    1 ,   24 ,    3 ,    6 ,
 36, TIDL_FlattenLayer             ,  2,   1 ,  1 , 38 ,  x ,  x ,  x ,  x ,  x ,  x ,  x , 39 ,    1 ,   24 ,    3 ,    6 ,    1 ,    1 ,    1 ,  432 ,
 37, TIDL_ConvolutionLayer         ,  2,   1 ,  1 , 20 ,  x ,  x ,  x ,  x ,  x ,  x ,  x , 41 ,    1 ,  256 ,    2 ,    3 ,    1 ,   16 ,    2 ,    3 ,
 38, TIDL_FlattenLayer             ,  2,   1 ,  1 , 41 ,  x ,  x ,  x ,  x ,  x ,  x ,  x , 42 ,    1 ,   16 ,    2 ,    3 ,    1 ,    1 ,    1 ,   96 ,
 39, TIDL_ConvolutionLayer         ,  2,   1 ,  1 , 20 ,  x ,  x ,  x ,  x ,  x ,  x ,  x , 43 ,    1 ,  256 ,    2 ,    3 ,    1 ,   16 ,    2 ,    3 ,
 40, TIDL_FlattenLayer             ,  2,   1 ,  1 , 43 ,  x ,  x ,  x ,  x ,  x ,  x ,  x , 44 ,    1 ,   16 ,    2 ,    3 ,    1 ,    1 ,    1 ,   96 ,
 41, TIDL_ConcatLayer              ,  2,   5 ,  1 , 22 , 27 , 32 , 37 , 42 ,  x ,  x ,  x , 46 ,    1 ,    1 ,    1 ,61440 ,    1 ,    1 ,    1 ,69168 ,
 42, TIDL_ConcatLayer              ,  2,   5 ,  1 , 24 , 29 , 34 , 39 , 44 ,  x ,  x ,  x , 47 ,    1 ,    1 ,    1 ,61440 ,    1 ,    1 ,    1 ,69168 ,
 43, TIDL_DetectionOutputLayer     ,  2,   2 ,  1 , 46 , 47 ,  x ,  x ,  x ,  x ,  x ,  x , 48 ,    1 ,    1 ,    1 ,69168 ,    1 ,    1 ,    1 ,  560 ,
 44, TIDL_DataLayer                ,  0,   1 , -1 , 48 ,  x ,  x ,  x ,  x ,  x ,  x ,  x ,  0 ,    1 ,    1 ,    1 ,  560 ,    0 ,    0 ,    0 ,    0 ,
Layer ID    ,inBlkWidth  ,inBlkHeight ,inBlkPitch  ,outBlkWidth ,outBlkHeight,outBlkPitch ,numInChs    ,numOutChs   ,numProcInChs,numLclInChs ,numLclOutChs,numProcItrs ,numAccItrs  ,numHorBlock ,numVerBlock ,inBlkChPitch,outBlkChPitc,alignOrNot 
      2          264           24          264          128            8          128            3           32            3            1            8            1            3            3           20         6336         1024            1    
      3          136           10          136          128            8          128            8            8            8            4            8            1            2            3           20         1360         1024            1    
      4          136           10          136          128            8          128           32           64           32           16            8            1            2            2           10         1360         1024            1    
      5          136           10          136          128            8          128           16           16           16            8            8            1            2            2           10         1360         1024            1    
      6          104           10          104           96            8           96           64          128           64           32            8            1            2            1            5         1040          768            1    
      7          104           10          104           96            8           96           32           32           32           16            8            1            2            1            5         1040          768            1    
      9           56           10           56           48            8           48          128          256          128           32            8            1            4            1            3          560          384            1    
     10           56           10           56           48            8           48           64           64           64           32            8            1            2            1            3          560          384            1    
     11           40           10           40           32            8           32          256          512          256           32            8            1            8            1            2          400          256            1    
     12           40           10           40           32            8           32          128          128          128           32            8            1            4            1            2          400          256            1    
     16           96            8           96           96            8           96          128          256          128           32            8            1            4            1            5          768          768            1    
     17           32            8           32           32            8           32          512          256          512           32            8            1           16            1            2          256          256            1    
     18           16            5           16           16            5           16          512          256          512           32            8            1           16            1            1           80           80            1    
     19           16            3           16           16            3           16          512          256          512           32            8            1           16            1            1           48           48            1    
     20           16            2           16           16            2           16          512          256          512           32            8            1           16            1            1           32           32            1    
     21           96            8           96           96            8           96          256           16          256           32            8            1            8            1            5          768          768            1    
     23           96            8           96           96            8           96          256           16          256           32            8            1            8            1            5          768          768            1    
     25           32            8           32           32            8           32          256           24          256           32            8            1            8            1            2          256          256            1    
     27           32            8           32           32            8           32          256           24          256           32            8            1            8            1            2          256          256            1    
     29           16            5           16           16            5           16          256           24          256           32            8            1            8            1            1           80           80            1    
     31           16            5           16           16            5           16          256           24          256           32            8            1            8            1            1           80           80            1    
     33           16            3           16           16            3           16          256           24          256           32            8            1            8            1            1           48           48            1    
     35           16            3           16           16            3           16          256           24          256           32            8            1            8            1            1           48           48            1    
     37           16            2           16           16            2           16          256           16          256           32            8            1            8            1            1           32           32            1    
     39           16            2           16           16            2           16          256           16          256           32            8            1            8            1            1           32           32            1    
Opening ..\..\test\testvecs\input\trace_dump_0_768x320.y file for reading 

Processing Frame Number : 0 

 Layer    1 : TSC Cycles =     3.48 
 Layer    2 : TSC Cycles =    36.42 MAC/CYCLE =   2.17, #MMACs =    78.89, Proc Sparsity =  46.50, Actual Sparsity =  50.96
 Layer    3 : TSC Cycles =    28.64 MAC/CYCLE =   1.79, #MMACs =    12.84, Proc Sparsity =  63.72, Actual Sparsity =  67.97
 Layer    4 : TSC Cycles =    42.59 MAC/CYCLE =   1.91, #MMACs =    81.47, Proc Sparsity =  71.22, Actual Sparsity =  72.30
 Layer    5 : TSC Cycles =    35.56 MAC/CYCLE =   1.78, #MMACs =    15.81, Proc Sparsity =  55.34, Actual Sparsity =  57.10
 Layer    6 : TSC Cycles =    33.91 MAC/CYCLE =   2.75, #MMACs =    93.27, Proc Sparsity =  67.06, Actual Sparsity =  67.64
 Layer    7 : TSC Cycles =    19.56 MAC/CYCLE =   2.61, #MMACs =    51.03, Proc Sparsity =  63.95, Actual Sparsity =  64.98
 Layer    8 : TSC Cycles =     2.32 
 Layer    9 : TSC Cycles =    34.27 MAC/CYCLE =   2.06, #MMACs =    70.76, Proc Sparsity =  75.01, Actual Sparsity =  75.53
 Layer   10 : TSC Cycles =    21.16 MAC/CYCLE =   1.96, #MMACs =    10.37, Proc Sparsity =  70.70, Actual Sparsity =  71.20
 Layer   11 : TSC Cycles =    48.05 MAC/CYCLE =   1.04, #MMACs =    49.84, Proc Sparsity =  82.40, Actual Sparsity =  82.83
 Layer   12 : TSC Cycles =    28.77 MAC/CYCLE =   1.01, #MMACs =    28.95, Proc Sparsity =  79.55, Actual Sparsity =  80.07
 Layer   13 : TSC Cycles =     5.00 
 Layer   14 : TSC Cycles =     4.91 
 Layer   15 : TSC Cycles =     4.87 
 Layer   16 : TSC Cycles =    42.91 MAC/CYCLE =   2.52, #MMACs =   107.97, Proc Sparsity =  14.20, Actual Sparsity =  18.42
 Layer   17 : TSC Cycles =    11.30 MAC/CYCLE =   1.00, #MMACs =    11.33, Proc Sparsity =  63.97, Actual Sparsity =  66.66
 Layer   18 : TSC Cycles =     3.02 MAC/CYCLE =   0.85, #MMACs =     2.56, Proc Sparsity =  67.47, Actual Sparsity =  69.92
 Layer   19 : TSC Cycles =     2.10 MAC/CYCLE =   0.25, #MMACs =     0.53, Proc Sparsity =  77.36, Actual Sparsity =  79.35
 Layer   20 : TSC Cycles =     1.56 MAC/CYCLE =   0.07, #MMACs =     0.11, Proc Sparsity =  85.72, Actual Sparsity =  87.23
 Layer   21 : TSC Cycles =     5.18 MAC/CYCLE =   2.50, #MMACs =    12.95, Proc Sparsity =  17.68, Actual Sparsity =  22.24
 Layer   22 : TSC Cycles =     0.19 
 Layer   23 : TSC Cycles =     4.28 MAC/CYCLE =   2.33, #MMACs =     9.98, Proc Sparsity =  36.52, Actual Sparsity =  41.38
 Layer   24 : TSC Cycles =     0.14 
 Layer   25 : TSC Cycles =     0.84 MAC/CYCLE =   0.79, #MMACs =     0.67, Proc Sparsity =  54.82, Actual Sparsity =  59.65
 Layer   26 : TSC Cycles =     0.03 
 Layer   27 : TSC Cycles =     0.87 MAC/CYCLE =   0.85, #MMACs =     0.74, Proc Sparsity =  49.87, Actual Sparsity =  54.26
 Layer   28 : TSC Cycles =     0.02 
 Layer   29 : TSC Cycles =     0.27 MAC/CYCLE =   0.59, #MMACs =     0.16, Proc Sparsity =  56.77, Actual Sparsity =  61.44
 Layer   30 : TSC Cycles =     0.03 
 Layer   31 : TSC Cycles =     0.28 MAC/CYCLE =   0.63, #MMACs =     0.18, Proc Sparsity =  51.63, Actual Sparsity =  56.51
 Layer   32 : TSC Cycles =     0.02 
 Layer   33 : TSC Cycles =     0.23 MAC/CYCLE =   0.18, #MMACs =     0.04, Proc Sparsity =  63.61, Actual Sparsity =  68.31
 Layer   34 : TSC Cycles =     0.02 
 Layer   35 : TSC Cycles =     0.24 MAC/CYCLE =   0.19, #MMACs =     0.05, Proc Sparsity =  58.53, Actual Sparsity =  63.28
 Layer   36 : TSC Cycles =     0.01 
 Layer   37 : TSC Cycles =     0.16 MAC/CYCLE =   0.05, #MMACs =     0.01, Proc Sparsity =  68.26, Actual Sparsity =  73.29
 Layer   38 : TSC Cycles =     0.01 
 Layer   39 : TSC Cycles =     0.16 MAC/CYCLE =   0.05, #MMACs =     0.01, Proc Sparsity =  65.33, Actual Sparsity =  70.51
 Layer   40 : TSC Cycles =     0.01 
 Layer   41 : TSC Cycles =     3.73 
 Layer   42 : TSC Cycles =     3.74 
 Layer   43 : TSC Cycles =   519.45 
 TSC Mega Cycles =   951.40 Out Q (0): 0