This directory contains scripts used with Lauterbach's TRACE32 on the Texas Instruments J721E (TDA4/DRA829) SOC. Supported hosts will be Windows, Linux, and Mac.

The TRACE32 image used on j721E is composed of:
	- A base image using the R.2021.02.000136263 release from https://www.lauterbach.com/frames.html?download_trace32.html
	  -- Targets installed were ARM, ARM64, C7000, C6000, PRU
	  -- TRACE32 daily builds since 2019 will support J721E
	- TI example scripts, cmm-tda4_dra829.7z, unzipped into the install directory

The supported TRACE32 system.cpu names used in scripts are:
	; A72 (1x2)  : DRA829 (core.assign 1 2)
	; CR5 (3x2)  : DRA829-CR5-MCU DRA829-CR5-MAIN0 DRA829-CR5-MAIN1 (core.assign 1 2)
	; CM3 (1x1)  : DRA829-CM3
	; PRU (2x3x2): DRA829-ICSS0 DRA829-ICSS0-RTU DRA829-ICSS0-TX (core.assign 1 2)
	; C66 (2x1)  : DRA829-C66X (core.assign 1 2)
	; C7x (1x1)  : DRA829-C71X

The system supports J721E HW features:
	- basic debug on all cores (load/run, step/break, view, dap-sample-based-trace)
	- advanced processor trace on all cores to on-chip buffers and to off-chip receivers
	  -- ETM on the Cortex-A72 (code) and Cortex-R5 (code and data)
	  -- ITM on Cortex-M3
	  -- DSP processor trace on the C6000 & C7000 (code & data)
	- System trace
	  -- System messages via cptracers (throughput, latency, transaction, C7x-events)
	  -- Coresight STM messages
	- Peripheral suspend when a core is halted
	- Cross triggering via CTI/CTM networks
	- All standard TRACE32 features
	  -- Trace and sample-based analysis 
	  -- Code coverage
	  -- Performance profiling
	  -- Awareness for J721E HLOS (Linux, QNX) and Hypervisors
	  -- Awareness for J721E RTOS (FreeRTOS, SafeRTOS, TIRTOS)
	  -- All standard features ..., ..., ...

Directory/Files:
	bsdl : BSDL support for test and flashing
	dsp-c7x: scripts used to attach to running targets
	dsp-c6x: scripts used to attach to running targets
	icss-pru: scripts used to attach to running targets 
	mcu-r5:
		burn_flash: controller-based flasher
		<other> scripts used to attach and debug running targets
	mpu-a72: scripts used to attach to running targets
	notes: Information on cptracer and suspend-router features
	x_gel_to_cmm:
		pdk_rtos_test: scripts to launch PDK examples via JTAG which use TI system firmware
		memtester: simple memtesters to validate DDR
		<other>: TI validation scripts used to initialize power, clocks and DDR typically used with bare metal development
	logic analyzer: Scripts used with TRACE32 addon logic and analyzer extensions: ciprobe, iprobe, probe, integrator
	dra82x_win_launcher.ts2 : standard Windows t32start compatible launcher

Getting started:
	A first-time user on the EVM should see example videos then mimic them:
		Running the x_gel_to_cmm/dra829_allcoretypes_connect.cmm script
			This initializes the platform and brings up basic debug for all cores.
			If you don't have licenses for all the cores comment out the ones not desired
		Run the example memtester
	Early board checkout and RTOS development likely use files in x_gel_to_cmm
		A custom board can be added at this level. Minimally the DDR scripts will need to be regenerated using the TI DDR config tool
	Higher-level usage tends to happen with HLOS scripts.  The script files content increases over the life of the chip so check for CDDS updates









 

