diff --git a/psdkra/pdk_jacinto_10_01_00_25/packages/ti/drv/vhwa/soc/V0/csl_hts.c b/psdkra/pdk_jacinto_10_01_00_25/packages/ti/drv/vhwa/soc/V0/csl_hts.c
index da3a7cb0..ca09b3d8 100755
--- a/psdkra/pdk_jacinto_10_01_00_25/packages/ti/drv/vhwa/soc/V0/csl_hts.c
+++ b/psdkra/pdk_jacinto_10_01_00_25/packages/ti/drv/vhwa/soc/V0/csl_hts.c
@@ -1235,6 +1235,16 @@ static void HtsSetSchConfig(uint32_t baseAddr, const CSL_HtsSchConfig *cfg)
         {
             CSL_REG32_FINS((baseAddr + HWA_WDTIMER_OFFSET),
                 HTS_HWA0_WDTIMER_WDTIMER_EN, 1U);
+						if ((uint32_t)UTRUE == cfg->isWdTimer128KMode)
+						{
+								CSL_REG32_FINS((baseAddr + HWA_WDTIMER_OFFSET), 
+									HTS_HWA0_WDTIMER_WDTIMER_MODE, 1U);
+						}
+						else
+						{
+								CSL_REG32_FINS((baseAddr + HWA_WDTIMER_OFFSET), 
+									HTS_HWA0_WDTIMER_WDTIMER_MODE, 0U);
+						}
         }
         else
         {
diff --git a/psdkra/pdk_jacinto_10_01_00_25/packages/ti/drv/vhwa/soc/V0/csl_hts.h b/psdkra/pdk_jacinto_10_01_00_25/packages/ti/drv/vhwa/soc/V0/csl_hts.h
index 9da92907..7361ef74 100755
--- a/psdkra/pdk_jacinto_10_01_00_25/packages/ti/drv/vhwa/soc/V0/csl_hts.h
+++ b/psdkra/pdk_jacinto_10_01_00_25/packages/ti/drv/vhwa/soc/V0/csl_hts.h
@@ -515,6 +515,9 @@ typedef struct
     uint32_t                    enableWdTimer;
     /**< Enable watch dog timer */
 
+		uint32_t                    isWdTimer128KMode;
+		/** Set to enable 128K mode for the Wd Timer */
+
     uint32_t                    enableBwLimit;
     /**< Enable Bandwidth Limiter */
     uint32_t                    cycleCnt;
diff --git a/psdkra/pdk_jacinto_10_01_00_25/packages/ti/drv/vhwa/src/drv/vhwa_m2mLdcApi.c b/psdkra/pdk_jacinto_10_01_00_25/packages/ti/drv/vhwa/src/drv/vhwa_m2mLdcApi.c
index 9ccdf576..7fcbb2d7 100755
--- a/psdkra/pdk_jacinto_10_01_00_25/packages/ti/drv/vhwa/src/drv/vhwa_m2mLdcApi.c
+++ b/psdkra/pdk_jacinto_10_01_00_25/packages/ti/drv/vhwa/src/drv/vhwa_m2mLdcApi.c
@@ -2507,6 +2507,7 @@ static void vhwaM2mLdcSetHtsCfg(const Vhwa_M2mLdcInstObj *instObj,
         htsCfg->enableHop       = (uint32_t)UFALSE;
         htsCfg->numHop          = 0u;
         htsCfg->enableWdTimer = (uint32_t)UTRUE;
+        htsCfg->isWdTimer128KMode = (uint32_t)UTRUE;
 
         /* Enable the channel which are required */
         for (chCnt = 0; chCnt < VHWA_M2M_LDC_OUT_DMA_CH; chCnt ++)