/* * Copyright (C) 2014-2016 Texas Instruments Incorporated - http://www.ti.com/ * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ #include "dra72-evm-common.dtsi" #include "dt-bindings/pinmux/mux_dra7xx.h" / { model = "TI DRA722 Louis 20170516 13:50"; aliases { display0 = &hdmi0; display1 = &lcd2; sound1 = &hdmi; }; lcd2: display@2 { compatible = "omapdss,panel-dpi", "panel-dpi"; status = "ok"; label = "lcd"; //enable-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; // 1920x1200@60 // 1920x1200@30 // 1920x1080@60 // 1920x1080@30 // 1280x720@30 // 800x480@30 /* // 1920x1200@60 // (1920+226)*(1200+32)*60=158632320 panel-timing { clock-frequency = <158000000>; hactive = <1920>; vactive = <1200>; hfront-porch = <210>; hback-porch = <16>; hsync-len = <30>; vback-porch = <10>; vfront-porch = <22>; vsync-len = <13>; hsync-active = <0>; vsync-active = <0>; de-active = <1>; pixelclk-active = <1>; }; */ /* // 1920x1200@30 // (1920+226)*(1200+32)*30=79316160 panel-timing { clock-frequency = <79000000>; hactive = <1920>; vactive = <1200>; hfront-porch = <210>; hback-porch = <16>; hsync-len = <30>; vback-porch = <10>; vfront-porch = <22>; vsync-len = <13>; hsync-active = <0>; vsync-active = <0>; de-active = <1>; pixelclk-active = <1>; }; */ /* // 1920x1080@60 // (1920+226)*(1080+32)*60=142181120 panel-timing { clock-frequency = <142000000>; hactive = <1920>; vactive = <1080>; hfront-porch = <210>; hback-porch = <16>; hsync-len = <30>; vback-porch = <10>; vfront-porch = <22>; vsync-len = <13>; hsync-active = <0>; vsync-active = <0>; de-active = <1>; pixelclk-active = <1>; }; */ // 1920x1080@30 // (1920+226)*(1080+32)*30=71590560 panel-timing { clock-frequency = <72000000>; hactive = <1920>; vactive = <1080>; hfront-porch = <210>; hback-porch = <16>; hsync-len = <30>; vback-porch = <10>; vfront-porch = <22>; vsync-len = <13>; hsync-active = <0>; vsync-active = <0>; de-active = <1>; pixelclk-active = <1>; }; /* // 1280x720@30 // (1280+226)*(720+32)*30=33975360 panel-timing { clock-frequency = <24000000>; hactive = <1280>; vactive = <720>; hfront-porch = <210>; hback-porch = <16>; hsync-len = <30>; vback-porch = <10>; vfront-porch = <22>; vsync-len = <13>; hsync-active = <0>; vsync-active = <0>; de-active = <1>; pixelclk-active = <1>; }; */ /* // 800x480@30 // (800+226)*(480+32)*30=15759360 panel-timing { clock-frequency = <16000000>; hactive = <800>; vactive = <480>; hfront-porch = <210>; hback-porch = <16>; hsync-len = <30>; vback-porch = <10>; vfront-porch = <22>; vsync-len = <13>; hsync-active = <0>; vsync-active = <0>; de-active = <1>; pixelclk-active = <1>; }; */ port { lcd2_in: endpoint { remote-endpoint = <&dpi2_out>; }; }; }; memory { device_type = "memory"; reg = <0x0 0x80000000 0x0 0x40000000>; /* 1024 MB */ }; reserved_mem: reserved-memory { #address-cells = <2>; #size-cells = <2>; ranges; ipu2_cma_pool: ipu2_cma@95800000 { compatible = "shared-dma-pool"; reg = <0x0 0x95800000 0x0 0x3800000>; reusable; status = "okay"; }; dsp1_cma_pool: dsp1_cma@99000000 { compatible = "shared-dma-pool"; reg = <0x0 0x99000000 0x0 0x4000000>; reusable; status = "okay"; }; ipu1_cma_pool: ipu1_cma@9d000000 { compatible = "shared-dma-pool"; reg = <0x0 0x9d000000 0x0 0x2000000>; reusable; status = "okay"; }; }; }; &tps65917_regulators { ldo2_reg: ldo2 { /* LDO2_OUT --> TP1017 (UNUSED) */ regulator-name = "ldo2"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <3300000>; regulator-allow-bypass; }; }; &dra7_pmx_core { vin2a_pins: pinmux_vin2a_pins { pinctrl-single,pins = < 0x23c (PIN_INPUT | MUX_MODE4) // 0x23C gpio5_15 V1 mdio_mclk.vin2a_clk0 0x240 (PIN_INPUT | MUX_MODE4) // 0x240 gpio5_16 U4 mdio_d.vin2a_d0 0x248 (PIN_INPUT | MUX_MODE4) // 0x248 gpio5_18 V2 uart3_rxd.vin2a_d1 0x24c (PIN_INPUT | MUX_MODE4) // 0x24C gpio5_19 Y1 uart3_txd.vin2a_d2 0x250 (PIN_INPUT | MUX_MODE4) // 0x250 gpio5_20 W9 rgmii0_txc.vin2a_d3 0x254 (PIN_INPUT | MUX_MODE4) // 0x254 gpio5_21 V9 rgmii0_txctl.vin2a_d4 0x268 (PIN_INPUT | MUX_MODE4) // 0x268 U5 gpio5_26 rgmii_rxc.vin2a_d5 0x26c (PIN_INPUT | MUX_MODE4) // 0x26C gpio5_27 V5 rgmii0_rxctl.vin2a_d6 0x270 (PIN_INPUT | MUX_MODE4) // 0x270 gpio5_28 V4 rgmii0_rxd3.vin2a_d7 >; }; vout3_pins: pinmux_vout3_pins { pinctrl-single,pins = < GPMC_A0 (PIN_OUTPUT | MUX_MODE3) /* GPMC_A0.vout3_d16 GPIO7_3 R6 */ GPMC_A1 (PIN_OUTPUT | MUX_MODE3) /* GPMC_A1.vout3_d17 */ GPMC_A2 (PIN_OUTPUT | MUX_MODE3) /* GPMC_A2.vout3_d18 */ GPMC_A3 (PIN_OUTPUT | MUX_MODE3) /* GPMC_A3.vout3_d18 */ GPMC_A4 (PIN_OUTPUT | MUX_MODE3) /* GPMC_A4.vout3_d20 */ GPMC_A5 (PIN_OUTPUT | MUX_MODE3) /* GPMC_A5.vout3_d21 */ GPMC_A6 (PIN_OUTPUT | MUX_MODE3) /* GPMC_A6.vout3_d22 */ GPMC_A7 (PIN_OUTPUT | MUX_MODE3) /* GPMC_A7.vout3_d23 */ GPMC_AD8 (PIN_OUTPUT | MUX_MODE3) /* GPMC_AD8.vout3_d8 */ GPMC_AD9 (PIN_OUTPUT | MUX_MODE3) /* GPMC_AD9.vout3_d9 */ GPMC_AD10 (PIN_OUTPUT | MUX_MODE3) /* GPMC_AD10.vout3_d10 */ GPMC_AD11 (PIN_OUTPUT | MUX_MODE3) /* GPMC_AD11.vout3_d11 */ GPMC_AD12 (PIN_OUTPUT | MUX_MODE3) /* GPMC_AD12.vout3_d12 */ GPMC_AD13 (PIN_OUTPUT | MUX_MODE3) /* GPMC_AD13.vout3_d13 */ GPMC_AD14 (PIN_OUTPUT | MUX_MODE3) /* GPMC_AD14.vout3_d14 */ GPMC_AD15 (PIN_OUTPUT | MUX_MODE3) /* GPMC_AD15.vout3_d15 */ GPMC_AD0 (PIN_OUTPUT | MUX_MODE3) /* GPMC_A0.vout3_d0 */ GPMC_AD1 (PIN_OUTPUT | MUX_MODE3) /* GPMC_A0.vout3_d1 */ GPMC_AD2 (PIN_OUTPUT | MUX_MODE3) /* GPMC_A0.vout3_d2 */ GPMC_AD3 (PIN_OUTPUT | MUX_MODE3) /* GPMC_A0.vout3_d3 */ GPMC_AD4 (PIN_OUTPUT | MUX_MODE3) /* GPMC_A0.vout3_d4 */ GPMC_AD5 (PIN_OUTPUT | MUX_MODE3) /* GPMC_A0.vout3_d5 */ GPMC_AD6 (PIN_OUTPUT | MUX_MODE3) /* GPMC_A0.vout3_d6 */ GPMC_AD7 (PIN_OUTPUT | MUX_MODE3) /* GPMC_A0.vout3_d7 */ GPMC_A11 (PIN_OUTPUT | MUX_MODE3) /* GPMC_A11.vout3_fld */ GPMC_A10 (PIN_OUTPUT | MUX_MODE3) /* GPMC_A10.vout3_de */ GPMC_A8 (PIN_OUTPUT | MUX_MODE3) /* GPMC_A8.vout3_hsync */ GPMC_A9 (PIN_OUTPUT | MUX_MODE3) /* GPMC_A9.vout3_vsync */ GPMC_CS3 (PIN_OUTPUT | MUX_MODE3) /* GPMC_CS3.vout3_clk */ VIN2A_D9 (PIN_OUTPUT | MUX_MODE14) /* VIN2A_D9.gpio4_10 DISP_RESETQ */ >; }; uart1_pins: uart1_pins { pinctrl-single,pins = < // i2c_3 GPMC_ADVN_ALE (PIN_INPUT | MUX_MODE8) /* gpmc_advn_ale.i2c3_sda -> 8 */ GPMC_CLK (PIN_INPUT | MUX_MODE8) /* gpmc_clk.i2c3_scl -> 8 */ // i2c_4 MMC1_SDCD (PIN_INPUT | MUX_MODE4) /* mmc1_sdcd.i2c4_sda -> 4 */ MMC1_SDWP (PIN_INPUT | MUX_MODE4) /* mmc1_sdwp.i2c4_scl -> 4 */ // i2c_5 MCASP1_AXR0 (PIN_INPUT | MUX_MODE10) /* mcasp1_axr0.i2c5_sda -> 10 */ MCASP1_AXR1 (PIN_INPUT | MUX_MODE10) /* mcasp1_axr1.i2c5_scl -> 10 */ // spi 1.0, 1.1, 1.3 SPI1_SCLK (PIN_INPUT | MUX_MODE0) /* 0x3A4 */ SPI1_D1 (PIN_INPUT | MUX_MODE0) /* 0x3A8 */ SPI1_D0 (PIN_INPUT | MUX_MODE0) /* 0x3AC */ SPI1_CS0 (PIN_INPUT | MUX_MODE0) /* 0x3B0 */ SPI1_CS1 (PIN_INPUT | MUX_MODE0) /* 0x3B4 */ SPI1_CS3 (PIN_INPUT | MUX_MODE0) /* 0x3BC */ // spi 2.0 SPI2_SCLK ( PIN_INPUT | MUX_MODE0 ) /* 0x3C0 */ SPI2_D1 ( PIN_INPUT | MUX_MODE0 ) /* 0x3C4 */ SPI2_D0 ( PIN_INPUT | MUX_MODE0 ) /* 0x3C8 */ SPI2_CS0 ( PIN_INPUT | MUX_MODE0 ) /* 0x3CC */ // spi 3.0 VOUT1_CLK (PIN_INPUT | MUX_MODE8) // DAB_SPI_CS GPIO4_19 VOUT1_DE (PIN_INPUT | MUX_MODE8) // DAB_SPI_MISO GPIO4_20 VOUT1_HSYNC (PIN_INPUT | MUX_MODE8) // DAB_SPI_MOSI GPIO4_22 VOUT1_VSYNC (PIN_INPUT | MUX_MODE8) // DAB_SPI_SCK GPIO4_23 // BT656 vin4b MDIO_MCLK (PIN_INPUT | MUX_MODE5) /* 0x23C */ // BT656_CLK1 MDIO_D (PIN_INPUT | MUX_MODE5) /* 0x240 */ // BT656_DO UART3_RXD (PIN_INPUT | MUX_MODE5) /* 0x248 */ // BT656_D1 UART3_TXD (PIN_INPUT | MUX_MODE5) /* 0x24C */ // BT656_D2 RGMII0_TXC (PIN_INPUT | MUX_MODE5) /* 0x250 */ // BT656_D3 RGMII0_TXCTL (PIN_INPUT | MUX_MODE5) /* 0x254 */ // BT656_D4 RGMII0_RXC (PIN_INPUT | MUX_MODE5) /* 0x268 */ // BT656_D5 RGMII0_RXCTL (PIN_INPUT | MUX_MODE5) /* 0x26C */ // BT656_D6 RGMII0_RXD3 (PIN_INPUT | MUX_MODE5) /* 0x270 */ // BT656_D7 RGMII0_RXD2 (PIN_INPUT | MUX_MODE14) /* 0x274 */ VIN2A_DE0 (PIN_INPUT | MUX_MODE14) /* 0x158 */ //=================================================================================== //GPMC_AD0 (PIN_INPUT | MUX_MODE14) /* 0x000 */ //GPMC_AD1 (PIN_INPUT | MUX_MODE14) /* 0x004 */ //GPMC_AD2 (PIN_INPUT | MUX_MODE14) /* 0x008 */ //GPMC_AD3 (PIN_INPUT | MUX_MODE14) /* 0x00C */ //GPMC_AD4 (PIN_INPUT | MUX_MODE14) /* 0x010 */ //GPMC_AD5 (PIN_INPUT | MUX_MODE14) /* 0x014 */ //GPMC_AD6 (PIN_INPUT | MUX_MODE14) /* 0x018 */ //GPMC_AD7 (PIN_INPUT | MUX_MODE14) /* 0x01C */ //GPMC_AD8 (PIN_INPUT | MUX_MODE14) /* 0x020 */ //GPMC_AD9 (PIN_INPUT | MUX_MODE14) /* 0x024 */ //GPMC_AD10 (PIN_INPUT | MUX_MODE14) /* 0x028 */ //GPMC_AD11 (PIN_INPUT | MUX_MODE14) /* 0x02C */ //GPMC_AD12 (PIN_INPUT | MUX_MODE14) /* 0x030 */ //GPMC_AD13 (PIN_INPUT | MUX_MODE14) /* 0x034 */ //GPMC_AD14 (PIN_INPUT | MUX_MODE14) /* 0x038 */ //GPMC_AD15 (PIN_INPUT | MUX_MODE14) /* 0x03C */ //GPMC_A0 (PIN_INPUT | MUX_MODE14) /* 0x040 */ //GPMC_A1 (PIN_INPUT | MUX_MODE14) /* 0x044 */ //GPMC_A2 (PIN_INPUT | MUX_MODE14) /* 0x048 */ //GPMC_A3 (PIN_INPUT | MUX_MODE14) /* 0x04C */ //GPMC_A4 (PIN_INPUT | MUX_MODE14) /* 0x050 */ //GPMC_A5 (PIN_INPUT | MUX_MODE14) /* 0x054 */ //GPMC_A6 (PIN_INPUT | MUX_MODE14) /* 0x058 */ //GPMC_A7 (PIN_INPUT | MUX_MODE14) /* 0x05C */ //GPMC_A8 (PIN_INPUT | MUX_MODE14) /* 0x060 */ //GPMC_A9 (PIN_INPUT | MUX_MODE14) /* 0x064 */ //GPMC_A10 (PIN_INPUT | MUX_MODE14) /* 0x068 */ //GPMC_A11 (PIN_INPUT | MUX_MODE14) /* 0x06C */ GPMC_A12 (PIN_INPUT | MUX_MODE14) /* 0x070 */ GPMC_A13 (PIN_INPUT | MUX_MODE14) /* 0x074 */ GPMC_A14 (PIN_INPUT | MUX_MODE14) /* 0x078 */ GPMC_A15 (PIN_INPUT | MUX_MODE14) /* 0x07C */ GPMC_A16 (PIN_INPUT | MUX_MODE14) /* 0x080 */ GPMC_A17 (PIN_INPUT | MUX_MODE14) /* 0x084 */ GPMC_A18 (PIN_INPUT | MUX_MODE14) /* 0x088 */ //GPMC_A19 (PIN_INPUT | MUX_MODE14) /* 0x08C */ //GPMC_A20 (PIN_INPUT | MUX_MODE14) /* 0x090 */ //GPMC_A21 (PIN_INPUT | MUX_MODE14) /* 0x094 */ //GPMC_A22 (PIN_INPUT | MUX_MODE14) /* 0x098 */ //GPMC_A23 (PIN_INPUT | MUX_MODE14) /* 0x09C */ //GPMC_A24 (PIN_INPUT | MUX_MODE14) /* 0x0A0 */ //GPMC_A25 (PIN_INPUT | MUX_MODE14) /* 0x0A4 */ //GPMC_A26 (PIN_INPUT | MUX_MODE14) /* 0x0A8 */ //GPMC_A27 (PIN_INPUT | MUX_MODE14) /* 0x0AC */ //GPMC_CS1 (PIN_INPUT | MUX_MODE14) /* 0x0B0 */ GPMC_CS0 (PIN_INPUT | MUX_MODE14) /* 0x0B4 */ GPMC_CS2 (PIN_INPUT | MUX_MODE14) /* 0x0B8 */ //GPMC_CS3 (PIN_INPUT | MUX_MODE14) /* 0x0BC */ //GPMC_CLK (PIN_INPUT | MUX_MODE14) /* 0x0C0 */ //GPMC_ADVN_ALE (PIN_INPUT | MUX_MODE14) /* 0x0C4 */ GPMC_OEN_REN (PIN_INPUT | MUX_MODE14) /* 0x0C8 */ GPMC_WEN (PIN_INPUT | MUX_MODE14) /* 0x0CC */ GPMC_BEN0 (PIN_INPUT | MUX_MODE14) /* 0x0D0 */ GPMC_BEN1 (PIN_INPUT | MUX_MODE14) /* 0x0D4 */ GPMC_WAIT0 (PIN_INPUT | MUX_MODE14) /* 0x0D8 */ VIN1A_CLK0 (PIN_INPUT | MUX_MODE14) /* 0x0DC */ VIN1B_CLK1 (PIN_INPUT | MUX_MODE14) /* 0x0E0 */ VIN1A_DE0 (PIN_INPUT | MUX_MODE14) /* 0x0E4 */ VIN1A_FLD0 (PIN_INPUT | MUX_MODE14) /* 0x0E8 */ VIN1A_HSYNC0 (PIN_INPUT | MUX_MODE14) /* 0x0EC */ VIN1A_VSYNC0 (PIN_INPUT | MUX_MODE14) /* 0x0F0 */ VIN1A_D0 (PIN_INPUT | MUX_MODE14) /* 0x0F4 */ VIN1A_D1 (PIN_INPUT | MUX_MODE14) /* 0x0F8 */ VIN1A_D2 (PIN_INPUT | MUX_MODE14) /* 0x0FC */ VIN1A_D3 (PIN_INPUT | MUX_MODE14) /* 0x100 */ VIN1A_D4 (PIN_INPUT | MUX_MODE14) /* 0x104 */ VIN1A_D5 (PIN_INPUT | MUX_MODE14) /* 0x108 */ VIN1A_D6 (PIN_INPUT | MUX_MODE14) /* 0x10C */ VIN1A_D7 (PIN_INPUT | MUX_MODE14) /* 0x110 */ VIN1A_D8 (PIN_INPUT | MUX_MODE14) /* 0x114 */ VIN1A_D9 (PIN_INPUT | MUX_MODE14) /* 0x118 */ VIN1A_D10 (PIN_INPUT | MUX_MODE14) /* 0x11C */ VIN1A_D11 (PIN_INPUT | MUX_MODE14) /* 0x120 */ VIN1A_D12 (PIN_INPUT | MUX_MODE14) /* 0x124 */ VIN1A_D13 (PIN_INPUT | MUX_MODE14) /* 0x128 */ VIN1A_D14 (PIN_INPUT | MUX_MODE14) /* 0x12C */ VIN1A_D15 (PIN_INPUT | MUX_MODE14) /* 0x130 */ VIN1A_D16 (PIN_INPUT | MUX_MODE14) /* 0x134 */ VIN1A_D17 (PIN_INPUT | MUX_MODE14) /* 0x138 */ VIN1A_D18 (PIN_INPUT | MUX_MODE14) /* 0x13C */ VIN1A_D19 (PIN_INPUT | MUX_MODE14) /* 0x140 */ VIN1A_D20 (PIN_INPUT | MUX_MODE14) /* 0x144 */ VIN1A_D21 (PIN_INPUT | MUX_MODE14) /* 0x148 */ VIN1A_D22 (PIN_INPUT | MUX_MODE14) /* 0x14C */ VIN1A_D23 (PIN_INPUT | MUX_MODE14) /* 0x150 */ VIN2A_CLK0 (PIN_INPUT | MUX_MODE14) /* 0x154 */ // VIN2A_DE0 (PIN_INPUT | MUX_MODE14) /* 0x158 */ VIN2A_FLD0 (PIN_INPUT | MUX_MODE14) /* 0x15C */ VIN2A_HSYNC0 (PIN_INPUT | MUX_MODE14) /* 0x160 */ VIN2A_VSYNC0 (PIN_INPUT | MUX_MODE14) /* 0x164 */ VIN2A_D0 (PIN_INPUT | MUX_MODE14) /* 0x168 */ VIN2A_D1 (PIN_INPUT | MUX_MODE14) /* 0x16C */ //VIN2A_D2 (PIN_INPUT | MUX_MODE14) /* 0x170 */ //VIN2A_D3 (PIN_INPUT | MUX_MODE14) /* 0x174 */ //VIN2A_D4 (PIN_INPUT | MUX_MODE14) /* 0x178 */ //VIN2A_D5 (PIN_INPUT | MUX_MODE14) /* 0x17C */ VIN2A_D6 (PIN_INPUT | MUX_MODE14) /* 0x180 */ VIN2A_D7 (PIN_INPUT | MUX_MODE14) /* 0x184 */ //VIN2A_D8 (PIN_INPUT | MUX_MODE14) /* 0x188 */ //VIN2A_D9 (PIN_INPUT | MUX_MODE14) /* 0x18C */ VIN2A_D10 (PIN_INPUT | MUX_MODE14) /* 0x190 */ VIN2A_D11 (PIN_INPUT | MUX_MODE14) /* 0x194 */ VIN2A_D12 (PIN_INPUT | MUX_MODE14) /* 0x198 */ VIN2A_D13 (PIN_INPUT | MUX_MODE14) /* 0x19C */ VIN2A_D14 (PIN_INPUT | MUX_MODE14) /* 0x1A0 */ VIN2A_D15 (PIN_INPUT | MUX_MODE14) /* 0x1A4 */ VIN2A_D16 (PIN_INPUT | MUX_MODE14) /* 0x1A8 */ VIN2A_D17 (PIN_INPUT | MUX_MODE14) /* 0x1AC */ VIN2A_D18 (PIN_INPUT | MUX_MODE14) /* 0x1B0 */ VIN2A_D19 (PIN_INPUT | MUX_MODE14) /* 0x1B4 */ VIN2A_D20 (PIN_INPUT | MUX_MODE14) /* 0x1B8 */ VIN2A_D21 (PIN_INPUT | MUX_MODE14) /* 0x1BC */ VIN2A_D22 (PIN_INPUT | MUX_MODE14) /* 0x1C0 */ VIN2A_D23 (PIN_INPUT | MUX_MODE14) /* 0x1C4 */ //VOUT1_CLK (PIN_INPUT | MUX_MODE14) /* 0x1C8 */ //VOUT1_DE (PIN_INPUT | MUX_MODE14) /* 0x1CC */ VOUT1_FLD (PIN_INPUT | MUX_MODE14) /* 0x1D0 */ //VOUT1_HSYNC (PIN_INPUT | MUX_MODE14) /* 0x1D4 */ //VOUT1_VSYNC (PIN_INPUT | MUX_MODE14) /* 0x1D8 */ //VOUT1_D0 (PIN_INPUT | MUX_MODE14) /* 0x1DC */ // uart5 //VOUT1_D1 (PIN_INPUT | MUX_MODE14) /* 0x1E0 */ // uart5 VOUT1_D2 (PIN_INPUT | MUX_MODE14) /* 0x1E4 */ VOUT1_D3 (PIN_INPUT | MUX_MODE14) /* 0x1E8 */ VOUT1_D4 (PIN_INPUT | MUX_MODE14) /* 0x1EC */ VOUT1_D5 (PIN_INPUT | MUX_MODE14) /* 0x1F0 */ VOUT1_D6 (PIN_INPUT | MUX_MODE14) /* 0x1F4 */ VOUT1_D7 (PIN_INPUT | MUX_MODE14) /* 0x1F8 */ //VOUT1_D8 (PIN_INPUT | MUX_MODE14) /* 0x1FC */ // uart6 //VOUT1_D9 (PIN_INPUT | MUX_MODE14) /* 0x200 */ // uart6 VOUT1_D10 (PIN_INPUT | MUX_MODE14) /* 0x204 */ VOUT1_D11 (PIN_INPUT | MUX_MODE14) /* 0x208 */ VOUT1_D12 (PIN_INPUT | MUX_MODE14) /* 0x20C */ VOUT1_D13 (PIN_INPUT | MUX_MODE14) /* 0x210 */ VOUT1_D14 (PIN_INPUT | MUX_MODE14) /* 0x214 */ VOUT1_D15 (PIN_INPUT | MUX_MODE14) /* 0x218 */ VOUT1_D16 (PIN_INPUT | MUX_MODE14) /* 0x21C */ VOUT1_D17 (PIN_INPUT | MUX_MODE14) /* 0x220 */ VOUT1_D18 (PIN_INPUT | MUX_MODE14) /* 0x224 */ VOUT1_D19 (PIN_INPUT | MUX_MODE14) /* 0x228 */ VOUT1_D20 (PIN_INPUT | MUX_MODE14) /* 0x22C */ VOUT1_D21 (PIN_INPUT | MUX_MODE14) /* 0x230 */ VOUT1_D22 (PIN_INPUT | MUX_MODE14) /* 0x234 */ VOUT1_D23 (PIN_INPUT | MUX_MODE14) /* 0x238 */ // MDIO_MCLK (PIN_INPUT | MUX_MODE14) /* 0x23C */ // MDIO_D (PIN_INPUT | MUX_MODE14) /* 0x240 */ RMII_MHZ_50_CLK (PIN_INPUT | MUX_MODE14) /* 0x244 */ // UART3_RXD (PIN_INPUT | MUX_MODE14) /* 0x248 */ // UART3_TXD (PIN_INPUT | MUX_MODE14) /* 0x24C */ // RGMII0_TXC (PIN_INPUT | MUX_MODE14) /* 0x250 */ // RGMII0_TXCTL (PIN_INPUT | MUX_MODE14) /* 0x254 */ RGMII0_TXD3 (PIN_INPUT | MUX_MODE14) /* 0x258 */ RGMII0_TXD2 (PIN_INPUT | MUX_MODE14) /* 0x25C */ RGMII0_TXD1 (PIN_INPUT | MUX_MODE14) /* 0x260 */ RGMII0_TXD0 (PIN_INPUT | MUX_MODE14) /* 0x264 */ // RGMII0_RXC (PIN_INPUT | MUX_MODE14) /* 0x268 */ // RGMII0_RXCTL (PIN_INPUT | MUX_MODE14) /* 0x26C */ // RGMII0_RXD3 (PIN_INPUT | MUX_MODE14) /* 0x270 */ // RGMII0_RXD2 (PIN_INPUT | MUX_MODE14) /* 0x274 */ RGMII0_RXD1 (PIN_INPUT | MUX_MODE14) /* 0x278 */ RGMII0_RXD0 (PIN_INPUT | MUX_MODE14) /* 0x27C */ USB1_DRVVBUS (PIN_INPUT | MUX_MODE14) /* 0x280 */ USB2_DRVVBUS (PIN_INPUT | MUX_MODE14) /* 0x284 */ GPIO6_14 (PIN_INPUT | MUX_MODE14) /* 0x288 */ GPIO6_15 (PIN_INPUT | MUX_MODE14) /* 0x28C */ GPIO6_16 (PIN_INPUT | MUX_MODE14) /* 0x290 */ XREF_CLK0 (PIN_INPUT | MUX_MODE14) /* 0x294 */ XREF_CLK1 (PIN_INPUT | MUX_MODE14) /* 0x298 */ XREF_CLK2 (PIN_INPUT | MUX_MODE14) /* 0x29C */ XREF_CLK3 (PIN_INPUT | MUX_MODE14) /* 0x2A0 */ MCASP1_ACLKX (PIN_INPUT | MUX_MODE14) /* 0x2A4 */ MCASP1_FSX (PIN_INPUT | MUX_MODE14) /* 0x2A8 */ MCASP1_ACLKR (PIN_INPUT | MUX_MODE14) /* 0x2AC */ MCASP1_FSR (PIN_INPUT | MUX_MODE14) /* 0x2B0 */ //MCASP1_AXR0 (PIN_INPUT | MUX_MODE14) /* 0x2B4 */ //MCASP1_AXR1 (PIN_INPUT | MUX_MODE14) /* 0x2B8 */ MCASP1_AXR2 (PIN_INPUT | MUX_MODE14) /* 0x2BC */ MCASP1_AXR3 (PIN_INPUT | MUX_MODE14) /* 0x2C0 */ MCASP1_AXR4 (PIN_INPUT | MUX_MODE14) /* 0x2C4 */ MCASP1_AXR5 (PIN_INPUT | MUX_MODE14) /* 0x2C8 */ MCASP1_AXR6 (PIN_INPUT | MUX_MODE14) /* 0x2CC */ MCASP1_AXR7 (PIN_INPUT | MUX_MODE14) /* 0x2D0 */ MCASP1_AXR8 (PIN_INPUT | MUX_MODE14) /* 0x2D4 */ MCASP1_AXR9 (PIN_INPUT | MUX_MODE14) /* 0x2D8 */ MCASP1_AXR10 (PIN_INPUT | MUX_MODE14) /* 0x2DC */ MCASP1_AXR11 (PIN_INPUT | MUX_MODE14) /* 0x2E0 */ MCASP1_AXR12 (PIN_INPUT | MUX_MODE14) /* 0x2E4 */ MCASP1_AXR13 (PIN_INPUT | MUX_MODE14) /* 0x2E8 */ MCASP1_AXR14 (PIN_INPUT | MUX_MODE14) /* 0x2EC */ MCASP1_AXR15 (PIN_INPUT | MUX_MODE14) /* 0x2F0 */ MCASP2_AXR2 (PIN_INPUT | MUX_MODE14) /* 0x30C */ MCASP2_AXR3 (PIN_INPUT | MUX_MODE14) /* 0x310 */ MCASP2_AXR4 (PIN_INPUT | MUX_MODE14) /* 0x314 */ MCASP2_AXR5 (PIN_INPUT | MUX_MODE14) /* 0x318 */ MCASP2_AXR6 (PIN_INPUT | MUX_MODE14) /* 0x31C */ MCASP2_AXR7 (PIN_INPUT | MUX_MODE14) /* 0x320 */ MCASP3_ACLKX (PIN_INPUT | MUX_MODE14) /* 0x324 */ MCASP3_FSX (PIN_INPUT | MUX_MODE14) /* 0x328 */ //MMC1_CLK (PIN_INPUT | MUX_MODE14) /* 0x354 */ //MMC1_CMD (PIN_INPUT | MUX_MODE14) /* 0x358 */ //MMC1_DAT0 (PIN_INPUT | MUX_MODE14) /* 0x35C */ //MMC1_DAT1 (PIN_INPUT | MUX_MODE14) /* 0x360 */ //MMC1_DAT2 (PIN_INPUT | MUX_MODE14) /* 0x364 */ //MMC1_DAT3 (PIN_INPUT | MUX_MODE14) /* 0x368 */ //MMC1_SDCD (PIN_INPUT | MUX_MODE14) /* 0x36C */ //MMC1_SDWP (PIN_INPUT | MUX_MODE14) /* 0x370 */ //ulpi //GPIO6_10 (PIN_INPUT | MUX_MODE14) /* 0x374 */ //GPIO6_11 (PIN_INPUT | MUX_MODE14) /* 0x378 */ //MMC3_CLK (PIN_INPUT | MUX_MODE14) /* 0x37C */ //MMC3_CMD (PIN_INPUT | MUX_MODE14) /* 0x380 */ //MMC3_DAT0 (PIN_INPUT | MUX_MODE14) /* 0x384 */ //MMC3_DAT1 (PIN_INPUT | MUX_MODE14) /* 0x388 */ //MMC3_DAT2 (PIN_INPUT | MUX_MODE14) /* 0x38C */ //MMC3_DAT3 (PIN_INPUT | MUX_MODE14) /* 0x390 */ //MMC3_DAT4 (PIN_INPUT | MUX_MODE14) /* 0x394 */ //MMC3_DAT5 (PIN_INPUT | MUX_MODE14) /* 0x398 */ //MMC3_DAT6 (PIN_INPUT | MUX_MODE14) /* 0x39C */ //MMC3_DAT7 (PIN_INPUT | MUX_MODE14) /* 0x3A0 */ //SPI1_SCLK (PIN_INPUT | MUX_MODE14) /* 0x3A4 */ //SPI1_D1 (PIN_INPUT | MUX_MODE14) /* 0x3A8 */ //SPI1_D0 (PIN_INPUT | MUX_MODE14) /* 0x3AC */ //SPI1_CS0 (PIN_INPUT | MUX_MODE14) /* 0x3B0 */ //SPI1_CS1 (PIN_INPUT | MUX_MODE14) /* 0x3B4 */ SPI1_CS2 (PIN_INPUT | MUX_MODE14) /* 0x3B8 */ //SPI1_CS3 (PIN_INPUT | MUX_MODE14) /* 0x3BC */ //SPI2_SCLK (PIN_INPUT | MUX_MODE14) /* 0x3C0 */ //SPI2_D1 (PIN_INPUT | MUX_MODE14) /* 0x3C4 */ //SPI2_D0 (PIN_INPUT | MUX_MODE14) /* 0x3C8 */ //SPI2_CS0 (PIN_INPUT | MUX_MODE14) /* 0x3CC */ DCAN1_TX (PIN_INPUT | MUX_MODE14) /* 0x3D0 */ DCAN1_RX (PIN_INPUT | MUX_MODE14) /* 0x3D4 */ DCAN2_TX (PIN_INPUT | MUX_MODE14) /* 0x3D8 */ DCAN2_RX (PIN_INPUT | MUX_MODE14) /* 0x3DC */ UART1_RXD (PIN_INPUT | MUX_MODE14) /* 0x3E0 */ UART1_TXD (PIN_INPUT | MUX_MODE14) /* 0x3E4 */ //UART1_CTSN (PIN_INPUT | MUX_MODE14) /* 0x3E8 */ //UART1_RTSN (PIN_INPUT | MUX_MODE14) /* 0x3EC */ //UART2_RXD (PIN_INPUT | MUX_MODE14) /* 0x3F0 */ //UART2_TXD (PIN_INPUT | MUX_MODE14) /* 0x3F4 */ //UART2_CTSN (PIN_INPUT | MUX_MODE14) /* 0x3F8 */ //UART2_RTSN (PIN_INPUT | MUX_MODE14) /* 0x3FC */ WAKEUP0 (PIN_INPUT | MUX_MODE14) /* 0x418 */ WAKEUP1 (PIN_INPUT | MUX_MODE14) /* 0x41C */ WAKEUP2 (PIN_INPUT | MUX_MODE14) /* 0x420 */ WAKEUP3 (PIN_INPUT | MUX_MODE14) /* 0x424 */ TDI (PIN_INPUT | MUX_MODE14) /* 0x434 */ TDO (PIN_INPUT | MUX_MODE14) /* 0x438 */ TCLK (PIN_INPUT | MUX_MODE14) /* 0x43C */ TRSTN (PIN_INPUT | MUX_MODE14) /* 0x440 */ RTCK (PIN_INPUT | MUX_MODE14) /* 0x444 */ EMU2 (PIN_INPUT | MUX_MODE14) /* 0x450 */ EMU3 (PIN_INPUT | MUX_MODE14) /* 0x454 */ //=================================================================================== >; }; uart3_pins_default: pinmux_uart3_pins { pinctrl-single,pins = < 0x34c (PIN_INPUT | MUX_MODE4) /* mcasp5_axr0.uart3_rxd */ 0x350 (PIN_OUTPUT | MUX_MODE4) /* mcasp5_axr1.uart3_txd */ >; }; uart5_pins_default: pinmux_uart5_pins { pinctrl-single,pins = < VOUT1_D0 (WAKEUP_EN | PIN_INPUT | MUX_MODE2) /* vout1_d0.uart5_rxd */ VOUT1_D1 (PIN_OUTPUT | MUX_MODE2) /* vout1_d1.uart5_txd */ >; }; uart6_pins_default: pinmux_uart6_pins { pinctrl-single,pins = < VOUT1_D8 (PIN_INPUT | MUX_MODE2) /* vout1_d8.uart6_rxd */ VOUT1_D9 (PIN_OUTPUT | MUX_MODE2) /* vout1_d9.uart6_txd */ VIN2A_D4 (PIN_OUTPUT | MUX_MODE8) /* vin2a_d4.uart6_ctsn */ VIN2A_D5 (PIN_INPUT | MUX_MODE8) /* vin2a_d5.uart6_rtsn */ >; }; uart9_pins_default: pinmux_uart9_pins { pinctrl-single,pins = < MCASP5_ACLKX (PIN_INPUT | MUX_MODE8) /* mcasp5_aclkx.uart9_rxd */ MCASP5_FSX (PIN_OUTPUT | MUX_MODE3) /* mcasp5_fsx.uart9_txd */ >; }; uart10_pins_default: pinmux_uart10_pins { pinctrl-single,pins = < 0x170 (PIN_INPUT | MUX_MODE8) /* vin2a_d2.uart10_rxd */ 0x174 (PIN_OUTPUT | MUX_MODE8) /* vin2a_d3.uart10_txd */ >; }; mmc1_pins_sdr12: pinmux_mmc1_sdr12_pins { pinctrl-single,pins = < 0x354 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */ 0x358 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */ 0x35c (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */ 0x360 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */ 0x364 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */ 0x368 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */ >; }; mmc1_pins_hs: pinmux_mmc1_hs_pins { pinctrl-single,pins = < 0x354 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */ 0x358 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */ 0x35c (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */ 0x360 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */ 0x364 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */ 0x368 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */ >; }; mmc1_pins_sdr25: pinmux_mmc1_sdr25_pins { pinctrl-single,pins = < 0x354 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */ 0x358 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */ 0x35c (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */ 0x360 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */ 0x364 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */ 0x368 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */ >; }; mmc1_pins_sdr50: pinmux_mmc1_sdr50_pins { pinctrl-single,pins = < 0x354 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE15 | MUX_MODE0) /* mmc1_clk.mmc1_clk */ 0x358 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE15 | MUX_MODE0) /* mmc1_cmd.mmc1_cmd */ 0x35C (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE15 | MUX_MODE0) /* mmc1_dat0.mmc1_dat0 */ 0x360 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE15 | MUX_MODE0) /* mmc1_dat1.mmc1_dat1 */ 0x364 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE15 | MUX_MODE0) /* mmc1_dat2.mmc1_dat2 */ 0x368 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE15 | MUX_MODE0) /* mmc1_dat3.mmc1_dat3 */ >; }; mmc1_pins_ddr50: pinmux_mmc1_ddr50_pins { pinctrl-single,pins = < 0x354 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE14 | MUX_MODE0) /* mmc1_clk.mmc1_clk */ 0x358 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE14 | MUX_MODE0) /* mmc1_cmd.mmc1_cmd */ 0x35C (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE14 | MUX_MODE0) /* mmc1_dat0.mmc1_dat0 */ 0x360 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE14 | MUX_MODE0) /* mmc1_dat1.mmc1_dat1 */ 0x364 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE14 | MUX_MODE0) /* mmc1_dat2.mmc1_dat2 */ 0x368 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE14 | MUX_MODE0) /* mmc1_dat3.mmc1_dat3 */ >; }; mmc1_pins_sdr104: pinmux_mmc1_sdr104_pins { pinctrl-single,pins = < 0x354 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc1_clk.mmc1_clk */ 0x358 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc1_cmd.mmc1_cmd */ 0x35C (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc1_dat0.mmc1_dat0 */ 0x360 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc1_dat1.mmc1_dat1 */ 0x364 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc1_dat2.mmc1_dat2 */ 0x368 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc1_dat3.mmc1_dat3 */ >; }; mmc2_pins_hs: pinmux_mmc2_hs_pins { pinctrl-single,pins = < 0x08C (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */ 0x090 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */ 0x094 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */ 0x098 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */ 0x09C (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */ 0x0A0 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */ 0x0A4 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */ 0x0A8 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */ 0x0AC (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */ 0x0B0 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */ >; }; mmc2_pins_ddr_1_8v: pinmux_mmc2_ddr_1_8v_pins { pinctrl-single,pins = < 0x08C (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */ 0x090 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */ 0x094 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */ 0x098 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */ 0x09C (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */ 0x0A0 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */ 0x0A4 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */ 0x0A8 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */ 0x0AC (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */ 0x0B0 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */ >; }; mmc2_pins_hs200_1_8v: pinmux_mmc2_hs200_1_8v_pins { pinctrl-single,pins = < 0x08C (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */ 0x090 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */ 0x094 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */ 0x098 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */ 0x09C (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a23.mmc2_clk */ 0x0A0 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */ 0x0A4 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */ 0x0A8 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */ 0x0AC (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */ 0x0B0 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */ >; }; }; &dra7_iodelay_core { mmc1_iodelay_sdr104_conf: mmc1_iodelay_sdr104_conf { pinctrl-single,pins = < 0x620 (A_DELAY(560) | G_DELAY(365)) /* CFG_MMC1_CLK_OUT */ 0x62C (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_CMD_OUT */ 0x638 (A_DELAY(29) | G_DELAY(0)) /* CFG_MMC1_DAT0_OUT */ 0x644 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT1_OUT */ 0x650 (A_DELAY(47) | G_DELAY(0)) /* CFG_MMC1_DAT2_OUT */ 0x65C (A_DELAY(30) | G_DELAY(0)) /* CFG_MMC1_DAT3_OUT */ 0x628 (A_DELAY(125) | G_DELAY(0)) /* CFG_MMC1_CMD_OEN */ 0x634 (A_DELAY(43) | G_DELAY(0)) /* CFG_MMC1_DAT0_OEN */ 0x640 (A_DELAY(433) | G_DELAY(0)) /* CFG_MMC1_DAT1_OEN */ 0x64C (A_DELAY(287) | G_DELAY(0)) /* CFG_MMC1_DAT2_OEN */ 0x658 (A_DELAY(351) | G_DELAY(0)) /* CFG_MMC1_DAT3_OEN */ >; }; mmc2_iodelay_hs200_1_8v_conf: mmc2_iodelay_hs200_1_8v_conf { pinctrl-single,pins = < 0x194 (A_DELAY(150) | G_DELAY(95)) /* CFG_GPMC_A19_OUT */ 0x1AC (A_DELAY(250) | G_DELAY(0)) /* CFG_GPMC_A20_OUT */ 0x1B8 (A_DELAY(125) | G_DELAY(0)) /* CFG_GPMC_A21_OUT */ 0x1C4 (A_DELAY(100) | G_DELAY(0)) /* CFG_GPMC_A22_OUT */ 0x1D0 (A_DELAY(870) | G_DELAY(415)) /* CFG_GPMC_A23_OUT */ 0x1DC (A_DELAY(30) | G_DELAY(0)) /* CFG_GPMC_A24_OUT */ 0x1E8 (A_DELAY(200) | G_DELAY(0)) /* CFG_GPMC_A25_OUT */ 0x1F4 (A_DELAY(200) | G_DELAY(0)) /* CFG_GPMC_A26_OUT */ 0x200 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A27_OUT */ 0x368 (A_DELAY(240) | G_DELAY(0)) /* CFG_GPMC_CS1_OUT */ 0x190 (A_DELAY(695) | G_DELAY(0)) /* CFG_GPMC_A19_OEN */ 0x1A8 (A_DELAY(924) | G_DELAY(0)) /* CFG_GPMC_A20_OEN */ 0x1B4 (A_DELAY(719) | G_DELAY(0)) /* CFG_GPMC_A21_OEN */ 0x1C0 (A_DELAY(824) | G_DELAY(0)) /* CFG_GPMC_A22_OEN */ 0x1D8 (A_DELAY(877) | G_DELAY(0)) /* CFG_GPMC_A24_OEN */ 0x1E4 (A_DELAY(446) | G_DELAY(0)) /* CFG_GPMC_A25_OEN */ 0x1F0 (A_DELAY(847) | G_DELAY(0)) /* CFG_GPMC_A26_OEN */ 0x1FC (A_DELAY(586) | G_DELAY(0)) /* CFG_GPMC_A27_OEN */ 0x364 (A_DELAY(1039) | G_DELAY(0)) /* CFG_GPMC_CS1_OEN */ >; }; }; &i2c3 { status = "okay"; clock-frequency = <400000>; }; &i2c5 { ov10633@37 { compatible = "ovti,ov10633"; reg = <0x37>; mux-gpios = <&pcf_hdmi 3 GPIO_ACTIVE_LOW>; /* CAM_FPD_MUX_S0 */ port { onboardLI: endpoint@0 { remote-endpoint = <&vin2a>; //hsync-active = <1>; //vsync-active = <1>; pclk-sample = <0>; channels = <0>; }; }; }; gpio_csi2_adap: tca6416@20 { status = "okay"; compatible = "ti,tca6416"; reg = <0x20>; gpio-controller; #gpio-cells = <2>; }; ov490@24 { compatible = "ovti,ov490"; reg = <0x24>; mux-gpios = <&gpio_csi2_adap 0 GPIO_ACTIVE_LOW>, /* CSI2_SEL_I2C_CLK */ <&gpio_csi2_adap 1 GPIO_ACTIVE_HIGH>, /* CSI2_SEL_REF_CLK */ <&gpio_csi2_adap 3 GPIO_ACTIVE_HIGH>, /* CSI2_CAM0_RESETn */ <&gpio_csi2_adap 4 GPIO_ACTIVE_LOW>; /* CSI2_CAM0_PWR_DWN */ port { csi2_cam0: endpoint@0 { clock-lanes = <0>; data-lanes = <1 2 3 4>; remote-endpoint = <&csi2_phy0>; }; }; }; }; &dss { pinctrl-names = "default"; pinctrl-0 = <&vout3_pins>; status = "ok"; vdda_video-supply = <&ldo5_reg>; ports { #address-cells = <1>; #size-cells = <0>; status = "okay"; port@lcd2 { reg = <2>; dpi2_out: endpoint { remote-endpoint = <&lcd2_in>; data-lines = <24>; }; }; }; }; &hdmi { vdda_video-supply = <&ldo5_reg>; }; &pcf_gpio_21 { interrupt-parent = <&gpio6>; interrupts = <11 IRQ_TYPE_EDGE_FALLING>; }; &mmc1 { pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104"; pinctrl-0 = <&mmc1_pins_default>; pinctrl-1 = <&mmc1_pins_hs>; pinctrl-2 = <&mmc1_pins_sdr12>; pinctrl-3 = <&mmc1_pins_sdr25>; pinctrl-4 = <&mmc1_pins_sdr50>; pinctrl-5 = <&mmc1_pins_ddr50>; pinctrl-6 = <&mmc1_pins_sdr104 &mmc1_iodelay_sdr104_conf>; }; &mmc2 { pinctrl-names = "default", "hs", "ddr_1_8v", "hs200_1_8v"; pinctrl-0 = <&mmc2_pins_default>; pinctrl-1 = <&mmc2_pins_hs>; pinctrl-2 = <&mmc2_pins_ddr_1_8v>; pinctrl-3 = <&mmc2_pins_hs200_1_8v &mmc2_iodelay_hs200_1_8v_conf>; }; // WNC &uart1 { /* use for GPIO declare */ status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&uart1_pins>; }; &uart2 { status = "okay"; }; &uart3 { status = "okay"; /* gpios = <&pcf_gpio_21 14 GPIO_ACTIVE_LOW>; */ pinctrl-names = "default"; pinctrl-0 = <&uart3_pins_default>; }; &uart5 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&uart5_pins_default>; }; &uart6 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&uart6_pins_default>; }; &uart9 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&uart9_pins_default>; }; &uart10 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&uart10_pins_default>; }; &mac { slaves = <1>; mode-gpios = <&pcf_gpio_21 4 GPIO_ACTIVE_HIGH>; }; &cpsw_emac0 { phy_id = <&davinci_mdio>, <3>; phy-mode = "rgmii"; }; &ipu2 { status = "okay"; memory-region = <&ipu2_cma_pool>; }; &ipu1 { status = "okay"; memory-region = <&ipu1_cma_pool>; }; &dsp1 { status = "okay"; memory-region = <&dsp1_cma_pool>; }; &vip1 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&vin2a_pins>; vin2a: port@1 { status = "okay"; }; }; video_in: &vin2a { status = "okay"; endpoint@0 { slave-mode; remote-endpoint = <&onboardLI>; }; }; &cal { status = "okay"; }; &csi2_0 { csi2_phy0: endpoint@0 { slave-mode; remote-endpoint = <&csi2_cam0>; }; }; #include "dra7xx-jamr3.dtsi" &tvp_5158{ status = "disabled"; mux-gpios = <&pcf_hdmi 2 GPIO_ACTIVE_LOW>, /*VIN2_S0*/ <&pcf_jamr3_21 8 GPIO_ACTIVE_LOW>, /*SEL_TVP_FPD*/ <&pcf_hdmi 6 GPIO_ACTIVE_HIGH>; /*VIN2_S2*/ };