[   87.935234] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4820, diff=1, hw=0 hw_last=0
[   87.951813] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4821, diff=1, hw=0 hw_last=0
[   87.968392] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4822, diff=1, hw=0 hw_last=0
[   87.984973] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4823, diff=1, hw=0 hw_last=0
[   88.001551] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4824, diff=1, hw=0 hw_last=0
[   88.018129] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4825, diff=1, hw=0 hw_last=0
[   88.034708] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4826, diff=1, hw=0 hw_last=0
[   88.051290] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4827, diff=1, hw=0 hw_last=0
[   88.067868] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4828, diff=1, hw=0 hw_last=0
[   88.084446] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4829, diff=1, hw=0 hw_last=0
[   88.101026] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4830, diff=1, hw=0 hw_last=0
[   88.117606] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4831, diff=1, hw=0 hw_last=0
[   88.134184] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4832, diff=1, hw=0 hw_last=0
[   88.150765] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4833, diff=1, hw=0 hw_last=0
[   88.167345] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4834, diff=1, hw=0 hw_last=0
[   88.183926] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4835, diff=1, hw=0 hw_last=0
[   88.200503] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4836, diff=1, hw=0 hw_last=0
[   88.217083] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4837, diff=1, hw=0 hw_last=0
[   88.233665] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4838, diff=1, hw=0 hw_last=0
[   88.250239] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4839, diff=1, hw=0 hw_last=0
[   88.266820] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4840, diff=1, hw=0 hw_last=0
[   88.283398] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4841, diff=1, hw=0 hw_last=0
[   88.299977] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4842, diff=1, hw=0 hw_last=0
[   88.316558] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4843, diff=1, hw=0 hw_last=0
[   88.333138] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4844, diff=1, hw=0 hw_last=0
[   88.349715] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4845, diff=1, hw=0 hw_last=0
[   88.366294] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4846, diff=1, hw=0 hw_last=0
[   88.382876] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4847, diff=1, hw=0 hw_last=0
[   88.399452] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4848, diff=1, hw=0 hw_last=0
[   88.416050] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4849, diff=1, hw=0 hw_last=0
[   88.416700] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[   88.416807] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 4850 to client
[   88.425097] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[   88.425205] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007967e7cb
[   88.425287] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[   88.425360] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000002cafbe1b state to 000000007967e7cb
[   88.425438] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[   88.425510] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000adb7ad91 state to 000000007967e7cb
[   88.425590] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 000000002cafbe1b
[   88.425664] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[   88.425736] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[   88.425807] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[   88.425879] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[   88.425955] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[   88.426026] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[   88.426102] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[   88.426173] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[   88.426246] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 000000007967e7cb
[   88.426320] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[   88.426392] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000007967e7cb
[   88.426474] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[   88.426520] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[   88.426557] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000007967e7cb
[   88.426636] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000000ace560b to 000000007967e7cb
[   88.426710] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000007967e7cb
[   88.426789] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[   88.426861] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[   88.426935] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[   88.427015] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000007967e7cb
[   88.427091] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007967e7cb
[   88.427164] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[   88.427237] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[   88.427309] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[   88.427381] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[   88.427453] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007967e7cb
[   88.428903] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[   88.432622] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4850, diff=1, hw=0 hw_last=0
[   88.449196] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4851, diff=1, hw=0 hw_last=0
[   88.465775] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4852, diff=1, hw=0 hw_last=0
[   88.482355] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4853, diff=1, hw=0 hw_last=0
[   88.498939] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4854, diff=1, hw=0 hw_last=0
[   88.515513] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4855, diff=1, hw=0 hw_last=0
[   88.532094] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4856, diff=1, hw=0 hw_last=0
[   88.548673] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4857, diff=1, hw=0 hw_last=0
[   88.565254] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4858, diff=1, hw=0 hw_last=0
[   88.581833] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4859, diff=1, hw=0 hw_last=0
[   88.598409] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4860, diff=1, hw=0 hw_last=0
[   88.614989] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4861, diff=1, hw=0 hw_last=0
[   88.631566] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4862, diff=1, hw=0 hw_last=0
[   88.648147] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4863, diff=1, hw=0 hw_last=0
[   88.649386] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[   88.649494] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007967e7cb
[   88.649581] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[   88.649654] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000002cafbe1b state to 000000007967e7cb
[   88.649732] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[   88.649804] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000adb7ad91 state to 000000007967e7cb
[   88.649886] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 000000002cafbe1b
[   88.649960] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[   88.650032] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[   88.650103] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[   88.650174] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[   88.650248] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[   88.650319] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[   88.650394] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[   88.650465] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[   88.650537] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 000000007967e7cb
[   88.650612] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[   88.650686] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000007967e7cb
[   88.650769] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[   88.650819] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[   88.650856] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000007967e7cb
[   88.650935] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000018d86a98 to 000000007967e7cb
[   88.651010] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000007967e7cb
[   88.651099] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007967e7cb nonblocking
[   88.651213] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[   88.651289] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[   88.664723] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4864, diff=1, hw=0 hw_last=0
[   88.664835] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007967e7cb
[   88.664913] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[   88.664976] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[   88.665039] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[   88.665102] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[   88.665165] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007967e7cb
[   88.681300] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4865, diff=1, hw=0 hw_last=0
[   88.697879] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4866, diff=1, hw=0 hw_last=0
[   88.714457] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4867, diff=1, hw=0 hw_last=0
[   88.731036] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4868, diff=1, hw=0 hw_last=0
[   88.747617] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4869, diff=1, hw=0 hw_last=0
[   88.764198] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4870, diff=1, hw=0 hw_last=0
[   88.780775] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4871, diff=1, hw=0 hw_last=0
[   88.797356] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4872, diff=1, hw=0 hw_last=0
[   88.813936] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4873, diff=1, hw=0 hw_last=0
[   88.830515] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4874, diff=1, hw=0 hw_last=0
[   88.847089] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4875, diff=1, hw=0 hw_last=0
[   88.863668] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4876, diff=1, hw=0 hw_last=0
[   88.880247] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4877, diff=1, hw=0 hw_last=0
[   88.896826] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4878, diff=1, hw=0 hw_last=0
[   88.913405] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4879, diff=1, hw=0 hw_last=0
[   88.929985] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4880, diff=1, hw=0 hw_last=0
[   88.946564] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4881, diff=1, hw=0 hw_last=0
[   88.963143] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4882, diff=1, hw=0 hw_last=0
[   88.979731] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4883, diff=1, hw=0 hw_last=0
[   88.996307] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4884, diff=1, hw=0 hw_last=0
[   89.012883] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4885, diff=1, hw=0 hw_last=0
[   89.029460] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4886, diff=1, hw=0 hw_last=0
[   89.046040] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4887, diff=1, hw=0 hw_last=0
[   89.062619] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4888, diff=1, hw=0 hw_last=0
[   89.079200] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4889, diff=1, hw=0 hw_last=0
[   89.095778] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4890, diff=1, hw=0 hw_last=0
[   89.112356] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4891, diff=1, hw=0 hw_last=0
[   89.128936] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4892, diff=1, hw=0 hw_last=0
[   89.145516] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4893, diff=1, hw=0 hw_last=0
[   89.162095] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4894, diff=1, hw=0 hw_last=0
[   89.178673] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4895, diff=1, hw=0 hw_last=0
[   89.195253] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4896, diff=1, hw=0 hw_last=0
[   89.211832] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4897, diff=1, hw=0 hw_last=0
[   89.228411] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4898, diff=1, hw=0 hw_last=0
[   89.244991] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4899, diff=1, hw=0 hw_last=0
[   89.261572] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4900, diff=1, hw=0 hw_last=0
[   89.278153] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4901, diff=1, hw=0 hw_last=0
[   89.294729] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4902, diff=1, hw=0 hw_last=0
[   89.311311] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4903, diff=1, hw=0 hw_last=0
[   89.327895] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4904, diff=1, hw=0 hw_last=0
[   89.344467] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4905, diff=1, hw=0 hw_last=0
[   89.361047] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4906, diff=1, hw=0 hw_last=0
[   89.377626] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4907, diff=1, hw=0 hw_last=0
[   89.394204] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4908, diff=1, hw=0 hw_last=0
[   89.410786] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4909, diff=1, hw=0 hw_last=0
[   89.427365] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4910, diff=1, hw=0 hw_last=0
[   89.443944] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4911, diff=1, hw=0 hw_last=0
[   89.460521] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4912, diff=1, hw=0 hw_last=0
[   89.477101] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4913, diff=1, hw=0 hw_last=0
[   89.493678] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4914, diff=1, hw=0 hw_last=0
[   89.509877] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[   89.509995] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 4915 to client
[   89.510267] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4915, diff=1, hw=0 hw_last=0
[   89.519275] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[   89.519378] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000fde3661d
[   89.519462] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[   89.519535] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000ec98bd42 state to 00000000fde3661d
[   89.519613] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[   89.519685] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 00000000fde3661d
[   89.519764] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000ec98bd42
[   89.519838] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[   89.519909] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[   89.519980] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[   89.520051] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[   89.520125] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[   89.520197] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[   89.520290] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[   89.520365] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[   89.520439] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 00000000fde3661d
[   89.520514] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[   89.520587] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000fde3661d
[   89.520669] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[   89.520717] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[   89.520754] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000fde3661d
[   89.520834] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000007967e7cb to 00000000fde3661d
[   89.520908] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000fde3661d
[   89.520986] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[   89.521058] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[   89.521132] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[   89.521213] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 00000000fde3661d
[   89.521288] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000fde3661d
[   89.521361] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[   89.521433] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[   89.521504] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[   89.521576] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[   89.521648] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000fde3661d
[   89.523104] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[   89.526849] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4916, diff=1, hw=0 hw_last=0
[   89.543423] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4917, diff=1, hw=0 hw_last=0
[   89.560005] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4918, diff=1, hw=0 hw_last=0
[   89.576583] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4919, diff=1, hw=0 hw_last=0
[   89.593163] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4920, diff=1, hw=0 hw_last=0
[   89.609739] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4921, diff=1, hw=0 hw_last=0
[   89.626320] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4922, diff=1, hw=0 hw_last=0
[   89.642900] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4923, diff=1, hw=0 hw_last=0
[   89.659481] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4924, diff=1, hw=0 hw_last=0
[   89.676061] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4925, diff=1, hw=0 hw_last=0
[   89.692639] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4926, diff=1, hw=0 hw_last=0
[   89.709218] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4927, diff=1, hw=0 hw_last=0
[   89.725793] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4928, diff=1, hw=0 hw_last=0
[   89.742375] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4929, diff=1, hw=0 hw_last=0
[   89.751675] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[   89.751789] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000fde3661d
[   89.751875] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[   89.751948] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000ec98bd42 state to 00000000fde3661d
[   89.752026] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[   89.752098] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 00000000fde3661d
[   89.752176] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000ec98bd42
[   89.752285] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[   89.752364] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[   89.752439] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[   89.752513] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[   89.752590] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[   89.752662] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[   89.752739] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[   89.752812] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[   89.752885] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 00000000fde3661d
[   89.752960] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[   89.753034] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000fde3661d
[   89.753117] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[   89.753166] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[   89.753203] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000fde3661d
[   89.753283] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000000ace560b to 00000000fde3661d
[   89.753357] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000fde3661d
[   89.753447] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000fde3661d nonblocking
[   89.753563] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[   89.753646] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[   89.758950] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4930, diff=1, hw=0 hw_last=0
[   89.759061] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000fde3661d
[   89.759131] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[   89.759195] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[   89.759257] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[   89.759320] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[   89.759387] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000fde3661d
[   89.775527] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4931, diff=1, hw=0 hw_last=0
[   89.792106] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4932, diff=1, hw=0 hw_last=0
[   89.808685] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4933, diff=1, hw=0 hw_last=0
[   89.825262] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4934, diff=1, hw=0 hw_last=0
[   89.841843] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4935, diff=1, hw=0 hw_last=0
[   89.858425] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4936, diff=1, hw=0 hw_last=0
[   89.875003] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4937, diff=1, hw=0 hw_last=0
[   89.891581] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4938, diff=1, hw=0 hw_last=0
[   89.908165] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4939, diff=1, hw=0 hw_last=0
[   89.924744] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4940, diff=1, hw=0 hw_last=0
[   89.941316] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4941, diff=1, hw=0 hw_last=0
[   89.957896] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4942, diff=1, hw=0 hw_last=0
[   89.974474] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4943, diff=1, hw=0 hw_last=0
[   89.991054] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4944, diff=1, hw=0 hw_last=0
[   90.007633] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4945, diff=1, hw=0 hw_last=0
[   90.024211] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4946, diff=1, hw=0 hw_last=0
[   90.040791] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4947, diff=1, hw=0 hw_last=0
[   90.057374] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4948, diff=1, hw=0 hw_last=0
[   90.073952] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4949, diff=1, hw=0 hw_last=0
[   90.090534] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4950, diff=1, hw=0 hw_last=0
[   90.107111] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4951, diff=1, hw=0 hw_last=0
[   90.123687] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4952, diff=1, hw=0 hw_last=0
[   90.140267] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4953, diff=1, hw=0 hw_last=0
[   90.156846] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4954, diff=1, hw=0 hw_last=0
[   90.173425] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4955, diff=1, hw=0 hw_last=0
[   90.190004] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4956, diff=1, hw=0 hw_last=0
[   90.206583] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4957, diff=1, hw=0 hw_last=0
[   90.223162] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4958, diff=1, hw=0 hw_last=0
[   90.239742] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4959, diff=1, hw=0 hw_last=0
[   90.256321] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4960, diff=1, hw=0 hw_last=0
[   90.272899] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4961, diff=1, hw=0 hw_last=0
[   90.289478] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4962, diff=1, hw=0 hw_last=0
[   90.306058] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4963, diff=1, hw=0 hw_last=0
[   90.322637] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4964, diff=1, hw=0 hw_last=0
[   90.339217] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4965, diff=1, hw=0 hw_last=0
[   90.355797] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4966, diff=1, hw=0 hw_last=0
[   90.372377] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4967, diff=1, hw=0 hw_last=0
[   90.388955] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4968, diff=1, hw=0 hw_last=0
[   90.405535] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4969, diff=1, hw=0 hw_last=0
[   90.422113] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4970, diff=1, hw=0 hw_last=0
[   90.438701] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4971, diff=1, hw=0 hw_last=0
[   90.455272] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4972, diff=1, hw=0 hw_last=0
[   90.471852] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4973, diff=1, hw=0 hw_last=0
[   90.488429] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4974, diff=1, hw=0 hw_last=0
[   90.505010] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4975, diff=1, hw=0 hw_last=0
[   90.521587] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4976, diff=1, hw=0 hw_last=0
[   90.538168] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4977, diff=1, hw=0 hw_last=0
[   90.554756] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4978, diff=1, hw=0 hw_last=0
[   90.556940] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[   90.557058] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 4979 to client
[   90.564364] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[   90.564470] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000eae20a14
[   90.564555] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[   90.564635] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000215b6887 state to 00000000eae20a14
[   90.564728] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[   90.564806] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000e8543c49 state to 00000000eae20a14
[   90.564889] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000215b6887
[   90.564965] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[   90.565041] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[   90.565115] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[   90.565187] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[   90.565264] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[   90.565336] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[   90.565412] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[   90.565484] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[   90.565556] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 00000000eae20a14
[   90.565631] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[   90.565704] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000eae20a14
[   90.565786] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[   90.565835] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[   90.565871] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000eae20a14
[   90.565951] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000008a640c91 to 00000000eae20a14
[   90.566025] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000eae20a14
[   90.566103] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[   90.566177] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[   90.566251] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[   90.566333] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 00000000eae20a14
[   90.566408] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000eae20a14
[   90.566481] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[   90.566554] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[   90.566626] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[   90.566698] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[   90.566771] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000eae20a14
[   90.568167] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[   90.571340] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4979, diff=1, hw=0 hw_last=0
[   90.575663] systemd-journald[214]: Data hash table of /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal has a fill level at 75.0 (2731 of 3640 items, 2097152 file size, 767 bytes per hash table item), suggesting rotation.
[   90.587915] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4980, diff=1, hw=0 hw_last=0
[   90.596654] systemd-journald[214]: /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal: Journal header limits reached or header out-of-date, rotating.
[   90.604488] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4981, diff=1, hw=0 hw_last=0
[   90.621068] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4982, diff=1, hw=0 hw_last=0
[   90.637648] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4983, diff=1, hw=0 hw_last=0
[   90.654231] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4984, diff=1, hw=0 hw_last=0
[   90.670809] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4985, diff=1, hw=0 hw_last=0
[   90.687389] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4986, diff=1, hw=0 hw_last=0
[   90.703966] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4987, diff=1, hw=0 hw_last=0
[   90.720547] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4988, diff=1, hw=0 hw_last=0
[   90.737124] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4989, diff=1, hw=0 hw_last=0
[   90.753705] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4990, diff=1, hw=0 hw_last=0
[   90.770282] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4991, diff=1, hw=0 hw_last=0
[   90.786861] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4992, diff=1, hw=0 hw_last=0
[   90.800065] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[   90.800185] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000eae20a14
[   90.800330] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[   90.800407] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000215b6887 state to 00000000eae20a14
[   90.800486] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[   90.800560] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000e8543c49 state to 00000000eae20a14
[   90.800640] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000215b6887
[   90.800716] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[   90.800788] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[   90.800862] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[   90.800934] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[   90.801010] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[   90.801082] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[   90.801158] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[   90.801230] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[   90.801302] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 00000000eae20a14
[   90.801378] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[   90.801451] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000eae20a14
[   90.801536] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[   90.801587] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[   90.801624] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000eae20a14
[   90.801705] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000001477df7c to 00000000eae20a14
[   90.801778] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000eae20a14
[   90.801867] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000eae20a14 nonblocking
[   90.801983] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[   90.802056] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[   90.803439] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4993, diff=1, hw=0 hw_last=0
[   90.803529] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000eae20a14
[   90.803596] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[   90.803659] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[   90.803720] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[   90.803782] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[   90.803846] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000eae20a14
[   90.820018] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4994, diff=1, hw=0 hw_last=0
[   90.836594] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4995, diff=1, hw=0 hw_last=0
[   90.853173] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4996, diff=1, hw=0 hw_last=0
[   90.869751] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4997, diff=1, hw=0 hw_last=0
[   90.886331] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4998, diff=1, hw=0 hw_last=0
[   90.902914] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=4999, diff=1, hw=0 hw_last=0
[   90.919489] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5000, diff=1, hw=0 hw_last=0
[   90.936069] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5001, diff=1, hw=0 hw_last=0
[   90.952653] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5002, diff=1, hw=0 hw_last=0
[   90.969233] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5003, diff=1, hw=0 hw_last=0
[   90.985806] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5004, diff=1, hw=0 hw_last=0
[   91.002384] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5005, diff=1, hw=0 hw_last=0
[   91.018963] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5006, diff=1, hw=0 hw_last=0
[   91.035542] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5007, diff=1, hw=0 hw_last=0
[   91.052121] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5008, diff=1, hw=0 hw_last=0
[   91.068701] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5009, diff=1, hw=0 hw_last=0
[   91.085280] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5010, diff=1, hw=0 hw_last=0
[   91.101861] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5011, diff=1, hw=0 hw_last=0
[   91.118439] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5012, diff=1, hw=0 hw_last=0
[   91.135019] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5013, diff=1, hw=0 hw_last=0
[   91.151599] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5014, diff=1, hw=0 hw_last=0
[   91.168181] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5015, diff=1, hw=0 hw_last=0
[   91.184756] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5016, diff=1, hw=0 hw_last=0
[   91.201335] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5017, diff=1, hw=0 hw_last=0
[   91.217915] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5018, diff=1, hw=0 hw_last=0
[   91.234493] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5019, diff=1, hw=0 hw_last=0
[   91.251073] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5020, diff=1, hw=0 hw_last=0
[   91.267652] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5021, diff=1, hw=0 hw_last=0
[   91.284231] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5022, diff=1, hw=0 hw_last=0
[   91.300812] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5023, diff=1, hw=0 hw_last=0
[   91.317389] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5024, diff=1, hw=0 hw_last=0
[   91.333968] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5025, diff=1, hw=0 hw_last=0
[   91.350547] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5026, diff=1, hw=0 hw_last=0
[   91.367127] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5027, diff=1, hw=0 hw_last=0
[   91.383707] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5028, diff=1, hw=0 hw_last=0
[   91.400286] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5029, diff=1, hw=0 hw_last=0
[   91.416866] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5030, diff=1, hw=0 hw_last=0
[   91.433446] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5031, diff=1, hw=0 hw_last=0
[   91.450024] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5032, diff=1, hw=0 hw_last=0
[   91.466603] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5033, diff=1, hw=0 hw_last=0
[   91.483183] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5034, diff=1, hw=0 hw_last=0
[   91.499761] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5035, diff=1, hw=0 hw_last=0
[   91.516340] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5036, diff=1, hw=0 hw_last=0
[   91.532919] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5037, diff=1, hw=0 hw_last=0
[   91.549499] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5038, diff=1, hw=0 hw_last=0
[   91.566077] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5039, diff=1, hw=0 hw_last=0
[   91.582656] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5040, diff=1, hw=0 hw_last=0
[   91.599242] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5041, diff=1, hw=0 hw_last=0
[   91.604616] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[   91.604732] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 5042 to client
[   91.608039] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[   91.608144] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f37c832b
[   91.608267] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[   91.608351] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000003519e999 state to 00000000f37c832b
[   91.608432] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[   91.608506] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 00000000f37c832b
[   91.608589] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 000000003519e999
[   91.608665] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[   91.608740] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[   91.608814] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[   91.608886] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[   91.608963] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[   91.609035] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[   91.609111] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[   91.609183] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[   91.609255] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 00000000f37c832b
[   91.609331] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[   91.609404] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000f37c832b
[   91.609486] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[   91.609535] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[   91.609572] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000f37c832b
[   91.609651] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000c0cf118d to 00000000f37c832b
[   91.609726] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000f37c832b
[   91.609804] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[   91.609877] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[   91.609951] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[   91.610030] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 00000000f37c832b
[   91.610106] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f37c832b
[   91.610179] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[   91.610253] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[   91.610325] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[   91.610398] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[   91.610471] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f37c832b
[   91.611902] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[   91.615823] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5042, diff=1, hw=0 hw_last=0
[   91.632399] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5043, diff=1, hw=0 hw_last=0
[   91.648979] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5044, diff=1, hw=0 hw_last=0
[   91.665557] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5045, diff=1, hw=0 hw_last=0
[   91.682143] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5046, diff=1, hw=0 hw_last=0
[   91.698718] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5047, diff=1, hw=0 hw_last=0
[   91.715297] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5048, diff=1, hw=0 hw_last=0
[   91.731874] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5049, diff=1, hw=0 hw_last=0
[   91.748456] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5050, diff=1, hw=0 hw_last=0
[   91.765037] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5051, diff=1, hw=0 hw_last=0
[   91.781615] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5052, diff=1, hw=0 hw_last=0
[   91.798192] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5053, diff=1, hw=0 hw_last=0
[   91.814771] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5054, diff=1, hw=0 hw_last=0
[   91.831352] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5055, diff=1, hw=0 hw_last=0
[   91.832090] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[   91.832197] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f37c832b
[   91.832305] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[   91.832384] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000003519e999 state to 00000000f37c832b
[   91.832462] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[   91.832535] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 00000000f37c832b
[   91.832618] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 000000003519e999
[   91.832693] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[   91.832764] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[   91.832835] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[   91.832907] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[   91.832981] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[   91.833053] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[   91.833129] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[   91.833200] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[   91.833272] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 00000000f37c832b
[   91.833347] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[   91.833421] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000f37c832b
[   91.833504] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[   91.833554] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[   91.833591] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000f37c832b
[   91.833670] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000095dd8ec0 to 00000000f37c832b
[   91.833745] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000f37c832b
[   91.833836] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f37c832b nonblocking
[   91.833954] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[   91.834037] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[   91.847926] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5056, diff=1, hw=0 hw_last=0
[   91.848022] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f37c832b
[   91.848094] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[   91.848159] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[   91.848221] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[   91.848298] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[   91.848363] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f37c832b
[   91.864503] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5057, diff=1, hw=0 hw_last=0
[   91.881084] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5058, diff=1, hw=0 hw_last=0
[   91.897662] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5059, diff=1, hw=0 hw_last=0
[   91.914242] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5060, diff=1, hw=0 hw_last=0
[   91.930821] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5061, diff=1, hw=0 hw_last=0
[   91.947400] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5062, diff=1, hw=0 hw_last=0
[   91.963984] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5063, diff=1, hw=0 hw_last=0
[   91.980560] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5064, diff=1, hw=0 hw_last=0
[   91.997139] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5065, diff=1, hw=0 hw_last=0
[   92.013720] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5066, diff=1, hw=0 hw_last=0
[   92.030299] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5067, diff=1, hw=0 hw_last=0
[   92.046874] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5068, diff=1, hw=0 hw_last=0
[   92.063453] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5069, diff=1, hw=0 hw_last=0
[   92.080032] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5070, diff=1, hw=0 hw_last=0
[   92.096611] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5071, diff=1, hw=0 hw_last=0
[   92.113190] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5072, diff=1, hw=0 hw_last=0
[   92.129770] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5073, diff=1, hw=0 hw_last=0
[   92.146349] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5074, diff=1, hw=0 hw_last=0
[   92.162932] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5075, diff=1, hw=0 hw_last=0
[   92.179511] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5076, diff=1, hw=0 hw_last=0
[   92.196090] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5077, diff=1, hw=0 hw_last=0
[   92.212666] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5078, diff=1, hw=0 hw_last=0
[   92.229245] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5079, diff=1, hw=0 hw_last=0
[   92.245825] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5080, diff=1, hw=0 hw_last=0
[   92.262404] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5081, diff=1, hw=0 hw_last=0
[   92.278983] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5082, diff=1, hw=0 hw_last=0
[   92.295563] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5083, diff=1, hw=0 hw_last=0
[   92.312142] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5084, diff=1, hw=0 hw_last=0
[   92.328722] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5085, diff=1, hw=0 hw_last=0
[   92.345299] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5086, diff=1, hw=0 hw_last=0
[   92.361880] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5087, diff=1, hw=0 hw_last=0
[   92.378458] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5088, diff=1, hw=0 hw_last=0
[   92.395038] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5089, diff=1, hw=0 hw_last=0
[   92.411616] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5090, diff=1, hw=0 hw_last=0
[   92.428196] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5091, diff=1, hw=0 hw_last=0
[   92.444777] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5092, diff=1, hw=0 hw_last=0
[   92.461354] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5093, diff=1, hw=0 hw_last=0
[   92.477933] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5094, diff=1, hw=0 hw_last=0
[   92.494514] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5095, diff=1, hw=0 hw_last=0
[   92.511091] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5096, diff=1, hw=0 hw_last=0
[   92.527671] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5097, diff=1, hw=0 hw_last=0
[   92.544250] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5098, diff=1, hw=0 hw_last=0
[   92.560829] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5099, diff=1, hw=0 hw_last=0
[   92.577409] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5100, diff=1, hw=0 hw_last=0
[   92.593989] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5101, diff=1, hw=0 hw_last=0
[   92.610570] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5102, diff=1, hw=0 hw_last=0
[   92.613955] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[   92.614076] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 5103 to client
[   92.619367] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[   92.619471] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006c5644bb
[   92.619553] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[   92.619626] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000082b4fa6a state to 000000006c5644bb
[   92.619704] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[   92.619776] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 000000006c5644bb
[   92.619856] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000082b4fa6a
[   92.619930] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[   92.620002] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[   92.620073] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[   92.620145] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[   92.620244] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[   92.620326] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[   92.620405] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[   92.620479] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[   92.620553] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000006c5644bb
[   92.620632] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[   92.620706] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000006c5644bb
[   92.620788] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[   92.620840] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[   92.620876] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006c5644bb
[   92.620957] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000f37c832b to 000000006c5644bb
[   92.621032] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006c5644bb
[   92.621112] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[   92.621186] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[   92.621260] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[   92.621342] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000006c5644bb
[   92.621418] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006c5644bb
[   92.621494] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[   92.621572] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[   92.621665] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[   92.621744] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[   92.621823] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006c5644bb
[   92.623283] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[   92.627158] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5103, diff=1, hw=0 hw_last=0
[   92.643731] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5104, diff=1, hw=0 hw_last=0
[   92.660312] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5105, diff=1, hw=0 hw_last=0
[   92.676888] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5106, diff=1, hw=0 hw_last=0
[   92.693471] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5107, diff=1, hw=0 hw_last=0
[   92.710052] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5108, diff=1, hw=0 hw_last=0
[   92.726627] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5109, diff=1, hw=0 hw_last=0
[   92.743208] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5110, diff=1, hw=0 hw_last=0
[   92.759787] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5111, diff=1, hw=0 hw_last=0
[   92.776366] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5112, diff=1, hw=0 hw_last=0
[   92.792944] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5113, diff=1, hw=0 hw_last=0
[   92.809524] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5114, diff=1, hw=0 hw_last=0
[   92.826104] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5115, diff=1, hw=0 hw_last=0
[   92.842681] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5116, diff=1, hw=0 hw_last=0
[   92.851511] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[   92.851627] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006c5644bb
[   92.851714] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[   92.851791] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000082b4fa6a state to 000000006c5644bb
[   92.851868] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[   92.851941] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 000000006c5644bb
[   92.852021] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 0000000082b4fa6a
[   92.852097] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[   92.852169] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[   92.852278] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[   92.852356] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[   92.852433] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[   92.852507] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[   92.852585] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[   92.852657] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[   92.852730] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000006c5644bb
[   92.852808] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[   92.852881] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000006c5644bb
[   92.852965] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[   92.853018] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[   92.853054] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006c5644bb
[   92.853134] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000c0cf118d to 000000006c5644bb
[   92.853208] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006c5644bb
[   92.853297] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006c5644bb nonblocking
[   92.853407] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[   92.853482] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[   92.859257] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5117, diff=1, hw=0 hw_last=0
[   92.859352] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006c5644bb
[   92.859425] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[   92.859488] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[   92.859549] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[   92.859612] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[   92.859676] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006c5644bb
[   92.875839] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5118, diff=1, hw=0 hw_last=0
[   92.892418] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5119, diff=1, hw=0 hw_last=0
[   92.908994] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5120, diff=1, hw=0 hw_last=0
[   92.925572] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5121, diff=1, hw=0 hw_last=0
[   92.942154] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5122, diff=1, hw=0 hw_last=0
[   92.958735] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5123, diff=1, hw=0 hw_last=0
[   92.975314] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5124, diff=1, hw=0 hw_last=0
[   92.991894] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5125, diff=1, hw=0 hw_last=0
[   93.008474] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5126, diff=1, hw=0 hw_last=0
[   93.025052] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5127, diff=1, hw=0 hw_last=0
[   93.041634] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5128, diff=1, hw=0 hw_last=0
[   93.058206] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5129, diff=1, hw=0 hw_last=0
[   93.074785] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5130, diff=1, hw=0 hw_last=0
[   93.091364] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5131, diff=1, hw=0 hw_last=0
[   93.107944] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5132, diff=1, hw=0 hw_last=0
[   93.124522] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5133, diff=1, hw=0 hw_last=0
[   93.141101] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5134, diff=1, hw=0 hw_last=0
[   93.157681] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5135, diff=1, hw=0 hw_last=0
[   93.174266] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5136, diff=1, hw=0 hw_last=0
[   93.190843] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5137, diff=1, hw=0 hw_last=0
[   93.207422] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5138, diff=1, hw=0 hw_last=0
[   93.224000] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5139, diff=1, hw=0 hw_last=0
[   93.240578] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5140, diff=1, hw=0 hw_last=0
[   93.257159] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5141, diff=1, hw=0 hw_last=0
[   93.273735] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5142, diff=1, hw=0 hw_last=0
[   93.290315] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5143, diff=1, hw=0 hw_last=0
[   93.306895] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5144, diff=1, hw=0 hw_last=0
[   93.323473] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5145, diff=1, hw=0 hw_last=0
[   93.340052] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5146, diff=1, hw=0 hw_last=0
[   93.356632] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5147, diff=1, hw=0 hw_last=0
[   93.373212] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5148, diff=1, hw=0 hw_last=0
[   93.389790] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5149, diff=1, hw=0 hw_last=0
[   93.406373] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5150, diff=1, hw=0 hw_last=0
[   93.422949] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5151, diff=1, hw=0 hw_last=0
[   93.439528] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5152, diff=1, hw=0 hw_last=0
[   93.456109] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5153, diff=1, hw=0 hw_last=0
[   93.472687] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5154, diff=1, hw=0 hw_last=0
[   93.489268] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5155, diff=1, hw=0 hw_last=0
[   93.505848] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5156, diff=1, hw=0 hw_last=0
[   93.522424] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5157, diff=1, hw=0 hw_last=0
[   93.539005] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5158, diff=1, hw=0 hw_last=0
[   93.555583] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5159, diff=1, hw=0 hw_last=0
[   93.572163] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5160, diff=1, hw=0 hw_last=0
[   93.588743] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5161, diff=1, hw=0 hw_last=0
[   93.605322] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5162, diff=1, hw=0 hw_last=0
[   93.621914] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5163, diff=1, hw=0 hw_last=0
[   93.624294] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[   93.624413] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 5164 to client
[   93.630695] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[   93.630797] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e0dcab9c
[   93.630880] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[   93.630953] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000fefb5c61 state to 00000000e0dcab9c
[   93.631030] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[   93.631102] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 00000000e0dcab9c
[   93.631183] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000fefb5c61
[   93.631257] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[   93.631328] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[   93.631399] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[   93.631470] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[   93.631546] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[   93.631617] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[   93.631691] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[   93.631762] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[   93.631834] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 00000000e0dcab9c
[   93.631908] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[   93.631980] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000e0dcab9c
[   93.632061] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[   93.632109] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[   93.632146] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000e0dcab9c
[   93.632243] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000eae20a14 to 00000000e0dcab9c
[   93.632321] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000e0dcab9c
[   93.632401] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[   93.632475] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[   93.632548] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[   93.632629] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 00000000e0dcab9c
[   93.632705] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e0dcab9c
[   93.632777] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[   93.632850] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[   93.632923] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[   93.632995] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[   93.633068] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e0dcab9c
[   93.634500] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[   93.638488] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5164, diff=1, hw=0 hw_last=0
[   93.655064] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5165, diff=1, hw=0 hw_last=0
[   93.671643] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5166, diff=1, hw=0 hw_last=0
[   93.688222] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5167, diff=1, hw=0 hw_last=0
[   93.704803] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5168, diff=1, hw=0 hw_last=0
[   93.721382] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5169, diff=1, hw=0 hw_last=0
[   93.737963] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5170, diff=1, hw=0 hw_last=0
[   93.754544] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5171, diff=1, hw=0 hw_last=0
[   93.771119] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5172, diff=1, hw=0 hw_last=0
[   93.787704] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5173, diff=1, hw=0 hw_last=0
[   93.804279] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5174, diff=1, hw=0 hw_last=0
[   93.820860] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5175, diff=1, hw=0 hw_last=0
[   93.837435] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5176, diff=1, hw=0 hw_last=0
[   93.854015] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5177, diff=1, hw=0 hw_last=0
[   93.863027] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[   93.863139] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e0dcab9c
[   93.863225] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[   93.863299] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000fefb5c61 state to 00000000e0dcab9c
[   93.863377] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[   93.863450] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 00000000e0dcab9c
[   93.863530] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000fefb5c61
[   93.863609] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[   93.863680] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[   93.863752] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[   93.863824] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[   93.863899] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[   93.863970] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[   93.864047] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[   93.864118] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[   93.864190] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 00000000e0dcab9c
[   93.864306] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[   93.864387] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000e0dcab9c
[   93.864473] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[   93.864525] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[   93.864561] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000e0dcab9c
[   93.864642] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000008a640c91 to 00000000e0dcab9c
[   93.864717] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000e0dcab9c
[   93.864806] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e0dcab9c nonblocking
[   93.864916] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[   93.864996] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[   93.870590] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5178, diff=1, hw=0 hw_last=0
[   93.870688] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e0dcab9c
[   93.870757] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[   93.870822] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[   93.870885] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[   93.870948] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[   93.871012] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e0dcab9c
[   93.887170] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5179, diff=1, hw=0 hw_last=0
[   93.903748] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5180, diff=1, hw=0 hw_last=0
[   93.920328] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5181, diff=1, hw=0 hw_last=0
[   93.936904] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5182, diff=1, hw=0 hw_last=0
[   93.953483] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5183, diff=1, hw=0 hw_last=0
[   93.970066] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5184, diff=1, hw=0 hw_last=0
[   93.986646] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5185, diff=1, hw=0 hw_last=0
[   94.003224] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5186, diff=1, hw=0 hw_last=0
[   94.019807] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5187, diff=1, hw=0 hw_last=0
[   94.036385] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5188, diff=1, hw=0 hw_last=0
[   94.052958] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5189, diff=1, hw=0 hw_last=0
[   94.069537] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5190, diff=1, hw=0 hw_last=0
[   94.086118] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5191, diff=1, hw=0 hw_last=0
[   94.102695] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5192, diff=1, hw=0 hw_last=0
[   94.119276] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5193, diff=1, hw=0 hw_last=0
[   94.135854] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5194, diff=1, hw=0 hw_last=0
[   94.152433] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5195, diff=1, hw=0 hw_last=0
[   94.169015] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5196, diff=1, hw=0 hw_last=0
[   94.185595] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5197, diff=1, hw=0 hw_last=0
[   94.202172] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5198, diff=1, hw=0 hw_last=0
[   94.218752] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5199, diff=1, hw=0 hw_last=0
[   94.235329] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5200, diff=1, hw=0 hw_last=0
[   94.251909] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5201, diff=1, hw=0 hw_last=0
[   94.268490] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5202, diff=1, hw=0 hw_last=0
[   94.285069] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5203, diff=1, hw=0 hw_last=0
[   94.301648] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5204, diff=1, hw=0 hw_last=0
[   94.318227] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5205, diff=1, hw=0 hw_last=0
[   94.334807] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5206, diff=1, hw=0 hw_last=0
[   94.351384] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5207, diff=1, hw=0 hw_last=0
[   94.367964] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5208, diff=1, hw=0 hw_last=0
[   94.384545] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5209, diff=1, hw=0 hw_last=0
[   94.401121] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5210, diff=1, hw=0 hw_last=0
[   94.417702] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5211, diff=1, hw=0 hw_last=0
[   94.434282] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5212, diff=1, hw=0 hw_last=0
[   94.450861] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5213, diff=1, hw=0 hw_last=0
[   94.467442] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5214, diff=1, hw=0 hw_last=0
[   94.484020] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5215, diff=1, hw=0 hw_last=0
[   94.500597] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5216, diff=1, hw=0 hw_last=0
[   94.517177] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5217, diff=1, hw=0 hw_last=0
[   94.533754] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5218, diff=1, hw=0 hw_last=0
[   94.550334] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5219, diff=1, hw=0 hw_last=0
[   94.566915] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5220, diff=1, hw=0 hw_last=0
[   94.583498] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5221, diff=1, hw=0 hw_last=0
[   94.592327] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[   94.592447] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 5222 to client
[   94.593757] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[   94.593865] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000d7e48c6b
[   94.593948] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[   94.594023] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000087081e28 state to 00000000d7e48c6b
[   94.594100] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[   94.594172] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a743c9a8 state to 00000000d7e48c6b
[   94.594250] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000087081e28
[   94.594326] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[   94.594399] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[   94.594473] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[   94.594547] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[   94.594624] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[   94.594697] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[   94.594773] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[   94.594844] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[   94.594915] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 00000000d7e48c6b
[   94.594989] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[   94.595061] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000d7e48c6b
[   94.595143] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[   94.595190] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[   94.595227] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000d7e48c6b
[   94.595307] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000fde3661d to 00000000d7e48c6b
[   94.595380] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000d7e48c6b
[   94.595458] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[   94.595531] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[   94.595604] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[   94.595685] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 00000000d7e48c6b
[   94.595761] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000d7e48c6b
[   94.595833] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[   94.595905] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[   94.595977] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[   94.596048] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[   94.596120] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000d7e48c6b
[   94.597604] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[   94.600089] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5222, diff=1, hw=0 hw_last=0
[   94.616659] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5223, diff=1, hw=0 hw_last=0
[   94.633236] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5224, diff=1, hw=0 hw_last=0
[   94.649814] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5225, diff=1, hw=0 hw_last=0
[   94.666397] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5226, diff=1, hw=0 hw_last=0
[   94.682976] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5227, diff=1, hw=0 hw_last=0
[   94.699555] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5228, diff=1, hw=0 hw_last=0
[   94.716134] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5229, diff=1, hw=0 hw_last=0
[   94.732714] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5230, diff=1, hw=0 hw_last=0
[   94.749297] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5231, diff=1, hw=0 hw_last=0
[   94.765875] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5232, diff=1, hw=0 hw_last=0
[   94.782450] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5233, diff=1, hw=0 hw_last=0
[   94.799032] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5234, diff=1, hw=0 hw_last=0
[   94.815606] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5235, diff=1, hw=0 hw_last=0
[   94.817675] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[   94.817785] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000d7e48c6b
[   94.817872] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[   94.817946] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000087081e28 state to 00000000d7e48c6b
[   94.818024] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[   94.818096] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a743c9a8 state to 00000000d7e48c6b
[   94.818176] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 0000000087081e28
[   94.818251] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[   94.818322] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[   94.818393] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[   94.818464] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[   94.818539] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[   94.818611] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[   94.818687] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[   94.818758] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[   94.818832] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 00000000d7e48c6b
[   94.818906] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[   94.818980] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000d7e48c6b
[   94.819063] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[   94.819110] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[   94.819146] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000d7e48c6b
[   94.819225] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000007967e7cb to 00000000d7e48c6b
[   94.819299] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000d7e48c6b
[   94.819386] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000d7e48c6b nonblocking
[   94.819503] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[   94.819579] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[   94.832187] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5236, diff=1, hw=0 hw_last=0
[   94.832293] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000d7e48c6b
[   94.832363] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[   94.832427] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[   94.832488] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[   94.832551] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[   94.832615] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000d7e48c6b
[   94.848762] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5237, diff=1, hw=0 hw_last=0
[   94.865340] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5238, diff=1, hw=0 hw_last=0
[   94.881920] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5239, diff=1, hw=0 hw_last=0
[   94.898500] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5240, diff=1, hw=0 hw_last=0
[   94.915077] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5241, diff=1, hw=0 hw_last=0
[   94.931656] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5242, diff=1, hw=0 hw_last=0
[   94.948240] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5243, diff=1, hw=0 hw_last=0
[   94.964817] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5244, diff=1, hw=0 hw_last=0
[   94.981397] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5245, diff=1, hw=0 hw_last=0
[   94.997980] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5246, diff=1, hw=0 hw_last=0
[   95.014560] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5247, diff=1, hw=0 hw_last=0
[   95.031134] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5248, diff=1, hw=0 hw_last=0
[   95.047710] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5249, diff=1, hw=0 hw_last=0
[   95.064289] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5250, diff=1, hw=0 hw_last=0
[   95.080868] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5251, diff=1, hw=0 hw_last=0
[   95.097447] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5252, diff=1, hw=0 hw_last=0
[   95.114027] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5253, diff=1, hw=0 hw_last=0
[   95.130606] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5254, diff=1, hw=0 hw_last=0
[   95.147187] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5255, diff=1, hw=0 hw_last=0
[   95.163768] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5256, diff=1, hw=0 hw_last=0
[   95.180344] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5257, diff=1, hw=0 hw_last=0
[   95.196926] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5258, diff=1, hw=0 hw_last=0
[   95.213502] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5259, diff=1, hw=0 hw_last=0
[   95.230082] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5260, diff=1, hw=0 hw_last=0
[   95.246662] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5261, diff=1, hw=0 hw_last=0
[   95.263245] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5262, diff=1, hw=0 hw_last=0
[   95.279820] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5263, diff=1, hw=0 hw_last=0
[   95.296402] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5264, diff=1, hw=0 hw_last=0
[   95.312979] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5265, diff=1, hw=0 hw_last=0
[   95.329557] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5266, diff=1, hw=0 hw_last=0
[   95.346135] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5267, diff=1, hw=0 hw_last=0
[   95.362716] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5268, diff=1, hw=0 hw_last=0
[   95.379297] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5269, diff=1, hw=0 hw_last=0
[   95.395875] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5270, diff=1, hw=0 hw_last=0
[   95.412453] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5271, diff=1, hw=0 hw_last=0
[   95.429033] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5272, diff=1, hw=0 hw_last=0
[   95.445613] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5273, diff=1, hw=0 hw_last=0
[   95.462194] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5274, diff=1, hw=0 hw_last=0
[   95.478772] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5275, diff=1, hw=0 hw_last=0
[   95.495350] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5276, diff=1, hw=0 hw_last=0
[   95.511930] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5277, diff=1, hw=0 hw_last=0
[   95.528507] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5278, diff=1, hw=0 hw_last=0
[   95.545087] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5279, diff=1, hw=0 hw_last=0
[   95.561667] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5280, diff=1, hw=0 hw_last=0
[   95.578253] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5281, diff=1, hw=0 hw_last=0
[   95.585787] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[   95.585906] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 5282 to client
[   95.587207] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[   95.587317] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000004593454f
[   95.587405] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[   95.587484] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000002cafbe1b state to 000000004593454f
[   95.587569] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[   95.587642] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 000000004593454f
[   95.587723] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 000000002cafbe1b
[   95.587797] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[   95.587869] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[   95.587941] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[   95.588012] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[   95.588087] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[   95.588160] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[   95.588266] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[   95.588347] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[   95.588424] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000004593454f
[   95.588502] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[   95.588577] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000004593454f
[   95.588660] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[   95.588709] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[   95.588746] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000004593454f
[   95.588827] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000d7e48c6b to 000000004593454f
[   95.588902] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000004593454f
[   95.588981] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[   95.589053] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[   95.589128] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[   95.589209] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000004593454f
[   95.589286] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000004593454f
[   95.589359] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[   95.589432] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[   95.589504] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[   95.589576] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[   95.589650] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000004593454f
[   95.591070] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[   95.594836] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5282, diff=1, hw=0 hw_last=0
[   95.611410] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5283, diff=1, hw=0 hw_last=0
[   95.627989] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5284, diff=1, hw=0 hw_last=0
[   95.644569] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5285, diff=1, hw=0 hw_last=0
[   95.661152] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5286, diff=1, hw=0 hw_last=0
[   95.677726] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5287, diff=1, hw=0 hw_last=0
[   95.694310] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5288, diff=1, hw=0 hw_last=0
[   95.710886] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5289, diff=1, hw=0 hw_last=0
[   95.727467] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5290, diff=1, hw=0 hw_last=0
[   95.744047] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5291, diff=1, hw=0 hw_last=0
[   95.760626] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5292, diff=1, hw=0 hw_last=0
[   95.777207] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5293, diff=1, hw=0 hw_last=0
[   95.793782] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5294, diff=1, hw=0 hw_last=0
[   95.810362] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5295, diff=1, hw=0 hw_last=0
[   95.811463] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[   95.811569] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000004593454f
[   95.811655] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[   95.811728] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000002cafbe1b state to 000000004593454f
[   95.811806] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[   95.811879] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 000000004593454f
[   95.811960] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 000000002cafbe1b
[   95.812034] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[   95.812105] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[   95.812177] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[   95.812281] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[   95.812361] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[   95.812434] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[   95.812510] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[   95.812583] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[   95.812655] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000004593454f
[   95.812730] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[   95.812804] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000004593454f
[   95.812887] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[   95.812936] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[   95.812973] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000004593454f
[   95.813053] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000fde3661d to 000000004593454f
[   95.813128] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000004593454f
[   95.813218] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000004593454f nonblocking
[   95.813328] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[   95.813406] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[   95.826937] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5296, diff=1, hw=0 hw_last=0
[   95.827055] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000004593454f
[   95.827125] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[   95.827188] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[   95.827249] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[   95.827311] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[   95.827375] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000004593454f
[   95.843516] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5297, diff=1, hw=0 hw_last=0
[   95.860092] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5298, diff=1, hw=0 hw_last=0
[   95.876671] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5299, diff=1, hw=0 hw_last=0
[   95.893249] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5300, diff=1, hw=0 hw_last=0
[   95.909830] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5301, diff=1, hw=0 hw_last=0
[   95.926410] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5302, diff=1, hw=0 hw_last=0
[   95.942988] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5303, diff=1, hw=0 hw_last=0
[   95.959568] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5304, diff=1, hw=0 hw_last=0
[   95.976146] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5305, diff=1, hw=0 hw_last=0
[   95.992727] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5306, diff=1, hw=0 hw_last=0
[   96.009308] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5307, diff=1, hw=0 hw_last=0
[   96.025882] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5308, diff=1, hw=0 hw_last=0
[   96.042461] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5309, diff=1, hw=0 hw_last=0
[   96.059040] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5310, diff=1, hw=0 hw_last=0
[   96.075619] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5311, diff=1, hw=0 hw_last=0
[   96.092198] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5312, diff=1, hw=0 hw_last=0
[   96.108778] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5313, diff=1, hw=0 hw_last=0
[   96.125359] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5314, diff=1, hw=0 hw_last=0
[   96.141939] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5315, diff=1, hw=0 hw_last=0
[   96.158516] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5316, diff=1, hw=0 hw_last=0
[   96.175096] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5317, diff=1, hw=0 hw_last=0
[   96.191675] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5318, diff=1, hw=0 hw_last=0
[   96.208253] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5319, diff=1, hw=0 hw_last=0
[   96.224833] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5320, diff=1, hw=0 hw_last=0
[   96.241412] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5321, diff=1, hw=0 hw_last=0
[   96.257992] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5322, diff=1, hw=0 hw_last=0
[   96.274570] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5323, diff=1, hw=0 hw_last=0
[   96.291151] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5324, diff=1, hw=0 hw_last=0
[   96.307729] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5325, diff=1, hw=0 hw_last=0
[   96.324307] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5326, diff=1, hw=0 hw_last=0
[   96.340888] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5327, diff=1, hw=0 hw_last=0
[   96.357466] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5328, diff=1, hw=0 hw_last=0
[   96.374045] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5329, diff=1, hw=0 hw_last=0
[   96.390625] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5330, diff=1, hw=0 hw_last=0
[   96.407204] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5331, diff=1, hw=0 hw_last=0
[   96.423783] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5332, diff=1, hw=0 hw_last=0
[   96.440363] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5333, diff=1, hw=0 hw_last=0
[   96.440741] systemd-journald[214]: Data hash table of /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal has a fill level at 75.1 (2732 of 3640 items, 2097152 file size, 767 bytes per hash table item), suggesting rotation.
[   96.456945] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5334, diff=1, hw=0 hw_last=0
[   96.461672] systemd-journald[214]: /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal: Journal header limits reached or header out-of-date, rotating.
[   96.473522] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5335, diff=1, hw=0 hw_last=0
[   96.490102] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5336, diff=1, hw=0 hw_last=0
[   96.506680] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5337, diff=1, hw=0 hw_last=0
[   96.523261] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5338, diff=1, hw=0 hw_last=0
[   96.539838] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5339, diff=1, hw=0 hw_last=0
[   96.556419] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5340, diff=1, hw=0 hw_last=0
[   96.572999] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5341, diff=1, hw=0 hw_last=0
[   96.584440] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[   96.584566] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 5342 to client
[   96.589580] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5342, diff=1, hw=0 hw_last=0
[   96.598858] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[   96.598952] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000cc24793
[   96.599036] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[   96.599109] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000ec98bd42 state to 000000000cc24793
[   96.599186] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[   96.599258] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 000000000cc24793
[   96.599339] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000ec98bd42
[   96.599413] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[   96.599486] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[   96.599558] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[   96.599630] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[   96.599708] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[   96.599781] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[   96.599858] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[   96.599933] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[   96.600006] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 000000000cc24793
[   96.600082] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[   96.600155] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000000cc24793
[   96.600261] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[   96.600318] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[   96.600355] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000cc24793
[   96.600444] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000e0dcab9c to 000000000cc24793
[   96.600519] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000cc24793
[   96.600598] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[   96.600672] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[   96.600746] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[   96.600828] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000000cc24793
[   96.600904] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000cc24793
[   96.600978] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[   96.601050] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[   96.601122] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[   96.601195] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[   96.601268] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000cc24793
[   96.602749] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[   96.606160] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5343, diff=1, hw=0 hw_last=0
[   96.622738] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5344, diff=1, hw=0 hw_last=0
[   96.639316] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5345, diff=1, hw=0 hw_last=0
[   96.655898] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5346, diff=1, hw=0 hw_last=0
[   96.672478] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5347, diff=1, hw=0 hw_last=0
[   96.689056] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5348, diff=1, hw=0 hw_last=0
[   96.705636] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5349, diff=1, hw=0 hw_last=0
[   96.722215] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5350, diff=1, hw=0 hw_last=0
[   96.738800] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5351, diff=1, hw=0 hw_last=0
[   96.755375] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5352, diff=1, hw=0 hw_last=0
[   96.771965] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5353, diff=1, hw=0 hw_last=0
[   96.788539] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5354, diff=1, hw=0 hw_last=0
[   96.805113] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5355, diff=1, hw=0 hw_last=0
[   96.821689] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5356, diff=1, hw=0 hw_last=0
[   96.830787] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[   96.830900] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000cc24793
[   96.830986] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[   96.831061] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000ec98bd42 state to 000000000cc24793
[   96.831138] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[   96.831210] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 000000000cc24793
[   96.831290] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000ec98bd42
[   96.831364] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[   96.831436] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[   96.831507] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[   96.831578] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[   96.831653] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[   96.831725] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[   96.831799] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[   96.831871] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[   96.831942] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 000000000cc24793
[   96.832017] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[   96.832090] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000000cc24793
[   96.832173] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[   96.832258] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[   96.832298] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000cc24793
[   96.832387] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000eae20a14 to 000000000cc24793
[   96.832464] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000cc24793
[   96.832554] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000cc24793 nonblocking
[   96.832665] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[   96.832738] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[   96.838266] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5357, diff=1, hw=0 hw_last=0
[   96.838370] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000cc24793
[   96.838439] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[   96.838502] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[   96.838563] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[   96.838626] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[   96.838690] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000cc24793
[   96.854846] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5358, diff=1, hw=0 hw_last=0
[   96.871424] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5359, diff=1, hw=0 hw_last=0
[   96.888002] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5360, diff=1, hw=0 hw_last=0
[   96.904581] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5361, diff=1, hw=0 hw_last=0
[   96.921160] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5362, diff=1, hw=0 hw_last=0
[   96.937741] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5363, diff=1, hw=0 hw_last=0
[   96.954319] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5364, diff=1, hw=0 hw_last=0
[   96.970899] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5365, diff=1, hw=0 hw_last=0
[   96.987479] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5366, diff=1, hw=0 hw_last=0
[   97.004055] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5367, diff=1, hw=0 hw_last=0
[   97.020635] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5368, diff=1, hw=0 hw_last=0
[   97.037213] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5369, diff=1, hw=0 hw_last=0
[   97.053792] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5370, diff=1, hw=0 hw_last=0
[   97.070371] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5371, diff=1, hw=0 hw_last=0
[   97.086950] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5372, diff=1, hw=0 hw_last=0
[   97.103529] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5373, diff=1, hw=0 hw_last=0
[   97.120109] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5374, diff=1, hw=0 hw_last=0
[   97.136691] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5375, diff=1, hw=0 hw_last=0
[   97.153268] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5376, diff=1, hw=0 hw_last=0
[   97.169848] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5377, diff=1, hw=0 hw_last=0
[   97.186426] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5378, diff=1, hw=0 hw_last=0
[   97.203006] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5379, diff=1, hw=0 hw_last=0
[   97.219584] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5380, diff=1, hw=0 hw_last=0
[   97.236163] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5381, diff=1, hw=0 hw_last=0
[   97.252743] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5382, diff=1, hw=0 hw_last=0
[   97.269323] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5383, diff=1, hw=0 hw_last=0
[   97.285901] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5384, diff=1, hw=0 hw_last=0
[   97.302481] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5385, diff=1, hw=0 hw_last=0
[   97.319061] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5386, diff=1, hw=0 hw_last=0
[   97.335640] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5387, diff=1, hw=0 hw_last=0
[   97.352218] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5388, diff=1, hw=0 hw_last=0
[   97.368798] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5389, diff=1, hw=0 hw_last=0
[   97.385378] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5390, diff=1, hw=0 hw_last=0
[   97.401956] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5391, diff=1, hw=0 hw_last=0
[   97.418535] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5392, diff=1, hw=0 hw_last=0
[   97.435114] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5393, diff=1, hw=0 hw_last=0
[   97.451702] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5394, diff=1, hw=0 hw_last=0
[   97.468274] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5395, diff=1, hw=0 hw_last=0
[   97.484853] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5396, diff=1, hw=0 hw_last=0
[   97.501431] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5397, diff=1, hw=0 hw_last=0
[   97.518010] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5398, diff=1, hw=0 hw_last=0
[   97.534590] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5399, diff=1, hw=0 hw_last=0
[   97.551170] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5400, diff=1, hw=0 hw_last=0
[   97.567748] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5401, diff=1, hw=0 hw_last=0
[   97.584336] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5402, diff=1, hw=0 hw_last=0
[   97.585315] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[   97.585428] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 5403 to client
[   97.593708] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[   97.593808] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000ab379aee
[   97.593891] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[   97.593964] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000bac3ec2d state to 00000000ab379aee
[   97.594042] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[   97.594114] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 00000000ab379aee
[   97.594193] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000bac3ec2d
[   97.594267] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[   97.594338] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[   97.594409] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[   97.594480] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[   97.594556] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[   97.594627] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[   97.594703] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[   97.594775] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[   97.594846] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 00000000ab379aee
[   97.594921] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[   97.594992] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000ab379aee
[   97.595074] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[   97.595121] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[   97.595158] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000ab379aee
[   97.595237] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000006c5644bb to 00000000ab379aee
[   97.595311] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000ab379aee
[   97.595390] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[   97.595462] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[   97.595534] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[   97.595614] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 00000000ab379aee
[   97.595690] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ab379aee
[   97.595763] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[   97.595834] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[   97.595906] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[   97.595977] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[   97.596049] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ab379aee
[   97.597521] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[   97.600914] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5403, diff=1, hw=0 hw_last=0
[   97.617491] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5404, diff=1, hw=0 hw_last=0
[   97.634070] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5405, diff=1, hw=0 hw_last=0
[   97.650648] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5406, diff=1, hw=0 hw_last=0
[   97.667230] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5407, diff=1, hw=0 hw_last=0
[   97.683808] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5408, diff=1, hw=0 hw_last=0
[   97.700387] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5409, diff=1, hw=0 hw_last=0
[   97.716967] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5410, diff=1, hw=0 hw_last=0
[   97.733549] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5411, diff=1, hw=0 hw_last=0
[   97.750127] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5412, diff=1, hw=0 hw_last=0
[   97.766706] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5413, diff=1, hw=0 hw_last=0
[   97.783285] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5414, diff=1, hw=0 hw_last=0
[   97.799861] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5415, diff=1, hw=0 hw_last=0
[   97.816439] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5416, diff=1, hw=0 hw_last=0
[   97.826231] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[   97.826346] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000ab379aee
[   97.826433] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[   97.826506] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000bac3ec2d state to 00000000ab379aee
[   97.826583] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[   97.826655] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 00000000ab379aee
[   97.826733] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000bac3ec2d
[   97.826807] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[   97.826878] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[   97.826949] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[   97.827020] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[   97.827094] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[   97.827165] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[   97.827240] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[   97.827312] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[   97.827383] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 00000000ab379aee
[   97.827458] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[   97.827532] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000ab379aee
[   97.827614] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[   97.827660] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[   97.827696] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000ab379aee
[   97.827776] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000f37c832b to 00000000ab379aee
[   97.827849] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000ab379aee
[   97.827938] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000ab379aee nonblocking
[   97.828052] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[   97.828127] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[   97.833018] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5417, diff=1, hw=0 hw_last=0
[   97.833117] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ab379aee
[   97.833188] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[   97.833251] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[   97.833313] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[   97.833374] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[   97.833437] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ab379aee
[   97.849598] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5418, diff=1, hw=0 hw_last=0
[   97.866176] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5419, diff=1, hw=0 hw_last=0
[   97.882754] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5420, diff=1, hw=0 hw_last=0
[   97.899334] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5421, diff=1, hw=0 hw_last=0
[   97.915912] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5422, diff=1, hw=0 hw_last=0
[   97.932494] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5423, diff=1, hw=0 hw_last=0
[   97.949073] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5424, diff=1, hw=0 hw_last=0
[   97.965652] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5425, diff=1, hw=0 hw_last=0
[   97.982233] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5426, diff=1, hw=0 hw_last=0
[   97.998807] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5427, diff=1, hw=0 hw_last=0
[   98.015386] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5428, diff=1, hw=0 hw_last=0
[   98.031965] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5429, diff=1, hw=0 hw_last=0
[   98.048544] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5430, diff=1, hw=0 hw_last=0
[   98.065123] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5431, diff=1, hw=0 hw_last=0
[   98.081703] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5432, diff=1, hw=0 hw_last=0
[   98.098282] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5433, diff=1, hw=0 hw_last=0
[   98.114863] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5434, diff=1, hw=0 hw_last=0
[   98.131445] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5435, diff=1, hw=0 hw_last=0
[   98.148023] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5436, diff=1, hw=0 hw_last=0
[   98.164602] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5437, diff=1, hw=0 hw_last=0
[   98.181180] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5438, diff=1, hw=0 hw_last=0
[   98.197759] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5439, diff=1, hw=0 hw_last=0
[   98.214337] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5440, diff=1, hw=0 hw_last=0
[   98.230916] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5441, diff=1, hw=0 hw_last=0
[   98.247499] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5442, diff=1, hw=0 hw_last=0
[   98.264074] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5443, diff=1, hw=0 hw_last=0
[   98.280656] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5444, diff=1, hw=0 hw_last=0
[   98.297235] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5445, diff=1, hw=0 hw_last=0
[   98.313814] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5446, diff=1, hw=0 hw_last=0
[   98.330391] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5447, diff=1, hw=0 hw_last=0
[   98.346971] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5448, diff=1, hw=0 hw_last=0
[   98.363549] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5449, diff=1, hw=0 hw_last=0
[   98.380129] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5450, diff=1, hw=0 hw_last=0
[   98.396709] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5451, diff=1, hw=0 hw_last=0
[   98.413288] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5452, diff=1, hw=0 hw_last=0
[   98.429870] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5453, diff=1, hw=0 hw_last=0
[   98.446448] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5454, diff=1, hw=0 hw_last=0
[   98.463027] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5455, diff=1, hw=0 hw_last=0
[   98.479604] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5456, diff=1, hw=0 hw_last=0
[   98.496184] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5457, diff=1, hw=0 hw_last=0
[   98.512764] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5458, diff=1, hw=0 hw_last=0
[   98.529341] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5459, diff=1, hw=0 hw_last=0
[   98.545921] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5460, diff=1, hw=0 hw_last=0
[   98.562502] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5461, diff=1, hw=0 hw_last=0
[   98.579079] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5462, diff=1, hw=0 hw_last=0
[   98.595659] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5463, diff=1, hw=0 hw_last=0
[   98.612245] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5464, diff=1, hw=0 hw_last=0
[   98.622476] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[   98.622594] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 5465 to client
[   98.623910] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[   98.624015] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000071ef6b0b
[   98.624099] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[   98.624175] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000003519e999 state to 0000000071ef6b0b
[   98.624288] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[   98.624372] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000e8543c49 state to 0000000071ef6b0b
[   98.624456] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 000000003519e999
[   98.624534] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[   98.624610] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[   98.624687] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[   98.624762] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[   98.624844] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[   98.624920] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[   98.625000] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[   98.625072] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[   98.625145] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 0000000071ef6b0b
[   98.625220] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[   98.625293] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000071ef6b0b
[   98.625377] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[   98.625427] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[   98.625465] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000071ef6b0b
[   98.625545] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000ab379aee to 0000000071ef6b0b
[   98.625620] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000071ef6b0b
[   98.625699] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[   98.625773] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[   98.625846] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[   98.625929] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 0000000071ef6b0b
[   98.626005] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000071ef6b0b
[   98.626078] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[   98.626151] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[   98.626223] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[   98.626297] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[   98.626370] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000071ef6b0b
[   98.627809] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[   98.628829] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5465, diff=1, hw=0 hw_last=0
[   98.645402] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5466, diff=1, hw=0 hw_last=0
[   98.661981] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5467, diff=1, hw=0 hw_last=0
[   98.678559] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5468, diff=1, hw=0 hw_last=0
[   98.695143] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5469, diff=1, hw=0 hw_last=0
[   98.711721] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5470, diff=1, hw=0 hw_last=0
[   98.728301] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5471, diff=1, hw=0 hw_last=0
[   98.744877] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5472, diff=1, hw=0 hw_last=0
[   98.761458] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5473, diff=1, hw=0 hw_last=0
[   98.778042] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5474, diff=1, hw=0 hw_last=0
[   98.794621] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5475, diff=1, hw=0 hw_last=0
[   98.811200] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5476, diff=1, hw=0 hw_last=0
[   98.827775] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5477, diff=1, hw=0 hw_last=0
[   98.844351] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5478, diff=1, hw=0 hw_last=0
[   98.856009] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[   98.856126] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000071ef6b0b
[   98.856246] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[   98.856331] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000003519e999 state to 0000000071ef6b0b
[   98.856413] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[   98.856487] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000e8543c49 state to 0000000071ef6b0b
[   98.856570] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 000000003519e999
[   98.856645] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[   98.856718] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[   98.856792] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[   98.856865] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[   98.856941] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[   98.857020] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[   98.857098] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[   98.857171] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[   98.857244] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 0000000071ef6b0b
[   98.857319] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[   98.857394] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000071ef6b0b
[   98.857477] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[   98.857529] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[   98.857566] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000071ef6b0b
[   98.857647] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000006c5644bb to 0000000071ef6b0b
[   98.857722] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000071ef6b0b
[   98.857811] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000071ef6b0b nonblocking
[   98.857923] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[   98.857996] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[   98.860930] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5479, diff=1, hw=0 hw_last=0
[   98.861035] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000071ef6b0b
[   98.861104] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[   98.861168] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[   98.861230] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[   98.861291] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[   98.861355] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000071ef6b0b
[   98.877508] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5480, diff=1, hw=0 hw_last=0
[   98.894086] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5481, diff=1, hw=0 hw_last=0
[   98.910664] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5482, diff=1, hw=0 hw_last=0
[   98.927243] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5483, diff=1, hw=0 hw_last=0
[   98.943822] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5484, diff=1, hw=0 hw_last=0
[   98.960402] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5485, diff=1, hw=0 hw_last=0
[   98.976981] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5486, diff=1, hw=0 hw_last=0
[   98.993560] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5487, diff=1, hw=0 hw_last=0
[   99.010140] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5488, diff=1, hw=0 hw_last=0
[   99.026721] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5489, diff=1, hw=0 hw_last=0
[   99.043297] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5490, diff=1, hw=0 hw_last=0
[   99.059875] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5491, diff=1, hw=0 hw_last=0
[   99.076454] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5492, diff=1, hw=0 hw_last=0
[   99.093034] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5493, diff=1, hw=0 hw_last=0
[   99.109614] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5494, diff=1, hw=0 hw_last=0
[   99.126192] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5495, diff=1, hw=0 hw_last=0
[   99.142771] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5496, diff=1, hw=0 hw_last=0
[   99.159350] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5497, diff=1, hw=0 hw_last=0
[   99.175931] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5498, diff=1, hw=0 hw_last=0
[   99.192511] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5499, diff=1, hw=0 hw_last=0
[   99.209089] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5500, diff=1, hw=0 hw_last=0
[   99.225669] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5501, diff=1, hw=0 hw_last=0
[   99.242247] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5502, diff=1, hw=0 hw_last=0
[   99.258826] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5503, diff=1, hw=0 hw_last=0
[   99.275405] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5504, diff=1, hw=0 hw_last=0
[   99.291986] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5505, diff=1, hw=0 hw_last=0
[   99.308566] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5506, diff=1, hw=0 hw_last=0
[   99.325145] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5507, diff=1, hw=0 hw_last=0
[   99.341723] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5508, diff=1, hw=0 hw_last=0
[   99.358306] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5509, diff=1, hw=0 hw_last=0
[   99.374880] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5510, diff=1, hw=0 hw_last=0
[   99.391460] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5511, diff=1, hw=0 hw_last=0
[   99.408038] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5512, diff=1, hw=0 hw_last=0
[   99.424618] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5513, diff=1, hw=0 hw_last=0
[   99.441197] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5514, diff=1, hw=0 hw_last=0
[   99.457780] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5515, diff=1, hw=0 hw_last=0
[   99.474356] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5516, diff=1, hw=0 hw_last=0
[   99.490937] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5517, diff=1, hw=0 hw_last=0
[   99.507516] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5518, diff=1, hw=0 hw_last=0
[   99.524094] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5519, diff=1, hw=0 hw_last=0
[   99.540674] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5520, diff=1, hw=0 hw_last=0
[   99.557252] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5521, diff=1, hw=0 hw_last=0
[   99.573831] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5522, diff=1, hw=0 hw_last=0
[   99.590409] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5523, diff=1, hw=0 hw_last=0
[   99.606989] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5524, diff=1, hw=0 hw_last=0
[   99.623569] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5525, diff=1, hw=0 hw_last=0
[   99.640147] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5526, diff=1, hw=0 hw_last=0
[   99.656729] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5527, diff=1, hw=0 hw_last=0
[   99.673310] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5528, diff=1, hw=0 hw_last=0
[   99.682203] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[   99.682324] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 5529 to client
[   99.683609] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[   99.683717] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006e1bef3e
[   99.683807] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[   99.683886] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000082b4fa6a state to 000000006e1bef3e
[   99.683969] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[   99.684048] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 000000006e1bef3e
[   99.684130] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 0000000082b4fa6a
[   99.684204] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[   99.684308] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[   99.684391] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[   99.684466] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[   99.684545] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[   99.684619] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[   99.684696] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[   99.684771] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[   99.684844] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 000000006e1bef3e
[   99.684919] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[   99.684992] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000006e1bef3e
[   99.685075] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[   99.685125] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[   99.685162] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006e1bef3e
[   99.685243] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000000cc24793 to 000000006e1bef3e
[   99.685317] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006e1bef3e
[   99.685396] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[   99.685470] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[   99.685543] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[   99.685625] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000006e1bef3e
[   99.685700] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006e1bef3e
[   99.685773] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[   99.685846] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[   99.685919] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[   99.685991] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[   99.686065] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006e1bef3e
[   99.687501] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[   99.689894] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5529, diff=1, hw=0 hw_last=0
[   99.706468] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5530, diff=1, hw=0 hw_last=0
[   99.723050] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5531, diff=1, hw=0 hw_last=0
[   99.739628] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5532, diff=1, hw=0 hw_last=0
[   99.756210] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5533, diff=1, hw=0 hw_last=0
[   99.772788] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5534, diff=1, hw=0 hw_last=0
[   99.789368] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5535, diff=1, hw=0 hw_last=0
[   99.805945] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5536, diff=1, hw=0 hw_last=0
[   99.822525] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5537, diff=1, hw=0 hw_last=0
[   99.839107] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5538, diff=1, hw=0 hw_last=0
[   99.855685] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5539, diff=1, hw=0 hw_last=0
[   99.872267] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5540, diff=1, hw=0 hw_last=0
[   99.888840] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5541, diff=1, hw=0 hw_last=0
[   99.905418] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5542, diff=1, hw=0 hw_last=0
[   99.915251] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[   99.915367] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006e1bef3e
[   99.915454] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[   99.915527] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000082b4fa6a state to 000000006e1bef3e
[   99.915605] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[   99.915677] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 000000006e1bef3e
[   99.915757] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000082b4fa6a
[   99.915830] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[   99.915902] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[   99.915973] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[   99.916044] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[   99.916119] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[   99.916191] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[   99.916306] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[   99.916387] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[   99.916462] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 000000006e1bef3e
[   99.916539] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[   99.916614] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000006e1bef3e
[   99.916697] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[   99.916749] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[   99.916787] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006e1bef3e
[   99.916868] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000e0dcab9c to 000000006e1bef3e
[   99.916942] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006e1bef3e
[   99.917031] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006e1bef3e nonblocking
[   99.917146] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[   99.917225] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[   99.921995] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5543, diff=1, hw=0 hw_last=0
[   99.922088] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006e1bef3e
[   99.922157] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[   99.922219] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[   99.922281] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[   99.922343] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[   99.922406] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006e1bef3e
[   99.938575] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5544, diff=1, hw=0 hw_last=0
[   99.955154] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5545, diff=1, hw=0 hw_last=0
[   99.971733] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5546, diff=1, hw=0 hw_last=0
[   99.988311] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5547, diff=1, hw=0 hw_last=0
[  100.004891] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5548, diff=1, hw=0 hw_last=0
[  100.021469] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5549, diff=1, hw=0 hw_last=0
[  100.038053] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5550, diff=1, hw=0 hw_last=0
[  100.054628] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5551, diff=1, hw=0 hw_last=0
[  100.071208] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5552, diff=1, hw=0 hw_last=0
[  100.087789] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5553, diff=1, hw=0 hw_last=0
[  100.104367] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5554, diff=1, hw=0 hw_last=0
[  100.120949] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5555, diff=1, hw=0 hw_last=0
[  100.137523] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5556, diff=1, hw=0 hw_last=0
[  100.154102] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5557, diff=1, hw=0 hw_last=0
[  100.170681] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5558, diff=1, hw=0 hw_last=0
[  100.187261] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5559, diff=1, hw=0 hw_last=0
[  100.203840] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5560, diff=1, hw=0 hw_last=0
[  100.220420] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5561, diff=1, hw=0 hw_last=0
[  100.237001] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5562, diff=1, hw=0 hw_last=0
[  100.253579] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5563, diff=1, hw=0 hw_last=0
[  100.270158] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5564, diff=1, hw=0 hw_last=0
[  100.286736] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5565, diff=1, hw=0 hw_last=0
[  100.303316] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5566, diff=1, hw=0 hw_last=0
[  100.319895] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5567, diff=1, hw=0 hw_last=0
[  100.336474] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5568, diff=1, hw=0 hw_last=0
[  100.353053] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5569, diff=1, hw=0 hw_last=0
[  100.369632] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5570, diff=1, hw=0 hw_last=0
[  100.386211] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5571, diff=1, hw=0 hw_last=0
[  100.402791] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5572, diff=1, hw=0 hw_last=0
[  100.419371] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5573, diff=1, hw=0 hw_last=0
[  100.435949] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5574, diff=1, hw=0 hw_last=0
[  100.452532] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5575, diff=1, hw=0 hw_last=0
[  100.469109] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5576, diff=1, hw=0 hw_last=0
[  100.485688] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5577, diff=1, hw=0 hw_last=0
[  100.502268] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5578, diff=1, hw=0 hw_last=0
[  100.518845] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5579, diff=1, hw=0 hw_last=0
[  100.535424] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5580, diff=1, hw=0 hw_last=0
[  100.552003] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5581, diff=1, hw=0 hw_last=0
[  100.568585] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5582, diff=1, hw=0 hw_last=0
[  100.585162] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5583, diff=1, hw=0 hw_last=0
[  100.601742] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5584, diff=1, hw=0 hw_last=0
[  100.618322] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5585, diff=1, hw=0 hw_last=0
[  100.634903] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5586, diff=1, hw=0 hw_last=0
[  100.645167] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  100.645286] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 5587 to client
[  100.646591] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  100.646697] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009472d261
[  100.646782] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  100.646856] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000055579822 state to 000000009472d261
[  100.646934] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  100.647006] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000adb7ad91 state to 000000009472d261
[  100.647085] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000055579822
[  100.647162] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  100.647238] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  100.647311] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  100.647385] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  100.647461] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  100.647533] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  100.647608] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  100.647680] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  100.647752] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 000000009472d261
[  100.647826] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  100.647898] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000009472d261
[  100.647980] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  100.648024] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  100.648060] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000009472d261
[  100.648138] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000004593454f to 000000009472d261
[  100.648241] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000009472d261
[  100.648330] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  100.648407] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  100.648485] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  100.648568] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000009472d261
[  100.648645] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009472d261
[  100.648718] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  100.648792] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  100.648866] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  100.648939] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  100.649012] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009472d261
[  100.650437] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  100.651488] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5587, diff=1, hw=0 hw_last=0
[  100.668063] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5588, diff=1, hw=0 hw_last=0
[  100.684643] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5589, diff=1, hw=0 hw_last=0
[  100.701220] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5590, diff=1, hw=0 hw_last=0
[  100.717802] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5591, diff=1, hw=0 hw_last=0
[  100.734380] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5592, diff=1, hw=0 hw_last=0
[  100.750961] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5593, diff=1, hw=0 hw_last=0
[  100.767540] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5594, diff=1, hw=0 hw_last=0
[  100.784125] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5595, diff=1, hw=0 hw_last=0
[  100.800700] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5596, diff=1, hw=0 hw_last=0
[  100.817279] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5597, diff=1, hw=0 hw_last=0
[  100.833857] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5598, diff=1, hw=0 hw_last=0
[  100.850435] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5599, diff=1, hw=0 hw_last=0
[  100.867013] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5600, diff=1, hw=0 hw_last=0
[  100.877926] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  100.878045] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009472d261
[  100.878131] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  100.878205] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000055579822 state to 000000009472d261
[  100.878285] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  100.878357] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000adb7ad91 state to 000000009472d261
[  100.878438] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 0000000055579822
[  100.878512] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  100.878584] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  100.878656] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  100.878734] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  100.878809] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  100.878881] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  100.878957] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  100.879029] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  100.879101] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 000000009472d261
[  100.879176] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  100.879250] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000009472d261
[  100.879333] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  100.879381] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  100.879417] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000009472d261
[  100.879495] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000d7e48c6b to 000000009472d261
[  100.879570] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000009472d261
[  100.879658] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000009472d261 nonblocking
[  100.879778] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  100.879866] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  100.883592] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5601, diff=1, hw=0 hw_last=0
[  100.883705] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009472d261
[  100.883776] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  100.883840] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  100.883902] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  100.883965] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  100.884029] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009472d261
[  100.900173] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5602, diff=1, hw=0 hw_last=0
[  100.916749] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5603, diff=1, hw=0 hw_last=0
[  100.933327] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5604, diff=1, hw=0 hw_last=0
[  100.949905] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5605, diff=1, hw=0 hw_last=0
[  100.966486] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5606, diff=1, hw=0 hw_last=0
[  100.983063] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5607, diff=1, hw=0 hw_last=0
[  100.999645] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5608, diff=1, hw=0 hw_last=0
[  101.016222] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5609, diff=1, hw=0 hw_last=0
[  101.032802] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5610, diff=1, hw=0 hw_last=0
[  101.049386] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5611, diff=1, hw=0 hw_last=0
[  101.065960] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5612, diff=1, hw=0 hw_last=0
[  101.082538] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5613, diff=1, hw=0 hw_last=0
[  101.099117] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5614, diff=1, hw=0 hw_last=0
[  101.115697] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5615, diff=1, hw=0 hw_last=0
[  101.132275] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5616, diff=1, hw=0 hw_last=0
[  101.148854] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5617, diff=1, hw=0 hw_last=0
[  101.165434] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5618, diff=1, hw=0 hw_last=0
[  101.182012] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5619, diff=1, hw=0 hw_last=0
[  101.198594] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5620, diff=1, hw=0 hw_last=0
[  101.215172] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5621, diff=1, hw=0 hw_last=0
[  101.231752] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5622, diff=1, hw=0 hw_last=0
[  101.248330] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5623, diff=1, hw=0 hw_last=0
[  101.264910] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5624, diff=1, hw=0 hw_last=0
[  101.281488] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5625, diff=1, hw=0 hw_last=0
[  101.298067] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5626, diff=1, hw=0 hw_last=0
[  101.314646] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5627, diff=1, hw=0 hw_last=0
[  101.331225] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5628, diff=1, hw=0 hw_last=0
[  101.347804] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5629, diff=1, hw=0 hw_last=0
[  101.364386] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5630, diff=1, hw=0 hw_last=0
[  101.380965] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5631, diff=1, hw=0 hw_last=0
[  101.397543] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5632, diff=1, hw=0 hw_last=0
[  101.414125] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5633, diff=1, hw=0 hw_last=0
[  101.430703] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5634, diff=1, hw=0 hw_last=0
[  101.447286] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5635, diff=1, hw=0 hw_last=0
[  101.463860] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5636, diff=1, hw=0 hw_last=0
[  101.480439] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5637, diff=1, hw=0 hw_last=0
[  101.497018] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5638, diff=1, hw=0 hw_last=0
[  101.513598] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5639, diff=1, hw=0 hw_last=0
[  101.530178] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5640, diff=1, hw=0 hw_last=0
[  101.546756] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5641, diff=1, hw=0 hw_last=0
[  101.563335] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5642, diff=1, hw=0 hw_last=0
[  101.579915] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5643, diff=1, hw=0 hw_last=0
[  101.596497] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5644, diff=1, hw=0 hw_last=0
[  101.606329] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  101.606447] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 5645 to client
[  101.607741] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  101.607852] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008e9f664b
[  101.607945] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  101.608023] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000087081e28 state to 000000008e9f664b
[  101.608108] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  101.608180] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 000000008e9f664b
[  101.608283] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 0000000087081e28
[  101.608364] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  101.608440] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  101.608514] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  101.608588] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  101.608665] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  101.608739] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  101.608817] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  101.608890] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  101.608963] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000008e9f664b
[  101.609038] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  101.609111] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000008e9f664b
[  101.609193] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  101.609244] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  101.609280] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008e9f664b
[  101.609361] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000009472d261 to 000000008e9f664b
[  101.609435] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008e9f664b
[  101.609514] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  101.609587] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  101.609660] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  101.609742] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000008e9f664b
[  101.609818] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008e9f664b
[  101.609891] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  101.609964] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  101.610036] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  101.610108] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  101.610180] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008e9f664b
[  101.611618] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  101.613080] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5645, diff=1, hw=0 hw_last=0
[  101.629656] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5646, diff=1, hw=0 hw_last=0
[  101.646236] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5647, diff=1, hw=0 hw_last=0
[  101.662814] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5648, diff=1, hw=0 hw_last=0
[  101.679394] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5649, diff=1, hw=0 hw_last=0
[  101.695975] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5650, diff=1, hw=0 hw_last=0
[  101.712554] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5651, diff=1, hw=0 hw_last=0
[  101.729133] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5652, diff=1, hw=0 hw_last=0
[  101.745713] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5653, diff=1, hw=0 hw_last=0
[  101.762293] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5654, diff=1, hw=0 hw_last=0
[  101.778875] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5655, diff=1, hw=0 hw_last=0
[  101.795449] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5656, diff=1, hw=0 hw_last=0
[  101.812028] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5657, diff=1, hw=0 hw_last=0
[  101.828606] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5658, diff=1, hw=0 hw_last=0
[  101.839418] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  101.839537] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008e9f664b
[  101.839624] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  101.839698] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000087081e28 state to 000000008e9f664b
[  101.839777] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  101.839849] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 000000008e9f664b
[  101.839927] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000087081e28
[  101.840001] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  101.840073] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  101.840145] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  101.840256] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  101.840339] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  101.840415] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  101.840494] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  101.840568] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  101.840641] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000008e9f664b
[  101.840716] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  101.840790] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000008e9f664b
[  101.840874] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  101.840925] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  101.840962] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008e9f664b
[  101.841042] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000004593454f to 000000008e9f664b
[  101.841115] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008e9f664b
[  101.841204] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000008e9f664b nonblocking
[  101.841312] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  101.841388] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  101.845183] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5659, diff=1, hw=0 hw_last=0
[  101.845275] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008e9f664b
[  101.845348] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  101.845411] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  101.845472] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  101.845533] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  101.845596] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008e9f664b
[  101.861767] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5660, diff=1, hw=0 hw_last=0
[  101.878345] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5661, diff=1, hw=0 hw_last=0
[  101.894922] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5662, diff=1, hw=0 hw_last=0
[  101.911500] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5663, diff=1, hw=0 hw_last=0
[  101.928080] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5664, diff=1, hw=0 hw_last=0
[  101.944658] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5665, diff=1, hw=0 hw_last=0
[  101.945126] systemd-journald[214]: Data hash table of /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal has a fill level at 75.0 (2731 of 3640 items, 2097152 file size, 767 bytes per hash table item), suggesting rotation.
[  101.961247] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5666, diff=1, hw=0 hw_last=0
[  101.966614] systemd-journald[214]: /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal: Journal header limits reached or header out-of-date, rotating.
[  101.977820] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5667, diff=1, hw=0 hw_last=0
[  101.994400] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5668, diff=1, hw=0 hw_last=0
[  102.010980] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5669, diff=1, hw=0 hw_last=0
[  102.027558] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5670, diff=1, hw=0 hw_last=0
[  102.044132] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5671, diff=1, hw=0 hw_last=0
[  102.060711] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5672, diff=1, hw=0 hw_last=0
[  102.077290] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5673, diff=1, hw=0 hw_last=0
[  102.093870] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5674, diff=1, hw=0 hw_last=0
[  102.110448] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5675, diff=1, hw=0 hw_last=0
[  102.127028] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5676, diff=1, hw=0 hw_last=0
[  102.143609] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5677, diff=1, hw=0 hw_last=0
[  102.160190] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5678, diff=1, hw=0 hw_last=0
[  102.176769] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5679, diff=1, hw=0 hw_last=0
[  102.193346] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5680, diff=1, hw=0 hw_last=0
[  102.209927] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5681, diff=1, hw=0 hw_last=0
[  102.226505] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5682, diff=1, hw=0 hw_last=0
[  102.243082] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5683, diff=1, hw=0 hw_last=0
[  102.259661] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5684, diff=1, hw=0 hw_last=0
[  102.276240] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5685, diff=1, hw=0 hw_last=0
[  102.292820] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5686, diff=1, hw=0 hw_last=0
[  102.309400] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5687, diff=1, hw=0 hw_last=0
[  102.325978] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5688, diff=1, hw=0 hw_last=0
[  102.342559] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5689, diff=1, hw=0 hw_last=0
[  102.359140] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5690, diff=1, hw=0 hw_last=0
[  102.375716] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5691, diff=1, hw=0 hw_last=0
[  102.392296] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5692, diff=1, hw=0 hw_last=0
[  102.408877] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5693, diff=1, hw=0 hw_last=0
[  102.425455] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5694, diff=1, hw=0 hw_last=0
[  102.442035] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5695, diff=1, hw=0 hw_last=0
[  102.458623] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5696, diff=1, hw=0 hw_last=0
[  102.475192] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5697, diff=1, hw=0 hw_last=0
[  102.491774] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5698, diff=1, hw=0 hw_last=0
[  102.508350] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5699, diff=1, hw=0 hw_last=0
[  102.524931] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5700, diff=1, hw=0 hw_last=0
[  102.541509] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5701, diff=1, hw=0 hw_last=0
[  102.558087] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5702, diff=1, hw=0 hw_last=0
[  102.574666] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5703, diff=1, hw=0 hw_last=0
[  102.591246] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5704, diff=1, hw=0 hw_last=0
[  102.607825] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5705, diff=1, hw=0 hw_last=0
[  102.624405] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5706, diff=1, hw=0 hw_last=0
[  102.640986] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5707, diff=1, hw=0 hw_last=0
[  102.657567] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5708, diff=1, hw=0 hw_last=0
[  102.665549] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  102.665670] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 5709 to client
[  102.666978] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  102.667084] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000082174610
[  102.667168] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  102.667241] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000002cafbe1b state to 0000000082174610
[  102.667319] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  102.667390] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000e8543c49 state to 0000000082174610
[  102.667471] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 000000002cafbe1b
[  102.667546] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  102.667621] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  102.667696] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  102.667769] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  102.667845] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  102.667916] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  102.667991] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  102.668062] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  102.668134] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 0000000082174610
[  102.668237] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  102.668323] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000082174610
[  102.668413] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  102.668464] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  102.668503] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000082174610
[  102.668588] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000006e1bef3e to 0000000082174610
[  102.668662] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000082174610
[  102.668744] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  102.668819] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  102.668894] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  102.668975] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 0000000082174610
[  102.669051] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000082174610
[  102.669124] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  102.669196] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  102.669268] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  102.669341] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  102.669413] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000082174610
[  102.670859] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  102.674148] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5709, diff=1, hw=0 hw_last=0
[  102.690725] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5710, diff=1, hw=0 hw_last=0
[  102.707305] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5711, diff=1, hw=0 hw_last=0
[  102.723883] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5712, diff=1, hw=0 hw_last=0
[  102.740467] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5713, diff=1, hw=0 hw_last=0
[  102.757044] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5714, diff=1, hw=0 hw_last=0
[  102.773623] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5715, diff=1, hw=0 hw_last=0
[  102.790202] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5716, diff=1, hw=0 hw_last=0
[  102.806782] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5717, diff=1, hw=0 hw_last=0
[  102.823365] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5718, diff=1, hw=0 hw_last=0
[  102.839940] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5719, diff=1, hw=0 hw_last=0
[  102.856520] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5720, diff=1, hw=0 hw_last=0
[  102.873095] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5721, diff=1, hw=0 hw_last=0
[  102.889680] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5722, diff=1, hw=0 hw_last=0
[  102.899274] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  102.899393] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000082174610
[  102.899479] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  102.899553] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000002cafbe1b state to 0000000082174610
[  102.899632] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  102.899705] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000e8543c49 state to 0000000082174610
[  102.899785] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 000000002cafbe1b
[  102.899860] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  102.899931] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  102.900003] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  102.900074] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  102.900150] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  102.900259] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  102.900340] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  102.900415] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  102.900488] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 0000000082174610
[  102.900564] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  102.900639] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000082174610
[  102.900722] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  102.900772] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  102.900809] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000082174610
[  102.900892] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000000cc24793 to 0000000082174610
[  102.900967] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000082174610
[  102.901056] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000082174610 nonblocking
[  102.901167] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  102.901242] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  102.906255] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5723, diff=1, hw=0 hw_last=0
[  102.906354] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000082174610
[  102.906429] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  102.906492] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  102.906553] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  102.906616] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  102.906678] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000082174610
[  102.922832] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5724, diff=1, hw=0 hw_last=0
[  102.939411] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5725, diff=1, hw=0 hw_last=0
[  102.955993] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5726, diff=1, hw=0 hw_last=0
[  102.972569] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5727, diff=1, hw=0 hw_last=0
[  102.989148] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5728, diff=1, hw=0 hw_last=0
[  103.005730] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5729, diff=1, hw=0 hw_last=0
[  103.022307] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5730, diff=1, hw=0 hw_last=0
[  103.038887] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5731, diff=1, hw=0 hw_last=0
[  103.055470] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5732, diff=1, hw=0 hw_last=0
[  103.072048] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5733, diff=1, hw=0 hw_last=0
[  103.088621] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5734, diff=1, hw=0 hw_last=0
[  103.105201] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5735, diff=1, hw=0 hw_last=0
[  103.121780] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5736, diff=1, hw=0 hw_last=0
[  103.138359] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5737, diff=1, hw=0 hw_last=0
[  103.154941] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5738, diff=1, hw=0 hw_last=0
[  103.171517] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5739, diff=1, hw=0 hw_last=0
[  103.188097] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5740, diff=1, hw=0 hw_last=0
[  103.204681] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5741, diff=1, hw=0 hw_last=0
[  103.221258] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5742, diff=1, hw=0 hw_last=0
[  103.237837] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5743, diff=1, hw=0 hw_last=0
[  103.254417] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5744, diff=1, hw=0 hw_last=0
[  103.270994] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5745, diff=1, hw=0 hw_last=0
[  103.287572] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5746, diff=1, hw=0 hw_last=0
[  103.304151] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5747, diff=1, hw=0 hw_last=0
[  103.320731] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5748, diff=1, hw=0 hw_last=0
[  103.337310] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5749, diff=1, hw=0 hw_last=0
[  103.353889] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5750, diff=1, hw=0 hw_last=0
[  103.370469] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5751, diff=1, hw=0 hw_last=0
[  103.387048] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5752, diff=1, hw=0 hw_last=0
[  103.403629] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5753, diff=1, hw=0 hw_last=0
[  103.420207] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5754, diff=1, hw=0 hw_last=0
[  103.436785] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5755, diff=1, hw=0 hw_last=0
[  103.453368] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5756, diff=1, hw=0 hw_last=0
[  103.469945] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5757, diff=1, hw=0 hw_last=0
[  103.486523] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5758, diff=1, hw=0 hw_last=0
[  103.503104] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5759, diff=1, hw=0 hw_last=0
[  103.519680] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5760, diff=1, hw=0 hw_last=0
[  103.536261] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5761, diff=1, hw=0 hw_last=0
[  103.552840] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5762, diff=1, hw=0 hw_last=0
[  103.569420] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5763, diff=1, hw=0 hw_last=0
[  103.585998] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5764, diff=1, hw=0 hw_last=0
[  103.602578] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5765, diff=1, hw=0 hw_last=0
[  103.619156] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5766, diff=1, hw=0 hw_last=0
[  103.635736] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5767, diff=1, hw=0 hw_last=0
[  103.652317] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5768, diff=1, hw=0 hw_last=0
[  103.668897] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5769, diff=1, hw=0 hw_last=0
[  103.685476] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5770, diff=1, hw=0 hw_last=0
[  103.698692] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  103.698812] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 5771 to client
[  103.702062] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5771, diff=1, hw=0 hw_last=0
[  103.711097] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  103.711195] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000ace560b
[  103.711278] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  103.711352] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000215b6887 state to 000000000ace560b
[  103.711430] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  103.711502] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 000000000ace560b
[  103.711582] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000215b6887
[  103.711656] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  103.711727] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  103.711799] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  103.711870] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  103.711946] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  103.712018] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  103.712093] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  103.712165] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  103.712254] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 000000000ace560b
[  103.712333] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  103.712408] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000000ace560b
[  103.712491] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  103.712537] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  103.712573] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000ace560b
[  103.712653] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000071ef6b0b to 000000000ace560b
[  103.712727] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000ace560b
[  103.712806] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  103.712879] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  103.712953] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  103.713037] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000000ace560b
[  103.713113] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000ace560b
[  103.713186] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  103.713259] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  103.713332] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  103.713404] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  103.713477] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000ace560b
[  103.714986] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  103.718643] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5772, diff=1, hw=0 hw_last=0
[  103.735216] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5773, diff=1, hw=0 hw_last=0
[  103.751798] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5774, diff=1, hw=0 hw_last=0
[  103.768375] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5775, diff=1, hw=0 hw_last=0
[  103.784958] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5776, diff=1, hw=0 hw_last=0
[  103.801536] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5777, diff=1, hw=0 hw_last=0
[  103.818116] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5778, diff=1, hw=0 hw_last=0
[  103.834695] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5779, diff=1, hw=0 hw_last=0
[  103.851277] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5780, diff=1, hw=0 hw_last=0
[  103.867854] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5781, diff=1, hw=0 hw_last=0
[  103.884433] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5782, diff=1, hw=0 hw_last=0
[  103.901010] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5783, diff=1, hw=0 hw_last=0
[  103.917589] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5784, diff=1, hw=0 hw_last=0
[  103.934168] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5785, diff=1, hw=0 hw_last=0
[  103.943517] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  103.943632] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000ace560b
[  103.943718] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  103.943792] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000215b6887 state to 000000000ace560b
[  103.943870] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  103.943942] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 000000000ace560b
[  103.944023] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000215b6887
[  103.944097] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  103.944169] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  103.944280] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  103.944357] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  103.944436] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  103.944509] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  103.944587] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  103.944659] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  103.944732] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 000000000ace560b
[  103.944807] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  103.944882] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000000ace560b
[  103.944967] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  103.945017] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  103.945053] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000ace560b
[  103.945133] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000ab379aee to 000000000ace560b
[  103.945207] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000ace560b
[  103.945297] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000ace560b nonblocking
[  103.945416] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  103.945493] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  103.950745] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5786, diff=1, hw=0 hw_last=0
[  103.950835] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000ace560b
[  103.950912] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  103.950975] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  103.951037] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  103.951100] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  103.951163] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000ace560b
[  103.967324] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5787, diff=1, hw=0 hw_last=0
[  103.983900] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5788, diff=1, hw=0 hw_last=0
[  104.000478] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5789, diff=1, hw=0 hw_last=0
[  104.017059] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5790, diff=1, hw=0 hw_last=0
[  104.033638] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5791, diff=1, hw=0 hw_last=0
[  104.050219] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5792, diff=1, hw=0 hw_last=0
[  104.066796] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5793, diff=1, hw=0 hw_last=0
[  104.083377] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5794, diff=1, hw=0 hw_last=0
[  104.099959] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5795, diff=1, hw=0 hw_last=0
[  104.116537] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5796, diff=1, hw=0 hw_last=0
[  104.133112] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5797, diff=1, hw=0 hw_last=0
[  104.149691] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5798, diff=1, hw=0 hw_last=0
[  104.166269] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5799, diff=1, hw=0 hw_last=0
[  104.182848] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5800, diff=1, hw=0 hw_last=0
[  104.199429] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5801, diff=1, hw=0 hw_last=0
[  104.216007] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5802, diff=1, hw=0 hw_last=0
[  104.232586] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5803, diff=1, hw=0 hw_last=0
[  104.249168] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5804, diff=1, hw=0 hw_last=0
[  104.265746] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5805, diff=1, hw=0 hw_last=0
[  104.282327] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5806, diff=1, hw=0 hw_last=0
[  104.298905] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5807, diff=1, hw=0 hw_last=0
[  104.315483] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5808, diff=1, hw=0 hw_last=0
[  104.332063] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5809, diff=1, hw=0 hw_last=0
[  104.348643] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5810, diff=1, hw=0 hw_last=0
[  104.365221] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5811, diff=1, hw=0 hw_last=0
[  104.381799] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5812, diff=1, hw=0 hw_last=0
[  104.398378] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5813, diff=1, hw=0 hw_last=0
[  104.414957] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5814, diff=1, hw=0 hw_last=0
[  104.431538] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5815, diff=1, hw=0 hw_last=0
[  104.448116] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5816, diff=1, hw=0 hw_last=0
[  104.464697] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5817, diff=1, hw=0 hw_last=0
[  104.481278] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5818, diff=1, hw=0 hw_last=0
[  104.497856] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5819, diff=1, hw=0 hw_last=0
[  104.514436] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5820, diff=1, hw=0 hw_last=0
[  104.531014] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5821, diff=1, hw=0 hw_last=0
[  104.547593] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5822, diff=1, hw=0 hw_last=0
[  104.564171] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5823, diff=1, hw=0 hw_last=0
[  104.580751] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5824, diff=1, hw=0 hw_last=0
[  104.597329] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5825, diff=1, hw=0 hw_last=0
[  104.613908] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5826, diff=1, hw=0 hw_last=0
[  104.630487] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5827, diff=1, hw=0 hw_last=0
[  104.647069] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5828, diff=1, hw=0 hw_last=0
[  104.663646] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5829, diff=1, hw=0 hw_last=0
[  104.677878] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  104.677998] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 5830 to client
[  104.680233] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5830, diff=1, hw=0 hw_last=0
[  104.689281] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  104.689377] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000001477df7c
[  104.689458] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  104.689532] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000bac3ec2d state to 000000001477df7c
[  104.689609] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  104.689680] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 000000001477df7c
[  104.689760] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000bac3ec2d
[  104.689833] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  104.689905] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  104.689976] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  104.690046] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  104.690121] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  104.690192] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  104.690267] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  104.690338] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  104.690409] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000001477df7c
[  104.690483] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  104.690555] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000001477df7c
[  104.690637] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  104.690686] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  104.690722] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000001477df7c
[  104.690800] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000000ace560b to 000000001477df7c
[  104.690874] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000001477df7c
[  104.690952] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  104.691024] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  104.691096] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  104.691176] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000001477df7c
[  104.691251] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000001477df7c
[  104.691323] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  104.691396] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  104.691467] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  104.691540] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  104.691611] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000001477df7c
[  104.693113] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  104.696812] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5831, diff=1, hw=0 hw_last=0
[  104.713390] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5832, diff=1, hw=0 hw_last=0
[  104.729971] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5833, diff=1, hw=0 hw_last=0
[  104.746547] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5834, diff=1, hw=0 hw_last=0
[  104.763130] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5835, diff=1, hw=0 hw_last=0
[  104.779707] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5836, diff=1, hw=0 hw_last=0
[  104.796288] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5837, diff=1, hw=0 hw_last=0
[  104.812866] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5838, diff=1, hw=0 hw_last=0
[  104.829449] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5839, diff=1, hw=0 hw_last=0
[  104.846029] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5840, diff=1, hw=0 hw_last=0
[  104.862603] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5841, diff=1, hw=0 hw_last=0
[  104.879182] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5842, diff=1, hw=0 hw_last=0
[  104.895760] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5843, diff=1, hw=0 hw_last=0
[  104.912339] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5844, diff=1, hw=0 hw_last=0
[  104.922072] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  104.922186] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000001477df7c
[  104.922275] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  104.922349] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000bac3ec2d state to 000000001477df7c
[  104.922427] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  104.922500] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 000000001477df7c
[  104.922580] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000bac3ec2d
[  104.922655] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  104.922728] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  104.922798] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  104.922870] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  104.922946] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  104.923018] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  104.923095] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  104.923167] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  104.923238] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000001477df7c
[  104.923313] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  104.923387] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000001477df7c
[  104.923469] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  104.923519] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  104.923556] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000001477df7c
[  104.923636] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000071ef6b0b to 000000001477df7c
[  104.923710] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000001477df7c
[  104.923797] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000001477df7c nonblocking
[  104.923921] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  104.923997] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  104.928916] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5845, diff=1, hw=0 hw_last=0
[  104.929016] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000001477df7c
[  104.929084] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  104.929146] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  104.929206] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  104.929268] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  104.929330] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000001477df7c
[  104.945495] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5846, diff=1, hw=0 hw_last=0
[  104.962074] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5847, diff=1, hw=0 hw_last=0
[  104.978652] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5848, diff=1, hw=0 hw_last=0
[  104.995232] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5849, diff=1, hw=0 hw_last=0
[  105.011811] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5850, diff=1, hw=0 hw_last=0
[  105.028392] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5851, diff=1, hw=0 hw_last=0
[  105.044971] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5852, diff=1, hw=0 hw_last=0
[  105.061550] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5853, diff=1, hw=0 hw_last=0
[  105.078133] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5854, diff=1, hw=0 hw_last=0
[  105.094711] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5855, diff=1, hw=0 hw_last=0
[  105.111284] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5856, diff=1, hw=0 hw_last=0
[  105.127864] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5857, diff=1, hw=0 hw_last=0
[  105.144446] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5858, diff=1, hw=0 hw_last=0
[  105.161021] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5859, diff=1, hw=0 hw_last=0
[  105.177601] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5860, diff=1, hw=0 hw_last=0
[  105.194180] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5861, diff=1, hw=0 hw_last=0
[  105.210759] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5862, diff=1, hw=0 hw_last=0
[  105.227341] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5863, diff=1, hw=0 hw_last=0
[  105.243919] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5864, diff=1, hw=0 hw_last=0
[  105.260499] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5865, diff=1, hw=0 hw_last=0
[  105.277078] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5866, diff=1, hw=0 hw_last=0
[  105.293656] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5867, diff=1, hw=0 hw_last=0
[  105.310235] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5868, diff=1, hw=0 hw_last=0
[  105.326817] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5869, diff=1, hw=0 hw_last=0
[  105.343392] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5870, diff=1, hw=0 hw_last=0
[  105.359972] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5871, diff=1, hw=0 hw_last=0
[  105.376551] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5872, diff=1, hw=0 hw_last=0
[  105.393130] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5873, diff=1, hw=0 hw_last=0
[  105.409712] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5874, diff=1, hw=0 hw_last=0
[  105.426289] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5875, diff=1, hw=0 hw_last=0
[  105.442869] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5876, diff=1, hw=0 hw_last=0
[  105.459448] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5877, diff=1, hw=0 hw_last=0
[  105.476028] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5878, diff=1, hw=0 hw_last=0
[  105.492609] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5879, diff=1, hw=0 hw_last=0
[  105.509188] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5880, diff=1, hw=0 hw_last=0
[  105.525768] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5881, diff=1, hw=0 hw_last=0
[  105.542344] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5882, diff=1, hw=0 hw_last=0
[  105.558923] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5883, diff=1, hw=0 hw_last=0
[  105.575503] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5884, diff=1, hw=0 hw_last=0
[  105.592081] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5885, diff=1, hw=0 hw_last=0
[  105.608661] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5886, diff=1, hw=0 hw_last=0
[  105.625241] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5887, diff=1, hw=0 hw_last=0
[  105.641818] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5888, diff=1, hw=0 hw_last=0
[  105.656304] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  105.656423] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 5889 to client
[  105.658406] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5889, diff=1, hw=0 hw_last=0
[  105.667698] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  105.667794] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000029aaf162
[  105.667876] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  105.667949] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000003519e999 state to 0000000029aaf162
[  105.668025] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  105.668097] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 0000000029aaf162
[  105.668177] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 000000003519e999
[  105.668266] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  105.668340] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  105.668413] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  105.668484] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  105.668562] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  105.668633] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  105.668709] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  105.668780] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  105.668852] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 0000000029aaf162
[  105.668926] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  105.668999] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000029aaf162
[  105.669081] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  105.669133] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  105.669170] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000029aaf162
[  105.669250] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000082174610 to 0000000029aaf162
[  105.669324] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000029aaf162
[  105.669403] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  105.669477] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  105.669549] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  105.669631] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 0000000029aaf162
[  105.669706] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000029aaf162
[  105.669778] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  105.669851] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  105.669922] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  105.669995] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  105.670067] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000029aaf162
[  105.671543] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  105.674986] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5890, diff=1, hw=0 hw_last=0
[  105.691561] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5891, diff=1, hw=0 hw_last=0
[  105.708139] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5892, diff=1, hw=0 hw_last=0
[  105.724720] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5893, diff=1, hw=0 hw_last=0
[  105.741304] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5894, diff=1, hw=0 hw_last=0
[  105.757879] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5895, diff=1, hw=0 hw_last=0
[  105.774457] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5896, diff=1, hw=0 hw_last=0
[  105.791040] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5897, diff=1, hw=0 hw_last=0
[  105.807623] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5898, diff=1, hw=0 hw_last=0
[  105.824200] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5899, diff=1, hw=0 hw_last=0
[  105.840776] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5900, diff=1, hw=0 hw_last=0
[  105.857357] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5901, diff=1, hw=0 hw_last=0
[  105.873932] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5902, diff=1, hw=0 hw_last=0
[  105.890512] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5903, diff=1, hw=0 hw_last=0
[  105.900663] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  105.900776] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000029aaf162
[  105.900863] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  105.900938] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000003519e999 state to 0000000029aaf162
[  105.901017] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  105.901090] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 0000000029aaf162
[  105.901171] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 000000003519e999
[  105.901247] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  105.901318] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  105.901390] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  105.901461] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  105.901537] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  105.901609] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  105.901685] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  105.901757] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  105.901828] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 0000000029aaf162
[  105.901903] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  105.901977] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000029aaf162
[  105.902059] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  105.902108] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  105.902145] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000029aaf162
[  105.902226] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000006e1bef3e to 0000000029aaf162
[  105.902299] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000029aaf162
[  106.056301] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5913, diff=1, hw=0 hw_last=0
[  106.072882] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5914, diff=1, hw=0 hw_last=0
[  106.089457] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5915, diff=1, hw=0 hw_last=0
[  106.106035] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5916, diff=1, hw=0 hw_last=0
[  106.122614] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5917, diff=1, hw=0 hw_last=0
[  106.139193] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5918, diff=1, hw=0 hw_last=0
[  106.155773] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5919, diff=1, hw=0 hw_last=0
[  106.172352] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5920, diff=1, hw=0 hw_last=0
[  106.188931] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5921, diff=1, hw=0 hw_last=0
[  106.205510] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5922, diff=1, hw=0 hw_last=0
[  106.222093] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5923, diff=1, hw=0 hw_last=0
[  106.238669] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5924, diff=1, hw=0 hw_last=0
[  106.255249] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5925, diff=1, hw=0 hw_last=0
[  106.271828] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5926, diff=1, hw=0 hw_last=0
[  106.288409] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5927, diff=1, hw=0 hw_last=0
[  106.304988] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5928, diff=1, hw=0 hw_last=0
[  106.321565] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5929, diff=1, hw=0 hw_last=0
[  106.338144] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5930, diff=1, hw=0 hw_last=0
[  106.354724] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5931, diff=1, hw=0 hw_last=0
[  106.371303] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5932, diff=1, hw=0 hw_last=0
[  106.387883] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5933, diff=1, hw=0 hw_last=0
[  106.404462] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5934, diff=1, hw=0 hw_last=0
[  106.421041] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5935, diff=1, hw=0 hw_last=0
[  106.437619] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5936, diff=1, hw=0 hw_last=0
[  106.454198] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5937, diff=1, hw=0 hw_last=0
[  106.470778] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5938, diff=1, hw=0 hw_last=0
[  106.487358] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5939, diff=1, hw=0 hw_last=0
[  106.503936] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5940, diff=1, hw=0 hw_last=0
[  106.520516] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5941, diff=1, hw=0 hw_last=0
[  106.537099] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5942, diff=1, hw=0 hw_last=0
[  106.553675] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5943, diff=1, hw=0 hw_last=0
[  106.570255] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5944, diff=1, hw=0 hw_last=0
[  106.586832] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5945, diff=1, hw=0 hw_last=0
[  106.603413] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5946, diff=1, hw=0 hw_last=0
[  106.619992] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5947, diff=1, hw=0 hw_last=0
[  106.636571] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5948, diff=1, hw=0 hw_last=0
[  106.653154] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5949, diff=1, hw=0 hw_last=0
[  106.657655] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  106.657775] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 5950 to client
[  106.662060] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  106.662164] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000c0cf118d
[  106.662247] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  106.662321] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000fefb5c61 state to 00000000c0cf118d
[  106.662398] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  106.662471] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a743c9a8 state to 00000000c0cf118d
[  106.662551] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000fefb5c61
[  106.662625] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  106.662697] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  106.662769] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  106.662841] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  106.662916] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  106.662988] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  106.663064] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  106.663135] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  106.663207] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 00000000c0cf118d
[  106.663281] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  106.663354] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000c0cf118d
[  106.663436] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  106.663484] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  106.663521] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000c0cf118d
[  106.663601] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000008e9f664b to 00000000c0cf118d
[  106.663675] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000c0cf118d
[  106.663753] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  106.663826] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  106.663899] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  106.663980] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 00000000c0cf118d
[  106.719471] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5953, diff=1, hw=0 hw_last=0
[  106.736052] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5954, diff=1, hw=0 hw_last=0
[  106.752632] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5955, diff=1, hw=0 hw_last=0
[  106.769210] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5956, diff=1, hw=0 hw_last=0
[  106.785789] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5957, diff=1, hw=0 hw_last=0
[  106.802370] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5958, diff=1, hw=0 hw_last=0
[  106.818954] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5959, diff=1, hw=0 hw_last=0
[  106.835527] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5960, diff=1, hw=0 hw_last=0
[  106.852107] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5961, diff=1, hw=0 hw_last=0
[  106.868684] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5962, diff=1, hw=0 hw_last=0
[  106.885264] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5963, diff=1, hw=0 hw_last=0
[  106.886256] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  106.886363] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000c0cf118d
[  106.886450] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  106.886524] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000fefb5c61 state to 00000000c0cf118d
[  106.886601] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  106.886673] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a743c9a8 state to 00000000c0cf118d
[  106.886754] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000fefb5c61
[  106.886828] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  106.886899] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  106.886970] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  106.887041] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  106.887116] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  106.887187] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  106.887263] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  106.887334] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  106.887406] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 00000000c0cf118d
[  106.887481] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  106.887557] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000c0cf118d
[  106.887639] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  106.887690] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  106.887726] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000c0cf118d
[  106.887808] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000009472d261 to 00000000c0cf118d
[  106.887882] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000c0cf118d
[  106.887969] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000c0cf118d nonblocking
[  106.888091] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  106.888171] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  106.901841] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5964, diff=1, hw=0 hw_last=0
[  106.901952] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000c0cf118d
[  106.902022] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  106.902088] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  106.902150] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  106.902214] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  106.902280] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000c0cf118d
[  106.918421] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5965, diff=1, hw=0 hw_last=0
[  106.934997] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5966, diff=1, hw=0 hw_last=0
[  106.951577] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5967, diff=1, hw=0 hw_last=0
[  106.968155] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5968, diff=1, hw=0 hw_last=0
[  106.984740] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5969, diff=1, hw=0 hw_last=0
[  107.001315] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5970, diff=1, hw=0 hw_last=0
[  107.017893] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5971, diff=1, hw=0 hw_last=0
[  107.034472] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5972, diff=1, hw=0 hw_last=0
[  107.051054] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5973, diff=1, hw=0 hw_last=0
[  107.067633] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5974, diff=1, hw=0 hw_last=0
[  107.084209] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5975, diff=1, hw=0 hw_last=0
[  107.100788] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5976, diff=1, hw=0 hw_last=0
[  107.117366] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5977, diff=1, hw=0 hw_last=0
[  107.133945] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5978, diff=1, hw=0 hw_last=0
[  107.150526] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5979, diff=1, hw=0 hw_last=0
[  107.167104] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5980, diff=1, hw=0 hw_last=0
[  107.183683] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5981, diff=1, hw=0 hw_last=0
[  107.200262] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5982, diff=1, hw=0 hw_last=0
[  107.216865] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5983, diff=1, hw=0 hw_last=0
[  107.233422] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5984, diff=1, hw=0 hw_last=0
[  107.250001] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5985, diff=1, hw=0 hw_last=0
[  107.266580] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5986, diff=1, hw=0 hw_last=0
[  107.283160] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5987, diff=1, hw=0 hw_last=0
[  107.299739] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5988, diff=1, hw=0 hw_last=0
[  107.399214] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5994, diff=1, hw=0 hw_last=0
[  107.415793] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5995, diff=1, hw=0 hw_last=0
[  107.432372] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5996, diff=1, hw=0 hw_last=0
[  107.448951] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5997, diff=1, hw=0 hw_last=0
[  107.465530] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5998, diff=1, hw=0 hw_last=0
[  107.482114] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=5999, diff=1, hw=0 hw_last=0
[  107.498689] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6000, diff=1, hw=0 hw_last=0
[  107.515268] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6001, diff=1, hw=0 hw_last=0
[  107.531849] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6002, diff=1, hw=0 hw_last=0
[  107.548430] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6003, diff=1, hw=0 hw_last=0
[  107.565008] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6004, diff=1, hw=0 hw_last=0
[  107.581585] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6005, diff=1, hw=0 hw_last=0
[  107.598165] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6006, diff=1, hw=0 hw_last=0
[  107.614744] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6007, diff=1, hw=0 hw_last=0
[  107.631323] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6008, diff=1, hw=0 hw_last=0
[  107.647906] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6009, diff=1, hw=0 hw_last=0
[  107.655076] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  107.655196] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 6010 to client
[  107.657472] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  107.657573] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008a640c91
[  107.657656] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  107.657729] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000055579822 state to 000000008a640c91
[  107.657808] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  107.657880] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 000000008a640c91
[  107.657959] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 0000000055579822
[  107.658033] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  107.658105] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  107.658176] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  107.658248] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  107.658324] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  107.658396] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  107.658471] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  107.658543] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  107.658615] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000008a640c91
[  107.658689] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  107.658761] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000008a640c91
[  107.658843] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  107.658889] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  107.658926] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008a640c91
[  107.659005] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000c0cf118d to 000000008a640c91
[  107.659079] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008a640c91
[  107.659157] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  107.659230] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  107.659303] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  107.659384] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000008a640c91
[  107.659460] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008a640c91
[  107.659533] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  107.659605] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  107.659677] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  107.659749] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  107.659822] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008a640c91
[  107.661266] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  107.664486] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6010, diff=1, hw=0 hw_last=0
[  107.681063] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6011, diff=1, hw=0 hw_last=0
[  107.697644] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6012, diff=1, hw=0 hw_last=0
[  107.714224] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6013, diff=1, hw=0 hw_last=0
[  107.730803] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6014, diff=1, hw=0 hw_last=0
[  107.747382] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6015, diff=1, hw=0 hw_last=0
[  107.763963] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6016, diff=1, hw=0 hw_last=0
[  107.780540] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6017, diff=1, hw=0 hw_last=0
[  107.797120] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6018, diff=1, hw=0 hw_last=0
[  107.813706] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6019, diff=1, hw=0 hw_last=0
[  107.830280] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6020, diff=1, hw=0 hw_last=0
[  107.846857] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6021, diff=1, hw=0 hw_last=0
[  107.863436] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6022, diff=1, hw=0 hw_last=0
[  107.880014] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6023, diff=1, hw=0 hw_last=0
[  107.880796] systemd-journald[214]: Data hash table of /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal has a fill level at 75.0 (2731 of 3640 items, 2097152 file size, 767 bytes per hash table item), suggesting rotation.
[  107.881816] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  108.344231] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6051, diff=1, hw=0 hw_last=0
[  108.360809] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6052, diff=1, hw=0 hw_last=0
[  108.377386] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6053, diff=1, hw=0 hw_last=0
[  108.393967] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6054, diff=1, hw=0 hw_last=0
[  108.410547] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6055, diff=1, hw=0 hw_last=0
[  108.427124] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6056, diff=1, hw=0 hw_last=0
[  108.443704] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6057, diff=1, hw=0 hw_last=0
[  108.460282] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6058, diff=1, hw=0 hw_last=0
[  108.476862] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6059, diff=1, hw=0 hw_last=0
[  108.493441] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6060, diff=1, hw=0 hw_last=0
[  108.510021] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6061, diff=1, hw=0 hw_last=0
[  108.526600] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6062, diff=1, hw=0 hw_last=0
[  108.543181] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6063, diff=1, hw=0 hw_last=0
[  108.559759] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6064, diff=1, hw=0 hw_last=0
[  108.576338] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6065, diff=1, hw=0 hw_last=0
[  108.592917] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6066, diff=1, hw=0 hw_last=0
[  108.609495] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6067, diff=1, hw=0 hw_last=0
[  108.626077] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6068, diff=1, hw=0 hw_last=0
[  108.642653] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6069, diff=1, hw=0 hw_last=0
[  108.659233] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6070, diff=1, hw=0 hw_last=0
[  108.675813] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6071, diff=1, hw=0 hw_last=0
[  108.692393] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6072, diff=1, hw=0 hw_last=0
[  108.708973] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6073, diff=1, hw=0 hw_last=0
[  108.725550] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6074, diff=1, hw=0 hw_last=0
[  108.742129] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6075, diff=1, hw=0 hw_last=0
[  108.758716] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6076, diff=1, hw=0 hw_last=0
[  108.762100] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  108.762215] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 6077 to client
[  108.767488] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  108.767581] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006fb5b2d2
[  108.767654] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  108.767716] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000087081e28 state to 000000006fb5b2d2
[  108.767784] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  108.767845] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 000000006fb5b2d2
[  108.767914] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000087081e28
[  108.767977] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  108.768037] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  108.768097] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  108.768157] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  108.768242] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  108.768305] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  108.768371] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  108.768432] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  108.768493] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 000000006fb5b2d2
[  108.768557] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  108.768619] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000006fb5b2d2
[  108.768690] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  108.768737] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  108.768769] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006fb5b2d2
[  108.768836] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000029aaf162 to 000000006fb5b2d2
[  108.768899] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006fb5b2d2
[  108.768968] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  108.769029] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  108.769092] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  108.769162] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000006fb5b2d2
[  108.769226] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006fb5b2d2
[  108.769289] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  108.769352] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  108.769413] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  108.769474] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  108.769536] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006fb5b2d2
[  108.770995] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  108.775297] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6077, diff=1, hw=0 hw_last=0
[  108.791873] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6078, diff=1, hw=0 hw_last=0
[  108.808452] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6079, diff=1, hw=0 hw_last=0
[  108.825032] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6080, diff=1, hw=0 hw_last=0
[  108.841616] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6081, diff=1, hw=0 hw_last=0
[  108.858195] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6082, diff=1, hw=0 hw_last=0
[  108.874770] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6083, diff=1, hw=0 hw_last=0
[  109.007699] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  109.007765] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  109.007827] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006fb5b2d2
[  109.023977] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6092, diff=1, hw=0 hw_last=0
[  109.040556] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6093, diff=1, hw=0 hw_last=0
[  109.057136] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6094, diff=1, hw=0 hw_last=0
[  109.073713] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6095, diff=1, hw=0 hw_last=0
[  109.090294] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6096, diff=1, hw=0 hw_last=0
[  109.106872] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6097, diff=1, hw=0 hw_last=0
[  109.123455] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6098, diff=1, hw=0 hw_last=0
[  109.140031] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6099, diff=1, hw=0 hw_last=0
[  109.156612] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6100, diff=1, hw=0 hw_last=0
[  109.173192] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6101, diff=1, hw=0 hw_last=0
[  109.189770] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6102, diff=1, hw=0 hw_last=0
[  109.206346] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6103, diff=1, hw=0 hw_last=0
[  109.222925] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6104, diff=1, hw=0 hw_last=0
[  109.239504] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6105, diff=1, hw=0 hw_last=0
[  109.256083] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6106, diff=1, hw=0 hw_last=0
[  109.272663] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6107, diff=1, hw=0 hw_last=0
[  109.289242] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6108, diff=1, hw=0 hw_last=0
[  109.305822] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6109, diff=1, hw=0 hw_last=0
[  109.322412] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6110, diff=1, hw=0 hw_last=0
[  109.338983] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6111, diff=1, hw=0 hw_last=0
[  109.355562] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6112, diff=1, hw=0 hw_last=0
[  109.372140] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6113, diff=1, hw=0 hw_last=0
[  109.388719] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6114, diff=1, hw=0 hw_last=0
[  109.405298] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6115, diff=1, hw=0 hw_last=0
[  109.421878] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6116, diff=1, hw=0 hw_last=0
[  109.438458] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6117, diff=1, hw=0 hw_last=0
[  109.455038] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6118, diff=1, hw=0 hw_last=0
[  109.471614] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6119, diff=1, hw=0 hw_last=0
[  109.488192] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6120, diff=1, hw=0 hw_last=0
[  109.504777] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6121, diff=1, hw=0 hw_last=0
[  109.521355] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6122, diff=1, hw=0 hw_last=0
[  109.537931] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6123, diff=1, hw=0 hw_last=0
[  109.554509] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6124, diff=1, hw=0 hw_last=0
[  109.571089] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6125, diff=1, hw=0 hw_last=0
[  109.587668] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6126, diff=1, hw=0 hw_last=0
[  109.604248] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6127, diff=1, hw=0 hw_last=0
[  109.620826] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6128, diff=1, hw=0 hw_last=0
[  109.637407] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6129, diff=1, hw=0 hw_last=0
[  109.653989] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6130, diff=1, hw=0 hw_last=0
[  109.670565] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6131, diff=1, hw=0 hw_last=0
[  109.687145] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6132, diff=1, hw=0 hw_last=0
[  109.703723] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6133, diff=1, hw=0 hw_last=0
[  109.720302] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6134, diff=1, hw=0 hw_last=0
[  109.736883] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6135, diff=1, hw=0 hw_last=0
[  109.753461] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6136, diff=1, hw=0 hw_last=0
[  109.770040] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6137, diff=1, hw=0 hw_last=0
[  109.786618] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6138, diff=1, hw=0 hw_last=0
[  109.803200] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6139, diff=1, hw=0 hw_last=0
[  109.819777] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6140, diff=1, hw=0 hw_last=0
[  109.836357] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6141, diff=1, hw=0 hw_last=0
[  109.852936] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6142, diff=1, hw=0 hw_last=0
[  109.867303] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  109.867415] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 6143 to client
[  109.869525] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6143, diff=1, hw=0 hw_last=0
[  109.878684] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  109.878769] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000fde3661d
[  109.878840] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  109.878901] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000ec98bd42 state to 00000000fde3661d
[  109.878967] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  109.879767] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000fde3661d
[  109.879836] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  109.879882] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  109.879913] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000fde3661d
[  109.879981] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000001477df7c to 00000000fde3661d
[  109.880043] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000fde3661d
[  109.880110] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  109.880171] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  109.880249] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  109.880323] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 00000000fde3661d
[  109.880389] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000fde3661d
[  109.880452] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  109.880515] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  109.880576] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  109.880638] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  109.880699] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000fde3661d
[  109.882168] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  109.886102] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6144, diff=1, hw=0 hw_last=0
[  109.902677] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6145, diff=1, hw=0 hw_last=0
[  109.919260] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6146, diff=1, hw=0 hw_last=0
[  109.935838] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6147, diff=1, hw=0 hw_last=0
[  109.952420] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6148, diff=1, hw=0 hw_last=0
[  109.968998] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6149, diff=1, hw=0 hw_last=0
[  109.985576] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6150, diff=1, hw=0 hw_last=0
[  110.002157] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6151, diff=1, hw=0 hw_last=0
[  110.018742] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6152, diff=1, hw=0 hw_last=0
[  110.035315] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6153, diff=1, hw=0 hw_last=0
[  110.051894] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6154, diff=1, hw=0 hw_last=0
[  110.068474] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6155, diff=1, hw=0 hw_last=0
[  110.085050] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6156, diff=1, hw=0 hw_last=0
[  110.101628] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6157, diff=1, hw=0 hw_last=0
[  110.109944] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  110.110049] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000fde3661d
[  110.110125] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  110.110186] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000ec98bd42 state to 00000000fde3661d
[  110.110252] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  110.110313] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 00000000fde3661d
[  110.110381] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000ec98bd42
[  110.110444] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  110.110504] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  110.110564] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  110.110624] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  110.110688] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  110.110748] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  110.110812] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  110.110872] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  110.110932] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 00000000fde3661d
[  110.110995] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  110.111058] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000fde3661d
[  110.111130] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  110.111176] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  110.111208] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000fde3661d
[  110.111276] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000000ace560b to 00000000fde3661d
[  110.111338] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000fde3661d
[  110.111417] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000fde3661d nonblocking
[  110.111515] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  110.111587] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  110.118206] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6158, diff=1, hw=0 hw_last=0
[  110.118301] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000fde3661d
[  110.118378] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  110.118441] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  110.118503] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  110.118567] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  110.118629] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000fde3661d
[  110.134784] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6159, diff=1, hw=0 hw_last=0
[  110.151364] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6160, diff=1, hw=0 hw_last=0
[  110.167940] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6161, diff=1, hw=0 hw_last=0
[  110.184523] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6162, diff=1, hw=0 hw_last=0
[  110.201103] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6163, diff=1, hw=0 hw_last=0
[  110.217682] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6164, diff=1, hw=0 hw_last=0
[  110.234259] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6165, diff=1, hw=0 hw_last=0
[  110.333735] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6171, diff=1, hw=0 hw_last=0
[  110.350311] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6172, diff=1, hw=0 hw_last=0
[  110.366890] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6173, diff=1, hw=0 hw_last=0
[  110.383469] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6174, diff=1, hw=0 hw_last=0
[  110.400053] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6175, diff=1, hw=0 hw_last=0
[  110.416632] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6176, diff=1, hw=0 hw_last=0
[  110.433212] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6177, diff=1, hw=0 hw_last=0
[  110.449788] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6178, diff=1, hw=0 hw_last=0
[  110.466365] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6179, diff=1, hw=0 hw_last=0
[  110.482945] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6180, diff=1, hw=0 hw_last=0
[  110.499524] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6181, diff=1, hw=0 hw_last=0
[  110.516106] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6182, diff=1, hw=0 hw_last=0
[  110.532684] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6183, diff=1, hw=0 hw_last=0
[  110.549262] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6184, diff=1, hw=0 hw_last=0
[  110.565843] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6185, diff=1, hw=0 hw_last=0
[  110.582420] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6186, diff=1, hw=0 hw_last=0
[  110.599001] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6187, diff=1, hw=0 hw_last=0
[  110.615579] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6188, diff=1, hw=0 hw_last=0
[  110.632158] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6189, diff=1, hw=0 hw_last=0
[  110.648739] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6190, diff=1, hw=0 hw_last=0
[  110.665320] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6191, diff=1, hw=0 hw_last=0
[  110.681895] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6192, diff=1, hw=0 hw_last=0
[  110.698477] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6193, diff=1, hw=0 hw_last=0
[  110.715055] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6194, diff=1, hw=0 hw_last=0
[  110.731635] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6195, diff=1, hw=0 hw_last=0
[  110.748213] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6196, diff=1, hw=0 hw_last=0
[  110.764792] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6197, diff=1, hw=0 hw_last=0
[  110.781373] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6198, diff=1, hw=0 hw_last=0
[  110.797949] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6199, diff=1, hw=0 hw_last=0
[  110.814530] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6200, diff=1, hw=0 hw_last=0
[  110.831109] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6201, diff=1, hw=0 hw_last=0
[  110.847691] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6202, diff=1, hw=0 hw_last=0
[  110.864270] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6203, diff=1, hw=0 hw_last=0
[  110.880848] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6204, diff=1, hw=0 hw_last=0
[  110.897427] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6205, diff=1, hw=0 hw_last=0
[  110.914005] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6206, diff=1, hw=0 hw_last=0
[  110.930586] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6207, diff=1, hw=0 hw_last=0
[  110.947167] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6208, diff=1, hw=0 hw_last=0
[  110.959574] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  110.959697] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 6209 to client
[  110.963749] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6209, diff=1, hw=0 hw_last=0
[  110.972971] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  110.973066] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000eae20a14
[  110.973149] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  110.973223] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000215b6887 state to 00000000eae20a14
[  110.973300] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  110.973372] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000e8543c49 state to 00000000eae20a14
[  110.973451] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000215b6887
[  110.973526] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  110.973598] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  110.973670] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  110.973741] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  110.973816] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  110.973888] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  110.973963] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  110.974034] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  110.974107] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 00000000eae20a14
[  110.974181] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  110.974253] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000eae20a14
[  110.974336] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  110.974383] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  110.974419] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000eae20a14
[  110.974501] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000fde3661d to 00000000eae20a14
[  110.974574] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000eae20a14
[  110.974652] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  110.974724] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  111.206434] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000eae20a14
[  111.206521] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000eae20a14 nonblocking
[  111.206636] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  111.206720] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  111.212433] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6224, diff=1, hw=0 hw_last=0
[  111.212543] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000eae20a14
[  111.212614] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  111.212678] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  111.212739] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  111.212802] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  111.212866] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000eae20a14
[  111.229013] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6225, diff=1, hw=0 hw_last=0
[  111.245591] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6226, diff=1, hw=0 hw_last=0
[  111.262168] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6227, diff=1, hw=0 hw_last=0
[  111.278749] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6228, diff=1, hw=0 hw_last=0
[  111.295328] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6229, diff=1, hw=0 hw_last=0
[  111.311908] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6230, diff=1, hw=0 hw_last=0
[  111.328486] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6231, diff=1, hw=0 hw_last=0
[  111.345066] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6232, diff=1, hw=0 hw_last=0
[  111.361646] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6233, diff=1, hw=0 hw_last=0
[  111.378224] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6234, diff=1, hw=0 hw_last=0
[  111.394800] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6235, diff=1, hw=0 hw_last=0
[  111.411379] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6236, diff=1, hw=0 hw_last=0
[  111.427958] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6237, diff=1, hw=0 hw_last=0
[  111.444538] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6238, diff=1, hw=0 hw_last=0
[  111.461117] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6239, diff=1, hw=0 hw_last=0
[  111.477696] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6240, diff=1, hw=0 hw_last=0
[  111.494275] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6241, diff=1, hw=0 hw_last=0
[  111.510858] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6242, diff=1, hw=0 hw_last=0
[  111.527439] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6243, diff=1, hw=0 hw_last=0
[  111.544016] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6244, diff=1, hw=0 hw_last=0
[  111.560596] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6245, diff=1, hw=0 hw_last=0
[  111.577174] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6246, diff=1, hw=0 hw_last=0
[  111.593752] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6247, diff=1, hw=0 hw_last=0
[  111.610332] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6248, diff=1, hw=0 hw_last=0
[  111.626912] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6249, diff=1, hw=0 hw_last=0
[  111.643490] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6250, diff=1, hw=0 hw_last=0
[  111.660070] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6251, diff=1, hw=0 hw_last=0
[  111.676649] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6252, diff=1, hw=0 hw_last=0
[  111.693228] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6253, diff=1, hw=0 hw_last=0
[  111.709808] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6254, diff=1, hw=0 hw_last=0
[  111.726386] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6255, diff=1, hw=0 hw_last=0
[  111.742964] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6256, diff=1, hw=0 hw_last=0
[  111.759545] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6257, diff=1, hw=0 hw_last=0
[  111.776125] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6258, diff=1, hw=0 hw_last=0
[  111.792703] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6259, diff=1, hw=0 hw_last=0
[  111.809283] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6260, diff=1, hw=0 hw_last=0
[  111.825862] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6261, diff=1, hw=0 hw_last=0
[  111.842446] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6262, diff=1, hw=0 hw_last=0
[  111.859021] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6263, diff=1, hw=0 hw_last=0
[  111.875598] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6264, diff=1, hw=0 hw_last=0
[  111.892180] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6265, diff=1, hw=0 hw_last=0
[  111.908756] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6266, diff=1, hw=0 hw_last=0
[  111.925335] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6267, diff=1, hw=0 hw_last=0
[  111.941916] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6268, diff=1, hw=0 hw_last=0
[  111.958495] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6269, diff=1, hw=0 hw_last=0
[  111.975075] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6270, diff=1, hw=0 hw_last=0
[  111.991654] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6271, diff=1, hw=0 hw_last=0
[  112.008235] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6272, diff=1, hw=0 hw_last=0
[  112.024813] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6273, diff=1, hw=0 hw_last=0
[  112.041393] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6274, diff=1, hw=0 hw_last=0
[  112.057971] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6275, diff=1, hw=0 hw_last=0
[  112.083911] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000bac3ec2d
[  112.083986] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  112.084058] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  112.084130] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  112.084232] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  112.084320] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  112.084397] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  112.084476] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  112.084549] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  112.084623] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 000000000305e034
[  112.084699] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  112.084774] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000000305e034
[  112.084856] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  112.084905] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  112.084943] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000305e034
[  112.085025] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000006fb5b2d2 to 000000000305e034
[  112.085100] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000305e034
[  112.085179] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  112.085252] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  112.085326] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  112.085407] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000000305e034
[  112.085482] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000305e034
[  112.085555] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  112.085628] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  112.085701] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  112.085773] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  112.085846] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000305e034
[  112.087205] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  112.091133] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6277, diff=1, hw=0 hw_last=0
[  112.107716] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6278, diff=1, hw=0 hw_last=0
[  112.124292] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6279, diff=1, hw=0 hw_last=0
[  112.140874] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6280, diff=1, hw=0 hw_last=0
[  112.157453] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6281, diff=1, hw=0 hw_last=0
[  112.174032] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6282, diff=1, hw=0 hw_last=0
[  112.190608] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6283, diff=1, hw=0 hw_last=0
[  112.207188] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6284, diff=1, hw=0 hw_last=0
[  112.223768] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6285, diff=1, hw=0 hw_last=0
[  112.240349] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6286, diff=1, hw=0 hw_last=0
[  112.256927] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6287, diff=1, hw=0 hw_last=0
[  112.273506] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6288, diff=1, hw=0 hw_last=0
[  112.290083] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6289, diff=1, hw=0 hw_last=0
[  112.306662] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6290, diff=1, hw=0 hw_last=0
[  112.315039] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  112.315159] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000305e034
[  112.315245] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  112.315319] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000bac3ec2d state to 000000000305e034
[  112.315397] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  112.315470] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 000000000305e034
[  112.315550] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000bac3ec2d
[  112.315625] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  112.315697] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  112.315769] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  112.315841] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  112.315918] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  112.315991] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  112.316068] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  112.316141] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  112.316259] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 000000000305e034
[  112.316342] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  112.316420] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000000305e034
[  112.316505] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  112.316553] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  112.316594] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000305e034
[  112.316679] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000029aaf162 to 000000000305e034
[  112.316754] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000305e034
[  112.316847] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000305e034 nonblocking
[  112.316957] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  112.317028] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  112.323239] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6291, diff=1, hw=0 hw_last=0
[  112.323333] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000305e034
[  112.323410] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  112.323474] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  112.323537] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  112.323599] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  112.323662] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000305e034
[  112.754296] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6317, diff=1, hw=0 hw_last=0
[  112.770875] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6318, diff=1, hw=0 hw_last=0
[  112.787453] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6319, diff=1, hw=0 hw_last=0
[  112.804034] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6320, diff=1, hw=0 hw_last=0
[  112.820613] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6321, diff=1, hw=0 hw_last=0
[  112.837193] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6322, diff=1, hw=0 hw_last=0
[  112.853773] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6323, diff=1, hw=0 hw_last=0
[  112.870351] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6324, diff=1, hw=0 hw_last=0
[  112.886929] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6325, diff=1, hw=0 hw_last=0
[  112.903508] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6326, diff=1, hw=0 hw_last=0
[  112.920088] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6327, diff=1, hw=0 hw_last=0
[  112.936671] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6328, diff=1, hw=0 hw_last=0
[  112.953247] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6329, diff=1, hw=0 hw_last=0
[  112.969827] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6330, diff=1, hw=0 hw_last=0
[  112.986407] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6331, diff=1, hw=0 hw_last=0
[  113.002985] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6332, diff=1, hw=0 hw_last=0
[  113.019565] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6333, diff=1, hw=0 hw_last=0
[  113.036145] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6334, diff=1, hw=0 hw_last=0
[  113.052722] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6335, diff=1, hw=0 hw_last=0
[  113.067401] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  113.067520] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 6336 to client
[  113.069307] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6336, diff=1, hw=0 hw_last=0
[  113.078810] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  113.078905] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006e1bef3e
[  113.078989] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  113.079062] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000082b4fa6a state to 000000006e1bef3e
[  113.079142] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  113.079215] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000adb7ad91 state to 000000006e1bef3e
[  113.079295] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000082b4fa6a
[  113.079369] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  113.079440] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  113.079511] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  113.079583] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  113.079658] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  113.079729] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  113.079805] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  113.079876] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  113.079948] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 000000006e1bef3e
[  113.080022] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  113.080094] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000006e1bef3e
[  113.080176] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  113.080245] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  113.080284] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006e1bef3e
[  113.080367] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000007967e7cb to 000000006e1bef3e
[  113.080443] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006e1bef3e
[  113.080523] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  113.080597] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  113.080671] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  113.080755] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000006e1bef3e
[  113.080830] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006e1bef3e
[  113.080903] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  113.080976] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  113.081049] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  113.081121] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  113.081194] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006e1bef3e
[  113.082663] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  113.085886] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6337, diff=1, hw=0 hw_last=0
[  113.102463] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6338, diff=1, hw=0 hw_last=0
[  113.119046] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6339, diff=1, hw=0 hw_last=0
[  113.135621] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6340, diff=1, hw=0 hw_last=0
[  113.152210] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6341, diff=1, hw=0 hw_last=0
[  113.168781] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6342, diff=1, hw=0 hw_last=0
[  113.185363] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6343, diff=1, hw=0 hw_last=0
[  113.201940] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6344, diff=1, hw=0 hw_last=0
[  113.218522] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6345, diff=1, hw=0 hw_last=0
[  113.235102] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6346, diff=1, hw=0 hw_last=0
[  113.251677] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6347, diff=1, hw=0 hw_last=0
[  113.268258] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6348, diff=1, hw=0 hw_last=0
[  113.284833] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6349, diff=1, hw=0 hw_last=0
[  113.417466] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6357, diff=1, hw=0 hw_last=0
[  113.434043] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6358, diff=1, hw=0 hw_last=0
[  113.450624] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6359, diff=1, hw=0 hw_last=0
[  113.467203] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6360, diff=1, hw=0 hw_last=0
[  113.483783] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6361, diff=1, hw=0 hw_last=0
[  113.500359] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6362, diff=1, hw=0 hw_last=0
[  113.516940] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6363, diff=1, hw=0 hw_last=0
[  113.533517] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6364, diff=1, hw=0 hw_last=0
[  113.550096] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6365, diff=1, hw=0 hw_last=0
[  113.566675] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6366, diff=1, hw=0 hw_last=0
[  113.583254] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6367, diff=1, hw=0 hw_last=0
[  113.599833] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6368, diff=1, hw=0 hw_last=0
[  113.616413] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6369, diff=1, hw=0 hw_last=0
[  113.632995] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6370, diff=1, hw=0 hw_last=0
[  113.649575] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6371, diff=1, hw=0 hw_last=0
[  113.666151] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6372, diff=1, hw=0 hw_last=0
[  113.682730] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6373, diff=1, hw=0 hw_last=0
[  113.699313] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6374, diff=1, hw=0 hw_last=0
[  113.715889] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6375, diff=1, hw=0 hw_last=0
[  113.732470] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6376, diff=1, hw=0 hw_last=0
[  113.749047] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6377, diff=1, hw=0 hw_last=0
[  113.765625] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6378, diff=1, hw=0 hw_last=0
[  113.782206] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6379, diff=1, hw=0 hw_last=0
[  113.798784] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6380, diff=1, hw=0 hw_last=0
[  113.815365] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6381, diff=1, hw=0 hw_last=0
[  113.831943] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6382, diff=1, hw=0 hw_last=0
[  113.848526] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6383, diff=1, hw=0 hw_last=0
[  113.865102] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6384, diff=1, hw=0 hw_last=0
[  113.881682] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6385, diff=1, hw=0 hw_last=0
[  113.882044] systemd-journald[214]: Data hash table of /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal has a fill level at 75.1 (2732 of 3640 items, 2097152 file size, 767 bytes per hash table item), suggesting rotation.
[  113.898265] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6386, diff=1, hw=0 hw_last=0
[  113.907940] systemd-journald[214]: /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal: Journal header limits reached or header out-of-date, rotating.
[  113.914839] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6387, diff=1, hw=0 hw_last=0
[  113.931421] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6388, diff=1, hw=0 hw_last=0
[  113.948000] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6389, diff=1, hw=0 hw_last=0
[  113.964579] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6390, diff=1, hw=0 hw_last=0
[  113.981157] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6391, diff=1, hw=0 hw_last=0
[  113.997738] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6392, diff=1, hw=0 hw_last=0
[  114.014315] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6393, diff=1, hw=0 hw_last=0
[  114.030894] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6394, diff=1, hw=0 hw_last=0
[  114.047481] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6395, diff=1, hw=0 hw_last=0
[  114.049789] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  114.049911] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 6396 to client
[  114.057186] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  114.057292] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008a640c91
[  114.057374] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  114.057448] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000fefb5c61 state to 000000008a640c91
[  114.057526] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  114.057598] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 000000008a640c91
[  114.057677] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000fefb5c61
[  114.057751] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  114.057823] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  114.057894] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  114.057966] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  114.058041] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  114.058113] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  114.058189] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  114.058263] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  114.058335] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000008a640c91
[  114.058409] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  114.058481] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000008a640c91
[  114.058563] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  114.058611] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  114.058648] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008a640c91
[  114.058728] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000008e9f664b to 000000008a640c91
[  114.059544] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008a640c91
[  114.061001] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  114.064061] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6396, diff=1, hw=0 hw_last=0
[  114.080636] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6397, diff=1, hw=0 hw_last=0
[  114.097216] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6398, diff=1, hw=0 hw_last=0
[  114.113796] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6399, diff=1, hw=0 hw_last=0
[  114.130375] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6400, diff=1, hw=0 hw_last=0
[  114.146954] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6401, diff=1, hw=0 hw_last=0
[  114.163533] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6402, diff=1, hw=0 hw_last=0
[  114.180113] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6403, diff=1, hw=0 hw_last=0
[  114.196693] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6404, diff=1, hw=0 hw_last=0
[  114.213277] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6405, diff=1, hw=0 hw_last=0
[  114.229852] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6406, diff=1, hw=0 hw_last=0
[  114.246429] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6407, diff=1, hw=0 hw_last=0
[  114.263007] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6408, diff=1, hw=0 hw_last=0
[  114.279586] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6409, diff=1, hw=0 hw_last=0
[  114.288910] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  114.289026] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008a640c91
[  114.289114] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  114.289188] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000fefb5c61 state to 000000008a640c91
[  114.289265] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  114.289337] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 000000008a640c91
[  114.289416] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000fefb5c61
[  114.289490] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  114.289561] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  114.289632] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  114.289703] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  114.289779] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  114.289849] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  114.289925] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  114.289996] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  114.290068] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000008a640c91
[  114.290142] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  114.290216] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000008a640c91
[  114.290298] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  114.290348] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  114.290384] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008a640c91
[  114.290463] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000c0cf118d to 000000008a640c91
[  114.290536] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008a640c91
[  114.290624] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000008a640c91 nonblocking
[  114.290745] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  114.290824] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  114.296164] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6410, diff=1, hw=0 hw_last=0
[  114.296260] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008a640c91
[  114.296330] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  114.296395] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  114.296456] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  114.296518] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  114.296582] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008a640c91
[  114.305442] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  114.305533] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006e1bef3e
[  114.305611] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  114.305683] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000055579822 state to 000000006e1bef3e
[  114.305758] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  114.305829] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000e8543c49 state to 000000006e1bef3e
[  114.305906] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000055579822
[  114.305979] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  114.306050] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  114.306121] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  114.306192] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  114.306265] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  114.306336] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  114.306409] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  114.306480] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  114.306551] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 000000006e1bef3e
[  114.306625] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  114.306696] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000006e1bef3e
[  114.306774] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  114.306814] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  114.306850] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006e1bef3e
[  114.306925] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000071ef6b0b to 000000006e1bef3e
[  114.306999] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006e1bef3e
[  114.307075] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  114.307148] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  114.307220] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  114.307729] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006e1bef3e
[  114.308231] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  114.308328] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006e1bef3e
[  114.308406] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  114.308479] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000055579822 state to 000000006e1bef3e
[  114.308555] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  114.308628] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000e8543c49 state to 000000006e1bef3e
[  114.308705] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000055579822
[  114.308779] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  114.308851] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  114.308922] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  114.308994] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  114.309066] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  114.309137] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  114.309210] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  114.309281] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  114.309353] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 000000006e1bef3e
[  114.309427] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  114.309500] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000006e1bef3e
[  114.309577] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  114.309620] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  114.309655] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006e1bef3e
[  114.309731] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000082174610 to 000000006e1bef3e
[  114.309805] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006e1bef3e
[  114.309884] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006e1bef3e nonblocking
[  114.309986] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  114.310065] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  114.312744] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6411, diff=1, hw=0 hw_last=0
[  114.312828] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006e1bef3e
[  114.312891] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  114.312953] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  114.313015] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  114.313076] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  114.313139] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006e1bef3e
[  114.329322] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6412, diff=1, hw=0 hw_last=0
[  114.345902] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6413, diff=1, hw=0 hw_last=0
[  114.362481] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6414, diff=1, hw=0 hw_last=0
[  114.379058] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6415, diff=1, hw=0 hw_last=0
[  114.395641] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6416, diff=1, hw=0 hw_last=0
[  114.412217] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6417, diff=1, hw=0 hw_last=0
[  114.428798] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6418, diff=1, hw=0 hw_last=0
[  114.445379] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6419, diff=1, hw=0 hw_last=0
[  114.461960] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6420, diff=1, hw=0 hw_last=0
[  114.478533] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6421, diff=1, hw=0 hw_last=0
[  114.495111] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6422, diff=1, hw=0 hw_last=0
[  114.511690] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6423, diff=1, hw=0 hw_last=0
[  114.528269] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6424, diff=1, hw=0 hw_last=0
[  114.544851] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6425, diff=1, hw=0 hw_last=0
[  114.561428] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6426, diff=1, hw=0 hw_last=0
[  114.578007] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6427, diff=1, hw=0 hw_last=0
[  114.594586] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6428, diff=1, hw=0 hw_last=0
[  114.611167] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6429, diff=1, hw=0 hw_last=0
[  114.627746] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6430, diff=1, hw=0 hw_last=0
[  114.644324] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6431, diff=1, hw=0 hw_last=0
[  114.660905] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6432, diff=1, hw=0 hw_last=0
[  114.677485] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6433, diff=1, hw=0 hw_last=0
[  114.694064] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6434, diff=1, hw=0 hw_last=0
[  114.710641] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6435, diff=1, hw=0 hw_last=0
[  114.727220] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6436, diff=1, hw=0 hw_last=0
[  114.743800] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6437, diff=1, hw=0 hw_last=0
[  114.760378] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6438, diff=1, hw=0 hw_last=0
[  114.776961] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6439, diff=1, hw=0 hw_last=0
[  114.793539] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6440, diff=1, hw=0 hw_last=0
[  114.810116] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6441, diff=1, hw=0 hw_last=0
[  114.826695] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6442, diff=1, hw=0 hw_last=0
[  114.843275] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6443, diff=1, hw=0 hw_last=0
[  114.859854] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6444, diff=1, hw=0 hw_last=0
[  114.876436] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6445, diff=1, hw=0 hw_last=0
[  115.086406] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  115.086478] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  115.086552] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  115.086633] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000000305e034
[  115.086707] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000305e034
[  115.086779] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  115.086851] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  115.086923] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  115.086995] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  115.087067] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000305e034
[  115.088450] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  115.091974] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6458, diff=1, hw=0 hw_last=0
[  115.108551] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6459, diff=1, hw=0 hw_last=0
[  115.125125] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6460, diff=1, hw=0 hw_last=0
[  115.141707] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6461, diff=1, hw=0 hw_last=0
[  115.158289] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6462, diff=1, hw=0 hw_last=0
[  115.174867] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6463, diff=1, hw=0 hw_last=0
[  115.191446] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6464, diff=1, hw=0 hw_last=0
[  115.208030] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6465, diff=1, hw=0 hw_last=0
[  115.224605] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6466, diff=1, hw=0 hw_last=0
[  115.241187] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6467, diff=1, hw=0 hw_last=0
[  115.257764] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6468, diff=1, hw=0 hw_last=0
[  115.274343] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6469, diff=1, hw=0 hw_last=0
[  115.290919] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6470, diff=1, hw=0 hw_last=0
[  115.307500] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6471, diff=1, hw=0 hw_last=0
[  115.316111] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  115.316243] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000305e034
[  115.316330] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  115.316406] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000002cafbe1b state to 000000000305e034
[  115.316484] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  115.316556] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 000000000305e034
[  115.316638] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 000000002cafbe1b
[  115.316712] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  115.316784] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  115.316856] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  115.316928] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  115.317002] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  115.317075] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  115.317150] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  115.317221] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  115.317293] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 000000000305e034
[  115.317368] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  115.317442] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000000305e034
[  115.317524] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  115.317574] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  115.317610] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000305e034
[  115.317690] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000ab379aee to 000000000305e034
[  115.317764] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000305e034
[  115.317853] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000305e034 nonblocking
[  115.317966] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  115.318041] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  115.324074] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6472, diff=1, hw=0 hw_last=0
[  115.324182] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000305e034
[  115.324268] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  115.324341] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  115.324405] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  115.324467] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  115.324532] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000305e034
[  115.340654] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6473, diff=1, hw=0 hw_last=0
[  115.357230] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6474, diff=1, hw=0 hw_last=0
[  115.373809] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6475, diff=1, hw=0 hw_last=0
[  115.390389] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6476, diff=1, hw=0 hw_last=0
[  115.406969] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6477, diff=1, hw=0 hw_last=0
[  115.423549] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6478, diff=1, hw=0 hw_last=0
[  115.440125] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6479, diff=1, hw=0 hw_last=0
[  115.456707] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6480, diff=1, hw=0 hw_last=0
[  115.473286] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6481, diff=1, hw=0 hw_last=0
[  115.489866] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6482, diff=1, hw=0 hw_last=0
[  115.506442] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6483, diff=1, hw=0 hw_last=0
[  115.523021] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6484, diff=1, hw=0 hw_last=0
[  115.539603] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6485, diff=1, hw=0 hw_last=0
[  115.672234] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6493, diff=1, hw=0 hw_last=0
[  115.688813] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6494, diff=1, hw=0 hw_last=0
[  115.705395] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6495, diff=1, hw=0 hw_last=0
[  115.721972] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6496, diff=1, hw=0 hw_last=0
[  115.738551] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6497, diff=1, hw=0 hw_last=0
[  115.755132] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6498, diff=1, hw=0 hw_last=0
[  115.771709] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6499, diff=1, hw=0 hw_last=0
[  115.788289] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6500, diff=1, hw=0 hw_last=0
[  115.804869] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6501, diff=1, hw=0 hw_last=0
[  115.821448] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6502, diff=1, hw=0 hw_last=0
[  115.838025] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6503, diff=1, hw=0 hw_last=0
[  115.854605] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6504, diff=1, hw=0 hw_last=0
[  115.871184] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6505, diff=1, hw=0 hw_last=0
[  115.887771] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6506, diff=1, hw=0 hw_last=0
[  115.904345] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6507, diff=1, hw=0 hw_last=0
[  115.920922] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6508, diff=1, hw=0 hw_last=0
[  115.937502] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6509, diff=1, hw=0 hw_last=0
[  115.954082] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6510, diff=1, hw=0 hw_last=0
[  115.970663] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6511, diff=1, hw=0 hw_last=0
[  115.987240] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6512, diff=1, hw=0 hw_last=0
[  116.003818] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6513, diff=1, hw=0 hw_last=0
[  116.020399] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6514, diff=1, hw=0 hw_last=0
[  116.036977] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6515, diff=1, hw=0 hw_last=0
[  116.053556] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6516, diff=1, hw=0 hw_last=0
[  116.070135] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6517, diff=1, hw=0 hw_last=0
[  116.086714] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6518, diff=1, hw=0 hw_last=0
[  116.103301] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6519, diff=1, hw=0 hw_last=0
[  116.105373] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  116.105487] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 6520 to client
[  116.112749] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  116.112841] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000eae20a14
[  116.112914] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  116.112976] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000ec98bd42 state to 00000000eae20a14
[  116.113042] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  116.113103] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 00000000eae20a14
[  116.113171] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000ec98bd42
[  116.113235] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  116.113295] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  116.113355] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  116.113417] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  116.113481] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  116.113542] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  116.113608] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  116.113669] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  116.113729] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 00000000eae20a14
[  116.113793] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  116.113854] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000eae20a14
[  116.113924] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  116.113968] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  116.114000] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000eae20a14
[  116.114067] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000001477df7c to 00000000eae20a14
[  116.114129] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000eae20a14
[  116.114196] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  116.114258] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  116.114320] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  116.114392] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 00000000eae20a14
[  116.114455] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000eae20a14
[  116.114517] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  116.114578] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  116.114639] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  116.114700] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  116.114761] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000eae20a14
[  116.116102] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  116.119880] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6520, diff=1, hw=0 hw_last=0
[  116.136457] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6521, diff=1, hw=0 hw_last=0
[  116.153034] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6522, diff=1, hw=0 hw_last=0
[  116.169618] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6523, diff=1, hw=0 hw_last=0
[  116.186196] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6524, diff=1, hw=0 hw_last=0
[  116.202774] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6525, diff=1, hw=0 hw_last=0
[  116.336481] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  116.336544] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000ec98bd42 state to 00000000eae20a14
[  116.336611] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  116.336672] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 00000000eae20a14
[  116.336740] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000ec98bd42
[  116.336803] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  116.336863] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  116.336923] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  116.336983] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  116.337046] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  116.337107] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  116.337170] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  116.337231] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  116.337291] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 00000000eae20a14
[  116.337354] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  116.337416] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000eae20a14
[  116.337486] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  116.337532] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  116.337564] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000eae20a14
[  116.337632] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000fde3661d to 00000000eae20a14
[  116.337694] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000eae20a14
[  116.337770] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000eae20a14 nonblocking
[  116.337871] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  116.337947] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  116.351985] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6534, diff=1, hw=0 hw_last=0
[  116.352099] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000eae20a14
[  116.352169] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  116.352243] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  116.352307] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  116.352370] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  116.352434] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000eae20a14
[  116.368564] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6535, diff=1, hw=0 hw_last=0
[  116.385141] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6536, diff=1, hw=0 hw_last=0
[  116.401721] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6537, diff=1, hw=0 hw_last=0
[  116.418299] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6538, diff=1, hw=0 hw_last=0
[  116.434877] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6539, diff=1, hw=0 hw_last=0
[  116.451459] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6540, diff=1, hw=0 hw_last=0
[  116.468037] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6541, diff=1, hw=0 hw_last=0
[  116.484617] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6542, diff=1, hw=0 hw_last=0
[  116.501198] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6543, diff=1, hw=0 hw_last=0
[  116.517779] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6544, diff=1, hw=0 hw_last=0
[  116.534352] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6545, diff=1, hw=0 hw_last=0
[  116.550933] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6546, diff=1, hw=0 hw_last=0
[  116.567510] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6547, diff=1, hw=0 hw_last=0
[  116.584089] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6548, diff=1, hw=0 hw_last=0
[  116.600669] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6549, diff=1, hw=0 hw_last=0
[  116.617248] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6550, diff=1, hw=0 hw_last=0
[  116.633827] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6551, diff=1, hw=0 hw_last=0
[  116.650407] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6552, diff=1, hw=0 hw_last=0
[  116.666988] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6553, diff=1, hw=0 hw_last=0
[  116.683566] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6554, diff=1, hw=0 hw_last=0
[  116.700145] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6555, diff=1, hw=0 hw_last=0
[  116.716723] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6556, diff=1, hw=0 hw_last=0
[  116.733303] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6557, diff=1, hw=0 hw_last=0
[  116.749882] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6558, diff=1, hw=0 hw_last=0
[  116.766465] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6559, diff=1, hw=0 hw_last=0
[  116.783041] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6560, diff=1, hw=0 hw_last=0
[  116.799619] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6561, diff=1, hw=0 hw_last=0
[  116.816200] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6562, diff=1, hw=0 hw_last=0
[  116.832778] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6563, diff=1, hw=0 hw_last=0
[  116.849357] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6564, diff=1, hw=0 hw_last=0
[  116.865936] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6565, diff=1, hw=0 hw_last=0
[  116.882521] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6566, diff=1, hw=0 hw_last=0
[  116.899095] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6567, diff=1, hw=0 hw_last=0
[  116.915674] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6568, diff=1, hw=0 hw_last=0
[  116.932254] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6569, diff=1, hw=0 hw_last=0
[  116.948833] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6570, diff=1, hw=0 hw_last=0
[  117.330492] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000215b6887 state to 000000000305e034
[  117.330560] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  117.330622] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 000000000305e034
[  117.330693] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000215b6887
[  117.330758] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  117.330819] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  117.330882] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  117.330944] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  117.331009] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  117.331069] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  117.331134] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  117.331195] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  117.331257] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 000000000305e034
[  117.331321] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  117.331384] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000000305e034
[  117.331457] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  117.331502] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  117.331535] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000305e034
[  117.331605] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000006fb5b2d2 to 000000000305e034
[  117.331668] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000305e034
[  117.331746] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000305e034 nonblocking
[  117.331848] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  117.331933] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  117.346736] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6594, diff=1, hw=0 hw_last=0
[  117.346862] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000305e034
[  117.346941] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  117.347016] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  117.347090] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  117.347166] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  117.347242] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000305e034
[  117.363315] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6595, diff=1, hw=0 hw_last=0
[  117.379894] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6596, diff=1, hw=0 hw_last=0
[  117.396471] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6597, diff=1, hw=0 hw_last=0
[  117.413052] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6598, diff=1, hw=0 hw_last=0
[  117.429631] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6599, diff=1, hw=0 hw_last=0
[  117.446211] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6600, diff=1, hw=0 hw_last=0
[  117.462788] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6601, diff=1, hw=0 hw_last=0
[  117.479370] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6602, diff=1, hw=0 hw_last=0
[  117.495950] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6603, diff=1, hw=0 hw_last=0
[  117.512529] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6604, diff=1, hw=0 hw_last=0
[  117.529105] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6605, diff=1, hw=0 hw_last=0
[  117.545687] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6606, diff=1, hw=0 hw_last=0
[  117.562263] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6607, diff=1, hw=0 hw_last=0
[  117.578843] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6608, diff=1, hw=0 hw_last=0
[  117.595421] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6609, diff=1, hw=0 hw_last=0
[  117.612000] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6610, diff=1, hw=0 hw_last=0
[  117.628579] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6611, diff=1, hw=0 hw_last=0
[  117.645161] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6612, diff=1, hw=0 hw_last=0
[  117.661740] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6613, diff=1, hw=0 hw_last=0
[  117.678319] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6614, diff=1, hw=0 hw_last=0
[  117.694896] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6615, diff=1, hw=0 hw_last=0
[  117.711480] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6616, diff=1, hw=0 hw_last=0
[  117.728057] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6617, diff=1, hw=0 hw_last=0
[  117.744641] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6618, diff=1, hw=0 hw_last=0
[  117.761216] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6619, diff=1, hw=0 hw_last=0
[  117.777795] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6620, diff=1, hw=0 hw_last=0
[  117.794373] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6621, diff=1, hw=0 hw_last=0
[  117.810952] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6622, diff=1, hw=0 hw_last=0
[  117.827530] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6623, diff=1, hw=0 hw_last=0
[  117.844109] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6624, diff=1, hw=0 hw_last=0
[  117.860688] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6625, diff=1, hw=0 hw_last=0
[  117.877269] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6626, diff=1, hw=0 hw_last=0
[  117.893848] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6627, diff=1, hw=0 hw_last=0
[  117.910427] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6628, diff=1, hw=0 hw_last=0
[  117.927006] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6629, diff=1, hw=0 hw_last=0
[  117.943585] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6630, diff=1, hw=0 hw_last=0
[  118.087283] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  118.087344] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  118.087405] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006e1bef3e
[  118.088850] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  118.092803] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6639, diff=1, hw=0 hw_last=0
[  118.109381] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6640, diff=1, hw=0 hw_last=0
[  118.125960] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6641, diff=1, hw=0 hw_last=0
[  118.142539] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6642, diff=1, hw=0 hw_last=0
[  118.159122] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6643, diff=1, hw=0 hw_last=0
[  118.175699] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6644, diff=1, hw=0 hw_last=0
[  118.192282] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6645, diff=1, hw=0 hw_last=0
[  118.208860] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6646, diff=1, hw=0 hw_last=0
[  118.225440] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6647, diff=1, hw=0 hw_last=0
[  118.242027] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6648, diff=1, hw=0 hw_last=0
[  118.258595] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6649, diff=1, hw=0 hw_last=0
[  118.275176] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6650, diff=1, hw=0 hw_last=0
[  118.291751] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6651, diff=1, hw=0 hw_last=0
[  118.308333] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6652, diff=1, hw=0 hw_last=0
[  118.316615] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  118.316718] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000004593454f
[  118.316795] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  118.316857] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000003519e999 state to 000000004593454f
[  118.316924] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  118.316985] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a743c9a8 state to 000000004593454f
[  118.317055] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 000000003519e999
[  118.317119] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  118.317179] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  118.317239] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  118.317300] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  118.317364] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  118.317424] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  118.317489] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  118.317550] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  118.317611] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 000000004593454f
[  118.317674] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  118.317736] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000004593454f
[  118.317808] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  118.317853] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  118.317885] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000004593454f
[  118.317952] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000008a640c91 to 000000004593454f
[  118.318015] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000004593454f
[  118.318091] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000004593454f nonblocking
[  118.318196] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  118.318275] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  118.324909] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6653, diff=1, hw=0 hw_last=0
[  118.325010] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000004593454f
[  118.325081] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  118.325144] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  118.325206] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  118.325269] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  118.325334] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000004593454f
[  118.341488] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6654, diff=1, hw=0 hw_last=0
[  118.358067] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6655, diff=1, hw=0 hw_last=0
[  118.374647] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6656, diff=1, hw=0 hw_last=0
[  118.391224] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6657, diff=1, hw=0 hw_last=0
[  118.407805] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6658, diff=1, hw=0 hw_last=0
[  118.424385] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6659, diff=1, hw=0 hw_last=0
[  118.440962] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6660, diff=1, hw=0 hw_last=0
[  118.457543] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6661, diff=1, hw=0 hw_last=0
[  118.474123] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6662, diff=1, hw=0 hw_last=0
[  118.490704] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6663, diff=1, hw=0 hw_last=0
[  118.507278] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6664, diff=1, hw=0 hw_last=0
[  118.523857] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6665, diff=1, hw=0 hw_last=0
[  118.540437] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6666, diff=1, hw=0 hw_last=0
[  118.557015] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6667, diff=1, hw=0 hw_last=0
[  118.573594] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6668, diff=1, hw=0 hw_last=0
[  118.590173] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6669, diff=1, hw=0 hw_last=0
[  118.606752] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6670, diff=1, hw=0 hw_last=0
[  118.623335] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6671, diff=1, hw=0 hw_last=0
[  118.639914] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6672, diff=1, hw=0 hw_last=0
[  118.656494] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6673, diff=1, hw=0 hw_last=0
[  118.673070] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6674, diff=1, hw=0 hw_last=0
[  118.689649] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6675, diff=1, hw=0 hw_last=0
[  118.706228] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6676, diff=1, hw=0 hw_last=0
[  118.722807] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6677, diff=1, hw=0 hw_last=0
[  118.739387] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6678, diff=1, hw=0 hw_last=0
[  118.755965] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6679, diff=1, hw=0 hw_last=0
[  118.772547] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6680, diff=1, hw=0 hw_last=0
[  118.789125] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6681, diff=1, hw=0 hw_last=0
[  118.805704] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6682, diff=1, hw=0 hw_last=0
[  118.822283] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6683, diff=1, hw=0 hw_last=0
[  118.838862] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6684, diff=1, hw=0 hw_last=0
[  118.855442] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6685, diff=1, hw=0 hw_last=0
[  118.872023] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6686, diff=1, hw=0 hw_last=0
[  118.888601] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6687, diff=1, hw=0 hw_last=0
[  118.905179] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6688, diff=1, hw=0 hw_last=0
[  118.921760] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6689, diff=1, hw=0 hw_last=0
[  118.938338] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6690, diff=1, hw=0 hw_last=0
[  118.954916] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6691, diff=1, hw=0 hw_last=0
[  118.971495] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6692, diff=1, hw=0 hw_last=0
[  118.988075] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6693, diff=1, hw=0 hw_last=0
[  119.004655] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6694, diff=1, hw=0 hw_last=0
[  119.021232] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6695, diff=1, hw=0 hw_last=0
[  119.037812] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6696, diff=1, hw=0 hw_last=0
[  119.054391] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6697, diff=1, hw=0 hw_last=0
[  119.070971] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6698, diff=1, hw=0 hw_last=0
[  119.087551] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6699, diff=1, hw=0 hw_last=0
[  119.104129] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6700, diff=1, hw=0 hw_last=0
[  119.120711] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6701, diff=1, hw=0 hw_last=0
[  119.137294] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6702, diff=1, hw=0 hw_last=0
[  119.142572] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  119.142685] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 6703 to client
[  119.146954] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  119.147047] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000c0cf118d
[  119.147119] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  119.147181] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000082b4fa6a state to 00000000c0cf118d
[  119.147248] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  119.147308] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 00000000c0cf118d
[  119.147376] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000082b4fa6a
[  119.147439] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  119.147499] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  119.147559] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  119.147619] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  119.147684] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  119.147744] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  119.147808] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  119.147869] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  119.147930] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 00000000c0cf118d
[  119.147993] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  119.148054] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000c0cf118d
[  119.148125] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  119.148196] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  119.148231] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000c0cf118d
[  119.148305] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000004593454f to 00000000c0cf118d
[  119.148370] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000c0cf118d
[  119.148438] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  119.148499] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  119.148562] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  119.148633] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 00000000c0cf118d
[  119.148698] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000c0cf118d
[  119.148761] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  119.148822] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  119.148883] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  119.148944] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  119.149006] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000c0cf118d
[  119.150437] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  119.153874] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6703, diff=1, hw=0 hw_last=0
[  119.155325] systemd-journald[214]: Data hash table of /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal has a fill level at 75.0 (2731 of 3640 items, 2097152 file size, 767 bytes per hash table item), suggesting rotation.
[  119.319668] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6713, diff=1, hw=0 hw_last=0
[  119.336247] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6714, diff=1, hw=0 hw_last=0
[  119.352822] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6715, diff=1, hw=0 hw_last=0
[  119.369404] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6716, diff=1, hw=0 hw_last=0
[  119.378601] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  119.378706] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000c0cf118d
[  119.378781] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  119.378842] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000082b4fa6a state to 00000000c0cf118d
[  119.378908] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  119.378968] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 00000000c0cf118d
[  119.379037] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 0000000082b4fa6a
[  119.379100] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  119.379159] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  119.379219] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  119.379279] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  119.379342] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  119.379402] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  119.379467] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  119.379527] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  119.379587] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 00000000c0cf118d
[  119.379650] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  119.379712] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000c0cf118d
[  119.379782] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  119.379829] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  119.379861] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000c0cf118d
[  119.379929] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000e0dcab9c to 00000000c0cf118d
[  119.379992] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000c0cf118d
[  119.380069] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000c0cf118d nonblocking
[  119.380191] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  119.380270] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  119.385977] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6717, diff=1, hw=0 hw_last=0
[  119.386079] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000c0cf118d
[  119.386148] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  119.386211] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  119.386272] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  119.386333] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  119.386396] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000c0cf118d
[  119.402558] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6718, diff=1, hw=0 hw_last=0
[  119.419134] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6719, diff=1, hw=0 hw_last=0
[  119.435715] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6720, diff=1, hw=0 hw_last=0
[  119.452293] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6721, diff=1, hw=0 hw_last=0
[  119.468871] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6722, diff=1, hw=0 hw_last=0
[  119.485453] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6723, diff=1, hw=0 hw_last=0
[  119.502030] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6724, diff=1, hw=0 hw_last=0
[  119.518610] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6725, diff=1, hw=0 hw_last=0
[  119.535191] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6726, diff=1, hw=0 hw_last=0
[  119.551771] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6727, diff=1, hw=0 hw_last=0
[  119.568347] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6728, diff=1, hw=0 hw_last=0
[  119.584929] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6729, diff=1, hw=0 hw_last=0
[  119.601504] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6730, diff=1, hw=0 hw_last=0
[  119.618083] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6731, diff=1, hw=0 hw_last=0
[  119.634662] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6732, diff=1, hw=0 hw_last=0
[  119.651242] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6733, diff=1, hw=0 hw_last=0
[  119.667821] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6734, diff=1, hw=0 hw_last=0
[  119.684400] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6735, diff=1, hw=0 hw_last=0
[  119.700983] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6736, diff=1, hw=0 hw_last=0
[  119.717562] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6737, diff=1, hw=0 hw_last=0
[  119.734139] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6738, diff=1, hw=0 hw_last=0
[  119.750718] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6739, diff=1, hw=0 hw_last=0
[  119.767296] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6740, diff=1, hw=0 hw_last=0
[  119.783875] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6741, diff=1, hw=0 hw_last=0
[  119.800454] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6742, diff=1, hw=0 hw_last=0
[  119.817034] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6743, diff=1, hw=0 hw_last=0
[  119.833614] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6744, diff=1, hw=0 hw_last=0
[  119.850198] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6745, diff=1, hw=0 hw_last=0
[  119.866773] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6746, diff=1, hw=0 hw_last=0
[  119.883351] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6747, diff=1, hw=0 hw_last=0
[  120.032563] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6756, diff=1, hw=0 hw_last=0
[  120.049143] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6757, diff=1, hw=0 hw_last=0
[  120.065722] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6758, diff=1, hw=0 hw_last=0
[  120.082301] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6759, diff=1, hw=0 hw_last=0
[  120.098881] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6760, diff=1, hw=0 hw_last=0
[  120.115459] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6761, diff=1, hw=0 hw_last=0
[  120.132038] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6762, diff=1, hw=0 hw_last=0
[  120.148620] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6763, diff=1, hw=0 hw_last=0
[  120.165197] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6764, diff=1, hw=0 hw_last=0
[  120.181789] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6765, diff=1, hw=0 hw_last=0
[  120.198360] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6766, diff=1, hw=0 hw_last=0
[  120.208202] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  120.208312] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 6767 to client
[  120.209584] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  120.209687] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000018d86a98
[  120.209760] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  120.209826] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000fefb5c61 state to 0000000018d86a98
[  120.209898] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  120.209960] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 0000000018d86a98
[  120.210029] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000fefb5c61
[  120.210092] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  120.210152] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  120.210211] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  120.210271] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  120.210334] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  120.210395] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  120.210459] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  120.210519] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  120.210579] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 0000000018d86a98
[  120.210641] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  120.210702] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000018d86a98
[  120.210772] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  120.210816] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  120.210848] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000018d86a98
[  120.210914] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000000305e034 to 0000000018d86a98
[  120.210977] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000018d86a98
[  120.211044] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  120.211105] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  120.211167] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  120.211236] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 0000000018d86a98
[  120.211300] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000018d86a98
[  120.211362] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  120.211423] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  120.211484] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  120.211545] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  120.211606] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000018d86a98
[  120.213049] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  120.214946] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6767, diff=1, hw=0 hw_last=0
[  120.231520] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6768, diff=1, hw=0 hw_last=0
[  120.248103] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6769, diff=1, hw=0 hw_last=0
[  120.264675] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6770, diff=1, hw=0 hw_last=0
[  120.281256] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6771, diff=1, hw=0 hw_last=0
[  120.297839] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6772, diff=1, hw=0 hw_last=0
[  120.314417] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6773, diff=1, hw=0 hw_last=0
[  120.330993] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6774, diff=1, hw=0 hw_last=0
[  120.347575] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6775, diff=1, hw=0 hw_last=0
[  120.364162] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6776, diff=1, hw=0 hw_last=0
[  120.380735] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6777, diff=1, hw=0 hw_last=0
[  120.397313] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6778, diff=1, hw=0 hw_last=0
[  120.413891] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6779, diff=1, hw=0 hw_last=0
[  120.430469] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6780, diff=1, hw=0 hw_last=0
[  120.441639] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  120.441750] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000018d86a98
[  120.441829] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  120.441892] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000fefb5c61 state to 0000000018d86a98
[  120.441963] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  120.442024] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 0000000018d86a98
[  120.442094] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000fefb5c61
[  120.442157] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  120.442217] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  120.442278] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  120.442338] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  120.442402] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  120.442924] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000018d86a98
[  120.442992] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000029aaf162 to 0000000018d86a98
[  120.443055] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000018d86a98
[  120.443131] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000018d86a98 nonblocking
[  120.443241] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  120.443317] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  120.447047] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6781, diff=1, hw=0 hw_last=0
[  120.447142] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000018d86a98
[  120.447211] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  120.447276] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  120.447336] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  120.447399] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  120.447462] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000018d86a98
[  120.463627] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6782, diff=1, hw=0 hw_last=0
[  120.480205] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6783, diff=1, hw=0 hw_last=0
[  120.496784] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6784, diff=1, hw=0 hw_last=0
[  120.513363] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6785, diff=1, hw=0 hw_last=0
[  120.529942] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6786, diff=1, hw=0 hw_last=0
[  120.546520] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6787, diff=1, hw=0 hw_last=0
[  120.563102] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6788, diff=1, hw=0 hw_last=0
[  120.579682] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6789, diff=1, hw=0 hw_last=0
[  120.596261] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6790, diff=1, hw=0 hw_last=0
[  120.612842] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6791, diff=1, hw=0 hw_last=0
[  120.629419] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6792, diff=1, hw=0 hw_last=0
[  120.645995] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6793, diff=1, hw=0 hw_last=0
[  120.662573] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6794, diff=1, hw=0 hw_last=0
[  120.679152] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6795, diff=1, hw=0 hw_last=0
[  120.695732] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6796, diff=1, hw=0 hw_last=0
[  120.712311] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6797, diff=1, hw=0 hw_last=0
[  120.728890] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6798, diff=1, hw=0 hw_last=0
[  120.745469] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6799, diff=1, hw=0 hw_last=0
[  120.762048] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6800, diff=1, hw=0 hw_last=0
[  120.778630] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6801, diff=1, hw=0 hw_last=0
[  120.795208] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6802, diff=1, hw=0 hw_last=0
[  120.811786] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6803, diff=1, hw=0 hw_last=0
[  120.828367] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6804, diff=1, hw=0 hw_last=0
[  120.844945] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6805, diff=1, hw=0 hw_last=0
[  120.861527] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6806, diff=1, hw=0 hw_last=0
[  120.878105] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6807, diff=1, hw=0 hw_last=0
[  120.894684] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6808, diff=1, hw=0 hw_last=0
[  120.911262] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6809, diff=1, hw=0 hw_last=0
[  120.927841] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6810, diff=1, hw=0 hw_last=0
[  120.944421] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6811, diff=1, hw=0 hw_last=0
[  120.961003] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6812, diff=1, hw=0 hw_last=0
[  120.977581] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6813, diff=1, hw=0 hw_last=0
[  120.994158] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6814, diff=1, hw=0 hw_last=0
[  121.010738] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6815, diff=1, hw=0 hw_last=0
[  121.027316] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6816, diff=1, hw=0 hw_last=0
[  121.043895] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6817, diff=1, hw=0 hw_last=0
[  121.060476] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6818, diff=1, hw=0 hw_last=0
[  121.077054] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6819, diff=1, hw=0 hw_last=0
[  121.093633] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6820, diff=1, hw=0 hw_last=0
[  121.110212] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6821, diff=1, hw=0 hw_last=0
[  121.126792] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6822, diff=1, hw=0 hw_last=0
[  121.143372] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6823, diff=1, hw=0 hw_last=0
[  121.159952] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6824, diff=1, hw=0 hw_last=0
[  121.176531] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6825, diff=1, hw=0 hw_last=0
[  121.193108] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6826, diff=1, hw=0 hw_last=0
[  121.209689] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6827, diff=1, hw=0 hw_last=0
[  121.226267] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6828, diff=1, hw=0 hw_last=0
[  121.242849] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6829, diff=1, hw=0 hw_last=0
[  121.509751] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  121.509815] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  121.509876] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  121.509936] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 000000008e9f664b
[  121.510000] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  121.510062] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000008e9f664b
[  121.510134] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  121.510180] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  121.510212] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008e9f664b
[  121.510279] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000001477df7c to 000000008e9f664b
[  121.510342] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008e9f664b
[  121.510419] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000008e9f664b nonblocking
[  121.510521] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  121.510598] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  121.524696] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6846, diff=1, hw=0 hw_last=0
[  121.524798] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008e9f664b
[  121.524876] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  121.524939] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  121.525001] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  121.525062] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  121.525125] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008e9f664b
[  121.541273] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6847, diff=1, hw=0 hw_last=0
[  121.557854] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6848, diff=1, hw=0 hw_last=0
[  121.574432] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6849, diff=1, hw=0 hw_last=0
[  121.591011] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6850, diff=1, hw=0 hw_last=0
[  121.607590] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6851, diff=1, hw=0 hw_last=0
[  121.624171] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6852, diff=1, hw=0 hw_last=0
[  121.640748] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6853, diff=1, hw=0 hw_last=0
[  121.657329] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6854, diff=1, hw=0 hw_last=0
[  121.673910] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6855, diff=1, hw=0 hw_last=0
[  121.690487] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6856, diff=1, hw=0 hw_last=0
[  121.707063] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6857, diff=1, hw=0 hw_last=0
[  121.723642] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6858, diff=1, hw=0 hw_last=0
[  121.740221] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6859, diff=1, hw=0 hw_last=0
[  121.756800] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6860, diff=1, hw=0 hw_last=0
[  121.773379] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6861, diff=1, hw=0 hw_last=0
[  121.789959] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6862, diff=1, hw=0 hw_last=0
[  121.806538] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6863, diff=1, hw=0 hw_last=0
[  121.823117] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6864, diff=1, hw=0 hw_last=0
[  121.839700] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6865, diff=1, hw=0 hw_last=0
[  121.856277] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6866, diff=1, hw=0 hw_last=0
[  121.872855] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6867, diff=1, hw=0 hw_last=0
[  121.889436] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6868, diff=1, hw=0 hw_last=0
[  121.906016] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6869, diff=1, hw=0 hw_last=0
[  121.922595] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6870, diff=1, hw=0 hw_last=0
[  121.939173] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6871, diff=1, hw=0 hw_last=0
[  121.955752] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6872, diff=1, hw=0 hw_last=0
[  121.972331] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6873, diff=1, hw=0 hw_last=0
[  121.988910] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6874, diff=1, hw=0 hw_last=0
[  122.005489] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6875, diff=1, hw=0 hw_last=0
[  122.022070] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6876, diff=1, hw=0 hw_last=0
[  122.038648] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6877, diff=1, hw=0 hw_last=0
[  122.055227] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6878, diff=1, hw=0 hw_last=0
[  122.071806] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6879, diff=1, hw=0 hw_last=0
[  122.088386] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6880, diff=1, hw=0 hw_last=0
[  122.104965] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6881, diff=1, hw=0 hw_last=0
[  122.121546] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6882, diff=1, hw=0 hw_last=0
[  122.138123] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6883, diff=1, hw=0 hw_last=0
[  122.154702] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6884, diff=1, hw=0 hw_last=0
[  122.171280] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6885, diff=1, hw=0 hw_last=0
[  122.187861] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6886, diff=1, hw=0 hw_last=0
[  122.204441] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6887, diff=1, hw=0 hw_last=0
[  122.221020] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6888, diff=1, hw=0 hw_last=0
[  122.403396] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6899, diff=1, hw=0 hw_last=0
[  122.419978] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6900, diff=1, hw=0 hw_last=0
[  122.436556] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6901, diff=1, hw=0 hw_last=0
[  122.453134] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6902, diff=1, hw=0 hw_last=0
[  122.469715] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6903, diff=1, hw=0 hw_last=0
[  122.486295] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6904, diff=1, hw=0 hw_last=0
[  122.502875] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6905, diff=1, hw=0 hw_last=0
[  122.519451] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6906, diff=1, hw=0 hw_last=0
[  122.536031] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6907, diff=1, hw=0 hw_last=0
[  122.552609] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6908, diff=1, hw=0 hw_last=0
[  122.569189] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6909, diff=1, hw=0 hw_last=0
[  122.577362] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  122.577469] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000cc24793
[  122.577545] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  122.577607] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000002cafbe1b state to 000000000cc24793
[  122.577675] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  122.577736] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000e8543c49 state to 000000000cc24793
[  122.577805] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 000000002cafbe1b
[  122.577868] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  122.577928] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  122.577989] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  122.578049] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  122.578113] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  122.578173] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  122.578237] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  122.578298] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  122.578359] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000000cc24793
[  122.578422] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  122.578485] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000000cc24793
[  122.578557] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  122.578602] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  122.578634] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000cc24793
[  122.578703] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000eae20a14 to 000000000cc24793
[  122.578766] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000cc24793
[  122.578842] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000cc24793 nonblocking
[  122.578951] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  122.579022] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  122.585769] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6910, diff=1, hw=0 hw_last=0
[  122.585869] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000cc24793
[  122.585945] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  122.586007] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  122.586069] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  122.586131] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  122.586194] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000cc24793
[  122.602341] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6911, diff=1, hw=0 hw_last=0
[  122.618921] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6912, diff=1, hw=0 hw_last=0
[  122.635504] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6913, diff=1, hw=0 hw_last=0
[  122.652078] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6914, diff=1, hw=0 hw_last=0
[  122.668659] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6915, diff=1, hw=0 hw_last=0
[  122.685239] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6916, diff=1, hw=0 hw_last=0
[  122.701817] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6917, diff=1, hw=0 hw_last=0
[  122.718395] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6918, diff=1, hw=0 hw_last=0
[  122.734976] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6919, diff=1, hw=0 hw_last=0
[  122.751559] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6920, diff=1, hw=0 hw_last=0
[  122.768131] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6921, diff=1, hw=0 hw_last=0
[  122.784711] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6922, diff=1, hw=0 hw_last=0
[  122.801290] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6923, diff=1, hw=0 hw_last=0
[  122.817870] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6924, diff=1, hw=0 hw_last=0
[  122.834448] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6925, diff=1, hw=0 hw_last=0
[  122.851028] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6926, diff=1, hw=0 hw_last=0
[  122.867606] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6927, diff=1, hw=0 hw_last=0
[  122.884186] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6928, diff=1, hw=0 hw_last=0
[  122.900767] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6929, diff=1, hw=0 hw_last=0
[  122.917347] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6930, diff=1, hw=0 hw_last=0
[  122.933925] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6931, diff=1, hw=0 hw_last=0
[  122.950503] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6932, diff=1, hw=0 hw_last=0
[  122.967081] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6933, diff=1, hw=0 hw_last=0
[  122.983661] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6934, diff=1, hw=0 hw_last=0
[  123.116295] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6942, diff=1, hw=0 hw_last=0
[  123.132875] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6943, diff=1, hw=0 hw_last=0
[  123.149453] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6944, diff=1, hw=0 hw_last=0
[  123.166032] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6945, diff=1, hw=0 hw_last=0
[  123.182612] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6946, diff=1, hw=0 hw_last=0
[  123.199191] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6947, diff=1, hw=0 hw_last=0
[  123.215770] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6948, diff=1, hw=0 hw_last=0
[  123.232349] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6949, diff=1, hw=0 hw_last=0
[  123.248932] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6950, diff=1, hw=0 hw_last=0
[  123.265508] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6951, diff=1, hw=0 hw_last=0
[  123.282087] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6952, diff=1, hw=0 hw_last=0
[  123.298667] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6953, diff=1, hw=0 hw_last=0
[  123.315245] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6954, diff=1, hw=0 hw_last=0
[  123.331826] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6955, diff=1, hw=0 hw_last=0
[  123.348406] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6956, diff=1, hw=0 hw_last=0
[  123.364983] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6957, diff=1, hw=0 hw_last=0
[  123.381566] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6958, diff=1, hw=0 hw_last=0
[  123.389694] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  123.389804] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 6959 to client
[  123.391112] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  123.391222] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000095dd8ec0
[  123.391295] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  123.391357] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000ec98bd42 state to 0000000095dd8ec0
[  123.391422] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  123.391483] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 0000000095dd8ec0
[  123.391551] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000ec98bd42
[  123.391615] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  123.391675] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  123.391735] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  123.391797] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  123.391864] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  123.391927] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  123.391993] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  123.392053] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  123.392137] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 0000000095dd8ec0
[  123.392207] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  123.392273] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000095dd8ec0
[  123.392347] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  123.392392] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  123.392424] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000095dd8ec0
[  123.392495] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000018d86a98 to 0000000095dd8ec0
[  123.392560] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000095dd8ec0
[  123.392629] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  123.392692] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  123.392755] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  123.392826] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 0000000095dd8ec0
[  123.392890] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000095dd8ec0
[  123.392952] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  123.393013] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  123.393074] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  123.393135] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  123.393196] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000095dd8ec0
[  123.394636] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  123.398148] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6959, diff=1, hw=0 hw_last=0
[  123.414726] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6960, diff=1, hw=0 hw_last=0
[  123.431308] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6961, diff=1, hw=0 hw_last=0
[  123.447882] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6962, diff=1, hw=0 hw_last=0
[  123.464463] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6963, diff=1, hw=0 hw_last=0
[  123.481044] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6964, diff=1, hw=0 hw_last=0
[  123.497622] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6965, diff=1, hw=0 hw_last=0
[  123.514201] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6966, diff=1, hw=0 hw_last=0
[  123.530780] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6967, diff=1, hw=0 hw_last=0
[  123.547363] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6968, diff=1, hw=0 hw_last=0
[  123.563939] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6969, diff=1, hw=0 hw_last=0
[  123.580521] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6970, diff=1, hw=0 hw_last=0
[  123.597097] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6971, diff=1, hw=0 hw_last=0
[  123.613673] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6972, diff=1, hw=0 hw_last=0
[  123.624384] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  123.624499] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000095dd8ec0
[  123.625080] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  123.625144] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  123.625205] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  123.625269] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  123.625330] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  123.625390] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 0000000095dd8ec0
[  123.625454] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  123.625515] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000095dd8ec0
[  123.625586] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  123.625634] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  123.625665] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000095dd8ec0
[  123.625733] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000000305e034 to 0000000095dd8ec0
[  123.625795] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000095dd8ec0
[  123.625872] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000095dd8ec0 nonblocking
[  123.625977] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  123.626061] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  123.630253] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6973, diff=1, hw=0 hw_last=0
[  123.630348] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000095dd8ec0
[  123.630433] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  123.630507] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  123.630579] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  123.630652] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  123.630726] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000095dd8ec0
[  123.646831] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6974, diff=1, hw=0 hw_last=0
[  123.663410] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6975, diff=1, hw=0 hw_last=0
[  123.679990] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6976, diff=1, hw=0 hw_last=0
[  123.696571] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6977, diff=1, hw=0 hw_last=0
[  123.713146] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6978, diff=1, hw=0 hw_last=0
[  123.729727] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6979, diff=1, hw=0 hw_last=0
[  123.746307] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6980, diff=1, hw=0 hw_last=0
[  123.762883] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6981, diff=1, hw=0 hw_last=0
[  123.779464] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6982, diff=1, hw=0 hw_last=0
[  123.796045] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6983, diff=1, hw=0 hw_last=0
[  123.812624] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6984, diff=1, hw=0 hw_last=0
[  123.829200] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6985, diff=1, hw=0 hw_last=0
[  123.845779] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6986, diff=1, hw=0 hw_last=0
[  123.862358] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6987, diff=1, hw=0 hw_last=0
[  123.878937] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6988, diff=1, hw=0 hw_last=0
[  123.895517] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6989, diff=1, hw=0 hw_last=0
[  123.912099] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6990, diff=1, hw=0 hw_last=0
[  123.928675] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6991, diff=1, hw=0 hw_last=0
[  123.945257] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6992, diff=1, hw=0 hw_last=0
[  123.961836] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6993, diff=1, hw=0 hw_last=0
[  123.978413] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6994, diff=1, hw=0 hw_last=0
[  123.994993] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6995, diff=1, hw=0 hw_last=0
[  124.011571] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6996, diff=1, hw=0 hw_last=0
[  124.028151] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6997, diff=1, hw=0 hw_last=0
[  124.044731] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6998, diff=1, hw=0 hw_last=0
[  124.061309] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=6999, diff=1, hw=0 hw_last=0
[  124.077888] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7000, diff=1, hw=0 hw_last=0
[  124.094467] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7001, diff=1, hw=0 hw_last=0
[  124.111047] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7002, diff=1, hw=0 hw_last=0
[  124.127631] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7003, diff=1, hw=0 hw_last=0
[  124.144207] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7004, diff=1, hw=0 hw_last=0
[  124.160784] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7005, diff=1, hw=0 hw_last=0
[  124.177363] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7006, diff=1, hw=0 hw_last=0
[  124.193943] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7007, diff=1, hw=0 hw_last=0
[  124.210523] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7008, diff=1, hw=0 hw_last=0
[  124.227102] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7009, diff=1, hw=0 hw_last=0
[  124.243685] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7010, diff=1, hw=0 hw_last=0
[  124.260261] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7011, diff=1, hw=0 hw_last=0
[  124.276839] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7012, diff=1, hw=0 hw_last=0
[  124.293418] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7013, diff=1, hw=0 hw_last=0
[  124.309998] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7014, diff=1, hw=0 hw_last=0
[  124.326576] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7015, diff=1, hw=0 hw_last=0
[  124.453458] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  124.453519] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  124.453582] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000082174610
[  124.455012] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  124.459219] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7023, diff=1, hw=0 hw_last=0
[  124.475794] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7024, diff=1, hw=0 hw_last=0
[  124.492374] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7025, diff=1, hw=0 hw_last=0
[  124.508952] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7026, diff=1, hw=0 hw_last=0
[  124.525533] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7027, diff=1, hw=0 hw_last=0
[  124.542114] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7028, diff=1, hw=0 hw_last=0
[  124.558691] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7029, diff=1, hw=0 hw_last=0
[  124.575276] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7030, diff=1, hw=0 hw_last=0
[  124.591849] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7031, diff=1, hw=0 hw_last=0
[  124.608431] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7032, diff=1, hw=0 hw_last=0
[  124.625008] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7033, diff=1, hw=0 hw_last=0
[  124.641589] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7034, diff=1, hw=0 hw_last=0
[  124.658165] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7035, diff=1, hw=0 hw_last=0
[  124.674745] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7036, diff=1, hw=0 hw_last=0
[  124.686551] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  124.686661] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000082174610
[  124.686738] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  124.686801] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000bac3ec2d state to 0000000082174610
[  124.686868] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  124.686929] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000adb7ad91 state to 0000000082174610
[  124.686999] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000bac3ec2d
[  124.687062] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  124.687122] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  124.687183] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  124.687243] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  124.687307] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  124.687368] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  124.687432] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  124.687493] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  124.687554] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 0000000082174610
[  124.687617] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  124.687681] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000082174610
[  124.687753] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  124.687794] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  124.687826] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000082174610
[  124.687894] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000004593454f to 0000000082174610
[  124.687956] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000082174610
[  124.688034] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000082174610 nonblocking
[  124.688179] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  124.688267] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  124.691323] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7037, diff=1, hw=0 hw_last=0
[  124.691414] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000082174610
[  124.691496] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  124.691570] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  124.691643] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  124.691717] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  124.691791] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000082174610
[  124.707901] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7038, diff=1, hw=0 hw_last=0
[  124.724479] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7039, diff=1, hw=0 hw_last=0
[  124.741057] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7040, diff=1, hw=0 hw_last=0
[  124.757637] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7041, diff=1, hw=0 hw_last=0
[  124.774216] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7042, diff=1, hw=0 hw_last=0
[  124.790795] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7043, diff=1, hw=0 hw_last=0
[  124.807375] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7044, diff=1, hw=0 hw_last=0
[  124.823954] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7045, diff=1, hw=0 hw_last=0
[  124.840534] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7046, diff=1, hw=0 hw_last=0
[  124.857114] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7047, diff=1, hw=0 hw_last=0
[  124.873693] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7048, diff=1, hw=0 hw_last=0
[  124.890269] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7049, diff=1, hw=0 hw_last=0
[  124.906849] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7050, diff=1, hw=0 hw_last=0
[  124.923427] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7051, diff=1, hw=0 hw_last=0
[  124.940007] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7052, diff=1, hw=0 hw_last=0
[  124.956598] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7053, diff=1, hw=0 hw_last=0
[  124.973165] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7054, diff=1, hw=0 hw_last=0
[  124.973535] systemd-journald[214]: Data hash table of /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal has a fill level at 75.1 (2732 of 3640 items, 2097152 file size, 767 bytes per hash table item), suggesting rotation.
[  124.989744] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7055, diff=1, hw=0 hw_last=0
[  124.999696] systemd-journald[214]: /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal: Journal header limits reached or header out-of-date, rotating.
[  125.006326] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7056, diff=1, hw=0 hw_last=0
[  125.022905] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7057, diff=1, hw=0 hw_last=0
[  125.039485] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7058, diff=1, hw=0 hw_last=0
[  125.056064] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7059, diff=1, hw=0 hw_last=0
[  125.072642] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7060, diff=1, hw=0 hw_last=0
[  125.089221] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7061, diff=1, hw=0 hw_last=0
[  125.105799] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7062, diff=1, hw=0 hw_last=0
[  125.122379] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7063, diff=1, hw=0 hw_last=0
[  125.138957] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7064, diff=1, hw=0 hw_last=0
[  125.155537] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7065, diff=1, hw=0 hw_last=0
[  125.172116] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7066, diff=1, hw=0 hw_last=0
[  125.188696] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7067, diff=1, hw=0 hw_last=0
[  125.205275] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7068, diff=1, hw=0 hw_last=0
[  125.221854] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7069, diff=1, hw=0 hw_last=0
[  125.238432] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7070, diff=1, hw=0 hw_last=0
[  125.255013] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7071, diff=1, hw=0 hw_last=0
[  125.271596] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7072, diff=1, hw=0 hw_last=0
[  125.288173] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7073, diff=1, hw=0 hw_last=0
[  125.304749] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7074, diff=1, hw=0 hw_last=0
[  125.321330] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7075, diff=1, hw=0 hw_last=0
[  125.337908] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7076, diff=1, hw=0 hw_last=0
[  125.354487] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7077, diff=1, hw=0 hw_last=0
[  125.371068] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7078, diff=1, hw=0 hw_last=0
[  125.387645] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7079, diff=1, hw=0 hw_last=0
[  125.404225] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7080, diff=1, hw=0 hw_last=0
[  125.420805] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7081, diff=1, hw=0 hw_last=0
[  125.437384] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7082, diff=1, hw=0 hw_last=0
[  125.453966] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7083, diff=1, hw=0 hw_last=0
[  125.470544] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7084, diff=1, hw=0 hw_last=0
[  125.487120] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7085, diff=1, hw=0 hw_last=0
[  125.503700] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7086, diff=1, hw=0 hw_last=0
[  125.520280] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7087, diff=1, hw=0 hw_last=0
[  125.536859] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7088, diff=1, hw=0 hw_last=0
[  125.553443] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7089, diff=1, hw=0 hw_last=0
[  125.558542] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  125.558656] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 7090 to client
[  125.562928] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  125.563020] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006e1bef3e
[  125.563092] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  125.563155] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000003519e999 state to 000000006e1bef3e
[  125.563223] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  125.563284] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 000000006e1bef3e
[  125.563353] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 000000003519e999
[  125.563416] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  125.563476] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  125.563536] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  125.563596] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  125.563661] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  125.563722] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  125.563787] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  125.563847] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  125.563908] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000006e1bef3e
[  125.563971] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  125.564032] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000006e1bef3e
[  125.564123] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  125.564172] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  125.564205] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006e1bef3e
[  125.564276] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000082174610 to 000000006e1bef3e
[  125.564340] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006e1bef3e
[  125.564407] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  125.564470] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  125.564533] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  125.564603] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000006e1bef3e
[  125.702661] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7098, diff=1, hw=0 hw_last=0
[  125.719237] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7099, diff=1, hw=0 hw_last=0
[  125.735816] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7100, diff=1, hw=0 hw_last=0
[  125.752394] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7101, diff=1, hw=0 hw_last=0
[  125.768971] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7102, diff=1, hw=0 hw_last=0
[  125.785551] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7103, diff=1, hw=0 hw_last=0
[  125.795555] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  125.795661] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006e1bef3e
[  125.795737] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  125.795799] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000003519e999 state to 000000006e1bef3e
[  125.795865] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  125.795927] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 000000006e1bef3e
[  125.795994] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 000000003519e999
[  125.796096] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  125.796162] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  125.796226] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  125.796287] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  125.796352] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  125.796415] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  125.796480] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  125.796542] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  125.796604] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000006e1bef3e
[  125.796669] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  125.796732] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000006e1bef3e
[  125.796806] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  125.796856] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  125.796888] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006e1bef3e
[  125.796957] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000c0cf118d to 000000006e1bef3e
[  125.797020] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006e1bef3e
[  125.797097] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006e1bef3e nonblocking
[  125.797210] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  125.797293] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  125.802128] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7104, diff=1, hw=0 hw_last=0
[  125.802223] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006e1bef3e
[  125.802294] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  125.802360] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  125.802423] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  125.802486] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  125.802550] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006e1bef3e
[  125.818706] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7105, diff=1, hw=0 hw_last=0
[  125.835285] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7106, diff=1, hw=0 hw_last=0
[  125.851864] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7107, diff=1, hw=0 hw_last=0
[  125.868443] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7108, diff=1, hw=0 hw_last=0
[  125.885022] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7109, diff=1, hw=0 hw_last=0
[  125.901603] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7110, diff=1, hw=0 hw_last=0
[  125.918182] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7111, diff=1, hw=0 hw_last=0
[  125.934761] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7112, diff=1, hw=0 hw_last=0
[  125.951345] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7113, diff=1, hw=0 hw_last=0
[  125.967920] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7114, diff=1, hw=0 hw_last=0
[  125.984497] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7115, diff=1, hw=0 hw_last=0
[  126.001076] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7116, diff=1, hw=0 hw_last=0
[  126.017655] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7117, diff=1, hw=0 hw_last=0
[  126.034234] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7118, diff=1, hw=0 hw_last=0
[  126.050813] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7119, diff=1, hw=0 hw_last=0
[  126.067392] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7120, diff=1, hw=0 hw_last=0
[  126.083971] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7121, diff=1, hw=0 hw_last=0
[  126.100552] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7122, diff=1, hw=0 hw_last=0
[  126.117131] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7123, diff=1, hw=0 hw_last=0
[  126.133711] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7124, diff=1, hw=0 hw_last=0
[  126.150289] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7125, diff=1, hw=0 hw_last=0
[  126.166869] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7126, diff=1, hw=0 hw_last=0
[  126.183449] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7127, diff=1, hw=0 hw_last=0
[  126.200026] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7128, diff=1, hw=0 hw_last=0
[  126.216605] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7129, diff=1, hw=0 hw_last=0
[  126.233184] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7130, diff=1, hw=0 hw_last=0
[  126.249763] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7131, diff=1, hw=0 hw_last=0
[  126.266345] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7132, diff=1, hw=0 hw_last=0
[  126.282927] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7133, diff=1, hw=0 hw_last=0
[  126.697407] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7158, diff=1, hw=0 hw_last=0
[  126.713985] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7159, diff=1, hw=0 hw_last=0
[  126.730567] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7160, diff=1, hw=0 hw_last=0
[  126.747146] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7161, diff=1, hw=0 hw_last=0
[  126.763726] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7162, diff=1, hw=0 hw_last=0
[  126.780306] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7163, diff=1, hw=0 hw_last=0
[  126.796884] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7164, diff=1, hw=0 hw_last=0
[  126.813463] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7165, diff=1, hw=0 hw_last=0
[  126.830041] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7166, diff=1, hw=0 hw_last=0
[  126.846621] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7167, diff=1, hw=0 hw_last=0
[  126.863197] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7168, diff=1, hw=0 hw_last=0
[  126.879778] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7169, diff=1, hw=0 hw_last=0
[  126.887916] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  126.888068] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009472d261
[  126.888162] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  126.888238] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000082b4fa6a state to 000000009472d261
[  126.888318] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  126.888393] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000e8543c49 state to 000000009472d261
[  126.888474] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000082b4fa6a
[  126.888548] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  126.888621] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  126.888694] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  126.888767] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  126.888841] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  126.888913] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  126.888990] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  126.889063] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  126.889136] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 000000009472d261
[  126.889212] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  126.889286] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000009472d261
[  126.889371] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  126.889420] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  126.889458] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000009472d261
[  126.889539] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000018d86a98 to 000000009472d261
[  126.889613] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000009472d261
[  126.889702] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000009472d261 nonblocking
[  126.889817] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  126.889894] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  126.896354] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7170, diff=1, hw=0 hw_last=0
[  126.896443] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009472d261
[  126.896519] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  126.896582] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  126.896644] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  126.896705] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  126.896767] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009472d261
[  126.912936] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7171, diff=1, hw=0 hw_last=0
[  126.929512] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7172, diff=1, hw=0 hw_last=0
[  126.946094] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7173, diff=1, hw=0 hw_last=0
[  126.962671] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7174, diff=1, hw=0 hw_last=0
[  126.979250] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7175, diff=1, hw=0 hw_last=0
[  126.995830] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7176, diff=1, hw=0 hw_last=0
[  127.012409] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7177, diff=1, hw=0 hw_last=0
[  127.028989] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7178, diff=1, hw=0 hw_last=0
[  127.045569] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7179, diff=1, hw=0 hw_last=0
[  127.062149] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7180, diff=1, hw=0 hw_last=0
[  127.078725] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7181, diff=1, hw=0 hw_last=0
[  127.095304] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7182, diff=1, hw=0 hw_last=0
[  127.111883] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7183, diff=1, hw=0 hw_last=0
[  127.128461] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7184, diff=1, hw=0 hw_last=0
[  127.145040] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7185, diff=1, hw=0 hw_last=0
[  127.161619] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7186, diff=1, hw=0 hw_last=0
[  127.178199] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7187, diff=1, hw=0 hw_last=0
[  127.194778] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7188, diff=1, hw=0 hw_last=0
[  127.211362] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7189, diff=1, hw=0 hw_last=0
[  127.227938] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7190, diff=1, hw=0 hw_last=0
[  127.244516] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7191, diff=1, hw=0 hw_last=0
[  127.261095] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7192, diff=1, hw=0 hw_last=0
[  127.410307] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7201, diff=1, hw=0 hw_last=0
[  127.426888] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7202, diff=1, hw=0 hw_last=0
[  127.443465] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7203, diff=1, hw=0 hw_last=0
[  127.460047] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7204, diff=1, hw=0 hw_last=0
[  127.476626] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7205, diff=1, hw=0 hw_last=0
[  127.493206] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7206, diff=1, hw=0 hw_last=0
[  127.509786] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7207, diff=1, hw=0 hw_last=0
[  127.526363] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7208, diff=1, hw=0 hw_last=0
[  127.542943] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7209, diff=1, hw=0 hw_last=0
[  127.559522] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7210, diff=1, hw=0 hw_last=0
[  127.576101] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7211, diff=1, hw=0 hw_last=0
[  127.592679] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7212, diff=1, hw=0 hw_last=0
[  127.609264] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7213, diff=1, hw=0 hw_last=0
[  127.625838] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7214, diff=1, hw=0 hw_last=0
[  127.642419] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7215, diff=1, hw=0 hw_last=0
[  127.658997] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7216, diff=1, hw=0 hw_last=0
[  127.675576] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7217, diff=1, hw=0 hw_last=0
[  127.692157] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7218, diff=1, hw=0 hw_last=0
[  127.708739] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7219, diff=1, hw=0 hw_last=0
[  127.713052] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  127.713171] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 7220 to client
[  127.718451] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  127.718556] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006c5644bb
[  127.718640] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  127.718714] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000055579822 state to 000000006c5644bb
[  127.718791] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  127.718864] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 000000006c5644bb
[  127.718944] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000055579822
[  127.719018] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  127.719090] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  127.719161] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  127.719233] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  127.719309] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  127.719382] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  127.719456] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  127.719528] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  127.719600] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 000000006c5644bb
[  127.719674] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  127.719746] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000006c5644bb
[  127.719829] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  127.719877] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  127.719913] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006c5644bb
[  127.719992] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000000cc24793 to 000000006c5644bb
[  127.720084] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006c5644bb
[  127.720165] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  127.720239] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  127.720314] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  127.720396] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000006c5644bb
[  127.720472] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006c5644bb
[  127.720545] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  127.720618] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  127.720691] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  127.720763] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  127.720837] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006c5644bb
[  127.722289] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  127.725320] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7220, diff=1, hw=0 hw_last=0
[  127.741897] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7221, diff=1, hw=0 hw_last=0
[  127.758475] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7222, diff=1, hw=0 hw_last=0
[  127.775055] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7223, diff=1, hw=0 hw_last=0
[  127.791636] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7224, diff=1, hw=0 hw_last=0
[  127.808216] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7225, diff=1, hw=0 hw_last=0
[  127.824793] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7226, diff=1, hw=0 hw_last=0
[  127.841373] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7227, diff=1, hw=0 hw_last=0
[  127.857952] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7228, diff=1, hw=0 hw_last=0
[  127.874536] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7229, diff=1, hw=0 hw_last=0
[  127.891110] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7230, diff=1, hw=0 hw_last=0
[  127.907691] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7231, diff=1, hw=0 hw_last=0
[  127.924269] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7232, diff=1, hw=0 hw_last=0
[  127.940852] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7233, diff=1, hw=0 hw_last=0
[  127.951475] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 000000006c5644bb
[  127.951550] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  127.951624] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000006c5644bb
[  127.951707] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  127.951754] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  127.951791] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006c5644bb
[  127.951871] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000008e9f664b to 000000006c5644bb
[  127.951946] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006c5644bb
[  127.952078] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006c5644bb nonblocking
[  127.952207] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  127.952294] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  127.957423] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7234, diff=1, hw=0 hw_last=0
[  127.957515] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006c5644bb
[  127.957583] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  127.957647] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  127.957709] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  127.957771] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  127.957837] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006c5644bb
[  127.974003] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7235, diff=1, hw=0 hw_last=0
[  127.990581] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7236, diff=1, hw=0 hw_last=0
[  128.007161] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7237, diff=1, hw=0 hw_last=0
[  128.023738] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7238, diff=1, hw=0 hw_last=0
[  128.040319] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7239, diff=1, hw=0 hw_last=0
[  128.056898] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7240, diff=1, hw=0 hw_last=0
[  128.073478] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7241, diff=1, hw=0 hw_last=0
[  128.090057] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7242, diff=1, hw=0 hw_last=0
[  128.106636] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7243, diff=1, hw=0 hw_last=0
[  128.123218] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7244, diff=1, hw=0 hw_last=0
[  128.139795] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7245, diff=1, hw=0 hw_last=0
[  128.156373] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7246, diff=1, hw=0 hw_last=0
[  128.172951] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7247, diff=1, hw=0 hw_last=0
[  128.189530] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7248, diff=1, hw=0 hw_last=0
[  128.206109] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7249, diff=1, hw=0 hw_last=0
[  128.222688] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7250, diff=1, hw=0 hw_last=0
[  128.239267] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7251, diff=1, hw=0 hw_last=0
[  128.255846] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7252, diff=1, hw=0 hw_last=0
[  128.272431] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7253, diff=1, hw=0 hw_last=0
[  128.289010] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7254, diff=1, hw=0 hw_last=0
[  128.305586] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7255, diff=1, hw=0 hw_last=0
[  128.322163] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7256, diff=1, hw=0 hw_last=0
[  128.338743] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7257, diff=1, hw=0 hw_last=0
[  128.355323] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7258, diff=1, hw=0 hw_last=0
[  128.371901] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7259, diff=1, hw=0 hw_last=0
[  128.388480] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7260, diff=1, hw=0 hw_last=0
[  128.405059] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7261, diff=1, hw=0 hw_last=0
[  128.421638] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7262, diff=1, hw=0 hw_last=0
[  128.438217] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7263, diff=1, hw=0 hw_last=0
[  128.454797] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7264, diff=1, hw=0 hw_last=0
[  128.471376] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7265, diff=1, hw=0 hw_last=0
[  128.487958] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7266, diff=1, hw=0 hw_last=0
[  128.504535] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7267, diff=1, hw=0 hw_last=0
[  128.521116] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7268, diff=1, hw=0 hw_last=0
[  128.537695] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7269, diff=1, hw=0 hw_last=0
[  128.554278] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7270, diff=1, hw=0 hw_last=0
[  128.570854] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7271, diff=1, hw=0 hw_last=0
[  128.587431] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7272, diff=1, hw=0 hw_last=0
[  128.604014] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7273, diff=1, hw=0 hw_last=0
[  128.620590] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7274, diff=1, hw=0 hw_last=0
[  128.637169] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7275, diff=1, hw=0 hw_last=0
[  128.653748] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7276, diff=1, hw=0 hw_last=0
[  128.670329] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7277, diff=1, hw=0 hw_last=0
[  128.686906] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7278, diff=1, hw=0 hw_last=0
[  128.786388] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7284, diff=1, hw=0 hw_last=0
[  128.802965] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7285, diff=1, hw=0 hw_last=0
[  128.819543] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7286, diff=1, hw=0 hw_last=0
[  128.836122] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7287, diff=1, hw=0 hw_last=0
[  128.852706] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7288, diff=1, hw=0 hw_last=0
[  128.869282] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7289, diff=1, hw=0 hw_last=0
[  128.885863] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7290, diff=1, hw=0 hw_last=0
[  128.902443] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7291, diff=1, hw=0 hw_last=0
[  128.919023] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7292, diff=1, hw=0 hw_last=0
[  128.935607] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7293, diff=1, hw=0 hw_last=0
[  128.952181] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7294, diff=1, hw=0 hw_last=0
[  128.968760] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7295, diff=1, hw=0 hw_last=0
[  128.985337] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7296, diff=1, hw=0 hw_last=0
[  129.001914] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7297, diff=1, hw=0 hw_last=0
[  129.011613] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  129.011733] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000071ef6b0b
[  129.011820] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  129.011893] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000087081e28 state to 0000000071ef6b0b
[  129.011971] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  129.012081] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 0000000071ef6b0b
[  129.012167] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000087081e28
[  129.012244] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  129.012317] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  129.012390] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  129.012462] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  129.012539] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  129.012611] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  129.012688] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  129.012761] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  129.012834] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 0000000071ef6b0b
[  129.012909] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  129.012982] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000071ef6b0b
[  129.013065] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  129.013116] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  129.013153] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000071ef6b0b
[  129.013238] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000000cc24793 to 0000000071ef6b0b
[  129.013315] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000071ef6b0b
[  129.013405] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000071ef6b0b nonblocking
[  129.013523] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  129.013601] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  129.018494] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7298, diff=1, hw=0 hw_last=0
[  129.018602] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000071ef6b0b
[  129.018670] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  129.018734] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  129.018796] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  129.018860] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  129.018923] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000071ef6b0b
[  129.035071] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7299, diff=1, hw=0 hw_last=0
[  129.051650] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7300, diff=1, hw=0 hw_last=0
[  129.068232] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7301, diff=1, hw=0 hw_last=0
[  129.084809] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7302, diff=1, hw=0 hw_last=0
[  129.101386] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7303, diff=1, hw=0 hw_last=0
[  129.117966] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7304, diff=1, hw=0 hw_last=0
[  129.134547] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7305, diff=1, hw=0 hw_last=0
[  129.151124] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7306, diff=1, hw=0 hw_last=0
[  129.167705] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7307, diff=1, hw=0 hw_last=0
[  129.184286] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7308, diff=1, hw=0 hw_last=0
[  129.200864] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7309, diff=1, hw=0 hw_last=0
[  129.217440] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7310, diff=1, hw=0 hw_last=0
[  129.234020] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7311, diff=1, hw=0 hw_last=0
[  129.250599] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7312, diff=1, hw=0 hw_last=0
[  129.267179] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7313, diff=1, hw=0 hw_last=0
[  129.283762] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7314, diff=1, hw=0 hw_last=0
[  129.300336] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7315, diff=1, hw=0 hw_last=0
[  129.316915] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7316, diff=1, hw=0 hw_last=0
[  129.333498] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7317, diff=1, hw=0 hw_last=0
[  129.350076] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7318, diff=1, hw=0 hw_last=0
[  129.366656] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7319, diff=1, hw=0 hw_last=0
[  129.383233] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7320, diff=1, hw=0 hw_last=0
[  129.399811] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7321, diff=1, hw=0 hw_last=0
[  129.416393] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7322, diff=1, hw=0 hw_last=0
[  129.432970] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7323, diff=1, hw=0 hw_last=0
[  129.449549] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7324, diff=1, hw=0 hw_last=0
[  129.466129] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7325, diff=1, hw=0 hw_last=0
[  129.482709] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7326, diff=1, hw=0 hw_last=0
[  129.499287] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7327, diff=1, hw=0 hw_last=0
[  129.515866] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7328, diff=1, hw=0 hw_last=0
[  129.532446] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7329, diff=1, hw=0 hw_last=0
[  129.549025] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7330, diff=1, hw=0 hw_last=0
[  129.565609] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7331, diff=1, hw=0 hw_last=0
[  129.582183] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7332, diff=1, hw=0 hw_last=0
[  129.598765] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7333, diff=1, hw=0 hw_last=0
[  129.615345] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7334, diff=1, hw=0 hw_last=0
[  129.631920] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7335, diff=1, hw=0 hw_last=0
[  129.648501] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7336, diff=1, hw=0 hw_last=0
[  129.665080] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7337, diff=1, hw=0 hw_last=0
[  129.681658] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7338, diff=1, hw=0 hw_last=0
[  129.698239] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7339, diff=1, hw=0 hw_last=0
[  129.714816] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7340, diff=1, hw=0 hw_last=0
[  129.731397] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7341, diff=1, hw=0 hw_last=0
[  129.747976] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7342, diff=1, hw=0 hw_last=0
[  129.764555] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7343, diff=1, hw=0 hw_last=0
[  129.781137] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7344, diff=1, hw=0 hw_last=0
[  129.786609] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  129.786730] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 7345 to client
[  129.790004] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  129.790108] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000ace560b
[  129.790189] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  129.790262] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000002cafbe1b state to 000000000ace560b
[  129.790340] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  129.790412] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 000000000ace560b
[  129.790493] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 000000002cafbe1b
[  129.790567] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  129.790639] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  129.790710] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  129.790782] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  129.790857] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  129.790929] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  129.791005] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  129.791076] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  129.791148] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 000000000ace560b
[  129.791223] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  129.791295] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000000ace560b
[  129.791377] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  129.791425] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  129.791461] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000ace560b
[  129.791539] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000009472d261 to 000000000ace560b
[  129.791614] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000ace560b
[  129.791691] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  129.791764] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  129.791838] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  129.791918] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000000ace560b
[  129.792015] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000ace560b
[  129.792094] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  129.792168] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  129.792242] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  129.792316] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  129.792389] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000ace560b
[  129.793847] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  129.797720] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7345, diff=1, hw=0 hw_last=0
[  129.814295] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7346, diff=1, hw=0 hw_last=0
[  129.830877] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7347, diff=1, hw=0 hw_last=0
[  129.847455] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7348, diff=1, hw=0 hw_last=0
[  129.864036] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7349, diff=1, hw=0 hw_last=0
[  129.880615] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7350, diff=1, hw=0 hw_last=0
[  129.897195] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7351, diff=1, hw=0 hw_last=0
[  130.022144] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 000000002cafbe1b
[  130.022218] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  130.022289] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  130.022360] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  130.022431] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  130.022506] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  130.022579] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  130.022654] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  130.022726] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  130.022799] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 000000000ace560b
[  130.022873] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  130.022949] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000000ace560b
[  130.023030] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  130.023078] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  130.023114] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000ace560b
[  130.023194] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000095dd8ec0 to 000000000ace560b
[  130.023268] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000ace560b
[  130.023359] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000ace560b nonblocking
[  130.023483] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  130.023562] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  130.029825] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7359, diff=1, hw=0 hw_last=0
[  130.029926] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000ace560b
[  130.029998] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  130.030061] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  130.030123] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  130.030185] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  130.030249] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000ace560b
[  130.046404] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7360, diff=1, hw=0 hw_last=0
[  130.062984] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7361, diff=1, hw=0 hw_last=0
[  130.079564] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7362, diff=1, hw=0 hw_last=0
[  130.096140] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7363, diff=1, hw=0 hw_last=0
[  130.112720] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7364, diff=1, hw=0 hw_last=0
[  130.129301] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7365, diff=1, hw=0 hw_last=0
[  130.145879] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7366, diff=1, hw=0 hw_last=0
[  130.162457] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7367, diff=1, hw=0 hw_last=0
[  130.179040] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7368, diff=1, hw=0 hw_last=0
[  130.195618] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7369, diff=1, hw=0 hw_last=0
[  130.212197] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7370, diff=1, hw=0 hw_last=0
[  130.228773] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7371, diff=1, hw=0 hw_last=0
[  130.245351] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7372, diff=1, hw=0 hw_last=0
[  130.261931] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7373, diff=1, hw=0 hw_last=0
[  130.278510] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7374, diff=1, hw=0 hw_last=0
[  130.295089] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7375, diff=1, hw=0 hw_last=0
[  130.311668] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7376, diff=1, hw=0 hw_last=0
[  130.328247] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7377, diff=1, hw=0 hw_last=0
[  130.344831] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7378, diff=1, hw=0 hw_last=0
[  130.361408] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7379, diff=1, hw=0 hw_last=0
[  130.377986] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7380, diff=1, hw=0 hw_last=0
[  130.394564] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7381, diff=1, hw=0 hw_last=0
[  130.411144] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7382, diff=1, hw=0 hw_last=0
[  130.427723] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7383, diff=1, hw=0 hw_last=0
[  130.444303] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7384, diff=1, hw=0 hw_last=0
[  130.460883] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7385, diff=1, hw=0 hw_last=0
[  130.477461] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7386, diff=1, hw=0 hw_last=0
[  130.494060] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7387, diff=1, hw=0 hw_last=0
[  130.510620] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7388, diff=1, hw=0 hw_last=0
[  130.527199] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7389, diff=1, hw=0 hw_last=0
[  130.543778] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7390, diff=1, hw=0 hw_last=0
[  130.560360] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7391, diff=1, hw=0 hw_last=0
[  130.576936] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7392, diff=1, hw=0 hw_last=0
[  130.593519] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7393, diff=1, hw=0 hw_last=0
[  130.610099] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7394, diff=1, hw=0 hw_last=0
[  130.626676] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7395, diff=1, hw=0 hw_last=0
[  130.643256] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7396, diff=1, hw=0 hw_last=0
[  130.659833] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7397, diff=1, hw=0 hw_last=0
[  130.676411] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7398, diff=1, hw=0 hw_last=0
[  130.792473] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7405, diff=1, hw=0 hw_last=0
[  130.809049] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7406, diff=1, hw=0 hw_last=0
[  130.825631] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7407, diff=1, hw=0 hw_last=0
[  130.842208] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7408, diff=1, hw=0 hw_last=0
[  130.858793] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7409, diff=1, hw=0 hw_last=0
[  130.875369] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7410, diff=1, hw=0 hw_last=0
[  130.891947] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7411, diff=1, hw=0 hw_last=0
[  130.908527] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7412, diff=1, hw=0 hw_last=0
[  130.909105] systemd-journald[214]: Data hash table of /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal has a fill level at 75.0 (2731 of 3640 items, 2097152 file size, 767 bytes per hash table item), suggesting rotation.
[  130.925111] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7413, diff=1, hw=0 hw_last=0
[  130.931446] systemd-journald[214]: /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal: Journal header limits reached or header out-of-date, rotating.
[  130.941689] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7414, diff=1, hw=0 hw_last=0
[  130.958264] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7415, diff=1, hw=0 hw_last=0
[  130.974845] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7416, diff=1, hw=0 hw_last=0
[  130.991422] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7417, diff=1, hw=0 hw_last=0
[  131.008002] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7418, diff=1, hw=0 hw_last=0
[  131.017352] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  131.017469] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000fde3661d
[  131.017558] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  131.017632] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000215b6887 state to 00000000fde3661d
[  131.017710] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  131.017783] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a743c9a8 state to 00000000fde3661d
[  131.017863] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000215b6887
[  131.017937] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  131.018008] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  131.018080] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  131.018151] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  131.018226] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  131.018298] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  131.018373] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  131.018444] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  131.018516] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 00000000fde3661d
[  131.018590] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  131.018664] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000fde3661d
[  131.018746] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  131.018797] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  131.018834] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000fde3661d
[  131.018914] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000082174610 to 00000000fde3661d
[  131.018987] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000fde3661d
[  131.019075] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000fde3661d nonblocking
[  131.019194] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  131.019270] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  131.024576] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7419, diff=1, hw=0 hw_last=0
[  131.024673] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000fde3661d
[  131.024740] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  131.024809] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  131.024870] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  131.024933] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  131.024997] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000fde3661d
[  131.041156] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7420, diff=1, hw=0 hw_last=0
[  131.057734] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7421, diff=1, hw=0 hw_last=0
[  131.074313] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7422, diff=1, hw=0 hw_last=0
[  131.090893] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7423, diff=1, hw=0 hw_last=0
[  131.107472] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7424, diff=1, hw=0 hw_last=0
[  131.124053] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7425, diff=1, hw=0 hw_last=0
[  131.140631] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7426, diff=1, hw=0 hw_last=0
[  131.157210] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7427, diff=1, hw=0 hw_last=0
[  131.173789] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7428, diff=1, hw=0 hw_last=0
[  131.190371] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7429, diff=1, hw=0 hw_last=0
[  131.206952] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7430, diff=1, hw=0 hw_last=0
[  131.223524] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7431, diff=1, hw=0 hw_last=0
[  131.240103] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7432, diff=1, hw=0 hw_last=0
[  131.256682] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7433, diff=1, hw=0 hw_last=0
[  131.273262] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7434, diff=1, hw=0 hw_last=0
[  131.289840] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7435, diff=1, hw=0 hw_last=0
[  131.306422] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7436, diff=1, hw=0 hw_last=0
[  131.323002] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7437, diff=1, hw=0 hw_last=0
[  131.770638] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7464, diff=1, hw=0 hw_last=0
[  131.787222] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7465, diff=1, hw=0 hw_last=0
[  131.803798] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7466, diff=1, hw=0 hw_last=0
[  131.820376] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7467, diff=1, hw=0 hw_last=0
[  131.836955] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7468, diff=1, hw=0 hw_last=0
[  131.853533] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7469, diff=1, hw=0 hw_last=0
[  131.870116] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7470, diff=1, hw=0 hw_last=0
[  131.886694] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7471, diff=1, hw=0 hw_last=0
[  131.903276] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7472, diff=1, hw=0 hw_last=0
[  131.916066] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  131.916187] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 7473 to client
[  131.919858] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7473, diff=1, hw=0 hw_last=0
[  131.929473] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  131.929572] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006fb5b2d2
[  131.929655] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  131.929729] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000bac3ec2d state to 000000006fb5b2d2
[  131.929807] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  131.929879] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 000000006fb5b2d2
[  131.929958] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000bac3ec2d
[  131.930033] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  131.930104] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  131.930176] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  131.930246] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  131.930322] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  131.930395] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  131.930470] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  131.930541] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  131.930613] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000006fb5b2d2
[  131.930686] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  131.930758] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000006fb5b2d2
[  131.930840] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  131.930887] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  131.930923] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006fb5b2d2
[  131.931003] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000fde3661d to 000000006fb5b2d2
[  131.931079] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006fb5b2d2
[  131.931157] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  131.931231] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  131.931305] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  131.931387] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000006fb5b2d2
[  131.931462] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006fb5b2d2
[  131.931537] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  131.931609] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  131.931681] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  131.931753] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  131.931828] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006fb5b2d2
[  131.933337] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  131.936437] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7474, diff=1, hw=0 hw_last=0
[  131.953016] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7475, diff=1, hw=0 hw_last=0
[  131.969596] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7476, diff=1, hw=0 hw_last=0
[  131.986174] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7477, diff=1, hw=0 hw_last=0
[  132.002758] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7478, diff=1, hw=0 hw_last=0
[  132.019334] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7479, diff=1, hw=0 hw_last=0
[  132.035913] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7480, diff=1, hw=0 hw_last=0
[  132.052492] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7481, diff=1, hw=0 hw_last=0
[  132.069074] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7482, diff=1, hw=0 hw_last=0
[  132.085653] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7483, diff=1, hw=0 hw_last=0
[  132.102231] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7484, diff=1, hw=0 hw_last=0
[  132.118809] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7485, diff=1, hw=0 hw_last=0
[  132.135387] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7486, diff=1, hw=0 hw_last=0
[  132.151966] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7487, diff=1, hw=0 hw_last=0
[  132.162342] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  132.162459] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006fb5b2d2
[  132.162545] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  132.162619] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000bac3ec2d state to 000000006fb5b2d2
[  132.162697] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  132.162769] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 000000006fb5b2d2
[  132.162850] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000bac3ec2d
[  132.162924] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  132.162995] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  132.163066] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  132.163137] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  132.163211] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  132.163282] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  132.163815] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006fb5b2d2
[  132.163893] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000006e1bef3e to 000000006fb5b2d2
[  132.164005] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006fb5b2d2
[  132.164101] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006fb5b2d2 nonblocking
[  132.164221] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  132.164303] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  132.168542] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7488, diff=1, hw=0 hw_last=0
[  132.168634] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006fb5b2d2
[  132.168703] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  132.168766] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  132.168829] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  132.168892] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  132.168956] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006fb5b2d2
[  132.185123] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7489, diff=1, hw=0 hw_last=0
[  132.201698] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7490, diff=1, hw=0 hw_last=0
[  132.218278] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7491, diff=1, hw=0 hw_last=0
[  132.234856] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7492, diff=1, hw=0 hw_last=0
[  132.251435] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7493, diff=1, hw=0 hw_last=0
[  132.268018] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7494, diff=1, hw=0 hw_last=0
[  132.284595] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7495, diff=1, hw=0 hw_last=0
[  132.301176] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7496, diff=1, hw=0 hw_last=0
[  132.317758] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7497, diff=1, hw=0 hw_last=0
[  132.334331] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7498, diff=1, hw=0 hw_last=0
[  132.350909] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7499, diff=1, hw=0 hw_last=0
[  132.367488] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7500, diff=1, hw=0 hw_last=0
[  132.384067] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7501, diff=1, hw=0 hw_last=0
[  132.400647] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7502, diff=1, hw=0 hw_last=0
[  132.417226] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7503, diff=1, hw=0 hw_last=0
[  132.433805] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7504, diff=1, hw=0 hw_last=0
[  132.450387] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7505, diff=1, hw=0 hw_last=0
[  132.466970] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7506, diff=1, hw=0 hw_last=0
[  132.483546] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7507, diff=1, hw=0 hw_last=0
[  132.500125] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7508, diff=1, hw=0 hw_last=0
[  132.516703] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7509, diff=1, hw=0 hw_last=0
[  132.533282] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7510, diff=1, hw=0 hw_last=0
[  132.549862] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7511, diff=1, hw=0 hw_last=0
[  132.566440] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7512, diff=1, hw=0 hw_last=0
[  132.583020] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7513, diff=1, hw=0 hw_last=0
[  132.599598] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7514, diff=1, hw=0 hw_last=0
[  132.616177] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7515, diff=1, hw=0 hw_last=0
[  132.632757] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7516, diff=1, hw=0 hw_last=0
[  132.649342] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7517, diff=1, hw=0 hw_last=0
[  132.665917] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7518, diff=1, hw=0 hw_last=0
[  132.682495] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7519, diff=1, hw=0 hw_last=0
[  132.699073] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7520, diff=1, hw=0 hw_last=0
[  132.715658] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7521, diff=1, hw=0 hw_last=0
[  132.732234] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7522, diff=1, hw=0 hw_last=0
[  132.748811] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7523, diff=1, hw=0 hw_last=0
[  132.765391] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7524, diff=1, hw=0 hw_last=0
[  132.781972] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7525, diff=1, hw=0 hw_last=0
[  132.798550] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7526, diff=1, hw=0 hw_last=0
[  132.815129] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7527, diff=1, hw=0 hw_last=0
[  132.831708] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7528, diff=1, hw=0 hw_last=0
[  132.848285] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7529, diff=1, hw=0 hw_last=0
[  132.864866] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7530, diff=1, hw=0 hw_last=0
[  132.881446] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7531, diff=1, hw=0 hw_last=0
[  132.898025] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7532, diff=1, hw=0 hw_last=0
[  132.914607] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7533, diff=1, hw=0 hw_last=0
[  132.931184] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7534, diff=1, hw=0 hw_last=0
[  132.947762] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7535, diff=1, hw=0 hw_last=0
[  132.964341] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7536, diff=1, hw=0 hw_last=0
[  133.063823] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7542, diff=1, hw=0 hw_last=0
[  133.080400] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7543, diff=1, hw=0 hw_last=0
[  133.096978] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7544, diff=1, hw=0 hw_last=0
[  133.113562] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7545, diff=1, hw=0 hw_last=0
[  133.130139] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7546, diff=1, hw=0 hw_last=0
[  133.146720] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7547, diff=1, hw=0 hw_last=0
[  133.163298] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7548, diff=1, hw=0 hw_last=0
[  133.179880] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7549, diff=1, hw=0 hw_last=0
[  133.196460] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7550, diff=1, hw=0 hw_last=0
[  133.213035] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7551, diff=1, hw=0 hw_last=0
[  133.229616] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7552, diff=1, hw=0 hw_last=0
[  133.246191] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7553, diff=1, hw=0 hw_last=0
[  133.262772] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7554, diff=1, hw=0 hw_last=0
[  133.271339] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  133.271451] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007967e7cb
[  133.271537] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  133.271611] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000003519e999 state to 000000007967e7cb
[  133.271689] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  133.271761] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 000000007967e7cb
[  133.271843] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 000000003519e999
[  133.271917] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  133.272022] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  133.272100] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  133.272175] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  133.272252] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  133.272325] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  133.272402] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  133.272475] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  133.272548] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 000000007967e7cb
[  133.272624] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  133.272700] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000007967e7cb
[  133.272784] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  133.272835] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  133.272871] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000007967e7cb
[  133.272951] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000009472d261 to 000000007967e7cb
[  133.273025] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000007967e7cb
[  133.273113] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007967e7cb nonblocking
[  133.273228] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  133.273304] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  133.279348] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7555, diff=1, hw=0 hw_last=0
[  133.279447] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007967e7cb
[  133.279516] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  133.279580] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  133.279640] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  133.279703] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  133.279767] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007967e7cb
[  133.295930] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7556, diff=1, hw=0 hw_last=0
[  133.312507] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7557, diff=1, hw=0 hw_last=0
[  133.329086] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7558, diff=1, hw=0 hw_last=0
[  133.345663] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7559, diff=1, hw=0 hw_last=0
[  133.362242] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7560, diff=1, hw=0 hw_last=0
[  133.378824] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7561, diff=1, hw=0 hw_last=0
[  133.395402] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7562, diff=1, hw=0 hw_last=0
[  133.411982] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7563, diff=1, hw=0 hw_last=0
[  133.428563] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7564, diff=1, hw=0 hw_last=0
[  133.445138] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7565, diff=1, hw=0 hw_last=0
[  133.461716] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7566, diff=1, hw=0 hw_last=0
[  133.478295] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7567, diff=1, hw=0 hw_last=0
[  133.494874] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7568, diff=1, hw=0 hw_last=0
[  133.511453] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7569, diff=1, hw=0 hw_last=0
[  133.528032] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7570, diff=1, hw=0 hw_last=0
[  133.544611] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7571, diff=1, hw=0 hw_last=0
[  133.561191] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7572, diff=1, hw=0 hw_last=0
[  133.577770] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7573, diff=1, hw=0 hw_last=0
[  133.594353] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7574, diff=1, hw=0 hw_last=0
[  133.610930] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7575, diff=1, hw=0 hw_last=0
[  133.627511] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7576, diff=1, hw=0 hw_last=0
[  133.644088] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7577, diff=1, hw=0 hw_last=0
[  133.760142] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7584, diff=1, hw=0 hw_last=0
[  133.776721] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7585, diff=1, hw=0 hw_last=0
[  133.793300] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7586, diff=1, hw=0 hw_last=0
[  133.809881] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7587, diff=1, hw=0 hw_last=0
[  133.826460] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7588, diff=1, hw=0 hw_last=0
[  133.843038] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7589, diff=1, hw=0 hw_last=0
[  133.859617] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7590, diff=1, hw=0 hw_last=0
[  133.876196] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7591, diff=1, hw=0 hw_last=0
[  133.892776] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7592, diff=1, hw=0 hw_last=0
[  133.909355] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7593, diff=1, hw=0 hw_last=0
[  133.925935] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7594, diff=1, hw=0 hw_last=0
[  133.942515] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7595, diff=1, hw=0 hw_last=0
[  133.959093] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7596, diff=1, hw=0 hw_last=0
[  133.975674] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7597, diff=1, hw=0 hw_last=0
[  133.992253] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7598, diff=1, hw=0 hw_last=0
[  134.008833] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7599, diff=1, hw=0 hw_last=0
[  134.025410] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7600, diff=1, hw=0 hw_last=0
[  134.041988] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7601, diff=1, hw=0 hw_last=0
[  134.058568] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7602, diff=1, hw=0 hw_last=0
[  134.075147] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7603, diff=1, hw=0 hw_last=0
[  134.091728] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7604, diff=1, hw=0 hw_last=0
[  134.108309] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7605, diff=1, hw=0 hw_last=0
[  134.123821] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  134.123965] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 7606 to client
[  134.124895] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7606, diff=1, hw=0 hw_last=0
[  134.134250] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  134.134351] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e0dcab9c
[  134.134435] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  134.134509] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000fefb5c61 state to 00000000e0dcab9c
[  134.134588] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  134.134660] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 00000000e0dcab9c
[  134.134741] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000fefb5c61
[  134.134815] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  134.134886] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  134.134958] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  134.135029] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  134.135105] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  134.135177] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  134.135252] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  134.135325] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  134.135397] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 00000000e0dcab9c
[  134.135472] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  134.135544] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000e0dcab9c
[  134.135625] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  134.135671] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  134.135708] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000e0dcab9c
[  134.135787] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000071ef6b0b to 00000000e0dcab9c
[  134.135861] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000e0dcab9c
[  134.135953] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  134.136032] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  134.136107] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  134.136191] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 00000000e0dcab9c
[  134.136269] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e0dcab9c
[  134.136342] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  134.136415] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  134.136487] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  134.136559] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  134.136631] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e0dcab9c
[  134.138106] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  134.141473] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7607, diff=1, hw=0 hw_last=0
[  134.158049] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7608, diff=1, hw=0 hw_last=0
[  134.174630] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7609, diff=1, hw=0 hw_last=0
[  134.191206] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7610, diff=1, hw=0 hw_last=0
[  134.207789] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7611, diff=1, hw=0 hw_last=0
[  134.224369] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7612, diff=1, hw=0 hw_last=0
[  134.240948] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7613, diff=1, hw=0 hw_last=0
[  134.257525] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7614, diff=1, hw=0 hw_last=0
[  134.274108] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7615, diff=1, hw=0 hw_last=0
[  134.290687] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7616, diff=1, hw=0 hw_last=0
[  134.366458] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  134.366528] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  134.366603] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  134.366674] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  134.366750] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  134.366821] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  134.366892] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 00000000e0dcab9c
[  134.366967] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  134.367040] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000e0dcab9c
[  134.367123] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  134.367170] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  134.367207] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000e0dcab9c
[  134.367287] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000006c5644bb to 00000000e0dcab9c
[  134.367360] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000e0dcab9c
[  134.367449] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e0dcab9c nonblocking
[  134.367564] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  134.367636] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  134.373576] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7621, diff=1, hw=0 hw_last=0
[  134.373680] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e0dcab9c
[  134.373758] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  134.373821] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  134.373883] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  134.373944] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  134.374006] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e0dcab9c
[  134.390155] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7622, diff=1, hw=0 hw_last=0
[  134.406732] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7623, diff=1, hw=0 hw_last=0
[  134.423312] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7624, diff=1, hw=0 hw_last=0
[  134.439890] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7625, diff=1, hw=0 hw_last=0
[  134.456469] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7626, diff=1, hw=0 hw_last=0
[  134.473052] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7627, diff=1, hw=0 hw_last=0
[  134.489628] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7628, diff=1, hw=0 hw_last=0
[  134.506207] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7629, diff=1, hw=0 hw_last=0
[  134.522792] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7630, diff=1, hw=0 hw_last=0
[  134.539368] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7631, diff=1, hw=0 hw_last=0
[  134.555943] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7632, diff=1, hw=0 hw_last=0
[  134.572522] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7633, diff=1, hw=0 hw_last=0
[  134.589101] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7634, diff=1, hw=0 hw_last=0
[  134.605680] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7635, diff=1, hw=0 hw_last=0
[  134.622259] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7636, diff=1, hw=0 hw_last=0
[  134.638840] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7637, diff=1, hw=0 hw_last=0
[  134.655418] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7638, diff=1, hw=0 hw_last=0
[  134.671998] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7639, diff=1, hw=0 hw_last=0
[  134.688581] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7640, diff=1, hw=0 hw_last=0
[  134.705161] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7641, diff=1, hw=0 hw_last=0
[  134.721738] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7642, diff=1, hw=0 hw_last=0
[  134.738316] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7643, diff=1, hw=0 hw_last=0
[  134.754894] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7644, diff=1, hw=0 hw_last=0
[  134.771472] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7645, diff=1, hw=0 hw_last=0
[  134.788070] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7646, diff=1, hw=0 hw_last=0
[  134.804631] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7647, diff=1, hw=0 hw_last=0
[  134.821212] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7648, diff=1, hw=0 hw_last=0
[  134.837790] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7649, diff=1, hw=0 hw_last=0
[  134.854369] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7650, diff=1, hw=0 hw_last=0
[  134.870948] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7651, diff=1, hw=0 hw_last=0
[  134.887527] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7652, diff=1, hw=0 hw_last=0
[  134.904108] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7653, diff=1, hw=0 hw_last=0
[  134.920688] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7654, diff=1, hw=0 hw_last=0
[  134.937264] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7655, diff=1, hw=0 hw_last=0
[  134.953845] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7656, diff=1, hw=0 hw_last=0
[  134.970424] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7657, diff=1, hw=0 hw_last=0
[  134.987003] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7658, diff=1, hw=0 hw_last=0
[  135.003582] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7659, diff=1, hw=0 hw_last=0
[  135.020161] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7660, diff=1, hw=0 hw_last=0
[  135.036744] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7661, diff=1, hw=0 hw_last=0
[  135.053320] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7662, diff=1, hw=0 hw_last=0
[  135.230347] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 0000000029aaf162
[  135.230423] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000029aaf162
[  135.230495] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  135.230567] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  135.230639] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  135.230711] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  135.230783] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000029aaf162
[  135.232231] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  135.235702] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7673, diff=1, hw=0 hw_last=0
[  135.252274] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7674, diff=1, hw=0 hw_last=0
[  135.268856] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7675, diff=1, hw=0 hw_last=0
[  135.285436] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7676, diff=1, hw=0 hw_last=0
[  135.302017] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7677, diff=1, hw=0 hw_last=0
[  135.318595] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7678, diff=1, hw=0 hw_last=0
[  135.335176] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7679, diff=1, hw=0 hw_last=0
[  135.351752] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7680, diff=1, hw=0 hw_last=0
[  135.368334] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7681, diff=1, hw=0 hw_last=0
[  135.384913] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7682, diff=1, hw=0 hw_last=0
[  135.401490] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7683, diff=1, hw=0 hw_last=0
[  135.418071] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7684, diff=1, hw=0 hw_last=0
[  135.434645] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7685, diff=1, hw=0 hw_last=0
[  135.451226] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7686, diff=1, hw=0 hw_last=0
[  135.460732] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  135.460844] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000029aaf162
[  135.460931] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  135.461004] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000055579822 state to 0000000029aaf162
[  135.461082] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  135.461155] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000e8543c49 state to 0000000029aaf162
[  135.461237] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000055579822
[  135.461310] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  135.461382] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  135.461453] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  135.461524] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  135.461598] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  135.461669] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  135.461744] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  135.461815] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  135.461887] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 0000000029aaf162
[  135.461962] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  135.462035] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000029aaf162
[  135.462118] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  135.462165] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  135.462202] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000029aaf162
[  135.462281] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000071ef6b0b to 0000000029aaf162
[  135.462354] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000029aaf162
[  135.462442] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000029aaf162 nonblocking
[  135.462556] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  135.462643] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  135.467804] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7687, diff=1, hw=0 hw_last=0
[  135.467920] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000029aaf162
[  135.467991] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  135.468055] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  135.468116] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  135.468178] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  135.468242] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000029aaf162
[  135.484382] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7688, diff=1, hw=0 hw_last=0
[  135.500959] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7689, diff=1, hw=0 hw_last=0
[  135.517537] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7690, diff=1, hw=0 hw_last=0
[  135.534116] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7691, diff=1, hw=0 hw_last=0
[  135.550696] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7692, diff=1, hw=0 hw_last=0
[  135.567276] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7693, diff=1, hw=0 hw_last=0
[  135.583854] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7694, diff=1, hw=0 hw_last=0
[  135.600434] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7695, diff=1, hw=0 hw_last=0
[  135.617014] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7696, diff=1, hw=0 hw_last=0
[  135.633599] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7697, diff=1, hw=0 hw_last=0
[  135.650170] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7698, diff=1, hw=0 hw_last=0
[  135.666749] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7699, diff=1, hw=0 hw_last=0
[  135.683328] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7700, diff=1, hw=0 hw_last=0
[  135.699907] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7701, diff=1, hw=0 hw_last=0
[  135.716487] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7702, diff=1, hw=0 hw_last=0
[  136.292794] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000007967e7cb to 00000000f37c832b
[  136.292868] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000f37c832b
[  136.292946] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  136.293019] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  136.293092] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  136.293172] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 00000000f37c832b
[  136.293247] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f37c832b
[  136.293320] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  136.293392] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  136.293464] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  136.293537] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  136.293609] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f37c832b
[  136.295040] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  136.296766] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7737, diff=1, hw=0 hw_last=0
[  136.313348] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7738, diff=1, hw=0 hw_last=0
[  136.329923] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7739, diff=1, hw=0 hw_last=0
[  136.346500] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7740, diff=1, hw=0 hw_last=0
[  136.363084] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7741, diff=1, hw=0 hw_last=0
[  136.379662] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7742, diff=1, hw=0 hw_last=0
[  136.396241] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7743, diff=1, hw=0 hw_last=0
[  136.412822] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7744, diff=1, hw=0 hw_last=0
[  136.429401] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7745, diff=1, hw=0 hw_last=0
[  136.445982] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7746, diff=1, hw=0 hw_last=0
[  136.462558] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7747, diff=1, hw=0 hw_last=0
[  136.479138] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7748, diff=1, hw=0 hw_last=0
[  136.495714] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7749, diff=1, hw=0 hw_last=0
[  136.512294] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7750, diff=1, hw=0 hw_last=0
[  136.522726] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  136.522844] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f37c832b
[  136.522931] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  136.523004] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000087081e28 state to 00000000f37c832b
[  136.523082] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  136.523154] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 00000000f37c832b
[  136.523234] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 0000000087081e28
[  136.523309] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  136.523380] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  136.523451] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  136.523522] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  136.523597] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  136.523668] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  136.523743] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  136.523814] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  136.523929] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 00000000f37c832b
[  136.524012] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  136.524088] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000f37c832b
[  136.524172] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  136.524221] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  136.524258] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000f37c832b
[  136.524340] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000000ace560b to 00000000f37c832b
[  136.524414] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000f37c832b
[  136.524505] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f37c832b nonblocking
[  136.524621] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  136.524707] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  136.528870] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7751, diff=1, hw=0 hw_last=0
[  136.528958] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f37c832b
[  136.529027] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  136.529090] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  136.529152] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  136.529215] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  136.529279] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f37c832b
[  136.545449] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7752, diff=1, hw=0 hw_last=0
[  136.562027] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7753, diff=1, hw=0 hw_last=0
[  136.578608] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7754, diff=1, hw=0 hw_last=0
[  136.595186] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7755, diff=1, hw=0 hw_last=0
[  136.611765] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7756, diff=1, hw=0 hw_last=0
[  136.628345] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7757, diff=1, hw=0 hw_last=0
[  136.644926] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7758, diff=1, hw=0 hw_last=0
[  136.661503] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7759, diff=1, hw=0 hw_last=0
[  136.678085] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7760, diff=1, hw=0 hw_last=0
[  136.694663] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7761, diff=1, hw=0 hw_last=0
[  136.711239] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7762, diff=1, hw=0 hw_last=0
[  136.727818] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7763, diff=1, hw=0 hw_last=0
[  136.744399] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7764, diff=1, hw=0 hw_last=0
[  136.760976] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7765, diff=1, hw=0 hw_last=0
[  136.777555] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7766, diff=1, hw=0 hw_last=0
[  136.794134] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7767, diff=1, hw=0 hw_last=0
[  136.810713] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7768, diff=1, hw=0 hw_last=0
[  136.827294] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7769, diff=1, hw=0 hw_last=0
[  136.843875] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7770, diff=1, hw=0 hw_last=0
[  136.860453] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7771, diff=1, hw=0 hw_last=0
[  136.877031] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7772, diff=1, hw=0 hw_last=0
[  136.877454] systemd-journald[214]: Data hash table of /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal has a fill level at 75.1 (2732 of 3640 items, 2097152 file size, 767 bytes per hash table item), suggesting rotation.
[  136.893611] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7773, diff=1, hw=0 hw_last=0
[  136.902038] systemd-journald[214]: /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal: Journal header limits reached or header out-of-date, rotating.
[  136.910191] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7774, diff=1, hw=0 hw_last=0
[  136.926771] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7775, diff=1, hw=0 hw_last=0
[  136.943351] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7776, diff=1, hw=0 hw_last=0
[  136.959928] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7777, diff=1, hw=0 hw_last=0
[  136.976506] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7778, diff=1, hw=0 hw_last=0
[  136.993086] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7779, diff=1, hw=0 hw_last=0
[  137.009669] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7780, diff=1, hw=0 hw_last=0
[  137.026244] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7781, diff=1, hw=0 hw_last=0
[  137.042824] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7782, diff=1, hw=0 hw_last=0
[  137.059402] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7783, diff=1, hw=0 hw_last=0
[  137.075982] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7784, diff=1, hw=0 hw_last=0
[  137.092560] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7785, diff=1, hw=0 hw_last=0
[  137.109140] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7786, diff=1, hw=0 hw_last=0
[  137.125720] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7787, diff=1, hw=0 hw_last=0
[  137.142299] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7788, diff=1, hw=0 hw_last=0
[  137.158880] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7789, diff=1, hw=0 hw_last=0
[  137.175456] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7790, diff=1, hw=0 hw_last=0
[  137.192036] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7791, diff=1, hw=0 hw_last=0
[  137.208615] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7792, diff=1, hw=0 hw_last=0
[  137.225195] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7793, diff=1, hw=0 hw_last=0
[  137.241773] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7794, diff=1, hw=0 hw_last=0
[  137.258356] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7795, diff=1, hw=0 hw_last=0
[  137.274932] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7796, diff=1, hw=0 hw_last=0
[  137.291510] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7797, diff=1, hw=0 hw_last=0
[  137.308092] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7798, diff=1, hw=0 hw_last=0
[  137.324674] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7799, diff=1, hw=0 hw_last=0
[  137.335536] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  137.335658] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 7800 to client
[  137.341257] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7800, diff=1, hw=0 hw_last=0
[  137.350939] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  137.351034] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000eae20a14
[  137.351120] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  137.351195] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000ec98bd42 state to 00000000eae20a14
[  137.351273] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  137.351346] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000adb7ad91 state to 00000000eae20a14
[  137.351426] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000ec98bd42
[  137.351502] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  137.351574] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  137.351645] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  137.351717] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  137.351792] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  137.351888] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  137.351976] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  137.352055] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  137.352128] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 00000000eae20a14
[  137.352204] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  137.352277] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000eae20a14
[  137.352360] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  137.352413] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  137.352450] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000eae20a14
[  137.352529] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000006fb5b2d2 to 00000000eae20a14
[  137.424151] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7805, diff=1, hw=0 hw_last=0
[  137.440732] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7806, diff=1, hw=0 hw_last=0
[  137.457307] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7807, diff=1, hw=0 hw_last=0
[  137.473890] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7808, diff=1, hw=0 hw_last=0
[  137.490471] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7809, diff=1, hw=0 hw_last=0
[  137.507049] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7810, diff=1, hw=0 hw_last=0
[  137.523625] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7811, diff=1, hw=0 hw_last=0
[  137.540205] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7812, diff=1, hw=0 hw_last=0
[  137.556782] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7813, diff=1, hw=0 hw_last=0
[  137.573362] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7814, diff=1, hw=0 hw_last=0
[  137.582967] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  137.583082] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000eae20a14
[  137.583168] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  137.583241] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000ec98bd42 state to 00000000eae20a14
[  137.583319] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  137.583392] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000adb7ad91 state to 00000000eae20a14
[  137.583473] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000ec98bd42
[  137.583547] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  137.583619] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  137.583691] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  137.583762] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  137.583837] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  137.583943] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  137.584023] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  137.584099] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  137.584171] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 00000000eae20a14
[  137.584248] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  137.584323] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000eae20a14
[  137.584406] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  137.584456] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  137.584493] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000eae20a14
[  137.584575] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000fde3661d to 00000000eae20a14
[  137.584649] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000eae20a14
[  137.584738] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000eae20a14 nonblocking
[  137.584859] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  137.584939] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  137.589938] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7815, diff=1, hw=0 hw_last=0
[  137.590035] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000eae20a14
[  137.590105] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  137.590169] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  137.590231] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  137.590293] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  137.590356] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000eae20a14
[  137.606517] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7816, diff=1, hw=0 hw_last=0
[  137.623099] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7817, diff=1, hw=0 hw_last=0
[  137.639675] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7818, diff=1, hw=0 hw_last=0
[  137.656255] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7819, diff=1, hw=0 hw_last=0
[  137.672839] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7820, diff=1, hw=0 hw_last=0
[  137.689416] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7821, diff=1, hw=0 hw_last=0
[  137.705991] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7822, diff=1, hw=0 hw_last=0
[  137.722572] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7823, diff=1, hw=0 hw_last=0
[  137.739152] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7824, diff=1, hw=0 hw_last=0
[  137.755730] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7825, diff=1, hw=0 hw_last=0
[  137.772309] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7826, diff=1, hw=0 hw_last=0
[  137.788887] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7827, diff=1, hw=0 hw_last=0
[  137.805465] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7828, diff=1, hw=0 hw_last=0
[  137.822045] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7829, diff=1, hw=0 hw_last=0
[  137.838624] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7830, diff=1, hw=0 hw_last=0
[  137.855203] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7831, diff=1, hw=0 hw_last=0
[  137.871782] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7832, diff=1, hw=0 hw_last=0
[  137.888361] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7833, diff=1, hw=0 hw_last=0
[  137.904944] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7834, diff=1, hw=0 hw_last=0
[  137.921521] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7835, diff=1, hw=0 hw_last=0
[  137.938101] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7836, diff=1, hw=0 hw_last=0
[  137.954681] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7837, diff=1, hw=0 hw_last=0
[  137.971259] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7838, diff=1, hw=0 hw_last=0
[  137.987837] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7839, diff=1, hw=0 hw_last=0
[  138.004419] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7840, diff=1, hw=0 hw_last=0
[  138.020996] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7841, diff=1, hw=0 hw_last=0
[  138.037574] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7842, diff=1, hw=0 hw_last=0
[  138.054154] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7843, diff=1, hw=0 hw_last=0
[  138.070733] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7844, diff=1, hw=0 hw_last=0
[  138.087312] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7845, diff=1, hw=0 hw_last=0
[  138.103891] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7846, diff=1, hw=0 hw_last=0
[  138.120471] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7847, diff=1, hw=0 hw_last=0
[  138.137049] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7848, diff=1, hw=0 hw_last=0
[  138.153629] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7849, diff=1, hw=0 hw_last=0
[  138.170210] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7850, diff=1, hw=0 hw_last=0
[  138.186788] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7851, diff=1, hw=0 hw_last=0
[  138.203367] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7852, diff=1, hw=0 hw_last=0
[  138.219946] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7853, diff=1, hw=0 hw_last=0
[  138.236528] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7854, diff=1, hw=0 hw_last=0
[  138.253106] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7855, diff=1, hw=0 hw_last=0
[  138.269687] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7856, diff=1, hw=0 hw_last=0
[  138.286264] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7857, diff=1, hw=0 hw_last=0
[  138.302843] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7858, diff=1, hw=0 hw_last=0
[  138.319422] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7859, diff=1, hw=0 hw_last=0
[  138.336005] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7860, diff=1, hw=0 hw_last=0
[  138.352584] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7861, diff=1, hw=0 hw_last=0
[  138.358700] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  138.358818] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 7862 to client
[  138.362102] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  138.362202] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000305e034
[  138.362285] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  138.362359] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000215b6887 state to 000000000305e034
[  138.362437] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  138.362510] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 000000000305e034
[  138.362590] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000215b6887
[  138.362665] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  138.362737] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  138.362808] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  138.362880] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  138.362956] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  138.363027] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  138.363102] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  138.363175] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  138.363246] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000000305e034
[  138.363321] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  138.363394] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000000305e034
[  138.363474] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  138.363525] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  138.363562] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000305e034
[  138.363641] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000eae20a14 to 000000000305e034
[  138.363715] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000305e034
[  138.363793] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  138.363880] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  138.363959] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  138.364041] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000000305e034
[  138.364119] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000305e034
[  138.364193] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  138.364266] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  138.364338] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  138.364410] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  138.364483] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000305e034
[  138.365930] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  138.369166] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7862, diff=1, hw=0 hw_last=0
[  138.385746] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7863, diff=1, hw=0 hw_last=0
[  138.402322] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7864, diff=1, hw=0 hw_last=0
[  138.418900] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7865, diff=1, hw=0 hw_last=0
[  138.435483] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7866, diff=1, hw=0 hw_last=0
[  138.452061] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7867, diff=1, hw=0 hw_last=0
[  138.468639] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7868, diff=1, hw=0 hw_last=0
[  138.485221] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7869, diff=1, hw=0 hw_last=0
[  138.501797] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7870, diff=1, hw=0 hw_last=0
[  138.518378] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7871, diff=1, hw=0 hw_last=0
[  138.534956] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7872, diff=1, hw=0 hw_last=0
[  138.551538] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7873, diff=1, hw=0 hw_last=0
[  138.596111] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  138.596184] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000000305e034
[  138.596260] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  138.596334] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000000305e034
[  138.596418] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  138.596468] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  138.596506] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000305e034
[  138.596587] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000006fb5b2d2 to 000000000305e034
[  138.596663] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000305e034
[  138.596751] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000305e034 nonblocking
[  138.596874] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  138.596954] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  138.601270] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7876, diff=1, hw=0 hw_last=0
[  138.601361] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000305e034
[  138.601429] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  138.601493] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  138.601555] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  138.601619] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  138.601684] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000305e034
[  138.617849] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7877, diff=1, hw=0 hw_last=0
[  138.634427] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7878, diff=1, hw=0 hw_last=0
[  138.651006] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7879, diff=1, hw=0 hw_last=0
[  138.667590] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7880, diff=1, hw=0 hw_last=0
[  138.684165] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7881, diff=1, hw=0 hw_last=0
[  138.700746] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7882, diff=1, hw=0 hw_last=0
[  138.717326] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7883, diff=1, hw=0 hw_last=0
[  138.733903] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7884, diff=1, hw=0 hw_last=0
[  138.750482] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7885, diff=1, hw=0 hw_last=0
[  138.767062] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7886, diff=1, hw=0 hw_last=0
[  138.783643] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7887, diff=1, hw=0 hw_last=0
[  138.800218] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7888, diff=1, hw=0 hw_last=0
[  138.816797] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7889, diff=1, hw=0 hw_last=0
[  138.833376] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7890, diff=1, hw=0 hw_last=0
[  138.849956] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7891, diff=1, hw=0 hw_last=0
[  138.866534] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7892, diff=1, hw=0 hw_last=0
[  138.883114] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7893, diff=1, hw=0 hw_last=0
[  138.899693] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7894, diff=1, hw=0 hw_last=0
[  138.916276] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7895, diff=1, hw=0 hw_last=0
[  138.932854] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7896, diff=1, hw=0 hw_last=0
[  138.949431] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7897, diff=1, hw=0 hw_last=0
[  138.966011] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7898, diff=1, hw=0 hw_last=0
[  138.982591] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7899, diff=1, hw=0 hw_last=0
[  138.999174] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7900, diff=1, hw=0 hw_last=0
[  139.015747] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7901, diff=1, hw=0 hw_last=0
[  139.032327] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7902, diff=1, hw=0 hw_last=0
[  139.048906] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7903, diff=1, hw=0 hw_last=0
[  139.065486] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7904, diff=1, hw=0 hw_last=0
[  139.082065] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7905, diff=1, hw=0 hw_last=0
[  139.098644] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7906, diff=1, hw=0 hw_last=0
[  139.115222] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7907, diff=1, hw=0 hw_last=0
[  139.131802] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7908, diff=1, hw=0 hw_last=0
[  139.148381] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7909, diff=1, hw=0 hw_last=0
[  139.164960] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7910, diff=1, hw=0 hw_last=0
[  139.181540] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7911, diff=1, hw=0 hw_last=0
[  139.198120] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7912, diff=1, hw=0 hw_last=0
[  139.214698] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7913, diff=1, hw=0 hw_last=0
[  139.231277] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7914, diff=1, hw=0 hw_last=0
[  139.247858] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7915, diff=1, hw=0 hw_last=0
[  139.264436] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7916, diff=1, hw=0 hw_last=0
[  139.281017] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7917, diff=1, hw=0 hw_last=0
[  139.297597] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7918, diff=1, hw=0 hw_last=0
[  139.314174] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7919, diff=1, hw=0 hw_last=0
[  139.390534] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  139.390608] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000e8543c49 state to 00000000d7e48c6b
[  139.390690] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000bac3ec2d
[  139.390765] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  139.390837] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  139.390909] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  139.390984] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  139.391067] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  139.391145] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  139.391221] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  139.391293] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  139.391365] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 00000000d7e48c6b
[  139.391440] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  139.391513] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000d7e48c6b
[  139.391594] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  139.391641] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  139.391678] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000d7e48c6b
[  139.391758] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000f37c832b to 00000000d7e48c6b
[  139.391832] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000d7e48c6b
[  139.391934] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  139.392010] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  139.392085] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  139.392168] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 00000000d7e48c6b
[  139.392245] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000d7e48c6b
[  139.392318] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  139.392391] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  139.392463] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  139.392535] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  139.392608] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000d7e48c6b
[  139.394104] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  139.397077] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7924, diff=1, hw=0 hw_last=0
[  139.413653] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7925, diff=1, hw=0 hw_last=0
[  139.430231] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7926, diff=1, hw=0 hw_last=0
[  139.446811] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7927, diff=1, hw=0 hw_last=0
[  139.463396] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7928, diff=1, hw=0 hw_last=0
[  139.479970] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7929, diff=1, hw=0 hw_last=0
[  139.496551] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7930, diff=1, hw=0 hw_last=0
[  139.513129] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7931, diff=1, hw=0 hw_last=0
[  139.529711] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7932, diff=1, hw=0 hw_last=0
[  139.546288] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7933, diff=1, hw=0 hw_last=0
[  139.562867] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7934, diff=1, hw=0 hw_last=0
[  139.579446] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7935, diff=1, hw=0 hw_last=0
[  139.596022] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7936, diff=1, hw=0 hw_last=0
[  139.612610] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7937, diff=1, hw=0 hw_last=0
[  139.621994] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  139.622109] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000d7e48c6b
[  139.622197] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  139.622270] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000bac3ec2d state to 00000000d7e48c6b
[  139.622349] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  139.622422] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000e8543c49 state to 00000000d7e48c6b
[  139.622502] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000bac3ec2d
[  139.622577] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  139.622649] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  139.622720] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  139.622791] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  139.622871] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  139.622943] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  139.623019] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  139.623092] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  139.623163] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 00000000d7e48c6b
[  139.623241] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  139.623315] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000d7e48c6b
[  139.623400] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  139.623448] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  139.623484] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000d7e48c6b
[  139.623564] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000007967e7cb to 00000000d7e48c6b
[  139.623639] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000d7e48c6b
[  139.623728] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000d7e48c6b nonblocking
[  139.623873] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  139.623971] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  139.629181] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7938, diff=1, hw=0 hw_last=0
[  139.629273] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000d7e48c6b
[  139.629361] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  139.629436] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  139.629510] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  139.629584] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  139.794973] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7948, diff=1, hw=0 hw_last=0
[  139.811549] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7949, diff=1, hw=0 hw_last=0
[  139.828128] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7950, diff=1, hw=0 hw_last=0
[  139.844707] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7951, diff=1, hw=0 hw_last=0
[  139.861286] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7952, diff=1, hw=0 hw_last=0
[  139.877865] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7953, diff=1, hw=0 hw_last=0
[  139.894444] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7954, diff=1, hw=0 hw_last=0
[  139.911024] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7955, diff=1, hw=0 hw_last=0
[  139.927603] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7956, diff=1, hw=0 hw_last=0
[  139.944187] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7957, diff=1, hw=0 hw_last=0
[  139.960764] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7958, diff=1, hw=0 hw_last=0
[  139.977343] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7959, diff=1, hw=0 hw_last=0
[  139.993921] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7960, diff=1, hw=0 hw_last=0
[  140.010501] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7961, diff=1, hw=0 hw_last=0
[  140.027080] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7962, diff=1, hw=0 hw_last=0
[  140.043659] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7963, diff=1, hw=0 hw_last=0
[  140.060239] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7964, diff=1, hw=0 hw_last=0
[  140.076816] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7965, diff=1, hw=0 hw_last=0
[  140.093396] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7966, diff=1, hw=0 hw_last=0
[  140.109974] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7967, diff=1, hw=0 hw_last=0
[  140.126555] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7968, diff=1, hw=0 hw_last=0
[  140.143133] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7969, diff=1, hw=0 hw_last=0
[  140.159712] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7970, diff=1, hw=0 hw_last=0
[  140.176292] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7971, diff=1, hw=0 hw_last=0
[  140.192871] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7972, diff=1, hw=0 hw_last=0
[  140.209451] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7973, diff=1, hw=0 hw_last=0
[  140.226030] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7974, diff=1, hw=0 hw_last=0
[  140.242609] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7975, diff=1, hw=0 hw_last=0
[  140.259188] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7976, diff=1, hw=0 hw_last=0
[  140.275768] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7977, diff=1, hw=0 hw_last=0
[  140.292346] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7978, diff=1, hw=0 hw_last=0
[  140.308926] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7979, diff=1, hw=0 hw_last=0
[  140.325507] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7980, diff=1, hw=0 hw_last=0
[  140.342085] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7981, diff=1, hw=0 hw_last=0
[  140.358664] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7982, diff=1, hw=0 hw_last=0
[  140.375243] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7983, diff=1, hw=0 hw_last=0
[  140.391823] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7984, diff=1, hw=0 hw_last=0
[  140.408406] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7985, diff=1, hw=0 hw_last=0
[  140.424980] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7986, diff=1, hw=0 hw_last=0
[  140.441560] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7987, diff=1, hw=0 hw_last=0
[  140.458141] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7988, diff=1, hw=0 hw_last=0
[  140.471497] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  140.471621] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 7989 to client
[  140.474726] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=7989, diff=1, hw=0 hw_last=0
[  140.483926] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  140.484020] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000c0cf118d
[  140.484103] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  140.484176] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000082b4fa6a state to 00000000c0cf118d
[  140.484253] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  140.484325] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 00000000c0cf118d
[  140.484405] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000082b4fa6a
[  140.484478] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  140.484550] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  140.484621] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  140.484692] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  140.484768] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  140.484839] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  140.484914] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  140.484986] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  140.485058] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 00000000c0cf118d
[  140.485133] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  140.485206] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000c0cf118d
[  140.485286] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  140.485337] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  140.485373] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000c0cf118d
[  140.485454] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000029aaf162 to 00000000c0cf118d
[  140.789724] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8008, diff=1, hw=0 hw_last=0
[  140.806302] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8009, diff=1, hw=0 hw_last=0
[  140.822883] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8010, diff=1, hw=0 hw_last=0
[  140.839462] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8011, diff=1, hw=0 hw_last=0
[  140.856043] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8012, diff=1, hw=0 hw_last=0
[  140.872622] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8013, diff=1, hw=0 hw_last=0
[  140.889199] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8014, diff=1, hw=0 hw_last=0
[  140.905776] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8015, diff=1, hw=0 hw_last=0
[  140.922356] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8016, diff=1, hw=0 hw_last=0
[  140.938934] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8017, diff=1, hw=0 hw_last=0
[  140.955513] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8018, diff=1, hw=0 hw_last=0
[  140.972093] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8019, diff=1, hw=0 hw_last=0
[  140.988672] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8020, diff=1, hw=0 hw_last=0
[  141.005252] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8021, diff=1, hw=0 hw_last=0
[  141.021834] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8022, diff=1, hw=0 hw_last=0
[  141.038413] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8023, diff=1, hw=0 hw_last=0
[  141.054989] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8024, diff=1, hw=0 hw_last=0
[  141.071569] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8025, diff=1, hw=0 hw_last=0
[  141.088148] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8026, diff=1, hw=0 hw_last=0
[  141.104728] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8027, diff=1, hw=0 hw_last=0
[  141.121307] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8028, diff=1, hw=0 hw_last=0
[  141.137885] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8029, diff=1, hw=0 hw_last=0
[  141.154465] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8030, diff=1, hw=0 hw_last=0
[  141.171043] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8031, diff=1, hw=0 hw_last=0
[  141.187622] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8032, diff=1, hw=0 hw_last=0
[  141.204202] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8033, diff=1, hw=0 hw_last=0
[  141.220781] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8034, diff=1, hw=0 hw_last=0
[  141.237361] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8035, diff=1, hw=0 hw_last=0
[  141.253940] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8036, diff=1, hw=0 hw_last=0
[  141.270520] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8037, diff=1, hw=0 hw_last=0
[  141.287099] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8038, diff=1, hw=0 hw_last=0
[  141.303678] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8039, diff=1, hw=0 hw_last=0
[  141.320258] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8040, diff=1, hw=0 hw_last=0
[  141.336841] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8041, diff=1, hw=0 hw_last=0
[  141.353417] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8042, diff=1, hw=0 hw_last=0
[  141.369995] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8043, diff=1, hw=0 hw_last=0
[  141.386573] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8044, diff=1, hw=0 hw_last=0
[  141.403154] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8045, diff=1, hw=0 hw_last=0
[  141.419734] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8046, diff=1, hw=0 hw_last=0
[  141.436311] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8047, diff=1, hw=0 hw_last=0
[  141.452890] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8048, diff=1, hw=0 hw_last=0
[  141.469471] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8049, diff=1, hw=0 hw_last=0
[  141.486049] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8050, diff=1, hw=0 hw_last=0
[  141.502629] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8051, diff=1, hw=0 hw_last=0
[  141.519208] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8052, diff=1, hw=0 hw_last=0
[  141.535789] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8053, diff=1, hw=0 hw_last=0
[  141.546228] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  141.546346] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 8054 to client
[  141.552390] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8054, diff=1, hw=0 hw_last=0
[  141.561627] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  141.561723] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000018d86a98
[  141.561806] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  141.561880] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000fefb5c61 state to 0000000018d86a98
[  141.561957] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  141.562031] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 0000000018d86a98
[  141.562113] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000fefb5c61
[  141.562188] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  141.562260] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  141.562333] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  141.562405] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  141.562480] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  141.562556] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  141.562638] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  141.562715] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  141.793559] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000fefb5c61 state to 0000000018d86a98
[  141.793637] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  141.793709] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 0000000018d86a98
[  141.793790] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000fefb5c61
[  141.793865] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  141.793937] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  141.794009] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  141.794081] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  141.794156] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  141.794227] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  141.794304] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  141.794375] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  141.794447] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 0000000018d86a98
[  141.794522] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  141.794596] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000018d86a98
[  141.794678] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  141.794727] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  141.794763] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000018d86a98
[  141.794844] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000029aaf162 to 0000000018d86a98
[  141.794918] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000018d86a98
[  141.795007] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000018d86a98 nonblocking
[  141.795126] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  141.795204] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  141.801055] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8069, diff=1, hw=0 hw_last=0
[  141.801152] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000018d86a98
[  141.801224] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  141.801288] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  141.801350] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  141.801413] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  141.801477] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000018d86a98
[  141.817637] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8070, diff=1, hw=0 hw_last=0
[  141.834216] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8071, diff=1, hw=0 hw_last=0
[  141.850794] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8072, diff=1, hw=0 hw_last=0
[  141.867373] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8073, diff=1, hw=0 hw_last=0
[  141.883952] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8074, diff=1, hw=0 hw_last=0
[  141.900534] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8075, diff=1, hw=0 hw_last=0
[  141.917111] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8076, diff=1, hw=0 hw_last=0
[  141.933692] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8077, diff=1, hw=0 hw_last=0
[  141.950274] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8078, diff=1, hw=0 hw_last=0
[  141.966851] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8079, diff=1, hw=0 hw_last=0
[  141.983426] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8080, diff=1, hw=0 hw_last=0
[  142.000008] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8081, diff=1, hw=0 hw_last=0
[  142.016583] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8082, diff=1, hw=0 hw_last=0
[  142.033162] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8083, diff=1, hw=0 hw_last=0
[  142.049742] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8084, diff=1, hw=0 hw_last=0
[  142.066320] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8085, diff=1, hw=0 hw_last=0
[  142.082902] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8086, diff=1, hw=0 hw_last=0
[  142.099479] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8087, diff=1, hw=0 hw_last=0
[  142.116065] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8088, diff=1, hw=0 hw_last=0
[  142.132641] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8089, diff=1, hw=0 hw_last=0
[  142.149220] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8090, diff=1, hw=0 hw_last=0
[  142.165798] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8091, diff=1, hw=0 hw_last=0
[  142.182375] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8092, diff=1, hw=0 hw_last=0
[  142.198954] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8093, diff=1, hw=0 hw_last=0
[  142.215535] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8094, diff=1, hw=0 hw_last=0
[  142.232115] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8095, diff=1, hw=0 hw_last=0
[  142.248692] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8096, diff=1, hw=0 hw_last=0
[  142.265271] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8097, diff=1, hw=0 hw_last=0
[  142.281852] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8098, diff=1, hw=0 hw_last=0
[  142.298431] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8099, diff=1, hw=0 hw_last=0
[  142.315009] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8100, diff=1, hw=0 hw_last=0
[  142.331592] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8101, diff=1, hw=0 hw_last=0
[  142.348168] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8102, diff=1, hw=0 hw_last=0
[  142.364746] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8103, diff=1, hw=0 hw_last=0
[  142.381328] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8104, diff=1, hw=0 hw_last=0
[  142.397906] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8105, diff=1, hw=0 hw_last=0
[  142.414485] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8106, diff=1, hw=0 hw_last=0
[  142.547117] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8114, diff=1, hw=0 hw_last=0
[  142.563697] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8115, diff=1, hw=0 hw_last=0
[  142.580280] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8116, diff=1, hw=0 hw_last=0
[  142.593201] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  142.593320] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 8117 to client
[  142.596862] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8117, diff=1, hw=0 hw_last=0
[  142.606608] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  142.606700] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000ab379aee
[  142.606783] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  142.606856] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000055579822 state to 00000000ab379aee
[  142.606934] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  142.607007] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 00000000ab379aee
[  142.607087] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000055579822
[  142.607163] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  142.607234] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  142.607305] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  142.607378] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  142.607452] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  142.607523] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  142.607599] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  142.607671] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  142.607742] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 00000000ab379aee
[  142.607834] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  142.607912] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000ab379aee
[  142.607996] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  142.608043] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  142.608080] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000ab379aee
[  142.608160] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000d7e48c6b to 00000000ab379aee
[  142.608234] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000ab379aee
[  142.608315] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  142.608387] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  142.608461] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  142.608543] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 00000000ab379aee
[  142.608620] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ab379aee
[  142.608693] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  142.608767] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  142.608840] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  142.608913] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  142.608987] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ab379aee
[  142.610490] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  142.613443] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8118, diff=1, hw=0 hw_last=0
[  142.630019] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8119, diff=1, hw=0 hw_last=0
[  142.646598] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8120, diff=1, hw=0 hw_last=0
[  142.663181] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8121, diff=1, hw=0 hw_last=0
[  142.679762] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8122, diff=1, hw=0 hw_last=0
[  142.696338] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8123, diff=1, hw=0 hw_last=0
[  142.712917] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8124, diff=1, hw=0 hw_last=0
[  142.729498] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8125, diff=1, hw=0 hw_last=0
[  142.746102] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8126, diff=1, hw=0 hw_last=0
[  142.762658] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8127, diff=1, hw=0 hw_last=0
[  142.779243] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8128, diff=1, hw=0 hw_last=0
[  142.795815] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8129, diff=1, hw=0 hw_last=0
[  142.812390] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8130, diff=1, hw=0 hw_last=0
[  142.813076] systemd-journald[214]: Data hash table of /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal has a fill level at 75.0 (2731 of 3640 items, 2097152 file size, 767 bytes per hash table item), suggesting rotation.
[  142.828970] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8131, diff=1, hw=0 hw_last=0
[  142.839065] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  142.839180] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000ab379aee
[  142.839293] systemd-journald[214]: /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal: Journal header limits reached or header out-of-date, rotating.
[  142.839277] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  142.845546] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8132, diff=1, hw=0 hw_last=0
[  142.859364] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000055579822 state to 00000000ab379aee
[  142.859456] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  142.859531] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 00000000ab379aee
[  142.859616] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 0000000055579822
[  142.859693] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  142.859759] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  142.859834] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  142.859901] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  142.859969] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  142.860031] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  142.860096] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  142.860157] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  142.860219] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 00000000ab379aee
[  142.860284] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  142.860630] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000ab379aee
[  142.860707] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000ab379aee nonblocking
[  142.860808] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  142.860903] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  142.862128] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8133, diff=1, hw=0 hw_last=0
[  142.862228] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ab379aee
[  142.862310] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  142.862387] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  142.862464] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  142.862538] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  142.862616] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ab379aee
[  142.878709] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8134, diff=1, hw=0 hw_last=0
[  142.895283] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8135, diff=1, hw=0 hw_last=0
[  142.911861] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8136, diff=1, hw=0 hw_last=0
[  142.928441] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8137, diff=1, hw=0 hw_last=0
[  142.945021] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8138, diff=1, hw=0 hw_last=0
[  142.961598] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8139, diff=1, hw=0 hw_last=0
[  142.978178] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8140, diff=1, hw=0 hw_last=0
[  142.994759] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8141, diff=1, hw=0 hw_last=0
[  143.011339] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8142, diff=1, hw=0 hw_last=0
[  143.027915] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8143, diff=1, hw=0 hw_last=0
[  143.044494] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8144, diff=1, hw=0 hw_last=0
[  143.061072] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8145, diff=1, hw=0 hw_last=0
[  143.077654] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8146, diff=1, hw=0 hw_last=0
[  143.094230] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8147, diff=1, hw=0 hw_last=0
[  143.110810] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8148, diff=1, hw=0 hw_last=0
[  143.127389] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8149, diff=1, hw=0 hw_last=0
[  143.143968] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8150, diff=1, hw=0 hw_last=0
[  143.160550] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8151, diff=1, hw=0 hw_last=0
[  143.177130] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8152, diff=1, hw=0 hw_last=0
[  143.193708] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8153, diff=1, hw=0 hw_last=0
[  143.210288] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8154, diff=1, hw=0 hw_last=0
[  143.226864] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8155, diff=1, hw=0 hw_last=0
[  143.243443] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8156, diff=1, hw=0 hw_last=0
[  143.260023] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8157, diff=1, hw=0 hw_last=0
[  143.276603] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8158, diff=1, hw=0 hw_last=0
[  143.293181] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8159, diff=1, hw=0 hw_last=0
[  143.309760] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8160, diff=1, hw=0 hw_last=0
[  143.326340] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8161, diff=1, hw=0 hw_last=0
[  143.342919] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8162, diff=1, hw=0 hw_last=0
[  143.359498] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8163, diff=1, hw=0 hw_last=0
[  143.376084] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8164, diff=1, hw=0 hw_last=0
[  143.392657] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8165, diff=1, hw=0 hw_last=0
[  143.409236] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8166, diff=1, hw=0 hw_last=0
[  143.425817] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8167, diff=1, hw=0 hw_last=0
[  143.442394] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8168, diff=1, hw=0 hw_last=0
[  143.458974] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8169, diff=1, hw=0 hw_last=0
[  143.475566] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8170, diff=1, hw=0 hw_last=0
[  143.492135] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8171, diff=1, hw=0 hw_last=0
[  143.508712] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8172, diff=1, hw=0 hw_last=0
[  143.525291] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8173, diff=1, hw=0 hw_last=0
[  143.541870] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8174, diff=1, hw=0 hw_last=0
[  143.558449] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8175, diff=1, hw=0 hw_last=0
[  143.575028] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8176, diff=1, hw=0 hw_last=0
[  143.591610] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8177, diff=1, hw=0 hw_last=0
[  143.608190] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8178, diff=1, hw=0 hw_last=0
[  143.624771] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8179, diff=1, hw=0 hw_last=0
[  143.637056] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  143.637166] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 8180 to client
[  143.641353] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8180, diff=1, hw=0 hw_last=0
[  143.650439] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  143.650522] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000cc24793
[  143.807145] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8190, diff=1, hw=0 hw_last=0
[  143.823725] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8191, diff=1, hw=0 hw_last=0
[  143.840302] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8192, diff=1, hw=0 hw_last=0
[  143.856880] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8193, diff=1, hw=0 hw_last=0
[  143.873461] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8194, diff=1, hw=0 hw_last=0
[  143.882243] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  143.882349] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000cc24793
[  143.882424] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  143.882486] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000002cafbe1b state to 000000000cc24793
[  143.882552] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  143.882614] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a743c9a8 state to 000000000cc24793
[  143.882683] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 000000002cafbe1b
[  143.882746] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  143.882806] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  143.882865] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  143.882925] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  143.882987] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  143.883047] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  143.883111] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  143.883172] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  143.883232] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 000000000cc24793
[  143.883296] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  143.883359] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000000cc24793
[  143.883430] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  143.883477] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  143.883509] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000cc24793
[  143.883577] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000eae20a14 to 000000000cc24793
[  143.883640] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000cc24793
[  143.883718] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000cc24793 nonblocking
[  143.883859] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  143.883941] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  143.890036] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8195, diff=1, hw=0 hw_last=0
[  143.890132] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000cc24793
[  143.890200] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  143.890265] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  143.890327] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  143.890390] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  143.890453] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000cc24793
[  143.906616] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8196, diff=1, hw=0 hw_last=0
[  143.923194] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8197, diff=1, hw=0 hw_last=0
[  143.939771] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8198, diff=1, hw=0 hw_last=0
[  143.956351] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8199, diff=1, hw=0 hw_last=0
[  143.972931] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8200, diff=1, hw=0 hw_last=0
[  143.989512] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8201, diff=1, hw=0 hw_last=0
[  144.006089] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8202, diff=1, hw=0 hw_last=0
[  144.022669] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8203, diff=1, hw=0 hw_last=0
[  144.039253] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8204, diff=1, hw=0 hw_last=0
[  144.055832] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8205, diff=1, hw=0 hw_last=0
[  144.072404] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8206, diff=1, hw=0 hw_last=0
[  144.088983] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8207, diff=1, hw=0 hw_last=0
[  144.105562] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8208, diff=1, hw=0 hw_last=0
[  144.122141] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8209, diff=1, hw=0 hw_last=0
[  144.138721] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8210, diff=1, hw=0 hw_last=0
[  144.155299] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8211, diff=1, hw=0 hw_last=0
[  144.171879] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8212, diff=1, hw=0 hw_last=0
[  144.188460] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8213, diff=1, hw=0 hw_last=0
[  144.205041] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8214, diff=1, hw=0 hw_last=0
[  144.221620] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8215, diff=1, hw=0 hw_last=0
[  144.238199] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8216, diff=1, hw=0 hw_last=0
[  144.254776] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8217, diff=1, hw=0 hw_last=0
[  144.271354] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8218, diff=1, hw=0 hw_last=0
[  144.287934] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8219, diff=1, hw=0 hw_last=0
[  144.304513] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8220, diff=1, hw=0 hw_last=0
[  144.321092] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8221, diff=1, hw=0 hw_last=0
[  144.337673] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8222, diff=1, hw=0 hw_last=0
[  144.354251] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8223, diff=1, hw=0 hw_last=0
[  144.370832] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8224, diff=1, hw=0 hw_last=0
[  144.387409] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8225, diff=1, hw=0 hw_last=0
[  144.403988] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8226, diff=1, hw=0 hw_last=0
[  144.420570] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8227, diff=1, hw=0 hw_last=0
[  144.437146] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8228, diff=1, hw=0 hw_last=0
[  144.453727] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8229, diff=1, hw=0 hw_last=0
[  144.470307] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8230, diff=1, hw=0 hw_last=0
[  144.486887] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8231, diff=1, hw=0 hw_last=0
[  144.503465] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8232, diff=1, hw=0 hw_last=0
[  144.520042] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8233, diff=1, hw=0 hw_last=0
[  144.536622] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8234, diff=1, hw=0 hw_last=0
[  144.553200] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8235, diff=1, hw=0 hw_last=0
[  144.569780] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8236, diff=1, hw=0 hw_last=0
[  144.586359] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8237, diff=1, hw=0 hw_last=0
[  144.602939] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8238, diff=1, hw=0 hw_last=0
[  144.619519] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8239, diff=1, hw=0 hw_last=0
[  144.636097] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8240, diff=1, hw=0 hw_last=0
[  144.652675] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8241, diff=1, hw=0 hw_last=0
[  144.669255] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8242, diff=1, hw=0 hw_last=0
[  144.685835] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8243, diff=1, hw=0 hw_last=0
[  144.702416] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8244, diff=1, hw=0 hw_last=0
[  144.718993] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8245, diff=1, hw=0 hw_last=0
[  144.735572] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8246, diff=1, hw=0 hw_last=0
[  144.752151] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8247, diff=1, hw=0 hw_last=0
[  144.768737] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8248, diff=1, hw=0 hw_last=0
[  144.775066] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  144.775182] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 8249 to client
[  144.778454] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  144.778548] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000095dd8ec0
[  144.778620] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  144.778682] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000ec98bd42 state to 0000000095dd8ec0
[  144.778749] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  144.778810] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 0000000095dd8ec0
[  144.778878] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000ec98bd42
[  144.778941] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  144.779001] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  144.779062] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  144.779122] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  144.779187] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  144.779247] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  144.779312] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  144.779372] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  144.779432] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 0000000095dd8ec0
[  144.779496] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  144.779557] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000095dd8ec0
[  144.779626] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  144.779671] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  144.779702] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000095dd8ec0
[  144.779771] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000000cc24793 to 0000000095dd8ec0
[  144.779859] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000095dd8ec0
[  144.779930] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  144.779994] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  144.780057] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  144.780128] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 0000000095dd8ec0
[  144.780193] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000095dd8ec0
[  144.780255] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  144.780317] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  144.780378] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  144.780439] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  144.780501] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000095dd8ec0
[  144.781930] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  144.785318] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8249, diff=1, hw=0 hw_last=0
[  144.801895] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8250, diff=1, hw=0 hw_last=0
[  144.818475] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8251, diff=1, hw=0 hw_last=0
[  144.835055] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8252, diff=1, hw=0 hw_last=0
[  144.851635] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8253, diff=1, hw=0 hw_last=0
[  144.868213] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8254, diff=1, hw=0 hw_last=0
[  144.884792] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8255, diff=1, hw=0 hw_last=0
[  144.901374] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8256, diff=1, hw=0 hw_last=0
[  144.917952] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8257, diff=1, hw=0 hw_last=0
[  144.934532] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8258, diff=1, hw=0 hw_last=0
[  145.067158] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8266, diff=1, hw=0 hw_last=0
[  145.083737] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8267, diff=1, hw=0 hw_last=0
[  145.100317] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8268, diff=1, hw=0 hw_last=0
[  145.116898] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8269, diff=1, hw=0 hw_last=0
[  145.133476] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8270, diff=1, hw=0 hw_last=0
[  145.150056] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8271, diff=1, hw=0 hw_last=0
[  145.166637] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8272, diff=1, hw=0 hw_last=0
[  145.183216] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8273, diff=1, hw=0 hw_last=0
[  145.199790] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8274, diff=1, hw=0 hw_last=0
[  145.216369] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8275, diff=1, hw=0 hw_last=0
[  145.232948] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8276, diff=1, hw=0 hw_last=0
[  145.249527] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8277, diff=1, hw=0 hw_last=0
[  145.266107] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8278, diff=1, hw=0 hw_last=0
[  145.282685] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8279, diff=1, hw=0 hw_last=0
[  145.299265] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8280, diff=1, hw=0 hw_last=0
[  145.315845] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8281, diff=1, hw=0 hw_last=0
[  145.332426] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8282, diff=1, hw=0 hw_last=0
[  145.349005] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8283, diff=1, hw=0 hw_last=0
[  145.365585] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8284, diff=1, hw=0 hw_last=0
[  145.382161] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8285, diff=1, hw=0 hw_last=0
[  145.398740] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8286, diff=1, hw=0 hw_last=0
[  145.415319] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8287, diff=1, hw=0 hw_last=0
[  145.431899] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8288, diff=1, hw=0 hw_last=0
[  145.448478] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8289, diff=1, hw=0 hw_last=0
[  145.465059] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8290, diff=1, hw=0 hw_last=0
[  145.481638] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8291, diff=1, hw=0 hw_last=0
[  145.498216] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8292, diff=1, hw=0 hw_last=0
[  145.514795] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8293, diff=1, hw=0 hw_last=0
[  145.531375] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8294, diff=1, hw=0 hw_last=0
[  145.547954] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8295, diff=1, hw=0 hw_last=0
[  145.564532] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8296, diff=1, hw=0 hw_last=0
[  145.581113] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8297, diff=1, hw=0 hw_last=0
[  145.597693] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8298, diff=1, hw=0 hw_last=0
[  145.614271] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8299, diff=1, hw=0 hw_last=0
[  145.630849] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8300, diff=1, hw=0 hw_last=0
[  145.647429] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8301, diff=1, hw=0 hw_last=0
[  145.664007] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8302, diff=1, hw=0 hw_last=0
[  145.680587] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8303, diff=1, hw=0 hw_last=0
[  145.697169] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8304, diff=1, hw=0 hw_last=0
[  145.713746] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8305, diff=1, hw=0 hw_last=0
[  145.730328] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8306, diff=1, hw=0 hw_last=0
[  145.746904] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8307, diff=1, hw=0 hw_last=0
[  145.763482] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8308, diff=1, hw=0 hw_last=0
[  145.780062] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8309, diff=1, hw=0 hw_last=0
[  145.796643] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8310, diff=1, hw=0 hw_last=0
[  145.813222] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8311, diff=1, hw=0 hw_last=0
[  145.829800] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8312, diff=1, hw=0 hw_last=0
[  145.846380] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8313, diff=1, hw=0 hw_last=0
[  145.862958] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8314, diff=1, hw=0 hw_last=0
[  145.879543] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8315, diff=1, hw=0 hw_last=0
[  145.887624] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  145.887736] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 8316 to client
[  145.889030] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  145.889123] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008a640c91
[  145.889203] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  145.889270] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000215b6887 state to 000000008a640c91
[  145.889342] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  145.889405] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 000000008a640c91
[  145.889474] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000215b6887
[  145.889537] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  145.889597] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  145.889658] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  146.124450] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000215b6887
[  146.124514] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  146.124574] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  146.124634] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  146.124694] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  146.124757] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  146.124818] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  146.124882] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  146.124942] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  146.125003] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 000000008a640c91
[  146.125066] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  146.125128] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000008a640c91
[  146.125200] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  146.125247] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  146.125279] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008a640c91
[  146.125346] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000d7e48c6b to 000000008a640c91
[  146.125408] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008a640c91
[  146.125484] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000008a640c91 nonblocking
[  146.125587] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  146.125678] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  146.128228] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8330, diff=1, hw=0 hw_last=0
[  146.128318] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008a640c91
[  146.128396] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  146.128470] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  146.128543] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  146.128616] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  146.128690] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008a640c91
[  146.144807] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8331, diff=1, hw=0 hw_last=0
[  146.161385] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8332, diff=1, hw=0 hw_last=0
[  146.177965] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8333, diff=1, hw=0 hw_last=0
[  146.194543] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8334, diff=1, hw=0 hw_last=0
[  146.211122] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8335, diff=1, hw=0 hw_last=0
[  146.227701] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8336, diff=1, hw=0 hw_last=0
[  146.244283] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8337, diff=1, hw=0 hw_last=0
[  146.260861] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8338, diff=1, hw=0 hw_last=0
[  146.277441] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8339, diff=1, hw=0 hw_last=0
[  146.294022] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8340, diff=1, hw=0 hw_last=0
[  146.310602] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8341, diff=1, hw=0 hw_last=0
[  146.327175] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8342, diff=1, hw=0 hw_last=0
[  146.343754] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8343, diff=1, hw=0 hw_last=0
[  146.360333] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8344, diff=1, hw=0 hw_last=0
[  146.376915] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8345, diff=1, hw=0 hw_last=0
[  146.393492] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8346, diff=1, hw=0 hw_last=0
[  146.410072] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8347, diff=1, hw=0 hw_last=0
[  146.426650] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8348, diff=1, hw=0 hw_last=0
[  146.443232] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8349, diff=1, hw=0 hw_last=0
[  146.459812] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8350, diff=1, hw=0 hw_last=0
[  146.476391] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8351, diff=1, hw=0 hw_last=0
[  146.492969] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8352, diff=1, hw=0 hw_last=0
[  146.509547] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8353, diff=1, hw=0 hw_last=0
[  146.526127] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8354, diff=1, hw=0 hw_last=0
[  146.542704] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8355, diff=1, hw=0 hw_last=0
[  146.559283] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8356, diff=1, hw=0 hw_last=0
[  146.575864] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8357, diff=1, hw=0 hw_last=0
[  146.592443] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8358, diff=1, hw=0 hw_last=0
[  146.609021] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8359, diff=1, hw=0 hw_last=0
[  146.625601] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8360, diff=1, hw=0 hw_last=0
[  146.642181] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8361, diff=1, hw=0 hw_last=0
[  146.658759] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8362, diff=1, hw=0 hw_last=0
[  146.675339] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8363, diff=1, hw=0 hw_last=0
[  146.691918] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8364, diff=1, hw=0 hw_last=0
[  146.708500] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8365, diff=1, hw=0 hw_last=0
[  146.725079] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8366, diff=1, hw=0 hw_last=0
[  146.741656] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8367, diff=1, hw=0 hw_last=0
[  146.758236] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8368, diff=1, hw=0 hw_last=0
[  146.774814] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8369, diff=1, hw=0 hw_last=0
[  146.924031] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8378, diff=1, hw=0 hw_last=0
[  146.940606] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8379, diff=1, hw=0 hw_last=0
[  146.957188] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8380, diff=1, hw=0 hw_last=0
[  146.973767] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8381, diff=1, hw=0 hw_last=0
[  146.990348] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8382, diff=1, hw=0 hw_last=0
[  147.006925] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8383, diff=1, hw=0 hw_last=0
[  147.023503] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8384, diff=1, hw=0 hw_last=0
[  147.040086] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8385, diff=1, hw=0 hw_last=0
[  147.056688] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8386, diff=1, hw=0 hw_last=0
[  147.069004] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  147.069116] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 8387 to client
[  147.073250] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8387, diff=1, hw=0 hw_last=0
[  147.082391] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  147.082477] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006e1bef3e
[  147.082551] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  147.082613] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000003519e999 state to 000000006e1bef3e
[  147.082679] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  147.082740] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 000000006e1bef3e
[  147.082809] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 000000003519e999
[  147.082871] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  147.082932] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  147.082991] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  147.083051] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  147.083114] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  147.083174] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  147.083238] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  147.083299] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  147.083359] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 000000006e1bef3e
[  147.083421] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  147.083482] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000006e1bef3e
[  147.083553] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  147.083599] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  147.083631] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006e1bef3e
[  147.083697] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000018d86a98 to 000000006e1bef3e
[  147.083776] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006e1bef3e
[  147.083848] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  147.083913] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  147.083976] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  147.084048] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000006e1bef3e
[  147.084115] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006e1bef3e
[  147.084178] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  147.084240] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  147.084304] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  147.084366] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  147.084429] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006e1bef3e
[  147.085916] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  147.089829] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8388, diff=1, hw=0 hw_last=0
[  147.106403] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8389, diff=1, hw=0 hw_last=0
[  147.122983] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8390, diff=1, hw=0 hw_last=0
[  147.139563] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8391, diff=1, hw=0 hw_last=0
[  147.156147] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8392, diff=1, hw=0 hw_last=0
[  147.172723] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8393, diff=1, hw=0 hw_last=0
[  147.189300] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8394, diff=1, hw=0 hw_last=0
[  147.205881] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8395, diff=1, hw=0 hw_last=0
[  147.222463] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8396, diff=1, hw=0 hw_last=0
[  147.239040] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8397, diff=1, hw=0 hw_last=0
[  147.255616] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8398, diff=1, hw=0 hw_last=0
[  147.272199] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8399, diff=1, hw=0 hw_last=0
[  147.288775] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8400, diff=1, hw=0 hw_last=0
[  147.305354] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8401, diff=1, hw=0 hw_last=0
[  147.313731] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  147.313837] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006e1bef3e
[  147.313911] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  147.313973] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000003519e999 state to 000000006e1bef3e
[  147.314038] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  147.314099] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 000000006e1bef3e
[  147.314167] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 000000003519e999
[  147.314230] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  147.314290] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  147.314350] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  147.314410] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  147.314473] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  147.314533] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  147.314596] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  147.314988] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006e1bef3e
[  147.315055] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000c0cf118d to 000000006e1bef3e
[  147.315117] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006e1bef3e
[  147.315192] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006e1bef3e nonblocking
[  147.315307] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  147.315387] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  147.321930] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8402, diff=1, hw=0 hw_last=0
[  147.322032] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006e1bef3e
[  147.322102] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  147.322166] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  147.322227] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  147.322289] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  147.322354] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006e1bef3e
[  147.338508] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8403, diff=1, hw=0 hw_last=0
[  147.355089] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8404, diff=1, hw=0 hw_last=0
[  147.371668] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8405, diff=1, hw=0 hw_last=0
[  147.388246] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8406, diff=1, hw=0 hw_last=0
[  147.404825] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8407, diff=1, hw=0 hw_last=0
[  147.421406] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8408, diff=1, hw=0 hw_last=0
[  147.437984] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8409, diff=1, hw=0 hw_last=0
[  147.454565] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8410, diff=1, hw=0 hw_last=0
[  147.471145] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8411, diff=1, hw=0 hw_last=0
[  147.487727] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8412, diff=1, hw=0 hw_last=0
[  147.504298] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8413, diff=1, hw=0 hw_last=0
[  147.520877] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8414, diff=1, hw=0 hw_last=0
[  147.537457] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8415, diff=1, hw=0 hw_last=0
[  147.554035] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8416, diff=1, hw=0 hw_last=0
[  147.570615] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8417, diff=1, hw=0 hw_last=0
[  147.587195] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8418, diff=1, hw=0 hw_last=0
[  147.603773] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8419, diff=1, hw=0 hw_last=0
[  147.620353] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8420, diff=1, hw=0 hw_last=0
[  147.636935] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8421, diff=1, hw=0 hw_last=0
[  147.653512] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8422, diff=1, hw=0 hw_last=0
[  147.670093] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8423, diff=1, hw=0 hw_last=0
[  147.686671] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8424, diff=1, hw=0 hw_last=0
[  147.703255] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8425, diff=1, hw=0 hw_last=0
[  147.719829] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8426, diff=1, hw=0 hw_last=0
[  147.736407] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8427, diff=1, hw=0 hw_last=0
[  147.752989] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8428, diff=1, hw=0 hw_last=0
[  147.769566] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8429, diff=1, hw=0 hw_last=0
[  147.786144] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8430, diff=1, hw=0 hw_last=0
[  147.802724] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8431, diff=1, hw=0 hw_last=0
[  147.819304] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8432, diff=1, hw=0 hw_last=0
[  147.835882] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8433, diff=1, hw=0 hw_last=0
[  147.852463] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8434, diff=1, hw=0 hw_last=0
[  147.869043] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8435, diff=1, hw=0 hw_last=0
[  147.885623] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8436, diff=1, hw=0 hw_last=0
[  147.902202] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8437, diff=1, hw=0 hw_last=0
[  147.918780] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8438, diff=1, hw=0 hw_last=0
[  147.935360] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8439, diff=1, hw=0 hw_last=0
[  147.951938] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8440, diff=1, hw=0 hw_last=0
[  147.968521] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8441, diff=1, hw=0 hw_last=0
[  147.985097] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8442, diff=1, hw=0 hw_last=0
[  148.001678] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8443, diff=1, hw=0 hw_last=0
[  148.018256] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8444, diff=1, hw=0 hw_last=0
[  148.034839] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8445, diff=1, hw=0 hw_last=0
[  148.051414] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8446, diff=1, hw=0 hw_last=0
[  148.067993] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8447, diff=1, hw=0 hw_last=0
[  148.084574] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8448, diff=1, hw=0 hw_last=0
[  148.101153] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8449, diff=1, hw=0 hw_last=0
[  148.117731] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8450, diff=1, hw=0 hw_last=0
[  148.247018] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  148.247078] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  148.247139] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009472d261
[  148.248578] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  148.250379] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8458, diff=1, hw=0 hw_last=0
[  148.266949] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8459, diff=1, hw=0 hw_last=0
[  148.283528] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8460, diff=1, hw=0 hw_last=0
[  148.300107] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8461, diff=1, hw=0 hw_last=0
[  148.316688] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8462, diff=1, hw=0 hw_last=0
[  148.333268] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8463, diff=1, hw=0 hw_last=0
[  148.349847] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8464, diff=1, hw=0 hw_last=0
[  148.366425] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8465, diff=1, hw=0 hw_last=0
[  148.383006] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8466, diff=1, hw=0 hw_last=0
[  148.399586] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8467, diff=1, hw=0 hw_last=0
[  148.416165] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8468, diff=1, hw=0 hw_last=0
[  148.432742] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8469, diff=1, hw=0 hw_last=0
[  148.449323] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8470, diff=1, hw=0 hw_last=0
[  148.465898] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8471, diff=1, hw=0 hw_last=0
[  148.476712] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  148.476823] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009472d261
[  148.476901] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  148.476963] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000082b4fa6a state to 000000009472d261
[  148.477029] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  148.477091] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000e8543c49 state to 000000009472d261
[  148.477160] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000082b4fa6a
[  148.477222] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  148.477282] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  148.477342] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  148.477403] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  148.477469] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  148.477529] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  148.477593] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  148.477653] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  148.477713] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000009472d261
[  148.477776] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  148.477839] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000009472d261
[  148.477911] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  148.477955] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  148.477987] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000009472d261
[  148.478055] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000018d86a98 to 000000009472d261
[  148.478119] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000009472d261
[  148.478195] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000009472d261 nonblocking
[  148.478300] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  148.478386] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  148.482478] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8472, diff=1, hw=0 hw_last=0
[  148.482572] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009472d261
[  148.482658] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  148.482732] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  148.482807] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  148.482880] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  148.482953] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009472d261
[  148.499053] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8473, diff=1, hw=0 hw_last=0
[  148.515632] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8474, diff=1, hw=0 hw_last=0
[  148.532211] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8475, diff=1, hw=0 hw_last=0
[  148.548790] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8476, diff=1, hw=0 hw_last=0
[  148.565369] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8477, diff=1, hw=0 hw_last=0
[  148.581947] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8478, diff=1, hw=0 hw_last=0
[  148.598530] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8479, diff=1, hw=0 hw_last=0
[  148.615107] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8480, diff=1, hw=0 hw_last=0
[  148.631687] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8481, diff=1, hw=0 hw_last=0
[  148.648268] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8482, diff=1, hw=0 hw_last=0
[  148.664846] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8483, diff=1, hw=0 hw_last=0
[  148.681421] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8484, diff=1, hw=0 hw_last=0
[  148.698001] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8485, diff=1, hw=0 hw_last=0
[  148.714580] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8486, diff=1, hw=0 hw_last=0
[  148.731159] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8487, diff=1, hw=0 hw_last=0
[  148.747738] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8488, diff=1, hw=0 hw_last=0
[  148.764317] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8489, diff=1, hw=0 hw_last=0
[  148.780896] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8490, diff=1, hw=0 hw_last=0
[  148.863798] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8495, diff=1, hw=0 hw_last=0
[  148.880374] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8496, diff=1, hw=0 hw_last=0
[  148.896952] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8497, diff=1, hw=0 hw_last=0
[  148.913532] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8498, diff=1, hw=0 hw_last=0
[  148.930109] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8499, diff=1, hw=0 hw_last=0
[  148.946690] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8500, diff=1, hw=0 hw_last=0
[  148.963272] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8501, diff=1, hw=0 hw_last=0
[  148.979850] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8502, diff=1, hw=0 hw_last=0
[  148.996428] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8503, diff=1, hw=0 hw_last=0
[  149.013008] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8504, diff=1, hw=0 hw_last=0
[  149.029587] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8505, diff=1, hw=0 hw_last=0
[  149.046165] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8506, diff=1, hw=0 hw_last=0
[  149.062745] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8507, diff=1, hw=0 hw_last=0
[  149.079326] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8508, diff=1, hw=0 hw_last=0
[  149.095902] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8509, diff=1, hw=0 hw_last=0
[  149.112483] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8510, diff=1, hw=0 hw_last=0
[  149.129061] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8511, diff=1, hw=0 hw_last=0
[  149.145641] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8512, diff=1, hw=0 hw_last=0
[  149.162221] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8513, diff=1, hw=0 hw_last=0
[  149.178800] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8514, diff=1, hw=0 hw_last=0
[  149.195378] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8515, diff=1, hw=0 hw_last=0
[  149.211957] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8516, diff=1, hw=0 hw_last=0
[  149.228536] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8517, diff=1, hw=0 hw_last=0
[  149.245116] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8518, diff=1, hw=0 hw_last=0
[  149.261694] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8519, diff=1, hw=0 hw_last=0
[  149.278275] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8520, diff=1, hw=0 hw_last=0
[  149.294859] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8521, diff=1, hw=0 hw_last=0
[  149.300927] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  149.301042] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 8522 to client
[  149.304305] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  149.304394] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000001477df7c
[  149.304469] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  149.304532] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000fefb5c61 state to 000000001477df7c
[  149.304598] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  149.304661] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 000000001477df7c
[  149.304730] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000fefb5c61
[  149.304793] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  149.304854] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  149.304914] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  149.304974] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  149.305039] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  149.305099] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  149.305163] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  149.305223] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  149.305283] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 000000001477df7c
[  149.305346] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  149.305407] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000001477df7c
[  149.305478] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  149.305526] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  149.305558] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000001477df7c
[  149.305625] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000008a640c91 to 000000001477df7c
[  149.305688] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000001477df7c
[  149.305754] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  149.305816] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  149.305878] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  149.305948] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000001477df7c
[  149.306012] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000001477df7c
[  149.306073] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  149.306134] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  149.306194] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  149.306255] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  149.306317] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000001477df7c
[  149.307652] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  149.311444] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8522, diff=1, hw=0 hw_last=0
[  149.328018] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8523, diff=1, hw=0 hw_last=0
[  149.344597] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8524, diff=1, hw=0 hw_last=0
[  149.361174] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8525, diff=1, hw=0 hw_last=0
[  149.377756] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8526, diff=1, hw=0 hw_last=0
[  149.394335] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8527, diff=1, hw=0 hw_last=0
[  149.493810] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8533, diff=1, hw=0 hw_last=0
[  149.510391] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8534, diff=1, hw=0 hw_last=0
[  149.526966] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8535, diff=1, hw=0 hw_last=0
[  149.539210] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  149.539323] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000001477df7c
[  149.539402] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  149.539466] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000fefb5c61 state to 000000001477df7c
[  149.539533] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  149.539595] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 000000001477df7c
[  149.539664] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000fefb5c61
[  149.539764] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  149.539831] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  149.539895] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  149.539955] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  149.540025] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  149.540090] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  149.540155] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  149.540216] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  149.540279] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 000000001477df7c
[  149.540346] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  149.540414] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000001477df7c
[  149.540490] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  149.540539] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  149.540570] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000001477df7c
[  149.540641] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000ab379aee to 000000001477df7c
[  149.540704] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000001477df7c
[  149.540784] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000001477df7c nonblocking
[  149.540886] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  149.540969] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  149.543545] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8536, diff=1, hw=0 hw_last=0
[  149.543635] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000001477df7c
[  149.543715] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  149.543800] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  149.543875] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  149.543948] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  149.544022] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000001477df7c
[  149.560122] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8537, diff=1, hw=0 hw_last=0
[  149.576700] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8538, diff=1, hw=0 hw_last=0
[  149.593280] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8539, diff=1, hw=0 hw_last=0
[  149.609858] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8540, diff=1, hw=0 hw_last=0
[  149.626438] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8541, diff=1, hw=0 hw_last=0
[  149.643017] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8542, diff=1, hw=0 hw_last=0
[  149.659598] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8543, diff=1, hw=0 hw_last=0
[  149.676175] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8544, diff=1, hw=0 hw_last=0
[  149.692756] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8545, diff=1, hw=0 hw_last=0
[  149.709339] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8546, diff=1, hw=0 hw_last=0
[  149.725915] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8547, diff=1, hw=0 hw_last=0
[  149.742490] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8548, diff=1, hw=0 hw_last=0
[  149.759070] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8549, diff=1, hw=0 hw_last=0
[  149.775649] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8550, diff=1, hw=0 hw_last=0
[  149.792228] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8551, diff=1, hw=0 hw_last=0
[  149.808807] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8552, diff=1, hw=0 hw_last=0
[  149.825386] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8553, diff=1, hw=0 hw_last=0
[  149.841965] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8554, diff=1, hw=0 hw_last=0
[  149.858550] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8555, diff=1, hw=0 hw_last=0
[  149.875127] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8556, diff=1, hw=0 hw_last=0
[  149.891704] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8557, diff=1, hw=0 hw_last=0
[  149.908284] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8558, diff=1, hw=0 hw_last=0
[  149.924863] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8559, diff=1, hw=0 hw_last=0
[  149.941441] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8560, diff=1, hw=0 hw_last=0
[  149.958021] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8561, diff=1, hw=0 hw_last=0
[  149.974600] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8562, diff=1, hw=0 hw_last=0
[  149.991178] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8563, diff=1, hw=0 hw_last=0
[  150.007758] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8564, diff=1, hw=0 hw_last=0
[  150.024338] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8565, diff=1, hw=0 hw_last=0
[  150.040919] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8566, diff=1, hw=0 hw_last=0
[  150.057495] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8567, diff=1, hw=0 hw_last=0
[  150.074079] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8568, diff=1, hw=0 hw_last=0
[  150.505144] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8594, diff=1, hw=0 hw_last=0
[  150.521723] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8595, diff=1, hw=0 hw_last=0
[  150.538300] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8596, diff=1, hw=0 hw_last=0
[  150.554880] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8597, diff=1, hw=0 hw_last=0
[  150.571456] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8598, diff=1, hw=0 hw_last=0
[  150.588035] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8599, diff=1, hw=0 hw_last=0
[  150.596306] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  150.596410] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000071ef6b0b
[  150.596486] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  150.596548] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000087081e28 state to 0000000071ef6b0b
[  150.596615] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  150.596676] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000adb7ad91 state to 0000000071ef6b0b
[  150.596745] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000087081e28
[  150.596808] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  150.596868] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  150.596928] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  150.596988] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  150.597051] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  150.597111] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  150.597176] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  150.597236] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  150.597296] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 0000000071ef6b0b
[  150.597360] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  150.597422] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000071ef6b0b
[  150.597493] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  150.597541] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  150.597573] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000071ef6b0b
[  150.597640] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000000cc24793 to 0000000071ef6b0b
[  150.597703] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000071ef6b0b
[  150.597779] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000071ef6b0b nonblocking
[  150.597883] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  150.597969] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  150.604614] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8600, diff=1, hw=0 hw_last=0
[  150.604734] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000071ef6b0b
[  150.604805] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  150.604870] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  150.604933] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  150.604996] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  150.605060] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000071ef6b0b
[  150.621192] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8601, diff=1, hw=0 hw_last=0
[  150.637771] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8602, diff=1, hw=0 hw_last=0
[  150.654348] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8603, diff=1, hw=0 hw_last=0
[  150.670927] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8604, diff=1, hw=0 hw_last=0
[  150.687507] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8605, diff=1, hw=0 hw_last=0
[  150.704088] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8606, diff=1, hw=0 hw_last=0
[  150.720665] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8607, diff=1, hw=0 hw_last=0
[  150.737248] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8608, diff=1, hw=0 hw_last=0
[  150.753826] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8609, diff=1, hw=0 hw_last=0
[  150.770404] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8610, diff=1, hw=0 hw_last=0
[  150.786980] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8611, diff=1, hw=0 hw_last=0
[  150.803560] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8612, diff=1, hw=0 hw_last=0
[  150.820138] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8613, diff=1, hw=0 hw_last=0
[  150.836717] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8614, diff=1, hw=0 hw_last=0
[  150.853296] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8615, diff=1, hw=0 hw_last=0
[  150.869875] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8616, diff=1, hw=0 hw_last=0
[  150.886454] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8617, diff=1, hw=0 hw_last=0
[  150.903038] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8618, diff=1, hw=0 hw_last=0
[  150.919616] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8619, diff=1, hw=0 hw_last=0
[  150.936196] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8620, diff=1, hw=0 hw_last=0
[  150.952775] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8621, diff=1, hw=0 hw_last=0
[  150.969352] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8622, diff=1, hw=0 hw_last=0
[  150.985932] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8623, diff=1, hw=0 hw_last=0
[  151.002511] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8624, diff=1, hw=0 hw_last=0
[  151.019090] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8625, diff=1, hw=0 hw_last=0
[  151.035669] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8626, diff=1, hw=0 hw_last=0
[  151.052249] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8627, diff=1, hw=0 hw_last=0
[  151.068828] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8628, diff=1, hw=0 hw_last=0
[  151.201461] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8636, diff=1, hw=0 hw_last=0
[  151.218041] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8637, diff=1, hw=0 hw_last=0
[  151.234620] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8638, diff=1, hw=0 hw_last=0
[  151.251199] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8639, diff=1, hw=0 hw_last=0
[  151.267781] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8640, diff=1, hw=0 hw_last=0
[  151.284357] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8641, diff=1, hw=0 hw_last=0
[  151.300936] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8642, diff=1, hw=0 hw_last=0
[  151.317517] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8643, diff=1, hw=0 hw_last=0
[  151.334097] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8644, diff=1, hw=0 hw_last=0
[  151.343355] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  151.343470] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 8645 to client
[  151.344749] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  151.344845] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000ace560b
[  151.344919] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  151.344982] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000002cafbe1b state to 000000000ace560b
[  151.345050] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  151.345112] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 000000000ace560b
[  151.345181] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 000000002cafbe1b
[  151.345245] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  151.345305] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  151.345365] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  151.345425] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  151.345491] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  151.345554] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  151.345621] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  151.345683] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  151.345743] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000000ace560b
[  151.345806] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  151.345867] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000000ace560b
[  151.345937] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  151.345980] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  151.346011] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000ace560b
[  151.346081] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000071ef6b0b to 000000000ace560b
[  151.346143] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000ace560b
[  151.346209] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  151.346270] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  151.346331] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  151.346401] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000000ace560b
[  151.346464] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000ace560b
[  151.346525] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  151.346585] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  151.346645] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  151.346706] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  151.346767] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000ace560b
[  151.348177] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  151.350687] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8645, diff=1, hw=0 hw_last=0
[  151.367261] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8646, diff=1, hw=0 hw_last=0
[  151.383839] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8647, diff=1, hw=0 hw_last=0
[  151.400421] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8648, diff=1, hw=0 hw_last=0
[  151.417000] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8649, diff=1, hw=0 hw_last=0
[  151.433579] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8650, diff=1, hw=0 hw_last=0
[  151.450159] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8651, diff=1, hw=0 hw_last=0
[  151.466736] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8652, diff=1, hw=0 hw_last=0
[  151.483316] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8653, diff=1, hw=0 hw_last=0
[  151.499899] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8654, diff=1, hw=0 hw_last=0
[  151.516476] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8655, diff=1, hw=0 hw_last=0
[  151.533052] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8656, diff=1, hw=0 hw_last=0
[  151.549633] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8657, diff=1, hw=0 hw_last=0
[  151.566211] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8658, diff=1, hw=0 hw_last=0
[  151.577232] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  151.577345] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000ace560b
[  151.577421] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  151.577485] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000002cafbe1b state to 000000000ace560b
[  151.577552] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  151.577613] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 000000000ace560b
[  151.577681] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 000000002cafbe1b
[  151.577745] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  151.577806] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  151.577866] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  151.577926] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  151.577989] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  151.578049] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  151.578113] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  151.578173] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  151.578233] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000000ace560b
[  151.582791] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8659, diff=1, hw=0 hw_last=0
[  151.582892] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000ace560b
[  151.582983] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  151.583056] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  151.583131] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  151.583206] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  151.583280] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000ace560b
[  151.599365] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8660, diff=1, hw=0 hw_last=0
[  151.615944] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8661, diff=1, hw=0 hw_last=0
[  151.632522] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8662, diff=1, hw=0 hw_last=0
[  151.649102] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8663, diff=1, hw=0 hw_last=0
[  151.665681] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8664, diff=1, hw=0 hw_last=0
[  151.682261] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8665, diff=1, hw=0 hw_last=0
[  151.698842] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8666, diff=1, hw=0 hw_last=0
[  151.715419] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8667, diff=1, hw=0 hw_last=0
[  151.732001] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8668, diff=1, hw=0 hw_last=0
[  151.748580] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8669, diff=1, hw=0 hw_last=0
[  151.765158] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8670, diff=1, hw=0 hw_last=0
[  151.781733] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8671, diff=1, hw=0 hw_last=0
[  151.798311] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8672, diff=1, hw=0 hw_last=0
[  151.814890] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8673, diff=1, hw=0 hw_last=0
[  151.831469] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8674, diff=1, hw=0 hw_last=0
[  151.848049] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8675, diff=1, hw=0 hw_last=0
[  151.864628] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8676, diff=1, hw=0 hw_last=0
[  151.881207] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8677, diff=1, hw=0 hw_last=0
[  151.897786] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8678, diff=1, hw=0 hw_last=0
[  151.914373] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8679, diff=1, hw=0 hw_last=0
[  151.930948] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8680, diff=1, hw=0 hw_last=0
[  151.947529] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8681, diff=1, hw=0 hw_last=0
[  151.964107] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8682, diff=1, hw=0 hw_last=0
[  151.980683] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8683, diff=1, hw=0 hw_last=0
[  151.997263] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8684, diff=1, hw=0 hw_last=0
[  152.013844] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8685, diff=1, hw=0 hw_last=0
[  152.030423] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8686, diff=1, hw=0 hw_last=0
[  152.047002] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8687, diff=1, hw=0 hw_last=0
[  152.063583] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8688, diff=1, hw=0 hw_last=0
[  152.080160] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8689, diff=1, hw=0 hw_last=0
[  152.096738] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8690, diff=1, hw=0 hw_last=0
[  152.113321] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8691, diff=1, hw=0 hw_last=0
[  152.129899] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8692, diff=1, hw=0 hw_last=0
[  152.146481] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8693, diff=1, hw=0 hw_last=0
[  152.163060] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8694, diff=1, hw=0 hw_last=0
[  152.179636] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8695, diff=1, hw=0 hw_last=0
[  152.196213] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8696, diff=1, hw=0 hw_last=0
[  152.212792] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8697, diff=1, hw=0 hw_last=0
[  152.229374] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8698, diff=1, hw=0 hw_last=0
[  152.245952] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8699, diff=1, hw=0 hw_last=0
[  152.262531] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8700, diff=1, hw=0 hw_last=0
[  152.279111] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8701, diff=1, hw=0 hw_last=0
[  152.295688] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8702, diff=1, hw=0 hw_last=0
[  152.312270] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8703, diff=1, hw=0 hw_last=0
[  152.328852] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8704, diff=1, hw=0 hw_last=0
[  152.345432] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8705, diff=1, hw=0 hw_last=0
[  152.357302] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  152.357413] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 8706 to client
[  152.362010] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8706, diff=1, hw=0 hw_last=0
[  152.371679] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  152.371782] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000004593454f
[  152.371856] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  152.371919] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000ec98bd42 state to 000000004593454f
[  152.371986] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  152.372048] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000e8543c49 state to 000000004593454f
[  152.372116] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000ec98bd42
[  152.560965] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8718, diff=1, hw=0 hw_last=0
[  152.577542] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8719, diff=1, hw=0 hw_last=0
[  152.594121] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8720, diff=1, hw=0 hw_last=0
[  152.604120] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  152.604228] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000004593454f
[  152.604302] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  152.604365] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000ec98bd42 state to 000000004593454f
[  152.604432] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  152.604495] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000e8543c49 state to 000000004593454f
[  152.604563] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000ec98bd42
[  152.604627] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  152.604688] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  152.604748] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  152.604808] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  152.604873] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  152.604933] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  152.604998] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  152.605059] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  152.605120] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 000000004593454f
[  152.605183] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  152.605246] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000004593454f
[  152.605316] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  152.605361] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  152.605393] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000004593454f
[  152.605461] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000008a640c91 to 000000004593454f
[  152.605524] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000004593454f
[  152.605601] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000004593454f nonblocking
[  152.605696] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  152.605774] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  152.610699] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8721, diff=1, hw=0 hw_last=0
[  152.610794] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000004593454f
[  152.610863] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  152.610926] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  152.610988] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  152.611051] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  152.611115] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000004593454f
[  152.627275] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8722, diff=1, hw=0 hw_last=0
[  152.643855] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8723, diff=1, hw=0 hw_last=0
[  152.660433] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8724, diff=1, hw=0 hw_last=0
[  152.677012] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8725, diff=1, hw=0 hw_last=0
[  152.693590] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8726, diff=1, hw=0 hw_last=0
[  152.710174] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8727, diff=1, hw=0 hw_last=0
[  152.726749] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8728, diff=1, hw=0 hw_last=0
[  152.743335] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8729, diff=1, hw=0 hw_last=0
[  152.759912] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8730, diff=1, hw=0 hw_last=0
[  152.776490] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8731, diff=1, hw=0 hw_last=0
[  152.793064] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8732, diff=1, hw=0 hw_last=0
[  152.809643] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8733, diff=1, hw=0 hw_last=0
[  152.826222] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8734, diff=1, hw=0 hw_last=0
[  152.842801] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8735, diff=1, hw=0 hw_last=0
[  152.859380] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8736, diff=1, hw=0 hw_last=0
[  152.875959] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8737, diff=1, hw=0 hw_last=0
[  152.892539] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8738, diff=1, hw=0 hw_last=0
[  152.909117] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8739, diff=1, hw=0 hw_last=0
[  152.925702] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8740, diff=1, hw=0 hw_last=0
[  152.942278] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8741, diff=1, hw=0 hw_last=0
[  152.958859] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8742, diff=1, hw=0 hw_last=0
[  152.975438] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8743, diff=1, hw=0 hw_last=0
[  152.992018] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8744, diff=1, hw=0 hw_last=0
[  153.008596] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8745, diff=1, hw=0 hw_last=0
[  153.025176] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8746, diff=1, hw=0 hw_last=0
[  153.041753] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8747, diff=1, hw=0 hw_last=0
[  153.058335] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8748, diff=1, hw=0 hw_last=0
[  153.074913] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8749, diff=1, hw=0 hw_last=0
[  153.091491] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8750, diff=1, hw=0 hw_last=0
[  153.108071] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8751, diff=1, hw=0 hw_last=0
[  153.124650] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8752, diff=1, hw=0 hw_last=0
[  153.141229] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8753, diff=1, hw=0 hw_last=0
[  153.157808] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8754, diff=1, hw=0 hw_last=0
[  153.174390] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8755, diff=1, hw=0 hw_last=0
[  153.190969] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8756, diff=1, hw=0 hw_last=0
[  153.207549] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8757, diff=1, hw=0 hw_last=0
[  153.224130] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8758, diff=1, hw=0 hw_last=0
[  153.240708] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8759, diff=1, hw=0 hw_last=0
[  153.257284] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8760, diff=1, hw=0 hw_last=0
[  153.273862] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8761, diff=1, hw=0 hw_last=0
[  153.290442] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8762, diff=1, hw=0 hw_last=0
[  153.307023] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8763, diff=1, hw=0 hw_last=0
[  153.323602] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8764, diff=1, hw=0 hw_last=0
[  153.340182] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8765, diff=1, hw=0 hw_last=0
[  153.356759] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8766, diff=1, hw=0 hw_last=0
[  153.373341] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8767, diff=1, hw=0 hw_last=0
[  153.389920] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8768, diff=1, hw=0 hw_last=0
[  153.406499] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8769, diff=1, hw=0 hw_last=0
[  153.423075] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8770, diff=1, hw=0 hw_last=0
[  153.439658] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8771, diff=1, hw=0 hw_last=0
[  153.456235] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8772, diff=1, hw=0 hw_last=0
[  153.472813] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8773, diff=1, hw=0 hw_last=0
[  153.489398] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8774, diff=1, hw=0 hw_last=0
[  153.495590] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  153.495728] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 8775 to client
[  153.499008] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  153.499103] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006fb5b2d2
[  153.499175] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  153.499237] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000bac3ec2d state to 000000006fb5b2d2
[  153.499303] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  153.499365] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 000000006fb5b2d2
[  153.499432] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000bac3ec2d
[  153.499494] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  153.499555] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  153.499615] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  153.499675] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  153.499763] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  153.499830] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  153.499901] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  153.499966] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  153.500028] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 000000006fb5b2d2
[  153.500096] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  153.500159] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000006fb5b2d2
[  153.500230] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  153.500276] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  153.500307] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006fb5b2d2
[  153.500379] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000009472d261 to 000000006fb5b2d2
[  153.500444] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006fb5b2d2
[  153.500511] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  153.500573] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  153.500637] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  153.500708] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000006fb5b2d2
[  153.500772] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006fb5b2d2
[  153.500836] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  153.500897] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  153.500958] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  153.501020] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  153.501082] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006fb5b2d2
[  153.502423] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  153.505975] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8775, diff=1, hw=0 hw_last=0
[  153.522555] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8776, diff=1, hw=0 hw_last=0
[  153.539137] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8777, diff=1, hw=0 hw_last=0
[  153.555717] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8778, diff=1, hw=0 hw_last=0
[  153.572296] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8779, diff=1, hw=0 hw_last=0
[  153.588875] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8780, diff=1, hw=0 hw_last=0
[  153.605453] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8781, diff=1, hw=0 hw_last=0
[  153.622030] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8782, diff=1, hw=0 hw_last=0
[  153.638612] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8783, diff=1, hw=0 hw_last=0
[  153.655193] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8784, diff=1, hw=0 hw_last=0
[  153.671771] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8785, diff=1, hw=0 hw_last=0
[  153.688350] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8786, diff=1, hw=0 hw_last=0
[  153.724526] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  153.724589] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000006fb5b2d2
[  153.724661] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  153.724704] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  153.724736] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006fb5b2d2
[  153.724806] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000006e1bef3e to 000000006fb5b2d2
[  153.724869] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006fb5b2d2
[  153.724945] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006fb5b2d2 nonblocking
[  153.725046] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  153.725123] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  153.738083] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8789, diff=1, hw=0 hw_last=0
[  153.738179] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006fb5b2d2
[  153.738249] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  153.738312] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  153.738373] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  153.738437] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  153.738502] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006fb5b2d2
[  153.754663] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8790, diff=1, hw=0 hw_last=0
[  153.771241] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8791, diff=1, hw=0 hw_last=0
[  153.787817] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8792, diff=1, hw=0 hw_last=0
[  153.804398] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8793, diff=1, hw=0 hw_last=0
[  153.820977] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8794, diff=1, hw=0 hw_last=0
[  153.837556] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8795, diff=1, hw=0 hw_last=0
[  153.854138] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8796, diff=1, hw=0 hw_last=0
[  153.870715] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8797, diff=1, hw=0 hw_last=0
[  153.887295] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8798, diff=1, hw=0 hw_last=0
[  153.903876] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8799, diff=1, hw=0 hw_last=0
[  153.920453] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8800, diff=1, hw=0 hw_last=0
[  153.937029] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8801, diff=1, hw=0 hw_last=0
[  153.953607] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8802, diff=1, hw=0 hw_last=0
[  153.970186] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8803, diff=1, hw=0 hw_last=0
[  153.986765] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8804, diff=1, hw=0 hw_last=0
[  154.003345] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8805, diff=1, hw=0 hw_last=0
[  154.019924] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8806, diff=1, hw=0 hw_last=0
[  154.036503] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8807, diff=1, hw=0 hw_last=0
[  154.053084] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8808, diff=1, hw=0 hw_last=0
[  154.069668] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8809, diff=1, hw=0 hw_last=0
[  154.086243] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8810, diff=1, hw=0 hw_last=0
[  154.102823] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8811, diff=1, hw=0 hw_last=0
[  154.119405] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8812, diff=1, hw=0 hw_last=0
[  154.135982] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8813, diff=1, hw=0 hw_last=0
[  154.152560] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8814, diff=1, hw=0 hw_last=0
[  154.169139] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8815, diff=1, hw=0 hw_last=0
[  154.185718] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8816, diff=1, hw=0 hw_last=0
[  154.202299] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8817, diff=1, hw=0 hw_last=0
[  154.218876] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8818, diff=1, hw=0 hw_last=0
[  154.235455] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8819, diff=1, hw=0 hw_last=0
[  154.252035] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8820, diff=1, hw=0 hw_last=0
[  154.268615] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8821, diff=1, hw=0 hw_last=0
[  154.285195] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8822, diff=1, hw=0 hw_last=0
[  154.301776] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8823, diff=1, hw=0 hw_last=0
[  154.318356] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8824, diff=1, hw=0 hw_last=0
[  154.334934] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8825, diff=1, hw=0 hw_last=0
[  154.351515] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8826, diff=1, hw=0 hw_last=0
[  154.368094] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8827, diff=1, hw=0 hw_last=0
[  154.384670] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8828, diff=1, hw=0 hw_last=0
[  154.401254] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8829, diff=1, hw=0 hw_last=0
[  154.417828] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8830, diff=1, hw=0 hw_last=0
[  154.434408] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8831, diff=1, hw=0 hw_last=0
[  154.450989] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8832, diff=1, hw=0 hw_last=0
[  154.467567] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8833, diff=1, hw=0 hw_last=0
[  154.484144] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8834, diff=1, hw=0 hw_last=0
[  154.616777] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8842, diff=1, hw=0 hw_last=0
[  154.633367] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8843, diff=1, hw=0 hw_last=0
[  154.634950] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  154.635063] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 8844 to client
[  154.642328] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  154.642421] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007967e7cb
[  154.642493] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  154.642555] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000003519e999 state to 000000007967e7cb
[  154.642621] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  154.642682] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 000000007967e7cb
[  154.642749] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 000000003519e999
[  154.642813] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  154.642872] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  154.642932] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  154.642992] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  154.643056] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  154.643116] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  154.643179] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  154.643239] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  154.643299] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000007967e7cb
[  154.643362] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  154.643422] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000007967e7cb
[  154.643492] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  154.643535] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  154.643567] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000007967e7cb
[  154.643636] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000006fb5b2d2 to 000000007967e7cb
[  154.643719] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000007967e7cb
[  154.643790] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  154.643856] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  154.643919] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  154.643989] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000007967e7cb
[  154.644053] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007967e7cb
[  154.644114] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  154.644175] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  154.644237] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  154.644297] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  154.644358] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007967e7cb
[  154.645720] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  154.649943] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8844, diff=1, hw=0 hw_last=0
[  154.666521] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8845, diff=1, hw=0 hw_last=0
[  154.683100] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8846, diff=1, hw=0 hw_last=0
[  154.699677] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8847, diff=1, hw=0 hw_last=0
[  154.716260] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8848, diff=1, hw=0 hw_last=0
[  154.732840] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8849, diff=1, hw=0 hw_last=0
[  154.749417] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8850, diff=1, hw=0 hw_last=0
[  154.750037] systemd-journald[214]: Data hash table of /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal has a fill level at 75.0 (2731 of 3640 items, 2097152 file size, 767 bytes per hash table item), suggesting rotation.
[  154.765998] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8851, diff=1, hw=0 hw_last=0
[  154.775514] systemd-journald[214]: /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal: Journal header limits reached or header out-of-date, rotating.
[  154.782574] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8852, diff=1, hw=0 hw_last=0
[  154.799161] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8853, diff=1, hw=0 hw_last=0
[  154.815732] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8854, diff=1, hw=0 hw_last=0
[  154.832312] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8855, diff=1, hw=0 hw_last=0
[  154.848896] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8856, diff=1, hw=0 hw_last=0
[  154.865475] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8857, diff=1, hw=0 hw_last=0
[  154.874894] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  154.875017] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007967e7cb
[  154.875095] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  154.875159] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000003519e999 state to 000000007967e7cb
[  154.875226] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  154.875286] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 000000007967e7cb
[  154.875355] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 000000003519e999
[  154.875419] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  154.875479] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  154.875538] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  154.875598] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  154.875661] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  154.875762] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  154.875834] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  154.875900] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  154.875965] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000007967e7cb
[  154.876030] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  154.876094] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000007967e7cb
[  154.876168] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  154.876216] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  155.561791] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8899, diff=1, hw=0 hw_last=0
[  155.578370] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8900, diff=1, hw=0 hw_last=0
[  155.594949] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8901, diff=1, hw=0 hw_last=0
[  155.611529] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8902, diff=1, hw=0 hw_last=0
[  155.628108] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8903, diff=1, hw=0 hw_last=0
[  155.644687] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8904, diff=1, hw=0 hw_last=0
[  155.661268] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8905, diff=1, hw=0 hw_last=0
[  155.677846] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8906, diff=1, hw=0 hw_last=0
[  155.694429] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8907, diff=1, hw=0 hw_last=0
[  155.698415] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  155.698529] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 8908 to client
[  155.703813] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  155.703907] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008e9f664b
[  155.703979] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  155.704041] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000082b4fa6a state to 000000008e9f664b
[  155.704106] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  155.704167] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 000000008e9f664b
[  155.704235] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000082b4fa6a
[  155.704297] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  155.704356] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  155.704416] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  155.704475] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  155.704539] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  155.704600] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  155.704663] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  155.704723] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  155.704783] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 000000008e9f664b
[  155.704846] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  155.704906] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000008e9f664b
[  155.704977] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  155.705022] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  155.705054] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008e9f664b
[  155.705121] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000004593454f to 000000008e9f664b
[  155.705183] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008e9f664b
[  155.705250] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  155.705311] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  155.705373] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  155.705442] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000008e9f664b
[  155.705506] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008e9f664b
[  155.705568] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  155.705628] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  155.705689] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  155.705749] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  155.705810] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008e9f664b
[  155.707161] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  155.711011] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8908, diff=1, hw=0 hw_last=0
[  155.727588] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8909, diff=1, hw=0 hw_last=0
[  155.744165] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8910, diff=1, hw=0 hw_last=0
[  155.760744] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8911, diff=1, hw=0 hw_last=0
[  155.777331] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8912, diff=1, hw=0 hw_last=0
[  155.793904] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8913, diff=1, hw=0 hw_last=0
[  155.810483] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8914, diff=1, hw=0 hw_last=0
[  155.827065] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8915, diff=1, hw=0 hw_last=0
[  155.843643] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8916, diff=1, hw=0 hw_last=0
[  155.860224] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8917, diff=1, hw=0 hw_last=0
[  155.876800] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8918, diff=1, hw=0 hw_last=0
[  155.893380] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8919, diff=1, hw=0 hw_last=0
[  155.909958] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8920, diff=1, hw=0 hw_last=0
[  155.926540] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8921, diff=1, hw=0 hw_last=0
[  155.927729] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  155.927829] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008e9f664b
[  155.927904] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  155.927967] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000082b4fa6a state to 000000008e9f664b
[  155.928034] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  155.928094] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 000000008e9f664b
[  155.928163] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 0000000082b4fa6a
[  155.928227] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  155.928287] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  155.928348] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  155.928407] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  155.928472] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  155.928532] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  155.928596] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  155.928657] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  155.928717] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 000000008e9f664b
[  155.929059] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000001477df7c to 000000008e9f664b
[  155.929122] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008e9f664b
[  155.929198] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000008e9f664b nonblocking
[  155.929304] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  155.929384] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  155.943114] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8922, diff=1, hw=0 hw_last=0
[  155.943209] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008e9f664b
[  155.943278] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  155.943342] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  155.943404] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  155.943466] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  155.943531] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008e9f664b
[  155.959693] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8923, diff=1, hw=0 hw_last=0
[  155.976273] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8924, diff=1, hw=0 hw_last=0
[  155.992851] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8925, diff=1, hw=0 hw_last=0
[  156.009430] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8926, diff=1, hw=0 hw_last=0
[  156.026009] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8927, diff=1, hw=0 hw_last=0
[  156.042589] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8928, diff=1, hw=0 hw_last=0
[  156.059167] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8929, diff=1, hw=0 hw_last=0
[  156.075748] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8930, diff=1, hw=0 hw_last=0
[  156.092329] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8931, diff=1, hw=0 hw_last=0
[  156.108908] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8932, diff=1, hw=0 hw_last=0
[  156.125482] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8933, diff=1, hw=0 hw_last=0
[  156.142062] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8934, diff=1, hw=0 hw_last=0
[  156.158641] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8935, diff=1, hw=0 hw_last=0
[  156.175219] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8936, diff=1, hw=0 hw_last=0
[  156.191800] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8937, diff=1, hw=0 hw_last=0
[  156.208378] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8938, diff=1, hw=0 hw_last=0
[  156.224957] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8939, diff=1, hw=0 hw_last=0
[  156.241542] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8940, diff=1, hw=0 hw_last=0
[  156.258119] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8941, diff=1, hw=0 hw_last=0
[  156.274698] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8942, diff=1, hw=0 hw_last=0
[  156.291276] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8943, diff=1, hw=0 hw_last=0
[  156.307856] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8944, diff=1, hw=0 hw_last=0
[  156.324435] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8945, diff=1, hw=0 hw_last=0
[  156.341013] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8946, diff=1, hw=0 hw_last=0
[  156.357593] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8947, diff=1, hw=0 hw_last=0
[  156.374172] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8948, diff=1, hw=0 hw_last=0
[  156.390751] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8949, diff=1, hw=0 hw_last=0
[  156.407329] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8950, diff=1, hw=0 hw_last=0
[  156.423911] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8951, diff=1, hw=0 hw_last=0
[  156.440491] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8952, diff=1, hw=0 hw_last=0
[  156.457067] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8953, diff=1, hw=0 hw_last=0
[  156.473647] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8954, diff=1, hw=0 hw_last=0
[  156.490228] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8955, diff=1, hw=0 hw_last=0
[  156.506807] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8956, diff=1, hw=0 hw_last=0
[  156.523385] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8957, diff=1, hw=0 hw_last=0
[  156.539968] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8958, diff=1, hw=0 hw_last=0
[  156.556543] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8959, diff=1, hw=0 hw_last=0
[  156.573123] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8960, diff=1, hw=0 hw_last=0
[  156.589701] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8961, diff=1, hw=0 hw_last=0
[  156.606282] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8962, diff=1, hw=0 hw_last=0
[  156.622860] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8963, diff=1, hw=0 hw_last=0
[  156.639440] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8964, diff=1, hw=0 hw_last=0
[  156.656020] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8965, diff=1, hw=0 hw_last=0
[  156.672598] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8966, diff=1, hw=0 hw_last=0
[  156.689177] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8967, diff=1, hw=0 hw_last=0
[  156.705761] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8968, diff=1, hw=0 hw_last=0
[  156.716057] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  156.716173] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 8969 to client
[  156.717442] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  156.717543] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000029aaf162
[  156.854976] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8977, diff=1, hw=0 hw_last=0
[  156.871555] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8978, diff=1, hw=0 hw_last=0
[  156.888133] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8979, diff=1, hw=0 hw_last=0
[  156.904711] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8980, diff=1, hw=0 hw_last=0
[  156.921290] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8981, diff=1, hw=0 hw_last=0
[  156.937868] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8982, diff=1, hw=0 hw_last=0
[  156.940593] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  156.940696] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000029aaf162
[  156.940771] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  156.940834] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000055579822 state to 0000000029aaf162
[  156.940902] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  156.940964] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a743c9a8 state to 0000000029aaf162
[  156.941033] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000055579822
[  156.941095] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  156.941155] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  156.941217] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  156.941278] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  156.941344] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  156.941405] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  156.941469] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  156.941530] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  156.941591] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 0000000029aaf162
[  156.941654] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  156.941716] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000029aaf162
[  156.941787] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  156.941833] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  156.941865] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000029aaf162
[  156.941932] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000071ef6b0b to 0000000029aaf162
[  156.941995] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000029aaf162
[  156.942072] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000029aaf162 nonblocking
[  156.942180] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  156.942255] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  156.954447] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8983, diff=1, hw=0 hw_last=0
[  156.954555] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000029aaf162
[  156.954627] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  156.954690] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  156.954752] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  156.954817] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  156.954881] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000029aaf162
[  156.971027] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8984, diff=1, hw=0 hw_last=0
[  156.987604] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8985, diff=1, hw=0 hw_last=0
[  157.004182] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8986, diff=1, hw=0 hw_last=0
[  157.020760] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8987, diff=1, hw=0 hw_last=0
[  157.037339] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8988, diff=1, hw=0 hw_last=0
[  157.053920] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8989, diff=1, hw=0 hw_last=0
[  157.070498] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8990, diff=1, hw=0 hw_last=0
[  157.087079] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8991, diff=1, hw=0 hw_last=0
[  157.103665] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8992, diff=1, hw=0 hw_last=0
[  157.120240] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8993, diff=1, hw=0 hw_last=0
[  157.136814] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8994, diff=1, hw=0 hw_last=0
[  157.153392] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8995, diff=1, hw=0 hw_last=0
[  157.169972] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8996, diff=1, hw=0 hw_last=0
[  157.186551] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8997, diff=1, hw=0 hw_last=0
[  157.203130] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8998, diff=1, hw=0 hw_last=0
[  157.219711] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=8999, diff=1, hw=0 hw_last=0
[  157.236288] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9000, diff=1, hw=0 hw_last=0
[  157.252871] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9001, diff=1, hw=0 hw_last=0
[  157.269450] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9002, diff=1, hw=0 hw_last=0
[  157.286028] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9003, diff=1, hw=0 hw_last=0
[  157.302608] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9004, diff=1, hw=0 hw_last=0
[  157.319185] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9005, diff=1, hw=0 hw_last=0
[  157.335766] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9006, diff=1, hw=0 hw_last=0
[  157.352345] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9007, diff=1, hw=0 hw_last=0
[  157.368923] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9008, diff=1, hw=0 hw_last=0
[  157.385502] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9009, diff=1, hw=0 hw_last=0
[  157.402081] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9010, diff=1, hw=0 hw_last=0
[  157.418661] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9011, diff=1, hw=0 hw_last=0
[  157.435242] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9012, diff=1, hw=0 hw_last=0
[  157.451821] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9013, diff=1, hw=0 hw_last=0
[  157.468399] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9014, diff=1, hw=0 hw_last=0
[  157.484979] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9015, diff=1, hw=0 hw_last=0
[  157.501557] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9016, diff=1, hw=0 hw_last=0
[  157.518137] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9017, diff=1, hw=0 hw_last=0
[  157.534717] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9018, diff=1, hw=0 hw_last=0
[  157.551297] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9019, diff=1, hw=0 hw_last=0
[  157.567875] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9020, diff=1, hw=0 hw_last=0
[  157.584454] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9021, diff=1, hw=0 hw_last=0
[  157.601034] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9022, diff=1, hw=0 hw_last=0
[  157.617610] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9023, diff=1, hw=0 hw_last=0
[  157.634192] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9024, diff=1, hw=0 hw_last=0
[  157.650772] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9025, diff=1, hw=0 hw_last=0
[  157.667351] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9026, diff=1, hw=0 hw_last=0
[  157.683929] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9027, diff=1, hw=0 hw_last=0
[  157.700507] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9028, diff=1, hw=0 hw_last=0
[  157.717088] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9029, diff=1, hw=0 hw_last=0
[  157.732916] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  157.733031] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 9030 to client
[  157.733674] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9030, diff=1, hw=0 hw_last=0
[  157.743303] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  157.743400] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f37c832b
[  157.743472] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  157.743534] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000087081e28 state to 00000000f37c832b
[  157.743602] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  157.743683] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 00000000f37c832b
[  157.743755] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000087081e28
[  157.743820] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  157.743881] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  157.743941] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  157.744001] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  157.744066] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  157.744127] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  157.744191] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  157.744252] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  157.744313] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 00000000f37c832b
[  157.744377] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  157.744438] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000f37c832b
[  157.744509] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  157.744554] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  157.744587] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000f37c832b
[  157.744653] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000029aaf162 to 00000000f37c832b
[  157.744717] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000f37c832b
[  157.744784] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  157.744845] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  157.744908] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  157.744977] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 00000000f37c832b
[  157.745041] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f37c832b
[  157.745104] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  157.745166] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  157.745227] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  157.745287] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  157.745348] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f37c832b
[  157.746732] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  157.750250] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9031, diff=1, hw=0 hw_last=0
[  157.766831] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9032, diff=1, hw=0 hw_last=0
[  157.783408] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9033, diff=1, hw=0 hw_last=0
[  157.799987] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9034, diff=1, hw=0 hw_last=0
[  157.816568] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9035, diff=1, hw=0 hw_last=0
[  157.833146] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9036, diff=1, hw=0 hw_last=0
[  157.849723] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9037, diff=1, hw=0 hw_last=0
[  157.866305] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9038, diff=1, hw=0 hw_last=0
[  157.882886] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9039, diff=1, hw=0 hw_last=0
[  157.899463] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9040, diff=1, hw=0 hw_last=0
[  157.916041] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9041, diff=1, hw=0 hw_last=0
[  157.932621] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9042, diff=1, hw=0 hw_last=0
[  157.949199] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9043, diff=1, hw=0 hw_last=0
[  157.965777] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9044, diff=1, hw=0 hw_last=0
[  157.968878] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f37c832b nonblocking
[  157.968975] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  157.969057] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  157.982356] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9045, diff=1, hw=0 hw_last=0
[  157.982451] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f37c832b
[  157.982539] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  157.982613] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  157.982686] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  157.982759] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  157.982833] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f37c832b
[  157.998936] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9046, diff=1, hw=0 hw_last=0
[  158.015515] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9047, diff=1, hw=0 hw_last=0
[  158.032093] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9048, diff=1, hw=0 hw_last=0
[  158.048674] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9049, diff=1, hw=0 hw_last=0
[  158.065252] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9050, diff=1, hw=0 hw_last=0
[  158.081833] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9051, diff=1, hw=0 hw_last=0
[  158.098411] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9052, diff=1, hw=0 hw_last=0
[  158.114992] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9053, diff=1, hw=0 hw_last=0
[  158.131575] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9054, diff=1, hw=0 hw_last=0
[  158.148151] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9055, diff=1, hw=0 hw_last=0
[  158.164727] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9056, diff=1, hw=0 hw_last=0
[  158.181304] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9057, diff=1, hw=0 hw_last=0
[  158.197884] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9058, diff=1, hw=0 hw_last=0
[  158.214462] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9059, diff=1, hw=0 hw_last=0
[  158.231041] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9060, diff=1, hw=0 hw_last=0
[  158.247621] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9061, diff=1, hw=0 hw_last=0
[  158.264199] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9062, diff=1, hw=0 hw_last=0
[  158.280782] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9063, diff=1, hw=0 hw_last=0
[  158.297364] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9064, diff=1, hw=0 hw_last=0
[  158.313941] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9065, diff=1, hw=0 hw_last=0
[  158.330521] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9066, diff=1, hw=0 hw_last=0
[  158.347099] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9067, diff=1, hw=0 hw_last=0
[  158.363677] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9068, diff=1, hw=0 hw_last=0
[  158.380258] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9069, diff=1, hw=0 hw_last=0
[  158.396835] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9070, diff=1, hw=0 hw_last=0
[  158.413415] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9071, diff=1, hw=0 hw_last=0
[  158.429996] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9072, diff=1, hw=0 hw_last=0
[  158.446573] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9073, diff=1, hw=0 hw_last=0
[  158.463154] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9074, diff=1, hw=0 hw_last=0
[  158.479733] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9075, diff=1, hw=0 hw_last=0
[  158.496312] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9076, diff=1, hw=0 hw_last=0
[  158.512890] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9077, diff=1, hw=0 hw_last=0
[  158.529471] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9078, diff=1, hw=0 hw_last=0
[  158.546050] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9079, diff=1, hw=0 hw_last=0
[  158.562629] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9080, diff=1, hw=0 hw_last=0
[  158.579210] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9081, diff=1, hw=0 hw_last=0
[  158.595788] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9082, diff=1, hw=0 hw_last=0
[  158.612366] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9083, diff=1, hw=0 hw_last=0
[  158.628946] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9084, diff=1, hw=0 hw_last=0
[  158.645524] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9085, diff=1, hw=0 hw_last=0
[  158.662104] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9086, diff=1, hw=0 hw_last=0
[  158.678684] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9087, diff=1, hw=0 hw_last=0
[  158.695263] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9088, diff=1, hw=0 hw_last=0
[  158.711843] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9089, diff=1, hw=0 hw_last=0
[  158.728419] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9090, diff=1, hw=0 hw_last=0
[  158.744999] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9091, diff=1, hw=0 hw_last=0
[  158.761584] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9092, diff=1, hw=0 hw_last=0
[  158.772991] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  158.773102] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 9093 to client
[  158.778162] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9093, diff=1, hw=0 hw_last=0
[  158.787375] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  158.787467] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000082174610
[  158.787540] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  158.927379] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9102, diff=1, hw=0 hw_last=0
[  158.943956] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9103, diff=1, hw=0 hw_last=0
[  158.960537] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9104, diff=1, hw=0 hw_last=0
[  158.977113] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9105, diff=1, hw=0 hw_last=0
[  158.993690] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9106, diff=1, hw=0 hw_last=0
[  159.010270] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9107, diff=1, hw=0 hw_last=0
[  159.018499] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  159.018604] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000082174610
[  159.018680] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  159.018745] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000002cafbe1b state to 0000000082174610
[  159.018812] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  159.018873] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 0000000082174610
[  159.018943] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 000000002cafbe1b
[  159.019006] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  159.019067] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  159.019127] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  159.019187] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  159.019250] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  159.019310] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  159.019375] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  159.019435] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  159.019496] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 0000000082174610
[  159.019560] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  159.019622] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000082174610
[  159.019724] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  159.019773] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  159.019806] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000082174610
[  159.019882] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000004593454f to 0000000082174610
[  159.019947] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000082174610
[  159.020026] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000082174610 nonblocking
[  159.020130] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  159.020210] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  159.026847] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9108, diff=1, hw=0 hw_last=0
[  159.026941] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000082174610
[  159.027010] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  159.027072] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  159.027134] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  159.027196] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  159.027261] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000082174610
[  159.043424] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9109, diff=1, hw=0 hw_last=0
[  159.060004] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9110, diff=1, hw=0 hw_last=0
[  159.076584] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9111, diff=1, hw=0 hw_last=0
[  159.093163] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9112, diff=1, hw=0 hw_last=0
[  159.109746] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9113, diff=1, hw=0 hw_last=0
[  159.126322] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9114, diff=1, hw=0 hw_last=0
[  159.142901] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9115, diff=1, hw=0 hw_last=0
[  159.159483] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9116, diff=1, hw=0 hw_last=0
[  159.176063] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9117, diff=1, hw=0 hw_last=0
[  159.192637] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9118, diff=1, hw=0 hw_last=0
[  159.209216] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9119, diff=1, hw=0 hw_last=0
[  159.225795] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9120, diff=1, hw=0 hw_last=0
[  159.242373] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9121, diff=1, hw=0 hw_last=0
[  159.258952] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9122, diff=1, hw=0 hw_last=0
[  159.275531] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9123, diff=1, hw=0 hw_last=0
[  159.292111] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9124, diff=1, hw=0 hw_last=0
[  159.308689] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9125, diff=1, hw=0 hw_last=0
[  159.325276] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9126, diff=1, hw=0 hw_last=0
[  159.341851] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9127, diff=1, hw=0 hw_last=0
[  159.358432] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9128, diff=1, hw=0 hw_last=0
[  159.375010] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9129, diff=1, hw=0 hw_last=0
[  159.391586] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9130, diff=1, hw=0 hw_last=0
[  159.408167] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9131, diff=1, hw=0 hw_last=0
[  159.424746] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9132, diff=1, hw=0 hw_last=0
[  159.441329] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9133, diff=1, hw=0 hw_last=0
[  159.457907] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9134, diff=1, hw=0 hw_last=0
[  159.474484] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9135, diff=1, hw=0 hw_last=0
[  159.491065] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9136, diff=1, hw=0 hw_last=0
[  159.507642] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9137, diff=1, hw=0 hw_last=0
[  159.964687] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  159.964781] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000305e034
[  159.964853] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  159.964915] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000215b6887 state to 000000000305e034
[  159.964982] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  159.965043] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 000000000305e034
[  159.965111] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000215b6887
[  159.965174] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  159.965234] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  159.965294] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  159.965354] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  159.965418] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  159.965479] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  159.965543] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  159.965603] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  159.965664] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 000000000305e034
[  159.965727] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  159.965788] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000000305e034
[  159.965859] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  159.965904] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  159.965936] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000305e034
[  159.966003] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000007967e7cb to 000000000305e034
[  159.966065] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000305e034
[  159.966133] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  159.966195] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  159.966256] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  159.966327] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000000305e034
[  159.966392] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000305e034
[  159.966454] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  159.966515] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  159.966576] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  159.966637] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  159.966699] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000305e034
[  159.968128] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  159.971866] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9165, diff=1, hw=0 hw_last=0
[  159.988443] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9166, diff=1, hw=0 hw_last=0
[  160.005023] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9167, diff=1, hw=0 hw_last=0
[  160.021602] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9168, diff=1, hw=0 hw_last=0
[  160.038186] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9169, diff=1, hw=0 hw_last=0
[  160.054761] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9170, diff=1, hw=0 hw_last=0
[  160.071341] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9171, diff=1, hw=0 hw_last=0
[  160.087922] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9172, diff=1, hw=0 hw_last=0
[  160.104503] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9173, diff=1, hw=0 hw_last=0
[  160.121083] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9174, diff=1, hw=0 hw_last=0
[  160.137658] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9175, diff=1, hw=0 hw_last=0
[  160.154237] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9176, diff=1, hw=0 hw_last=0
[  160.170814] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9177, diff=1, hw=0 hw_last=0
[  160.187396] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9178, diff=1, hw=0 hw_last=0
[  160.196724] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  160.196833] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000305e034
[  160.196908] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  160.196971] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000215b6887 state to 000000000305e034
[  160.197037] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  160.197098] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 000000000305e034
[  160.197168] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000215b6887
[  160.197231] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  160.197291] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  160.197352] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  160.197412] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  160.197476] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  160.197536] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  160.197601] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  160.197662] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  160.197722] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 000000000305e034
[  160.197786] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  160.197849] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000000305e034
[  160.197920] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  160.197965] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  160.197997] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000305e034
[  160.198066] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000006fb5b2d2 to 000000000305e034
[  160.198129] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000305e034
[  160.198206] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000305e034 nonblocking
[  160.198318] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  160.198395] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  160.203971] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9179, diff=1, hw=0 hw_last=0
[  160.237128] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9181, diff=1, hw=0 hw_last=0
[  160.253704] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9182, diff=1, hw=0 hw_last=0
[  160.270285] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9183, diff=1, hw=0 hw_last=0
[  160.286866] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9184, diff=1, hw=0 hw_last=0
[  160.303446] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9185, diff=1, hw=0 hw_last=0
[  160.320024] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9186, diff=1, hw=0 hw_last=0
[  160.336605] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9187, diff=1, hw=0 hw_last=0
[  160.353186] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9188, diff=1, hw=0 hw_last=0
[  160.369766] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9189, diff=1, hw=0 hw_last=0
[  160.386341] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9190, diff=1, hw=0 hw_last=0
[  160.402918] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9191, diff=1, hw=0 hw_last=0
[  160.419497] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9192, diff=1, hw=0 hw_last=0
[  160.436076] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9193, diff=1, hw=0 hw_last=0
[  160.452655] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9194, diff=1, hw=0 hw_last=0
[  160.469234] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9195, diff=1, hw=0 hw_last=0
[  160.485813] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9196, diff=1, hw=0 hw_last=0
[  160.502393] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9197, diff=1, hw=0 hw_last=0
[  160.518976] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9198, diff=1, hw=0 hw_last=0
[  160.535552] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9199, diff=1, hw=0 hw_last=0
[  160.552132] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9200, diff=1, hw=0 hw_last=0
[  160.568713] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9201, diff=1, hw=0 hw_last=0
[  160.585290] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9202, diff=1, hw=0 hw_last=0
[  160.601870] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9203, diff=1, hw=0 hw_last=0
[  160.618450] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9204, diff=1, hw=0 hw_last=0
[  160.635028] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9205, diff=1, hw=0 hw_last=0
[  160.651609] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9206, diff=1, hw=0 hw_last=0
[  160.668187] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9207, diff=1, hw=0 hw_last=0
[  160.684767] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9208, diff=1, hw=0 hw_last=0
[  160.701344] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9209, diff=1, hw=0 hw_last=0
[  160.717922] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9210, diff=1, hw=0 hw_last=0
[  160.734504] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9211, diff=1, hw=0 hw_last=0
[  160.735079] systemd-journald[214]: Data hash table of /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal has a fill level at 75.1 (2732 of 3640 items, 2097152 file size, 767 bytes per hash table item), suggesting rotation.
[  160.751084] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9212, diff=1, hw=0 hw_last=0
[  160.757538] systemd-journald[214]: /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal: Journal header limits reached or header out-of-date, rotating.
[  160.767662] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9213, diff=1, hw=0 hw_last=0
[  160.784245] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9214, diff=1, hw=0 hw_last=0
[  160.800822] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9215, diff=1, hw=0 hw_last=0
[  160.817401] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9216, diff=1, hw=0 hw_last=0
[  160.833980] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9217, diff=1, hw=0 hw_last=0
[  160.850557] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9218, diff=1, hw=0 hw_last=0
[  160.867138] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9219, diff=1, hw=0 hw_last=0
[  160.883718] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9220, diff=1, hw=0 hw_last=0
[  160.900296] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9221, diff=1, hw=0 hw_last=0
[  160.916877] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9222, diff=1, hw=0 hw_last=0
[  160.933455] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9223, diff=1, hw=0 hw_last=0
[  160.950032] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9224, diff=1, hw=0 hw_last=0
[  160.966611] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9225, diff=1, hw=0 hw_last=0
[  160.983190] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9226, diff=1, hw=0 hw_last=0
[  160.999773] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9227, diff=1, hw=0 hw_last=0
[  161.016364] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9228, diff=1, hw=0 hw_last=0
[  161.032931] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9229, diff=1, hw=0 hw_last=0
[  161.049509] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9230, diff=1, hw=0 hw_last=0
[  161.066088] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9231, diff=1, hw=0 hw_last=0
[  161.082669] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9232, diff=1, hw=0 hw_last=0
[  161.099248] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9233, diff=1, hw=0 hw_last=0
[  161.115825] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9234, diff=1, hw=0 hw_last=0
[  161.132406] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9235, diff=1, hw=0 hw_last=0
[  161.231886] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9241, diff=1, hw=0 hw_last=0
[  161.248465] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9242, diff=1, hw=0 hw_last=0
[  161.265046] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9243, diff=1, hw=0 hw_last=0
[  161.281626] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9244, diff=1, hw=0 hw_last=0
[  161.298204] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9245, diff=1, hw=0 hw_last=0
[  161.314785] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9246, diff=1, hw=0 hw_last=0
[  161.331363] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9247, diff=1, hw=0 hw_last=0
[  161.347944] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9248, diff=1, hw=0 hw_last=0
[  161.364517] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9249, diff=1, hw=0 hw_last=0
[  161.381098] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9250, diff=1, hw=0 hw_last=0
[  161.390380] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  161.390498] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000d7e48c6b
[  161.390574] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  161.390637] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000bac3ec2d state to 00000000d7e48c6b
[  161.390707] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  161.390768] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000e8543c49 state to 00000000d7e48c6b
[  161.390837] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000bac3ec2d
[  161.390900] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  161.390960] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  161.391020] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  161.391080] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  161.391143] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  161.391202] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  161.391267] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  161.391326] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  161.391387] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 00000000d7e48c6b
[  161.391450] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  161.391512] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000d7e48c6b
[  161.391582] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  161.391667] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  161.391705] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000d7e48c6b
[  161.391783] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000007967e7cb to 00000000d7e48c6b
[  161.391848] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000d7e48c6b
[  161.391930] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000d7e48c6b nonblocking
[  161.392030] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  161.392102] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  161.397675] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9251, diff=1, hw=0 hw_last=0
[  161.397774] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000d7e48c6b
[  161.397849] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  161.397911] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  161.397972] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  161.398034] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  161.398096] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000d7e48c6b
[  161.414251] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9252, diff=1, hw=0 hw_last=0
[  161.430831] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9253, diff=1, hw=0 hw_last=0
[  161.447408] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9254, diff=1, hw=0 hw_last=0
[  161.463989] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9255, diff=1, hw=0 hw_last=0
[  161.480567] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9256, diff=1, hw=0 hw_last=0
[  161.497149] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9257, diff=1, hw=0 hw_last=0
[  161.513728] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9258, diff=1, hw=0 hw_last=0
[  161.530307] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9259, diff=1, hw=0 hw_last=0
[  161.546887] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9260, diff=1, hw=0 hw_last=0
[  161.563468] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9261, diff=1, hw=0 hw_last=0
[  161.580042] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9262, diff=1, hw=0 hw_last=0
[  161.596619] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9263, diff=1, hw=0 hw_last=0
[  161.613198] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9264, diff=1, hw=0 hw_last=0
[  161.629778] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9265, diff=1, hw=0 hw_last=0
[  161.646356] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9266, diff=1, hw=0 hw_last=0
[  161.662936] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9267, diff=1, hw=0 hw_last=0
[  161.679515] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9268, diff=1, hw=0 hw_last=0
[  161.696098] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9269, diff=1, hw=0 hw_last=0
[  161.712677] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9270, diff=1, hw=0 hw_last=0
[  161.729255] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9271, diff=1, hw=0 hw_last=0
[  161.745833] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9272, diff=1, hw=0 hw_last=0
[  161.762414] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9273, diff=1, hw=0 hw_last=0
[  161.778991] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9274, diff=1, hw=0 hw_last=0
[  161.795575] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9275, diff=1, hw=0 hw_last=0
[  161.812152] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9276, diff=1, hw=0 hw_last=0
[  161.828733] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9277, diff=1, hw=0 hw_last=0
[  161.845312] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9278, diff=1, hw=0 hw_last=0
[  161.861888] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9279, diff=1, hw=0 hw_last=0
[  161.878469] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9280, diff=1, hw=0 hw_last=0
[  161.895047] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9281, diff=1, hw=0 hw_last=0
[  161.911628] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9282, diff=1, hw=0 hw_last=0
[  161.928205] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9283, diff=1, hw=0 hw_last=0
[  161.944784] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9284, diff=1, hw=0 hw_last=0
[  161.961362] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9285, diff=1, hw=0 hw_last=0
[  161.977943] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9286, diff=1, hw=0 hw_last=0
[  161.994521] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9287, diff=1, hw=0 hw_last=0
[  162.011102] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9288, diff=1, hw=0 hw_last=0
[  162.027681] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9289, diff=1, hw=0 hw_last=0
[  162.044260] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9290, diff=1, hw=0 hw_last=0
[  162.060839] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9291, diff=1, hw=0 hw_last=0
[  162.077418] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9292, diff=1, hw=0 hw_last=0
[  162.094000] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9293, diff=1, hw=0 hw_last=0
[  162.110577] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9294, diff=1, hw=0 hw_last=0
[  162.127159] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9295, diff=1, hw=0 hw_last=0
[  162.143735] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9296, diff=1, hw=0 hw_last=0
[  162.160319] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9297, diff=1, hw=0 hw_last=0
[  162.176894] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9298, diff=1, hw=0 hw_last=0
[  162.193475] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9299, diff=1, hw=0 hw_last=0
[  162.210051] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9300, diff=1, hw=0 hw_last=0
[  162.226631] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9301, diff=1, hw=0 hw_last=0
[  162.243213] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9302, diff=1, hw=0 hw_last=0
[  162.248578] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  162.248689] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 9303 to client
[  162.252952] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  162.253045] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006c5644bb
[  162.253116] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  162.253178] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000003519e999 state to 000000006c5644bb
[  162.253244] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  162.253305] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 000000006c5644bb
[  162.253375] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 000000003519e999
[  162.253437] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  162.253496] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  162.253556] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  162.253616] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  162.253681] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  162.253741] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  162.253804] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  162.253864] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  162.253925] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 000000006c5644bb
[  162.253988] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  162.254049] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000006c5644bb
[  162.254121] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  162.254168] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  162.254199] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006c5644bb
[  162.254266] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000082174610 to 000000006c5644bb
[  162.254329] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006c5644bb
[  162.254395] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  162.254456] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  162.254518] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  162.254587] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000006c5644bb
[  162.254651] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006c5644bb
[  162.254713] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  162.254773] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  162.254833] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  162.254893] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  162.254954] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006c5644bb
[  162.256352] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  162.259796] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9303, diff=1, hw=0 hw_last=0
[  162.276375] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9304, diff=1, hw=0 hw_last=0
[  162.292953] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9305, diff=1, hw=0 hw_last=0
[  162.309531] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9306, diff=1, hw=0 hw_last=0
[  162.326113] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9307, diff=1, hw=0 hw_last=0
[  162.342693] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9308, diff=1, hw=0 hw_last=0
[  162.359272] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9309, diff=1, hw=0 hw_last=0
[  162.484741] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 000000003519e999
[  162.484803] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  162.484863] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  162.484923] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  162.484983] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  162.485047] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  162.485107] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  162.485170] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  162.485230] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  162.485290] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 000000006c5644bb
[  162.485353] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  162.485416] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000006c5644bb
[  162.485489] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  162.485535] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  162.485567] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006c5644bb
[  162.485637] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000008e9f664b to 000000006c5644bb
[  162.485700] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006c5644bb
[  162.485776] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006c5644bb nonblocking
[  162.485878] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  162.485961] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  162.491899] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9317, diff=1, hw=0 hw_last=0
[  162.492001] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006c5644bb
[  162.492085] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  162.492159] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  162.492232] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  162.492305] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  162.492378] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006c5644bb
[  162.508477] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9318, diff=1, hw=0 hw_last=0
[  162.525057] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9319, diff=1, hw=0 hw_last=0
[  162.541635] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9320, diff=1, hw=0 hw_last=0
[  162.558214] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9321, diff=1, hw=0 hw_last=0
[  162.574795] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9322, diff=1, hw=0 hw_last=0
[  162.591373] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9323, diff=1, hw=0 hw_last=0
[  162.607955] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9324, diff=1, hw=0 hw_last=0
[  162.624533] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9325, diff=1, hw=0 hw_last=0
[  162.641112] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9326, diff=1, hw=0 hw_last=0
[  162.657695] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9327, diff=1, hw=0 hw_last=0
[  162.674272] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9328, diff=1, hw=0 hw_last=0
[  162.690848] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9329, diff=1, hw=0 hw_last=0
[  162.707425] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9330, diff=1, hw=0 hw_last=0
[  162.724005] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9331, diff=1, hw=0 hw_last=0
[  162.740583] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9332, diff=1, hw=0 hw_last=0
[  162.757162] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9333, diff=1, hw=0 hw_last=0
[  162.773742] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9334, diff=1, hw=0 hw_last=0
[  162.790322] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9335, diff=1, hw=0 hw_last=0
[  162.806906] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9336, diff=1, hw=0 hw_last=0
[  162.823485] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9337, diff=1, hw=0 hw_last=0
[  162.840062] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9338, diff=1, hw=0 hw_last=0
[  162.856641] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9339, diff=1, hw=0 hw_last=0
[  162.873219] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9340, diff=1, hw=0 hw_last=0
[  162.889797] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9341, diff=1, hw=0 hw_last=0
[  162.906380] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9342, diff=1, hw=0 hw_last=0
[  162.922960] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9343, diff=1, hw=0 hw_last=0
[  162.939538] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9344, diff=1, hw=0 hw_last=0
[  162.956118] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9345, diff=1, hw=0 hw_last=0
[  162.972696] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9346, diff=1, hw=0 hw_last=0
[  162.989276] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9347, diff=1, hw=0 hw_last=0
[  163.005854] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9348, diff=1, hw=0 hw_last=0
[  163.022434] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9349, diff=1, hw=0 hw_last=0
[  163.039013] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9350, diff=1, hw=0 hw_last=0
[  163.055589] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9351, diff=1, hw=0 hw_last=0
[  163.072170] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9352, diff=1, hw=0 hw_last=0
[  163.088750] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9353, diff=1, hw=0 hw_last=0
[  163.105330] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9354, diff=1, hw=0 hw_last=0
[  163.121908] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9355, diff=1, hw=0 hw_last=0
[  163.138488] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9356, diff=1, hw=0 hw_last=0
[  163.271124] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9364, diff=1, hw=0 hw_last=0
[  163.287703] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9365, diff=1, hw=0 hw_last=0
[  163.304281] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9366, diff=1, hw=0 hw_last=0
[  163.320858] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9367, diff=1, hw=0 hw_last=0
[  163.337438] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9368, diff=1, hw=0 hw_last=0
[  163.354021] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9369, diff=1, hw=0 hw_last=0
[  163.359576] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  163.359713] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 9370 to client
[  163.362987] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  163.363084] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000018d86a98
[  163.363156] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  163.363217] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000fefb5c61 state to 0000000018d86a98
[  163.363283] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  163.363343] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000adb7ad91 state to 0000000018d86a98
[  163.363411] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000fefb5c61
[  163.363473] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  163.363533] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  163.363593] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  163.363677] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  163.363747] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  163.363812] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  163.363878] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  163.363941] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  163.364004] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 0000000018d86a98
[  163.364067] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  163.364128] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000018d86a98
[  163.364200] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  163.364246] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  163.364277] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000018d86a98
[  163.364349] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000f37c832b to 0000000018d86a98
[  163.364412] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000018d86a98
[  163.364479] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  163.364541] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  163.364602] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  163.364673] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 0000000018d86a98
[  163.364738] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000018d86a98
[  163.364800] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  163.364860] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  163.364920] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  163.364981] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  163.365042] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000018d86a98
[  163.366380] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  163.370613] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9370, diff=1, hw=0 hw_last=0
[  163.387179] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9371, diff=1, hw=0 hw_last=0
[  163.403761] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9372, diff=1, hw=0 hw_last=0
[  163.420342] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9373, diff=1, hw=0 hw_last=0
[  163.436918] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9374, diff=1, hw=0 hw_last=0
[  163.453500] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9375, diff=1, hw=0 hw_last=0
[  163.470078] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9376, diff=1, hw=0 hw_last=0
[  163.486660] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9377, diff=1, hw=0 hw_last=0
[  163.503236] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9378, diff=1, hw=0 hw_last=0
[  163.519817] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9379, diff=1, hw=0 hw_last=0
[  163.536393] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9380, diff=1, hw=0 hw_last=0
[  163.552977] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9381, diff=1, hw=0 hw_last=0
[  163.569552] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9382, diff=1, hw=0 hw_last=0
[  163.586135] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9383, diff=1, hw=0 hw_last=0
[  163.586383] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  163.586479] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000018d86a98
[  163.586555] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  163.586620] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000fefb5c61 state to 0000000018d86a98
[  163.586687] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  163.586750] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000adb7ad91 state to 0000000018d86a98
[  163.586820] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000fefb5c61
[  163.586884] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  163.586944] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  163.587004] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  163.587067] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  163.587130] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  163.587190] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  163.587254] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  163.587315] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  163.587375] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 0000000018d86a98
[  163.587439] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  163.587501] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000018d86a98
[  163.587573] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  163.603056] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  163.603121] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000018d86a98
[  163.619286] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9385, diff=1, hw=0 hw_last=0
[  163.635864] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9386, diff=1, hw=0 hw_last=0
[  163.652442] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9387, diff=1, hw=0 hw_last=0
[  163.669022] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9388, diff=1, hw=0 hw_last=0
[  163.685601] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9389, diff=1, hw=0 hw_last=0
[  163.702180] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9390, diff=1, hw=0 hw_last=0
[  163.718762] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9391, diff=1, hw=0 hw_last=0
[  163.735340] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9392, diff=1, hw=0 hw_last=0
[  163.751919] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9393, diff=1, hw=0 hw_last=0
[  163.768500] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9394, diff=1, hw=0 hw_last=0
[  163.785077] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9395, diff=1, hw=0 hw_last=0
[  163.801655] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9396, diff=1, hw=0 hw_last=0
[  163.818231] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9397, diff=1, hw=0 hw_last=0
[  163.834810] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9398, diff=1, hw=0 hw_last=0
[  163.851390] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9399, diff=1, hw=0 hw_last=0
[  163.867969] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9400, diff=1, hw=0 hw_last=0
[  163.884548] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9401, diff=1, hw=0 hw_last=0
[  163.901127] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9402, diff=1, hw=0 hw_last=0
[  163.917714] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9403, diff=1, hw=0 hw_last=0
[  163.934289] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9404, diff=1, hw=0 hw_last=0
[  163.950871] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9405, diff=1, hw=0 hw_last=0
[  163.967447] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9406, diff=1, hw=0 hw_last=0
[  163.984025] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9407, diff=1, hw=0 hw_last=0
[  164.000606] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9408, diff=1, hw=0 hw_last=0
[  164.017187] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9409, diff=1, hw=0 hw_last=0
[  164.033762] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9410, diff=1, hw=0 hw_last=0
[  164.050343] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9411, diff=1, hw=0 hw_last=0
[  164.066922] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9412, diff=1, hw=0 hw_last=0
[  164.083503] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9413, diff=1, hw=0 hw_last=0
[  164.100080] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9414, diff=1, hw=0 hw_last=0
[  164.116658] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9415, diff=1, hw=0 hw_last=0
[  164.133239] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9416, diff=1, hw=0 hw_last=0
[  164.149819] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9417, diff=1, hw=0 hw_last=0
[  164.166398] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9418, diff=1, hw=0 hw_last=0
[  164.182978] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9419, diff=1, hw=0 hw_last=0
[  164.199556] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9420, diff=1, hw=0 hw_last=0
[  164.216134] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9421, diff=1, hw=0 hw_last=0
[  164.232714] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9422, diff=1, hw=0 hw_last=0
[  164.249293] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9423, diff=1, hw=0 hw_last=0
[  164.265871] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9424, diff=1, hw=0 hw_last=0
[  164.282453] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9425, diff=1, hw=0 hw_last=0
[  164.299033] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9426, diff=1, hw=0 hw_last=0
[  164.315612] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9427, diff=1, hw=0 hw_last=0
[  164.332191] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9428, diff=1, hw=0 hw_last=0
[  164.348769] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9429, diff=1, hw=0 hw_last=0
[  164.365348] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9430, diff=1, hw=0 hw_last=0
[  164.381927] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9431, diff=1, hw=0 hw_last=0
[  164.398505] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9432, diff=1, hw=0 hw_last=0
[  164.415089] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9433, diff=1, hw=0 hw_last=0
[  164.427174] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  164.427302] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 9434 to client
[  164.431671] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9434, diff=1, hw=0 hw_last=0
[  164.440574] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  164.440669] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000ab379aee
[  164.440739] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  164.440802] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000055579822 state to 00000000ab379aee
[  164.440870] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  164.440931] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 00000000ab379aee
[  164.441000] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000055579822
[  164.441064] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  164.665816] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  164.665899] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  164.680354] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9449, diff=1, hw=0 hw_last=0
[  164.680453] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ab379aee
[  164.680543] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  164.680617] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  164.680690] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  164.680764] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  164.680838] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ab379aee
[  164.696932] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9450, diff=1, hw=0 hw_last=0
[  164.713513] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9451, diff=1, hw=0 hw_last=0
[  164.730091] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9452, diff=1, hw=0 hw_last=0
[  164.746669] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9453, diff=1, hw=0 hw_last=0
[  164.763250] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9454, diff=1, hw=0 hw_last=0
[  164.779830] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9455, diff=1, hw=0 hw_last=0
[  164.796409] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9456, diff=1, hw=0 hw_last=0
[  164.812989] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9457, diff=1, hw=0 hw_last=0
[  164.829569] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9458, diff=1, hw=0 hw_last=0
[  164.846149] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9459, diff=1, hw=0 hw_last=0
[  164.862722] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9460, diff=1, hw=0 hw_last=0
[  164.879301] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9461, diff=1, hw=0 hw_last=0
[  164.895879] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9462, diff=1, hw=0 hw_last=0
[  164.912459] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9463, diff=1, hw=0 hw_last=0
[  164.929040] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9464, diff=1, hw=0 hw_last=0
[  164.945617] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9465, diff=1, hw=0 hw_last=0
[  164.962197] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9466, diff=1, hw=0 hw_last=0
[  164.978776] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9467, diff=1, hw=0 hw_last=0
[  164.995360] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9468, diff=1, hw=0 hw_last=0
[  165.011938] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9469, diff=1, hw=0 hw_last=0
[  165.028516] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9470, diff=1, hw=0 hw_last=0
[  165.045094] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9471, diff=1, hw=0 hw_last=0
[  165.061675] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9472, diff=1, hw=0 hw_last=0
[  165.078255] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9473, diff=1, hw=0 hw_last=0
[  165.094842] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9474, diff=1, hw=0 hw_last=0
[  165.111422] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9475, diff=1, hw=0 hw_last=0
[  165.127997] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9476, diff=1, hw=0 hw_last=0
[  165.144570] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9477, diff=1, hw=0 hw_last=0
[  165.161150] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9478, diff=1, hw=0 hw_last=0
[  165.177729] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9479, diff=1, hw=0 hw_last=0
[  165.194307] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9480, diff=1, hw=0 hw_last=0
[  165.210885] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9481, diff=1, hw=0 hw_last=0
[  165.227467] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9482, diff=1, hw=0 hw_last=0
[  165.244047] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9483, diff=1, hw=0 hw_last=0
[  165.260625] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9484, diff=1, hw=0 hw_last=0
[  165.277204] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9485, diff=1, hw=0 hw_last=0
[  165.293782] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9486, diff=1, hw=0 hw_last=0
[  165.310362] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9487, diff=1, hw=0 hw_last=0
[  165.326941] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9488, diff=1, hw=0 hw_last=0
[  165.343519] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9489, diff=1, hw=0 hw_last=0
[  165.360102] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9490, diff=1, hw=0 hw_last=0
[  165.376679] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9491, diff=1, hw=0 hw_last=0
[  165.393258] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9492, diff=1, hw=0 hw_last=0
[  165.409838] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9493, diff=1, hw=0 hw_last=0
[  165.426417] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9494, diff=1, hw=0 hw_last=0
[  165.442997] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9495, diff=1, hw=0 hw_last=0
[  165.459574] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9496, diff=1, hw=0 hw_last=0
[  165.476154] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9497, diff=1, hw=0 hw_last=0
[  165.492743] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9498, diff=1, hw=0 hw_last=0
[  165.494858] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  165.494972] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 9499 to client
[  165.502241] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  165.502335] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000fde3661d
[  166.039844] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9531, diff=1, hw=0 hw_last=0
[  166.056429] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9532, diff=1, hw=0 hw_last=0
[  166.073005] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9533, diff=1, hw=0 hw_last=0
[  166.089586] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9534, diff=1, hw=0 hw_last=0
[  166.106163] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9535, diff=1, hw=0 hw_last=0
[  166.122742] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9536, diff=1, hw=0 hw_last=0
[  166.139321] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9537, diff=1, hw=0 hw_last=0
[  166.155899] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9538, diff=1, hw=0 hw_last=0
[  166.172479] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9539, diff=1, hw=0 hw_last=0
[  166.189057] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9540, diff=1, hw=0 hw_last=0
[  166.205635] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9541, diff=1, hw=0 hw_last=0
[  166.222216] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9542, diff=1, hw=0 hw_last=0
[  166.238795] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9543, diff=1, hw=0 hw_last=0
[  166.255374] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9544, diff=1, hw=0 hw_last=0
[  166.271954] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9545, diff=1, hw=0 hw_last=0
[  166.288534] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9546, diff=1, hw=0 hw_last=0
[  166.305114] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9547, diff=1, hw=0 hw_last=0
[  166.321692] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9548, diff=1, hw=0 hw_last=0
[  166.338271] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9549, diff=1, hw=0 hw_last=0
[  166.354850] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9550, diff=1, hw=0 hw_last=0
[  166.371432] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9551, diff=1, hw=0 hw_last=0
[  166.388011] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9552, diff=1, hw=0 hw_last=0
[  166.404588] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9553, diff=1, hw=0 hw_last=0
[  166.421166] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9554, diff=1, hw=0 hw_last=0
[  166.437748] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9555, diff=1, hw=0 hw_last=0
[  166.454326] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9556, diff=1, hw=0 hw_last=0
[  166.470907] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9557, diff=1, hw=0 hw_last=0
[  166.487491] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9558, diff=1, hw=0 hw_last=0
[  166.494599] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  166.494721] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 9559 to client
[  166.497000] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  166.497104] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000095dd8ec0
[  166.497190] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  166.497264] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000ec98bd42 state to 0000000095dd8ec0
[  166.497341] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  166.497413] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 0000000095dd8ec0
[  166.497494] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000ec98bd42
[  166.497568] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  166.497639] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  166.497711] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  166.497782] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  166.497856] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  166.497927] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  166.498004] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  166.498075] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  166.498146] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 0000000095dd8ec0
[  166.498220] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  166.498292] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000095dd8ec0
[  166.498374] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  166.498422] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  166.498458] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000095dd8ec0
[  166.498537] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000000ace560b to 0000000095dd8ec0
[  166.498610] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000095dd8ec0
[  166.498688] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  166.498760] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  166.498834] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  166.498915] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 0000000095dd8ec0
[  166.498988] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000095dd8ec0
[  166.499061] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  166.499134] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  166.499206] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  166.499279] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  166.499351] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000095dd8ec0
[  166.500829] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  166.504071] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9559, diff=1, hw=0 hw_last=0
[  166.520647] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9560, diff=1, hw=0 hw_last=0
[  166.537226] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9561, diff=1, hw=0 hw_last=0
[  166.553805] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9562, diff=1, hw=0 hw_last=0
[  166.570386] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9563, diff=1, hw=0 hw_last=0
[  166.669865] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9569, diff=1, hw=0 hw_last=0
[  166.678648] systemd-journald[214]: /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal: Journal header limits reached or header out-of-date, rotating.
[  166.686444] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9570, diff=1, hw=0 hw_last=0
[  166.703018] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9571, diff=1, hw=0 hw_last=0
[  166.719601] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9572, diff=1, hw=0 hw_last=0
[  166.722128] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  166.722243] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000095dd8ec0
[  166.722332] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  166.722405] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000ec98bd42 state to 0000000095dd8ec0
[  166.722483] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  166.722556] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 0000000095dd8ec0
[  166.722638] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000ec98bd42
[  166.722712] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  166.722785] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  166.722856] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  166.722928] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  166.723003] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  166.723075] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  166.723152] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  166.723224] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  166.723296] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 0000000095dd8ec0
[  166.723371] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  166.723446] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000095dd8ec0
[  166.723528] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  166.723577] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  166.723652] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000095dd8ec0
[  166.723740] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000008e9f664b to 0000000095dd8ec0
[  166.723817] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000095dd8ec0
[  166.723908] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000095dd8ec0 nonblocking
[  166.724025] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  166.724111] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  166.736175] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9573, diff=1, hw=0 hw_last=0
[  166.736273] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000095dd8ec0
[  166.736354] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  166.736428] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  166.736502] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  166.736575] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  166.736650] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000095dd8ec0
[  166.752752] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9574, diff=1, hw=0 hw_last=0
[  166.769330] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9575, diff=1, hw=0 hw_last=0
[  166.785911] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9576, diff=1, hw=0 hw_last=0
[  166.802488] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9577, diff=1, hw=0 hw_last=0
[  166.819068] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9578, diff=1, hw=0 hw_last=0
[  166.835651] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9579, diff=1, hw=0 hw_last=0
[  166.852226] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9580, diff=1, hw=0 hw_last=0
[  166.868806] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9581, diff=1, hw=0 hw_last=0
[  166.885386] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9582, diff=1, hw=0 hw_last=0
[  166.901965] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9583, diff=1, hw=0 hw_last=0
[  166.918541] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9584, diff=1, hw=0 hw_last=0
[  166.935120] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9585, diff=1, hw=0 hw_last=0
[  166.951700] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9586, diff=1, hw=0 hw_last=0
[  166.968278] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9587, diff=1, hw=0 hw_last=0
[  166.984857] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9588, diff=1, hw=0 hw_last=0
[  167.001437] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9589, diff=1, hw=0 hw_last=0
[  167.018016] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9590, diff=1, hw=0 hw_last=0
[  167.034596] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9591, diff=1, hw=0 hw_last=0
[  167.051176] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9592, diff=1, hw=0 hw_last=0
[  167.067756] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9593, diff=1, hw=0 hw_last=0
[  167.084336] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9594, diff=1, hw=0 hw_last=0
[  167.100914] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9595, diff=1, hw=0 hw_last=0
[  167.117492] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9596, diff=1, hw=0 hw_last=0
[  167.134071] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9597, diff=1, hw=0 hw_last=0
[  167.150649] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9598, diff=1, hw=0 hw_last=0
[  167.167234] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9599, diff=1, hw=0 hw_last=0
[  167.183808] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9600, diff=1, hw=0 hw_last=0
[  167.200387] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9601, diff=1, hw=0 hw_last=0
[  167.216967] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9602, diff=1, hw=0 hw_last=0
[  167.233545] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9603, diff=1, hw=0 hw_last=0
[  167.333022] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9609, diff=1, hw=0 hw_last=0
[  167.349601] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9610, diff=1, hw=0 hw_last=0
[  167.366181] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9611, diff=1, hw=0 hw_last=0
[  167.382760] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9612, diff=1, hw=0 hw_last=0
[  167.399338] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9613, diff=1, hw=0 hw_last=0
[  167.415918] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9614, diff=1, hw=0 hw_last=0
[  167.432499] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9615, diff=1, hw=0 hw_last=0
[  167.449077] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9616, diff=1, hw=0 hw_last=0
[  167.465655] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9617, diff=1, hw=0 hw_last=0
[  167.482240] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9618, diff=1, hw=0 hw_last=0
[  167.485046] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  167.485168] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 9619 to client
[  167.491439] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  167.491543] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000fde3661d
[  167.491648] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  167.491727] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000215b6887 state to 00000000fde3661d
[  167.491807] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  167.491880] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 00000000fde3661d
[  167.491961] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000215b6887
[  167.492036] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  167.492108] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  167.492180] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  167.492252] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  167.492328] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  167.492400] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  167.492478] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  167.492550] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  167.492621] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 00000000fde3661d
[  167.492698] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  167.492772] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000fde3661d
[  167.492855] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  167.492903] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  167.492940] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000fde3661d
[  167.493020] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000029aaf162 to 00000000fde3661d
[  167.493094] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000fde3661d
[  167.493173] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  167.493247] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  167.493320] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  167.493404] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 00000000fde3661d
[  167.493479] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000fde3661d
[  167.493552] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  167.493625] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  167.493697] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  167.493769] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  167.493841] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000fde3661d
[  167.495297] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  167.498821] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9619, diff=1, hw=0 hw_last=0
[  167.515397] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9620, diff=1, hw=0 hw_last=0
[  167.531976] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9621, diff=1, hw=0 hw_last=0
[  167.548555] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9622, diff=1, hw=0 hw_last=0
[  167.565137] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9623, diff=1, hw=0 hw_last=0
[  167.581714] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9624, diff=1, hw=0 hw_last=0
[  167.598294] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9625, diff=1, hw=0 hw_last=0
[  167.614874] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9626, diff=1, hw=0 hw_last=0
[  167.631459] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9627, diff=1, hw=0 hw_last=0
[  167.648037] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9628, diff=1, hw=0 hw_last=0
[  167.664612] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9629, diff=1, hw=0 hw_last=0
[  167.681192] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9630, diff=1, hw=0 hw_last=0
[  167.697767] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9631, diff=1, hw=0 hw_last=0
[  167.714348] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9632, diff=1, hw=0 hw_last=0
[  167.723860] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  167.723974] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000fde3661d
[  167.724061] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  167.724134] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000215b6887 state to 00000000fde3661d
[  167.724211] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  167.724283] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 00000000fde3661d
[  167.724364] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000215b6887
[  167.724439] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  167.724510] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  167.724581] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  167.724652] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  167.724727] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  167.724798] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  167.996188] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9649, diff=1, hw=0 hw_last=0
[  168.012768] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9650, diff=1, hw=0 hw_last=0
[  168.029347] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9651, diff=1, hw=0 hw_last=0
[  168.045928] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9652, diff=1, hw=0 hw_last=0
[  168.062507] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9653, diff=1, hw=0 hw_last=0
[  168.079087] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9654, diff=1, hw=0 hw_last=0
[  168.095665] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9655, diff=1, hw=0 hw_last=0
[  168.112245] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9656, diff=1, hw=0 hw_last=0
[  168.128824] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9657, diff=1, hw=0 hw_last=0
[  168.145402] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9658, diff=1, hw=0 hw_last=0
[  168.161984] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9659, diff=1, hw=0 hw_last=0
[  168.178561] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9660, diff=1, hw=0 hw_last=0
[  168.195140] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9661, diff=1, hw=0 hw_last=0
[  168.211719] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9662, diff=1, hw=0 hw_last=0
[  168.228298] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9663, diff=1, hw=0 hw_last=0
[  168.244877] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9664, diff=1, hw=0 hw_last=0
[  168.261456] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9665, diff=1, hw=0 hw_last=0
[  168.278035] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9666, diff=1, hw=0 hw_last=0
[  168.294615] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9667, diff=1, hw=0 hw_last=0
[  168.311195] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9668, diff=1, hw=0 hw_last=0
[  168.327777] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9669, diff=1, hw=0 hw_last=0
[  168.344354] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9670, diff=1, hw=0 hw_last=0
[  168.360934] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9671, diff=1, hw=0 hw_last=0
[  168.377511] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9672, diff=1, hw=0 hw_last=0
[  168.394091] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9673, diff=1, hw=0 hw_last=0
[  168.410669] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9674, diff=1, hw=0 hw_last=0
[  168.427249] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9675, diff=1, hw=0 hw_last=0
[  168.443828] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9676, diff=1, hw=0 hw_last=0
[  168.460407] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9677, diff=1, hw=0 hw_last=0
[  168.476989] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9678, diff=1, hw=0 hw_last=0
[  168.493567] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9679, diff=1, hw=0 hw_last=0
[  168.510145] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9680, diff=1, hw=0 hw_last=0
[  168.526724] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9681, diff=1, hw=0 hw_last=0
[  168.543306] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9682, diff=1, hw=0 hw_last=0
[  168.559883] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9683, diff=1, hw=0 hw_last=0
[  168.576461] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9684, diff=1, hw=0 hw_last=0
[  168.593041] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9685, diff=1, hw=0 hw_last=0
[  168.609621] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9686, diff=1, hw=0 hw_last=0
[  168.626200] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9687, diff=1, hw=0 hw_last=0
[  168.642782] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9688, diff=1, hw=0 hw_last=0
[  168.649152] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  168.649271] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 9689 to client
[  168.651556] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  168.651712] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000095dd8ec0
[  168.651805] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  168.651882] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000bac3ec2d state to 0000000095dd8ec0
[  168.651962] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  168.652035] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 0000000095dd8ec0
[  168.652115] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000bac3ec2d
[  168.652190] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  168.652263] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  168.652335] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  168.652406] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  168.652481] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  168.652554] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  168.652630] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  168.652702] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  168.652773] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 0000000095dd8ec0
[  168.652847] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  168.652919] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000095dd8ec0
[  168.653003] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  168.653052] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  168.653088] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000095dd8ec0
[  168.653168] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000f37c832b to 0000000095dd8ec0
[  168.653242] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000095dd8ec0
[  168.653319] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  168.659365] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9689, diff=1, hw=0 hw_last=0
[  168.675941] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9690, diff=1, hw=0 hw_last=0
[  168.692521] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9691, diff=1, hw=0 hw_last=0
[  168.709097] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9692, diff=1, hw=0 hw_last=0
[  168.725679] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9693, diff=1, hw=0 hw_last=0
[  168.742259] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9694, diff=1, hw=0 hw_last=0
[  168.758839] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9695, diff=1, hw=0 hw_last=0
[  168.775417] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9696, diff=1, hw=0 hw_last=0
[  168.791995] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9697, diff=1, hw=0 hw_last=0
[  168.808577] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9698, diff=1, hw=0 hw_last=0
[  168.825158] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9699, diff=1, hw=0 hw_last=0
[  168.841740] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9700, diff=1, hw=0 hw_last=0
[  168.858312] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9701, diff=1, hw=0 hw_last=0
[  168.874893] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9702, diff=1, hw=0 hw_last=0
[  168.884604] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  168.884719] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000095dd8ec0
[  168.884808] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  168.884882] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000bac3ec2d state to 0000000095dd8ec0
[  168.884960] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  168.885033] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 0000000095dd8ec0
[  168.885114] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000bac3ec2d
[  168.885189] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  168.885260] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  168.885332] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  168.885404] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  168.885478] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  168.885551] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  168.885626] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  168.885699] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  168.885770] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 0000000095dd8ec0
[  168.885845] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  168.885919] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000095dd8ec0
[  168.886002] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  168.886047] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  168.886084] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000095dd8ec0
[  168.886164] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000000ace560b to 0000000095dd8ec0
[  168.886238] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000095dd8ec0
[  168.886326] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000095dd8ec0 nonblocking
[  168.886443] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  168.886530] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  168.891468] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9703, diff=1, hw=0 hw_last=0
[  168.891564] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000095dd8ec0
[  168.891652] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  168.891727] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  168.891800] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  168.891874] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  168.891948] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000095dd8ec0
[  168.908048] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9704, diff=1, hw=0 hw_last=0
[  168.924626] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9705, diff=1, hw=0 hw_last=0
[  168.941205] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9706, diff=1, hw=0 hw_last=0
[  168.957784] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9707, diff=1, hw=0 hw_last=0
[  168.974363] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9708, diff=1, hw=0 hw_last=0
[  168.990947] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9709, diff=1, hw=0 hw_last=0
[  169.007523] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9710, diff=1, hw=0 hw_last=0
[  169.024101] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9711, diff=1, hw=0 hw_last=0
[  169.040681] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9712, diff=1, hw=0 hw_last=0
[  169.057261] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9713, diff=1, hw=0 hw_last=0
[  169.073837] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9714, diff=1, hw=0 hw_last=0
[  169.090416] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9715, diff=1, hw=0 hw_last=0
[  169.106995] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9716, diff=1, hw=0 hw_last=0
[  169.123574] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9717, diff=1, hw=0 hw_last=0
[  169.140154] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9718, diff=1, hw=0 hw_last=0
[  169.156733] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9719, diff=1, hw=0 hw_last=0
[  169.173313] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9720, diff=1, hw=0 hw_last=0
[  169.189892] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9721, diff=1, hw=0 hw_last=0
[  169.206474] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9722, diff=1, hw=0 hw_last=0
[  169.223050] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9723, diff=1, hw=0 hw_last=0
[  169.239630] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9724, diff=1, hw=0 hw_last=0
[  169.305947] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9728, diff=1, hw=0 hw_last=0
[  169.322525] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9729, diff=1, hw=0 hw_last=0
[  169.339104] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9730, diff=1, hw=0 hw_last=0
[  169.355684] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9731, diff=1, hw=0 hw_last=0
[  169.372263] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9732, diff=1, hw=0 hw_last=0
[  169.388842] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9733, diff=1, hw=0 hw_last=0
[  169.405421] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9734, diff=1, hw=0 hw_last=0
[  169.422000] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9735, diff=1, hw=0 hw_last=0
[  169.438579] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9736, diff=1, hw=0 hw_last=0
[  169.455158] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9737, diff=1, hw=0 hw_last=0
[  169.471740] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9738, diff=1, hw=0 hw_last=0
[  169.488318] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9739, diff=1, hw=0 hw_last=0
[  169.504904] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9740, diff=1, hw=0 hw_last=0
[  169.521478] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9741, diff=1, hw=0 hw_last=0
[  169.538056] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9742, diff=1, hw=0 hw_last=0
[  169.554636] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9743, diff=1, hw=0 hw_last=0
[  169.571213] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9744, diff=1, hw=0 hw_last=0
[  169.587794] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9745, diff=1, hw=0 hw_last=0
[  169.604372] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9746, diff=1, hw=0 hw_last=0
[  169.620951] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9747, diff=1, hw=0 hw_last=0
[  169.637530] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9748, diff=1, hw=0 hw_last=0
[  169.654110] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9749, diff=1, hw=0 hw_last=0
[  169.670691] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9750, diff=1, hw=0 hw_last=0
[  169.687268] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9751, diff=1, hw=0 hw_last=0
[  169.703853] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9752, diff=1, hw=0 hw_last=0
[  169.720427] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9753, diff=1, hw=0 hw_last=0
[  169.737005] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9754, diff=1, hw=0 hw_last=0
[  169.753585] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9755, diff=1, hw=0 hw_last=0
[  169.770165] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9756, diff=1, hw=0 hw_last=0
[  169.786745] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9757, diff=1, hw=0 hw_last=0
[  169.803325] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9758, diff=1, hw=0 hw_last=0
[  169.808499] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  169.808621] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 9759 to client
[  169.812886] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  169.812991] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000fde3661d
[  169.813073] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  169.813147] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000082b4fa6a state to 00000000fde3661d
[  169.813224] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  169.813297] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a743c9a8 state to 00000000fde3661d
[  169.813377] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 0000000082b4fa6a
[  169.813452] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  169.813523] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  169.813595] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  169.813666] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  169.813742] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  169.813813] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  169.813890] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  169.813962] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  169.814034] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 00000000fde3661d
[  169.814109] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  169.814182] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000fde3661d
[  169.814264] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  169.814313] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  169.814349] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000fde3661d
[  169.814428] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000082174610 to 00000000fde3661d
[  169.814502] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000fde3661d
[  169.814579] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  169.814652] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  169.814725] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  169.814807] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 00000000fde3661d
[  169.814882] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000fde3661d
[  169.814955] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  169.815028] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  169.815100] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  169.815172] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  169.815245] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000fde3661d
[  169.816703] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  169.819908] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9759, diff=1, hw=0 hw_last=0
[  169.836487] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9760, diff=1, hw=0 hw_last=0
[  170.400174] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9794, diff=1, hw=0 hw_last=0
[  170.416754] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9795, diff=1, hw=0 hw_last=0
[  170.433333] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9796, diff=1, hw=0 hw_last=0
[  170.449911] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9797, diff=1, hw=0 hw_last=0
[  170.466490] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9798, diff=1, hw=0 hw_last=0
[  170.483068] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9799, diff=1, hw=0 hw_last=0
[  170.499653] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9800, diff=1, hw=0 hw_last=0
[  170.516228] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9801, diff=1, hw=0 hw_last=0
[  170.532809] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9802, diff=1, hw=0 hw_last=0
[  170.549386] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9803, diff=1, hw=0 hw_last=0
[  170.565966] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9804, diff=1, hw=0 hw_last=0
[  170.582546] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9805, diff=1, hw=0 hw_last=0
[  170.599125] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9806, diff=1, hw=0 hw_last=0
[  170.615702] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9807, diff=1, hw=0 hw_last=0
[  170.632282] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9808, diff=1, hw=0 hw_last=0
[  170.648863] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9809, diff=1, hw=0 hw_last=0
[  170.665443] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9810, diff=1, hw=0 hw_last=0
[  170.682019] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9811, diff=1, hw=0 hw_last=0
[  170.698599] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9812, diff=1, hw=0 hw_last=0
[  170.715178] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9813, diff=1, hw=0 hw_last=0
[  170.731758] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9814, diff=1, hw=0 hw_last=0
[  170.748338] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9815, diff=1, hw=0 hw_last=0
[  170.764918] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9816, diff=1, hw=0 hw_last=0
[  170.781496] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9817, diff=1, hw=0 hw_last=0
[  170.798074] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9818, diff=1, hw=0 hw_last=0
[  170.814655] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9819, diff=1, hw=0 hw_last=0
[  170.831237] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9820, diff=1, hw=0 hw_last=0
[  170.847813] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9821, diff=1, hw=0 hw_last=0
[  170.864396] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9822, diff=1, hw=0 hw_last=0
[  170.874684] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  170.874806] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 9823 to client
[  170.876094] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  170.876200] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000095dd8ec0
[  170.876291] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  170.876366] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000fefb5c61 state to 0000000095dd8ec0
[  170.876445] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  170.876519] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 0000000095dd8ec0
[  170.876600] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000fefb5c61
[  170.876675] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  170.876749] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  170.876823] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  170.876897] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  170.876975] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  170.877047] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  170.877124] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  170.877196] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  170.877268] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 0000000095dd8ec0
[  170.877343] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  170.877415] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000095dd8ec0
[  170.877496] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  170.877547] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  170.877584] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000095dd8ec0
[  170.877663] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000008e9f664b to 0000000095dd8ec0
[  170.877737] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000095dd8ec0
[  170.877814] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  170.877887] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  170.877960] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  170.878041] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 0000000095dd8ec0
[  170.878118] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000095dd8ec0
[  170.878191] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  170.878264] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  170.878335] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  170.878407] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  170.878479] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000095dd8ec0
[  170.879998] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  170.880980] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9823, diff=1, hw=0 hw_last=0
[  170.897555] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9824, diff=1, hw=0 hw_last=0
[  170.914134] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9825, diff=1, hw=0 hw_last=0
[  171.113184] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000071ef6b0b
[  171.113267] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  171.113332] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  171.113394] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  171.113456] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  171.113519] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000071ef6b0b
[  171.129662] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9838, diff=1, hw=0 hw_last=0
[  171.146241] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9839, diff=1, hw=0 hw_last=0
[  171.162820] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9840, diff=1, hw=0 hw_last=0
[  171.179399] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9841, diff=1, hw=0 hw_last=0
[  171.195978] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9842, diff=1, hw=0 hw_last=0
[  171.212556] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9843, diff=1, hw=0 hw_last=0
[  171.229138] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9844, diff=1, hw=0 hw_last=0
[  171.245714] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9845, diff=1, hw=0 hw_last=0
[  171.262295] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9846, diff=1, hw=0 hw_last=0
[  171.278877] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9847, diff=1, hw=0 hw_last=0
[  171.295453] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9848, diff=1, hw=0 hw_last=0
[  171.312030] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9849, diff=1, hw=0 hw_last=0
[  171.328608] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9850, diff=1, hw=0 hw_last=0
[  171.345188] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9851, diff=1, hw=0 hw_last=0
[  171.361767] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9852, diff=1, hw=0 hw_last=0
[  171.378346] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9853, diff=1, hw=0 hw_last=0
[  171.394925] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9854, diff=1, hw=0 hw_last=0
[  171.411504] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9855, diff=1, hw=0 hw_last=0
[  171.428088] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9856, diff=1, hw=0 hw_last=0
[  171.444666] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9857, diff=1, hw=0 hw_last=0
[  171.461246] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9858, diff=1, hw=0 hw_last=0
[  171.477825] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9859, diff=1, hw=0 hw_last=0
[  171.494408] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9860, diff=1, hw=0 hw_last=0
[  171.510981] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9861, diff=1, hw=0 hw_last=0
[  171.527560] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9862, diff=1, hw=0 hw_last=0
[  171.544138] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9863, diff=1, hw=0 hw_last=0
[  171.560720] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9864, diff=1, hw=0 hw_last=0
[  171.577299] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9865, diff=1, hw=0 hw_last=0
[  171.593877] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9866, diff=1, hw=0 hw_last=0
[  171.610456] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9867, diff=1, hw=0 hw_last=0
[  171.627035] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9868, diff=1, hw=0 hw_last=0
[  171.643615] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9869, diff=1, hw=0 hw_last=0
[  171.660196] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9870, diff=1, hw=0 hw_last=0
[  171.676772] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9871, diff=1, hw=0 hw_last=0
[  171.693352] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9872, diff=1, hw=0 hw_last=0
[  171.709934] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9873, diff=1, hw=0 hw_last=0
[  171.726512] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9874, diff=1, hw=0 hw_last=0
[  171.743090] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9875, diff=1, hw=0 hw_last=0
[  171.759669] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9876, diff=1, hw=0 hw_last=0
[  171.776248] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9877, diff=1, hw=0 hw_last=0
[  171.792827] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9878, diff=1, hw=0 hw_last=0
[  171.809406] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9879, diff=1, hw=0 hw_last=0
[  171.825989] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9880, diff=1, hw=0 hw_last=0
[  171.842569] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9881, diff=1, hw=0 hw_last=0
[  171.859144] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9882, diff=1, hw=0 hw_last=0
[  171.875726] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9883, diff=1, hw=0 hw_last=0
[  171.892303] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9884, diff=1, hw=0 hw_last=0
[  171.908881] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9885, diff=1, hw=0 hw_last=0
[  171.925465] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9886, diff=1, hw=0 hw_last=0
[  171.936454] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  171.936577] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 9887 to client
[  171.942046] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9887, diff=1, hw=0 hw_last=0
[  171.950843] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  171.950937] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006fb5b2d2
[  171.951020] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  171.951094] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000055579822 state to 000000006fb5b2d2
[  171.951172] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  171.951244] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 000000006fb5b2d2
[  171.951325] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 0000000055579822
[  171.951399] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  171.951470] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  171.951541] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  171.951637] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  171.951716] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  171.951791] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  171.951870] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  171.951943] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  171.952015] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 000000006fb5b2d2
[  171.952093] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  171.952165] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000006fb5b2d2
[  171.952249] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  171.952301] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  171.952339] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006fb5b2d2
[  171.952418] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000008a640c91 to 000000006fb5b2d2
[  171.952493] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006fb5b2d2
[  171.952572] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  171.952653] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  171.952733] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  171.952817] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000006fb5b2d2
[  171.952894] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006fb5b2d2
[  171.952967] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  171.953042] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  171.953114] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  171.953186] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  171.953259] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006fb5b2d2
[  171.954741] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  171.958627] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9888, diff=1, hw=0 hw_last=0
[  171.975202] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9889, diff=1, hw=0 hw_last=0
[  171.991784] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9890, diff=1, hw=0 hw_last=0
[  172.008366] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9891, diff=1, hw=0 hw_last=0
[  172.024945] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9892, diff=1, hw=0 hw_last=0
[  172.041522] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9893, diff=1, hw=0 hw_last=0
[  172.058101] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9894, diff=1, hw=0 hw_last=0
[  172.074682] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9895, diff=1, hw=0 hw_last=0
[  172.091263] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9896, diff=1, hw=0 hw_last=0
[  172.107840] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9897, diff=1, hw=0 hw_last=0
[  172.124419] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9898, diff=1, hw=0 hw_last=0
[  172.140998] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9899, diff=1, hw=0 hw_last=0
[  172.157579] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9900, diff=1, hw=0 hw_last=0
[  172.174157] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9901, diff=1, hw=0 hw_last=0
[  172.184348] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  172.184463] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006fb5b2d2
[  172.184548] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  172.184622] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000055579822 state to 000000006fb5b2d2
[  172.184700] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  172.184771] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 000000006fb5b2d2
[  172.184852] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000055579822
[  172.184926] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  172.184998] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  172.185069] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  172.185140] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  172.185218] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  172.185290] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  172.185366] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  172.185439] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  172.185511] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 000000006fb5b2d2
[  172.185586] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  172.185661] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000006fb5b2d2
[  172.185744] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  172.185793] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  172.185831] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006fb5b2d2
[  172.185911] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000004593454f to 000000006fb5b2d2
[  172.185986] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006fb5b2d2
[  172.186074] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006fb5b2d2 nonblocking
[  172.186189] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  172.186278] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  172.190730] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9902, diff=1, hw=0 hw_last=0
[  172.190821] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006fb5b2d2
[  172.190903] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  172.190978] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  172.191051] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  172.191125] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  172.191200] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006fb5b2d2
[  172.389677] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9914, diff=1, hw=0 hw_last=0
[  172.406257] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9915, diff=1, hw=0 hw_last=0
[  172.422836] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9916, diff=1, hw=0 hw_last=0
[  172.439415] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9917, diff=1, hw=0 hw_last=0
[  172.455995] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9918, diff=1, hw=0 hw_last=0
[  172.472573] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9919, diff=1, hw=0 hw_last=0
[  172.489158] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9920, diff=1, hw=0 hw_last=0
[  172.505734] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9921, diff=1, hw=0 hw_last=0
[  172.522312] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9922, diff=1, hw=0 hw_last=0
[  172.538895] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9923, diff=1, hw=0 hw_last=0
[  172.555473] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9924, diff=1, hw=0 hw_last=0
[  172.572050] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9925, diff=1, hw=0 hw_last=0
[  172.588632] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9926, diff=1, hw=0 hw_last=0
[  172.605210] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9927, diff=1, hw=0 hw_last=0
[  172.621789] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9928, diff=1, hw=0 hw_last=0
[  172.638367] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9929, diff=1, hw=0 hw_last=0
[  172.654946] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9930, diff=1, hw=0 hw_last=0
[  172.671525] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9931, diff=1, hw=0 hw_last=0
[  172.688106] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9932, diff=1, hw=0 hw_last=0
[  172.704682] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9933, diff=1, hw=0 hw_last=0
[  172.705117] systemd-journald[214]: Data hash table of /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal has a fill level at 75.1 (2732 of 3640 items, 2097152 file size, 767 bytes per hash table item), suggesting rotation.
[  172.721263] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9934, diff=1, hw=0 hw_last=0
[  172.727023] systemd-journald[214]: /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal: Journal header limits reached or header out-of-date, rotating.
[  172.737844] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9935, diff=1, hw=0 hw_last=0
[  172.754424] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9936, diff=1, hw=0 hw_last=0
[  172.771003] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9937, diff=1, hw=0 hw_last=0
[  172.787581] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9938, diff=1, hw=0 hw_last=0
[  172.804161] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9939, diff=1, hw=0 hw_last=0
[  172.820739] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9940, diff=1, hw=0 hw_last=0
[  172.837318] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9941, diff=1, hw=0 hw_last=0
[  172.853897] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9942, diff=1, hw=0 hw_last=0
[  172.870478] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9943, diff=1, hw=0 hw_last=0
[  172.887055] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9944, diff=1, hw=0 hw_last=0
[  172.903633] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9945, diff=1, hw=0 hw_last=0
[  172.920212] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9946, diff=1, hw=0 hw_last=0
[  172.936791] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9947, diff=1, hw=0 hw_last=0
[  172.953370] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9948, diff=1, hw=0 hw_last=0
[  172.969952] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9949, diff=1, hw=0 hw_last=0
[  172.986534] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9950, diff=1, hw=0 hw_last=0
[  172.994514] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  172.994635] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 9951 to client
[  172.995922] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  172.996032] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000d7e48c6b
[  172.996120] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  172.996198] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000002cafbe1b state to 00000000d7e48c6b
[  172.996278] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  172.996351] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 00000000d7e48c6b
[  172.996432] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 000000002cafbe1b
[  172.996507] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  172.996582] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  172.996657] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  172.996731] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  172.996809] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  172.996881] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  172.996957] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  172.997030] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  172.997102] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 00000000d7e48c6b
[  172.997177] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  172.997249] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000d7e48c6b
[  172.997333] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  172.997380] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  172.997412] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000d7e48c6b
[  172.997481] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000eae20a14 to 00000000d7e48c6b
[  172.997544] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000d7e48c6b
[  172.997611] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  173.003116] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9951, diff=1, hw=0 hw_last=0
[  173.019693] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9952, diff=1, hw=0 hw_last=0
[  173.036272] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9953, diff=1, hw=0 hw_last=0
[  173.052853] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9954, diff=1, hw=0 hw_last=0
[  173.069433] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9955, diff=1, hw=0 hw_last=0
[  173.086011] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9956, diff=1, hw=0 hw_last=0
[  173.102592] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9957, diff=1, hw=0 hw_last=0
[  173.119171] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9958, diff=1, hw=0 hw_last=0
[  173.135751] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9959, diff=1, hw=0 hw_last=0
[  173.152332] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9960, diff=1, hw=0 hw_last=0
[  173.168907] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9961, diff=1, hw=0 hw_last=0
[  173.185488] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9962, diff=1, hw=0 hw_last=0
[  173.202067] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9963, diff=1, hw=0 hw_last=0
[  173.218643] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9964, diff=1, hw=0 hw_last=0
[  173.220191] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  173.220291] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000d7e48c6b
[  173.220365] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  173.220428] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000002cafbe1b state to 00000000d7e48c6b
[  173.220494] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  173.220555] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 00000000d7e48c6b
[  173.220628] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 000000002cafbe1b
[  173.220694] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  173.220756] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  173.220819] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  173.220883] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  173.220946] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  173.221006] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  173.221069] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  173.221129] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  173.221189] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 00000000d7e48c6b
[  173.221252] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  173.221314] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000d7e48c6b
[  173.221386] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  173.221430] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  173.221462] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000d7e48c6b
[  173.221531] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000fde3661d to 00000000d7e48c6b
[  173.221593] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000d7e48c6b
[  173.221669] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000d7e48c6b nonblocking
[  173.221776] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  173.221864] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  173.235222] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9965, diff=1, hw=0 hw_last=0
[  173.235327] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000d7e48c6b
[  173.235418] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  173.235494] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  173.235579] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  173.235655] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  173.235729] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000d7e48c6b
[  173.251798] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9966, diff=1, hw=0 hw_last=0
[  173.268377] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9967, diff=1, hw=0 hw_last=0
[  173.284957] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9968, diff=1, hw=0 hw_last=0
[  173.301536] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9969, diff=1, hw=0 hw_last=0
[  173.318114] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9970, diff=1, hw=0 hw_last=0
[  173.334694] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9971, diff=1, hw=0 hw_last=0
[  173.351275] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9972, diff=1, hw=0 hw_last=0
[  173.367852] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9973, diff=1, hw=0 hw_last=0
[  173.384432] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9974, diff=1, hw=0 hw_last=0
[  173.401015] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9975, diff=1, hw=0 hw_last=0
[  173.417592] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9976, diff=1, hw=0 hw_last=0
[  173.434167] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9977, diff=1, hw=0 hw_last=0
[  173.450746] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9978, diff=1, hw=0 hw_last=0
[  173.467325] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9979, diff=1, hw=0 hw_last=0
[  173.483905] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9980, diff=1, hw=0 hw_last=0
[  173.500484] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9981, diff=1, hw=0 hw_last=0
[  173.517064] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9982, diff=1, hw=0 hw_last=0
[  173.533643] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9983, diff=1, hw=0 hw_last=0
[  173.550225] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9984, diff=1, hw=0 hw_last=0
[  173.566801] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9985, diff=1, hw=0 hw_last=0
[  173.583381] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9986, diff=1, hw=0 hw_last=0
[  173.682857] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9992, diff=1, hw=0 hw_last=0
[  173.699438] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9993, diff=1, hw=0 hw_last=0
[  173.716014] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9994, diff=1, hw=0 hw_last=0
[  173.732595] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9995, diff=1, hw=0 hw_last=0
[  173.749173] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9996, diff=1, hw=0 hw_last=0
[  173.765751] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9997, diff=1, hw=0 hw_last=0
[  173.782332] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9998, diff=1, hw=0 hw_last=0
[  173.798913] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=9999, diff=1, hw=0 hw_last=0
[  173.815493] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10000, diff=1, hw=0 hw_last=0
[  173.832069] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10001, diff=1, hw=0 hw_last=0
[  173.848651] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10002, diff=1, hw=0 hw_last=0
[  173.865229] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10003, diff=1, hw=0 hw_last=0
[  173.881809] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10004, diff=1, hw=0 hw_last=0
[  173.898386] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10005, diff=1, hw=0 hw_last=0
[  173.914964] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10006, diff=1, hw=0 hw_last=0
[  173.931544] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10007, diff=1, hw=0 hw_last=0
[  173.948123] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10008, diff=1, hw=0 hw_last=0
[  173.964702] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10009, diff=1, hw=0 hw_last=0
[  173.981281] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10010, diff=1, hw=0 hw_last=0
[  173.997860] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10011, diff=1, hw=0 hw_last=0
[  174.014440] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10012, diff=1, hw=0 hw_last=0
[  174.031019] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10013, diff=1, hw=0 hw_last=0
[  174.047608] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10014, diff=1, hw=0 hw_last=0
[  174.049254] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  174.049365] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 10015 to client
[  174.056613] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  174.056704] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000082174610
[  174.056777] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  174.056840] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000ec98bd42 state to 0000000082174610
[  174.056907] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  174.056968] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000e8543c49 state to 0000000082174610
[  174.057037] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000ec98bd42
[  174.057101] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  174.057161] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  174.057222] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  174.057282] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  174.057347] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  174.057408] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  174.057471] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  174.057531] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  174.057592] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 0000000082174610
[  174.057655] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  174.057716] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000082174610
[  174.057787] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  174.057833] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  174.057865] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000082174610
[  174.057934] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000d7e48c6b to 0000000082174610
[  174.057997] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000082174610
[  174.058064] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  174.058125] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  174.058187] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  174.058257] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 0000000082174610
[  174.058321] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000082174610
[  174.058383] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  174.058444] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  174.058505] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  174.058566] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  174.058627] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000082174610
[  174.060062] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  174.064187] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10015, diff=1, hw=0 hw_last=0
[  174.080765] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10016, diff=1, hw=0 hw_last=0
[  174.097340] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10017, diff=1, hw=0 hw_last=0
[  174.113920] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10018, diff=1, hw=0 hw_last=0
[  174.130504] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10019, diff=1, hw=0 hw_last=0
[  174.147080] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10020, diff=1, hw=0 hw_last=0
[  174.163661] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10021, diff=1, hw=0 hw_last=0
[  174.180238] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10022, diff=1, hw=0 hw_last=0
[  174.196820] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10023, diff=1, hw=0 hw_last=0
[  174.307400] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  174.307460] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  174.307520] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000001477df7c
[  174.308033] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  174.308116] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000001477df7c
[  174.308183] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  174.308243] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000215b6887 state to 000000001477df7c
[  174.308307] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  174.308368] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 000000001477df7c
[  174.308432] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000215b6887
[  174.308494] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  174.308553] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  174.308613] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  174.308673] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  174.308735] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  174.308796] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  174.308858] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  174.308918] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  174.308978] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 000000001477df7c
[  174.309041] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  174.309103] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000001477df7c
[  174.309169] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  174.309206] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  174.309237] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000001477df7c
[  174.309303] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000008a640c91 to 000000001477df7c
[  174.309365] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000001477df7c
[  174.309433] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000001477df7c nonblocking
[  174.309525] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  174.309612] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  174.312867] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10030, diff=1, hw=0 hw_last=0
[  174.312950] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000001477df7c
[  174.313027] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  174.313101] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  174.313173] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  174.313246] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  174.313320] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000001477df7c
[  174.329445] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10031, diff=1, hw=0 hw_last=0
[  174.346026] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10032, diff=1, hw=0 hw_last=0
[  174.362605] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10033, diff=1, hw=0 hw_last=0
[  174.379183] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10034, diff=1, hw=0 hw_last=0
[  174.395766] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10035, diff=1, hw=0 hw_last=0
[  174.412342] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10036, diff=1, hw=0 hw_last=0
[  174.428922] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10037, diff=1, hw=0 hw_last=0
[  174.445504] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10038, diff=1, hw=0 hw_last=0
[  174.462083] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10039, diff=1, hw=0 hw_last=0
[  174.478657] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10040, diff=1, hw=0 hw_last=0
[  174.495236] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10041, diff=1, hw=0 hw_last=0
[  174.511817] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10042, diff=1, hw=0 hw_last=0
[  174.528397] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10043, diff=1, hw=0 hw_last=0
[  174.544975] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10044, diff=1, hw=0 hw_last=0
[  174.561553] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10045, diff=1, hw=0 hw_last=0
[  174.578132] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10046, diff=1, hw=0 hw_last=0
[  174.594712] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10047, diff=1, hw=0 hw_last=0
[  174.611296] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10048, diff=1, hw=0 hw_last=0
[  174.627874] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10049, diff=1, hw=0 hw_last=0
[  174.644451] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10050, diff=1, hw=0 hw_last=0
[  174.661029] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10051, diff=1, hw=0 hw_last=0
[  174.677607] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10052, diff=1, hw=0 hw_last=0
[  174.694186] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10053, diff=1, hw=0 hw_last=0
[  174.710766] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10054, diff=1, hw=0 hw_last=0
[  174.727347] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10055, diff=1, hw=0 hw_last=0
[  174.743926] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10056, diff=1, hw=0 hw_last=0
[  174.760508] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10057, diff=1, hw=0 hw_last=0
[  174.777083] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10058, diff=1, hw=0 hw_last=0
[  174.793661] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10059, diff=1, hw=0 hw_last=0
[  174.810242] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10060, diff=1, hw=0 hw_last=0
[  174.826822] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10061, diff=1, hw=0 hw_last=0
[  174.843401] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10062, diff=1, hw=0 hw_last=0
[  174.859979] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10063, diff=1, hw=0 hw_last=0
[  175.039018] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  175.042358] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10074, diff=1, hw=0 hw_last=0
[  175.058936] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10075, diff=1, hw=0 hw_last=0
[  175.075515] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10076, diff=1, hw=0 hw_last=0
[  175.092094] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10077, diff=1, hw=0 hw_last=0
[  175.108674] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10078, diff=1, hw=0 hw_last=0
[  175.125254] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10079, diff=1, hw=0 hw_last=0
[  175.141834] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10080, diff=1, hw=0 hw_last=0
[  175.158411] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10081, diff=1, hw=0 hw_last=0
[  175.174994] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10082, diff=1, hw=0 hw_last=0
[  175.191578] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10083, diff=1, hw=0 hw_last=0
[  175.208150] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10084, diff=1, hw=0 hw_last=0
[  175.224731] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10085, diff=1, hw=0 hw_last=0
[  175.241307] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10086, diff=1, hw=0 hw_last=0
[  175.257886] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10087, diff=1, hw=0 hw_last=0
[  175.267487] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  175.267614] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009472d261
[  175.267690] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  175.267752] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000003519e999 state to 000000009472d261
[  175.267819] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  175.267882] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000adb7ad91 state to 000000009472d261
[  175.267955] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 000000003519e999
[  175.268021] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  175.268081] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  175.268141] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  175.268201] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  175.268264] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  175.268324] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  175.268388] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  175.268449] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  175.268509] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 000000009472d261
[  175.268572] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  175.268634] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000009472d261
[  175.268706] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  175.268752] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  175.268784] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000009472d261
[  175.268851] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000e0dcab9c to 000000009472d261
[  175.268913] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000009472d261
[  175.268990] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000009472d261 nonblocking
[  175.269096] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  175.269183] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  175.274461] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10088, diff=1, hw=0 hw_last=0
[  175.274556] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009472d261
[  175.274636] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  175.274711] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  175.274785] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  175.274858] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  175.274933] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009472d261
[  175.291041] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10089, diff=1, hw=0 hw_last=0
[  175.307619] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10090, diff=1, hw=0 hw_last=0
[  175.324204] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10091, diff=1, hw=0 hw_last=0
[  175.340792] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10092, diff=1, hw=0 hw_last=0
[  175.357364] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10093, diff=1, hw=0 hw_last=0
[  175.373936] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10094, diff=1, hw=0 hw_last=0
[  175.390518] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10095, diff=1, hw=0 hw_last=0
[  175.407096] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10096, diff=1, hw=0 hw_last=0
[  175.423673] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10097, diff=1, hw=0 hw_last=0
[  175.440257] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10098, diff=1, hw=0 hw_last=0
[  175.456834] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10099, diff=1, hw=0 hw_last=0
[  175.473409] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10100, diff=1, hw=0 hw_last=0
[  175.489990] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10101, diff=1, hw=0 hw_last=0
[  175.506567] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10102, diff=1, hw=0 hw_last=0
[  175.523146] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10103, diff=1, hw=0 hw_last=0
[  175.539725] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10104, diff=1, hw=0 hw_last=0
[  175.556304] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10105, diff=1, hw=0 hw_last=0
[  175.572883] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10106, diff=1, hw=0 hw_last=0
[  175.589468] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10107, diff=1, hw=0 hw_last=0
[  175.606045] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10108, diff=1, hw=0 hw_last=0
[  175.622624] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10109, diff=1, hw=0 hw_last=0
[  175.639204] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10110, diff=1, hw=0 hw_last=0
[  175.655782] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10111, diff=1, hw=0 hw_last=0
[  175.672359] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10112, diff=1, hw=0 hw_last=0
[  175.688939] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10113, diff=1, hw=0 hw_last=0
[  175.705519] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10114, diff=1, hw=0 hw_last=0
[  175.722098] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10115, diff=1, hw=0 hw_last=0
[  175.738680] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10116, diff=1, hw=0 hw_last=0
[  175.755256] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10117, diff=1, hw=0 hw_last=0
[  175.771834] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10118, diff=1, hw=0 hw_last=0
[  175.788415] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10119, diff=1, hw=0 hw_last=0
[  175.804995] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10120, diff=1, hw=0 hw_last=0
[  175.821575] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10121, diff=1, hw=0 hw_last=0
[  175.838151] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10122, diff=1, hw=0 hw_last=0
[  175.854730] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10123, diff=1, hw=0 hw_last=0
[  175.871314] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10124, diff=1, hw=0 hw_last=0
[  175.887892] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10125, diff=1, hw=0 hw_last=0
[  175.904471] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10126, diff=1, hw=0 hw_last=0
[  175.921050] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10127, diff=1, hw=0 hw_last=0
[  175.937630] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10128, diff=1, hw=0 hw_last=0
[  175.954206] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10129, diff=1, hw=0 hw_last=0
[  175.970785] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10130, diff=1, hw=0 hw_last=0
[  175.987364] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10131, diff=1, hw=0 hw_last=0
[  176.003944] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10132, diff=1, hw=0 hw_last=0
[  176.018770] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  176.018883] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 10133 to client
[  176.020535] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10133, diff=1, hw=0 hw_last=0
[  176.030146] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  176.030229] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000c0cf118d
[  176.030301] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  176.030365] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000082b4fa6a state to 00000000c0cf118d
[  176.030431] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  176.030493] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 00000000c0cf118d
[  176.030562] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 0000000082b4fa6a
[  176.030625] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  176.030685] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  176.030746] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  176.030806] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  176.030870] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  176.030930] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  176.030994] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  176.031054] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  176.031115] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 00000000c0cf118d
[  176.031178] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  176.031239] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000c0cf118d
[  176.031310] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  176.031356] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  176.031387] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000c0cf118d
[  176.031455] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000009472d261 to 00000000c0cf118d
[  176.031518] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000c0cf118d
[  176.031604] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  176.031668] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  176.031734] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  176.031808] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 00000000c0cf118d
[  176.031873] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000c0cf118d
[  176.031936] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  176.031997] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  176.032058] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  176.032120] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  176.032182] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000c0cf118d
[  176.033637] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  176.037110] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10134, diff=1, hw=0 hw_last=0
[  176.053687] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10135, diff=1, hw=0 hw_last=0
[  176.070267] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10136, diff=1, hw=0 hw_last=0
[  176.086846] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10137, diff=1, hw=0 hw_last=0
[  176.103428] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10138, diff=1, hw=0 hw_last=0
[  176.120006] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10139, diff=1, hw=0 hw_last=0
[  176.136585] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10140, diff=1, hw=0 hw_last=0
[  176.261942] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  176.262002] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  176.262065] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  176.262126] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  176.262190] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  176.262250] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  176.262310] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 00000000c0cf118d
[  176.262373] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  176.262435] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000c0cf118d
[  176.262505] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  176.262552] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  176.262585] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000c0cf118d
[  176.262654] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000071ef6b0b to 00000000c0cf118d
[  176.262717] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000c0cf118d
[  176.262794] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000c0cf118d nonblocking
[  176.262898] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  176.262971] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  176.269216] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10148, diff=1, hw=0 hw_last=0
[  176.269314] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000c0cf118d
[  176.269391] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  176.269454] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  176.269515] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  176.269577] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  176.269639] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000c0cf118d
[  176.285792] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10149, diff=1, hw=0 hw_last=0
[  176.302372] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10150, diff=1, hw=0 hw_last=0
[  176.318952] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10151, diff=1, hw=0 hw_last=0
[  176.335527] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10152, diff=1, hw=0 hw_last=0
[  176.352107] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10153, diff=1, hw=0 hw_last=0
[  176.368689] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10154, diff=1, hw=0 hw_last=0
[  176.385266] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10155, diff=1, hw=0 hw_last=0
[  176.401847] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10156, diff=1, hw=0 hw_last=0
[  176.418428] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10157, diff=1, hw=0 hw_last=0
[  176.435007] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10158, diff=1, hw=0 hw_last=0
[  176.451583] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10159, diff=1, hw=0 hw_last=0
[  176.468160] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10160, diff=1, hw=0 hw_last=0
[  176.484739] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10161, diff=1, hw=0 hw_last=0
[  176.501319] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10162, diff=1, hw=0 hw_last=0
[  176.517899] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10163, diff=1, hw=0 hw_last=0
[  176.534480] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10164, diff=1, hw=0 hw_last=0
[  176.551057] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10165, diff=1, hw=0 hw_last=0
[  176.567636] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10166, diff=1, hw=0 hw_last=0
[  176.584218] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10167, diff=1, hw=0 hw_last=0
[  176.600796] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10168, diff=1, hw=0 hw_last=0
[  176.617375] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10169, diff=1, hw=0 hw_last=0
[  176.633955] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10170, diff=1, hw=0 hw_last=0
[  176.650533] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10171, diff=1, hw=0 hw_last=0
[  176.667129] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10172, diff=1, hw=0 hw_last=0
[  176.683691] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10173, diff=1, hw=0 hw_last=0
[  176.700269] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10174, diff=1, hw=0 hw_last=0
[  176.716849] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10175, diff=1, hw=0 hw_last=0
[  176.733429] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10176, diff=1, hw=0 hw_last=0
[  176.750008] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10177, diff=1, hw=0 hw_last=0
[  176.766587] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10178, diff=1, hw=0 hw_last=0
[  176.783166] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10179, diff=1, hw=0 hw_last=0
[  176.799745] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10180, diff=1, hw=0 hw_last=0
[  176.816324] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10181, diff=1, hw=0 hw_last=0
[  176.832904] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10182, diff=1, hw=0 hw_last=0
[  176.849485] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10183, diff=1, hw=0 hw_last=0
[  176.866064] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10184, diff=1, hw=0 hw_last=0
[  176.882643] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10185, diff=1, hw=0 hw_last=0
[  176.899221] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10186, diff=1, hw=0 hw_last=0
[  176.915803] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10187, diff=1, hw=0 hw_last=0
[  176.932380] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10188, diff=1, hw=0 hw_last=0
[  176.948960] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10189, diff=1, hw=0 hw_last=0
[  177.081594] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10197, diff=1, hw=0 hw_last=0
[  177.098178] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10198, diff=1, hw=0 hw_last=0
[  177.104642] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  177.104752] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 10199 to client
[  177.107025] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  177.107120] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000ab379aee
[  177.107192] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  177.107254] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000fefb5c61 state to 00000000ab379aee
[  177.107320] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  177.107381] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000e8543c49 state to 00000000ab379aee
[  177.107450] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000fefb5c61
[  177.107512] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  177.107594] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  177.107661] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  177.107724] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  177.107792] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  177.107853] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  177.107919] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  177.107980] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  177.108040] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 00000000ab379aee
[  177.108105] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  177.108168] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000ab379aee
[  177.108241] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  177.108285] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  177.108317] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000ab379aee
[  177.108388] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000001477df7c to 00000000ab379aee
[  177.108450] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000ab379aee
[  177.108517] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  177.108578] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  177.108641] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  177.108711] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 00000000ab379aee
[  177.108774] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ab379aee
[  177.108836] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  177.108896] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  177.108956] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  177.109017] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  177.109078] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ab379aee
[  177.110494] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  177.114761] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10199, diff=1, hw=0 hw_last=0
[  177.131336] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10200, diff=1, hw=0 hw_last=0
[  177.147914] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10201, diff=1, hw=0 hw_last=0
[  177.164492] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10202, diff=1, hw=0 hw_last=0
[  177.181077] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10203, diff=1, hw=0 hw_last=0
[  177.197655] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10204, diff=1, hw=0 hw_last=0
[  177.214233] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10205, diff=1, hw=0 hw_last=0
[  177.230811] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10206, diff=1, hw=0 hw_last=0
[  177.247392] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10207, diff=1, hw=0 hw_last=0
[  177.263974] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10208, diff=1, hw=0 hw_last=0
[  177.280550] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10209, diff=1, hw=0 hw_last=0
[  177.297130] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10210, diff=1, hw=0 hw_last=0
[  177.313707] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10211, diff=1, hw=0 hw_last=0
[  177.330246] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  177.330290] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10212, diff=1, hw=0 hw_last=0
[  177.330360] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000ab379aee
[  177.330441] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  177.330512] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000fefb5c61 state to 00000000ab379aee
[  177.330581] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  177.330643] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000e8543c49 state to 00000000ab379aee
[  177.330714] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000fefb5c61
[  177.330778] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  177.330839] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  177.330900] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  177.330961] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  177.331026] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  177.331087] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  177.331153] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  177.331214] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  177.331275] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 00000000ab379aee
[  177.331339] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  177.331404] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000ab379aee
[  177.331478] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  177.331522] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  177.331581] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000ab379aee
[  177.331657] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000006fb5b2d2 to 00000000ab379aee
[  177.331722] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000ab379aee
[  177.347027] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  177.347090] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  177.347152] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  177.347214] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  177.347278] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ab379aee
[  177.363441] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10214, diff=1, hw=0 hw_last=0
[  177.380019] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10215, diff=1, hw=0 hw_last=0
[  177.396598] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10216, diff=1, hw=0 hw_last=0
[  177.413177] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10217, diff=1, hw=0 hw_last=0
[  177.429755] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10218, diff=1, hw=0 hw_last=0
[  177.446338] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10219, diff=1, hw=0 hw_last=0
[  177.462915] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10220, diff=1, hw=0 hw_last=0
[  177.479494] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10221, diff=1, hw=0 hw_last=0
[  177.496075] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10222, diff=1, hw=0 hw_last=0
[  177.512655] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10223, diff=1, hw=0 hw_last=0
[  177.529233] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10224, diff=1, hw=0 hw_last=0
[  177.545809] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10225, diff=1, hw=0 hw_last=0
[  177.562388] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10226, diff=1, hw=0 hw_last=0
[  177.578967] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10227, diff=1, hw=0 hw_last=0
[  177.595546] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10228, diff=1, hw=0 hw_last=0
[  177.612125] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10229, diff=1, hw=0 hw_last=0
[  177.628704] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10230, diff=1, hw=0 hw_last=0
[  177.645283] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10231, diff=1, hw=0 hw_last=0
[  177.661865] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10232, diff=1, hw=0 hw_last=0
[  177.678446] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10233, diff=1, hw=0 hw_last=0
[  177.695023] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10234, diff=1, hw=0 hw_last=0
[  177.711604] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10235, diff=1, hw=0 hw_last=0
[  177.728182] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10236, diff=1, hw=0 hw_last=0
[  177.744762] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10237, diff=1, hw=0 hw_last=0
[  177.761340] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10238, diff=1, hw=0 hw_last=0
[  177.777917] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10239, diff=1, hw=0 hw_last=0
[  177.794497] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10240, diff=1, hw=0 hw_last=0
[  177.811077] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10241, diff=1, hw=0 hw_last=0
[  177.827656] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10242, diff=1, hw=0 hw_last=0
[  177.844235] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10243, diff=1, hw=0 hw_last=0
[  177.860820] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10244, diff=1, hw=0 hw_last=0
[  177.877393] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10245, diff=1, hw=0 hw_last=0
[  177.893974] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10246, diff=1, hw=0 hw_last=0
[  177.910551] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10247, diff=1, hw=0 hw_last=0
[  177.927132] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10248, diff=1, hw=0 hw_last=0
[  177.943714] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10249, diff=1, hw=0 hw_last=0
[  177.960290] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10250, diff=1, hw=0 hw_last=0
[  177.976869] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10251, diff=1, hw=0 hw_last=0
[  177.993449] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10252, diff=1, hw=0 hw_last=0
[  178.010029] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10253, diff=1, hw=0 hw_last=0
[  178.026607] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10254, diff=1, hw=0 hw_last=0
[  178.043186] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10255, diff=1, hw=0 hw_last=0
[  178.059765] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10256, diff=1, hw=0 hw_last=0
[  178.076344] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10257, diff=1, hw=0 hw_last=0
[  178.092923] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10258, diff=1, hw=0 hw_last=0
[  178.109502] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10259, diff=1, hw=0 hw_last=0
[  178.126084] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10260, diff=1, hw=0 hw_last=0
[  178.142662] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10261, diff=1, hw=0 hw_last=0
[  178.159241] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10262, diff=1, hw=0 hw_last=0
[  178.175824] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10263, diff=1, hw=0 hw_last=0
[  178.185859] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  178.185968] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 10264 to client
[  178.187241] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  178.187337] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000305e034
[  178.187417] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  178.187490] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000087081e28 state to 000000000305e034
[  178.187583] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  178.308459] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10271, diff=1, hw=0 hw_last=0
[  178.325039] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10272, diff=1, hw=0 hw_last=0
[  178.341622] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10273, diff=1, hw=0 hw_last=0
[  178.358199] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10274, diff=1, hw=0 hw_last=0
[  178.374777] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10275, diff=1, hw=0 hw_last=0
[  178.391354] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10276, diff=1, hw=0 hw_last=0
[  178.407931] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10277, diff=1, hw=0 hw_last=0
[  178.424511] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10278, diff=1, hw=0 hw_last=0
[  178.434565] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  178.434671] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000305e034
[  178.434749] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  178.434812] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000087081e28 state to 000000000305e034
[  178.434880] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  178.434942] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 000000000305e034
[  178.435012] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000087081e28
[  178.435075] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  178.435136] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  178.435196] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  178.435257] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  178.435321] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  178.435382] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  178.435447] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  178.435508] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  178.435606] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 000000000305e034
[  178.435677] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  178.435744] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000000305e034
[  178.435820] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  178.435866] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  178.435900] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000305e034
[  178.435969] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000d7e48c6b to 000000000305e034
[  178.436032] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000305e034
[  178.436111] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000305e034 nonblocking
[  178.436213] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  178.436289] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  178.441089] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10279, diff=1, hw=0 hw_last=0
[  178.441182] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000305e034
[  178.441257] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  178.441319] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  178.441380] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  178.441442] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  178.441505] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000305e034
[  178.457667] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10280, diff=1, hw=0 hw_last=0
[  178.474248] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10281, diff=1, hw=0 hw_last=0
[  178.490826] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10282, diff=1, hw=0 hw_last=0
[  178.507404] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10283, diff=1, hw=0 hw_last=0
[  178.523983] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10284, diff=1, hw=0 hw_last=0
[  178.540564] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10285, diff=1, hw=0 hw_last=0
[  178.557142] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10286, diff=1, hw=0 hw_last=0
[  178.573722] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10287, diff=1, hw=0 hw_last=0
[  178.590303] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10288, diff=1, hw=0 hw_last=0
[  178.606882] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10289, diff=1, hw=0 hw_last=0
[  178.623456] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10290, diff=1, hw=0 hw_last=0
[  178.640036] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10291, diff=1, hw=0 hw_last=0
[  178.656615] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10292, diff=1, hw=0 hw_last=0
[  178.673194] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10293, diff=1, hw=0 hw_last=0
[  178.689773] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10294, diff=1, hw=0 hw_last=0
[  178.706352] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10295, diff=1, hw=0 hw_last=0
[  178.722931] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10296, diff=1, hw=0 hw_last=0
[  178.739513] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10297, diff=1, hw=0 hw_last=0
[  178.756092] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10298, diff=1, hw=0 hw_last=0
[  178.772670] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10299, diff=1, hw=0 hw_last=0
[  178.789249] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10300, diff=1, hw=0 hw_last=0
[  178.805828] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10301, diff=1, hw=0 hw_last=0
[  178.822407] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10302, diff=1, hw=0 hw_last=0
[  178.838987] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10303, diff=1, hw=0 hw_last=0
[  178.855567] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10304, diff=1, hw=0 hw_last=0
[  178.872146] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10305, diff=1, hw=0 hw_last=0
[  178.888725] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10306, diff=1, hw=0 hw_last=0
[  179.303213] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10331, diff=1, hw=0 hw_last=0
[  179.319790] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10332, diff=1, hw=0 hw_last=0
[  179.336368] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10333, diff=1, hw=0 hw_last=0
[  179.352950] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10334, diff=1, hw=0 hw_last=0
[  179.369529] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10335, diff=1, hw=0 hw_last=0
[  179.386109] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10336, diff=1, hw=0 hw_last=0
[  179.402687] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10337, diff=1, hw=0 hw_last=0
[  179.419266] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10338, diff=1, hw=0 hw_last=0
[  179.435849] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10339, diff=1, hw=0 hw_last=0
[  179.452423] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10340, diff=1, hw=0 hw_last=0
[  179.469004] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10341, diff=1, hw=0 hw_last=0
[  179.485580] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10342, diff=1, hw=0 hw_last=0
[  179.502162] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10343, diff=1, hw=0 hw_last=0
[  179.503336] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  179.503432] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000095dd8ec0
[  179.503507] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  179.503598] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000002cafbe1b state to 0000000095dd8ec0
[  179.503668] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  179.503730] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 0000000095dd8ec0
[  179.503802] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 000000002cafbe1b
[  179.503866] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  179.503927] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  179.503986] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  179.504047] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  179.504111] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  179.504171] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  179.504237] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  179.504296] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  179.504357] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 0000000095dd8ec0
[  179.504420] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  179.504482] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000095dd8ec0
[  179.504554] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  179.504602] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  179.504634] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000095dd8ec0
[  179.504704] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000082174610 to 0000000095dd8ec0
[  179.504767] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000095dd8ec0
[  179.504845] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000095dd8ec0 nonblocking
[  179.504947] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  179.505025] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  179.518736] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10344, diff=1, hw=0 hw_last=0
[  179.518833] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000095dd8ec0
[  179.518903] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  179.518965] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  179.519026] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  179.519089] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  179.519153] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000095dd8ec0
[  179.535316] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10345, diff=1, hw=0 hw_last=0
[  179.551895] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10346, diff=1, hw=0 hw_last=0
[  179.568478] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10347, diff=1, hw=0 hw_last=0
[  179.585053] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10348, diff=1, hw=0 hw_last=0
[  179.601632] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10349, diff=1, hw=0 hw_last=0
[  179.618212] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10350, diff=1, hw=0 hw_last=0
[  179.634790] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10351, diff=1, hw=0 hw_last=0
[  179.651370] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10352, diff=1, hw=0 hw_last=0
[  179.667953] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10353, diff=1, hw=0 hw_last=0
[  179.684530] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10354, diff=1, hw=0 hw_last=0
[  179.701106] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10355, diff=1, hw=0 hw_last=0
[  179.717684] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10356, diff=1, hw=0 hw_last=0
[  179.734263] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10357, diff=1, hw=0 hw_last=0
[  179.750843] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10358, diff=1, hw=0 hw_last=0
[  179.767436] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10359, diff=1, hw=0 hw_last=0
[  179.784001] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10360, diff=1, hw=0 hw_last=0
[  179.800580] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10361, diff=1, hw=0 hw_last=0
[  179.817163] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10362, diff=1, hw=0 hw_last=0
[  179.833741] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10363, diff=1, hw=0 hw_last=0
[  179.850318] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10364, diff=1, hw=0 hw_last=0
[  179.866897] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10365, diff=1, hw=0 hw_last=0
[  179.883476] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10366, diff=1, hw=0 hw_last=0
[  179.900057] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10367, diff=1, hw=0 hw_last=0
[  179.916634] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10368, diff=1, hw=0 hw_last=0
[  179.933217] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10369, diff=1, hw=0 hw_last=0
[  179.949793] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10370, diff=1, hw=0 hw_last=0
[  179.966373] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10371, diff=1, hw=0 hw_last=0
[  179.982951] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10372, diff=1, hw=0 hw_last=0
[  179.999530] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10373, diff=1, hw=0 hw_last=0
[  180.016110] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10374, diff=1, hw=0 hw_last=0
[  180.032690] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10375, diff=1, hw=0 hw_last=0
[  180.049270] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10376, diff=1, hw=0 hw_last=0
[  180.065847] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10377, diff=1, hw=0 hw_last=0
[  180.082431] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10378, diff=1, hw=0 hw_last=0
[  180.099006] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10379, diff=1, hw=0 hw_last=0
[  180.115586] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10380, diff=1, hw=0 hw_last=0
[  180.132166] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10381, diff=1, hw=0 hw_last=0
[  180.148744] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10382, diff=1, hw=0 hw_last=0
[  180.165323] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10383, diff=1, hw=0 hw_last=0
[  180.181902] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10384, diff=1, hw=0 hw_last=0
[  180.198482] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10385, diff=1, hw=0 hw_last=0
[  180.215061] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10386, diff=1, hw=0 hw_last=0
[  180.231645] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10387, diff=1, hw=0 hw_last=0
[  180.248222] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10388, diff=1, hw=0 hw_last=0
[  180.264800] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10389, diff=1, hw=0 hw_last=0
[  180.281379] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10390, diff=1, hw=0 hw_last=0
[  180.297957] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10391, diff=1, hw=0 hw_last=0
[  180.314536] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10392, diff=1, hw=0 hw_last=0
[  180.331116] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10393, diff=1, hw=0 hw_last=0
[  180.347701] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10394, diff=1, hw=0 hw_last=0
[  180.360841] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  180.360955] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 10395 to client
[  180.364283] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10395, diff=1, hw=0 hw_last=0
[  180.373209] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  180.373292] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008e9f664b
[  180.373364] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  180.373425] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000ec98bd42 state to 000000008e9f664b
[  180.373491] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  180.373552] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 000000008e9f664b
[  180.373618] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000ec98bd42
[  180.373682] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  180.373741] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  180.373801] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  180.373861] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  180.373926] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  180.373986] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  180.374049] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  180.374109] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  180.374170] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 000000008e9f664b
[  180.374235] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  180.374295] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000008e9f664b
[  180.374367] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  180.374413] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  180.374445] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008e9f664b
[  180.374514] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000ab379aee to 000000008e9f664b
[  180.374577] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008e9f664b
[  180.374645] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  180.374707] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  180.374770] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  180.374840] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000008e9f664b
[  180.374904] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008e9f664b
[  180.374966] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  180.375028] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  180.375088] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  180.375149] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  180.375211] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008e9f664b
[  180.376725] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  180.380860] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10396, diff=1, hw=0 hw_last=0
[  180.397437] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10397, diff=1, hw=0 hw_last=0
[  180.414017] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10398, diff=1, hw=0 hw_last=0
[  180.605414] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000ec98bd42 state to 000000008e9f664b
[  180.605480] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  180.605541] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 000000008e9f664b
[  180.605609] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000ec98bd42
[  180.605672] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  180.605732] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  180.605792] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  180.605852] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  180.605915] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  180.605976] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  180.606040] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  180.606100] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  180.606162] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 000000008e9f664b
[  180.606225] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  180.606287] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000008e9f664b
[  180.606359] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  180.606405] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  180.606437] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008e9f664b
[  180.606507] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000001477df7c to 000000008e9f664b
[  180.606569] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008e9f664b
[  180.606646] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000008e9f664b nonblocking
[  180.606743] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  180.606814] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  180.612965] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10410, diff=1, hw=0 hw_last=0
[  180.613066] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008e9f664b
[  180.613143] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  180.613205] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  180.613266] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  180.613328] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  180.613389] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008e9f664b
[  180.629542] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10411, diff=1, hw=0 hw_last=0
[  180.646123] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10412, diff=1, hw=0 hw_last=0
[  180.662700] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10413, diff=1, hw=0 hw_last=0
[  180.679279] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10414, diff=1, hw=0 hw_last=0
[  180.695861] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10415, diff=1, hw=0 hw_last=0
[  180.712438] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10416, diff=1, hw=0 hw_last=0
[  180.729018] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10417, diff=1, hw=0 hw_last=0
[  180.745598] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10418, diff=1, hw=0 hw_last=0
[  180.762179] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10419, diff=1, hw=0 hw_last=0
[  180.778754] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10420, diff=1, hw=0 hw_last=0
[  180.795332] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10421, diff=1, hw=0 hw_last=0
[  180.811911] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10422, diff=1, hw=0 hw_last=0
[  180.828490] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10423, diff=1, hw=0 hw_last=0
[  180.845070] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10424, diff=1, hw=0 hw_last=0
[  180.861648] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10425, diff=1, hw=0 hw_last=0
[  180.878227] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10426, diff=1, hw=0 hw_last=0
[  180.894813] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10427, diff=1, hw=0 hw_last=0
[  180.911388] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10428, diff=1, hw=0 hw_last=0
[  180.927971] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10429, diff=1, hw=0 hw_last=0
[  180.944550] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10430, diff=1, hw=0 hw_last=0
[  180.961132] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10431, diff=1, hw=0 hw_last=0
[  180.977706] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10432, diff=1, hw=0 hw_last=0
[  180.994284] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10433, diff=1, hw=0 hw_last=0
[  181.010863] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10434, diff=1, hw=0 hw_last=0
[  181.027441] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10435, diff=1, hw=0 hw_last=0
[  181.044022] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10436, diff=1, hw=0 hw_last=0
[  181.060599] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10437, diff=1, hw=0 hw_last=0
[  181.077179] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10438, diff=1, hw=0 hw_last=0
[  181.093759] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10439, diff=1, hw=0 hw_last=0
[  181.110337] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10440, diff=1, hw=0 hw_last=0
[  181.126916] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10441, diff=1, hw=0 hw_last=0
[  181.143496] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10442, diff=1, hw=0 hw_last=0
[  181.160076] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10443, diff=1, hw=0 hw_last=0
[  181.176655] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10444, diff=1, hw=0 hw_last=0
[  181.193235] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10445, diff=1, hw=0 hw_last=0
[  181.209813] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10446, diff=1, hw=0 hw_last=0
[  181.417736] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  181.417837] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006c5644bb
[  181.417920] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  181.417993] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000bac3ec2d state to 000000006c5644bb
[  181.418071] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  181.418143] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a743c9a8 state to 000000006c5644bb
[  181.418222] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000bac3ec2d
[  181.418297] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  181.418368] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  181.418439] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  181.418510] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  181.418584] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  181.418655] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  181.418730] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  181.418801] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  181.418872] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 000000006c5644bb
[  181.418947] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  181.419019] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000006c5644bb
[  181.419101] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  181.419148] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  181.419184] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006c5644bb
[  181.419262] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000c0cf118d to 000000006c5644bb
[  181.419336] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006c5644bb
[  181.419415] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  181.419487] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  181.419582] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  181.419668] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000006c5644bb
[  181.419745] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006c5644bb
[  181.419819] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  181.419893] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  181.419966] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  181.420039] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  181.420111] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006c5644bb
[  181.421592] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  181.425352] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10459, diff=1, hw=0 hw_last=0
[  181.441927] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10460, diff=1, hw=0 hw_last=0
[  181.458506] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10461, diff=1, hw=0 hw_last=0
[  181.475085] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10462, diff=1, hw=0 hw_last=0
[  181.491668] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10463, diff=1, hw=0 hw_last=0
[  181.508245] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10464, diff=1, hw=0 hw_last=0
[  181.524826] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10465, diff=1, hw=0 hw_last=0
[  181.541404] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10466, diff=1, hw=0 hw_last=0
[  181.557993] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10467, diff=1, hw=0 hw_last=0
[  181.574566] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10468, diff=1, hw=0 hw_last=0
[  181.591140] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10469, diff=1, hw=0 hw_last=0
[  181.607722] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10470, diff=1, hw=0 hw_last=0
[  181.624298] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10471, diff=1, hw=0 hw_last=0
[  181.640878] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10472, diff=1, hw=0 hw_last=0
[  181.649804] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  181.649918] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006c5644bb
[  181.650003] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  181.650077] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000bac3ec2d state to 000000006c5644bb
[  181.650155] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  181.650228] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a743c9a8 state to 000000006c5644bb
[  181.650308] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000bac3ec2d
[  181.650382] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  181.650453] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  181.650524] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  181.650594] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  181.650670] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  181.650741] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  181.650817] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  181.650888] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  181.650959] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 000000006c5644bb
[  181.651034] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  181.651107] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000006c5644bb
[  181.651190] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  181.651237] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  181.651274] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006c5644bb
[  181.651354] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000009472d261 to 000000006c5644bb
[  181.651428] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006c5644bb
[  181.651556] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006c5644bb nonblocking
[  181.651678] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  181.651756] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  181.657456] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10473, diff=1, hw=0 hw_last=0
[  181.674033] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10474, diff=1, hw=0 hw_last=0
[  181.690610] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10475, diff=1, hw=0 hw_last=0
[  181.707191] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10476, diff=1, hw=0 hw_last=0
[  181.723769] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10477, diff=1, hw=0 hw_last=0
[  181.740347] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10478, diff=1, hw=0 hw_last=0
[  181.756929] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10479, diff=1, hw=0 hw_last=0
[  181.773508] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10480, diff=1, hw=0 hw_last=0
[  181.790088] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10481, diff=1, hw=0 hw_last=0
[  181.806669] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10482, diff=1, hw=0 hw_last=0
[  181.823246] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10483, diff=1, hw=0 hw_last=0
[  181.839823] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10484, diff=1, hw=0 hw_last=0
[  181.856401] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10485, diff=1, hw=0 hw_last=0
[  181.872979] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10486, diff=1, hw=0 hw_last=0
[  181.889559] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10487, diff=1, hw=0 hw_last=0
[  181.906138] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10488, diff=1, hw=0 hw_last=0
[  181.922717] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10489, diff=1, hw=0 hw_last=0
[  181.939296] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10490, diff=1, hw=0 hw_last=0
[  181.955879] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10491, diff=1, hw=0 hw_last=0
[  181.972459] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10492, diff=1, hw=0 hw_last=0
[  181.989040] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10493, diff=1, hw=0 hw_last=0
[  182.005618] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10494, diff=1, hw=0 hw_last=0
[  182.022196] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10495, diff=1, hw=0 hw_last=0
[  182.038774] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10496, diff=1, hw=0 hw_last=0
[  182.055351] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10497, diff=1, hw=0 hw_last=0
[  182.071932] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10498, diff=1, hw=0 hw_last=0
[  182.088509] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10499, diff=1, hw=0 hw_last=0
[  182.105090] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10500, diff=1, hw=0 hw_last=0
[  182.121668] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10501, diff=1, hw=0 hw_last=0
[  182.138247] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10502, diff=1, hw=0 hw_last=0
[  182.154833] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10503, diff=1, hw=0 hw_last=0
[  182.171405] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10504, diff=1, hw=0 hw_last=0
[  182.187985] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10505, diff=1, hw=0 hw_last=0
[  182.204564] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10506, diff=1, hw=0 hw_last=0
[  182.221144] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10507, diff=1, hw=0 hw_last=0
[  182.237726] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10508, diff=1, hw=0 hw_last=0
[  182.254303] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10509, diff=1, hw=0 hw_last=0
[  182.270883] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10510, diff=1, hw=0 hw_last=0
[  182.287462] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10511, diff=1, hw=0 hw_last=0
[  182.304041] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10512, diff=1, hw=0 hw_last=0
[  182.320619] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10513, diff=1, hw=0 hw_last=0
[  182.337199] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10514, diff=1, hw=0 hw_last=0
[  182.353777] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10515, diff=1, hw=0 hw_last=0
[  182.370358] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10516, diff=1, hw=0 hw_last=0
[  182.386935] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10517, diff=1, hw=0 hw_last=0
[  182.403515] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10518, diff=1, hw=0 hw_last=0
[  182.420096] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10519, diff=1, hw=0 hw_last=0
[  182.436675] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10520, diff=1, hw=0 hw_last=0
[  182.453254] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10521, diff=1, hw=0 hw_last=0
[  182.469837] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10522, diff=1, hw=0 hw_last=0
[  182.479176] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  182.479300] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 10523 to client
[  182.480569] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  182.480662] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007967e7cb
[  182.480737] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  182.480806] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000003519e999 state to 000000007967e7cb
[  182.480876] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  182.480940] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 000000007967e7cb
[  182.481008] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 000000003519e999
[  182.481070] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  182.481131] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  182.481190] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  182.481249] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  182.711858] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  182.711964] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007967e7cb
[  182.712040] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  182.712101] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000003519e999 state to 000000007967e7cb
[  182.712168] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  182.712229] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 000000007967e7cb
[  182.712297] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 000000003519e999
[  182.712360] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  182.712419] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  182.712479] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  182.712539] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  182.712603] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  182.712663] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  182.712727] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  182.712787] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  182.712847] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000007967e7cb
[  182.712911] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  182.712973] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000007967e7cb
[  182.713045] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  182.713092] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  182.713124] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000007967e7cb
[  182.713195] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000c0cf118d to 000000007967e7cb
[  182.713259] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000007967e7cb
[  182.713335] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007967e7cb nonblocking
[  182.713441] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  182.713517] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  182.718524] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10537, diff=1, hw=0 hw_last=0
[  182.718618] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007967e7cb
[  182.718688] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  182.718750] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  182.718812] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  182.718874] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  182.718938] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007967e7cb
[  182.735102] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10538, diff=1, hw=0 hw_last=0
[  182.751680] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10539, diff=1, hw=0 hw_last=0
[  182.768262] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10540, diff=1, hw=0 hw_last=0
[  182.784837] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10541, diff=1, hw=0 hw_last=0
[  182.801417] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10542, diff=1, hw=0 hw_last=0
[  182.817996] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10543, diff=1, hw=0 hw_last=0
[  182.834580] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10544, diff=1, hw=0 hw_last=0
[  182.851155] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10545, diff=1, hw=0 hw_last=0
[  182.867734] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10546, diff=1, hw=0 hw_last=0
[  182.884314] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10547, diff=1, hw=0 hw_last=0
[  182.900893] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10548, diff=1, hw=0 hw_last=0
[  182.917469] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10549, diff=1, hw=0 hw_last=0
[  182.934049] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10550, diff=1, hw=0 hw_last=0
[  182.950627] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10551, diff=1, hw=0 hw_last=0
[  182.967207] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10552, diff=1, hw=0 hw_last=0
[  182.983786] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10553, diff=1, hw=0 hw_last=0
[  183.000365] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10554, diff=1, hw=0 hw_last=0
[  183.016945] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10555, diff=1, hw=0 hw_last=0
[  183.033527] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10556, diff=1, hw=0 hw_last=0
[  183.050105] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10557, diff=1, hw=0 hw_last=0
[  183.066684] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10558, diff=1, hw=0 hw_last=0
[  183.083263] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10559, diff=1, hw=0 hw_last=0
[  183.099842] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10560, diff=1, hw=0 hw_last=0
[  183.116422] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10561, diff=1, hw=0 hw_last=0
[  183.133000] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10562, diff=1, hw=0 hw_last=0
[  183.149578] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10563, diff=1, hw=0 hw_last=0
[  183.166161] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10564, diff=1, hw=0 hw_last=0
[  183.182738] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10565, diff=1, hw=0 hw_last=0
[  183.199318] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10566, diff=1, hw=0 hw_last=0
[  183.215898] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10567, diff=1, hw=0 hw_last=0
[  183.232477] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10568, diff=1, hw=0 hw_last=0
[  183.249054] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10569, diff=1, hw=0 hw_last=0
[  183.265633] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10570, diff=1, hw=0 hw_last=0
[  183.282213] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10571, diff=1, hw=0 hw_last=0
[  183.729858] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10598, diff=1, hw=0 hw_last=0
[  183.746441] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10599, diff=1, hw=0 hw_last=0
[  183.763021] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10600, diff=1, hw=0 hw_last=0
[  183.779597] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10601, diff=1, hw=0 hw_last=0
[  183.796177] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10602, diff=1, hw=0 hw_last=0
[  183.812753] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10603, diff=1, hw=0 hw_last=0
[  183.829332] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10604, diff=1, hw=0 hw_last=0
[  183.838613] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  183.838721] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000018d86a98
[  183.838796] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  183.838859] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000082b4fa6a state to 0000000018d86a98
[  183.838927] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  183.838989] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 0000000018d86a98
[  183.839059] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 0000000082b4fa6a
[  183.839122] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  183.839183] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  183.839243] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  183.839306] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  183.839371] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  183.839432] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  183.839535] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  183.839602] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  183.839667] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 0000000018d86a98
[  183.839735] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  183.839799] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000018d86a98
[  183.839872] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  183.839922] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  183.839954] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000018d86a98
[  183.840025] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000ab379aee to 0000000018d86a98
[  183.840089] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000018d86a98
[  183.840166] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000018d86a98 nonblocking
[  183.840272] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  183.840348] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  183.845911] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10605, diff=1, hw=0 hw_last=0
[  183.846003] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000018d86a98
[  183.846081] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  183.846144] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  183.846207] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  183.846269] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  183.846332] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000018d86a98
[  183.847243] systemd-journald[214]: Data hash table of /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal has a fill level at 75.1 (2732 of 3640 items, 2097152 file size, 767 bytes per hash table item), suggesting rotation.
[  183.862487] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10606, diff=1, hw=0 hw_last=0
[  183.869191] systemd-journald[214]: /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal: Journal header limits reached or header out-of-date, rotating.
[  183.879065] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10607, diff=1, hw=0 hw_last=0
[  183.895649] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10608, diff=1, hw=0 hw_last=0
[  183.912223] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10609, diff=1, hw=0 hw_last=0
[  183.928804] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10610, diff=1, hw=0 hw_last=0
[  183.945384] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10611, diff=1, hw=0 hw_last=0
[  183.961962] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10612, diff=1, hw=0 hw_last=0
[  183.978540] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10613, diff=1, hw=0 hw_last=0
[  183.995120] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10614, diff=1, hw=0 hw_last=0
[  184.011702] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10615, diff=1, hw=0 hw_last=0
[  184.028278] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10616, diff=1, hw=0 hw_last=0
[  184.044855] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10617, diff=1, hw=0 hw_last=0
[  184.061434] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10618, diff=1, hw=0 hw_last=0
[  184.078013] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10619, diff=1, hw=0 hw_last=0
[  184.094593] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10620, diff=1, hw=0 hw_last=0
[  184.111171] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10621, diff=1, hw=0 hw_last=0
[  184.127751] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10622, diff=1, hw=0 hw_last=0
[  184.144330] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10623, diff=1, hw=0 hw_last=0
[  184.160914] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10624, diff=1, hw=0 hw_last=0
[  184.177491] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10625, diff=1, hw=0 hw_last=0
[  184.194070] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10626, diff=1, hw=0 hw_last=0
[  184.210650] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10627, diff=1, hw=0 hw_last=0
[  184.227227] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10628, diff=1, hw=0 hw_last=0
[  184.243807] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10629, diff=1, hw=0 hw_last=0
[  184.260386] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10630, diff=1, hw=0 hw_last=0
[  184.393018] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10638, diff=1, hw=0 hw_last=0
[  184.409598] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10639, diff=1, hw=0 hw_last=0
[  184.426178] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10640, diff=1, hw=0 hw_last=0
[  184.442759] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10641, diff=1, hw=0 hw_last=0
[  184.459336] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10642, diff=1, hw=0 hw_last=0
[  184.475914] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10643, diff=1, hw=0 hw_last=0
[  184.492496] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10644, diff=1, hw=0 hw_last=0
[  184.509075] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10645, diff=1, hw=0 hw_last=0
[  184.525652] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10646, diff=1, hw=0 hw_last=0
[  184.542233] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10647, diff=1, hw=0 hw_last=0
[  184.558812] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10648, diff=1, hw=0 hw_last=0
[  184.575390] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10649, diff=1, hw=0 hw_last=0
[  184.591973] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10650, diff=1, hw=0 hw_last=0
[  184.608552] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10651, diff=1, hw=0 hw_last=0
[  184.625130] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10652, diff=1, hw=0 hw_last=0
[  184.641708] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10653, diff=1, hw=0 hw_last=0
[  184.658290] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10654, diff=1, hw=0 hw_last=0
[  184.674869] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10655, diff=1, hw=0 hw_last=0
[  184.691450] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10656, diff=1, hw=0 hw_last=0
[  184.708024] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10657, diff=1, hw=0 hw_last=0
[  184.724614] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10658, diff=1, hw=0 hw_last=0
[  184.726089] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  184.726200] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 10659 to client
[  184.733454] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  184.733547] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006e1bef3e
[  184.733620] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  184.733682] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000055579822 state to 000000006e1bef3e
[  184.733749] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  184.733811] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 000000006e1bef3e
[  184.733879] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 0000000055579822
[  184.733942] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  184.734003] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  184.734063] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  184.734124] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  184.734188] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  184.734249] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  184.734313] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  184.734374] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  184.734434] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 000000006e1bef3e
[  184.734497] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  184.734559] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000006e1bef3e
[  184.734630] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  184.734675] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  184.734706] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006e1bef3e
[  184.734774] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000095dd8ec0 to 000000006e1bef3e
[  184.734837] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006e1bef3e
[  184.734904] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  184.734965] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  184.735028] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  184.735098] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000006e1bef3e
[  184.735162] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006e1bef3e
[  184.735224] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  184.735285] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  184.735346] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  184.735407] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  184.735468] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006e1bef3e
[  184.736932] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  184.741193] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10659, diff=1, hw=0 hw_last=0
[  184.757769] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10660, diff=1, hw=0 hw_last=0
[  184.774347] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10661, diff=1, hw=0 hw_last=0
[  184.790925] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10662, diff=1, hw=0 hw_last=0
[  184.807509] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10663, diff=1, hw=0 hw_last=0
[  184.824086] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10664, diff=1, hw=0 hw_last=0
[  184.840664] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10665, diff=1, hw=0 hw_last=0
[  184.857245] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10666, diff=1, hw=0 hw_last=0
[  184.873827] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10667, diff=1, hw=0 hw_last=0
[  184.890404] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10668, diff=1, hw=0 hw_last=0
[  184.906981] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10669, diff=1, hw=0 hw_last=0
[  184.923562] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10670, diff=1, hw=0 hw_last=0
[  184.965977] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000055579822 state to 000000006e1bef3e
[  184.966043] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  184.966104] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 000000006e1bef3e
[  184.966174] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000055579822
[  184.966238] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  184.966298] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  184.966359] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  184.966419] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  184.966483] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  184.966545] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  184.966609] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  184.966670] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  184.966731] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 000000006e1bef3e
[  184.966795] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  184.966858] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000006e1bef3e
[  184.966929] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  184.966973] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  184.967004] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006e1bef3e
[  184.967073] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000000305e034 to 000000006e1bef3e
[  184.967137] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006e1bef3e
[  184.967216] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006e1bef3e nonblocking
[  184.967322] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  184.967394] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  184.973294] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10673, diff=1, hw=0 hw_last=0
[  184.973396] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006e1bef3e
[  184.973471] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  184.973533] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  184.973595] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  184.973657] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  184.973719] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006e1bef3e
[  184.989872] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10674, diff=1, hw=0 hw_last=0
[  185.006454] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10675, diff=1, hw=0 hw_last=0
[  185.023030] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10676, diff=1, hw=0 hw_last=0
[  185.039608] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10677, diff=1, hw=0 hw_last=0
[  185.056187] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10678, diff=1, hw=0 hw_last=0
[  185.072769] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10679, diff=1, hw=0 hw_last=0
[  185.089346] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10680, diff=1, hw=0 hw_last=0
[  185.105926] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10681, diff=1, hw=0 hw_last=0
[  185.122509] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10682, diff=1, hw=0 hw_last=0
[  185.139084] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10683, diff=1, hw=0 hw_last=0
[  185.155661] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10684, diff=1, hw=0 hw_last=0
[  185.172240] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10685, diff=1, hw=0 hw_last=0
[  185.188820] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10686, diff=1, hw=0 hw_last=0
[  185.205399] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10687, diff=1, hw=0 hw_last=0
[  185.221978] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10688, diff=1, hw=0 hw_last=0
[  185.238558] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10689, diff=1, hw=0 hw_last=0
[  185.255137] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10690, diff=1, hw=0 hw_last=0
[  185.271723] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10691, diff=1, hw=0 hw_last=0
[  185.288302] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10692, diff=1, hw=0 hw_last=0
[  185.304877] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10693, diff=1, hw=0 hw_last=0
[  185.321456] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10694, diff=1, hw=0 hw_last=0
[  185.338033] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10695, diff=1, hw=0 hw_last=0
[  185.354612] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10696, diff=1, hw=0 hw_last=0
[  185.371192] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10697, diff=1, hw=0 hw_last=0
[  185.387773] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10698, diff=1, hw=0 hw_last=0
[  185.404351] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10699, diff=1, hw=0 hw_last=0
[  185.420930] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10700, diff=1, hw=0 hw_last=0
[  185.437510] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10701, diff=1, hw=0 hw_last=0
[  185.454088] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10702, diff=1, hw=0 hw_last=0
[  185.470666] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10703, diff=1, hw=0 hw_last=0
[  185.487248] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10704, diff=1, hw=0 hw_last=0
[  185.503825] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10705, diff=1, hw=0 hw_last=0
[  185.520406] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10706, diff=1, hw=0 hw_last=0
[  185.536984] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10707, diff=1, hw=0 hw_last=0
[  185.553563] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10708, diff=1, hw=0 hw_last=0
[  185.570152] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10709, diff=1, hw=0 hw_last=0
[  185.812666] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000004593454f
[  185.812733] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  185.812795] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  185.812859] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  185.812929] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000004593454f
[  185.812994] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000004593454f
[  185.813056] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  185.813118] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  185.813179] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  185.813242] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  185.813304] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000004593454f
[  185.814718] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  185.818838] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10724, diff=1, hw=0 hw_last=0
[  185.835416] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10725, diff=1, hw=0 hw_last=0
[  185.851996] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10726, diff=1, hw=0 hw_last=0
[  185.868573] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10727, diff=1, hw=0 hw_last=0
[  185.885156] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10728, diff=1, hw=0 hw_last=0
[  185.901734] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10729, diff=1, hw=0 hw_last=0
[  185.918314] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10730, diff=1, hw=0 hw_last=0
[  185.934894] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10731, diff=1, hw=0 hw_last=0
[  185.951473] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10732, diff=1, hw=0 hw_last=0
[  185.968054] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10733, diff=1, hw=0 hw_last=0
[  185.984631] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10734, diff=1, hw=0 hw_last=0
[  186.001211] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10735, diff=1, hw=0 hw_last=0
[  186.017786] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10736, diff=1, hw=0 hw_last=0
[  186.034367] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10737, diff=1, hw=0 hw_last=0
[  186.042342] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  186.042446] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000004593454f
[  186.042522] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  186.042585] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000087081e28 state to 000000004593454f
[  186.042654] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  186.042715] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000e8543c49 state to 000000004593454f
[  186.042783] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 0000000087081e28
[  186.042846] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  186.042906] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  186.042967] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  186.043027] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  186.043091] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  186.043152] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  186.043216] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  186.043277] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  186.043338] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000004593454f
[  186.043401] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  186.043465] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000004593454f
[  186.043573] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  186.043625] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  186.043657] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000004593454f
[  186.043735] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000095dd8ec0 to 000000004593454f
[  186.043801] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000004593454f
[  186.043884] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000004593454f nonblocking
[  186.043981] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  186.044070] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  186.050943] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10738, diff=1, hw=0 hw_last=0
[  186.051034] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000004593454f
[  186.051124] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  186.051198] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  186.051271] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  186.051346] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  186.051420] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000004593454f
[  186.067520] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10739, diff=1, hw=0 hw_last=0
[  186.084100] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10740, diff=1, hw=0 hw_last=0
[  186.100679] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10741, diff=1, hw=0 hw_last=0
[  186.117257] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10742, diff=1, hw=0 hw_last=0
[  186.133837] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10743, diff=1, hw=0 hw_last=0
[  186.150416] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10744, diff=1, hw=0 hw_last=0
[  186.166997] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10745, diff=1, hw=0 hw_last=0
[  186.183575] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10746, diff=1, hw=0 hw_last=0
[  186.200154] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10747, diff=1, hw=0 hw_last=0
[  186.216736] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10748, diff=1, hw=0 hw_last=0
[  186.233311] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10749, diff=1, hw=0 hw_last=0
[  186.249888] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10750, diff=1, hw=0 hw_last=0
[  186.266468] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10751, diff=1, hw=0 hw_last=0
[  186.283047] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10752, diff=1, hw=0 hw_last=0
[  186.299626] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10753, diff=1, hw=0 hw_last=0
[  186.316205] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10754, diff=1, hw=0 hw_last=0
[  186.332785] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10755, diff=1, hw=0 hw_last=0
[  186.349364] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10756, diff=1, hw=0 hw_last=0
[  186.365947] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10757, diff=1, hw=0 hw_last=0
[  186.382527] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10758, diff=1, hw=0 hw_last=0
[  186.399104] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10759, diff=1, hw=0 hw_last=0
[  186.415685] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10760, diff=1, hw=0 hw_last=0
[  186.432261] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10761, diff=1, hw=0 hw_last=0
[  186.448839] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10762, diff=1, hw=0 hw_last=0
[  186.465419] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10763, diff=1, hw=0 hw_last=0
[  186.481998] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10764, diff=1, hw=0 hw_last=0
[  186.498578] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10765, diff=1, hw=0 hw_last=0
[  186.515157] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10766, diff=1, hw=0 hw_last=0
[  186.531737] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10767, diff=1, hw=0 hw_last=0
[  186.548314] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10768, diff=1, hw=0 hw_last=0
[  186.564893] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10769, diff=1, hw=0 hw_last=0
[  186.581476] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10770, diff=1, hw=0 hw_last=0
[  186.598056] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10771, diff=1, hw=0 hw_last=0
[  186.614633] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10772, diff=1, hw=0 hw_last=0
[  186.631213] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10773, diff=1, hw=0 hw_last=0
[  186.647791] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10774, diff=1, hw=0 hw_last=0
[  186.664372] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10775, diff=1, hw=0 hw_last=0
[  186.680953] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10776, diff=1, hw=0 hw_last=0
[  186.697528] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10777, diff=1, hw=0 hw_last=0
[  186.714108] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10778, diff=1, hw=0 hw_last=0
[  186.730689] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10779, diff=1, hw=0 hw_last=0
[  186.747269] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10780, diff=1, hw=0 hw_last=0
[  186.763846] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10781, diff=1, hw=0 hw_last=0
[  186.780426] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10782, diff=1, hw=0 hw_last=0
[  186.797005] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10783, diff=1, hw=0 hw_last=0
[  186.813583] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10784, diff=1, hw=0 hw_last=0
[  186.830162] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10785, diff=1, hw=0 hw_last=0
[  186.846741] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10786, diff=1, hw=0 hw_last=0
[  186.863321] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10787, diff=1, hw=0 hw_last=0
[  186.879900] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10788, diff=1, hw=0 hw_last=0
[  186.896481] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10789, diff=1, hw=0 hw_last=0
[  186.908484] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  186.908599] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 10790 to client
[  186.913066] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10790, diff=1, hw=0 hw_last=0
[  186.921855] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  186.921940] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f37c832b
[  186.922014] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  186.922075] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000002cafbe1b state to 00000000f37c832b
[  186.922142] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  186.922203] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 00000000f37c832b
[  186.922272] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 000000002cafbe1b
[  186.922334] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  186.922394] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  186.922454] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  186.922514] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  186.922579] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  186.922640] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  186.922704] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  186.922765] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  186.922825] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 00000000f37c832b
[  186.922888] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  186.922949] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000f37c832b
[  186.923020] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  186.923065] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  186.923096] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000f37c832b
[  186.923163] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000018d86a98 to 00000000f37c832b
[  186.923225] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000f37c832b
[  187.112015] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10802, diff=1, hw=0 hw_last=0
[  187.128592] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10803, diff=1, hw=0 hw_last=0
[  187.145174] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10804, diff=1, hw=0 hw_last=0
[  187.145776] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  187.145872] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f37c832b
[  187.145951] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  187.146015] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000002cafbe1b state to 00000000f37c832b
[  187.146083] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  187.146145] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 00000000f37c832b
[  187.146214] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 000000002cafbe1b
[  187.146278] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  187.146339] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  187.146401] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  187.146463] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  187.146528] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  187.146590] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  187.146659] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  187.146721] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  187.146782] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 00000000f37c832b
[  187.146846] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  187.146910] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000f37c832b
[  187.146982] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  187.147027] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  187.147059] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000f37c832b
[  187.147127] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000008e9f664b to 00000000f37c832b
[  187.147190] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000f37c832b
[  187.147269] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f37c832b nonblocking
[  187.147371] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  187.147446] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  187.161749] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10805, diff=1, hw=0 hw_last=0
[  187.161846] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f37c832b
[  187.161926] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  187.161989] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  187.162050] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  187.162113] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  187.162176] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f37c832b
[  187.178325] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10806, diff=1, hw=0 hw_last=0
[  187.194905] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10807, diff=1, hw=0 hw_last=0
[  187.211485] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10808, diff=1, hw=0 hw_last=0
[  187.228063] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10809, diff=1, hw=0 hw_last=0
[  187.244642] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10810, diff=1, hw=0 hw_last=0
[  187.261226] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10811, diff=1, hw=0 hw_last=0
[  187.277801] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10812, diff=1, hw=0 hw_last=0
[  187.294382] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10813, diff=1, hw=0 hw_last=0
[  187.310965] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10814, diff=1, hw=0 hw_last=0
[  187.327544] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10815, diff=1, hw=0 hw_last=0
[  187.344116] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10816, diff=1, hw=0 hw_last=0
[  187.360695] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10817, diff=1, hw=0 hw_last=0
[  187.377275] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10818, diff=1, hw=0 hw_last=0
[  187.393853] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10819, diff=1, hw=0 hw_last=0
[  187.410432] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10820, diff=1, hw=0 hw_last=0
[  187.427013] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10821, diff=1, hw=0 hw_last=0
[  187.443591] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10822, diff=1, hw=0 hw_last=0
[  187.460171] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10823, diff=1, hw=0 hw_last=0
[  187.476751] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10824, diff=1, hw=0 hw_last=0
[  187.493330] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10825, diff=1, hw=0 hw_last=0
[  187.509909] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10826, diff=1, hw=0 hw_last=0
[  187.526490] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10827, diff=1, hw=0 hw_last=0
[  187.543070] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10828, diff=1, hw=0 hw_last=0
[  187.559646] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10829, diff=1, hw=0 hw_last=0
[  187.576226] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10830, diff=1, hw=0 hw_last=0
[  187.592805] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10831, diff=1, hw=0 hw_last=0
[  187.609384] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10832, diff=1, hw=0 hw_last=0
[  187.625965] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10833, diff=1, hw=0 hw_last=0
[  187.642543] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10834, diff=1, hw=0 hw_last=0
[  187.659122] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10835, diff=1, hw=0 hw_last=0
[  187.675701] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10836, diff=1, hw=0 hw_last=0
[  187.967829] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  187.967890] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  187.967951] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 00000000eae20a14
[  187.968019] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  187.968082] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000eae20a14
[  187.968153] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  187.968201] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  187.968232] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000eae20a14
[  187.968302] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000007967e7cb to 00000000eae20a14
[  187.968365] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000eae20a14
[  187.968432] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  187.968494] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  187.968557] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  187.968627] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 00000000eae20a14
[  187.968693] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000eae20a14
[  187.968755] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  187.968817] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  187.968879] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  187.968940] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  187.969002] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000eae20a14
[  187.970422] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  187.974138] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10854, diff=1, hw=0 hw_last=0
[  187.990712] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10855, diff=1, hw=0 hw_last=0
[  188.007292] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10856, diff=1, hw=0 hw_last=0
[  188.023869] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10857, diff=1, hw=0 hw_last=0
[  188.040452] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10858, diff=1, hw=0 hw_last=0
[  188.057033] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10859, diff=1, hw=0 hw_last=0
[  188.073610] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10860, diff=1, hw=0 hw_last=0
[  188.090191] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10861, diff=1, hw=0 hw_last=0
[  188.106769] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10862, diff=1, hw=0 hw_last=0
[  188.123349] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10863, diff=1, hw=0 hw_last=0
[  188.139928] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10864, diff=1, hw=0 hw_last=0
[  188.156506] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10865, diff=1, hw=0 hw_last=0
[  188.173081] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10866, diff=1, hw=0 hw_last=0
[  188.189662] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10867, diff=1, hw=0 hw_last=0
[  188.198310] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  188.198415] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000eae20a14
[  188.198489] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  188.198552] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000215b6887 state to 00000000eae20a14
[  188.198619] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  188.198679] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000adb7ad91 state to 00000000eae20a14
[  188.198748] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000215b6887
[  188.198811] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  188.198871] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  188.198931] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  188.198991] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  188.199055] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  188.199116] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  188.199179] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  188.199239] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  188.199300] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 00000000eae20a14
[  188.199363] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  188.199425] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000eae20a14
[  188.199533] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  188.199585] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  188.199618] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000eae20a14
[  188.199693] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000006c5644bb to 00000000eae20a14
[  188.199758] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000eae20a14
[  188.199837] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000eae20a14 nonblocking
[  188.199937] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  188.200021] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  188.206240] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10868, diff=1, hw=0 hw_last=0
[  188.206336] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000eae20a14
[  188.206423] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  188.206497] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  188.206571] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  188.206645] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  188.206719] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000eae20a14
[  188.222818] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10869, diff=1, hw=0 hw_last=0
[  188.239395] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10870, diff=1, hw=0 hw_last=0
[  188.255976] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10871, diff=1, hw=0 hw_last=0
[  188.272553] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10872, diff=1, hw=0 hw_last=0
[  188.819665] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10905, diff=1, hw=0 hw_last=0
[  188.836245] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10906, diff=1, hw=0 hw_last=0
[  188.852826] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10907, diff=1, hw=0 hw_last=0
[  188.869403] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10908, diff=1, hw=0 hw_last=0
[  188.885981] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10909, diff=1, hw=0 hw_last=0
[  188.902562] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10910, diff=1, hw=0 hw_last=0
[  188.919142] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10911, diff=1, hw=0 hw_last=0
[  188.935723] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10912, diff=1, hw=0 hw_last=0
[  188.952303] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10913, diff=1, hw=0 hw_last=0
[  188.968878] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10914, diff=1, hw=0 hw_last=0
[  188.985463] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10915, diff=1, hw=0 hw_last=0
[  188.989184] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  188.989295] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 10916 to client
[  188.994547] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  188.994642] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008a640c91
[  188.994712] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  188.994773] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000bac3ec2d state to 000000008a640c91
[  188.994839] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  188.994899] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 000000008a640c91
[  188.994967] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000bac3ec2d
[  188.995030] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  188.995089] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  188.995149] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  188.995209] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  188.995273] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  188.995334] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  188.995398] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  188.995458] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  188.995539] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000008a640c91
[  188.995606] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  188.995668] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000008a640c91
[  188.995740] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  188.995786] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  188.995818] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008a640c91
[  188.995888] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000eae20a14 to 000000008a640c91
[  188.995951] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008a640c91
[  188.996019] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  188.996080] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  188.996142] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  188.996211] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000008a640c91
[  188.996277] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008a640c91
[  188.996338] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  188.996400] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  188.996461] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  188.996522] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  188.996583] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008a640c91
[  188.998003] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  189.002048] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10916, diff=1, hw=0 hw_last=0
[  189.018624] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10917, diff=1, hw=0 hw_last=0
[  189.035201] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10918, diff=1, hw=0 hw_last=0
[  189.051781] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10919, diff=1, hw=0 hw_last=0
[  189.068363] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10920, diff=1, hw=0 hw_last=0
[  189.084941] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10921, diff=1, hw=0 hw_last=0
[  189.101518] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10922, diff=1, hw=0 hw_last=0
[  189.118101] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10923, diff=1, hw=0 hw_last=0
[  189.134678] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10924, diff=1, hw=0 hw_last=0
[  189.151263] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10925, diff=1, hw=0 hw_last=0
[  189.167838] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10926, diff=1, hw=0 hw_last=0
[  189.184420] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10927, diff=1, hw=0 hw_last=0
[  189.200992] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10928, diff=1, hw=0 hw_last=0
[  189.217573] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10929, diff=1, hw=0 hw_last=0
[  189.225646] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  189.225755] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008a640c91
[  189.225832] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  189.225895] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000bac3ec2d state to 000000008a640c91
[  189.225962] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  189.226023] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 000000008a640c91
[  189.226092] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000bac3ec2d
[  189.226156] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  189.226216] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  189.226276] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  189.226337] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  189.226400] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  189.226845] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  189.226892] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  189.226924] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008a640c91
[  189.226991] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000007967e7cb to 000000008a640c91
[  189.227054] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008a640c91
[  189.227132] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000008a640c91 nonblocking
[  189.227240] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  189.227315] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  189.234147] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10930, diff=1, hw=0 hw_last=0
[  189.234261] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008a640c91
[  189.234330] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  189.234395] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  189.234459] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  189.234522] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  189.234588] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008a640c91
[  189.250726] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10931, diff=1, hw=0 hw_last=0
[  189.267305] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10932, diff=1, hw=0 hw_last=0
[  189.283884] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10933, diff=1, hw=0 hw_last=0
[  189.300463] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10934, diff=1, hw=0 hw_last=0
[  189.317042] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10935, diff=1, hw=0 hw_last=0
[  189.333623] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10936, diff=1, hw=0 hw_last=0
[  189.350200] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10937, diff=1, hw=0 hw_last=0
[  189.366781] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10938, diff=1, hw=0 hw_last=0
[  189.383361] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10939, diff=1, hw=0 hw_last=0
[  189.399942] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10940, diff=1, hw=0 hw_last=0
[  189.416515] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10941, diff=1, hw=0 hw_last=0
[  189.433095] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10942, diff=1, hw=0 hw_last=0
[  189.449675] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10943, diff=1, hw=0 hw_last=0
[  189.466253] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10944, diff=1, hw=0 hw_last=0
[  189.482834] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10945, diff=1, hw=0 hw_last=0
[  189.499412] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10946, diff=1, hw=0 hw_last=0
[  189.515990] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10947, diff=1, hw=0 hw_last=0
[  189.532570] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10948, diff=1, hw=0 hw_last=0
[  189.549151] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10949, diff=1, hw=0 hw_last=0
[  189.565730] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10950, diff=1, hw=0 hw_last=0
[  189.582308] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10951, diff=1, hw=0 hw_last=0
[  189.598893] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10952, diff=1, hw=0 hw_last=0
[  189.615467] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10953, diff=1, hw=0 hw_last=0
[  189.632045] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10954, diff=1, hw=0 hw_last=0
[  189.648625] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10955, diff=1, hw=0 hw_last=0
[  189.665203] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10956, diff=1, hw=0 hw_last=0
[  189.681783] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10957, diff=1, hw=0 hw_last=0
[  189.698362] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10958, diff=1, hw=0 hw_last=0
[  189.714941] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10959, diff=1, hw=0 hw_last=0
[  189.731520] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10960, diff=1, hw=0 hw_last=0
[  189.748099] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10961, diff=1, hw=0 hw_last=0
[  189.764678] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10962, diff=1, hw=0 hw_last=0
[  189.781258] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10963, diff=1, hw=0 hw_last=0
[  189.797838] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10964, diff=1, hw=0 hw_last=0
[  189.814417] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10965, diff=1, hw=0 hw_last=0
[  189.830997] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10966, diff=1, hw=0 hw_last=0
[  189.847581] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10967, diff=1, hw=0 hw_last=0
[  189.864156] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10968, diff=1, hw=0 hw_last=0
[  189.880735] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10969, diff=1, hw=0 hw_last=0
[  189.897312] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10970, diff=1, hw=0 hw_last=0
[  189.913891] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10971, diff=1, hw=0 hw_last=0
[  189.930477] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10972, diff=1, hw=0 hw_last=0
[  189.947050] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10973, diff=1, hw=0 hw_last=0
[  189.963630] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10974, diff=1, hw=0 hw_last=0
[  189.980211] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10975, diff=1, hw=0 hw_last=0
[  189.996788] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10976, diff=1, hw=0 hw_last=0
[  190.096269] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10982, diff=1, hw=0 hw_last=0
[  190.117588] systemd-journald[214]: /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal: Journal header limits reached or header out-of-date, rotating.
[  190.117580] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10983, diff=1, hw=0 hw_last=0
[  190.137709] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10984, diff=1, hw=0 hw_last=0
[  190.146010] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10985, diff=1, hw=0 hw_last=0
[  190.162587] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10986, diff=1, hw=0 hw_last=0
[  190.179165] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10987, diff=1, hw=0 hw_last=0
[  190.195745] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10988, diff=1, hw=0 hw_last=0
[  190.212323] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10989, diff=1, hw=0 hw_last=0
[  190.228905] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10990, diff=1, hw=0 hw_last=0
[  190.245484] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10991, diff=1, hw=0 hw_last=0
[  190.262063] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10992, diff=1, hw=0 hw_last=0
[  190.278640] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10993, diff=1, hw=0 hw_last=0
[  190.295222] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10994, diff=1, hw=0 hw_last=0
[  190.311798] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10995, diff=1, hw=0 hw_last=0
[  190.320743] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  190.320849] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000cc24793
[  190.320925] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  190.320988] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000003519e999 state to 000000000cc24793
[  190.321054] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  190.321115] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000e8543c49 state to 000000000cc24793
[  190.321182] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 000000003519e999
[  190.321245] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  190.321305] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  190.321364] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  190.321424] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  190.321487] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  190.321547] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  190.321611] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  190.321671] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  190.321731] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 000000000cc24793
[  190.321794] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  190.321856] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000000cc24793
[  190.321928] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  190.321973] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  190.322004] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000cc24793
[  190.322072] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000018d86a98 to 000000000cc24793
[  190.322134] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000cc24793
[  190.322210] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000cc24793 nonblocking
[  190.322316] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  190.322392] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  190.328375] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10996, diff=1, hw=0 hw_last=0
[  190.328481] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000cc24793
[  190.328548] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  190.328611] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  190.328673] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  190.328736] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  190.328800] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000cc24793
[  190.344954] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10997, diff=1, hw=0 hw_last=0
[  190.361531] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10998, diff=1, hw=0 hw_last=0
[  190.378110] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=10999, diff=1, hw=0 hw_last=0
[  190.394689] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11000, diff=1, hw=0 hw_last=0
[  190.411268] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11001, diff=1, hw=0 hw_last=0
[  190.427849] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11002, diff=1, hw=0 hw_last=0
[  190.444427] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11003, diff=1, hw=0 hw_last=0
[  190.461007] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11004, diff=1, hw=0 hw_last=0
[  190.477589] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11005, diff=1, hw=0 hw_last=0
[  190.494168] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11006, diff=1, hw=0 hw_last=0
[  190.510743] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11007, diff=1, hw=0 hw_last=0
[  190.527322] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11008, diff=1, hw=0 hw_last=0
[  190.543901] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11009, diff=1, hw=0 hw_last=0
[  190.560480] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11010, diff=1, hw=0 hw_last=0
[  190.577059] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11011, diff=1, hw=0 hw_last=0
[  190.593639] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11012, diff=1, hw=0 hw_last=0
[  190.610217] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11013, diff=1, hw=0 hw_last=0
[  190.626797] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11014, diff=1, hw=0 hw_last=0
[  190.643379] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11015, diff=1, hw=0 hw_last=0
[  190.659956] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11016, diff=1, hw=0 hw_last=0
[  190.676536] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11017, diff=1, hw=0 hw_last=0
[  190.693114] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11018, diff=1, hw=0 hw_last=0
[  190.709692] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11019, diff=1, hw=0 hw_last=0
[  190.726272] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11020, diff=1, hw=0 hw_last=0
[  190.742854] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11021, diff=1, hw=0 hw_last=0
[  190.759430] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11022, diff=1, hw=0 hw_last=0
[  190.776010] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11023, diff=1, hw=0 hw_last=0
[  190.792589] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11024, diff=1, hw=0 hw_last=0
[  190.809168] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11025, diff=1, hw=0 hw_last=0
[  190.825747] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11026, diff=1, hw=0 hw_last=0
[  190.842326] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11027, diff=1, hw=0 hw_last=0
[  190.858908] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11028, diff=1, hw=0 hw_last=0
[  190.875485] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11029, diff=1, hw=0 hw_last=0
[  190.892066] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11030, diff=1, hw=0 hw_last=0
[  190.908646] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11031, diff=1, hw=0 hw_last=0
[  190.925227] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11032, diff=1, hw=0 hw_last=0
[  190.941803] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11033, diff=1, hw=0 hw_last=0
[  190.958388] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11034, diff=1, hw=0 hw_last=0
[  190.974961] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11035, diff=1, hw=0 hw_last=0
[  190.991539] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11036, diff=1, hw=0 hw_last=0
[  191.008123] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11037, diff=1, hw=0 hw_last=0
[  191.024698] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11038, diff=1, hw=0 hw_last=0
[  191.041277] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11039, diff=1, hw=0 hw_last=0
[  191.057857] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11040, diff=1, hw=0 hw_last=0
[  191.074436] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11041, diff=1, hw=0 hw_last=0
[  191.091014] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11042, diff=1, hw=0 hw_last=0
[  191.107596] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11043, diff=1, hw=0 hw_last=0
[  191.124174] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11044, diff=1, hw=0 hw_last=0
[  191.140756] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11045, diff=1, hw=0 hw_last=0
[  191.154080] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  191.154196] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 11046 to client
[  191.157338] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11046, diff=1, hw=0 hw_last=0
[  191.166447] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  191.166532] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000071ef6b0b
[  191.166602] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  191.166663] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000fefb5c61 state to 0000000071ef6b0b
[  191.166729] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  191.166789] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 0000000071ef6b0b
[  191.166857] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000fefb5c61
[  191.166920] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  191.166980] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  191.167039] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  191.167100] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  191.167163] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  191.167223] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  191.167287] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  191.167346] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  191.167406] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 0000000071ef6b0b
[  191.167486] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  191.167551] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000071ef6b0b
[  191.167624] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  191.167672] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  191.167703] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000071ef6b0b
[  191.167772] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000004593454f to 0000000071ef6b0b
[  191.167835] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000071ef6b0b
[  191.167904] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  191.167966] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  191.168027] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  191.168096] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 0000000071ef6b0b
[  191.168161] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000071ef6b0b
[  191.168224] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  191.168286] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  191.168348] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  191.168409] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  191.168472] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000071ef6b0b
[  191.169981] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  191.173916] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11047, diff=1, hw=0 hw_last=0
[  191.190495] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11048, diff=1, hw=0 hw_last=0
[  191.389445] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11060, diff=1, hw=0 hw_last=0
[  191.397845] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  191.397950] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000071ef6b0b
[  191.398026] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  191.398089] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000fefb5c61 state to 0000000071ef6b0b
[  191.398156] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  191.398217] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 0000000071ef6b0b
[  191.398285] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000fefb5c61
[  191.398349] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  191.398410] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  191.398470] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  191.398531] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  191.398595] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  191.398656] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  191.398720] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  191.398781] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  191.398842] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 0000000071ef6b0b
[  191.398906] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  191.398968] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000071ef6b0b
[  191.399040] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  191.399087] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  191.399118] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000071ef6b0b
[  191.399188] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000006e1bef3e to 0000000071ef6b0b
[  191.399251] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000071ef6b0b
[  191.399329] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000071ef6b0b nonblocking
[  191.399439] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  191.399526] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  191.406024] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11061, diff=1, hw=0 hw_last=0
[  191.406131] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000071ef6b0b
[  191.406199] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  191.406263] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  191.406325] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  191.406388] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  191.406451] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000071ef6b0b
[  191.422603] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11062, diff=1, hw=0 hw_last=0
[  191.439178] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11063, diff=1, hw=0 hw_last=0
[  191.455759] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11064, diff=1, hw=0 hw_last=0
[  191.472338] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11065, diff=1, hw=0 hw_last=0
[  191.488920] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11066, diff=1, hw=0 hw_last=0
[  191.505496] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11067, diff=1, hw=0 hw_last=0
[  191.522079] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11068, diff=1, hw=0 hw_last=0
[  191.538657] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11069, diff=1, hw=0 hw_last=0
[  191.555238] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11070, diff=1, hw=0 hw_last=0
[  191.571812] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11071, diff=1, hw=0 hw_last=0
[  191.588391] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11072, diff=1, hw=0 hw_last=0
[  191.604970] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11073, diff=1, hw=0 hw_last=0
[  191.621555] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11074, diff=1, hw=0 hw_last=0
[  191.638129] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11075, diff=1, hw=0 hw_last=0
[  191.654708] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11076, diff=1, hw=0 hw_last=0
[  191.671287] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11077, diff=1, hw=0 hw_last=0
[  191.687866] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11078, diff=1, hw=0 hw_last=0
[  191.704449] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11079, diff=1, hw=0 hw_last=0
[  191.721026] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11080, diff=1, hw=0 hw_last=0
[  191.737605] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11081, diff=1, hw=0 hw_last=0
[  191.754184] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11082, diff=1, hw=0 hw_last=0
[  191.770765] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11083, diff=1, hw=0 hw_last=0
[  191.787342] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11084, diff=1, hw=0 hw_last=0
[  191.803922] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11085, diff=1, hw=0 hw_last=0
[  191.820499] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11086, diff=1, hw=0 hw_last=0
[  191.837079] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11087, diff=1, hw=0 hw_last=0
[  191.853659] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11088, diff=1, hw=0 hw_last=0
[  191.870239] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11089, diff=1, hw=0 hw_last=0
[  191.886817] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11090, diff=1, hw=0 hw_last=0
[  191.903396] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11091, diff=1, hw=0 hw_last=0
[  191.919975] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11092, diff=1, hw=0 hw_last=0
[  191.936557] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11093, diff=1, hw=0 hw_last=0
[  191.953138] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11094, diff=1, hw=0 hw_last=0
[  192.102346] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11103, diff=1, hw=0 hw_last=0
[  192.118925] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11104, diff=1, hw=0 hw_last=0
[  192.135505] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11105, diff=1, hw=0 hw_last=0
[  192.152084] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11106, diff=1, hw=0 hw_last=0
[  192.168666] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11107, diff=1, hw=0 hw_last=0
[  192.181390] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  192.181504] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 11108 to client
[  192.185250] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11108, diff=1, hw=0 hw_last=0
[  192.194765] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  192.194849] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006fb5b2d2
[  192.194922] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  192.194984] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000055579822 state to 000000006fb5b2d2
[  192.195051] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  192.195112] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 000000006fb5b2d2
[  192.195181] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000055579822
[  192.195245] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  192.195306] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  192.195367] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  192.195428] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  192.195509] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  192.195572] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  192.195637] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  192.195699] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  192.195761] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000006fb5b2d2
[  192.195826] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  192.195888] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000006fb5b2d2
[  192.195960] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  192.196007] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  192.196039] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006fb5b2d2
[  192.196107] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000071ef6b0b to 000000006fb5b2d2
[  192.196171] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006fb5b2d2
[  192.196239] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  192.196301] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  192.196364] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  192.196434] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000006fb5b2d2
[  192.196500] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006fb5b2d2
[  192.196562] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  192.196625] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  192.196689] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  192.196751] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  192.196813] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006fb5b2d2
[  192.198312] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  192.201827] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11109, diff=1, hw=0 hw_last=0
[  192.218404] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11110, diff=1, hw=0 hw_last=0
[  192.234984] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11111, diff=1, hw=0 hw_last=0
[  192.251564] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11112, diff=1, hw=0 hw_last=0
[  192.268145] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11113, diff=1, hw=0 hw_last=0
[  192.284724] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11114, diff=1, hw=0 hw_last=0
[  192.301307] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11115, diff=1, hw=0 hw_last=0
[  192.317883] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11116, diff=1, hw=0 hw_last=0
[  192.334465] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11117, diff=1, hw=0 hw_last=0
[  192.351042] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11118, diff=1, hw=0 hw_last=0
[  192.367621] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11119, diff=1, hw=0 hw_last=0
[  192.384197] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11120, diff=1, hw=0 hw_last=0
[  192.400776] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11121, diff=1, hw=0 hw_last=0
[  192.417357] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11122, diff=1, hw=0 hw_last=0
[  192.426352] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  192.426463] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006fb5b2d2
[  192.426538] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  192.426600] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000055579822 state to 000000006fb5b2d2
[  192.426666] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  192.426728] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 000000006fb5b2d2
[  192.426797] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 0000000055579822
[  192.426860] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  192.426920] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  192.426980] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  192.427040] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  192.427103] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  192.427164] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  192.427228] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  192.427289] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  192.427349] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000006fb5b2d2
[  192.427412] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  192.427513] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000006fb5b2d2
[  192.427590] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  192.427636] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  192.427981] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  192.428065] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  192.433932] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11123, diff=1, hw=0 hw_last=0
[  192.434023] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006fb5b2d2
[  192.434107] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  192.434180] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  192.434253] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  192.434326] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  192.434399] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006fb5b2d2
[  192.450512] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11124, diff=1, hw=0 hw_last=0
[  192.467090] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11125, diff=1, hw=0 hw_last=0
[  192.483669] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11126, diff=1, hw=0 hw_last=0
[  192.500248] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11127, diff=1, hw=0 hw_last=0
[  192.516826] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11128, diff=1, hw=0 hw_last=0
[  192.533408] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11129, diff=1, hw=0 hw_last=0
[  192.549987] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11130, diff=1, hw=0 hw_last=0
[  192.566565] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11131, diff=1, hw=0 hw_last=0
[  192.583147] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11132, diff=1, hw=0 hw_last=0
[  192.599725] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11133, diff=1, hw=0 hw_last=0
[  192.616301] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11134, diff=1, hw=0 hw_last=0
[  192.632885] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11135, diff=1, hw=0 hw_last=0
[  192.649460] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11136, diff=1, hw=0 hw_last=0
[  192.666038] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11137, diff=1, hw=0 hw_last=0
[  192.682618] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11138, diff=1, hw=0 hw_last=0
[  192.699197] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11139, diff=1, hw=0 hw_last=0
[  192.715776] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11140, diff=1, hw=0 hw_last=0
[  192.732355] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11141, diff=1, hw=0 hw_last=0
[  192.748939] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11142, diff=1, hw=0 hw_last=0
[  192.765515] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11143, diff=1, hw=0 hw_last=0
[  192.782095] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11144, diff=1, hw=0 hw_last=0
[  192.798673] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11145, diff=1, hw=0 hw_last=0
[  192.815253] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11146, diff=1, hw=0 hw_last=0
[  192.831832] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11147, diff=1, hw=0 hw_last=0
[  192.848411] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11148, diff=1, hw=0 hw_last=0
[  192.864989] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11149, diff=1, hw=0 hw_last=0
[  192.881570] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11150, diff=1, hw=0 hw_last=0
[  192.898148] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11151, diff=1, hw=0 hw_last=0
[  192.914727] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11152, diff=1, hw=0 hw_last=0
[  192.931306] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11153, diff=1, hw=0 hw_last=0
[  192.947886] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11154, diff=1, hw=0 hw_last=0
[  192.964466] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11155, diff=1, hw=0 hw_last=0
[  192.981046] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11156, diff=1, hw=0 hw_last=0
[  192.997623] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11157, diff=1, hw=0 hw_last=0
[  193.014202] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11158, diff=1, hw=0 hw_last=0
[  193.030782] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11159, diff=1, hw=0 hw_last=0
[  193.047361] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11160, diff=1, hw=0 hw_last=0
[  193.063942] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11161, diff=1, hw=0 hw_last=0
[  193.080519] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11162, diff=1, hw=0 hw_last=0
[  193.097097] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11163, diff=1, hw=0 hw_last=0
[  193.113677] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11164, diff=1, hw=0 hw_last=0
[  193.130256] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11165, diff=1, hw=0 hw_last=0
[  193.146836] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11166, diff=1, hw=0 hw_last=0
[  193.163417] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11167, diff=1, hw=0 hw_last=0
[  193.179994] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11168, diff=1, hw=0 hw_last=0
[  193.196573] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11169, diff=1, hw=0 hw_last=0
[  193.213155] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11170, diff=1, hw=0 hw_last=0
[  193.226700] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  193.226813] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 11171 to client
[  193.229738] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11171, diff=1, hw=0 hw_last=0
[  193.239070] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  193.239156] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000ace560b
[  193.478424] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11186, diff=1, hw=0 hw_last=0
[  193.478528] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000ace560b
[  193.478597] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  193.478661] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  193.478724] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  193.478788] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  193.478851] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000ace560b
[  193.495003] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11187, diff=1, hw=0 hw_last=0
[  193.511578] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11188, diff=1, hw=0 hw_last=0
[  193.528157] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11189, diff=1, hw=0 hw_last=0
[  193.544738] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11190, diff=1, hw=0 hw_last=0
[  193.561316] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11191, diff=1, hw=0 hw_last=0
[  193.577901] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11192, diff=1, hw=0 hw_last=0
[  193.594475] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11193, diff=1, hw=0 hw_last=0
[  193.611054] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11194, diff=1, hw=0 hw_last=0
[  193.627639] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11195, diff=1, hw=0 hw_last=0
[  193.644213] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11196, diff=1, hw=0 hw_last=0
[  193.660793] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11197, diff=1, hw=0 hw_last=0
[  193.677370] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11198, diff=1, hw=0 hw_last=0
[  193.693950] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11199, diff=1, hw=0 hw_last=0
[  193.710528] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11200, diff=1, hw=0 hw_last=0
[  193.727107] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11201, diff=1, hw=0 hw_last=0
[  193.743686] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11202, diff=1, hw=0 hw_last=0
[  193.760266] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11203, diff=1, hw=0 hw_last=0
[  193.776848] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11204, diff=1, hw=0 hw_last=0
[  193.793427] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11205, diff=1, hw=0 hw_last=0
[  193.810004] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11206, diff=1, hw=0 hw_last=0
[  193.826587] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11207, diff=1, hw=0 hw_last=0
[  193.843164] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11208, diff=1, hw=0 hw_last=0
[  193.859743] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11209, diff=1, hw=0 hw_last=0
[  193.876322] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11210, diff=1, hw=0 hw_last=0
[  193.892899] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11211, diff=1, hw=0 hw_last=0
[  193.909479] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11212, diff=1, hw=0 hw_last=0
[  193.926059] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11213, diff=1, hw=0 hw_last=0
[  193.942638] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11214, diff=1, hw=0 hw_last=0
[  193.959221] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11215, diff=1, hw=0 hw_last=0
[  193.975796] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11216, diff=1, hw=0 hw_last=0
[  193.992375] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11217, diff=1, hw=0 hw_last=0
[  194.008955] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11218, diff=1, hw=0 hw_last=0
[  194.025534] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11219, diff=1, hw=0 hw_last=0
[  194.042117] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11220, diff=1, hw=0 hw_last=0
[  194.058693] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11221, diff=1, hw=0 hw_last=0
[  194.075274] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11222, diff=1, hw=0 hw_last=0
[  194.091852] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11223, diff=1, hw=0 hw_last=0
[  194.108431] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11224, diff=1, hw=0 hw_last=0
[  194.125010] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11225, diff=1, hw=0 hw_last=0
[  194.141589] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11226, diff=1, hw=0 hw_last=0
[  194.158167] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11227, diff=1, hw=0 hw_last=0
[  194.174749] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11228, diff=1, hw=0 hw_last=0
[  194.191325] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11229, diff=1, hw=0 hw_last=0
[  194.207904] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11230, diff=1, hw=0 hw_last=0
[  194.224484] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11231, diff=1, hw=0 hw_last=0
[  194.241063] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11232, diff=1, hw=0 hw_last=0
[  194.257642] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11233, diff=1, hw=0 hw_last=0
[  194.274227] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11234, diff=1, hw=0 hw_last=0
[  194.279052] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  194.279165] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 11235 to client
[  194.283435] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  194.283544] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000082174610
[  194.283618] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  194.283680] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000ec98bd42 state to 0000000082174610
[  194.283746] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  194.283808] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a743c9a8 state to 0000000082174610
[  194.284626] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  194.284670] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  194.284701] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000082174610
[  194.284768] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000008a640c91 to 0000000082174610
[  194.284832] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000082174610
[  194.284900] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  194.284962] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  194.285024] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  194.285093] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 0000000082174610
[  194.285157] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000082174610
[  194.285219] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  194.285279] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  194.285340] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  194.285401] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  194.285463] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000082174610
[  194.286813] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  194.290810] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11235, diff=1, hw=0 hw_last=0
[  194.307387] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11236, diff=1, hw=0 hw_last=0
[  194.323964] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11237, diff=1, hw=0 hw_last=0
[  194.340543] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11238, diff=1, hw=0 hw_last=0
[  194.357123] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11239, diff=1, hw=0 hw_last=0
[  194.373703] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11240, diff=1, hw=0 hw_last=0
[  194.390283] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11241, diff=1, hw=0 hw_last=0
[  194.406862] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11242, diff=1, hw=0 hw_last=0
[  194.423441] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11243, diff=1, hw=0 hw_last=0
[  194.440023] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11244, diff=1, hw=0 hw_last=0
[  194.456599] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11245, diff=1, hw=0 hw_last=0
[  194.473180] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11246, diff=1, hw=0 hw_last=0
[  194.489756] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11247, diff=1, hw=0 hw_last=0
[  194.506337] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11248, diff=1, hw=0 hw_last=0
[  194.514262] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  194.514368] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000082174610
[  194.514445] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  194.514509] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000ec98bd42 state to 0000000082174610
[  194.514575] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  194.514636] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a743c9a8 state to 0000000082174610
[  194.514705] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000ec98bd42
[  194.514768] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  194.514829] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  194.514889] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  194.514949] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  194.515011] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  194.515072] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  194.515136] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  194.515196] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  194.515256] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 0000000082174610
[  194.515319] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  194.515381] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000082174610
[  194.515490] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  194.515544] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  194.515578] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000082174610
[  194.515656] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000eae20a14 to 0000000082174610
[  194.515722] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000082174610
[  194.515802] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000082174610 nonblocking
[  194.515903] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  194.515987] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  194.522912] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11249, diff=1, hw=0 hw_last=0
[  194.523020] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000082174610
[  194.523095] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  194.523159] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  194.523221] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  194.523284] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  194.523347] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000082174610
[  194.539493] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11250, diff=1, hw=0 hw_last=0
[  194.556071] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11251, diff=1, hw=0 hw_last=0
[  194.572649] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11252, diff=1, hw=0 hw_last=0
[  194.589228] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11253, diff=1, hw=0 hw_last=0
[  194.605809] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11254, diff=1, hw=0 hw_last=0
[  194.622391] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11255, diff=1, hw=0 hw_last=0
[  194.638967] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11256, diff=1, hw=0 hw_last=0
[  194.738439] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11262, diff=1, hw=0 hw_last=0
[  194.755018] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11263, diff=1, hw=0 hw_last=0
[  194.771597] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11264, diff=1, hw=0 hw_last=0
[  194.788177] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11265, diff=1, hw=0 hw_last=0
[  194.804755] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11266, diff=1, hw=0 hw_last=0
[  194.821335] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11267, diff=1, hw=0 hw_last=0
[  194.837921] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11268, diff=1, hw=0 hw_last=0
[  194.854498] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11269, diff=1, hw=0 hw_last=0
[  194.871078] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11270, diff=1, hw=0 hw_last=0
[  194.887657] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11271, diff=1, hw=0 hw_last=0
[  194.904235] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11272, diff=1, hw=0 hw_last=0
[  194.920810] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11273, diff=1, hw=0 hw_last=0
[  194.937389] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11274, diff=1, hw=0 hw_last=0
[  194.953970] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11275, diff=1, hw=0 hw_last=0
[  194.970548] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11276, diff=1, hw=0 hw_last=0
[  194.987130] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11277, diff=1, hw=0 hw_last=0
[  195.003707] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11278, diff=1, hw=0 hw_last=0
[  195.020287] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11279, diff=1, hw=0 hw_last=0
[  195.036866] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11280, diff=1, hw=0 hw_last=0
[  195.053447] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11281, diff=1, hw=0 hw_last=0
[  195.070024] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11282, diff=1, hw=0 hw_last=0
[  195.086606] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11283, diff=1, hw=0 hw_last=0
[  195.103188] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11284, diff=1, hw=0 hw_last=0
[  195.119764] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11285, diff=1, hw=0 hw_last=0
[  195.136344] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11286, diff=1, hw=0 hw_last=0
[  195.152921] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11287, diff=1, hw=0 hw_last=0
[  195.169500] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11288, diff=1, hw=0 hw_last=0
[  195.186081] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11289, diff=1, hw=0 hw_last=0
[  195.202660] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11290, diff=1, hw=0 hw_last=0
[  195.219238] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11291, diff=1, hw=0 hw_last=0
[  195.235815] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11292, diff=1, hw=0 hw_last=0
[  195.252395] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11293, diff=1, hw=0 hw_last=0
[  195.268975] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11294, diff=1, hw=0 hw_last=0
[  195.285559] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11295, diff=1, hw=0 hw_last=0
[  195.302133] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11296, diff=1, hw=0 hw_last=0
[  195.318715] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11297, diff=1, hw=0 hw_last=0
[  195.331947] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  195.332060] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 11298 to client
[  195.335299] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11298, diff=1, hw=0 hw_last=0
[  195.344317] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  195.344406] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000001477df7c
[  195.344478] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  195.344540] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000215b6887 state to 000000001477df7c
[  195.344607] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  195.344668] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 000000001477df7c
[  195.344737] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000215b6887
[  195.344799] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  195.344859] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  195.344920] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  195.344980] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  195.345045] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  195.345106] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  195.345169] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  195.345230] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  195.345291] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000001477df7c
[  195.345355] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  195.345416] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000001477df7c
[  195.345486] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  195.345531] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  195.345563] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000001477df7c
[  195.345633] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000082174610 to 000000001477df7c
[  195.345696] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000001477df7c
[  195.345766] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  195.345827] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  195.345889] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  195.345959] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000001477df7c
[  195.577287] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  195.577319] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000001477df7c
[  195.577388] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000008a640c91 to 000000001477df7c
[  195.577451] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000001477df7c
[  195.577528] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000001477df7c nonblocking
[  195.577633] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  195.577712] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  195.583983] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11313, diff=1, hw=0 hw_last=0
[  195.584094] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000001477df7c
[  195.584165] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  195.584228] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  195.584311] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  195.584373] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  195.584436] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000001477df7c
[  195.600563] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11314, diff=1, hw=0 hw_last=0
[  195.617138] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11315, diff=1, hw=0 hw_last=0
[  195.633718] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11316, diff=1, hw=0 hw_last=0
[  195.650295] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11317, diff=1, hw=0 hw_last=0
[  195.666875] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11318, diff=1, hw=0 hw_last=0
[  195.683458] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11319, diff=1, hw=0 hw_last=0
[  195.700034] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11320, diff=1, hw=0 hw_last=0
[  195.716616] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11321, diff=1, hw=0 hw_last=0
[  195.717074] systemd-journald[214]: Data hash table of /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal has a fill level at 75.0 (2731 of 3640 items, 2097152 file size, 767 bytes per hash table item), suggesting rotation.
[  195.733193] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11322, diff=1, hw=0 hw_last=0
[  195.738447] systemd-journald[214]: /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal: Journal header limits reached or header out-of-date, rotating.
[  195.749770] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11323, diff=1, hw=0 hw_last=0
[  195.766350] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11324, diff=1, hw=0 hw_last=0
[  195.782928] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11325, diff=1, hw=0 hw_last=0
[  195.799508] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11326, diff=1, hw=0 hw_last=0
[  195.816099] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11327, diff=1, hw=0 hw_last=0
[  195.832675] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11328, diff=1, hw=0 hw_last=0
[  195.849247] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11329, diff=1, hw=0 hw_last=0
[  195.865827] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11330, diff=1, hw=0 hw_last=0
[  195.882406] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11331, diff=1, hw=0 hw_last=0
[  195.898986] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11332, diff=1, hw=0 hw_last=0
[  195.915563] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11333, diff=1, hw=0 hw_last=0
[  195.932142] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11334, diff=1, hw=0 hw_last=0
[  195.948722] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11335, diff=1, hw=0 hw_last=0
[  195.965301] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11336, diff=1, hw=0 hw_last=0
[  195.981879] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11337, diff=1, hw=0 hw_last=0
[  195.998465] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11338, diff=1, hw=0 hw_last=0
[  196.015037] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11339, diff=1, hw=0 hw_last=0
[  196.031618] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11340, diff=1, hw=0 hw_last=0
[  196.048197] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11341, diff=1, hw=0 hw_last=0
[  196.064776] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11342, diff=1, hw=0 hw_last=0
[  196.081355] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11343, diff=1, hw=0 hw_last=0
[  196.097935] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11344, diff=1, hw=0 hw_last=0
[  196.114514] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11345, diff=1, hw=0 hw_last=0
[  196.131096] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11346, diff=1, hw=0 hw_last=0
[  196.147672] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11347, diff=1, hw=0 hw_last=0
[  196.164251] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11348, diff=1, hw=0 hw_last=0
[  196.180830] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11349, diff=1, hw=0 hw_last=0
[  196.197409] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11350, diff=1, hw=0 hw_last=0
[  196.213989] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11351, diff=1, hw=0 hw_last=0
[  196.230570] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11352, diff=1, hw=0 hw_last=0
[  196.247146] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11353, diff=1, hw=0 hw_last=0
[  196.263727] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11354, diff=1, hw=0 hw_last=0
[  196.280304] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11355, diff=1, hw=0 hw_last=0
[  196.296885] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11356, diff=1, hw=0 hw_last=0
[  196.313467] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11357, diff=1, hw=0 hw_last=0
[  196.330045] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11358, diff=1, hw=0 hw_last=0
[  196.346622] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11359, diff=1, hw=0 hw_last=0
[  196.363201] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11360, diff=1, hw=0 hw_last=0
[  196.379783] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11361, diff=1, hw=0 hw_last=0
[  196.396359] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11362, diff=1, hw=0 hw_last=0
[  196.412953] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11363, diff=1, hw=0 hw_last=0
[  196.413395] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  196.413494] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 11364 to client
[  196.421761] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  196.421852] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000029aaf162
[  196.421924] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  196.421985] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000bac3ec2d state to 0000000029aaf162
[  196.422051] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  196.422111] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 0000000029aaf162
[  196.422179] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000bac3ec2d
[  196.422242] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  196.422301] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  196.422361] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  196.422420] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  196.422484] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  196.422544] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  196.422608] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  196.422668] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  196.422728] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 0000000029aaf162
[  196.422791] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  196.422851] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000029aaf162
[  196.422920] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  196.422967] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  196.422998] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000029aaf162
[  196.423067] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000000ace560b to 0000000029aaf162
[  196.423129] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000029aaf162
[  196.423194] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  196.423256] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  196.423318] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  196.423387] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 0000000029aaf162
[  196.423470] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000029aaf162
[  196.423534] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  196.423597] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  196.423660] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  196.423723] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  196.423785] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000029aaf162
[  196.425223] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  196.429528] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11364, diff=1, hw=0 hw_last=0
[  196.446102] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11365, diff=1, hw=0 hw_last=0
[  196.462681] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11366, diff=1, hw=0 hw_last=0
[  196.479259] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11367, diff=1, hw=0 hw_last=0
[  196.495841] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11368, diff=1, hw=0 hw_last=0
[  196.512420] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11369, diff=1, hw=0 hw_last=0
[  196.528999] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11370, diff=1, hw=0 hw_last=0
[  196.545577] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11371, diff=1, hw=0 hw_last=0
[  196.562161] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11372, diff=1, hw=0 hw_last=0
[  196.578738] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11373, diff=1, hw=0 hw_last=0
[  196.595317] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11374, diff=1, hw=0 hw_last=0
[  196.611895] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11375, diff=1, hw=0 hw_last=0
[  196.628472] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11376, diff=1, hw=0 hw_last=0
[  196.645058] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11377, diff=1, hw=0 hw_last=0
[  196.645070] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  196.645169] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000029aaf162
[  196.645250] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  196.645316] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000bac3ec2d state to 0000000029aaf162
[  196.645384] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  196.645446] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 0000000029aaf162
[  196.645516] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000bac3ec2d
[  196.645580] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  196.645640] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  196.645701] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  196.645763] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  196.645827] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  196.645889] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  196.645953] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  196.646014] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  196.646075] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 0000000029aaf162
[  196.646139] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  196.646201] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000029aaf162
[  196.646274] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  196.646327] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  196.694785] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11380, diff=1, hw=0 hw_last=0
[  196.711365] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11381, diff=1, hw=0 hw_last=0
[  196.727945] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11382, diff=1, hw=0 hw_last=0
[  196.744524] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11383, diff=1, hw=0 hw_last=0
[  196.761104] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11384, diff=1, hw=0 hw_last=0
[  196.777683] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11385, diff=1, hw=0 hw_last=0
[  196.794261] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11386, diff=1, hw=0 hw_last=0
[  196.810842] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11387, diff=1, hw=0 hw_last=0
[  196.827419] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11388, diff=1, hw=0 hw_last=0
[  196.843997] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11389, diff=1, hw=0 hw_last=0
[  196.860576] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11390, diff=1, hw=0 hw_last=0
[  196.877155] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11391, diff=1, hw=0 hw_last=0
[  196.893734] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11392, diff=1, hw=0 hw_last=0
[  196.910315] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11393, diff=1, hw=0 hw_last=0
[  196.926892] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11394, diff=1, hw=0 hw_last=0
[  196.943472] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11395, diff=1, hw=0 hw_last=0
[  196.960055] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11396, diff=1, hw=0 hw_last=0
[  196.976632] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11397, diff=1, hw=0 hw_last=0
[  196.993212] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11398, diff=1, hw=0 hw_last=0
[  197.009790] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11399, diff=1, hw=0 hw_last=0
[  197.026368] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11400, diff=1, hw=0 hw_last=0
[  197.042949] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11401, diff=1, hw=0 hw_last=0
[  197.059527] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11402, diff=1, hw=0 hw_last=0
[  197.076106] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11403, diff=1, hw=0 hw_last=0
[  197.092686] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11404, diff=1, hw=0 hw_last=0
[  197.109264] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11405, diff=1, hw=0 hw_last=0
[  197.125844] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11406, diff=1, hw=0 hw_last=0
[  197.142423] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11407, diff=1, hw=0 hw_last=0
[  197.159005] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11408, diff=1, hw=0 hw_last=0
[  197.175581] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11409, diff=1, hw=0 hw_last=0
[  197.192162] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11410, diff=1, hw=0 hw_last=0
[  197.208741] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11411, diff=1, hw=0 hw_last=0
[  197.225320] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11412, diff=1, hw=0 hw_last=0
[  197.241899] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11413, diff=1, hw=0 hw_last=0
[  197.258480] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11414, diff=1, hw=0 hw_last=0
[  197.275057] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11415, diff=1, hw=0 hw_last=0
[  197.291637] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11416, diff=1, hw=0 hw_last=0
[  197.308216] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11417, diff=1, hw=0 hw_last=0
[  197.324798] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11418, diff=1, hw=0 hw_last=0
[  197.341374] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11419, diff=1, hw=0 hw_last=0
[  197.357953] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11420, diff=1, hw=0 hw_last=0
[  197.374532] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11421, diff=1, hw=0 hw_last=0
[  197.391112] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11422, diff=1, hw=0 hw_last=0
[  197.407693] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11423, diff=1, hw=0 hw_last=0
[  197.424269] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11424, diff=1, hw=0 hw_last=0
[  197.440849] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11425, diff=1, hw=0 hw_last=0
[  197.457428] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11426, diff=1, hw=0 hw_last=0
[  197.474009] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11427, diff=1, hw=0 hw_last=0
[  197.490586] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11428, diff=1, hw=0 hw_last=0
[  197.506414] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  197.506525] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 11429 to client
[  197.507172] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11429, diff=1, hw=0 hw_last=0
[  197.516785] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  197.516879] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000c0cf118d
[  197.516952] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  197.517014] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000082b4fa6a state to 00000000c0cf118d
[  197.517080] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  197.517140] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 00000000c0cf118d
[  197.517207] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 0000000082b4fa6a
[  197.517270] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  197.755857] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11444, diff=1, hw=0 hw_last=0
[  197.755964] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000c0cf118d
[  197.756034] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  197.756098] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  197.756159] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  197.756222] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  197.756286] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000c0cf118d
[  197.772435] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11445, diff=1, hw=0 hw_last=0
[  197.789012] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11446, diff=1, hw=0 hw_last=0
[  197.805592] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11447, diff=1, hw=0 hw_last=0
[  197.822171] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11448, diff=1, hw=0 hw_last=0
[  197.838750] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11449, diff=1, hw=0 hw_last=0
[  197.855331] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11450, diff=1, hw=0 hw_last=0
[  197.871909] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11451, diff=1, hw=0 hw_last=0
[  197.888490] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11452, diff=1, hw=0 hw_last=0
[  197.905070] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11453, diff=1, hw=0 hw_last=0
[  197.921649] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11454, diff=1, hw=0 hw_last=0
[  197.938224] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11455, diff=1, hw=0 hw_last=0
[  197.954803] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11456, diff=1, hw=0 hw_last=0
[  197.971383] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11457, diff=1, hw=0 hw_last=0
[  197.987962] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11458, diff=1, hw=0 hw_last=0
[  198.004541] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11459, diff=1, hw=0 hw_last=0
[  198.021120] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11460, diff=1, hw=0 hw_last=0
[  198.037699] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11461, diff=1, hw=0 hw_last=0
[  198.054282] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11462, diff=1, hw=0 hw_last=0
[  198.070858] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11463, diff=1, hw=0 hw_last=0
[  198.087442] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11464, diff=1, hw=0 hw_last=0
[  198.104018] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11465, diff=1, hw=0 hw_last=0
[  198.120596] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11466, diff=1, hw=0 hw_last=0
[  198.137175] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11467, diff=1, hw=0 hw_last=0
[  198.153754] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11468, diff=1, hw=0 hw_last=0
[  198.170335] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11469, diff=1, hw=0 hw_last=0
[  198.186914] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11470, diff=1, hw=0 hw_last=0
[  198.203492] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11471, diff=1, hw=0 hw_last=0
[  198.220071] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11472, diff=1, hw=0 hw_last=0
[  198.236649] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11473, diff=1, hw=0 hw_last=0
[  198.253228] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11474, diff=1, hw=0 hw_last=0
[  198.269809] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11475, diff=1, hw=0 hw_last=0
[  198.286388] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11476, diff=1, hw=0 hw_last=0
[  198.302968] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11477, diff=1, hw=0 hw_last=0
[  198.319553] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11478, diff=1, hw=0 hw_last=0
[  198.336127] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11479, diff=1, hw=0 hw_last=0
[  198.352706] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11480, diff=1, hw=0 hw_last=0
[  198.369284] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11481, diff=1, hw=0 hw_last=0
[  198.385865] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11482, diff=1, hw=0 hw_last=0
[  198.402443] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11483, diff=1, hw=0 hw_last=0
[  198.419021] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11484, diff=1, hw=0 hw_last=0
[  198.435603] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11485, diff=1, hw=0 hw_last=0
[  198.452181] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11486, diff=1, hw=0 hw_last=0
[  198.468760] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11487, diff=1, hw=0 hw_last=0
[  198.485338] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11488, diff=1, hw=0 hw_last=0
[  198.501918] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11489, diff=1, hw=0 hw_last=0
[  198.518497] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11490, diff=1, hw=0 hw_last=0
[  198.535077] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11491, diff=1, hw=0 hw_last=0
[  198.551657] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11492, diff=1, hw=0 hw_last=0
[  198.568235] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11493, diff=1, hw=0 hw_last=0
[  198.584813] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11494, diff=1, hw=0 hw_last=0
[  198.601395] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11495, diff=1, hw=0 hw_last=0
[  198.617973] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11496, diff=1, hw=0 hw_last=0
[  198.634551] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11497, diff=1, hw=0 hw_last=0
[  198.651139] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11498, diff=1, hw=0 hw_last=0
[  198.661222] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  198.661282] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  198.661343] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  198.661407] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  198.661468] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  198.661532] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  198.661593] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  198.661653] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 00000000ab379aee
[  198.661716] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  198.661778] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000ab379aee
[  198.661849] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  198.661893] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  198.661924] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000ab379aee
[  198.661992] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000c0cf118d to 00000000ab379aee
[  198.662056] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000ab379aee
[  198.662122] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  198.662184] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  198.662246] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  198.662315] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 00000000ab379aee
[  198.662380] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ab379aee
[  198.662441] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  198.662503] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  198.662564] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  198.662625] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  198.662686] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ab379aee
[  198.664129] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  198.667724] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11499, diff=1, hw=0 hw_last=0
[  198.684298] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11500, diff=1, hw=0 hw_last=0
[  198.700873] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11501, diff=1, hw=0 hw_last=0
[  198.717451] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11502, diff=1, hw=0 hw_last=0
[  198.734034] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11503, diff=1, hw=0 hw_last=0
[  198.750612] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11504, diff=1, hw=0 hw_last=0
[  198.767189] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11505, diff=1, hw=0 hw_last=0
[  198.783774] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11506, diff=1, hw=0 hw_last=0
[  198.800351] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11507, diff=1, hw=0 hw_last=0
[  198.816931] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11508, diff=1, hw=0 hw_last=0
[  198.833508] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11509, diff=1, hw=0 hw_last=0
[  198.850088] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11510, diff=1, hw=0 hw_last=0
[  198.866664] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11511, diff=1, hw=0 hw_last=0
[  198.883245] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11512, diff=1, hw=0 hw_last=0
[  198.891789] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  198.891893] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000ab379aee
[  198.891969] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  198.892032] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000fefb5c61 state to 00000000ab379aee
[  198.892100] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  198.892162] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000e8543c49 state to 00000000ab379aee
[  198.892231] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000fefb5c61
[  198.892294] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  198.892355] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  198.892415] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  198.892475] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  198.892540] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  198.892601] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  198.892665] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  198.892726] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  198.892786] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 00000000ab379aee
[  198.892850] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  198.892912] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000ab379aee
[  198.892983] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  198.893029] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  198.893060] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000ab379aee
[  198.893129] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000006fb5b2d2 to 00000000ab379aee
[  198.893192] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000ab379aee
[  198.893269] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000ab379aee nonblocking
[  198.893378] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  198.893460] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  198.899820] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11513, diff=1, hw=0 hw_last=0
[  198.899932] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ab379aee
[  198.900002] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  198.900065] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  198.900127] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  198.900192] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  198.900257] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ab379aee
[  198.916402] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11514, diff=1, hw=0 hw_last=0
[  198.932979] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11515, diff=1, hw=0 hw_last=0
[  199.115347] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11526, diff=1, hw=0 hw_last=0
[  199.131926] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11527, diff=1, hw=0 hw_last=0
[  199.148506] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11528, diff=1, hw=0 hw_last=0
[  199.165085] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11529, diff=1, hw=0 hw_last=0
[  199.181664] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11530, diff=1, hw=0 hw_last=0
[  199.198249] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11531, diff=1, hw=0 hw_last=0
[  199.214825] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11532, diff=1, hw=0 hw_last=0
[  199.231405] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11533, diff=1, hw=0 hw_last=0
[  199.247983] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11534, diff=1, hw=0 hw_last=0
[  199.264562] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11535, diff=1, hw=0 hw_last=0
[  199.281141] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11536, diff=1, hw=0 hw_last=0
[  199.297721] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11537, diff=1, hw=0 hw_last=0
[  199.314298] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11538, diff=1, hw=0 hw_last=0
[  199.330879] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11539, diff=1, hw=0 hw_last=0
[  199.347456] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11540, diff=1, hw=0 hw_last=0
[  199.364036] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11541, diff=1, hw=0 hw_last=0
[  199.380614] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11542, diff=1, hw=0 hw_last=0
[  199.397194] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11543, diff=1, hw=0 hw_last=0
[  199.413773] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11544, diff=1, hw=0 hw_last=0
[  199.430352] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11545, diff=1, hw=0 hw_last=0
[  199.446933] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11546, diff=1, hw=0 hw_last=0
[  199.463513] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11547, diff=1, hw=0 hw_last=0
[  199.480092] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11548, diff=1, hw=0 hw_last=0
[  199.496670] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11549, diff=1, hw=0 hw_last=0
[  199.513248] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11550, diff=1, hw=0 hw_last=0
[  199.529829] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11551, diff=1, hw=0 hw_last=0
[  199.546407] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11552, diff=1, hw=0 hw_last=0
[  199.562987] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11553, diff=1, hw=0 hw_last=0
[  199.579567] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11554, diff=1, hw=0 hw_last=0
[  199.596145] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11555, diff=1, hw=0 hw_last=0
[  199.612724] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11556, diff=1, hw=0 hw_last=0
[  199.629303] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11557, diff=1, hw=0 hw_last=0
[  199.645885] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11558, diff=1, hw=0 hw_last=0
[  199.662465] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11559, diff=1, hw=0 hw_last=0
[  199.679043] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11560, diff=1, hw=0 hw_last=0
[  199.695622] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11561, diff=1, hw=0 hw_last=0
[  199.712201] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11562, diff=1, hw=0 hw_last=0
[  199.728778] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11563, diff=1, hw=0 hw_last=0
[  199.745359] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11564, diff=1, hw=0 hw_last=0
[  199.761937] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11565, diff=1, hw=0 hw_last=0
[  199.778516] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11566, diff=1, hw=0 hw_last=0
[  199.795103] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11567, diff=1, hw=0 hw_last=0
[  199.796175] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  199.796286] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 11568 to client
[  199.804547] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  199.804651] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000fde3661d
[  199.804735] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  199.804808] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000055579822 state to 00000000fde3661d
[  199.804885] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  199.804958] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 00000000fde3661d
[  199.805037] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 0000000055579822
[  199.805112] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  199.805183] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  199.805254] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  199.805325] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  199.805401] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  199.805472] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  199.805547] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  199.805618] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  199.805690] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 00000000fde3661d
[  199.805764] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  199.805837] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000fde3661d
[  199.805919] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  199.805969] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  199.806005] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000fde3661d
[  200.041014] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  200.041085] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  200.041161] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  200.041232] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  200.041303] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 00000000fde3661d
[  200.041379] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  200.041452] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000fde3661d
[  200.041534] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  200.041584] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  200.041620] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000fde3661d
[  200.041699] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000000ace560b to 00000000fde3661d
[  200.041772] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000fde3661d
[  200.041860] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000fde3661d nonblocking
[  200.041983] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  200.042075] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  200.043786] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11582, diff=1, hw=0 hw_last=0
[  200.043881] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000fde3661d
[  200.043963] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  200.044040] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  200.044115] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  200.044190] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  200.044265] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000fde3661d
[  200.060365] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11583, diff=1, hw=0 hw_last=0
[  200.076945] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11584, diff=1, hw=0 hw_last=0
[  200.093523] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11585, diff=1, hw=0 hw_last=0
[  200.110102] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11586, diff=1, hw=0 hw_last=0
[  200.126681] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11587, diff=1, hw=0 hw_last=0
[  200.143262] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11588, diff=1, hw=0 hw_last=0
[  200.159839] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11589, diff=1, hw=0 hw_last=0
[  200.176420] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11590, diff=1, hw=0 hw_last=0
[  200.193000] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11591, diff=1, hw=0 hw_last=0
[  200.209582] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11592, diff=1, hw=0 hw_last=0
[  200.226154] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11593, diff=1, hw=0 hw_last=0
[  200.242734] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11594, diff=1, hw=0 hw_last=0
[  200.259312] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11595, diff=1, hw=0 hw_last=0
[  200.275891] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11596, diff=1, hw=0 hw_last=0
[  200.292471] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11597, diff=1, hw=0 hw_last=0
[  200.309050] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11598, diff=1, hw=0 hw_last=0
[  200.325631] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11599, diff=1, hw=0 hw_last=0
[  200.342209] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11600, diff=1, hw=0 hw_last=0
[  200.358792] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11601, diff=1, hw=0 hw_last=0
[  200.375369] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11602, diff=1, hw=0 hw_last=0
[  200.391947] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11603, diff=1, hw=0 hw_last=0
[  200.408526] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11604, diff=1, hw=0 hw_last=0
[  200.425105] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11605, diff=1, hw=0 hw_last=0
[  200.441684] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11606, diff=1, hw=0 hw_last=0
[  200.458264] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11607, diff=1, hw=0 hw_last=0
[  200.474843] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11608, diff=1, hw=0 hw_last=0
[  200.491423] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11609, diff=1, hw=0 hw_last=0
[  200.508001] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11610, diff=1, hw=0 hw_last=0
[  200.524580] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11611, diff=1, hw=0 hw_last=0
[  200.541161] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11612, diff=1, hw=0 hw_last=0
[  200.557738] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11613, diff=1, hw=0 hw_last=0
[  200.574318] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11614, diff=1, hw=0 hw_last=0
[  200.590897] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11615, diff=1, hw=0 hw_last=0
[  200.607480] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11616, diff=1, hw=0 hw_last=0
[  200.624060] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11617, diff=1, hw=0 hw_last=0
[  200.640638] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11618, diff=1, hw=0 hw_last=0
[  200.657218] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11619, diff=1, hw=0 hw_last=0
[  200.673797] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11620, diff=1, hw=0 hw_last=0
[  200.690374] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11621, diff=1, hw=0 hw_last=0
[  200.706952] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11622, diff=1, hw=0 hw_last=0
[  200.723532] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11623, diff=1, hw=0 hw_last=0
[  200.740110] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11624, diff=1, hw=0 hw_last=0
[  200.889328] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11633, diff=1, hw=0 hw_last=0
[  200.905907] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11634, diff=1, hw=0 hw_last=0
[  200.922483] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11635, diff=1, hw=0 hw_last=0
[  200.939066] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11636, diff=1, hw=0 hw_last=0
[  200.952802] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  200.952924] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 11637 to client
[  200.955650] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11637, diff=1, hw=0 hw_last=0
[  200.965202] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  200.965296] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000095dd8ec0
[  200.965380] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  200.965453] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000002cafbe1b state to 0000000095dd8ec0
[  200.965529] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  200.965601] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000adb7ad91 state to 0000000095dd8ec0
[  200.965682] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 000000002cafbe1b
[  200.965756] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  200.965827] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  200.965899] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  200.965970] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  200.966045] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  200.966116] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  200.966192] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  200.966263] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  200.966335] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 0000000095dd8ec0
[  200.966409] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  200.966482] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000095dd8ec0
[  200.966564] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  200.966612] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  200.966648] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000095dd8ec0
[  200.966727] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000001477df7c to 0000000095dd8ec0
[  200.966801] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000095dd8ec0
[  200.966880] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  200.966953] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  200.967026] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  200.967108] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 0000000095dd8ec0
[  200.967184] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000095dd8ec0
[  200.967256] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  200.967328] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  200.967400] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  200.967489] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  200.967565] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000095dd8ec0
[  200.969090] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  200.972225] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11638, diff=1, hw=0 hw_last=0
[  200.988804] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11639, diff=1, hw=0 hw_last=0
[  201.005385] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11640, diff=1, hw=0 hw_last=0
[  201.021963] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11641, diff=1, hw=0 hw_last=0
[  201.038544] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11642, diff=1, hw=0 hw_last=0
[  201.055135] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11643, diff=1, hw=0 hw_last=0
[  201.071703] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11644, diff=1, hw=0 hw_last=0
[  201.088282] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11645, diff=1, hw=0 hw_last=0
[  201.104862] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11646, diff=1, hw=0 hw_last=0
[  201.121440] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11647, diff=1, hw=0 hw_last=0
[  201.138019] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11648, diff=1, hw=0 hw_last=0
[  201.154599] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11649, diff=1, hw=0 hw_last=0
[  201.171177] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11650, diff=1, hw=0 hw_last=0
[  201.187752] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11651, diff=1, hw=0 hw_last=0
[  201.189193] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  201.189301] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000095dd8ec0
[  201.189387] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  201.189463] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000002cafbe1b state to 0000000095dd8ec0
[  201.189541] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  201.189613] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000adb7ad91 state to 0000000095dd8ec0
[  201.189694] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 000000002cafbe1b
[  201.189769] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  201.189841] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  201.189912] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  201.189984] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  201.190059] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  201.190131] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  201.190207] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  201.190279] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  201.190351] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 0000000095dd8ec0
[  201.190427] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  201.190500] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000095dd8ec0
[  201.190584] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  201.190629] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  201.191028] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  201.191116] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  201.204331] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11652, diff=1, hw=0 hw_last=0
[  201.204428] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000095dd8ec0
[  201.204519] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  201.204595] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  201.204669] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  201.204742] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  201.204816] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000095dd8ec0
[  201.220909] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11653, diff=1, hw=0 hw_last=0
[  201.237489] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11654, diff=1, hw=0 hw_last=0
[  201.254068] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11655, diff=1, hw=0 hw_last=0
[  201.270648] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11656, diff=1, hw=0 hw_last=0
[  201.287227] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11657, diff=1, hw=0 hw_last=0
[  201.303809] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11658, diff=1, hw=0 hw_last=0
[  201.320386] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11659, diff=1, hw=0 hw_last=0
[  201.336965] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11660, diff=1, hw=0 hw_last=0
[  201.353548] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11661, diff=1, hw=0 hw_last=0
[  201.370126] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11662, diff=1, hw=0 hw_last=0
[  201.386700] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11663, diff=1, hw=0 hw_last=0
[  201.403278] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11664, diff=1, hw=0 hw_last=0
[  201.419858] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11665, diff=1, hw=0 hw_last=0
[  201.436436] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11666, diff=1, hw=0 hw_last=0
[  201.453015] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11667, diff=1, hw=0 hw_last=0
[  201.469594] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11668, diff=1, hw=0 hw_last=0
[  201.486174] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11669, diff=1, hw=0 hw_last=0
[  201.502753] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11670, diff=1, hw=0 hw_last=0
[  201.519337] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11671, diff=1, hw=0 hw_last=0
[  201.535917] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11672, diff=1, hw=0 hw_last=0
[  201.552493] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11673, diff=1, hw=0 hw_last=0
[  201.569071] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11674, diff=1, hw=0 hw_last=0
[  201.585650] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11675, diff=1, hw=0 hw_last=0
[  201.602229] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11676, diff=1, hw=0 hw_last=0
[  201.618810] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11677, diff=1, hw=0 hw_last=0
[  201.635391] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11678, diff=1, hw=0 hw_last=0
[  201.651971] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11679, diff=1, hw=0 hw_last=0
[  201.668551] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11680, diff=1, hw=0 hw_last=0
[  201.685126] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11681, diff=1, hw=0 hw_last=0
[  201.701708] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11682, diff=1, hw=0 hw_last=0
[  201.718285] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11683, diff=1, hw=0 hw_last=0
[  201.734865] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11684, diff=1, hw=0 hw_last=0
[  201.751445] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11685, diff=1, hw=0 hw_last=0
[  201.768026] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11686, diff=1, hw=0 hw_last=0
[  201.784604] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11687, diff=1, hw=0 hw_last=0
[  201.801184] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11688, diff=1, hw=0 hw_last=0
[  201.817762] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11689, diff=1, hw=0 hw_last=0
[  201.834342] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11690, diff=1, hw=0 hw_last=0
[  201.850920] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11691, diff=1, hw=0 hw_last=0
[  201.867500] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11692, diff=1, hw=0 hw_last=0
[  201.884078] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11693, diff=1, hw=0 hw_last=0
[  201.900656] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11694, diff=1, hw=0 hw_last=0
[  201.917237] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11695, diff=1, hw=0 hw_last=0
[  201.933814] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11696, diff=1, hw=0 hw_last=0
[  201.950395] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11697, diff=1, hw=0 hw_last=0
[  201.966972] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11698, diff=1, hw=0 hw_last=0
[  201.983552] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11699, diff=1, hw=0 hw_last=0
[  202.000131] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11700, diff=1, hw=0 hw_last=0
[  202.016715] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11701, diff=1, hw=0 hw_last=0
[  202.033293] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11702, diff=1, hw=0 hw_last=0
[  202.049872] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11703, diff=1, hw=0 hw_last=0
[  202.066453] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11704, diff=1, hw=0 hw_last=0
[  202.173277] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008e9f664b
[  202.173367] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  202.173445] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  202.173519] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  202.173593] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  202.173667] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008e9f664b
[  202.175101] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  202.182508] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11711, diff=1, hw=0 hw_last=0
[  202.199091] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11712, diff=1, hw=0 hw_last=0
[  202.215668] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11713, diff=1, hw=0 hw_last=0
[  202.232246] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11714, diff=1, hw=0 hw_last=0
[  202.248826] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11715, diff=1, hw=0 hw_last=0
[  202.265407] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11716, diff=1, hw=0 hw_last=0
[  202.281985] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11717, diff=1, hw=0 hw_last=0
[  202.298564] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11718, diff=1, hw=0 hw_last=0
[  202.315143] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11719, diff=1, hw=0 hw_last=0
[  202.331719] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11720, diff=1, hw=0 hw_last=0
[  202.348300] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11721, diff=1, hw=0 hw_last=0
[  202.364879] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11722, diff=1, hw=0 hw_last=0
[  202.381454] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11723, diff=1, hw=0 hw_last=0
[  202.395332] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  202.395478] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008e9f664b
[  202.395571] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  202.395649] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000ec98bd42 state to 000000008e9f664b
[  202.395730] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  202.395805] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 000000008e9f664b
[  202.395889] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000ec98bd42
[  202.395965] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  202.396041] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  202.396113] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  202.396185] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  202.396261] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  202.396333] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  202.396409] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  202.396481] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  202.396553] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000008e9f664b
[  202.396628] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  202.396702] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000008e9f664b
[  202.396785] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  202.396834] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  202.396871] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008e9f664b
[  202.396950] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000001477df7c to 000000008e9f664b
[  202.397025] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008e9f664b
[  202.397113] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000008e9f664b nonblocking
[  202.397226] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  202.397311] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  202.398034] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11724, diff=1, hw=0 hw_last=0
[  202.398122] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008e9f664b
[  202.398205] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  202.398282] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  202.398361] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  202.398437] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  202.398511] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008e9f664b
[  202.414614] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11725, diff=1, hw=0 hw_last=0
[  202.431191] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11726, diff=1, hw=0 hw_last=0
[  202.447772] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11727, diff=1, hw=0 hw_last=0
[  202.464352] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11728, diff=1, hw=0 hw_last=0
[  202.480928] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11729, diff=1, hw=0 hw_last=0
[  202.497510] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11730, diff=1, hw=0 hw_last=0
[  202.514091] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11731, diff=1, hw=0 hw_last=0
[  202.530671] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11732, diff=1, hw=0 hw_last=0
[  202.547244] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11733, diff=1, hw=0 hw_last=0
[  202.563822] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11734, diff=1, hw=0 hw_last=0
[  202.580402] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11735, diff=1, hw=0 hw_last=0
[  202.596981] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11736, diff=1, hw=0 hw_last=0
[  202.613560] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11737, diff=1, hw=0 hw_last=0
[  202.630139] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11738, diff=1, hw=0 hw_last=0
[  202.646718] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11739, diff=1, hw=0 hw_last=0
[  202.663300] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11740, diff=1, hw=0 hw_last=0
[  202.679879] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11741, diff=1, hw=0 hw_last=0
[  203.271381] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000e0dcab9c
[  203.271477] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  203.271555] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  203.271632] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  203.271714] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 00000000e0dcab9c
[  203.271792] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e0dcab9c
[  203.271867] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  203.271942] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  203.272016] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  203.272091] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  203.272164] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e0dcab9c
[  203.273564] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  203.276736] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11777, diff=1, hw=0 hw_last=0
[  203.293313] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11778, diff=1, hw=0 hw_last=0
[  203.309892] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11779, diff=1, hw=0 hw_last=0
[  203.326473] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11780, diff=1, hw=0 hw_last=0
[  203.343055] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11781, diff=1, hw=0 hw_last=0
[  203.359633] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11782, diff=1, hw=0 hw_last=0
[  203.376212] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11783, diff=1, hw=0 hw_last=0
[  203.392791] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11784, diff=1, hw=0 hw_last=0
[  203.409374] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11785, diff=1, hw=0 hw_last=0
[  203.425950] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11786, diff=1, hw=0 hw_last=0
[  203.442529] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11787, diff=1, hw=0 hw_last=0
[  203.459107] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11788, diff=1, hw=0 hw_last=0
[  203.475684] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11789, diff=1, hw=0 hw_last=0
[  203.492265] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11790, diff=1, hw=0 hw_last=0
[  203.501494] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  203.501607] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e0dcab9c
[  203.501694] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  203.501767] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000215b6887 state to 00000000e0dcab9c
[  203.501845] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  203.501917] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000e8543c49 state to 00000000e0dcab9c
[  203.501995] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000215b6887
[  203.502070] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  203.502141] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  203.502215] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  203.502286] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  203.502360] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  203.502434] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  203.502509] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  203.502581] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  203.502653] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 00000000e0dcab9c
[  203.502729] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  203.502802] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000e0dcab9c
[  203.502885] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  203.502933] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  203.502969] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000e0dcab9c
[  203.503049] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000029aaf162 to 00000000e0dcab9c
[  203.503124] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000e0dcab9c
[  203.503211] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e0dcab9c nonblocking
[  203.503325] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  203.503398] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  203.508841] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11791, diff=1, hw=0 hw_last=0
[  203.508937] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e0dcab9c
[  203.509013] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  203.509076] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  203.509138] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  203.509200] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  203.509262] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e0dcab9c
[  203.525418] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11792, diff=1, hw=0 hw_last=0
[  203.542000] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11793, diff=1, hw=0 hw_last=0
[  203.558577] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11794, diff=1, hw=0 hw_last=0
[  203.575156] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11795, diff=1, hw=0 hw_last=0
[  203.591736] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11796, diff=1, hw=0 hw_last=0
[  203.608317] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11797, diff=1, hw=0 hw_last=0
[  203.624893] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11798, diff=1, hw=0 hw_last=0
[  203.641474] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11799, diff=1, hw=0 hw_last=0
[  203.658057] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11800, diff=1, hw=0 hw_last=0
[  203.674634] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11801, diff=1, hw=0 hw_last=0
[  203.691209] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11802, diff=1, hw=0 hw_last=0
[  203.707787] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11803, diff=1, hw=0 hw_last=0
[  203.724367] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11804, diff=1, hw=0 hw_last=0
[  203.740946] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11805, diff=1, hw=0 hw_last=0
[  203.757524] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11806, diff=1, hw=0 hw_last=0
[  203.774103] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11807, diff=1, hw=0 hw_last=0
[  203.790683] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11808, diff=1, hw=0 hw_last=0
[  203.807264] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11809, diff=1, hw=0 hw_last=0
[  203.823844] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11810, diff=1, hw=0 hw_last=0
[  203.840422] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11811, diff=1, hw=0 hw_last=0
[  203.857003] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11812, diff=1, hw=0 hw_last=0
[  203.873585] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11813, diff=1, hw=0 hw_last=0
[  203.890162] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11814, diff=1, hw=0 hw_last=0
[  203.906739] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11815, diff=1, hw=0 hw_last=0
[  203.923319] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11816, diff=1, hw=0 hw_last=0
[  203.939899] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11817, diff=1, hw=0 hw_last=0
[  203.956477] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11818, diff=1, hw=0 hw_last=0
[  203.973055] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11819, diff=1, hw=0 hw_last=0
[  203.989637] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11820, diff=1, hw=0 hw_last=0
[  204.006215] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11821, diff=1, hw=0 hw_last=0
[  204.022795] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11822, diff=1, hw=0 hw_last=0
[  204.039374] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11823, diff=1, hw=0 hw_last=0
[  204.055953] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11824, diff=1, hw=0 hw_last=0
[  204.072533] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11825, diff=1, hw=0 hw_last=0
[  204.089110] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11826, diff=1, hw=0 hw_last=0
[  204.105690] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11827, diff=1, hw=0 hw_last=0
[  204.122270] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11828, diff=1, hw=0 hw_last=0
[  204.138851] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11829, diff=1, hw=0 hw_last=0
[  204.155430] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11830, diff=1, hw=0 hw_last=0
[  204.172008] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11831, diff=1, hw=0 hw_last=0
[  204.188586] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11832, diff=1, hw=0 hw_last=0
[  204.205165] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11833, diff=1, hw=0 hw_last=0
[  204.221745] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11834, diff=1, hw=0 hw_last=0
[  204.238323] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11835, diff=1, hw=0 hw_last=0
[  204.254905] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11836, diff=1, hw=0 hw_last=0
[  204.271483] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11837, diff=1, hw=0 hw_last=0
[  204.288061] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11838, diff=1, hw=0 hw_last=0
[  204.304642] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11839, diff=1, hw=0 hw_last=0
[  204.321224] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11840, diff=1, hw=0 hw_last=0
[  204.337800] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11841, diff=1, hw=0 hw_last=0
[  204.354381] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11842, diff=1, hw=0 hw_last=0
[  204.370959] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11843, diff=1, hw=0 hw_last=0
[  204.387540] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11844, diff=1, hw=0 hw_last=0
[  204.398867] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  204.398987] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 11845 to client
[  204.404120] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11845, diff=1, hw=0 hw_last=0
[  204.413268] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  204.413371] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007967e7cb
[  204.413454] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  204.413528] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000003519e999 state to 000000007967e7cb
[  204.413604] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  204.413677] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 000000007967e7cb
[  204.413757] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 000000003519e999
[  204.413830] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  204.413901] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  204.413972] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  204.414044] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  204.414118] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  204.414189] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  204.414264] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  204.414335] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  204.414406] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 000000007967e7cb
[  204.414482] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  204.414555] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000007967e7cb
[  204.414638] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  204.414685] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  204.414722] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000007967e7cb
[  204.453858] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11848, diff=1, hw=0 hw_last=0
[  204.470438] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11849, diff=1, hw=0 hw_last=0
[  204.487019] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11850, diff=1, hw=0 hw_last=0
[  204.503596] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11851, diff=1, hw=0 hw_last=0
[  204.520177] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11852, diff=1, hw=0 hw_last=0
[  204.536756] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11853, diff=1, hw=0 hw_last=0
[  204.553337] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11854, diff=1, hw=0 hw_last=0
[  204.569916] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11855, diff=1, hw=0 hw_last=0
[  204.586493] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11856, diff=1, hw=0 hw_last=0
[  204.603071] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11857, diff=1, hw=0 hw_last=0
[  204.619651] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11858, diff=1, hw=0 hw_last=0
[  204.636227] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11859, diff=1, hw=0 hw_last=0
[  204.644416] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  204.644528] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007967e7cb
[  204.644615] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  204.644688] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000003519e999 state to 000000007967e7cb
[  204.644766] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  204.644838] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 000000007967e7cb
[  204.644917] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 000000003519e999
[  204.644991] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  204.645062] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  204.645133] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  204.645204] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  204.645279] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  204.645350] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  204.645425] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  204.645497] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  204.645568] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 000000007967e7cb
[  204.645643] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  204.645716] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000007967e7cb
[  204.645797] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  204.645845] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  204.645881] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000007967e7cb
[  204.645961] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000c0cf118d to 000000007967e7cb
[  204.646034] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000007967e7cb
[  204.646121] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007967e7cb nonblocking
[  204.646235] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  204.646305] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  204.652804] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11860, diff=1, hw=0 hw_last=0
[  204.652903] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007967e7cb
[  204.652979] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  204.653040] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  204.653103] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  204.653164] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  204.653226] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007967e7cb
[  204.669384] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11861, diff=1, hw=0 hw_last=0
[  204.685964] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11862, diff=1, hw=0 hw_last=0
[  204.702542] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11863, diff=1, hw=0 hw_last=0
[  204.719120] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11864, diff=1, hw=0 hw_last=0
[  204.735702] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11865, diff=1, hw=0 hw_last=0
[  204.752280] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11866, diff=1, hw=0 hw_last=0
[  204.768861] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11867, diff=1, hw=0 hw_last=0
[  204.785442] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11868, diff=1, hw=0 hw_last=0
[  204.802020] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11869, diff=1, hw=0 hw_last=0
[  204.818598] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11870, diff=1, hw=0 hw_last=0
[  204.835173] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11871, diff=1, hw=0 hw_last=0
[  204.851753] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11872, diff=1, hw=0 hw_last=0
[  204.868331] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11873, diff=1, hw=0 hw_last=0
[  204.884910] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11874, diff=1, hw=0 hw_last=0
[  204.901489] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11875, diff=1, hw=0 hw_last=0
[  204.918068] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11876, diff=1, hw=0 hw_last=0
[  204.934648] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11877, diff=1, hw=0 hw_last=0
[  204.951229] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11878, diff=1, hw=0 hw_last=0
[  204.967813] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11879, diff=1, hw=0 hw_last=0
[  204.984389] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11880, diff=1, hw=0 hw_last=0
[  205.000969] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11881, diff=1, hw=0 hw_last=0
[  205.017547] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11882, diff=1, hw=0 hw_last=0
[  205.458333] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000082b4fa6a
[  205.458409] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  205.458480] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  205.458552] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  205.458623] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  205.458699] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  205.458770] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  205.458844] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  205.458916] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  205.458987] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 0000000018d86a98
[  205.459061] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  205.459133] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000018d86a98
[  205.459214] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  205.459261] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  205.459297] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000018d86a98
[  205.459375] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000007967e7cb to 0000000018d86a98
[  205.459471] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000018d86a98
[  205.459556] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  205.459634] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  205.459709] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  205.459791] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 0000000018d86a98
[  205.459868] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000018d86a98
[  205.459940] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  205.460013] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  205.460086] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  205.460160] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  205.460232] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000018d86a98
[  205.461597] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  205.465193] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11909, diff=1, hw=0 hw_last=0
[  205.481771] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11910, diff=1, hw=0 hw_last=0
[  205.498350] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11911, diff=1, hw=0 hw_last=0
[  205.514927] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11912, diff=1, hw=0 hw_last=0
[  205.531509] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11913, diff=1, hw=0 hw_last=0
[  205.548088] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11914, diff=1, hw=0 hw_last=0
[  205.564665] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11915, diff=1, hw=0 hw_last=0
[  205.581246] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11916, diff=1, hw=0 hw_last=0
[  205.597827] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11917, diff=1, hw=0 hw_last=0
[  205.614406] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11918, diff=1, hw=0 hw_last=0
[  205.630985] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11919, diff=1, hw=0 hw_last=0
[  205.647562] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11920, diff=1, hw=0 hw_last=0
[  205.664139] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11921, diff=1, hw=0 hw_last=0
[  205.680721] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11922, diff=1, hw=0 hw_last=0
[  205.681407] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  205.681518] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000018d86a98
[  205.681604] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  205.681677] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000082b4fa6a state to 0000000018d86a98
[  205.681755] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  205.681828] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 0000000018d86a98
[  205.681907] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 0000000082b4fa6a
[  205.681981] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  205.682052] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  205.682124] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  205.682195] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  205.682269] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  205.682341] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  205.682417] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  205.682489] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  205.682562] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 0000000018d86a98
[  205.682638] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  205.682711] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000018d86a98
[  205.682793] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  205.682840] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  205.682877] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000018d86a98
[  205.682958] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000ab379aee to 0000000018d86a98
[  205.683031] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000018d86a98
[  205.683118] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000018d86a98 nonblocking
[  205.683233] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  205.683321] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  205.697297] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11923, diff=1, hw=0 hw_last=0
[  205.697393] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000018d86a98
[  205.697475] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  205.697549] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  205.697622] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  205.697695] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  205.697770] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000018d86a98
[  205.713875] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11924, diff=1, hw=0 hw_last=0
[  205.730455] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11925, diff=1, hw=0 hw_last=0
[  205.747031] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11926, diff=1, hw=0 hw_last=0
[  205.763610] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11927, diff=1, hw=0 hw_last=0
[  205.780188] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11928, diff=1, hw=0 hw_last=0
[  205.796771] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11929, diff=1, hw=0 hw_last=0
[  205.813349] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11930, diff=1, hw=0 hw_last=0
[  205.829930] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11931, diff=1, hw=0 hw_last=0
[  205.846509] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11932, diff=1, hw=0 hw_last=0
[  205.863088] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11933, diff=1, hw=0 hw_last=0
[  205.879663] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11934, diff=1, hw=0 hw_last=0
[  205.896242] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11935, diff=1, hw=0 hw_last=0
[  205.912821] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11936, diff=1, hw=0 hw_last=0
[  205.929400] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11937, diff=1, hw=0 hw_last=0
[  205.945978] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11938, diff=1, hw=0 hw_last=0
[  205.962558] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11939, diff=1, hw=0 hw_last=0
[  205.979138] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11940, diff=1, hw=0 hw_last=0
[  205.995722] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11941, diff=1, hw=0 hw_last=0
[  206.012301] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11942, diff=1, hw=0 hw_last=0
[  206.028881] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11943, diff=1, hw=0 hw_last=0
[  206.045458] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11944, diff=1, hw=0 hw_last=0
[  206.062049] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11945, diff=1, hw=0 hw_last=0
[  206.078623] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11946, diff=1, hw=0 hw_last=0
[  206.095195] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11947, diff=1, hw=0 hw_last=0
[  206.111773] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11948, diff=1, hw=0 hw_last=0
[  206.128351] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11949, diff=1, hw=0 hw_last=0
[  206.144929] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11950, diff=1, hw=0 hw_last=0
[  206.161510] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11951, diff=1, hw=0 hw_last=0
[  206.178089] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11952, diff=1, hw=0 hw_last=0
[  206.194668] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11953, diff=1, hw=0 hw_last=0
[  206.211247] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11954, diff=1, hw=0 hw_last=0
[  206.227827] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11955, diff=1, hw=0 hw_last=0
[  206.244407] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11956, diff=1, hw=0 hw_last=0
[  206.260986] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11957, diff=1, hw=0 hw_last=0
[  206.277564] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11958, diff=1, hw=0 hw_last=0
[  206.294142] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11959, diff=1, hw=0 hw_last=0
[  206.310721] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11960, diff=1, hw=0 hw_last=0
[  206.327301] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11961, diff=1, hw=0 hw_last=0
[  206.343882] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11962, diff=1, hw=0 hw_last=0
[  206.360461] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11963, diff=1, hw=0 hw_last=0
[  206.377040] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11964, diff=1, hw=0 hw_last=0
[  206.393617] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11965, diff=1, hw=0 hw_last=0
[  206.410197] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11966, diff=1, hw=0 hw_last=0
[  206.426777] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11967, diff=1, hw=0 hw_last=0
[  206.443356] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11968, diff=1, hw=0 hw_last=0
[  206.459935] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11969, diff=1, hw=0 hw_last=0
[  206.476519] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11970, diff=1, hw=0 hw_last=0
[  206.483456] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  206.483578] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 11971 to client
[  206.485867] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  206.485971] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000d7e48c6b
[  206.486055] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  206.486128] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000fefb5c61 state to 00000000d7e48c6b
[  206.486205] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  206.486277] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 00000000d7e48c6b
[  206.486355] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000fefb5c61
[  206.486429] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  206.486501] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  206.486571] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  206.486642] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  206.486717] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  206.486788] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  206.486863] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  206.486934] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  206.487005] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 00000000d7e48c6b
[  206.542836] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11974, diff=1, hw=0 hw_last=0
[  206.559424] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11975, diff=1, hw=0 hw_last=0
[  206.575997] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11976, diff=1, hw=0 hw_last=0
[  206.592575] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11977, diff=1, hw=0 hw_last=0
[  206.609155] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11978, diff=1, hw=0 hw_last=0
[  206.625736] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11979, diff=1, hw=0 hw_last=0
[  206.642317] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11980, diff=1, hw=0 hw_last=0
[  206.658893] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11981, diff=1, hw=0 hw_last=0
[  206.675473] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11982, diff=1, hw=0 hw_last=0
[  206.692049] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11983, diff=1, hw=0 hw_last=0
[  206.708630] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11984, diff=1, hw=0 hw_last=0
[  206.717195] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  206.717310] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000d7e48c6b
[  206.717400] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  206.717474] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000fefb5c61 state to 00000000d7e48c6b
[  206.717552] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  206.717624] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 00000000d7e48c6b
[  206.717705] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000fefb5c61
[  206.717779] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  206.717851] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  206.717925] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  206.717996] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  206.718073] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  206.718145] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  206.718221] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  206.718292] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  206.718365] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 00000000d7e48c6b
[  206.718439] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  206.718513] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000d7e48c6b
[  206.718596] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  206.718644] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  206.718681] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000d7e48c6b
[  206.718759] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000fde3661d to 00000000d7e48c6b
[  206.718833] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000d7e48c6b
[  206.718921] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000d7e48c6b nonblocking
[  206.719039] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  206.719121] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  206.725203] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11985, diff=1, hw=0 hw_last=0
[  206.725301] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000d7e48c6b
[  206.725371] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  206.725436] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  206.725498] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  206.725561] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  206.725625] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000d7e48c6b
[  206.741783] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11986, diff=1, hw=0 hw_last=0
[  206.758361] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11987, diff=1, hw=0 hw_last=0
[  206.774943] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11988, diff=1, hw=0 hw_last=0
[  206.791520] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11989, diff=1, hw=0 hw_last=0
[  206.808097] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11990, diff=1, hw=0 hw_last=0
[  206.824680] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11991, diff=1, hw=0 hw_last=0
[  206.841258] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11992, diff=1, hw=0 hw_last=0
[  206.857836] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11993, diff=1, hw=0 hw_last=0
[  206.874417] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11994, diff=1, hw=0 hw_last=0
[  206.891000] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11995, diff=1, hw=0 hw_last=0
[  206.907576] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11996, diff=1, hw=0 hw_last=0
[  206.924151] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11997, diff=1, hw=0 hw_last=0
[  206.940730] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11998, diff=1, hw=0 hw_last=0
[  206.957310] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=11999, diff=1, hw=0 hw_last=0
[  206.973889] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12000, diff=1, hw=0 hw_last=0
[  206.990468] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12001, diff=1, hw=0 hw_last=0
[  207.007047] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12002, diff=1, hw=0 hw_last=0
[  207.023629] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12003, diff=1, hw=0 hw_last=0
[  207.040209] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12004, diff=1, hw=0 hw_last=0
[  207.056789] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12005, diff=1, hw=0 hw_last=0
[  207.073367] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12006, diff=1, hw=0 hw_last=0
[  207.089943] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12007, diff=1, hw=0 hw_last=0
[  207.106523] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12008, diff=1, hw=0 hw_last=0
[  207.239156] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12016, diff=1, hw=0 hw_last=0
[  207.255737] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12017, diff=1, hw=0 hw_last=0
[  207.272315] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12018, diff=1, hw=0 hw_last=0
[  207.288895] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12019, diff=1, hw=0 hw_last=0
[  207.305473] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12020, diff=1, hw=0 hw_last=0
[  207.322052] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12021, diff=1, hw=0 hw_last=0
[  207.338634] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12022, diff=1, hw=0 hw_last=0
[  207.355212] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12023, diff=1, hw=0 hw_last=0
[  207.371793] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12024, diff=1, hw=0 hw_last=0
[  207.388373] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12025, diff=1, hw=0 hw_last=0
[  207.404953] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12026, diff=1, hw=0 hw_last=0
[  207.421529] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12027, diff=1, hw=0 hw_last=0
[  207.438106] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12028, diff=1, hw=0 hw_last=0
[  207.454687] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12029, diff=1, hw=0 hw_last=0
[  207.471266] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12030, diff=1, hw=0 hw_last=0
[  207.487847] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12031, diff=1, hw=0 hw_last=0
[  207.504425] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12032, diff=1, hw=0 hw_last=0
[  207.521004] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12033, diff=1, hw=0 hw_last=0
[  207.537583] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12034, diff=1, hw=0 hw_last=0
[  207.554164] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12035, diff=1, hw=0 hw_last=0
[  207.570741] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12036, diff=1, hw=0 hw_last=0
[  207.587322] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12037, diff=1, hw=0 hw_last=0
[  207.601299] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  207.601417] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 12038 to client
[  207.603908] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12038, diff=1, hw=0 hw_last=0
[  207.612684] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  207.612780] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000004593454f
[  207.612864] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  207.612938] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000087081e28 state to 000000004593454f
[  207.613014] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  207.613086] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a743c9a8 state to 000000004593454f
[  207.613167] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000087081e28
[  207.613242] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  207.613313] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  207.613385] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  207.613456] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  207.613531] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  207.613604] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  207.613679] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  207.613751] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  207.613823] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 000000004593454f
[  207.613898] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  207.613970] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000004593454f
[  207.614052] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  207.614102] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  207.614138] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000004593454f
[  207.614217] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000008e9f664b to 000000004593454f
[  207.614291] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000004593454f
[  207.614370] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  207.614443] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  207.614516] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  207.614598] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000004593454f
[  207.614673] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000004593454f
[  207.614746] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  207.614819] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  207.614892] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  207.614965] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  207.615037] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000004593454f
[  207.616555] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  207.620484] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12039, diff=1, hw=0 hw_last=0
[  207.637063] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12040, diff=1, hw=0 hw_last=0
[  207.653642] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12041, diff=1, hw=0 hw_last=0
[  207.670221] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12042, diff=1, hw=0 hw_last=0
[  207.686830] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12043, diff=1, hw=0 hw_last=0
[  207.703384] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12044, diff=1, hw=0 hw_last=0
[  207.719961] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12045, diff=1, hw=0 hw_last=0
[  207.736542] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12046, diff=1, hw=0 hw_last=0
[  207.753125] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12047, diff=1, hw=0 hw_last=0
[  207.769701] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12048, diff=1, hw=0 hw_last=0
[  208.184172] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12073, diff=1, hw=0 hw_last=0
[  208.200752] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12074, diff=1, hw=0 hw_last=0
[  208.217330] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12075, diff=1, hw=0 hw_last=0
[  208.233908] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12076, diff=1, hw=0 hw_last=0
[  208.250487] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12077, diff=1, hw=0 hw_last=0
[  208.267066] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12078, diff=1, hw=0 hw_last=0
[  208.283646] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12079, diff=1, hw=0 hw_last=0
[  208.300225] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12080, diff=1, hw=0 hw_last=0
[  208.316807] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12081, diff=1, hw=0 hw_last=0
[  208.333386] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12082, diff=1, hw=0 hw_last=0
[  208.349962] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12083, diff=1, hw=0 hw_last=0
[  208.366542] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12084, diff=1, hw=0 hw_last=0
[  208.383125] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12085, diff=1, hw=0 hw_last=0
[  208.399701] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12086, diff=1, hw=0 hw_last=0
[  208.416281] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12087, diff=1, hw=0 hw_last=0
[  208.432859] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12088, diff=1, hw=0 hw_last=0
[  208.449439] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12089, diff=1, hw=0 hw_last=0
[  208.466019] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12090, diff=1, hw=0 hw_last=0
[  208.482599] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12091, diff=1, hw=0 hw_last=0
[  208.499179] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12092, diff=1, hw=0 hw_last=0
[  208.515758] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12093, diff=1, hw=0 hw_last=0
[  208.532337] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12094, diff=1, hw=0 hw_last=0
[  208.548913] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12095, diff=1, hw=0 hw_last=0
[  208.565493] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12096, diff=1, hw=0 hw_last=0
[  208.582073] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12097, diff=1, hw=0 hw_last=0
[  208.598652] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12098, diff=1, hw=0 hw_last=0
[  208.615231] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12099, diff=1, hw=0 hw_last=0
[  208.631811] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12100, diff=1, hw=0 hw_last=0
[  208.648389] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12101, diff=1, hw=0 hw_last=0
[  208.664970] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12102, diff=1, hw=0 hw_last=0
[  208.681547] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12103, diff=1, hw=0 hw_last=0
[  208.698126] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12104, diff=1, hw=0 hw_last=0
[  208.714717] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12105, diff=1, hw=0 hw_last=0
[  208.716253] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  208.716371] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 12106 to client
[  208.723637] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  208.723743] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f37c832b
[  208.723825] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  208.723897] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000002cafbe1b state to 00000000f37c832b
[  208.723974] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  208.724047] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 00000000f37c832b
[  208.724126] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 000000002cafbe1b
[  208.724200] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  208.724270] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  208.724341] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  208.724412] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  208.724486] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  208.724557] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  208.724632] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  208.724703] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  208.724775] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 00000000f37c832b
[  208.724849] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  208.724921] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000f37c832b
[  208.725004] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  208.725051] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  208.725088] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000f37c832b
[  208.725166] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000004593454f to 00000000f37c832b
[  208.725240] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000f37c832b
[  208.725318] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  208.725391] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  208.725464] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  208.725545] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 00000000f37c832b
[  208.725620] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f37c832b
[  208.725693] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  208.725764] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  208.725836] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  208.725907] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  208.725979] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f37c832b
[  208.727348] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  208.814188] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12111, diff=1, hw=0 hw_last=0
[  208.830767] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12112, diff=1, hw=0 hw_last=0
[  208.847346] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12113, diff=1, hw=0 hw_last=0
[  208.863928] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12114, diff=1, hw=0 hw_last=0
[  208.880509] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12115, diff=1, hw=0 hw_last=0
[  208.897083] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12116, diff=1, hw=0 hw_last=0
[  208.913664] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12117, diff=1, hw=0 hw_last=0
[  208.930240] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12118, diff=1, hw=0 hw_last=0
[  208.946821] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12119, diff=1, hw=0 hw_last=0
[  208.954905] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  208.955013] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f37c832b
[  208.955089] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  208.955152] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000002cafbe1b state to 00000000f37c832b
[  208.955218] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  208.955278] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 00000000f37c832b
[  208.955348] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 000000002cafbe1b
[  208.955448] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  208.955516] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  208.955579] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  208.955640] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  208.955707] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  208.955769] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  208.955834] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  208.955895] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  208.955956] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 00000000f37c832b
[  208.956020] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  208.956083] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000f37c832b
[  208.956155] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  208.956207] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  208.956239] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000f37c832b
[  208.956307] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000008e9f664b to 00000000f37c832b
[  208.956372] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000f37c832b
[  208.956451] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f37c832b nonblocking
[  208.956552] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  208.956633] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  208.963396] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12120, diff=1, hw=0 hw_last=0
[  208.963489] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f37c832b
[  208.963558] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  208.963622] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  208.963683] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  208.963744] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  208.963807] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f37c832b
[  208.979974] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12121, diff=1, hw=0 hw_last=0
[  208.996553] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12122, diff=1, hw=0 hw_last=0
[  209.013134] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12123, diff=1, hw=0 hw_last=0
[  209.029712] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12124, diff=1, hw=0 hw_last=0
[  209.046292] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12125, diff=1, hw=0 hw_last=0
[  209.062874] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12126, diff=1, hw=0 hw_last=0
[  209.079451] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12127, diff=1, hw=0 hw_last=0
[  209.096029] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12128, diff=1, hw=0 hw_last=0
[  209.112612] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12129, diff=1, hw=0 hw_last=0
[  209.129192] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12130, diff=1, hw=0 hw_last=0
[  209.145767] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12131, diff=1, hw=0 hw_last=0
[  209.162343] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12132, diff=1, hw=0 hw_last=0
[  209.178922] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12133, diff=1, hw=0 hw_last=0
[  209.195503] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12134, diff=1, hw=0 hw_last=0
[  209.212081] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12135, diff=1, hw=0 hw_last=0
[  209.228661] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12136, diff=1, hw=0 hw_last=0
[  209.245240] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12137, diff=1, hw=0 hw_last=0
[  209.261818] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12138, diff=1, hw=0 hw_last=0
[  209.278402] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12139, diff=1, hw=0 hw_last=0
[  209.294981] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12140, diff=1, hw=0 hw_last=0
[  209.311559] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12141, diff=1, hw=0 hw_last=0
[  209.328136] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12142, diff=1, hw=0 hw_last=0
[  209.344714] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12143, diff=1, hw=0 hw_last=0
[  209.361294] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12144, diff=1, hw=0 hw_last=0
[  209.377872] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12145, diff=1, hw=0 hw_last=0
[  209.702929] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  209.702990] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000009472d261
[  209.703060] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  209.703106] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  209.703138] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000009472d261
[  209.703206] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000d7e48c6b to 000000009472d261
[  209.703268] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000009472d261
[  209.703336] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  209.703414] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  209.703480] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  209.703555] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000009472d261
[  209.703623] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009472d261
[  209.703690] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  209.703752] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  209.703813] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  209.703874] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  209.703935] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009472d261
[  209.705375] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  209.709469] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12165, diff=1, hw=0 hw_last=0
[  209.726043] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12166, diff=1, hw=0 hw_last=0
[  209.742624] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12167, diff=1, hw=0 hw_last=0
[  209.759199] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12168, diff=1, hw=0 hw_last=0
[  209.775784] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12169, diff=1, hw=0 hw_last=0
[  209.792361] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12170, diff=1, hw=0 hw_last=0
[  209.808942] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12171, diff=1, hw=0 hw_last=0
[  209.825519] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12172, diff=1, hw=0 hw_last=0
[  209.842102] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12173, diff=1, hw=0 hw_last=0
[  209.858680] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12174, diff=1, hw=0 hw_last=0
[  209.875257] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12175, diff=1, hw=0 hw_last=0
[  209.891836] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12176, diff=1, hw=0 hw_last=0
[  209.908413] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12177, diff=1, hw=0 hw_last=0
[  209.924992] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12178, diff=1, hw=0 hw_last=0
[  209.926318] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  209.926419] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009472d261
[  209.926494] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  209.926557] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000ec98bd42 state to 000000009472d261
[  209.926623] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  209.926683] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 000000009472d261
[  209.926752] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000ec98bd42
[  209.926815] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  209.926875] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  209.926935] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  209.926995] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  209.927059] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  209.927119] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  209.927183] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  209.927243] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  209.927303] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 000000009472d261
[  209.927366] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  209.927456] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000009472d261
[  209.927533] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  209.927584] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  209.927617] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000009472d261
[  209.927689] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000e0dcab9c to 000000009472d261
[  209.927752] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000009472d261
[  209.927833] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000009472d261 nonblocking
[  209.927932] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  209.928022] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  209.941569] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12179, diff=1, hw=0 hw_last=0
[  209.941664] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009472d261
[  209.941755] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  209.941831] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  209.941906] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  209.941980] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  209.942055] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009472d261
[  209.958147] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12180, diff=1, hw=0 hw_last=0
[  209.974726] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12181, diff=1, hw=0 hw_last=0
[  209.991306] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12182, diff=1, hw=0 hw_last=0
[  210.007884] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12183, diff=1, hw=0 hw_last=0
[  210.024463] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12184, diff=1, hw=0 hw_last=0
[  210.041045] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12185, diff=1, hw=0 hw_last=0
[  210.057623] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12186, diff=1, hw=0 hw_last=0
[  210.074203] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12187, diff=1, hw=0 hw_last=0
[  210.090786] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12188, diff=1, hw=0 hw_last=0
[  210.107366] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12189, diff=1, hw=0 hw_last=0
[  210.123939] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12190, diff=1, hw=0 hw_last=0
[  210.140516] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12191, diff=1, hw=0 hw_last=0
[  210.157096] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12192, diff=1, hw=0 hw_last=0
[  210.173674] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12193, diff=1, hw=0 hw_last=0
[  210.190254] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12194, diff=1, hw=0 hw_last=0
[  210.206833] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12195, diff=1, hw=0 hw_last=0
[  210.223412] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12196, diff=1, hw=0 hw_last=0
[  210.239993] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12197, diff=1, hw=0 hw_last=0
[  210.256573] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12198, diff=1, hw=0 hw_last=0
[  210.273152] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12199, diff=1, hw=0 hw_last=0
[  210.289733] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12200, diff=1, hw=0 hw_last=0
[  210.306309] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12201, diff=1, hw=0 hw_last=0
[  210.322887] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12202, diff=1, hw=0 hw_last=0
[  210.339467] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12203, diff=1, hw=0 hw_last=0
[  210.356047] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12204, diff=1, hw=0 hw_last=0
[  210.372627] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12205, diff=1, hw=0 hw_last=0
[  210.389207] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12206, diff=1, hw=0 hw_last=0
[  210.405786] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12207, diff=1, hw=0 hw_last=0
[  210.422363] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12208, diff=1, hw=0 hw_last=0
[  210.438943] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12209, diff=1, hw=0 hw_last=0
[  210.455524] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12210, diff=1, hw=0 hw_last=0
[  210.472103] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12211, diff=1, hw=0 hw_last=0
[  210.488680] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12212, diff=1, hw=0 hw_last=0
[  210.505259] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12213, diff=1, hw=0 hw_last=0
[  210.521840] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12214, diff=1, hw=0 hw_last=0
[  210.538417] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12215, diff=1, hw=0 hw_last=0
[  210.554996] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12216, diff=1, hw=0 hw_last=0
[  210.571577] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12217, diff=1, hw=0 hw_last=0
[  210.588156] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12218, diff=1, hw=0 hw_last=0
[  210.604736] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12219, diff=1, hw=0 hw_last=0
[  210.621316] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12220, diff=1, hw=0 hw_last=0
[  210.637894] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12221, diff=1, hw=0 hw_last=0
[  210.654477] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12222, diff=1, hw=0 hw_last=0
[  210.668381] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  210.668494] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 12223 to client
[  210.671058] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12223, diff=1, hw=0 hw_last=0
[  210.680752] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  210.680839] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008a640c91
[  210.680910] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  210.680971] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000bac3ec2d state to 000000008a640c91
[  210.681036] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  210.681097] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 000000008a640c91
[  210.681165] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000bac3ec2d
[  210.681227] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  210.681287] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  210.681347] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  210.681406] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  210.681470] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  210.681530] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  210.681594] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  210.681654] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  210.681713] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 000000008a640c91
[  210.681776] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  210.681837] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000008a640c91
[  210.681906] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  210.681952] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  210.681983] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008a640c91
[  210.682050] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000018d86a98 to 000000008a640c91
[  210.682114] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008a640c91
[  210.682182] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  210.682244] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  210.682306] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  210.682375] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000008a640c91
[  210.903166] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12237, diff=1, hw=0 hw_last=0
[  210.911789] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  210.911895] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008a640c91
[  210.911971] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  210.912035] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000bac3ec2d state to 000000008a640c91
[  210.912102] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  210.912162] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 000000008a640c91
[  210.912231] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000bac3ec2d
[  210.912293] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  210.912353] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  210.912413] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  210.912473] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  210.912536] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  210.912597] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  210.912661] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  210.912721] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  210.912780] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 000000008a640c91
[  210.912843] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  210.912905] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000008a640c91
[  210.912977] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  210.913023] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  210.913054] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008a640c91
[  210.913122] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000007967e7cb to 000000008a640c91
[  210.913184] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008a640c91
[  210.913261] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000008a640c91 nonblocking
[  210.913367] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  210.913446] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  210.919741] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12238, diff=1, hw=0 hw_last=0
[  210.919839] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008a640c91
[  210.919910] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  210.919973] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  210.920034] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  210.920097] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  210.920161] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008a640c91
[  210.936320] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12239, diff=1, hw=0 hw_last=0
[  210.952901] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12240, diff=1, hw=0 hw_last=0
[  210.969479] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12241, diff=1, hw=0 hw_last=0
[  210.986058] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12242, diff=1, hw=0 hw_last=0
[  211.002637] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12243, diff=1, hw=0 hw_last=0
[  211.019218] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12244, diff=1, hw=0 hw_last=0
[  211.035797] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12245, diff=1, hw=0 hw_last=0
[  211.052379] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12246, diff=1, hw=0 hw_last=0
[  211.068956] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12247, diff=1, hw=0 hw_last=0
[  211.085535] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12248, diff=1, hw=0 hw_last=0
[  211.102110] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12249, diff=1, hw=0 hw_last=0
[  211.118689] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12250, diff=1, hw=0 hw_last=0
[  211.135267] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12251, diff=1, hw=0 hw_last=0
[  211.151847] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12252, diff=1, hw=0 hw_last=0
[  211.168427] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12253, diff=1, hw=0 hw_last=0
[  211.185005] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12254, diff=1, hw=0 hw_last=0
[  211.201585] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12255, diff=1, hw=0 hw_last=0
[  211.218169] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12256, diff=1, hw=0 hw_last=0
[  211.234745] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12257, diff=1, hw=0 hw_last=0
[  211.251329] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12258, diff=1, hw=0 hw_last=0
[  211.267903] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12259, diff=1, hw=0 hw_last=0
[  211.284482] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12260, diff=1, hw=0 hw_last=0
[  211.301062] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12261, diff=1, hw=0 hw_last=0
[  211.317639] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12262, diff=1, hw=0 hw_last=0
[  211.334219] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12263, diff=1, hw=0 hw_last=0
[  211.350799] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12264, diff=1, hw=0 hw_last=0
[  211.367378] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12265, diff=1, hw=0 hw_last=0
[  211.383958] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12266, diff=1, hw=0 hw_last=0
[  211.400535] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12267, diff=1, hw=0 hw_last=0
[  211.417115] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12268, diff=1, hw=0 hw_last=0
[  211.433695] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12269, diff=1, hw=0 hw_last=0
[  211.450274] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12270, diff=1, hw=0 hw_last=0
[  211.466852] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12271, diff=1, hw=0 hw_last=0
[  211.726136] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000cc24793
[  211.726204] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000008a640c91 to 000000000cc24793
[  211.726266] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000cc24793
[  211.726332] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  211.726392] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  211.726454] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  211.726523] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000000cc24793
[  211.726587] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000cc24793
[  211.726649] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  211.726709] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  211.726770] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  211.726831] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  211.726891] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000cc24793
[  211.728355] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  211.732129] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12287, diff=1, hw=0 hw_last=0
[  211.748704] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12288, diff=1, hw=0 hw_last=0
[  211.765286] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12289, diff=1, hw=0 hw_last=0
[  211.781863] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12290, diff=1, hw=0 hw_last=0
[  211.798446] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12291, diff=1, hw=0 hw_last=0
[  211.815022] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12292, diff=1, hw=0 hw_last=0
[  211.831602] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12293, diff=1, hw=0 hw_last=0
[  211.848181] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12294, diff=1, hw=0 hw_last=0
[  211.864763] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12295, diff=1, hw=0 hw_last=0
[  211.881341] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12296, diff=1, hw=0 hw_last=0
[  211.897918] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12297, diff=1, hw=0 hw_last=0
[  211.914500] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12298, diff=1, hw=0 hw_last=0
[  211.931076] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12299, diff=1, hw=0 hw_last=0
[  211.947657] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12300, diff=1, hw=0 hw_last=0
[  211.956589] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  211.956696] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000cc24793
[  211.956772] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  211.956835] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000003519e999 state to 000000000cc24793
[  211.956902] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  211.956962] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000e8543c49 state to 000000000cc24793
[  211.957031] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 000000003519e999
[  211.957094] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  211.957154] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  211.957214] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  211.957274] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  211.957337] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  211.957397] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  211.957461] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  211.957520] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  211.957580] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000000cc24793
[  211.957644] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  211.957705] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000000cc24793
[  211.957776] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  211.957819] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  211.957851] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000cc24793
[  211.957918] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000018d86a98 to 000000000cc24793
[  211.957981] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000cc24793
[  211.958057] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000cc24793 nonblocking
[  211.958164] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  211.958251] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  211.964232] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12301, diff=1, hw=0 hw_last=0
[  211.964333] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000cc24793
[  211.964413] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  211.964488] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  211.964561] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  211.964635] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  211.964709] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000cc24793
[  211.980811] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12302, diff=1, hw=0 hw_last=0
[  211.997388] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12303, diff=1, hw=0 hw_last=0
[  212.013968] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12304, diff=1, hw=0 hw_last=0
[  212.030547] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12305, diff=1, hw=0 hw_last=0
[  212.047125] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12306, diff=1, hw=0 hw_last=0
[  212.063709] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12307, diff=1, hw=0 hw_last=0
[  212.080286] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12308, diff=1, hw=0 hw_last=0
[  212.096865] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12309, diff=1, hw=0 hw_last=0
[  212.113444] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12310, diff=1, hw=0 hw_last=0
[  212.594238] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12339, diff=1, hw=0 hw_last=0
[  212.610819] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12340, diff=1, hw=0 hw_last=0
[  212.627398] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12341, diff=1, hw=0 hw_last=0
[  212.643976] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12342, diff=1, hw=0 hw_last=0
[  212.660555] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12343, diff=1, hw=0 hw_last=0
[  212.677135] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12344, diff=1, hw=0 hw_last=0
[  212.693713] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12345, diff=1, hw=0 hw_last=0
[  212.710292] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12346, diff=1, hw=0 hw_last=0
[  212.726878] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12347, diff=1, hw=0 hw_last=0
[  212.743453] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12348, diff=1, hw=0 hw_last=0
[  212.760031] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12349, diff=1, hw=0 hw_last=0
[  212.776615] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12350, diff=1, hw=0 hw_last=0
[  212.780108] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  212.780217] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 12351 to client
[  212.785461] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  212.785551] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000305e034
[  212.785621] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  212.785682] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000082b4fa6a state to 000000000305e034
[  212.785748] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  212.785808] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 000000000305e034
[  212.785877] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 0000000082b4fa6a
[  212.785939] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  212.785999] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  212.786058] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  212.786118] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  212.786181] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  212.786240] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  212.786304] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  212.786364] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  212.786424] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 000000000305e034
[  212.786487] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  212.786547] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000000305e034
[  212.786617] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  212.786663] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  212.786695] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000305e034
[  212.786763] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000009472d261 to 000000000305e034
[  212.786827] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000305e034
[  212.786893] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  212.786955] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  212.787018] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  212.787087] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000000305e034
[  212.787151] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000305e034
[  212.787212] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  212.787273] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  212.787334] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  212.787411] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  212.787476] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000305e034
[  212.788904] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  212.793197] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12351, diff=1, hw=0 hw_last=0
[  212.809774] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12352, diff=1, hw=0 hw_last=0
[  212.826350] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12353, diff=1, hw=0 hw_last=0
[  212.842930] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12354, diff=1, hw=0 hw_last=0
[  212.859515] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12355, diff=1, hw=0 hw_last=0
[  212.876091] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12356, diff=1, hw=0 hw_last=0
[  212.892668] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12357, diff=1, hw=0 hw_last=0
[  212.909249] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12358, diff=1, hw=0 hw_last=0
[  212.925830] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12359, diff=1, hw=0 hw_last=0
[  212.942411] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12360, diff=1, hw=0 hw_last=0
[  212.958988] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12361, diff=1, hw=0 hw_last=0
[  212.975568] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12362, diff=1, hw=0 hw_last=0
[  212.992146] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12363, diff=1, hw=0 hw_last=0
[  213.008725] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12364, diff=1, hw=0 hw_last=0
[  213.017229] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  213.017336] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000305e034
[  213.017412] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  213.017476] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000082b4fa6a state to 000000000305e034
[  213.017545] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  213.017608] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 000000000305e034
[  213.017677] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000082b4fa6a
[  213.017739] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  213.017799] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  213.017859] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  213.018466] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  213.018498] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000305e034
[  213.018566] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000d7e48c6b to 000000000305e034
[  213.018627] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000305e034
[  213.018703] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000305e034 nonblocking
[  213.018818] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  213.018898] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  213.025301] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12365, diff=1, hw=0 hw_last=0
[  213.025396] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000305e034
[  213.025468] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  213.025531] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  213.025592] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  213.025654] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  213.025717] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000305e034
[  213.041878] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12366, diff=1, hw=0 hw_last=0
[  213.058458] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12367, diff=1, hw=0 hw_last=0
[  213.075037] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12368, diff=1, hw=0 hw_last=0
[  213.091616] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12369, diff=1, hw=0 hw_last=0
[  213.108194] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12370, diff=1, hw=0 hw_last=0
[  213.124776] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12371, diff=1, hw=0 hw_last=0
[  213.141353] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12372, diff=1, hw=0 hw_last=0
[  213.157933] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12373, diff=1, hw=0 hw_last=0
[  213.174515] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12374, diff=1, hw=0 hw_last=0
[  213.191091] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12375, diff=1, hw=0 hw_last=0
[  213.207669] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12376, diff=1, hw=0 hw_last=0
[  213.224247] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12377, diff=1, hw=0 hw_last=0
[  213.240826] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12378, diff=1, hw=0 hw_last=0
[  213.257405] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12379, diff=1, hw=0 hw_last=0
[  213.273984] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12380, diff=1, hw=0 hw_last=0
[  213.290564] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12381, diff=1, hw=0 hw_last=0
[  213.307143] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12382, diff=1, hw=0 hw_last=0
[  213.323722] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12383, diff=1, hw=0 hw_last=0
[  213.340307] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12384, diff=1, hw=0 hw_last=0
[  213.356884] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12385, diff=1, hw=0 hw_last=0
[  213.373464] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12386, diff=1, hw=0 hw_last=0
[  213.390041] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12387, diff=1, hw=0 hw_last=0
[  213.406619] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12388, diff=1, hw=0 hw_last=0
[  213.423198] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12389, diff=1, hw=0 hw_last=0
[  213.439778] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12390, diff=1, hw=0 hw_last=0
[  213.456357] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12391, diff=1, hw=0 hw_last=0
[  213.472935] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12392, diff=1, hw=0 hw_last=0
[  213.489515] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12393, diff=1, hw=0 hw_last=0
[  213.506093] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12394, diff=1, hw=0 hw_last=0
[  213.522673] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12395, diff=1, hw=0 hw_last=0
[  213.539255] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12396, diff=1, hw=0 hw_last=0
[  213.555832] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12397, diff=1, hw=0 hw_last=0
[  213.572414] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12398, diff=1, hw=0 hw_last=0
[  213.588993] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12399, diff=1, hw=0 hw_last=0
[  213.605569] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12400, diff=1, hw=0 hw_last=0
[  213.622149] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12401, diff=1, hw=0 hw_last=0
[  213.638730] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12402, diff=1, hw=0 hw_last=0
[  213.655308] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12403, diff=1, hw=0 hw_last=0
[  213.671887] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12404, diff=1, hw=0 hw_last=0
[  213.688465] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12405, diff=1, hw=0 hw_last=0
[  213.705044] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12406, diff=1, hw=0 hw_last=0
[  213.721626] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12407, diff=1, hw=0 hw_last=0
[  213.738203] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12408, diff=1, hw=0 hw_last=0
[  213.754781] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12409, diff=1, hw=0 hw_last=0
[  213.771362] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12410, diff=1, hw=0 hw_last=0
[  213.787940] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12411, diff=1, hw=0 hw_last=0
[  213.804522] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12412, diff=1, hw=0 hw_last=0
[  213.870848] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12416, diff=1, hw=0 hw_last=0
[  213.884131] systemd-journald[214]: /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal: Journal header limits reached or header out-of-date, rotating.
[  213.887421] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12417, diff=1, hw=0 hw_last=0
[  213.904232] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12418, diff=1, hw=0 hw_last=0
[  213.920584] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12419, diff=1, hw=0 hw_last=0
[  213.937161] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12420, diff=1, hw=0 hw_last=0
[  213.953740] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12421, diff=1, hw=0 hw_last=0
[  213.970319] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12422, diff=1, hw=0 hw_last=0
[  213.986900] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12423, diff=1, hw=0 hw_last=0
[  214.003482] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12424, diff=1, hw=0 hw_last=0
[  214.020057] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12425, diff=1, hw=0 hw_last=0
[  214.036636] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12426, diff=1, hw=0 hw_last=0
[  214.053213] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12427, diff=1, hw=0 hw_last=0
[  214.069794] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12428, diff=1, hw=0 hw_last=0
[  214.080112] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  214.080221] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006fb5b2d2
[  214.080298] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  214.080360] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000055579822 state to 000000006fb5b2d2
[  214.080427] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  214.080488] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000adb7ad91 state to 000000006fb5b2d2
[  214.080556] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 0000000055579822
[  214.080619] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  214.080680] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  214.080740] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  214.080799] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  214.080863] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  214.080924] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  214.080988] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  214.081048] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  214.081108] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 000000006fb5b2d2
[  214.081171] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  214.081233] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000006fb5b2d2
[  214.081303] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  214.081351] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  214.081384] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006fb5b2d2
[  214.081452] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000004593454f to 000000006fb5b2d2
[  214.081514] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006fb5b2d2
[  214.081592] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006fb5b2d2 nonblocking
[  214.081696] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  214.081767] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  214.086371] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12429, diff=1, hw=0 hw_last=0
[  214.086487] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006fb5b2d2
[  214.086559] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  214.086622] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  214.086684] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  214.086746] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  214.086810] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006fb5b2d2
[  214.102947] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12430, diff=1, hw=0 hw_last=0
[  214.119525] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12431, diff=1, hw=0 hw_last=0
[  214.136105] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12432, diff=1, hw=0 hw_last=0
[  214.152685] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12433, diff=1, hw=0 hw_last=0
[  214.169262] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12434, diff=1, hw=0 hw_last=0
[  214.185844] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12435, diff=1, hw=0 hw_last=0
[  214.202421] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12436, diff=1, hw=0 hw_last=0
[  214.219000] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12437, diff=1, hw=0 hw_last=0
[  214.235582] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12438, diff=1, hw=0 hw_last=0
[  214.252160] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12439, diff=1, hw=0 hw_last=0
[  214.268736] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12440, diff=1, hw=0 hw_last=0
[  214.285315] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12441, diff=1, hw=0 hw_last=0
[  214.301894] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12442, diff=1, hw=0 hw_last=0
[  214.318473] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12443, diff=1, hw=0 hw_last=0
[  214.335052] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12444, diff=1, hw=0 hw_last=0
[  214.351632] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12445, diff=1, hw=0 hw_last=0
[  214.368212] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12446, diff=1, hw=0 hw_last=0
[  214.384790] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12447, diff=1, hw=0 hw_last=0
[  214.401373] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12448, diff=1, hw=0 hw_last=0
[  214.417955] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12449, diff=1, hw=0 hw_last=0
[  214.550583] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12457, diff=1, hw=0 hw_last=0
[  214.567163] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12458, diff=1, hw=0 hw_last=0
[  214.583742] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12459, diff=1, hw=0 hw_last=0
[  214.600322] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12460, diff=1, hw=0 hw_last=0
[  214.616900] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12461, diff=1, hw=0 hw_last=0
[  214.633481] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12462, diff=1, hw=0 hw_last=0
[  214.650059] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12463, diff=1, hw=0 hw_last=0
[  214.666638] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12464, diff=1, hw=0 hw_last=0
[  214.683217] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12465, diff=1, hw=0 hw_last=0
[  214.699799] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12466, diff=1, hw=0 hw_last=0
[  214.716376] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12467, diff=1, hw=0 hw_last=0
[  214.732954] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12468, diff=1, hw=0 hw_last=0
[  214.749539] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12469, diff=1, hw=0 hw_last=0
[  214.766113] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12470, diff=1, hw=0 hw_last=0
[  214.782692] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12471, diff=1, hw=0 hw_last=0
[  214.799271] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12472, diff=1, hw=0 hw_last=0
[  214.815850] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12473, diff=1, hw=0 hw_last=0
[  214.832429] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12474, diff=1, hw=0 hw_last=0
[  214.849008] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12475, diff=1, hw=0 hw_last=0
[  214.865588] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12476, diff=1, hw=0 hw_last=0
[  214.882167] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12477, diff=1, hw=0 hw_last=0
[  214.898005] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  214.898119] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 12478 to client
[  214.898753] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12478, diff=1, hw=0 hw_last=0
[  214.908376] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  214.908463] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000ace560b
[  214.908533] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  214.908595] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000087081e28 state to 000000000ace560b
[  214.908661] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  214.908722] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 000000000ace560b
[  214.908790] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 0000000087081e28
[  214.908853] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  214.908913] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  214.908973] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  214.909032] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  214.909096] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  214.909156] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  214.909219] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  214.909279] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  214.909339] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000000ace560b
[  214.909402] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  214.909462] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000000ace560b
[  214.909531] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  214.909579] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  214.909610] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000ace560b
[  214.909678] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000006fb5b2d2 to 000000000ace560b
[  214.909740] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000ace560b
[  214.909806] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  214.909868] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  214.909929] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  214.909998] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000000ace560b
[  214.910061] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000ace560b
[  214.910122] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  214.910182] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  214.910243] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  214.910303] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  214.910363] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000ace560b
[  214.911784] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  214.915331] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12479, diff=1, hw=0 hw_last=0
[  214.931909] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12480, diff=1, hw=0 hw_last=0
[  214.948489] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12481, diff=1, hw=0 hw_last=0
[  214.965066] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12482, diff=1, hw=0 hw_last=0
[  214.981651] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12483, diff=1, hw=0 hw_last=0
[  214.998226] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12484, diff=1, hw=0 hw_last=0
[  215.014805] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12485, diff=1, hw=0 hw_last=0
[  215.031389] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12486, diff=1, hw=0 hw_last=0
[  215.047967] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12487, diff=1, hw=0 hw_last=0
[  215.064556] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12488, diff=1, hw=0 hw_last=0
[  215.081127] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12489, diff=1, hw=0 hw_last=0
[  215.140773] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  215.140837] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000087081e28 state to 000000000ace560b
[  215.140905] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  215.140967] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 000000000ace560b
[  215.141035] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000087081e28
[  215.141098] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  215.141159] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  215.141219] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  215.141279] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  215.141343] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  215.141404] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  215.141468] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  215.141528] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  215.141588] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000000ace560b
[  215.141652] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  215.141714] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000000ace560b
[  215.141786] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  215.141832] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  215.141865] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000ace560b
[  215.141934] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000f37c832b to 000000000ace560b
[  215.141996] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000ace560b
[  215.142074] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000ace560b nonblocking
[  215.142184] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  215.142261] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  215.147437] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12493, diff=1, hw=0 hw_last=0
[  215.147537] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000ace560b
[  215.147609] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  215.147673] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  215.147735] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  215.147798] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  215.147864] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000ace560b
[  215.164019] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12494, diff=1, hw=0 hw_last=0
[  215.180596] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12495, diff=1, hw=0 hw_last=0
[  215.197174] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12496, diff=1, hw=0 hw_last=0
[  215.213754] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12497, diff=1, hw=0 hw_last=0
[  215.230331] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12498, diff=1, hw=0 hw_last=0
[  215.246914] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12499, diff=1, hw=0 hw_last=0
[  215.263491] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12500, diff=1, hw=0 hw_last=0
[  215.280070] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12501, diff=1, hw=0 hw_last=0
[  215.296654] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12502, diff=1, hw=0 hw_last=0
[  215.313233] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12503, diff=1, hw=0 hw_last=0
[  215.329806] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12504, diff=1, hw=0 hw_last=0
[  215.346384] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12505, diff=1, hw=0 hw_last=0
[  215.362963] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12506, diff=1, hw=0 hw_last=0
[  215.379543] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12507, diff=1, hw=0 hw_last=0
[  215.396122] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12508, diff=1, hw=0 hw_last=0
[  215.412701] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12509, diff=1, hw=0 hw_last=0
[  215.429281] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12510, diff=1, hw=0 hw_last=0
[  215.445860] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12511, diff=1, hw=0 hw_last=0
[  215.462446] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12512, diff=1, hw=0 hw_last=0
[  215.479022] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12513, diff=1, hw=0 hw_last=0
[  215.495601] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12514, diff=1, hw=0 hw_last=0
[  215.512181] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12515, diff=1, hw=0 hw_last=0
[  215.528759] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12516, diff=1, hw=0 hw_last=0
[  215.545336] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12517, diff=1, hw=0 hw_last=0
[  215.561915] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12518, diff=1, hw=0 hw_last=0
[  215.578494] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12519, diff=1, hw=0 hw_last=0
[  215.595075] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12520, diff=1, hw=0 hw_last=0
[  215.611654] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12521, diff=1, hw=0 hw_last=0
[  215.628232] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12522, diff=1, hw=0 hw_last=0
[  215.644811] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12523, diff=1, hw=0 hw_last=0
[  215.661390] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12524, diff=1, hw=0 hw_last=0
[  215.677972] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12525, diff=1, hw=0 hw_last=0
[  215.694547] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12526, diff=1, hw=0 hw_last=0
[  215.711129] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12527, diff=1, hw=0 hw_last=0
[  215.727710] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12528, diff=1, hw=0 hw_last=0
[  215.744289] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12529, diff=1, hw=0 hw_last=0
[  215.921223] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000006c5644bb
[  215.921288] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006c5644bb
[  215.921351] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  215.921412] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  215.921474] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  215.921536] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  215.921597] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006c5644bb
[  215.923034] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  215.926668] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12540, diff=1, hw=0 hw_last=0
[  215.943243] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12541, diff=1, hw=0 hw_last=0
[  215.959821] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12542, diff=1, hw=0 hw_last=0
[  215.976402] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12543, diff=1, hw=0 hw_last=0
[  215.992982] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12544, diff=1, hw=0 hw_last=0
[  216.009564] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12545, diff=1, hw=0 hw_last=0
[  216.026140] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12546, diff=1, hw=0 hw_last=0
[  216.042719] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12547, diff=1, hw=0 hw_last=0
[  216.059297] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12548, diff=1, hw=0 hw_last=0
[  216.075879] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12549, diff=1, hw=0 hw_last=0
[  216.092460] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12550, diff=1, hw=0 hw_last=0
[  216.109038] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12551, diff=1, hw=0 hw_last=0
[  216.125613] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12552, diff=1, hw=0 hw_last=0
[  216.142193] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12553, diff=1, hw=0 hw_last=0
[  216.151313] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  216.151446] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006c5644bb
[  216.151522] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  216.151584] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000002cafbe1b state to 000000006c5644bb
[  216.151651] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  216.151712] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000e8543c49 state to 000000006c5644bb
[  216.151782] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 000000002cafbe1b
[  216.151846] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  216.151905] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  216.151965] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  216.152025] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  216.152089] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  216.152149] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  216.152212] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  216.152272] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  216.152332] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 000000006c5644bb
[  216.152395] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  216.152457] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000006c5644bb
[  216.152528] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  216.152574] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  216.152606] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006c5644bb
[  216.152674] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000009472d261 to 000000006c5644bb
[  216.152737] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006c5644bb
[  216.152813] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006c5644bb nonblocking
[  216.152912] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  216.152985] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  216.158769] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12554, diff=1, hw=0 hw_last=0
[  216.158864] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006c5644bb
[  216.158944] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  216.159006] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  216.159069] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  216.159131] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  216.159195] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006c5644bb
[  216.175348] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12555, diff=1, hw=0 hw_last=0
[  216.191928] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12556, diff=1, hw=0 hw_last=0
[  216.208507] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12557, diff=1, hw=0 hw_last=0
[  216.225085] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12558, diff=1, hw=0 hw_last=0
[  216.241662] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12559, diff=1, hw=0 hw_last=0
[  216.258246] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12560, diff=1, hw=0 hw_last=0
[  216.274822] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12561, diff=1, hw=0 hw_last=0
[  216.291414] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12562, diff=1, hw=0 hw_last=0
[  216.307995] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12563, diff=1, hw=0 hw_last=0
[  216.324566] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12564, diff=1, hw=0 hw_last=0
[  216.341138] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12565, diff=1, hw=0 hw_last=0
[  216.357716] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12566, diff=1, hw=0 hw_last=0
[  216.374295] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12567, diff=1, hw=0 hw_last=0
[  216.390874] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12568, diff=1, hw=0 hw_last=0
[  216.407454] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12569, diff=1, hw=0 hw_last=0
[  216.556667] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12578, diff=1, hw=0 hw_last=0
[  216.573247] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12579, diff=1, hw=0 hw_last=0
[  216.589825] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12580, diff=1, hw=0 hw_last=0
[  216.606407] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12581, diff=1, hw=0 hw_last=0
[  216.622985] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12582, diff=1, hw=0 hw_last=0
[  216.639562] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12583, diff=1, hw=0 hw_last=0
[  216.656142] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12584, diff=1, hw=0 hw_last=0
[  216.672721] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12585, diff=1, hw=0 hw_last=0
[  216.689300] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12586, diff=1, hw=0 hw_last=0
[  216.705879] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12587, diff=1, hw=0 hw_last=0
[  216.722463] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12588, diff=1, hw=0 hw_last=0
[  216.739042] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12589, diff=1, hw=0 hw_last=0
[  216.755621] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12590, diff=1, hw=0 hw_last=0
[  216.772199] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12591, diff=1, hw=0 hw_last=0
[  216.788776] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12592, diff=1, hw=0 hw_last=0
[  216.805356] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12593, diff=1, hw=0 hw_last=0
[  216.821933] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12594, diff=1, hw=0 hw_last=0
[  216.838515] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12595, diff=1, hw=0 hw_last=0
[  216.855092] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12596, diff=1, hw=0 hw_last=0
[  216.871672] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12597, diff=1, hw=0 hw_last=0
[  216.888250] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12598, diff=1, hw=0 hw_last=0
[  216.904836] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12599, diff=1, hw=0 hw_last=0
[  216.914630] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  216.914746] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 12600 to client
[  216.916017] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  216.916110] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000001477df7c
[  216.916191] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  216.916260] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000215b6887 state to 000000001477df7c
[  216.916329] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  216.916393] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 000000001477df7c
[  216.916463] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000215b6887
[  216.916525] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  216.916585] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  216.916645] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  216.916705] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  216.916769] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  216.916829] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  216.916893] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  216.916953] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  216.917014] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 000000001477df7c
[  216.917077] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  216.917137] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000001477df7c
[  216.917208] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  216.917253] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  216.917284] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000001477df7c
[  216.917352] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000000cc24793 to 000000001477df7c
[  216.917415] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000001477df7c
[  216.917482] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  216.917544] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  216.917606] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  216.917676] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000001477df7c
[  216.917741] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000001477df7c
[  216.917803] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  216.917864] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  216.917925] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  216.917986] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  216.918047] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000001477df7c
[  216.919419] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  216.921420] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12600, diff=1, hw=0 hw_last=0
[  216.937993] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12601, diff=1, hw=0 hw_last=0
[  216.954577] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12602, diff=1, hw=0 hw_last=0
[  216.971153] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12603, diff=1, hw=0 hw_last=0
[  216.987734] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12604, diff=1, hw=0 hw_last=0
[  217.004314] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12605, diff=1, hw=0 hw_last=0
[  217.020891] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12606, diff=1, hw=0 hw_last=0
[  217.037471] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12607, diff=1, hw=0 hw_last=0
[  217.054051] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12608, diff=1, hw=0 hw_last=0
[  217.070633] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12609, diff=1, hw=0 hw_last=0
[  217.203258] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12617, diff=1, hw=0 hw_last=0
[  217.219839] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12618, diff=1, hw=0 hw_last=0
[  217.236417] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12619, diff=1, hw=0 hw_last=0
[  217.252995] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12620, diff=1, hw=0 hw_last=0
[  217.269573] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12621, diff=1, hw=0 hw_last=0
[  217.286155] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12622, diff=1, hw=0 hw_last=0
[  217.302738] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12623, diff=1, hw=0 hw_last=0
[  217.319316] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12624, diff=1, hw=0 hw_last=0
[  217.335889] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12625, diff=1, hw=0 hw_last=0
[  217.352468] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12626, diff=1, hw=0 hw_last=0
[  217.369047] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12627, diff=1, hw=0 hw_last=0
[  217.385626] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12628, diff=1, hw=0 hw_last=0
[  217.402206] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12629, diff=1, hw=0 hw_last=0
[  217.418786] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12630, diff=1, hw=0 hw_last=0
[  217.435364] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12631, diff=1, hw=0 hw_last=0
[  217.451946] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12632, diff=1, hw=0 hw_last=0
[  217.468524] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12633, diff=1, hw=0 hw_last=0
[  217.485104] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12634, diff=1, hw=0 hw_last=0
[  217.501683] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12635, diff=1, hw=0 hw_last=0
[  217.518261] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12636, diff=1, hw=0 hw_last=0
[  217.534839] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12637, diff=1, hw=0 hw_last=0
[  217.551419] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12638, diff=1, hw=0 hw_last=0
[  217.567998] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12639, diff=1, hw=0 hw_last=0
[  217.584579] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12640, diff=1, hw=0 hw_last=0
[  217.601157] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12641, diff=1, hw=0 hw_last=0
[  217.617736] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12642, diff=1, hw=0 hw_last=0
[  217.634318] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12643, diff=1, hw=0 hw_last=0
[  217.650895] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12644, diff=1, hw=0 hw_last=0
[  217.667475] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12645, diff=1, hw=0 hw_last=0
[  217.684054] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12646, diff=1, hw=0 hw_last=0
[  217.700633] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12647, diff=1, hw=0 hw_last=0
[  217.717211] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12648, diff=1, hw=0 hw_last=0
[  217.733791] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12649, diff=1, hw=0 hw_last=0
[  217.750374] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12650, diff=1, hw=0 hw_last=0
[  217.766951] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12651, diff=1, hw=0 hw_last=0
[  217.783527] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12652, diff=1, hw=0 hw_last=0
[  217.800106] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12653, diff=1, hw=0 hw_last=0
[  217.816688] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12654, diff=1, hw=0 hw_last=0
[  217.833265] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12655, diff=1, hw=0 hw_last=0
[  217.849844] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12656, diff=1, hw=0 hw_last=0
[  217.866426] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12657, diff=1, hw=0 hw_last=0
[  217.883006] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12658, diff=1, hw=0 hw_last=0
[  217.899582] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12659, diff=1, hw=0 hw_last=0
[  217.916164] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12660, diff=1, hw=0 hw_last=0
[  217.932743] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12661, diff=1, hw=0 hw_last=0
[  217.949321] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12662, diff=1, hw=0 hw_last=0
[  217.965900] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12663, diff=1, hw=0 hw_last=0
[  217.982479] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12664, diff=1, hw=0 hw_last=0
[  217.999063] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12665, diff=1, hw=0 hw_last=0
[  218.002909] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  218.003034] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 12666 to client
[  218.008297] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  218.008386] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000029aaf162
[  218.008457] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  218.008518] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000bac3ec2d state to 0000000029aaf162
[  218.008584] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  218.008645] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 0000000029aaf162
[  218.008714] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000bac3ec2d
[  218.008777] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  218.008837] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  218.008896] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  218.008956] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  218.009019] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  218.240141] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000029aaf162
[  218.240216] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  218.240280] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000bac3ec2d state to 0000000029aaf162
[  218.240348] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  218.240409] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 0000000029aaf162
[  218.240478] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000bac3ec2d
[  218.240543] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  218.240603] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  218.240663] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  218.240723] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  218.240787] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  218.240847] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  218.240912] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  218.240973] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  218.241033] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 0000000029aaf162
[  218.241096] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  218.241158] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000029aaf162
[  218.241230] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  218.241275] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  218.241307] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000029aaf162
[  218.241374] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000000cc24793 to 0000000029aaf162
[  218.241437] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000029aaf162
[  218.241513] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000029aaf162 nonblocking
[  218.241615] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  218.241693] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  218.247749] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12680, diff=1, hw=0 hw_last=0
[  218.247864] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000029aaf162
[  218.247934] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  218.247997] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  218.248058] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  218.248120] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  218.248184] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000029aaf162
[  218.264327] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12681, diff=1, hw=0 hw_last=0
[  218.280904] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12682, diff=1, hw=0 hw_last=0
[  218.297485] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12683, diff=1, hw=0 hw_last=0
[  218.314061] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12684, diff=1, hw=0 hw_last=0
[  218.330641] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12685, diff=1, hw=0 hw_last=0
[  218.347222] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12686, diff=1, hw=0 hw_last=0
[  218.363801] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12687, diff=1, hw=0 hw_last=0
[  218.380380] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12688, diff=1, hw=0 hw_last=0
[  218.396959] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12689, diff=1, hw=0 hw_last=0
[  218.413545] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12690, diff=1, hw=0 hw_last=0
[  218.430120] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12691, diff=1, hw=0 hw_last=0
[  218.446697] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12692, diff=1, hw=0 hw_last=0
[  218.463277] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12693, diff=1, hw=0 hw_last=0
[  218.479855] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12694, diff=1, hw=0 hw_last=0
[  218.496435] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12695, diff=1, hw=0 hw_last=0
[  218.513012] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12696, diff=1, hw=0 hw_last=0
[  218.529592] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12697, diff=1, hw=0 hw_last=0
[  218.546178] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12698, diff=1, hw=0 hw_last=0
[  218.562756] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12699, diff=1, hw=0 hw_last=0
[  218.579335] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12700, diff=1, hw=0 hw_last=0
[  218.595914] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12701, diff=1, hw=0 hw_last=0
[  218.612493] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12702, diff=1, hw=0 hw_last=0
[  218.629071] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12703, diff=1, hw=0 hw_last=0
[  218.645653] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12704, diff=1, hw=0 hw_last=0
[  218.662232] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12705, diff=1, hw=0 hw_last=0
[  218.678811] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12706, diff=1, hw=0 hw_last=0
[  218.695388] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12707, diff=1, hw=0 hw_last=0
[  218.711967] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12708, diff=1, hw=0 hw_last=0
[  218.728549] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12709, diff=1, hw=0 hw_last=0
[  218.745126] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12710, diff=1, hw=0 hw_last=0
[  218.761705] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12711, diff=1, hw=0 hw_last=0
[  218.778284] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12712, diff=1, hw=0 hw_last=0
[  218.794864] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12713, diff=1, hw=0 hw_last=0
[  218.811443] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12714, diff=1, hw=0 hw_last=0
[  218.828022] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12715, diff=1, hw=0 hw_last=0
[  218.960659] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12723, diff=1, hw=0 hw_last=0
[  218.977234] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12724, diff=1, hw=0 hw_last=0
[  218.993815] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12725, diff=1, hw=0 hw_last=0
[  219.010397] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12726, diff=1, hw=0 hw_last=0
[  219.026974] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12727, diff=1, hw=0 hw_last=0
[  219.043553] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12728, diff=1, hw=0 hw_last=0
[  219.060129] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12729, diff=1, hw=0 hw_last=0
[  219.076713] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12730, diff=1, hw=0 hw_last=0
[  219.090719] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  219.090833] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 12731 to client
[  219.093297] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12731, diff=1, hw=0 hw_last=0
[  219.102100] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  219.102188] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006e1bef3e
[  219.102259] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  219.102321] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000003519e999 state to 000000006e1bef3e
[  219.102386] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  219.102448] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 000000006e1bef3e
[  219.102516] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 000000003519e999
[  219.102579] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  219.102639] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  219.102698] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  219.102757] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  219.102822] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  219.102882] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  219.102946] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  219.103006] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  219.103065] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 000000006e1bef3e
[  219.103128] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  219.103189] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000006e1bef3e
[  219.103259] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  219.103305] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  219.103337] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006e1bef3e
[  219.103420] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000006c5644bb to 000000006e1bef3e
[  219.103484] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006e1bef3e
[  219.103554] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  219.103616] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  219.103679] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  219.103749] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000006e1bef3e
[  219.103815] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006e1bef3e
[  219.103876] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  219.103937] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  219.103997] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  219.104058] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  219.104118] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006e1bef3e
[  219.105494] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  219.109875] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12732, diff=1, hw=0 hw_last=0
[  219.126454] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12733, diff=1, hw=0 hw_last=0
[  219.143031] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12734, diff=1, hw=0 hw_last=0
[  219.159612] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12735, diff=1, hw=0 hw_last=0
[  219.176192] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12736, diff=1, hw=0 hw_last=0
[  219.192770] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12737, diff=1, hw=0 hw_last=0
[  219.209351] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12738, diff=1, hw=0 hw_last=0
[  219.225931] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12739, diff=1, hw=0 hw_last=0
[  219.242514] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12740, diff=1, hw=0 hw_last=0
[  219.259093] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12741, diff=1, hw=0 hw_last=0
[  219.275669] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12742, diff=1, hw=0 hw_last=0
[  219.292244] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12743, diff=1, hw=0 hw_last=0
[  219.308823] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12744, diff=1, hw=0 hw_last=0
[  219.325404] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12745, diff=1, hw=0 hw_last=0
[  219.333557] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  219.333663] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006e1bef3e
[  219.333741] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  219.333803] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000003519e999 state to 000000006e1bef3e
[  219.333870] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  219.333931] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 000000006e1bef3e
[  219.334000] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 000000003519e999
[  219.334063] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  219.334124] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  219.334185] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  219.334245] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  219.334309] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  219.334369] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  219.334433] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  219.334493] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  219.334554] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 000000006e1bef3e
[  219.334956] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006e1bef3e
[  219.335033] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006e1bef3e nonblocking
[  219.335138] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  219.335225] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  219.341978] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12746, diff=1, hw=0 hw_last=0
[  219.342088] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006e1bef3e
[  219.342176] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  219.342251] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  219.342324] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  219.342398] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  219.342472] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006e1bef3e
[  219.358555] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12747, diff=1, hw=0 hw_last=0
[  219.375137] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12748, diff=1, hw=0 hw_last=0
[  219.391716] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12749, diff=1, hw=0 hw_last=0
[  219.408292] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12750, diff=1, hw=0 hw_last=0
[  219.424873] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12751, diff=1, hw=0 hw_last=0
[  219.441454] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12752, diff=1, hw=0 hw_last=0
[  219.458031] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12753, diff=1, hw=0 hw_last=0
[  219.474612] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12754, diff=1, hw=0 hw_last=0
[  219.491194] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12755, diff=1, hw=0 hw_last=0
[  219.507772] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12756, diff=1, hw=0 hw_last=0
[  219.524346] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12757, diff=1, hw=0 hw_last=0
[  219.540927] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12758, diff=1, hw=0 hw_last=0
[  219.557503] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12759, diff=1, hw=0 hw_last=0
[  219.574082] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12760, diff=1, hw=0 hw_last=0
[  219.590661] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12761, diff=1, hw=0 hw_last=0
[  219.607240] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12762, diff=1, hw=0 hw_last=0
[  219.623821] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12763, diff=1, hw=0 hw_last=0
[  219.627749] systemd-journald[214]: Data hash table of /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal has a fill level at 75.1 (2732 of 3640 items, 2097152 file size, 767 bytes per hash table item), suggesting rotation.
[  219.649542] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12764, diff=1, hw=0 hw_last=0
[  219.649699] systemd-journald[214]: /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal: Journal header limits reached or header out-of-date, rotating.
[  219.669776] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12765, diff=1, hw=0 hw_last=0
[  219.673566] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12766, diff=1, hw=0 hw_last=0
[  219.690143] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12767, diff=1, hw=0 hw_last=0
[  219.706720] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12768, diff=1, hw=0 hw_last=0
[  219.723300] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12769, diff=1, hw=0 hw_last=0
[  219.739880] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12770, diff=1, hw=0 hw_last=0
[  219.756455] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12771, diff=1, hw=0 hw_last=0
[  219.773037] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12772, diff=1, hw=0 hw_last=0
[  219.789616] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12773, diff=1, hw=0 hw_last=0
[  219.806192] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12774, diff=1, hw=0 hw_last=0
[  219.822770] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12775, diff=1, hw=0 hw_last=0
[  219.839352] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12776, diff=1, hw=0 hw_last=0
[  219.855929] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12777, diff=1, hw=0 hw_last=0
[  219.872510] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12778, diff=1, hw=0 hw_last=0
[  219.889090] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12779, diff=1, hw=0 hw_last=0
[  219.905669] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12780, diff=1, hw=0 hw_last=0
[  219.922254] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12781, diff=1, hw=0 hw_last=0
[  219.938830] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12782, diff=1, hw=0 hw_last=0
[  219.955406] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12783, diff=1, hw=0 hw_last=0
[  219.971987] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12784, diff=1, hw=0 hw_last=0
[  219.988565] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12785, diff=1, hw=0 hw_last=0
[  220.005144] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12786, diff=1, hw=0 hw_last=0
[  220.021725] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12787, diff=1, hw=0 hw_last=0
[  220.038303] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12788, diff=1, hw=0 hw_last=0
[  220.054886] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12789, diff=1, hw=0 hw_last=0
[  220.071463] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12790, diff=1, hw=0 hw_last=0
[  220.088041] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12791, diff=1, hw=0 hw_last=0
[  220.104618] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12792, diff=1, hw=0 hw_last=0
[  220.121198] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12793, diff=1, hw=0 hw_last=0
[  220.220680] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12799, diff=1, hw=0 hw_last=0
[  220.237260] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12800, diff=1, hw=0 hw_last=0
[  220.253839] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12801, diff=1, hw=0 hw_last=0
[  220.270420] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12802, diff=1, hw=0 hw_last=0
[  220.286997] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12803, diff=1, hw=0 hw_last=0
[  220.303579] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12804, diff=1, hw=0 hw_last=0
[  220.320164] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12805, diff=1, hw=0 hw_last=0
[  220.336738] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12806, diff=1, hw=0 hw_last=0
[  220.353313] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12807, diff=1, hw=0 hw_last=0
[  220.369896] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12808, diff=1, hw=0 hw_last=0
[  220.386472] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12809, diff=1, hw=0 hw_last=0
[  220.403051] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12810, diff=1, hw=0 hw_last=0
[  220.414468] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  220.414575] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000ab379aee
[  220.414653] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  220.414716] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000fefb5c61 state to 00000000ab379aee
[  220.414784] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  220.414845] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a743c9a8 state to 00000000ab379aee
[  220.414916] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000fefb5c61
[  220.414979] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  220.415041] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  220.415102] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  220.415163] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  220.415227] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  220.415289] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  220.415353] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  220.415455] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  220.415522] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 00000000ab379aee
[  220.415589] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  220.415656] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000ab379aee
[  220.415727] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  220.415772] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  220.415804] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000ab379aee
[  220.415875] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000006fb5b2d2 to 00000000ab379aee
[  220.415938] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000ab379aee
[  220.416015] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000ab379aee nonblocking
[  220.416120] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  220.416199] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  220.419625] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12811, diff=1, hw=0 hw_last=0
[  220.419730] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ab379aee
[  220.419799] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  220.419862] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  220.419923] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  220.419986] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  220.420049] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ab379aee
[  220.436204] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12812, diff=1, hw=0 hw_last=0
[  220.452786] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12813, diff=1, hw=0 hw_last=0
[  220.469362] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12814, diff=1, hw=0 hw_last=0
[  220.485941] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12815, diff=1, hw=0 hw_last=0
[  220.502522] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12816, diff=1, hw=0 hw_last=0
[  220.519102] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12817, diff=1, hw=0 hw_last=0
[  220.535680] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12818, diff=1, hw=0 hw_last=0
[  220.552260] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12819, diff=1, hw=0 hw_last=0
[  220.568844] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12820, diff=1, hw=0 hw_last=0
[  220.585422] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12821, diff=1, hw=0 hw_last=0
[  220.601996] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12822, diff=1, hw=0 hw_last=0
[  220.618573] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12823, diff=1, hw=0 hw_last=0
[  220.635152] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12824, diff=1, hw=0 hw_last=0
[  220.651731] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12825, diff=1, hw=0 hw_last=0
[  220.668310] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12826, diff=1, hw=0 hw_last=0
[  220.684889] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12827, diff=1, hw=0 hw_last=0
[  220.701470] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12828, diff=1, hw=0 hw_last=0
[  220.718053] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12829, diff=1, hw=0 hw_last=0
[  220.734631] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12830, diff=1, hw=0 hw_last=0
[  220.751209] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12831, diff=1, hw=0 hw_last=0
[  220.767790] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12832, diff=1, hw=0 hw_last=0
[  220.784371] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12833, diff=1, hw=0 hw_last=0
[  220.916999] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12841, diff=1, hw=0 hw_last=0
[  220.933578] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12842, diff=1, hw=0 hw_last=0
[  220.950157] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12843, diff=1, hw=0 hw_last=0
[  220.966741] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12844, diff=1, hw=0 hw_last=0
[  220.983317] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12845, diff=1, hw=0 hw_last=0
[  220.999902] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12846, diff=1, hw=0 hw_last=0
[  221.016477] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12847, diff=1, hw=0 hw_last=0
[  221.033054] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12848, diff=1, hw=0 hw_last=0
[  221.049637] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12849, diff=1, hw=0 hw_last=0
[  221.066212] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12850, diff=1, hw=0 hw_last=0
[  221.082791] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12851, diff=1, hw=0 hw_last=0
[  221.099374] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12852, diff=1, hw=0 hw_last=0
[  221.115953] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12853, diff=1, hw=0 hw_last=0
[  221.132534] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12854, diff=1, hw=0 hw_last=0
[  221.149113] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12855, diff=1, hw=0 hw_last=0
[  221.165690] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12856, diff=1, hw=0 hw_last=0
[  221.182266] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12857, diff=1, hw=0 hw_last=0
[  221.198846] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12858, diff=1, hw=0 hw_last=0
[  221.215427] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12859, diff=1, hw=0 hw_last=0
[  221.232010] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12860, diff=1, hw=0 hw_last=0
[  221.241435] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  221.241546] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 12861 to client
[  221.242815] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  221.242910] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000fde3661d
[  221.242989] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  221.243059] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000055579822 state to 00000000fde3661d
[  221.243130] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  221.243195] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 00000000fde3661d
[  221.243264] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 0000000055579822
[  221.243327] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  221.243415] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  221.243486] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  221.243552] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  221.243622] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  221.243685] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  221.243752] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  221.243813] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  221.243876] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 00000000fde3661d
[  221.243942] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  221.244005] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000fde3661d
[  221.244075] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  221.244121] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  221.244153] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000fde3661d
[  221.244223] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000ab379aee to 00000000fde3661d
[  221.244286] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000fde3661d
[  221.244352] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  221.244415] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  221.244478] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  221.244548] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 00000000fde3661d
[  221.244612] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000fde3661d
[  221.244674] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  221.244735] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  221.244796] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  221.244857] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  221.244918] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000fde3661d
[  221.246264] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  221.248594] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12861, diff=1, hw=0 hw_last=0
[  221.265171] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12862, diff=1, hw=0 hw_last=0
[  221.281750] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12863, diff=1, hw=0 hw_last=0
[  221.298327] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12864, diff=1, hw=0 hw_last=0
[  221.314909] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12865, diff=1, hw=0 hw_last=0
[  221.331489] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12866, diff=1, hw=0 hw_last=0
[  221.348068] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12867, diff=1, hw=0 hw_last=0
[  221.364644] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12868, diff=1, hw=0 hw_last=0
[  221.381226] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12869, diff=1, hw=0 hw_last=0
[  221.397807] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12870, diff=1, hw=0 hw_last=0
[  221.414385] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12871, diff=1, hw=0 hw_last=0
[  221.430965] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12872, diff=1, hw=0 hw_last=0
[  221.447540] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12873, diff=1, hw=0 hw_last=0
[  221.911752] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12901, diff=1, hw=0 hw_last=0
[  221.928329] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12902, diff=1, hw=0 hw_last=0
[  221.944911] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12903, diff=1, hw=0 hw_last=0
[  221.961487] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12904, diff=1, hw=0 hw_last=0
[  221.978070] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12905, diff=1, hw=0 hw_last=0
[  221.994650] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12906, diff=1, hw=0 hw_last=0
[  222.011231] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12907, diff=1, hw=0 hw_last=0
[  222.027810] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12908, diff=1, hw=0 hw_last=0
[  222.044387] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12909, diff=1, hw=0 hw_last=0
[  222.060968] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12910, diff=1, hw=0 hw_last=0
[  222.077546] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12911, diff=1, hw=0 hw_last=0
[  222.094124] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12912, diff=1, hw=0 hw_last=0
[  222.110705] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12913, diff=1, hw=0 hw_last=0
[  222.127286] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12914, diff=1, hw=0 hw_last=0
[  222.143865] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12915, diff=1, hw=0 hw_last=0
[  222.160441] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12916, diff=1, hw=0 hw_last=0
[  222.177020] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12917, diff=1, hw=0 hw_last=0
[  222.193605] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12918, diff=1, hw=0 hw_last=0
[  222.210180] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12919, diff=1, hw=0 hw_last=0
[  222.226762] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12920, diff=1, hw=0 hw_last=0
[  222.236637] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  222.236759] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 12921 to client
[  222.238051] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  222.238162] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000eae20a14
[  222.238247] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  222.238320] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000087081e28 state to 00000000eae20a14
[  222.238397] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  222.238469] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 00000000eae20a14
[  222.238549] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000087081e28
[  222.238624] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  222.238698] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  222.238771] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  222.238846] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  222.238921] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  222.238993] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  222.239068] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  222.239139] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  222.239210] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 00000000eae20a14
[  222.239284] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  222.239383] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000eae20a14
[  222.239475] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  222.239525] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  222.239566] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000eae20a14
[  222.239652] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000006e1bef3e to 00000000eae20a14
[  222.239728] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000eae20a14
[  222.239807] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  222.239881] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  222.239956] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  222.240037] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 00000000eae20a14
[  222.240113] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000eae20a14
[  222.240186] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  222.240259] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  222.240331] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  222.240403] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  222.240476] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000eae20a14
[  222.241855] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  222.243347] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12921, diff=1, hw=0 hw_last=0
[  222.259922] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12922, diff=1, hw=0 hw_last=0
[  222.276501] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12923, diff=1, hw=0 hw_last=0
[  222.293081] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12924, diff=1, hw=0 hw_last=0
[  222.309658] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12925, diff=1, hw=0 hw_last=0
[  222.326241] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12926, diff=1, hw=0 hw_last=0
[  222.342823] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12927, diff=1, hw=0 hw_last=0
[  222.359399] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12928, diff=1, hw=0 hw_last=0
[  222.375978] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12929, diff=1, hw=0 hw_last=0
[  222.392560] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12930, diff=1, hw=0 hw_last=0
[  222.409136] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12931, diff=1, hw=0 hw_last=0
[  222.425717] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12932, diff=1, hw=0 hw_last=0
[  222.470065] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 00000000eae20a14
[  222.470144] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 0000000087081e28
[  222.470218] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  222.470289] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  222.470361] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  222.470431] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  222.470506] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  222.470577] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  222.470652] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  222.470724] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  222.470795] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 00000000eae20a14
[  222.470870] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  222.470943] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000eae20a14
[  222.471033] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  222.471083] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  222.471119] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000eae20a14
[  222.471201] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000006c5644bb to 00000000eae20a14
[  222.471275] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000eae20a14
[  222.471402] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000eae20a14 nonblocking
[  222.471520] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  222.471596] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  222.475448] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12935, diff=1, hw=0 hw_last=0
[  222.475553] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000eae20a14
[  222.475627] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  222.475690] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  222.475751] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  222.475813] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  222.475876] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000eae20a14
[  222.492027] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12936, diff=1, hw=0 hw_last=0
[  222.508605] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12937, diff=1, hw=0 hw_last=0
[  222.525182] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12938, diff=1, hw=0 hw_last=0
[  222.541763] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12939, diff=1, hw=0 hw_last=0
[  222.558341] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12940, diff=1, hw=0 hw_last=0
[  222.574920] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12941, diff=1, hw=0 hw_last=0
[  222.591502] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12942, diff=1, hw=0 hw_last=0
[  222.608080] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12943, diff=1, hw=0 hw_last=0
[  222.624658] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12944, diff=1, hw=0 hw_last=0
[  222.641242] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12945, diff=1, hw=0 hw_last=0
[  222.657819] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12946, diff=1, hw=0 hw_last=0
[  222.674395] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12947, diff=1, hw=0 hw_last=0
[  222.690974] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12948, diff=1, hw=0 hw_last=0
[  222.707553] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12949, diff=1, hw=0 hw_last=0
[  222.724131] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12950, diff=1, hw=0 hw_last=0
[  222.740711] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12951, diff=1, hw=0 hw_last=0
[  222.757290] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12952, diff=1, hw=0 hw_last=0
[  222.773868] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12953, diff=1, hw=0 hw_last=0
[  222.790454] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12954, diff=1, hw=0 hw_last=0
[  222.807032] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12955, diff=1, hw=0 hw_last=0
[  222.823611] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12956, diff=1, hw=0 hw_last=0
[  222.840188] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12957, diff=1, hw=0 hw_last=0
[  222.856767] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12958, diff=1, hw=0 hw_last=0
[  222.873345] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12959, diff=1, hw=0 hw_last=0
[  222.889925] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12960, diff=1, hw=0 hw_last=0
[  222.906504] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12961, diff=1, hw=0 hw_last=0
[  222.923082] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12962, diff=1, hw=0 hw_last=0
[  222.939662] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12963, diff=1, hw=0 hw_last=0
[  222.956241] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12964, diff=1, hw=0 hw_last=0
[  222.972819] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12965, diff=1, hw=0 hw_last=0
[  222.989401] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12966, diff=1, hw=0 hw_last=0
[  223.005981] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12967, diff=1, hw=0 hw_last=0
[  223.022564] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12968, diff=1, hw=0 hw_last=0
[  223.039138] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12969, diff=1, hw=0 hw_last=0
[  223.055719] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12970, diff=1, hw=0 hw_last=0
[  223.072299] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12971, diff=1, hw=0 hw_last=0
[  223.088876] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12972, diff=1, hw=0 hw_last=0
[  223.105454] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12973, diff=1, hw=0 hw_last=0
[  223.481900] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  223.481948] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  223.481984] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008e9f664b
[  223.482064] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000001477df7c to 000000008e9f664b
[  223.482137] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008e9f664b
[  223.482224] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000008e9f664b nonblocking
[  223.482343] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  223.482422] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  223.486778] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12996, diff=1, hw=0 hw_last=0
[  223.486891] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008e9f664b
[  223.486959] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  223.487021] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  223.487084] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  223.487147] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  223.487211] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008e9f664b
[  223.503359] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12997, diff=1, hw=0 hw_last=0
[  223.519934] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12998, diff=1, hw=0 hw_last=0
[  223.536514] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=12999, diff=1, hw=0 hw_last=0
[  223.553092] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13000, diff=1, hw=0 hw_last=0
[  223.569673] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13001, diff=1, hw=0 hw_last=0
[  223.586250] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13002, diff=1, hw=0 hw_last=0
[  223.602834] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13003, diff=1, hw=0 hw_last=0
[  223.619411] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13004, diff=1, hw=0 hw_last=0
[  223.635990] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13005, diff=1, hw=0 hw_last=0
[  223.652571] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13006, diff=1, hw=0 hw_last=0
[  223.669149] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13007, diff=1, hw=0 hw_last=0
[  223.685724] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13008, diff=1, hw=0 hw_last=0
[  223.702303] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13009, diff=1, hw=0 hw_last=0
[  223.718882] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13010, diff=1, hw=0 hw_last=0
[  223.735461] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13011, diff=1, hw=0 hw_last=0
[  223.752040] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13012, diff=1, hw=0 hw_last=0
[  223.768618] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13013, diff=1, hw=0 hw_last=0
[  223.785199] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13014, diff=1, hw=0 hw_last=0
[  223.801783] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13015, diff=1, hw=0 hw_last=0
[  223.818363] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13016, diff=1, hw=0 hw_last=0
[  223.834940] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13017, diff=1, hw=0 hw_last=0
[  223.851520] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13018, diff=1, hw=0 hw_last=0
[  223.868100] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13019, diff=1, hw=0 hw_last=0
[  223.884679] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13020, diff=1, hw=0 hw_last=0
[  223.901256] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13021, diff=1, hw=0 hw_last=0
[  223.917834] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13022, diff=1, hw=0 hw_last=0
[  223.934434] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13023, diff=1, hw=0 hw_last=0
[  223.950993] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13024, diff=1, hw=0 hw_last=0
[  223.967572] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13025, diff=1, hw=0 hw_last=0
[  223.984154] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13026, diff=1, hw=0 hw_last=0
[  224.000731] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13027, diff=1, hw=0 hw_last=0
[  224.017311] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13028, diff=1, hw=0 hw_last=0
[  224.033888] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13029, diff=1, hw=0 hw_last=0
[  224.050472] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13030, diff=1, hw=0 hw_last=0
[  224.067050] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13031, diff=1, hw=0 hw_last=0
[  224.083628] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13032, diff=1, hw=0 hw_last=0
[  224.100205] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13033, diff=1, hw=0 hw_last=0
[  224.116789] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13034, diff=1, hw=0 hw_last=0
[  224.133366] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13035, diff=1, hw=0 hw_last=0
[  224.149950] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13036, diff=1, hw=0 hw_last=0
[  224.166523] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13037, diff=1, hw=0 hw_last=0
[  224.183103] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13038, diff=1, hw=0 hw_last=0
[  224.199681] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13039, diff=1, hw=0 hw_last=0
[  224.216261] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13040, diff=1, hw=0 hw_last=0
[  224.232838] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13041, diff=1, hw=0 hw_last=0
[  224.249418] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13042, diff=1, hw=0 hw_last=0
[  224.325413] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000215b6887 state to 00000000e0dcab9c
[  224.325490] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  224.325563] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000e8543c49 state to 00000000e0dcab9c
[  224.325642] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000215b6887
[  224.325717] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  224.325788] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  224.325861] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  224.325932] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  224.326007] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  224.326079] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  224.326154] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  224.326226] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  224.326298] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 00000000e0dcab9c
[  224.326372] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  224.326445] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000e0dcab9c
[  224.326527] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  224.326573] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  224.326609] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000e0dcab9c
[  224.326689] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000008e9f664b to 00000000e0dcab9c
[  224.326763] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000e0dcab9c
[  224.326841] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  224.326913] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  224.326987] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  224.327069] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 00000000e0dcab9c
[  224.327144] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e0dcab9c
[  224.327218] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  224.327290] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  224.327381] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  224.327459] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  224.327533] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e0dcab9c
[  224.328898] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  224.332323] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13047, diff=1, hw=0 hw_last=0
[  224.348902] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13048, diff=1, hw=0 hw_last=0
[  224.365479] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13049, diff=1, hw=0 hw_last=0
[  224.382058] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13050, diff=1, hw=0 hw_last=0
[  224.398643] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13051, diff=1, hw=0 hw_last=0
[  224.415222] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13052, diff=1, hw=0 hw_last=0
[  224.431798] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13053, diff=1, hw=0 hw_last=0
[  224.448377] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13054, diff=1, hw=0 hw_last=0
[  224.464958] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13055, diff=1, hw=0 hw_last=0
[  224.481538] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13056, diff=1, hw=0 hw_last=0
[  224.498116] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13057, diff=1, hw=0 hw_last=0
[  224.514695] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13058, diff=1, hw=0 hw_last=0
[  224.531272] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13059, diff=1, hw=0 hw_last=0
[  224.547851] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13060, diff=1, hw=0 hw_last=0
[  224.556468] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  224.556579] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e0dcab9c
[  224.556666] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  224.556739] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000215b6887 state to 00000000e0dcab9c
[  224.556817] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  224.556890] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000e8543c49 state to 00000000e0dcab9c
[  224.556970] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000215b6887
[  224.557044] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  224.557116] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  224.557187] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  224.557259] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  224.557333] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  224.557405] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  224.557481] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  224.557553] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  224.557626] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 00000000e0dcab9c
[  224.557700] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  224.557773] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000e0dcab9c
[  224.557855] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  224.557904] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  224.557941] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000e0dcab9c
[  224.558021] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000029aaf162 to 00000000e0dcab9c
[  224.558095] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000e0dcab9c
[  224.558182] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e0dcab9c nonblocking
[  224.558297] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  224.558368] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  224.564427] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13061, diff=1, hw=0 hw_last=0
[  224.564532] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e0dcab9c
[  224.564604] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  224.630742] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13065, diff=1, hw=0 hw_last=0
[  224.647322] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13066, diff=1, hw=0 hw_last=0
[  224.663903] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13067, diff=1, hw=0 hw_last=0
[  224.680480] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13068, diff=1, hw=0 hw_last=0
[  224.697058] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13069, diff=1, hw=0 hw_last=0
[  224.713641] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13070, diff=1, hw=0 hw_last=0
[  224.730221] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13071, diff=1, hw=0 hw_last=0
[  224.746796] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13072, diff=1, hw=0 hw_last=0
[  224.763372] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13073, diff=1, hw=0 hw_last=0
[  224.779952] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13074, diff=1, hw=0 hw_last=0
[  224.796531] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13075, diff=1, hw=0 hw_last=0
[  224.813110] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13076, diff=1, hw=0 hw_last=0
[  224.829689] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13077, diff=1, hw=0 hw_last=0
[  224.846267] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13078, diff=1, hw=0 hw_last=0
[  224.862846] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13079, diff=1, hw=0 hw_last=0
[  224.879432] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13080, diff=1, hw=0 hw_last=0
[  224.896012] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13081, diff=1, hw=0 hw_last=0
[  224.912591] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13082, diff=1, hw=0 hw_last=0
[  224.929168] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13083, diff=1, hw=0 hw_last=0
[  224.945748] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13084, diff=1, hw=0 hw_last=0
[  224.962326] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13085, diff=1, hw=0 hw_last=0
[  224.978903] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13086, diff=1, hw=0 hw_last=0
[  224.995482] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13087, diff=1, hw=0 hw_last=0
[  225.012062] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13088, diff=1, hw=0 hw_last=0
[  225.028642] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13089, diff=1, hw=0 hw_last=0
[  225.045221] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13090, diff=1, hw=0 hw_last=0
[  225.061804] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13091, diff=1, hw=0 hw_last=0
[  225.078379] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13092, diff=1, hw=0 hw_last=0
[  225.094960] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13093, diff=1, hw=0 hw_last=0
[  225.111554] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13094, diff=1, hw=0 hw_last=0
[  225.128119] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13095, diff=1, hw=0 hw_last=0
[  225.144694] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13096, diff=1, hw=0 hw_last=0
[  225.161274] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13097, diff=1, hw=0 hw_last=0
[  225.177852] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13098, diff=1, hw=0 hw_last=0
[  225.194432] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13099, diff=1, hw=0 hw_last=0
[  225.211013] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13100, diff=1, hw=0 hw_last=0
[  225.227591] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13101, diff=1, hw=0 hw_last=0
[  225.244169] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13102, diff=1, hw=0 hw_last=0
[  225.260747] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13103, diff=1, hw=0 hw_last=0
[  225.277327] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13104, diff=1, hw=0 hw_last=0
[  225.293906] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13105, diff=1, hw=0 hw_last=0
[  225.310485] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13106, diff=1, hw=0 hw_last=0
[  225.327064] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13107, diff=1, hw=0 hw_last=0
[  225.343644] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13108, diff=1, hw=0 hw_last=0
[  225.360223] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13109, diff=1, hw=0 hw_last=0
[  225.376803] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13110, diff=1, hw=0 hw_last=0
[  225.393393] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13111, diff=1, hw=0 hw_last=0
[  225.393873] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  225.393981] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 13112 to client
[  225.402259] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  225.402366] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000071ef6b0b
[  225.402450] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  225.402522] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000bac3ec2d state to 0000000071ef6b0b
[  225.402600] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  225.402672] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 0000000071ef6b0b
[  225.402753] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000bac3ec2d
[  225.402827] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  225.402898] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  225.402969] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  225.403040] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  225.403114] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  225.403186] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  225.403262] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  225.403334] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  225.403423] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 0000000071ef6b0b
[  225.625494] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13125, diff=1, hw=0 hw_last=0
[  225.634141] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  225.634254] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000071ef6b0b
[  225.634340] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  225.634413] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000bac3ec2d state to 0000000071ef6b0b
[  225.634492] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  225.634564] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 0000000071ef6b0b
[  225.634644] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000bac3ec2d
[  225.634719] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  225.634790] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  225.634861] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  225.634933] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  225.635007] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  225.635078] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  225.635153] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  225.635225] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  225.635297] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 0000000071ef6b0b
[  225.635410] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  225.635492] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000071ef6b0b
[  225.635577] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  225.635626] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  225.635662] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000071ef6b0b
[  225.635744] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000006e1bef3e to 0000000071ef6b0b
[  225.635819] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000071ef6b0b
[  225.635907] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000071ef6b0b nonblocking
[  225.636016] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  225.636087] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  225.642071] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13126, diff=1, hw=0 hw_last=0
[  225.642164] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000071ef6b0b
[  225.642239] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  225.642301] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  225.642363] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  225.642425] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  225.642488] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000071ef6b0b
[  225.658649] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13127, diff=1, hw=0 hw_last=0
[  225.675230] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13128, diff=1, hw=0 hw_last=0
[  225.691808] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13129, diff=1, hw=0 hw_last=0
[  225.708387] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13130, diff=1, hw=0 hw_last=0
[  225.724967] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13131, diff=1, hw=0 hw_last=0
[  225.741546] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13132, diff=1, hw=0 hw_last=0
[  225.758125] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13133, diff=1, hw=0 hw_last=0
[  225.774705] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13134, diff=1, hw=0 hw_last=0
[  225.791285] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13135, diff=1, hw=0 hw_last=0
[  225.807863] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13136, diff=1, hw=0 hw_last=0
[  225.824442] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13137, diff=1, hw=0 hw_last=0
[  225.841018] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13138, diff=1, hw=0 hw_last=0
[  225.857597] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13139, diff=1, hw=0 hw_last=0
[  225.874176] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13140, diff=1, hw=0 hw_last=0
[  225.890756] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13141, diff=1, hw=0 hw_last=0
[  225.907335] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13142, diff=1, hw=0 hw_last=0
[  225.923914] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13143, diff=1, hw=0 hw_last=0
[  225.940494] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13144, diff=1, hw=0 hw_last=0
[  225.957078] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13145, diff=1, hw=0 hw_last=0
[  225.973655] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13146, diff=1, hw=0 hw_last=0
[  225.990234] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13147, diff=1, hw=0 hw_last=0
[  226.006811] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13148, diff=1, hw=0 hw_last=0
[  226.023393] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13149, diff=1, hw=0 hw_last=0
[  226.039971] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13150, diff=1, hw=0 hw_last=0
[  226.056550] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13151, diff=1, hw=0 hw_last=0
[  226.073129] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13152, diff=1, hw=0 hw_last=0
[  226.089708] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13153, diff=1, hw=0 hw_last=0
[  226.106287] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13154, diff=1, hw=0 hw_last=0
[  226.122865] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13155, diff=1, hw=0 hw_last=0
[  226.139447] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13156, diff=1, hw=0 hw_last=0
[  226.156026] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13157, diff=1, hw=0 hw_last=0
[  226.172608] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13158, diff=1, hw=0 hw_last=0
[  226.189183] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13159, diff=1, hw=0 hw_last=0
[  226.722221] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  226.722335] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000018d86a98
[  226.722422] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  226.722496] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000082b4fa6a state to 0000000018d86a98
[  226.722573] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  226.722646] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000adb7ad91 state to 0000000018d86a98
[  226.722726] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 0000000082b4fa6a
[  226.722801] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  226.722872] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  226.722943] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  226.723014] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  226.723089] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  226.723160] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  226.723235] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  226.723307] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  226.723409] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 0000000018d86a98
[  226.723491] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  226.723567] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000018d86a98
[  226.723651] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  226.723700] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  226.723737] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000018d86a98
[  226.723819] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000ab379aee to 0000000018d86a98
[  226.723894] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000018d86a98
[  226.723982] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000018d86a98 nonblocking
[  226.724098] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  226.724179] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  226.736302] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13192, diff=1, hw=0 hw_last=0
[  226.736417] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000018d86a98
[  226.736486] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  226.736549] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  226.736610] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  226.736672] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  226.736735] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000018d86a98
[  226.752881] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13193, diff=1, hw=0 hw_last=0
[  226.769460] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13194, diff=1, hw=0 hw_last=0
[  226.786038] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13195, diff=1, hw=0 hw_last=0
[  226.802618] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13196, diff=1, hw=0 hw_last=0
[  226.819196] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13197, diff=1, hw=0 hw_last=0
[  226.835779] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13198, diff=1, hw=0 hw_last=0
[  226.852355] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13199, diff=1, hw=0 hw_last=0
[  226.868935] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13200, diff=1, hw=0 hw_last=0
[  226.885516] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13201, diff=1, hw=0 hw_last=0
[  226.902096] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13202, diff=1, hw=0 hw_last=0
[  226.918670] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13203, diff=1, hw=0 hw_last=0
[  226.935247] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13204, diff=1, hw=0 hw_last=0
[  226.951826] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13205, diff=1, hw=0 hw_last=0
[  226.968404] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13206, diff=1, hw=0 hw_last=0
[  226.984985] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13207, diff=1, hw=0 hw_last=0
[  227.001563] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13208, diff=1, hw=0 hw_last=0
[  227.018142] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13209, diff=1, hw=0 hw_last=0
[  227.034722] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13210, diff=1, hw=0 hw_last=0
[  227.051306] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13211, diff=1, hw=0 hw_last=0
[  227.067887] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13212, diff=1, hw=0 hw_last=0
[  227.084465] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13213, diff=1, hw=0 hw_last=0
[  227.101041] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13214, diff=1, hw=0 hw_last=0
[  227.117622] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13215, diff=1, hw=0 hw_last=0
[  227.134202] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13216, diff=1, hw=0 hw_last=0
[  227.150783] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13217, diff=1, hw=0 hw_last=0
[  227.167362] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13218, diff=1, hw=0 hw_last=0
[  227.183936] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13219, diff=1, hw=0 hw_last=0
[  227.200519] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13220, diff=1, hw=0 hw_last=0
[  227.217098] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13221, diff=1, hw=0 hw_last=0
[  227.233674] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13222, diff=1, hw=0 hw_last=0
[  227.250253] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13223, diff=1, hw=0 hw_last=0
[  227.266835] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13224, diff=1, hw=0 hw_last=0
[  227.283414] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13225, diff=1, hw=0 hw_last=0
[  227.299993] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13226, diff=1, hw=0 hw_last=0
[  227.731060] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13252, diff=1, hw=0 hw_last=0
[  227.747643] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13253, diff=1, hw=0 hw_last=0
[  227.764219] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13254, diff=1, hw=0 hw_last=0
[  227.780796] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13255, diff=1, hw=0 hw_last=0
[  227.797378] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13256, diff=1, hw=0 hw_last=0
[  227.813955] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13257, diff=1, hw=0 hw_last=0
[  227.830532] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13258, diff=1, hw=0 hw_last=0
[  227.843073] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  227.843194] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000d7e48c6b
[  227.843283] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  227.843394] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000fefb5c61 state to 00000000d7e48c6b
[  227.843480] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  227.843554] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 00000000d7e48c6b
[  227.843638] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000fefb5c61
[  227.843713] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  227.843786] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  227.843858] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  227.843930] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  227.844007] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  227.844079] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  227.844155] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  227.844227] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  227.844300] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 00000000d7e48c6b
[  227.844375] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  227.844449] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000d7e48c6b
[  227.844531] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  227.844582] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  227.844619] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000d7e48c6b
[  227.844699] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000fde3661d to 00000000d7e48c6b
[  227.844773] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000d7e48c6b
[  227.844861] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000d7e48c6b nonblocking
[  227.844971] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  227.845045] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  227.847108] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13259, diff=1, hw=0 hw_last=0
[  227.847217] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000d7e48c6b
[  227.847284] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  227.847364] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  227.847431] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  227.847499] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  227.847563] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000d7e48c6b
[  227.863686] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13260, diff=1, hw=0 hw_last=0
[  227.880265] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13261, diff=1, hw=0 hw_last=0
[  227.896843] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13262, diff=1, hw=0 hw_last=0
[  227.913423] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13263, diff=1, hw=0 hw_last=0
[  227.930001] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13264, diff=1, hw=0 hw_last=0
[  227.946584] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13265, diff=1, hw=0 hw_last=0
[  227.963159] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13266, diff=1, hw=0 hw_last=0
[  227.979741] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13267, diff=1, hw=0 hw_last=0
[  227.996323] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13268, diff=1, hw=0 hw_last=0
[  228.012902] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13269, diff=1, hw=0 hw_last=0
[  228.029474] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13270, diff=1, hw=0 hw_last=0
[  228.046053] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13271, diff=1, hw=0 hw_last=0
[  228.062632] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13272, diff=1, hw=0 hw_last=0
[  228.079211] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13273, diff=1, hw=0 hw_last=0
[  228.095790] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13274, diff=1, hw=0 hw_last=0
[  228.112369] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13275, diff=1, hw=0 hw_last=0
[  228.128948] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13276, diff=1, hw=0 hw_last=0
[  228.145527] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13277, diff=1, hw=0 hw_last=0
[  228.162113] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13278, diff=1, hw=0 hw_last=0
[  228.178705] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13279, diff=1, hw=0 hw_last=0
[  228.195267] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13280, diff=1, hw=0 hw_last=0
[  228.211847] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13281, diff=1, hw=0 hw_last=0
[  228.228427] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13282, diff=1, hw=0 hw_last=0
[  228.245008] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13283, diff=1, hw=0 hw_last=0
[  228.261587] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13284, diff=1, hw=0 hw_last=0
[  228.278170] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13285, diff=1, hw=0 hw_last=0
[  228.294746] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13286, diff=1, hw=0 hw_last=0
[  228.394218] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13292, diff=1, hw=0 hw_last=0
[  228.410800] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13293, diff=1, hw=0 hw_last=0
[  228.427380] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13294, diff=1, hw=0 hw_last=0
[  228.443956] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13295, diff=1, hw=0 hw_last=0
[  228.460539] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13296, diff=1, hw=0 hw_last=0
[  228.477115] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13297, diff=1, hw=0 hw_last=0
[  228.493694] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13298, diff=1, hw=0 hw_last=0
[  228.510274] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13299, diff=1, hw=0 hw_last=0
[  228.526852] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13300, diff=1, hw=0 hw_last=0
[  228.543433] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13301, diff=1, hw=0 hw_last=0
[  228.560013] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13302, diff=1, hw=0 hw_last=0
[  228.576589] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13303, diff=1, hw=0 hw_last=0
[  228.593170] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13304, diff=1, hw=0 hw_last=0
[  228.609750] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13305, diff=1, hw=0 hw_last=0
[  228.626329] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13306, diff=1, hw=0 hw_last=0
[  228.641498] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  228.641620] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 13307 to client
[  228.642920] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13307, diff=1, hw=0 hw_last=0
[  228.651898] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  228.652002] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000082174610
[  228.652085] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  228.652159] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000055579822 state to 0000000082174610
[  228.652236] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  228.652308] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000e8543c49 state to 0000000082174610
[  228.652389] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000055579822
[  228.652463] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  228.652534] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  228.652607] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  228.652678] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  228.652754] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  228.652826] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  228.652901] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  228.652973] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  228.653044] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 0000000082174610
[  228.653119] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  228.653191] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000082174610
[  228.653273] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  228.653323] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  228.653360] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000082174610
[  228.653439] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000071ef6b0b to 0000000082174610
[  228.653513] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000082174610
[  228.653593] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  228.653666] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  228.653739] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  228.653821] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 0000000082174610
[  228.653897] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000082174610
[  228.653970] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  228.654042] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  228.654114] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  228.654187] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  228.654260] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000082174610
[  228.655689] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  228.659493] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13308, diff=1, hw=0 hw_last=0
[  228.676072] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13309, diff=1, hw=0 hw_last=0
[  228.692650] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13310, diff=1, hw=0 hw_last=0
[  228.709230] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13311, diff=1, hw=0 hw_last=0
[  228.725812] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13312, diff=1, hw=0 hw_last=0
[  228.742387] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13313, diff=1, hw=0 hw_last=0
[  228.758966] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13314, diff=1, hw=0 hw_last=0
[  228.775547] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13315, diff=1, hw=0 hw_last=0
[  228.792131] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13316, diff=1, hw=0 hw_last=0
[  228.808716] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13317, diff=1, hw=0 hw_last=0
[  228.825284] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13318, diff=1, hw=0 hw_last=0
[  228.841867] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13319, diff=1, hw=0 hw_last=0
[  228.858442] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13320, diff=1, hw=0 hw_last=0
[  228.875024] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13321, diff=1, hw=0 hw_last=0
[  228.875812] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  228.875919] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000082174610
[  228.876007] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  228.876081] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000055579822 state to 0000000082174610
[  229.140279] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13337, diff=1, hw=0 hw_last=0
[  229.156860] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13338, diff=1, hw=0 hw_last=0
[  229.173438] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13339, diff=1, hw=0 hw_last=0
[  229.190017] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13340, diff=1, hw=0 hw_last=0
[  229.206604] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13341, diff=1, hw=0 hw_last=0
[  229.223184] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13342, diff=1, hw=0 hw_last=0
[  229.239759] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13343, diff=1, hw=0 hw_last=0
[  229.256337] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13344, diff=1, hw=0 hw_last=0
[  229.272916] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13345, diff=1, hw=0 hw_last=0
[  229.289499] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13346, diff=1, hw=0 hw_last=0
[  229.306078] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13347, diff=1, hw=0 hw_last=0
[  229.322660] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13348, diff=1, hw=0 hw_last=0
[  229.339235] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13349, diff=1, hw=0 hw_last=0
[  229.355832] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13350, diff=1, hw=0 hw_last=0
[  229.372391] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13351, diff=1, hw=0 hw_last=0
[  229.388973] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13352, diff=1, hw=0 hw_last=0
[  229.405551] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13353, diff=1, hw=0 hw_last=0
[  229.422131] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13354, diff=1, hw=0 hw_last=0
[  229.438709] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13355, diff=1, hw=0 hw_last=0
[  229.455291] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13356, diff=1, hw=0 hw_last=0
[  229.471870] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13357, diff=1, hw=0 hw_last=0
[  229.488446] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13358, diff=1, hw=0 hw_last=0
[  229.505027] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13359, diff=1, hw=0 hw_last=0
[  229.521604] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13360, diff=1, hw=0 hw_last=0
[  229.538183] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13361, diff=1, hw=0 hw_last=0
[  229.554761] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13362, diff=1, hw=0 hw_last=0
[  229.571343] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13363, diff=1, hw=0 hw_last=0
[  229.587922] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13364, diff=1, hw=0 hw_last=0
[  229.604501] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13365, diff=1, hw=0 hw_last=0
[  229.621081] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13366, diff=1, hw=0 hw_last=0
[  229.637658] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13367, diff=1, hw=0 hw_last=0
[  229.654238] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13368, diff=1, hw=0 hw_last=0
[  229.670823] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13369, diff=1, hw=0 hw_last=0
[  229.678105] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  229.678227] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 13370 to client
[  229.680503] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  229.680602] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f37c832b
[  229.680684] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  229.680758] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000002cafbe1b state to 00000000f37c832b
[  229.680834] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  229.680906] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 00000000f37c832b
[  229.680987] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 000000002cafbe1b
[  229.681061] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  229.681132] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  229.681203] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  229.681274] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  229.681348] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  229.681420] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  229.681495] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  229.681566] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  229.681638] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 00000000f37c832b
[  229.681712] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  229.681783] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000f37c832b
[  229.681866] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  229.681913] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  229.681949] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000f37c832b
[  229.682028] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000e0dcab9c to 00000000f37c832b
[  229.682101] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000f37c832b
[  229.682179] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  229.682251] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  229.682323] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  229.682404] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 00000000f37c832b
[  229.682479] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f37c832b
[  229.682551] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  229.682623] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  229.682694] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  229.682766] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  229.682838] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f37c832b
[  229.684271] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  229.820039] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13378, diff=1, hw=0 hw_last=0
[  229.836620] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13379, diff=1, hw=0 hw_last=0
[  229.853195] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13380, diff=1, hw=0 hw_last=0
[  229.869778] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13381, diff=1, hw=0 hw_last=0
[  229.886353] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13382, diff=1, hw=0 hw_last=0
[  229.902932] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13383, diff=1, hw=0 hw_last=0
[  229.912322] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  229.912441] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f37c832b
[  229.912527] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  229.912601] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000002cafbe1b state to 00000000f37c832b
[  229.912679] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  229.912751] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 00000000f37c832b
[  229.912832] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 000000002cafbe1b
[  229.912908] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  229.912981] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  229.913053] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  229.913127] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  229.913201] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  229.913273] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  229.913349] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  229.913420] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  229.913491] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 00000000f37c832b
[  229.913567] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  229.913642] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000f37c832b
[  229.913727] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  229.913774] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  229.913810] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000f37c832b
[  229.913890] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000008e9f664b to 00000000f37c832b
[  229.913969] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000f37c832b
[  229.914059] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f37c832b nonblocking
[  229.914181] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  229.914263] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  229.919509] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13384, diff=1, hw=0 hw_last=0
[  229.919616] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f37c832b
[  229.919685] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  229.919750] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  229.919812] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  229.919874] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  229.919938] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f37c832b
[  229.936086] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13385, diff=1, hw=0 hw_last=0
[  229.952665] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13386, diff=1, hw=0 hw_last=0
[  229.969244] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13387, diff=1, hw=0 hw_last=0
[  229.985823] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13388, diff=1, hw=0 hw_last=0
[  230.002403] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13389, diff=1, hw=0 hw_last=0
[  230.018982] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13390, diff=1, hw=0 hw_last=0
[  230.035563] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13391, diff=1, hw=0 hw_last=0
[  230.052140] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13392, diff=1, hw=0 hw_last=0
[  230.068719] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13393, diff=1, hw=0 hw_last=0
[  230.085303] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13394, diff=1, hw=0 hw_last=0
[  230.101879] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13395, diff=1, hw=0 hw_last=0
[  230.118454] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13396, diff=1, hw=0 hw_last=0
[  230.135032] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13397, diff=1, hw=0 hw_last=0
[  230.151611] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13398, diff=1, hw=0 hw_last=0
[  230.168191] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13399, diff=1, hw=0 hw_last=0
[  230.184769] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13400, diff=1, hw=0 hw_last=0
[  230.201349] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13401, diff=1, hw=0 hw_last=0
[  230.217928] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13402, diff=1, hw=0 hw_last=0
[  230.234511] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13403, diff=1, hw=0 hw_last=0
[  230.251091] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13404, diff=1, hw=0 hw_last=0
[  230.267671] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13405, diff=1, hw=0 hw_last=0
[  230.284248] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13406, diff=1, hw=0 hw_last=0
[  230.300825] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13407, diff=1, hw=0 hw_last=0
[  230.317403] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13408, diff=1, hw=0 hw_last=0
[  230.333984] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13409, diff=1, hw=0 hw_last=0
[  230.350568] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13410, diff=1, hw=0 hw_last=0
[  230.367147] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13411, diff=1, hw=0 hw_last=0
[  230.383723] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13412, diff=1, hw=0 hw_last=0
[  230.483201] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13418, diff=1, hw=0 hw_last=0
[  230.499780] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13419, diff=1, hw=0 hw_last=0
[  230.516359] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13420, diff=1, hw=0 hw_last=0
[  230.532942] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13421, diff=1, hw=0 hw_last=0
[  230.549518] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13422, diff=1, hw=0 hw_last=0
[  230.566093] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13423, diff=1, hw=0 hw_last=0
[  230.582676] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13424, diff=1, hw=0 hw_last=0
[  230.599257] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13425, diff=1, hw=0 hw_last=0
[  230.615835] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13426, diff=1, hw=0 hw_last=0
[  230.632414] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13427, diff=1, hw=0 hw_last=0
[  230.648993] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13428, diff=1, hw=0 hw_last=0
[  230.665568] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13429, diff=1, hw=0 hw_last=0
[  230.682148] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13430, diff=1, hw=0 hw_last=0
[  230.698731] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13431, diff=1, hw=0 hw_last=0
[  230.711415] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  230.711539] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 13432 to client
[  230.715315] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13432, diff=1, hw=0 hw_last=0
[  230.724811] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  230.724911] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009472d261
[  230.724995] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  230.725067] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000ec98bd42 state to 000000009472d261
[  230.725146] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  230.725218] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 000000009472d261
[  230.725298] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000ec98bd42
[  230.725372] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  230.725444] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  230.725515] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  230.725587] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  230.725662] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  230.725733] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  230.725808] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  230.725880] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  230.725951] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000009472d261
[  230.726026] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  230.726098] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000009472d261
[  230.726180] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  230.726226] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  230.726263] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000009472d261
[  230.726344] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000f37c832b to 000000009472d261
[  230.726418] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000009472d261
[  230.726497] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  230.726570] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  230.726646] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  230.726726] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000009472d261
[  230.726801] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009472d261
[  230.726875] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  230.726949] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  230.727022] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  230.727096] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  230.727169] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009472d261
[  230.728637] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  230.731893] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13433, diff=1, hw=0 hw_last=0
[  230.748471] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13434, diff=1, hw=0 hw_last=0
[  230.765051] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13435, diff=1, hw=0 hw_last=0
[  230.781631] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13436, diff=1, hw=0 hw_last=0
[  230.798213] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13437, diff=1, hw=0 hw_last=0
[  230.814790] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13438, diff=1, hw=0 hw_last=0
[  230.831368] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13439, diff=1, hw=0 hw_last=0
[  230.847948] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13440, diff=1, hw=0 hw_last=0
[  230.864530] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13441, diff=1, hw=0 hw_last=0
[  230.881107] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13442, diff=1, hw=0 hw_last=0
[  230.897685] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13443, diff=1, hw=0 hw_last=0
[  230.914265] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13444, diff=1, hw=0 hw_last=0
[  230.930841] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13445, diff=1, hw=0 hw_last=0
[  230.947421] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13446, diff=1, hw=0 hw_last=0
[  230.957530] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  230.957643] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009472d261
[  230.957729] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  230.957803] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000ec98bd42 state to 000000009472d261
[  230.957881] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  231.146365] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13458, diff=1, hw=0 hw_last=0
[  231.162942] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13459, diff=1, hw=0 hw_last=0
[  231.179522] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13460, diff=1, hw=0 hw_last=0
[  231.196101] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13461, diff=1, hw=0 hw_last=0
[  231.212679] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13462, diff=1, hw=0 hw_last=0
[  231.229258] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13463, diff=1, hw=0 hw_last=0
[  231.245838] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13464, diff=1, hw=0 hw_last=0
[  231.262418] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13465, diff=1, hw=0 hw_last=0
[  231.279002] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13466, diff=1, hw=0 hw_last=0
[  231.295579] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13467, diff=1, hw=0 hw_last=0
[  231.312162] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13468, diff=1, hw=0 hw_last=0
[  231.328736] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13469, diff=1, hw=0 hw_last=0
[  231.345316] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13470, diff=1, hw=0 hw_last=0
[  231.361893] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13471, diff=1, hw=0 hw_last=0
[  231.378476] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13472, diff=1, hw=0 hw_last=0
[  231.395057] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13473, diff=1, hw=0 hw_last=0
[  231.411635] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13474, diff=1, hw=0 hw_last=0
[  231.428212] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13475, diff=1, hw=0 hw_last=0
[  231.444792] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13476, diff=1, hw=0 hw_last=0
[  231.461373] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13477, diff=1, hw=0 hw_last=0
[  231.477952] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13478, diff=1, hw=0 hw_last=0
[  231.494529] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13479, diff=1, hw=0 hw_last=0
[  231.511111] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13480, diff=1, hw=0 hw_last=0
[  231.527690] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13481, diff=1, hw=0 hw_last=0
[  231.528314] systemd-journald[214]: Data hash table of /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal has a fill level at 75.1 (2732 of 3640 items, 2097152 file size, 767 bytes per hash table item), suggesting rotation.
[  231.553396] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13482, diff=1, hw=0 hw_last=0
[  231.553552] systemd-journald[214]: /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal: Journal header limits reached or header out-of-date, rotating.
[  231.573631] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13483, diff=1, hw=0 hw_last=0
[  231.577435] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13484, diff=1, hw=0 hw_last=0
[  231.594008] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13485, diff=1, hw=0 hw_last=0
[  231.610587] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13486, diff=1, hw=0 hw_last=0
[  231.627166] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13487, diff=1, hw=0 hw_last=0
[  231.643746] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13488, diff=1, hw=0 hw_last=0
[  231.660324] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13489, diff=1, hw=0 hw_last=0
[  231.676903] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13490, diff=1, hw=0 hw_last=0
[  231.693478] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13491, diff=1, hw=0 hw_last=0
[  231.710058] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13492, diff=1, hw=0 hw_last=0
[  231.726637] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13493, diff=1, hw=0 hw_last=0
[  231.743045] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  231.743169] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 13494 to client
[  231.743226] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13494, diff=1, hw=0 hw_last=0
[  231.743310] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  231.743427] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000c0cf118d
[  231.743522] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  231.743601] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000215b6887 state to 00000000c0cf118d
[  231.743685] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  231.743763] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 00000000c0cf118d
[  231.743850] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000215b6887
[  231.743930] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  231.744007] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  231.744083] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  231.744158] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  231.744240] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  231.744316] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  231.744392] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  231.744470] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  231.744545] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 00000000c0cf118d
[  231.744625] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  231.744704] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000c0cf118d
[  231.744793] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  231.744840] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  231.744881] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000c0cf118d
[  231.744966] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000071ef6b0b to 00000000c0cf118d
[  231.745040] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000c0cf118d
[  231.745129] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000c0cf118d nonblocking
[  231.769110] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  231.769203] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000eae20a14
[  231.769279] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  231.769352] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000003519e999 state to 00000000eae20a14
[  231.769427] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  231.769500] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a743c9a8 state to 00000000eae20a14
[  231.769576] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 000000003519e999
[  231.769650] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  231.769721] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  231.769793] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  231.769864] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  231.769940] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  231.770011] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  231.770085] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  231.770157] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  231.770229] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 00000000eae20a14
[  231.770303] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  231.770376] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000eae20a14
[  231.770453] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  231.770495] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  231.770530] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000eae20a14
[  231.770605] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000d7e48c6b to 00000000eae20a14
[  231.770679] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000eae20a14
[  231.770756] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  231.770828] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  231.770901] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  231.770979] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 00000000eae20a14
[  231.771052] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000eae20a14
[  231.771125] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  231.771196] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  231.771268] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  231.771356] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  231.771433] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000eae20a14
[  231.772859] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  231.776382] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13496, diff=1, hw=0 hw_last=0
[  231.792964] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13497, diff=1, hw=0 hw_last=0
[  231.809539] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13498, diff=1, hw=0 hw_last=0
[  231.826121] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13499, diff=1, hw=0 hw_last=0
[  231.842701] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13500, diff=1, hw=0 hw_last=0
[  231.859279] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13501, diff=1, hw=0 hw_last=0
[  231.875857] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13502, diff=1, hw=0 hw_last=0
[  231.892438] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13503, diff=1, hw=0 hw_last=0
[  231.909019] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13504, diff=1, hw=0 hw_last=0
[  231.925594] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13505, diff=1, hw=0 hw_last=0
[  231.942176] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13506, diff=1, hw=0 hw_last=0
[  231.958753] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13507, diff=1, hw=0 hw_last=0
[  231.975333] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13508, diff=1, hw=0 hw_last=0
[  231.991906] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13509, diff=1, hw=0 hw_last=0
[  231.993522] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  231.993633] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000eae20a14
[  231.993720] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  231.993794] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000003519e999 state to 00000000eae20a14
[  231.993872] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  231.993944] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a743c9a8 state to 00000000eae20a14
[  231.994024] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 000000003519e999
[  231.994098] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  231.994170] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  231.994242] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  231.994314] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  231.994390] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  231.994462] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  231.994539] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  231.994611] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  231.994683] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 00000000eae20a14
[  231.994758] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  231.994833] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000eae20a14
[  231.994915] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  231.994963] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  231.995000] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000eae20a14
[  231.995080] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000018d86a98 to 00000000eae20a14
[  231.995154] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000eae20a14
[  231.995242] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000eae20a14 nonblocking
[  231.995386] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  231.995465] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  232.008488] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13510, diff=1, hw=0 hw_last=0
[  232.373229] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13532, diff=1, hw=0 hw_last=0
[  232.389807] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13533, diff=1, hw=0 hw_last=0
[  232.406386] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13534, diff=1, hw=0 hw_last=0
[  232.422968] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13535, diff=1, hw=0 hw_last=0
[  232.439547] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13536, diff=1, hw=0 hw_last=0
[  232.456124] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13537, diff=1, hw=0 hw_last=0
[  232.472700] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13538, diff=1, hw=0 hw_last=0
[  232.489280] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13539, diff=1, hw=0 hw_last=0
[  232.505861] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13540, diff=1, hw=0 hw_last=0
[  232.522441] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13541, diff=1, hw=0 hw_last=0
[  232.539018] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13542, diff=1, hw=0 hw_last=0
[  232.555596] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13543, diff=1, hw=0 hw_last=0
[  232.572176] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13544, diff=1, hw=0 hw_last=0
[  232.588754] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13545, diff=1, hw=0 hw_last=0
[  232.605334] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13546, diff=1, hw=0 hw_last=0
[  232.621915] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13547, diff=1, hw=0 hw_last=0
[  232.638495] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13548, diff=1, hw=0 hw_last=0
[  232.655075] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13549, diff=1, hw=0 hw_last=0
[  232.671654] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13550, diff=1, hw=0 hw_last=0
[  232.688232] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13551, diff=1, hw=0 hw_last=0
[  232.704811] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13552, diff=1, hw=0 hw_last=0
[  232.721391] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13553, diff=1, hw=0 hw_last=0
[  232.737971] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13554, diff=1, hw=0 hw_last=0
[  232.754555] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13555, diff=1, hw=0 hw_last=0
[  232.764564] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  232.764682] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 13556 to client
[  232.765972] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  232.766082] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000305e034
[  232.766170] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  232.766245] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000082b4fa6a state to 000000000305e034
[  232.766324] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  232.766398] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 000000000305e034
[  232.766478] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000082b4fa6a
[  232.766553] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  232.766626] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  232.766703] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  232.766776] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  232.766853] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  232.766925] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  232.767000] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  232.767072] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  232.767144] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000000305e034
[  232.767219] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  232.767292] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000000305e034
[  232.767403] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  232.767457] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  232.767495] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000305e034
[  232.767588] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000eae20a14 to 000000000305e034
[  232.767666] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000305e034
[  232.767748] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  232.767822] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  232.767895] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  232.767980] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000000305e034
[  232.768057] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000305e034
[  232.768131] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  232.768204] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  232.768276] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  232.768349] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  232.768421] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000305e034
[  232.769807] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  232.771137] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13556, diff=1, hw=0 hw_last=0
[  232.787715] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13557, diff=1, hw=0 hw_last=0
[  232.804294] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13558, diff=1, hw=0 hw_last=0
[  232.820871] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13559, diff=1, hw=0 hw_last=0
[  232.837452] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13560, diff=1, hw=0 hw_last=0
[  232.854033] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13561, diff=1, hw=0 hw_last=0
[  232.870611] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13562, diff=1, hw=0 hw_last=0
[  232.887187] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13563, diff=1, hw=0 hw_last=0
[  233.052974] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13573, diff=1, hw=0 hw_last=0
[  233.069553] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13574, diff=1, hw=0 hw_last=0
[  233.086133] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13575, diff=1, hw=0 hw_last=0
[  233.102712] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13576, diff=1, hw=0 hw_last=0
[  233.119296] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13577, diff=1, hw=0 hw_last=0
[  233.135871] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13578, diff=1, hw=0 hw_last=0
[  233.152452] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13579, diff=1, hw=0 hw_last=0
[  233.169034] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13580, diff=1, hw=0 hw_last=0
[  233.185610] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13581, diff=1, hw=0 hw_last=0
[  233.202184] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13582, diff=1, hw=0 hw_last=0
[  233.218764] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13583, diff=1, hw=0 hw_last=0
[  233.235342] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13584, diff=1, hw=0 hw_last=0
[  233.251923] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13585, diff=1, hw=0 hw_last=0
[  233.268502] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13586, diff=1, hw=0 hw_last=0
[  233.285079] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13587, diff=1, hw=0 hw_last=0
[  233.301658] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13588, diff=1, hw=0 hw_last=0
[  233.318244] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13589, diff=1, hw=0 hw_last=0
[  233.334821] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13590, diff=1, hw=0 hw_last=0
[  233.351401] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13591, diff=1, hw=0 hw_last=0
[  233.367980] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13592, diff=1, hw=0 hw_last=0
[  233.384557] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13593, diff=1, hw=0 hw_last=0
[  233.401138] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13594, diff=1, hw=0 hw_last=0
[  233.417716] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13595, diff=1, hw=0 hw_last=0
[  233.434295] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13596, diff=1, hw=0 hw_last=0
[  233.450876] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13597, diff=1, hw=0 hw_last=0
[  233.467455] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13598, diff=1, hw=0 hw_last=0
[  233.484032] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13599, diff=1, hw=0 hw_last=0
[  233.500612] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13600, diff=1, hw=0 hw_last=0
[  233.517191] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13601, diff=1, hw=0 hw_last=0
[  233.533772] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13602, diff=1, hw=0 hw_last=0
[  233.550351] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13603, diff=1, hw=0 hw_last=0
[  233.566927] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13604, diff=1, hw=0 hw_last=0
[  233.583508] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13605, diff=1, hw=0 hw_last=0
[  233.600085] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13606, diff=1, hw=0 hw_last=0
[  233.616666] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13607, diff=1, hw=0 hw_last=0
[  233.633246] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13608, diff=1, hw=0 hw_last=0
[  233.649829] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13609, diff=1, hw=0 hw_last=0
[  233.666404] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13610, diff=1, hw=0 hw_last=0
[  233.682985] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13611, diff=1, hw=0 hw_last=0
[  233.699566] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13612, diff=1, hw=0 hw_last=0
[  233.716146] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13613, diff=1, hw=0 hw_last=0
[  233.732722] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13614, diff=1, hw=0 hw_last=0
[  233.749300] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13615, diff=1, hw=0 hw_last=0
[  233.765881] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13616, diff=1, hw=0 hw_last=0
[  233.782466] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13617, diff=1, hw=0 hw_last=0
[  233.788192] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  233.788313] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 13618 to client
[  233.791585] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  233.791691] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000095dd8ec0
[  233.791775] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  233.791849] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000fefb5c61 state to 0000000095dd8ec0
[  233.791928] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  233.792000] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 0000000095dd8ec0
[  233.792082] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000fefb5c61
[  233.792156] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  233.792228] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  233.792299] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  233.792370] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  233.792446] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  233.792517] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  233.792592] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  233.792664] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  233.792736] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 0000000095dd8ec0
[  233.792810] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  233.792882] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000095dd8ec0
[  233.792965] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  233.793508] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 0000000095dd8ec0
[  233.793584] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000095dd8ec0
[  233.793657] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  233.793729] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  233.793801] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  233.793873] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  233.793945] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000095dd8ec0
[  233.795309] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  233.799049] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13618, diff=1, hw=0 hw_last=0
[  233.815624] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13619, diff=1, hw=0 hw_last=0
[  233.832203] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13620, diff=1, hw=0 hw_last=0
[  233.848781] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13621, diff=1, hw=0 hw_last=0
[  233.865363] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13622, diff=1, hw=0 hw_last=0
[  233.881942] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13623, diff=1, hw=0 hw_last=0
[  233.898522] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13624, diff=1, hw=0 hw_last=0
[  233.915099] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13625, diff=1, hw=0 hw_last=0
[  233.931679] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13626, diff=1, hw=0 hw_last=0
[  233.948262] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13627, diff=1, hw=0 hw_last=0
[  233.964838] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13628, diff=1, hw=0 hw_last=0
[  233.981419] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13629, diff=1, hw=0 hw_last=0
[  233.997996] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13630, diff=1, hw=0 hw_last=0
[  234.014575] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13631, diff=1, hw=0 hw_last=0
[  234.015356] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  234.015465] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000095dd8ec0
[  234.015552] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  234.015626] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000fefb5c61 state to 0000000095dd8ec0
[  234.015706] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  234.015779] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 0000000095dd8ec0
[  234.015862] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000fefb5c61
[  234.015937] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  234.016008] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  234.016080] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  234.016152] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  234.016226] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  234.016298] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  234.016374] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  234.016445] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  234.016518] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 0000000095dd8ec0
[  234.016593] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  234.016667] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000095dd8ec0
[  234.016750] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  234.016799] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  234.016835] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000095dd8ec0
[  234.016915] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000082174610 to 0000000095dd8ec0
[  234.016989] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000095dd8ec0
[  234.017077] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000095dd8ec0 nonblocking
[  234.017183] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  234.017259] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  234.031152] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13632, diff=1, hw=0 hw_last=0
[  234.031261] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000095dd8ec0
[  234.031336] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  234.031402] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  234.031462] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  234.031525] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  234.031588] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000095dd8ec0
[  234.047727] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13633, diff=1, hw=0 hw_last=0
[  234.064307] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13634, diff=1, hw=0 hw_last=0
[  234.080883] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13635, diff=1, hw=0 hw_last=0
[  234.097464] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13636, diff=1, hw=0 hw_last=0
[  234.114044] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13637, diff=1, hw=0 hw_last=0
[  234.130625] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13638, diff=1, hw=0 hw_last=0
[  234.147202] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13639, diff=1, hw=0 hw_last=0
[  234.163782] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13640, diff=1, hw=0 hw_last=0
[  234.180364] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13641, diff=1, hw=0 hw_last=0
[  234.196941] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13642, diff=1, hw=0 hw_last=0
[  234.213521] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13643, diff=1, hw=0 hw_last=0
[  234.230096] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13644, diff=1, hw=0 hw_last=0
[  234.246676] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13645, diff=1, hw=0 hw_last=0
[  234.263255] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13646, diff=1, hw=0 hw_last=0
[  234.268343] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  234.273699] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  234.273770] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 000000000ace560b
[  234.273844] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  234.273916] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000000ace560b
[  234.273995] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  234.274041] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  234.274077] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000ace560b
[  234.274154] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000009472d261 to 000000000ace560b
[  234.274228] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000ace560b
[  234.274305] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  234.274378] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  234.274451] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  234.274530] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000000ace560b
[  234.274604] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000ace560b
[  234.274676] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  234.274748] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  234.274819] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  234.274891] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  234.274963] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000ace560b
[  234.275473] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  234.275568] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000ace560b
[  234.275644] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  234.275715] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000087081e28 state to 000000000ace560b
[  234.275790] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  234.275862] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 000000000ace560b
[  234.275937] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000087081e28
[  234.276010] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  234.276081] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  234.276152] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  234.276223] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  234.276296] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  234.276367] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  234.276439] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  234.276511] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  234.276582] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 000000000ace560b
[  234.276656] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  234.276729] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000000ace560b
[  234.276805] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  234.276849] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  234.276885] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000ace560b
[  234.276960] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000f37c832b to 000000000ace560b
[  234.277034] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000ace560b
[  234.277111] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000ace560b nonblocking
[  234.277215] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  234.277290] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  234.279836] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13647, diff=1, hw=0 hw_last=0
[  234.279940] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000ace560b
[  234.280006] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  234.280068] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  234.280129] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  234.280190] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  234.280252] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000ace560b
[  234.296417] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13648, diff=1, hw=0 hw_last=0
[  234.312993] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13649, diff=1, hw=0 hw_last=0
[  234.329571] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13650, diff=1, hw=0 hw_last=0
[  234.346155] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13651, diff=1, hw=0 hw_last=0
[  234.362732] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13652, diff=1, hw=0 hw_last=0
[  234.379311] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13653, diff=1, hw=0 hw_last=0
[  234.395888] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13654, diff=1, hw=0 hw_last=0
[  234.412469] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13655, diff=1, hw=0 hw_last=0
[  234.429048] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13656, diff=1, hw=0 hw_last=0
[  234.445625] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13657, diff=1, hw=0 hw_last=0
[  234.462204] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13658, diff=1, hw=0 hw_last=0
[  234.478786] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13659, diff=1, hw=0 hw_last=0
[  234.495364] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13660, diff=1, hw=0 hw_last=0
[  234.511944] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13661, diff=1, hw=0 hw_last=0
[  234.528525] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13662, diff=1, hw=0 hw_last=0
[  234.545102] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13663, diff=1, hw=0 hw_last=0
[  234.561681] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13664, diff=1, hw=0 hw_last=0
[  234.578261] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13665, diff=1, hw=0 hw_last=0
[  234.594839] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13666, diff=1, hw=0 hw_last=0
[  234.611418] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13667, diff=1, hw=0 hw_last=0
[  234.821475] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  234.821549] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  234.821623] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  234.821706] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000000cc24793
[  234.821781] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000cc24793
[  234.821854] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  234.821926] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  234.821999] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  234.822071] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  234.822143] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000cc24793
[  234.823545] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  234.826959] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13680, diff=1, hw=0 hw_last=0
[  234.843534] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13681, diff=1, hw=0 hw_last=0
[  234.860113] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13682, diff=1, hw=0 hw_last=0
[  234.876694] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13683, diff=1, hw=0 hw_last=0
[  234.893277] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13684, diff=1, hw=0 hw_last=0
[  234.909852] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13685, diff=1, hw=0 hw_last=0
[  234.926430] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13686, diff=1, hw=0 hw_last=0
[  234.943012] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13687, diff=1, hw=0 hw_last=0
[  234.959593] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13688, diff=1, hw=0 hw_last=0
[  234.976168] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13689, diff=1, hw=0 hw_last=0
[  234.992750] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13690, diff=1, hw=0 hw_last=0
[  235.009325] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13691, diff=1, hw=0 hw_last=0
[  235.025903] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13692, diff=1, hw=0 hw_last=0
[  235.042485] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13693, diff=1, hw=0 hw_last=0
[  235.044500] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  235.044613] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000cc24793
[  235.044702] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  235.044776] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000002cafbe1b state to 000000000cc24793
[  235.044854] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  235.044926] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000e8543c49 state to 000000000cc24793
[  235.045006] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 000000002cafbe1b
[  235.045080] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  235.045152] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  235.045223] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  235.045294] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  235.045370] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  235.045442] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  235.045518] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  235.045589] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  235.045660] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000000cc24793
[  235.045735] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  235.045808] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000000cc24793
[  235.045891] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  235.045937] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  235.045973] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000cc24793
[  235.046054] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000009472d261 to 000000000cc24793
[  235.046127] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000cc24793
[  235.046215] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000cc24793 nonblocking
[  235.046324] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  235.046395] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  235.059060] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13694, diff=1, hw=0 hw_last=0
[  235.059175] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000cc24793
[  235.059251] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  235.059327] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  235.059394] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  235.059456] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  235.059519] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000cc24793
[  235.075638] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13695, diff=1, hw=0 hw_last=0
[  235.092216] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13696, diff=1, hw=0 hw_last=0
[  235.108795] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13697, diff=1, hw=0 hw_last=0
[  235.125376] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13698, diff=1, hw=0 hw_last=0
[  235.141953] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13699, diff=1, hw=0 hw_last=0
[  235.158535] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13700, diff=1, hw=0 hw_last=0
[  235.175113] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13701, diff=1, hw=0 hw_last=0
[  235.191695] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13702, diff=1, hw=0 hw_last=0
[  235.208277] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13703, diff=1, hw=0 hw_last=0
[  235.224855] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13704, diff=1, hw=0 hw_last=0
[  235.241428] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13705, diff=1, hw=0 hw_last=0
[  235.258008] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13706, diff=1, hw=0 hw_last=0
[  235.274585] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13707, diff=1, hw=0 hw_last=0
[  235.291164] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13708, diff=1, hw=0 hw_last=0
[  235.307743] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13709, diff=1, hw=0 hw_last=0
[  235.324323] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13710, diff=1, hw=0 hw_last=0
[  235.340903] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13711, diff=1, hw=0 hw_last=0
[  235.357488] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13712, diff=1, hw=0 hw_last=0
[  235.374064] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13713, diff=1, hw=0 hw_last=0
[  235.390644] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13714, diff=1, hw=0 hw_last=0
[  235.407221] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13715, diff=1, hw=0 hw_last=0
[  235.423800] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13716, diff=1, hw=0 hw_last=0
[  235.440382] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13717, diff=1, hw=0 hw_last=0
[  235.456959] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13718, diff=1, hw=0 hw_last=0
[  235.473536] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13719, diff=1, hw=0 hw_last=0
[  235.490119] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13720, diff=1, hw=0 hw_last=0
[  235.506697] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13721, diff=1, hw=0 hw_last=0
[  235.523274] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13722, diff=1, hw=0 hw_last=0
[  235.539858] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13723, diff=1, hw=0 hw_last=0
[  235.556434] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13724, diff=1, hw=0 hw_last=0
[  235.573014] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13725, diff=1, hw=0 hw_last=0
[  235.589592] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13726, diff=1, hw=0 hw_last=0
[  235.606171] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13727, diff=1, hw=0 hw_last=0
[  235.622749] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13728, diff=1, hw=0 hw_last=0
[  235.639331] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13729, diff=1, hw=0 hw_last=0
[  235.655910] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13730, diff=1, hw=0 hw_last=0
[  235.672486] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13731, diff=1, hw=0 hw_last=0
[  235.689067] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13732, diff=1, hw=0 hw_last=0
[  235.705648] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13733, diff=1, hw=0 hw_last=0
[  235.722224] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13734, diff=1, hw=0 hw_last=0
[  235.738804] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13735, diff=1, hw=0 hw_last=0
[  235.755386] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13736, diff=1, hw=0 hw_last=0
[  235.771962] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13737, diff=1, hw=0 hw_last=0
[  235.788543] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13738, diff=1, hw=0 hw_last=0
[  235.805120] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13739, diff=1, hw=0 hw_last=0
[  235.820559] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  235.820680] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 13740 to client
[  235.821709] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13740, diff=1, hw=0 hw_last=0
[  235.830955] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  235.831056] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007967e7cb
[  235.831139] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  235.831212] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000ec98bd42 state to 000000007967e7cb
[  235.831290] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  235.831379] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 000000007967e7cb
[  235.831462] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000ec98bd42
[  235.831538] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  235.831609] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  235.831680] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  235.831752] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  235.831827] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  235.831900] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  235.831975] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  235.832046] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  235.832117] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 000000007967e7cb
[  235.832191] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  235.832264] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000007967e7cb
[  235.832347] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  235.832394] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  235.832430] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000007967e7cb
[  235.832508] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000095dd8ec0 to 000000007967e7cb
[  235.832583] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000007967e7cb
[  235.832660] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  235.832732] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  235.832805] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  235.832886] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000007967e7cb
[  235.832961] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007967e7cb
[  235.833035] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  235.833107] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  235.833178] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  235.833250] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  235.833323] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007967e7cb
[  236.057436] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  236.057516] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  236.070393] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13755, diff=1, hw=0 hw_last=0
[  236.070506] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007967e7cb
[  236.070575] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  236.070638] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  236.070699] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  236.070762] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  236.070825] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007967e7cb
[  236.086972] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13756, diff=1, hw=0 hw_last=0
[  236.103551] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13757, diff=1, hw=0 hw_last=0
[  236.120127] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13758, diff=1, hw=0 hw_last=0
[  236.136705] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13759, diff=1, hw=0 hw_last=0
[  236.153286] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13760, diff=1, hw=0 hw_last=0
[  236.169869] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13761, diff=1, hw=0 hw_last=0
[  236.186446] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13762, diff=1, hw=0 hw_last=0
[  236.203025] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13763, diff=1, hw=0 hw_last=0
[  236.219607] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13764, diff=1, hw=0 hw_last=0
[  236.236180] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13765, diff=1, hw=0 hw_last=0
[  236.252766] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13766, diff=1, hw=0 hw_last=0
[  236.269337] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13767, diff=1, hw=0 hw_last=0
[  236.285915] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13768, diff=1, hw=0 hw_last=0
[  236.302495] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13769, diff=1, hw=0 hw_last=0
[  236.319075] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13770, diff=1, hw=0 hw_last=0
[  236.335653] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13771, diff=1, hw=0 hw_last=0
[  236.352232] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13772, diff=1, hw=0 hw_last=0
[  236.368819] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13773, diff=1, hw=0 hw_last=0
[  236.385397] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13774, diff=1, hw=0 hw_last=0
[  236.401976] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13775, diff=1, hw=0 hw_last=0
[  236.418556] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13776, diff=1, hw=0 hw_last=0
[  236.435132] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13777, diff=1, hw=0 hw_last=0
[  236.451710] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13778, diff=1, hw=0 hw_last=0
[  236.468291] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13779, diff=1, hw=0 hw_last=0
[  236.484869] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13780, diff=1, hw=0 hw_last=0
[  236.501448] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13781, diff=1, hw=0 hw_last=0
[  236.518025] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13782, diff=1, hw=0 hw_last=0
[  236.534606] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13783, diff=1, hw=0 hw_last=0
[  236.551187] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13784, diff=1, hw=0 hw_last=0
[  236.567763] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13785, diff=1, hw=0 hw_last=0
[  236.584343] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13786, diff=1, hw=0 hw_last=0
[  236.600923] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13787, diff=1, hw=0 hw_last=0
[  236.617501] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13788, diff=1, hw=0 hw_last=0
[  236.634080] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13789, diff=1, hw=0 hw_last=0
[  236.634626] systemd-journald[214]: Data hash table of /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal has a fill level at 75.1 (2732 of 3640 items, 2097152 file size, 767 bytes per hash table item), suggesting rotation.
[  236.658865] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13790, diff=1, hw=0 hw_last=0
[  236.659013] systemd-journald[214]: /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal: Journal header limits reached or header out-of-date, rotating.
[  236.679085] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13791, diff=1, hw=0 hw_last=0
[  236.683824] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13792, diff=1, hw=0 hw_last=0
[  236.700400] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13793, diff=1, hw=0 hw_last=0
[  236.716977] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13794, diff=1, hw=0 hw_last=0
[  236.733558] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13795, diff=1, hw=0 hw_last=0
[  236.750137] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13796, diff=1, hw=0 hw_last=0
[  236.766726] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13797, diff=1, hw=0 hw_last=0
[  236.783307] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13798, diff=1, hw=0 hw_last=0
[  236.799884] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13799, diff=1, hw=0 hw_last=0
[  236.816458] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13800, diff=1, hw=0 hw_last=0
[  236.828058] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  236.828188] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 13801 to client
[  236.833041] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13801, diff=1, hw=0 hw_last=0
[  236.842475] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  236.842578] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000029aaf162
[  236.982254] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13810, diff=1, hw=0 hw_last=0
[  236.998832] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13811, diff=1, hw=0 hw_last=0
[  237.015413] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13812, diff=1, hw=0 hw_last=0
[  237.031988] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13813, diff=1, hw=0 hw_last=0
[  237.048567] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13814, diff=1, hw=0 hw_last=0
[  237.065143] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13815, diff=1, hw=0 hw_last=0
[  237.073794] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  237.073913] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000029aaf162
[  237.073999] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  237.074074] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000bac3ec2d state to 0000000029aaf162
[  237.074151] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  237.074223] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000adb7ad91 state to 0000000029aaf162
[  237.074303] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000bac3ec2d
[  237.074377] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  237.074449] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  237.074520] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  237.074592] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  237.074667] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  237.074738] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  237.074814] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  237.074886] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  237.074958] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 0000000029aaf162
[  237.075033] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  237.075106] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000029aaf162
[  237.075189] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  237.075236] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  237.075273] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000029aaf162
[  237.075389] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000eae20a14 to 0000000029aaf162
[  237.075467] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000029aaf162
[  237.075558] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000029aaf162 nonblocking
[  237.075673] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  237.075754] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  237.081722] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13816, diff=1, hw=0 hw_last=0
[  237.081823] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000029aaf162
[  237.081890] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  237.081952] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  237.082013] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  237.082074] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  237.082137] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000029aaf162
[  237.098299] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13817, diff=1, hw=0 hw_last=0
[  237.114878] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13818, diff=1, hw=0 hw_last=0
[  237.131458] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13819, diff=1, hw=0 hw_last=0
[  237.148037] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13820, diff=1, hw=0 hw_last=0
[  237.164616] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13821, diff=1, hw=0 hw_last=0
[  237.181197] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13822, diff=1, hw=0 hw_last=0
[  237.197776] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13823, diff=1, hw=0 hw_last=0
[  237.214355] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13824, diff=1, hw=0 hw_last=0
[  237.230937] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13825, diff=1, hw=0 hw_last=0
[  237.247514] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13826, diff=1, hw=0 hw_last=0
[  237.264090] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13827, diff=1, hw=0 hw_last=0
[  237.280668] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13828, diff=1, hw=0 hw_last=0
[  237.297246] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13829, diff=1, hw=0 hw_last=0
[  237.313826] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13830, diff=1, hw=0 hw_last=0
[  237.330406] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13831, diff=1, hw=0 hw_last=0
[  237.346984] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13832, diff=1, hw=0 hw_last=0
[  237.363563] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13833, diff=1, hw=0 hw_last=0
[  237.380148] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13834, diff=1, hw=0 hw_last=0
[  237.396727] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13835, diff=1, hw=0 hw_last=0
[  237.413306] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13836, diff=1, hw=0 hw_last=0
[  237.429887] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13837, diff=1, hw=0 hw_last=0
[  237.446465] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13838, diff=1, hw=0 hw_last=0
[  237.463039] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13839, diff=1, hw=0 hw_last=0
[  237.479620] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13840, diff=1, hw=0 hw_last=0
[  237.496199] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13841, diff=1, hw=0 hw_last=0
[  237.512780] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13842, diff=1, hw=0 hw_last=0
[  237.529356] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13843, diff=1, hw=0 hw_last=0
[  237.545938] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13844, diff=1, hw=0 hw_last=0
[  237.562516] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13845, diff=1, hw=0 hw_last=0
[  237.579097] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13846, diff=1, hw=0 hw_last=0
[  237.595673] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13847, diff=1, hw=0 hw_last=0
[  237.612252] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13848, diff=1, hw=0 hw_last=0
[  237.628834] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13849, diff=1, hw=0 hw_last=0
[  237.645411] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13850, diff=1, hw=0 hw_last=0
[  237.661994] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13851, diff=1, hw=0 hw_last=0
[  237.678572] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13852, diff=1, hw=0 hw_last=0
[  237.695151] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13853, diff=1, hw=0 hw_last=0
[  237.711731] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13854, diff=1, hw=0 hw_last=0
[  237.728308] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13855, diff=1, hw=0 hw_last=0
[  237.744888] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13856, diff=1, hw=0 hw_last=0
[  237.761470] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13857, diff=1, hw=0 hw_last=0
[  237.778047] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13858, diff=1, hw=0 hw_last=0
[  237.794627] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13859, diff=1, hw=0 hw_last=0
[  237.811205] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13860, diff=1, hw=0 hw_last=0
[  237.827785] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13861, diff=1, hw=0 hw_last=0
[  237.844375] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13862, diff=1, hw=0 hw_last=0
[  237.847058] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  237.847178] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 13863 to client
[  237.853455] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  237.853559] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006e1bef3e
[  237.853642] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  237.853715] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000003519e999 state to 000000006e1bef3e
[  237.853793] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  237.853866] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 000000006e1bef3e
[  237.853945] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 000000003519e999
[  237.854019] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  237.854091] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  237.854163] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  237.854234] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  237.854310] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  237.854382] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  237.854459] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  237.854531] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  237.854602] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000006e1bef3e
[  237.854677] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  237.854750] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000006e1bef3e
[  237.854832] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  237.854879] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  237.854916] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006e1bef3e
[  237.854996] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000029aaf162 to 000000006e1bef3e
[  237.855070] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006e1bef3e
[  237.855148] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  237.855221] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  237.855294] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  237.855395] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000006e1bef3e
[  237.855474] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006e1bef3e
[  237.855549] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  237.855622] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  237.855696] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  237.855768] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  237.855840] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006e1bef3e
[  237.857202] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  237.860949] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13863, diff=1, hw=0 hw_last=0
[  237.877528] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13864, diff=1, hw=0 hw_last=0
[  237.894106] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13865, diff=1, hw=0 hw_last=0
[  237.910686] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13866, diff=1, hw=0 hw_last=0
[  237.927268] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13867, diff=1, hw=0 hw_last=0
[  237.943847] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13868, diff=1, hw=0 hw_last=0
[  237.960425] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13869, diff=1, hw=0 hw_last=0
[  237.977003] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13870, diff=1, hw=0 hw_last=0
[  237.993584] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13871, diff=1, hw=0 hw_last=0
[  238.010166] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13872, diff=1, hw=0 hw_last=0
[  238.026742] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13873, diff=1, hw=0 hw_last=0
[  238.043320] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13874, diff=1, hw=0 hw_last=0
[  238.059898] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13875, diff=1, hw=0 hw_last=0
[  238.076476] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13876, diff=1, hw=0 hw_last=0
[  238.084787] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  238.086262] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006e1bef3e
[  238.086342] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000000305e034 to 000000006e1bef3e
[  238.086416] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006e1bef3e
[  238.086504] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006e1bef3e nonblocking
[  238.086628] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  238.086700] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  238.093054] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13877, diff=1, hw=0 hw_last=0
[  238.093167] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006e1bef3e
[  238.093242] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  238.093304] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  238.093365] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  238.093428] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  238.093490] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006e1bef3e
[  238.109632] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13878, diff=1, hw=0 hw_last=0
[  238.126210] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13879, diff=1, hw=0 hw_last=0
[  238.142790] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13880, diff=1, hw=0 hw_last=0
[  238.159367] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13881, diff=1, hw=0 hw_last=0
[  238.175947] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13882, diff=1, hw=0 hw_last=0
[  238.192529] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13883, diff=1, hw=0 hw_last=0
[  238.209106] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13884, diff=1, hw=0 hw_last=0
[  238.225687] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13885, diff=1, hw=0 hw_last=0
[  238.242267] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13886, diff=1, hw=0 hw_last=0
[  238.258846] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13887, diff=1, hw=0 hw_last=0
[  238.275422] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13888, diff=1, hw=0 hw_last=0
[  238.291999] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13889, diff=1, hw=0 hw_last=0
[  238.308578] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13890, diff=1, hw=0 hw_last=0
[  238.325157] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13891, diff=1, hw=0 hw_last=0
[  238.341736] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13892, diff=1, hw=0 hw_last=0
[  238.358315] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13893, diff=1, hw=0 hw_last=0
[  238.374894] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13894, diff=1, hw=0 hw_last=0
[  238.391478] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13895, diff=1, hw=0 hw_last=0
[  238.408058] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13896, diff=1, hw=0 hw_last=0
[  238.424642] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13897, diff=1, hw=0 hw_last=0
[  238.441215] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13898, diff=1, hw=0 hw_last=0
[  238.457793] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13899, diff=1, hw=0 hw_last=0
[  238.474373] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13900, diff=1, hw=0 hw_last=0
[  238.490953] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13901, diff=1, hw=0 hw_last=0
[  238.507532] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13902, diff=1, hw=0 hw_last=0
[  238.524112] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13903, diff=1, hw=0 hw_last=0
[  238.540694] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13904, diff=1, hw=0 hw_last=0
[  238.557271] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13905, diff=1, hw=0 hw_last=0
[  238.573848] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13906, diff=1, hw=0 hw_last=0
[  238.590425] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13907, diff=1, hw=0 hw_last=0
[  238.607005] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13908, diff=1, hw=0 hw_last=0
[  238.623586] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13909, diff=1, hw=0 hw_last=0
[  238.640166] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13910, diff=1, hw=0 hw_last=0
[  238.656746] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13911, diff=1, hw=0 hw_last=0
[  238.673324] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13912, diff=1, hw=0 hw_last=0
[  238.689905] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13913, diff=1, hw=0 hw_last=0
[  238.706482] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13914, diff=1, hw=0 hw_last=0
[  238.723059] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13915, diff=1, hw=0 hw_last=0
[  238.739641] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13916, diff=1, hw=0 hw_last=0
[  238.756222] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13917, diff=1, hw=0 hw_last=0
[  238.772798] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13918, diff=1, hw=0 hw_last=0
[  238.789376] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13919, diff=1, hw=0 hw_last=0
[  238.805956] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13920, diff=1, hw=0 hw_last=0
[  238.822539] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13921, diff=1, hw=0 hw_last=0
[  238.834502] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  238.834624] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 13922 to client
[  238.839125] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13922, diff=1, hw=0 hw_last=0
[  238.847912] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  238.848011] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000004593454f
[  238.848987] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  238.849059] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 000000004593454f
[  238.849134] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  238.849206] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000004593454f
[  238.849289] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  238.849341] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  238.849377] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000004593454f
[  238.849457] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000007967e7cb to 000000004593454f
[  238.849532] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000004593454f
[  238.849614] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  238.849688] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  238.849764] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  238.849845] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000004593454f
[  238.849919] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000004593454f
[  238.849993] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  238.850065] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  238.850144] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  238.850223] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  238.850296] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000004593454f
[  238.851763] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  238.855702] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13923, diff=1, hw=0 hw_last=0
[  238.872279] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13924, diff=1, hw=0 hw_last=0
[  238.888857] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13925, diff=1, hw=0 hw_last=0
[  238.905440] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13926, diff=1, hw=0 hw_last=0
[  238.922020] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13927, diff=1, hw=0 hw_last=0
[  238.938597] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13928, diff=1, hw=0 hw_last=0
[  238.955177] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13929, diff=1, hw=0 hw_last=0
[  238.971757] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13930, diff=1, hw=0 hw_last=0
[  238.988337] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13931, diff=1, hw=0 hw_last=0
[  239.004915] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13932, diff=1, hw=0 hw_last=0
[  239.021495] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13933, diff=1, hw=0 hw_last=0
[  239.038069] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13934, diff=1, hw=0 hw_last=0
[  239.054651] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13935, diff=1, hw=0 hw_last=0
[  239.071228] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13936, diff=1, hw=0 hw_last=0
[  239.072401] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  239.072511] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000004593454f
[  239.072600] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  239.072675] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000082b4fa6a state to 000000004593454f
[  239.072753] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  239.072826] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000e8543c49 state to 000000004593454f
[  239.072908] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 0000000082b4fa6a
[  239.072983] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  239.073055] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  239.073127] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  239.073198] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  239.073274] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  239.073346] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  239.073423] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  239.073494] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  239.073566] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 000000004593454f
[  239.073641] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  239.073715] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000004593454f
[  239.073798] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  239.073845] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  239.073882] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000004593454f
[  239.073962] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000095dd8ec0 to 000000004593454f
[  239.074036] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000004593454f
[  239.074124] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000004593454f nonblocking
[  239.074239] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  239.074309] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  239.087806] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13937, diff=1, hw=0 hw_last=0
[  239.087918] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000004593454f
[  239.087992] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  239.088054] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  239.088116] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  239.088177] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  239.088238] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000004593454f
[  239.104385] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13938, diff=1, hw=0 hw_last=0
[  239.120962] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13939, diff=1, hw=0 hw_last=0
[  239.137541] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13940, diff=1, hw=0 hw_last=0
[  239.154119] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13941, diff=1, hw=0 hw_last=0
[  239.170701] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13942, diff=1, hw=0 hw_last=0
[  239.270172] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13948, diff=1, hw=0 hw_last=0
[  239.286750] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13949, diff=1, hw=0 hw_last=0
[  239.303330] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13950, diff=1, hw=0 hw_last=0
[  239.319909] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13951, diff=1, hw=0 hw_last=0
[  239.336488] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13952, diff=1, hw=0 hw_last=0
[  239.353067] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13953, diff=1, hw=0 hw_last=0
[  239.369653] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13954, diff=1, hw=0 hw_last=0
[  239.386231] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13955, diff=1, hw=0 hw_last=0
[  239.402811] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13956, diff=1, hw=0 hw_last=0
[  239.419387] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13957, diff=1, hw=0 hw_last=0
[  239.435968] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13958, diff=1, hw=0 hw_last=0
[  239.452548] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13959, diff=1, hw=0 hw_last=0
[  239.469126] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13960, diff=1, hw=0 hw_last=0
[  239.485703] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13961, diff=1, hw=0 hw_last=0
[  239.502287] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13962, diff=1, hw=0 hw_last=0
[  239.518866] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13963, diff=1, hw=0 hw_last=0
[  239.535441] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13964, diff=1, hw=0 hw_last=0
[  239.552020] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13965, diff=1, hw=0 hw_last=0
[  239.568599] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13966, diff=1, hw=0 hw_last=0
[  239.585180] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13967, diff=1, hw=0 hw_last=0
[  239.601760] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13968, diff=1, hw=0 hw_last=0
[  239.618338] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13969, diff=1, hw=0 hw_last=0
[  239.634920] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13970, diff=1, hw=0 hw_last=0
[  239.651496] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13971, diff=1, hw=0 hw_last=0
[  239.668078] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13972, diff=1, hw=0 hw_last=0
[  239.684656] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13973, diff=1, hw=0 hw_last=0
[  239.701233] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13974, diff=1, hw=0 hw_last=0
[  239.717813] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13975, diff=1, hw=0 hw_last=0
[  239.734395] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13976, diff=1, hw=0 hw_last=0
[  239.750971] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13977, diff=1, hw=0 hw_last=0
[  239.767552] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13978, diff=1, hw=0 hw_last=0
[  239.784130] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13979, diff=1, hw=0 hw_last=0
[  239.800714] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13980, diff=1, hw=0 hw_last=0
[  239.804092] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  239.804215] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 13981 to client
[  239.809492] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  239.809597] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000fde3661d
[  239.809680] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  239.809753] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000055579822 state to 00000000fde3661d
[  239.809829] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  239.809900] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 00000000fde3661d
[  239.809981] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 0000000055579822
[  239.810055] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  239.810126] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  239.810198] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  239.810269] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  239.810345] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  239.810416] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  239.810492] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  239.810563] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  239.810635] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 00000000fde3661d
[  239.810709] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  239.810782] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000fde3661d
[  239.810864] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  239.810913] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  239.810949] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000fde3661d
[  239.811029] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000000cc24793 to 00000000fde3661d
[  239.811102] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000fde3661d
[  239.811181] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  239.811253] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  239.811342] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  239.811426] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 00000000fde3661d
[  239.811501] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000fde3661d
[  239.811575] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  239.811647] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  239.811719] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  239.811791] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  239.811865] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000fde3661d
[  240.049400] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13995, diff=1, hw=0 hw_last=0
[  240.049511] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000fde3661d
[  240.049586] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  240.049648] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  240.049709] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  240.049772] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  240.049833] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000fde3661d
[  240.065978] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13996, diff=1, hw=0 hw_last=0
[  240.082554] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13997, diff=1, hw=0 hw_last=0
[  240.099133] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13998, diff=1, hw=0 hw_last=0
[  240.115714] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=13999, diff=1, hw=0 hw_last=0
[  240.132293] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14000, diff=1, hw=0 hw_last=0
[  240.148875] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14001, diff=1, hw=0 hw_last=0
[  240.165453] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14002, diff=1, hw=0 hw_last=0
[  240.182033] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14003, diff=1, hw=0 hw_last=0
[  240.198614] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14004, diff=1, hw=0 hw_last=0
[  240.215189] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14005, diff=1, hw=0 hw_last=0
[  240.231766] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14006, diff=1, hw=0 hw_last=0
[  240.248344] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14007, diff=1, hw=0 hw_last=0
[  240.264923] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14008, diff=1, hw=0 hw_last=0
[  240.281502] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14009, diff=1, hw=0 hw_last=0
[  240.298081] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14010, diff=1, hw=0 hw_last=0
[  240.314661] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14011, diff=1, hw=0 hw_last=0
[  240.331242] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14012, diff=1, hw=0 hw_last=0
[  240.347824] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14013, diff=1, hw=0 hw_last=0
[  240.364405] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14014, diff=1, hw=0 hw_last=0
[  240.380983] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14015, diff=1, hw=0 hw_last=0
[  240.397564] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14016, diff=1, hw=0 hw_last=0
[  240.414143] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14017, diff=1, hw=0 hw_last=0
[  240.430721] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14018, diff=1, hw=0 hw_last=0
[  240.447301] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14019, diff=1, hw=0 hw_last=0
[  240.463877] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14020, diff=1, hw=0 hw_last=0
[  240.480455] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14021, diff=1, hw=0 hw_last=0
[  240.497037] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14022, diff=1, hw=0 hw_last=0
[  240.513614] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14023, diff=1, hw=0 hw_last=0
[  240.530195] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14024, diff=1, hw=0 hw_last=0
[  240.546774] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14025, diff=1, hw=0 hw_last=0
[  240.563354] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14026, diff=1, hw=0 hw_last=0
[  240.579932] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14027, diff=1, hw=0 hw_last=0
[  240.596510] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14028, diff=1, hw=0 hw_last=0
[  240.613091] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14029, diff=1, hw=0 hw_last=0
[  240.629673] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14030, diff=1, hw=0 hw_last=0
[  240.646253] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14031, diff=1, hw=0 hw_last=0
[  240.662829] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14032, diff=1, hw=0 hw_last=0
[  240.679408] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14033, diff=1, hw=0 hw_last=0
[  240.695989] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14034, diff=1, hw=0 hw_last=0
[  240.712566] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14035, diff=1, hw=0 hw_last=0
[  240.729146] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14036, diff=1, hw=0 hw_last=0
[  240.745722] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14037, diff=1, hw=0 hw_last=0
[  240.762300] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14038, diff=1, hw=0 hw_last=0
[  240.778884] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14039, diff=1, hw=0 hw_last=0
[  240.795460] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14040, diff=1, hw=0 hw_last=0
[  240.812040] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14041, diff=1, hw=0 hw_last=0
[  240.828619] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14042, diff=1, hw=0 hw_last=0
[  240.845201] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14043, diff=1, hw=0 hw_last=0
[  240.861778] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14044, diff=1, hw=0 hw_last=0
[  240.878358] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14045, diff=1, hw=0 hw_last=0
[  240.894936] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14046, diff=1, hw=0 hw_last=0
[  240.911516] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14047, diff=1, hw=0 hw_last=0
[  240.928099] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14048, diff=1, hw=0 hw_last=0
[  240.933158] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  241.169866] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000006c5644bb
[  241.169949] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  241.169998] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  241.170035] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006c5644bb
[  241.170116] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000000cc24793 to 000000006c5644bb
[  241.170190] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006c5644bb
[  241.170279] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006c5644bb nonblocking
[  241.170398] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  241.170478] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  241.176785] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14063, diff=1, hw=0 hw_last=0
[  241.176897] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006c5644bb
[  241.176968] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  241.177031] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  241.177093] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  241.177156] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  241.177220] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006c5644bb
[  241.193364] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14064, diff=1, hw=0 hw_last=0
[  241.209941] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14065, diff=1, hw=0 hw_last=0
[  241.226518] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14066, diff=1, hw=0 hw_last=0
[  241.243101] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14067, diff=1, hw=0 hw_last=0
[  241.259679] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14068, diff=1, hw=0 hw_last=0
[  241.276262] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14069, diff=1, hw=0 hw_last=0
[  241.292838] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14070, diff=1, hw=0 hw_last=0
[  241.309417] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14071, diff=1, hw=0 hw_last=0
[  241.326001] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14072, diff=1, hw=0 hw_last=0
[  241.342579] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14073, diff=1, hw=0 hw_last=0
[  241.359153] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14074, diff=1, hw=0 hw_last=0
[  241.375729] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14075, diff=1, hw=0 hw_last=0
[  241.392309] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14076, diff=1, hw=0 hw_last=0
[  241.408887] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14077, diff=1, hw=0 hw_last=0
[  241.425466] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14078, diff=1, hw=0 hw_last=0
[  241.442046] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14079, diff=1, hw=0 hw_last=0
[  241.458626] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14080, diff=1, hw=0 hw_last=0
[  241.475205] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14081, diff=1, hw=0 hw_last=0
[  241.491791] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14082, diff=1, hw=0 hw_last=0
[  241.508370] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14083, diff=1, hw=0 hw_last=0
[  241.524949] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14084, diff=1, hw=0 hw_last=0
[  241.541531] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14085, diff=1, hw=0 hw_last=0
[  241.558109] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14086, diff=1, hw=0 hw_last=0
[  241.574683] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14087, diff=1, hw=0 hw_last=0
[  241.591260] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14088, diff=1, hw=0 hw_last=0
[  241.607844] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14089, diff=1, hw=0 hw_last=0
[  241.624421] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14090, diff=1, hw=0 hw_last=0
[  241.641001] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14091, diff=1, hw=0 hw_last=0
[  241.657577] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14092, diff=1, hw=0 hw_last=0
[  241.674162] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14093, diff=1, hw=0 hw_last=0
[  241.690741] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14094, diff=1, hw=0 hw_last=0
[  241.707318] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14095, diff=1, hw=0 hw_last=0
[  241.723897] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14096, diff=1, hw=0 hw_last=0
[  241.740473] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14097, diff=1, hw=0 hw_last=0
[  241.757056] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14098, diff=1, hw=0 hw_last=0
[  241.773633] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14099, diff=1, hw=0 hw_last=0
[  241.790216] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14100, diff=1, hw=0 hw_last=0
[  241.806795] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14101, diff=1, hw=0 hw_last=0
[  241.823370] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14102, diff=1, hw=0 hw_last=0
[  241.839954] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14103, diff=1, hw=0 hw_last=0
[  241.856529] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14104, diff=1, hw=0 hw_last=0
[  241.873112] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14105, diff=1, hw=0 hw_last=0
[  241.889689] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14106, diff=1, hw=0 hw_last=0
[  241.906266] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14107, diff=1, hw=0 hw_last=0
[  241.922845] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14108, diff=1, hw=0 hw_last=0
[  242.088653] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14118, diff=1, hw=0 hw_last=0
[  242.089178] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  242.089286] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 14119 to client
[  242.097557] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  242.097664] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008a640c91
[  242.097746] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  242.097819] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000002cafbe1b state to 000000008a640c91
[  242.097896] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  242.097968] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 000000008a640c91
[  242.098048] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 000000002cafbe1b
[  242.098122] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  242.098194] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  242.098265] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  242.098337] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  242.098412] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  242.098484] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  242.098560] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  242.098631] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  242.098703] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 000000008a640c91
[  242.098778] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  242.098850] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000008a640c91
[  242.098932] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  242.098980] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  242.099016] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008a640c91
[  242.099095] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000004593454f to 000000008a640c91
[  242.099169] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008a640c91
[  242.099247] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  242.099337] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  242.099415] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  242.099499] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000008a640c91
[  242.099577] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008a640c91
[  242.099651] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  242.099725] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  242.099797] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  242.099870] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  242.099943] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008a640c91
[  242.101328] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  242.105228] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14119, diff=1, hw=0 hw_last=0
[  242.121804] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14120, diff=1, hw=0 hw_last=0
[  242.138380] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14121, diff=1, hw=0 hw_last=0
[  242.154961] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14122, diff=1, hw=0 hw_last=0
[  242.171543] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14123, diff=1, hw=0 hw_last=0
[  242.188121] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14124, diff=1, hw=0 hw_last=0
[  242.204700] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14125, diff=1, hw=0 hw_last=0
[  242.221278] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14126, diff=1, hw=0 hw_last=0
[  242.237861] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14127, diff=1, hw=0 hw_last=0
[  242.254440] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14128, diff=1, hw=0 hw_last=0
[  242.271019] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14129, diff=1, hw=0 hw_last=0
[  242.287597] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14130, diff=1, hw=0 hw_last=0
[  242.304174] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14131, diff=1, hw=0 hw_last=0
[  242.320753] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14132, diff=1, hw=0 hw_last=0
[  242.329475] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  242.329594] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008a640c91
[  242.329681] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  242.329755] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000002cafbe1b state to 000000008a640c91
[  242.329833] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  242.329906] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 000000008a640c91
[  242.329987] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 000000002cafbe1b
[  242.330061] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  242.330133] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  242.330205] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  242.330277] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  242.330352] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  242.330423] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  242.330499] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  242.330571] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  242.330643] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 000000008a640c91
[  242.330718] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  242.330792] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000008a640c91
[  242.330873] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  242.330923] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  242.330959] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008a640c91
[  242.331039] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000007967e7cb to 000000008a640c91
[  242.331113] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008a640c91
[  242.331201] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000008a640c91 nonblocking
[  242.358607] systemd-journald[214]: /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal: Journal header limits reached or header out-of-date, rotating.
[  242.358629] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14134, diff=1, hw=0 hw_last=0
[  242.373232] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14135, diff=1, hw=0 hw_last=0
[  242.373342] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008a640c91
[  242.373423] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  242.373499] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  242.373573] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  242.373651] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  242.373730] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008a640c91
[  242.387066] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14136, diff=1, hw=0 hw_last=0
[  242.403641] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14137, diff=1, hw=0 hw_last=0
[  242.420221] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14138, diff=1, hw=0 hw_last=0
[  242.436801] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14139, diff=1, hw=0 hw_last=0
[  242.453379] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14140, diff=1, hw=0 hw_last=0
[  242.469959] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14141, diff=1, hw=0 hw_last=0
[  242.486539] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14142, diff=1, hw=0 hw_last=0
[  242.503119] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14143, diff=1, hw=0 hw_last=0
[  242.519695] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14144, diff=1, hw=0 hw_last=0
[  242.536273] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14145, diff=1, hw=0 hw_last=0
[  242.552852] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14146, diff=1, hw=0 hw_last=0
[  242.569431] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14147, diff=1, hw=0 hw_last=0
[  242.586010] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14148, diff=1, hw=0 hw_last=0
[  242.602589] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14149, diff=1, hw=0 hw_last=0
[  242.619168] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14150, diff=1, hw=0 hw_last=0
[  242.635748] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14151, diff=1, hw=0 hw_last=0
[  242.652330] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14152, diff=1, hw=0 hw_last=0
[  242.668908] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14153, diff=1, hw=0 hw_last=0
[  242.685489] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14154, diff=1, hw=0 hw_last=0
[  242.702066] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14155, diff=1, hw=0 hw_last=0
[  242.718647] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14156, diff=1, hw=0 hw_last=0
[  242.735226] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14157, diff=1, hw=0 hw_last=0
[  242.751803] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14158, diff=1, hw=0 hw_last=0
[  242.768384] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14159, diff=1, hw=0 hw_last=0
[  242.784963] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14160, diff=1, hw=0 hw_last=0
[  242.801541] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14161, diff=1, hw=0 hw_last=0
[  242.818120] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14162, diff=1, hw=0 hw_last=0
[  242.834699] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14163, diff=1, hw=0 hw_last=0
[  242.851278] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14164, diff=1, hw=0 hw_last=0
[  242.867858] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14165, diff=1, hw=0 hw_last=0
[  242.884436] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14166, diff=1, hw=0 hw_last=0
[  242.901016] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14167, diff=1, hw=0 hw_last=0
[  242.917598] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14168, diff=1, hw=0 hw_last=0
[  242.934177] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14169, diff=1, hw=0 hw_last=0
[  242.950756] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14170, diff=1, hw=0 hw_last=0
[  242.967336] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14171, diff=1, hw=0 hw_last=0
[  242.983914] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14172, diff=1, hw=0 hw_last=0
[  243.000492] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14173, diff=1, hw=0 hw_last=0
[  243.017071] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14174, diff=1, hw=0 hw_last=0
[  243.033651] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14175, diff=1, hw=0 hw_last=0
[  243.050231] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14176, diff=1, hw=0 hw_last=0
[  243.066808] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14177, diff=1, hw=0 hw_last=0
[  243.083390] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14178, diff=1, hw=0 hw_last=0
[  243.099967] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14179, diff=1, hw=0 hw_last=0
[  243.116548] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14180, diff=1, hw=0 hw_last=0
[  243.133126] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14181, diff=1, hw=0 hw_last=0
[  243.149705] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14182, diff=1, hw=0 hw_last=0
[  243.166283] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14183, diff=1, hw=0 hw_last=0
[  243.182864] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14184, diff=1, hw=0 hw_last=0
[  243.199442] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14185, diff=1, hw=0 hw_last=0
[  243.216022] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14186, diff=1, hw=0 hw_last=0
[  243.232603] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14187, diff=1, hw=0 hw_last=0
[  243.315499] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14192, diff=1, hw=0 hw_last=0
[  243.332082] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14193, diff=1, hw=0 hw_last=0
[  243.348663] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14194, diff=1, hw=0 hw_last=0
[  243.365241] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14195, diff=1, hw=0 hw_last=0
[  243.381819] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14196, diff=1, hw=0 hw_last=0
[  243.398398] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14197, diff=1, hw=0 hw_last=0
[  243.414977] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14198, diff=1, hw=0 hw_last=0
[  243.431559] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14199, diff=1, hw=0 hw_last=0
[  243.448135] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14200, diff=1, hw=0 hw_last=0
[  243.464715] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14201, diff=1, hw=0 hw_last=0
[  243.481293] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14202, diff=1, hw=0 hw_last=0
[  243.497873] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14203, diff=1, hw=0 hw_last=0
[  243.507575] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  243.507693] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e0dcab9c
[  243.507779] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  243.507855] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000215b6887 state to 00000000e0dcab9c
[  243.507931] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  243.508004] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a743c9a8 state to 00000000e0dcab9c
[  243.508085] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000215b6887
[  243.508159] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  243.508230] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  243.508301] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  243.508373] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  243.508447] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  243.508518] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  243.508594] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  243.508665] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  243.508736] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 00000000e0dcab9c
[  243.508811] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  243.508885] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000e0dcab9c
[  243.508967] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  243.509024] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  243.509061] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000e0dcab9c
[  243.509139] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000029aaf162 to 00000000e0dcab9c
[  243.509212] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000e0dcab9c
[  243.509300] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e0dcab9c nonblocking
[  243.509415] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  243.509486] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  243.514449] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14204, diff=1, hw=0 hw_last=0
[  243.514554] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e0dcab9c
[  243.514627] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  243.514689] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  243.514751] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  243.514813] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  243.514875] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e0dcab9c
[  243.531029] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14205, diff=1, hw=0 hw_last=0
[  243.547606] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14206, diff=1, hw=0 hw_last=0
[  243.564183] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14207, diff=1, hw=0 hw_last=0
[  243.580764] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14208, diff=1, hw=0 hw_last=0
[  243.597343] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14209, diff=1, hw=0 hw_last=0
[  243.613923] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14210, diff=1, hw=0 hw_last=0
[  243.630501] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14211, diff=1, hw=0 hw_last=0
[  243.647081] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14212, diff=1, hw=0 hw_last=0
[  243.663662] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14213, diff=1, hw=0 hw_last=0
[  243.680244] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14214, diff=1, hw=0 hw_last=0
[  243.696819] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14215, diff=1, hw=0 hw_last=0
[  243.713396] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14216, diff=1, hw=0 hw_last=0
[  243.729975] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14217, diff=1, hw=0 hw_last=0
[  243.746556] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14218, diff=1, hw=0 hw_last=0
[  243.763133] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14219, diff=1, hw=0 hw_last=0
[  243.779713] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14220, diff=1, hw=0 hw_last=0
[  243.796293] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14221, diff=1, hw=0 hw_last=0
[  243.812871] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14222, diff=1, hw=0 hw_last=0
[  243.829453] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14223, diff=1, hw=0 hw_last=0
[  243.846031] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14224, diff=1, hw=0 hw_last=0
[  243.862612] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14225, diff=1, hw=0 hw_last=0
[  243.879190] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14226, diff=1, hw=0 hw_last=0
[  244.028400] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14235, diff=1, hw=0 hw_last=0
[  244.044980] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14236, diff=1, hw=0 hw_last=0
[  244.061559] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14237, diff=1, hw=0 hw_last=0
[  244.078140] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14238, diff=1, hw=0 hw_last=0
[  244.094717] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14239, diff=1, hw=0 hw_last=0
[  244.111300] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14240, diff=1, hw=0 hw_last=0
[  244.127878] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14241, diff=1, hw=0 hw_last=0
[  244.144459] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14242, diff=1, hw=0 hw_last=0
[  244.161037] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14243, diff=1, hw=0 hw_last=0
[  244.177616] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14244, diff=1, hw=0 hw_last=0
[  244.194194] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14245, diff=1, hw=0 hw_last=0
[  244.210774] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14246, diff=1, hw=0 hw_last=0
[  244.227354] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14247, diff=1, hw=0 hw_last=0
[  244.243933] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14248, diff=1, hw=0 hw_last=0
[  244.260515] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14249, diff=1, hw=0 hw_last=0
[  244.277090] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14250, diff=1, hw=0 hw_last=0
[  244.293671] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14251, diff=1, hw=0 hw_last=0
[  244.310248] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14252, diff=1, hw=0 hw_last=0
[  244.326828] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14253, diff=1, hw=0 hw_last=0
[  244.343406] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14254, diff=1, hw=0 hw_last=0
[  244.359989] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14255, diff=1, hw=0 hw_last=0
[  244.376565] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14256, diff=1, hw=0 hw_last=0
[  244.393145] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14257, diff=1, hw=0 hw_last=0
[  244.409725] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14258, diff=1, hw=0 hw_last=0
[  244.426306] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14259, diff=1, hw=0 hw_last=0
[  244.438937] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  244.439060] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 14260 to client
[  244.442887] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14260, diff=1, hw=0 hw_last=0
[  244.452346] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  244.452450] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000071ef6b0b
[  244.452534] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  244.452609] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000bac3ec2d state to 0000000071ef6b0b
[  244.452687] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  244.452760] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 0000000071ef6b0b
[  244.452841] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000bac3ec2d
[  244.452916] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  244.452988] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  244.453060] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  244.453131] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  244.453208] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  244.453279] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  244.453354] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  244.453425] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  244.453497] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 0000000071ef6b0b
[  244.453571] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  244.453644] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000071ef6b0b
[  244.453727] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  244.453779] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  244.453814] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000071ef6b0b
[  244.453893] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000e0dcab9c to 0000000071ef6b0b
[  244.453967] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000071ef6b0b
[  244.454045] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  244.454119] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  244.454195] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  244.454276] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 0000000071ef6b0b
[  244.454352] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000071ef6b0b
[  244.454427] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  244.454501] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  244.454574] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  244.454647] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  244.454721] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000071ef6b0b
[  244.456188] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  244.459469] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14261, diff=1, hw=0 hw_last=0
[  244.476044] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14262, diff=1, hw=0 hw_last=0
[  244.492624] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14263, diff=1, hw=0 hw_last=0
[  244.509203] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14264, diff=1, hw=0 hw_last=0
[  244.525785] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14265, diff=1, hw=0 hw_last=0
[  244.542362] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14266, diff=1, hw=0 hw_last=0
[  244.558944] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14267, diff=1, hw=0 hw_last=0
[  244.658420] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14273, diff=1, hw=0 hw_last=0
[  244.674994] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14274, diff=1, hw=0 hw_last=0
[  244.676222] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  244.676334] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000071ef6b0b
[  244.676420] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  244.676493] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000bac3ec2d state to 0000000071ef6b0b
[  244.676572] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  244.676644] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 0000000071ef6b0b
[  244.676723] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000bac3ec2d
[  244.676797] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  244.676869] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  244.676940] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  244.677012] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  244.677086] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  244.677157] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  244.677232] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  244.677303] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  244.677374] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 0000000071ef6b0b
[  244.677450] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  244.677524] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000071ef6b0b
[  244.677606] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  244.677652] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  244.677688] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000071ef6b0b
[  244.677768] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000006e1bef3e to 0000000071ef6b0b
[  244.677841] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000071ef6b0b
[  244.677930] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000071ef6b0b nonblocking
[  244.678041] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  244.678126] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  244.691572] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14275, diff=1, hw=0 hw_last=0
[  244.691687] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000071ef6b0b
[  244.691769] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  244.691843] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  244.691918] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  244.691991] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  244.692067] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000071ef6b0b
[  244.708151] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14276, diff=1, hw=0 hw_last=0
[  244.724730] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14277, diff=1, hw=0 hw_last=0
[  244.741308] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14278, diff=1, hw=0 hw_last=0
[  244.757887] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14279, diff=1, hw=0 hw_last=0
[  244.774470] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14280, diff=1, hw=0 hw_last=0
[  244.791046] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14281, diff=1, hw=0 hw_last=0
[  244.807626] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14282, diff=1, hw=0 hw_last=0
[  244.824206] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14283, diff=1, hw=0 hw_last=0
[  244.840786] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14284, diff=1, hw=0 hw_last=0
[  244.857361] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14285, diff=1, hw=0 hw_last=0
[  244.873940] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14286, diff=1, hw=0 hw_last=0
[  244.890519] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14287, diff=1, hw=0 hw_last=0
[  244.907098] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14288, diff=1, hw=0 hw_last=0
[  244.923677] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14289, diff=1, hw=0 hw_last=0
[  244.940256] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14290, diff=1, hw=0 hw_last=0
[  244.956835] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14291, diff=1, hw=0 hw_last=0
[  244.973417] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14292, diff=1, hw=0 hw_last=0
[  244.989996] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14293, diff=1, hw=0 hw_last=0
[  245.006577] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14294, diff=1, hw=0 hw_last=0
[  245.023155] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14295, diff=1, hw=0 hw_last=0
[  245.039733] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14296, diff=1, hw=0 hw_last=0
[  245.056313] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14297, diff=1, hw=0 hw_last=0
[  245.072891] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14298, diff=1, hw=0 hw_last=0
[  245.089472] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14299, diff=1, hw=0 hw_last=0
[  245.106050] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14300, diff=1, hw=0 hw_last=0
[  245.122628] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14301, diff=1, hw=0 hw_last=0
[  245.139207] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14302, diff=1, hw=0 hw_last=0
[  245.155788] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14303, diff=1, hw=0 hw_last=0
[  245.172367] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14304, diff=1, hw=0 hw_last=0
[  245.188947] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14305, diff=1, hw=0 hw_last=0
[  245.205526] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14306, diff=1, hw=0 hw_last=0
[  245.222106] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14307, diff=1, hw=0 hw_last=0
[  245.580806] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006fb5b2d2
[  245.580885] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000008a640c91 to 000000006fb5b2d2
[  245.580959] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006fb5b2d2
[  245.581038] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  245.581111] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  245.581184] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  245.581266] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000006fb5b2d2
[  245.581340] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006fb5b2d2
[  245.581415] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  245.581487] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  245.581559] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  245.581632] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  245.581705] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006fb5b2d2
[  245.583109] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  245.586854] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14329, diff=1, hw=0 hw_last=0
[  245.603430] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14330, diff=1, hw=0 hw_last=0
[  245.620009] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14331, diff=1, hw=0 hw_last=0
[  245.636589] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14332, diff=1, hw=0 hw_last=0
[  245.653170] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14333, diff=1, hw=0 hw_last=0
[  245.669748] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14334, diff=1, hw=0 hw_last=0
[  245.686327] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14335, diff=1, hw=0 hw_last=0
[  245.702908] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14336, diff=1, hw=0 hw_last=0
[  245.719488] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14337, diff=1, hw=0 hw_last=0
[  245.736067] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14338, diff=1, hw=0 hw_last=0
[  245.752645] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14339, diff=1, hw=0 hw_last=0
[  245.769223] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14340, diff=1, hw=0 hw_last=0
[  245.785801] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14341, diff=1, hw=0 hw_last=0
[  245.802382] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14342, diff=1, hw=0 hw_last=0
[  245.811917] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  245.812035] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006fb5b2d2
[  245.812121] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  245.812194] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000003519e999 state to 000000006fb5b2d2
[  245.812272] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  245.812344] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 000000006fb5b2d2
[  245.812424] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 000000003519e999
[  245.812499] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  245.812571] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  245.812643] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  245.812715] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  245.812790] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  245.812862] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  245.812937] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  245.813009] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  245.813081] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 000000006fb5b2d2
[  245.813157] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  245.813231] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000006fb5b2d2
[  245.813314] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  245.813362] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  245.813398] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006fb5b2d2
[  245.813480] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000004593454f to 000000006fb5b2d2
[  245.813556] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006fb5b2d2
[  245.813643] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006fb5b2d2 nonblocking
[  245.813762] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  245.813855] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  245.818957] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14343, diff=1, hw=0 hw_last=0
[  245.819077] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006fb5b2d2
[  245.819156] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  245.819231] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  245.819315] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  245.819390] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  245.819465] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006fb5b2d2
[  245.835537] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14344, diff=1, hw=0 hw_last=0
[  245.852116] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14345, diff=1, hw=0 hw_last=0
[  245.868693] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14346, diff=1, hw=0 hw_last=0
[  245.885272] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14347, diff=1, hw=0 hw_last=0
[  245.901852] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14348, diff=1, hw=0 hw_last=0
[  245.918433] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14349, diff=1, hw=0 hw_last=0
[  245.935011] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14350, diff=1, hw=0 hw_last=0
[  245.951591] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14351, diff=1, hw=0 hw_last=0
[  245.968176] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14352, diff=1, hw=0 hw_last=0
[  245.984754] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14353, diff=1, hw=0 hw_last=0
[  246.448966] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14381, diff=1, hw=0 hw_last=0
[  246.465545] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14382, diff=1, hw=0 hw_last=0
[  246.482124] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14383, diff=1, hw=0 hw_last=0
[  246.498704] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14384, diff=1, hw=0 hw_last=0
[  246.515286] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14385, diff=1, hw=0 hw_last=0
[  246.531862] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14386, diff=1, hw=0 hw_last=0
[  246.548442] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14387, diff=1, hw=0 hw_last=0
[  246.565021] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14388, diff=1, hw=0 hw_last=0
[  246.581599] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14389, diff=1, hw=0 hw_last=0
[  246.598178] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14390, diff=1, hw=0 hw_last=0
[  246.614757] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14391, diff=1, hw=0 hw_last=0
[  246.631338] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14392, diff=1, hw=0 hw_last=0
[  246.647916] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14393, diff=1, hw=0 hw_last=0
[  246.664496] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14394, diff=1, hw=0 hw_last=0
[  246.681074] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14395, diff=1, hw=0 hw_last=0
[  246.697654] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14396, diff=1, hw=0 hw_last=0
[  246.714237] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14397, diff=1, hw=0 hw_last=0
[  246.720458] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  246.720579] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 14398 to client
[  246.723858] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  246.723957] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000d7e48c6b
[  246.724043] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  246.724117] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000fefb5c61 state to 00000000d7e48c6b
[  246.724195] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  246.724267] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 00000000d7e48c6b
[  246.724348] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000fefb5c61
[  246.724422] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  246.724493] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  246.724564] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  246.724635] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  246.724711] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  246.724782] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  246.724856] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  246.724927] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  246.724998] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 00000000d7e48c6b
[  246.725072] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  246.725143] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000d7e48c6b
[  246.725223] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  246.725274] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  246.725311] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000d7e48c6b
[  246.725390] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000006c5644bb to 00000000d7e48c6b
[  246.725463] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000d7e48c6b
[  246.725541] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  246.725613] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  246.725686] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  246.725767] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 00000000d7e48c6b
[  246.725842] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000d7e48c6b
[  246.725915] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  246.725987] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  246.726058] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  246.726130] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  246.726201] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000d7e48c6b
[  246.727598] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  246.730817] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14398, diff=1, hw=0 hw_last=0
[  246.747395] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14399, diff=1, hw=0 hw_last=0
[  246.763974] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14400, diff=1, hw=0 hw_last=0
[  246.780553] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14401, diff=1, hw=0 hw_last=0
[  246.797137] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14402, diff=1, hw=0 hw_last=0
[  246.813716] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14403, diff=1, hw=0 hw_last=0
[  246.830292] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14404, diff=1, hw=0 hw_last=0
[  246.846873] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14405, diff=1, hw=0 hw_last=0
[  246.863452] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14406, diff=1, hw=0 hw_last=0
[  246.880032] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14407, diff=1, hw=0 hw_last=0
[  246.896611] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14408, diff=1, hw=0 hw_last=0
[  246.913187] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14409, diff=1, hw=0 hw_last=0
[  246.929766] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14410, diff=1, hw=0 hw_last=0
[  246.946347] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14411, diff=1, hw=0 hw_last=0
[  246.955069] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  246.955184] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000d7e48c6b
[  246.955840] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  246.955911] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  246.955986] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  246.956058] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  246.956135] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  246.956207] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  246.956278] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 00000000d7e48c6b
[  246.956353] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  246.956427] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000d7e48c6b
[  246.956510] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  246.956560] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  246.956596] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000d7e48c6b
[  246.956677] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000fde3661d to 00000000d7e48c6b
[  246.956751] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000d7e48c6b
[  246.956841] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000d7e48c6b nonblocking
[  246.956954] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  246.957030] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  246.962923] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14412, diff=1, hw=0 hw_last=0
[  246.963014] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000d7e48c6b
[  246.963088] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  246.963152] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  246.963214] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  246.963287] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  246.963351] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000d7e48c6b
[  246.979502] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14413, diff=1, hw=0 hw_last=0
[  246.996079] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14414, diff=1, hw=0 hw_last=0
[  247.012668] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14415, diff=1, hw=0 hw_last=0
[  247.029255] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14416, diff=1, hw=0 hw_last=0
[  247.045824] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14417, diff=1, hw=0 hw_last=0
[  247.062404] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14418, diff=1, hw=0 hw_last=0
[  247.078978] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14419, diff=1, hw=0 hw_last=0
[  247.095560] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14420, diff=1, hw=0 hw_last=0
[  247.112142] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14421, diff=1, hw=0 hw_last=0
[  247.128721] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14422, diff=1, hw=0 hw_last=0
[  247.145299] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14423, diff=1, hw=0 hw_last=0
[  247.161877] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14424, diff=1, hw=0 hw_last=0
[  247.178451] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14425, diff=1, hw=0 hw_last=0
[  247.195030] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14426, diff=1, hw=0 hw_last=0
[  247.211609] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14427, diff=1, hw=0 hw_last=0
[  247.228188] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14428, diff=1, hw=0 hw_last=0
[  247.244769] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14429, diff=1, hw=0 hw_last=0
[  247.261346] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14430, diff=1, hw=0 hw_last=0
[  247.277929] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14431, diff=1, hw=0 hw_last=0
[  247.294510] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14432, diff=1, hw=0 hw_last=0
[  247.311089] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14433, diff=1, hw=0 hw_last=0
[  247.327667] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14434, diff=1, hw=0 hw_last=0
[  247.344244] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14435, diff=1, hw=0 hw_last=0
[  247.360826] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14436, diff=1, hw=0 hw_last=0
[  247.377406] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14437, diff=1, hw=0 hw_last=0
[  247.393984] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14438, diff=1, hw=0 hw_last=0
[  247.410564] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14439, diff=1, hw=0 hw_last=0
[  247.427140] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14440, diff=1, hw=0 hw_last=0
[  247.443721] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14441, diff=1, hw=0 hw_last=0
[  247.460298] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14442, diff=1, hw=0 hw_last=0
[  247.476877] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14443, diff=1, hw=0 hw_last=0
[  247.493457] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14444, diff=1, hw=0 hw_last=0
[  247.510036] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14445, diff=1, hw=0 hw_last=0
[  247.526621] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14446, diff=1, hw=0 hw_last=0
[  247.543197] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14447, diff=1, hw=0 hw_last=0
[  247.559779] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14448, diff=1, hw=0 hw_last=0
[  247.576356] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14449, diff=1, hw=0 hw_last=0
[  247.592934] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14450, diff=1, hw=0 hw_last=0
[  247.609512] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14451, diff=1, hw=0 hw_last=0
[  247.626092] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14452, diff=1, hw=0 hw_last=0
[  247.753236] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  247.753309] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000082174610
[  247.754760] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  247.758732] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14460, diff=1, hw=0 hw_last=0
[  247.775311] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14461, diff=1, hw=0 hw_last=0
[  247.791889] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14462, diff=1, hw=0 hw_last=0
[  247.808470] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14463, diff=1, hw=0 hw_last=0
[  247.825049] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14464, diff=1, hw=0 hw_last=0
[  247.841627] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14465, diff=1, hw=0 hw_last=0
[  247.858206] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14466, diff=1, hw=0 hw_last=0
[  247.874787] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14467, diff=1, hw=0 hw_last=0
[  247.891373] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14468, diff=1, hw=0 hw_last=0
[  247.907947] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14469, diff=1, hw=0 hw_last=0
[  247.924526] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14470, diff=1, hw=0 hw_last=0
[  247.941103] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14471, diff=1, hw=0 hw_last=0
[  247.957683] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14472, diff=1, hw=0 hw_last=0
[  247.974260] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14473, diff=1, hw=0 hw_last=0
[  247.982620] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  247.982735] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000082174610
[  247.982823] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  247.982896] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000055579822 state to 0000000082174610
[  247.982973] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  247.983044] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000e8543c49 state to 0000000082174610
[  247.983125] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 0000000055579822
[  247.983199] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  247.983309] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  247.983387] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  247.983460] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  247.983537] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  247.983608] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  247.983684] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  247.983757] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  247.983831] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 0000000082174610
[  247.983907] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  247.983981] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000082174610
[  247.984064] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  247.984112] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  247.984149] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000082174610
[  247.984230] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000006c5644bb to 0000000082174610
[  247.984303] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000082174610
[  247.984392] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000082174610 nonblocking
[  247.984502] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  247.984574] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  247.990838] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14474, diff=1, hw=0 hw_last=0
[  247.990947] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000082174610
[  247.991021] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  247.991083] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  247.991145] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  247.991207] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  247.991280] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000082174610
[  248.007415] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14475, diff=1, hw=0 hw_last=0
[  248.023992] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14476, diff=1, hw=0 hw_last=0
[  248.040572] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14477, diff=1, hw=0 hw_last=0
[  248.057151] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14478, diff=1, hw=0 hw_last=0
[  248.073730] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14479, diff=1, hw=0 hw_last=0
[  248.090312] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14480, diff=1, hw=0 hw_last=0
[  248.106891] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14481, diff=1, hw=0 hw_last=0
[  248.123470] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14482, diff=1, hw=0 hw_last=0
[  248.140050] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14483, diff=1, hw=0 hw_last=0
[  248.156629] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14484, diff=1, hw=0 hw_last=0
[  248.173203] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14485, diff=1, hw=0 hw_last=0
[  248.189783] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14486, diff=1, hw=0 hw_last=0
[  248.206362] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14487, diff=1, hw=0 hw_last=0
[  248.222941] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14488, diff=1, hw=0 hw_last=0
[  248.239519] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14489, diff=1, hw=0 hw_last=0
[  248.256099] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14490, diff=1, hw=0 hw_last=0
[  248.272678] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14491, diff=1, hw=0 hw_last=0
[  248.289260] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14492, diff=1, hw=0 hw_last=0
[  248.305838] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14493, diff=1, hw=0 hw_last=0
[  248.455051] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14502, diff=1, hw=0 hw_last=0
[  248.471630] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14503, diff=1, hw=0 hw_last=0
[  248.488209] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14504, diff=1, hw=0 hw_last=0
[  248.504788] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14505, diff=1, hw=0 hw_last=0
[  248.521368] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14506, diff=1, hw=0 hw_last=0
[  248.537953] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14507, diff=1, hw=0 hw_last=0
[  248.554528] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14508, diff=1, hw=0 hw_last=0
[  248.571110] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14509, diff=1, hw=0 hw_last=0
[  248.587689] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14510, diff=1, hw=0 hw_last=0
[  248.591919] systemd-journald[214]: Data hash table of /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal has a fill level at 75.0 (2731 of 3640 items, 2097152 file size, 767 bytes per hash table item), suggesting rotation.
[  248.618185] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14511, diff=1, hw=0 hw_last=0
[  248.618319] systemd-journald[214]: /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal: Journal header limits reached or header out-of-date, rotating.
[  248.638400] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14512, diff=1, hw=0 hw_last=0
[  248.654009] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14513, diff=1, hw=0 hw_last=0
[  248.670585] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14514, diff=1, hw=0 hw_last=0
[  248.687163] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14515, diff=1, hw=0 hw_last=0
[  248.703742] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14516, diff=1, hw=0 hw_last=0
[  248.720316] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14517, diff=1, hw=0 hw_last=0
[  248.736900] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14518, diff=1, hw=0 hw_last=0
[  248.749832] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  248.749956] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 14519 to client
[  248.753484] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14519, diff=1, hw=0 hw_last=0
[  248.763251] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  248.763347] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000001477df7c
[  248.763431] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  248.763505] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000087081e28 state to 000000001477df7c
[  248.763581] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  248.763654] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 000000001477df7c
[  248.763733] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 0000000087081e28
[  248.763807] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  248.763878] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  248.763949] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  248.764020] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  248.764096] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  248.764167] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  248.764242] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  248.764313] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  248.764384] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 000000001477df7c
[  248.764459] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  248.764531] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000001477df7c
[  248.764613] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  248.764662] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  248.764699] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000001477df7c
[  248.764777] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000006fb5b2d2 to 000000001477df7c
[  248.764852] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000001477df7c
[  248.764930] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  248.765003] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  248.765075] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  248.765156] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000001477df7c
[  248.765231] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000001477df7c
[  248.765303] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  248.765378] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  248.765450] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  248.765522] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  248.765595] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000001477df7c
[  248.766987] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  248.770065] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14520, diff=1, hw=0 hw_last=0
[  248.786639] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14521, diff=1, hw=0 hw_last=0
[  248.803219] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14522, diff=1, hw=0 hw_last=0
[  248.819798] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14523, diff=1, hw=0 hw_last=0
[  248.836381] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14524, diff=1, hw=0 hw_last=0
[  248.852960] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14525, diff=1, hw=0 hw_last=0
[  248.869537] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14526, diff=1, hw=0 hw_last=0
[  248.886118] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14527, diff=1, hw=0 hw_last=0
[  248.902700] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14528, diff=1, hw=0 hw_last=0
[  248.919278] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14529, diff=1, hw=0 hw_last=0
[  248.935857] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14530, diff=1, hw=0 hw_last=0
[  248.994882] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000087081e28 state to 000000001477df7c
[  248.994960] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  248.995032] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 000000001477df7c
[  248.995110] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000087081e28
[  248.995184] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  248.995298] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  248.995376] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  248.995449] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  248.995526] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  248.995599] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  248.995676] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  248.995748] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  248.995820] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 000000001477df7c
[  248.995895] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  248.995969] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000001477df7c
[  248.996051] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  248.996103] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  248.996139] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000001477df7c
[  248.996223] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000008a640c91 to 000000001477df7c
[  248.996296] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000001477df7c
[  248.996385] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000001477df7c nonblocking
[  248.996499] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  248.996573] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  249.002168] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14534, diff=1, hw=0 hw_last=0
[  249.002276] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000001477df7c
[  249.002349] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  249.002412] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  249.002473] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  249.002535] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  249.002598] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000001477df7c
[  249.018744] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14535, diff=1, hw=0 hw_last=0
[  249.035325] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14536, diff=1, hw=0 hw_last=0
[  249.051902] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14537, diff=1, hw=0 hw_last=0
[  249.068481] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14538, diff=1, hw=0 hw_last=0
[  249.085060] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14539, diff=1, hw=0 hw_last=0
[  249.101641] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14540, diff=1, hw=0 hw_last=0
[  249.118220] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14541, diff=1, hw=0 hw_last=0
[  249.134800] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14542, diff=1, hw=0 hw_last=0
[  249.151382] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14543, diff=1, hw=0 hw_last=0
[  249.167962] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14544, diff=1, hw=0 hw_last=0
[  249.184537] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14545, diff=1, hw=0 hw_last=0
[  249.201112] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14546, diff=1, hw=0 hw_last=0
[  249.217692] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14547, diff=1, hw=0 hw_last=0
[  249.234271] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14548, diff=1, hw=0 hw_last=0
[  249.250850] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14549, diff=1, hw=0 hw_last=0
[  249.267431] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14550, diff=1, hw=0 hw_last=0
[  249.284009] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14551, diff=1, hw=0 hw_last=0
[  249.300591] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14552, diff=1, hw=0 hw_last=0
[  249.317173] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14553, diff=1, hw=0 hw_last=0
[  249.333749] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14554, diff=1, hw=0 hw_last=0
[  249.350329] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14555, diff=1, hw=0 hw_last=0
[  249.366910] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14556, diff=1, hw=0 hw_last=0
[  249.383488] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14557, diff=1, hw=0 hw_last=0
[  249.400067] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14558, diff=1, hw=0 hw_last=0
[  249.416646] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14559, diff=1, hw=0 hw_last=0
[  249.433225] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14560, diff=1, hw=0 hw_last=0
[  249.449802] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14561, diff=1, hw=0 hw_last=0
[  249.466384] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14562, diff=1, hw=0 hw_last=0
[  249.482962] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14563, diff=1, hw=0 hw_last=0
[  249.499543] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14564, diff=1, hw=0 hw_last=0
[  249.516119] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14565, diff=1, hw=0 hw_last=0
[  249.532698] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14566, diff=1, hw=0 hw_last=0
[  249.549280] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14567, diff=1, hw=0 hw_last=0
[  249.565856] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14568, diff=1, hw=0 hw_last=0
[  249.582451] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14569, diff=1, hw=0 hw_last=0
[  249.599014] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14570, diff=1, hw=0 hw_last=0
[  249.615598] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14571, diff=1, hw=0 hw_last=0
[  249.776397] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009472d261
[  249.776470] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  249.776542] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  249.776615] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  249.776688] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  249.776761] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009472d261
[  249.778139] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  249.781396] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14581, diff=1, hw=0 hw_last=0
[  249.797974] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14582, diff=1, hw=0 hw_last=0
[  249.814552] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14583, diff=1, hw=0 hw_last=0
[  249.831131] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14584, diff=1, hw=0 hw_last=0
[  249.847712] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14585, diff=1, hw=0 hw_last=0
[  249.864290] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14586, diff=1, hw=0 hw_last=0
[  249.880868] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14587, diff=1, hw=0 hw_last=0
[  249.897451] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14588, diff=1, hw=0 hw_last=0
[  249.914029] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14589, diff=1, hw=0 hw_last=0
[  249.930611] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14590, diff=1, hw=0 hw_last=0
[  249.947187] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14591, diff=1, hw=0 hw_last=0
[  249.963768] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14592, diff=1, hw=0 hw_last=0
[  249.980343] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14593, diff=1, hw=0 hw_last=0
[  249.996924] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14594, diff=1, hw=0 hw_last=0
[  250.006649] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  250.006766] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009472d261
[  250.006852] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  250.006925] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000ec98bd42 state to 000000009472d261
[  250.007003] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  250.007075] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000adb7ad91 state to 000000009472d261
[  250.007156] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000ec98bd42
[  250.007263] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  250.007341] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  250.007416] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  250.007489] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  250.007565] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  250.007643] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  250.007721] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  250.007794] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  250.007867] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 000000009472d261
[  250.007942] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  250.008016] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000009472d261
[  250.008099] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  250.008148] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  250.008185] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000009472d261
[  250.008265] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000e0dcab9c to 000000009472d261
[  250.008339] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000009472d261
[  250.008428] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000009472d261 nonblocking
[  250.008540] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  250.008613] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  250.013500] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14595, diff=1, hw=0 hw_last=0
[  250.013605] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009472d261
[  250.013678] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  250.013741] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  250.013802] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  250.013864] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  250.013926] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009472d261
[  250.030078] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14596, diff=1, hw=0 hw_last=0
[  250.046654] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14597, diff=1, hw=0 hw_last=0
[  250.063234] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14598, diff=1, hw=0 hw_last=0
[  250.079814] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14599, diff=1, hw=0 hw_last=0
[  250.096394] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14600, diff=1, hw=0 hw_last=0
[  250.112970] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14601, diff=1, hw=0 hw_last=0
[  250.129552] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14602, diff=1, hw=0 hw_last=0
[  250.146131] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14603, diff=1, hw=0 hw_last=0
[  250.162710] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14604, diff=1, hw=0 hw_last=0
[  250.179294] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14605, diff=1, hw=0 hw_last=0
[  250.195871] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14606, diff=1, hw=0 hw_last=0
[  250.212446] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14607, diff=1, hw=0 hw_last=0
[  250.229025] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14608, diff=1, hw=0 hw_last=0
[  250.245603] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14609, diff=1, hw=0 hw_last=0
[  250.262181] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14610, diff=1, hw=0 hw_last=0
[  250.278762] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14611, diff=1, hw=0 hw_last=0
[  250.804218] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  250.804298] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  250.804383] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 00000000c0cf118d
[  250.804462] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000c0cf118d
[  250.804535] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  250.804608] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  250.804680] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  250.804752] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  250.804825] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000c0cf118d
[  250.806215] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  250.809303] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14643, diff=1, hw=0 hw_last=0
[  250.825884] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14644, diff=1, hw=0 hw_last=0
[  250.842462] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14645, diff=1, hw=0 hw_last=0
[  250.859043] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14646, diff=1, hw=0 hw_last=0
[  250.875626] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14647, diff=1, hw=0 hw_last=0
[  250.892202] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14648, diff=1, hw=0 hw_last=0
[  250.908779] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14649, diff=1, hw=0 hw_last=0
[  250.925359] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14650, diff=1, hw=0 hw_last=0
[  250.941941] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14651, diff=1, hw=0 hw_last=0
[  250.958521] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14652, diff=1, hw=0 hw_last=0
[  250.975096] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14653, diff=1, hw=0 hw_last=0
[  250.991676] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14654, diff=1, hw=0 hw_last=0
[  251.008252] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14655, diff=1, hw=0 hw_last=0
[  251.024835] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14656, diff=1, hw=0 hw_last=0
[  251.034200] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  251.034319] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000c0cf118d
[  251.034408] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  251.034481] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000215b6887 state to 00000000c0cf118d
[  251.034559] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  251.034632] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 00000000c0cf118d
[  251.034714] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000215b6887
[  251.034789] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  251.034861] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  251.034932] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  251.035004] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  251.035079] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  251.035150] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  251.035264] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  251.035343] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  251.035419] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 00000000c0cf118d
[  251.035495] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  251.035569] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000c0cf118d
[  251.035653] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  251.035701] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  251.035739] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000c0cf118d
[  251.035821] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000071ef6b0b to 00000000c0cf118d
[  251.035896] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000c0cf118d
[  251.035985] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000c0cf118d nonblocking
[  251.036102] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  251.036172] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  251.041409] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14657, diff=1, hw=0 hw_last=0
[  251.041518] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000c0cf118d
[  251.041591] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  251.041653] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  251.041714] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  251.041777] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  251.041838] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000c0cf118d
[  251.057986] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14658, diff=1, hw=0 hw_last=0
[  251.074564] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14659, diff=1, hw=0 hw_last=0
[  251.091144] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14660, diff=1, hw=0 hw_last=0
[  251.107724] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14661, diff=1, hw=0 hw_last=0
[  251.124303] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14662, diff=1, hw=0 hw_last=0
[  251.140883] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14663, diff=1, hw=0 hw_last=0
[  251.157461] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14664, diff=1, hw=0 hw_last=0
[  251.174042] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14665, diff=1, hw=0 hw_last=0
[  251.190624] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14666, diff=1, hw=0 hw_last=0
[  251.207201] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14667, diff=1, hw=0 hw_last=0
[  251.223777] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14668, diff=1, hw=0 hw_last=0
[  251.240354] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14669, diff=1, hw=0 hw_last=0
[  251.256934] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14670, diff=1, hw=0 hw_last=0
[  251.273513] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14671, diff=1, hw=0 hw_last=0
[  251.290092] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14672, diff=1, hw=0 hw_last=0
[  251.306670] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14673, diff=1, hw=0 hw_last=0
[  251.323250] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14674, diff=1, hw=0 hw_last=0
[  251.339833] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14675, diff=1, hw=0 hw_last=0
[  251.356412] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14676, diff=1, hw=0 hw_last=0
[  251.372991] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14677, diff=1, hw=0 hw_last=0
[  251.389568] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14678, diff=1, hw=0 hw_last=0
[  251.406147] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14679, diff=1, hw=0 hw_last=0
[  251.422730] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14680, diff=1, hw=0 hw_last=0
[  251.439308] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14681, diff=1, hw=0 hw_last=0
[  251.455887] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14682, diff=1, hw=0 hw_last=0
[  251.472467] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14683, diff=1, hw=0 hw_last=0
[  251.489044] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14684, diff=1, hw=0 hw_last=0
[  251.505622] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14685, diff=1, hw=0 hw_last=0
[  251.522202] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14686, diff=1, hw=0 hw_last=0
[  251.538785] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14687, diff=1, hw=0 hw_last=0
[  251.555363] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14688, diff=1, hw=0 hw_last=0
[  251.571944] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14689, diff=1, hw=0 hw_last=0
[  251.588520] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14690, diff=1, hw=0 hw_last=0
[  251.605102] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14691, diff=1, hw=0 hw_last=0
[  251.621677] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14692, diff=1, hw=0 hw_last=0
[  251.638256] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14693, diff=1, hw=0 hw_last=0
[  251.654835] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14694, diff=1, hw=0 hw_last=0
[  251.671417] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14695, diff=1, hw=0 hw_last=0
[  251.687996] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14696, diff=1, hw=0 hw_last=0
[  251.704577] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14697, diff=1, hw=0 hw_last=0
[  251.721155] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14698, diff=1, hw=0 hw_last=0
[  251.737732] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14699, diff=1, hw=0 hw_last=0
[  251.754315] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14700, diff=1, hw=0 hw_last=0
[  251.770896] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14701, diff=1, hw=0 hw_last=0
[  251.787471] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14702, diff=1, hw=0 hw_last=0
[  251.804054] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14703, diff=1, hw=0 hw_last=0
[  251.817034] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  251.817156] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 14704 to client
[  251.820634] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14704, diff=1, hw=0 hw_last=0
[  251.829431] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  251.829528] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000ab379aee
[  251.829611] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  251.829685] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000bac3ec2d state to 00000000ab379aee
[  251.829762] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  251.829835] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000e8543c49 state to 00000000ab379aee
[  251.829915] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000bac3ec2d
[  251.829989] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  251.830061] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  251.830133] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  251.830205] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  251.830279] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  251.830353] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  251.830429] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  251.830502] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  251.830574] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 00000000ab379aee
[  251.830649] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  251.830721] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000ab379aee
[  251.830805] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  251.830854] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  251.830891] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000ab379aee
[  251.830969] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000001477df7c to 00000000ab379aee
[  251.831043] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000ab379aee
[  251.831121] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  251.831217] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  251.831294] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  251.831379] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 00000000ab379aee
[  251.831456] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ab379aee
[  251.831530] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  251.831602] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  251.831675] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  251.831749] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  252.061041] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000bac3ec2d state to 00000000ab379aee
[  252.061118] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  252.061191] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000e8543c49 state to 00000000ab379aee
[  252.061275] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000bac3ec2d
[  252.061350] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  252.061422] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  252.061496] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  252.061567] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  252.061642] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  252.061715] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  252.061791] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  252.061864] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  252.061937] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 00000000ab379aee
[  252.062012] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  252.062085] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000ab379aee
[  252.062168] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  252.062218] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  252.062254] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000ab379aee
[  252.062336] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000006fb5b2d2 to 00000000ab379aee
[  252.062410] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000ab379aee
[  252.062496] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000ab379aee nonblocking
[  252.062613] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  252.062699] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  252.069319] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14719, diff=1, hw=0 hw_last=0
[  252.069432] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ab379aee
[  252.069506] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  252.069570] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  252.069632] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  252.069695] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  252.069758] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ab379aee
[  252.085897] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14720, diff=1, hw=0 hw_last=0
[  252.102477] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14721, diff=1, hw=0 hw_last=0
[  252.119056] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14722, diff=1, hw=0 hw_last=0
[  252.135634] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14723, diff=1, hw=0 hw_last=0
[  252.152213] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14724, diff=1, hw=0 hw_last=0
[  252.168795] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14725, diff=1, hw=0 hw_last=0
[  252.185372] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14726, diff=1, hw=0 hw_last=0
[  252.201954] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14727, diff=1, hw=0 hw_last=0
[  252.218532] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14728, diff=1, hw=0 hw_last=0
[  252.235112] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14729, diff=1, hw=0 hw_last=0
[  252.251686] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14730, diff=1, hw=0 hw_last=0
[  252.268264] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14731, diff=1, hw=0 hw_last=0
[  252.284844] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14732, diff=1, hw=0 hw_last=0
[  252.301423] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14733, diff=1, hw=0 hw_last=0
[  252.318002] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14734, diff=1, hw=0 hw_last=0
[  252.334580] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14735, diff=1, hw=0 hw_last=0
[  252.351160] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14736, diff=1, hw=0 hw_last=0
[  252.367746] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14737, diff=1, hw=0 hw_last=0
[  252.384322] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14738, diff=1, hw=0 hw_last=0
[  252.400902] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14739, diff=1, hw=0 hw_last=0
[  252.417480] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14740, diff=1, hw=0 hw_last=0
[  252.434060] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14741, diff=1, hw=0 hw_last=0
[  252.450639] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14742, diff=1, hw=0 hw_last=0
[  252.467218] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14743, diff=1, hw=0 hw_last=0
[  252.483796] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14744, diff=1, hw=0 hw_last=0
[  252.500377] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14745, diff=1, hw=0 hw_last=0
[  252.516953] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14746, diff=1, hw=0 hw_last=0
[  252.533533] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14747, diff=1, hw=0 hw_last=0
[  252.550113] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14748, diff=1, hw=0 hw_last=0
[  252.566694] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14749, diff=1, hw=0 hw_last=0
[  252.583275] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14750, diff=1, hw=0 hw_last=0
[  252.599852] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14751, diff=1, hw=0 hw_last=0
[  252.616431] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14752, diff=1, hw=0 hw_last=0
[  252.633012] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14753, diff=1, hw=0 hw_last=0
[  252.649589] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14754, diff=1, hw=0 hw_last=0
[  252.666168] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14755, diff=1, hw=0 hw_last=0
[  252.682747] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14756, diff=1, hw=0 hw_last=0
[  252.815383] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14764, diff=1, hw=0 hw_last=0
[  252.831961] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14765, diff=1, hw=0 hw_last=0
[  252.847609] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  252.847732] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 14766 to client
[  252.848548] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14766, diff=1, hw=0 hw_last=0
[  252.858011] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  252.858114] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000305e034
[  252.858196] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  252.858270] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000082b4fa6a state to 000000000305e034
[  252.858346] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  252.858418] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 000000000305e034
[  252.858498] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 0000000082b4fa6a
[  252.858571] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  252.858642] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  252.858714] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  252.858785] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  252.858860] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  252.858931] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  252.859006] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  252.859078] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  252.859169] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 000000000305e034
[  252.859245] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  252.859319] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000000305e034
[  252.859402] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  252.859447] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  252.859484] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000305e034
[  252.859564] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000082174610 to 000000000305e034
[  252.859637] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000305e034
[  252.859715] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  252.859787] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  252.859860] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  252.859942] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000000305e034
[  252.860018] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000305e034
[  252.860091] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  252.860164] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  252.860236] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  252.860308] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  252.860381] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000305e034
[  252.861778] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  252.865126] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14767, diff=1, hw=0 hw_last=0
[  252.881703] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14768, diff=1, hw=0 hw_last=0
[  252.898283] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14769, diff=1, hw=0 hw_last=0
[  252.914859] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14770, diff=1, hw=0 hw_last=0
[  252.931444] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14771, diff=1, hw=0 hw_last=0
[  252.948020] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14772, diff=1, hw=0 hw_last=0
[  252.964600] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14773, diff=1, hw=0 hw_last=0
[  252.981179] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14774, diff=1, hw=0 hw_last=0
[  252.997762] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14775, diff=1, hw=0 hw_last=0
[  253.014340] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14776, diff=1, hw=0 hw_last=0
[  253.030917] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14777, diff=1, hw=0 hw_last=0
[  253.047496] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14778, diff=1, hw=0 hw_last=0
[  253.064072] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14779, diff=1, hw=0 hw_last=0
[  253.080655] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14780, diff=1, hw=0 hw_last=0
[  253.089506] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  253.089621] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000305e034
[  253.089709] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  253.089783] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000082b4fa6a state to 000000000305e034
[  253.089861] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  253.089932] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 000000000305e034
[  253.090012] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000082b4fa6a
[  253.090087] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  253.090158] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  253.090229] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  253.090300] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  253.090374] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  253.090445] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  253.090520] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  253.090591] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  253.090663] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 000000000305e034
[  253.090737] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  253.090811] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000000305e034
[  253.090895] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  253.090943] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  253.090979] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000305e034
[  253.091059] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000d7e48c6b to 000000000305e034
[  253.097339] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000305e034
[  253.097408] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  253.097471] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  253.097533] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  253.097596] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  253.097659] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000305e034
[  253.113807] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14782, diff=1, hw=0 hw_last=0
[  253.130388] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14783, diff=1, hw=0 hw_last=0
[  253.146966] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14784, diff=1, hw=0 hw_last=0
[  253.163544] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14785, diff=1, hw=0 hw_last=0
[  253.180123] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14786, diff=1, hw=0 hw_last=0
[  253.196707] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14787, diff=1, hw=0 hw_last=0
[  253.213282] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14788, diff=1, hw=0 hw_last=0
[  253.229862] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14789, diff=1, hw=0 hw_last=0
[  253.246442] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14790, diff=1, hw=0 hw_last=0
[  253.263021] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14791, diff=1, hw=0 hw_last=0
[  253.279597] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14792, diff=1, hw=0 hw_last=0
[  253.296174] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14793, diff=1, hw=0 hw_last=0
[  253.312754] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14794, diff=1, hw=0 hw_last=0
[  253.329333] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14795, diff=1, hw=0 hw_last=0
[  253.345912] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14796, diff=1, hw=0 hw_last=0
[  253.362491] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14797, diff=1, hw=0 hw_last=0
[  253.379070] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14798, diff=1, hw=0 hw_last=0
[  253.395653] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14799, diff=1, hw=0 hw_last=0
[  253.412233] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14800, diff=1, hw=0 hw_last=0
[  253.428812] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14801, diff=1, hw=0 hw_last=0
[  253.445392] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14802, diff=1, hw=0 hw_last=0
[  253.461973] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14803, diff=1, hw=0 hw_last=0
[  253.478549] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14804, diff=1, hw=0 hw_last=0
[  253.495129] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14805, diff=1, hw=0 hw_last=0
[  253.511709] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14806, diff=1, hw=0 hw_last=0
[  253.528286] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14807, diff=1, hw=0 hw_last=0
[  253.544868] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14808, diff=1, hw=0 hw_last=0
[  253.561445] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14809, diff=1, hw=0 hw_last=0
[  253.578025] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14810, diff=1, hw=0 hw_last=0
[  253.594604] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14811, diff=1, hw=0 hw_last=0
[  253.611186] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14812, diff=1, hw=0 hw_last=0
[  253.627765] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14813, diff=1, hw=0 hw_last=0
[  253.644340] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14814, diff=1, hw=0 hw_last=0
[  253.660921] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14815, diff=1, hw=0 hw_last=0
[  253.677504] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14816, diff=1, hw=0 hw_last=0
[  253.694078] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14817, diff=1, hw=0 hw_last=0
[  253.710658] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14818, diff=1, hw=0 hw_last=0
[  253.727239] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14819, diff=1, hw=0 hw_last=0
[  253.743818] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14820, diff=1, hw=0 hw_last=0
[  253.760399] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14821, diff=1, hw=0 hw_last=0
[  253.776974] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14822, diff=1, hw=0 hw_last=0
[  253.793556] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14823, diff=1, hw=0 hw_last=0
[  253.810134] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14824, diff=1, hw=0 hw_last=0
[  253.826712] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14825, diff=1, hw=0 hw_last=0
[  253.843293] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14826, diff=1, hw=0 hw_last=0
[  253.859872] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14827, diff=1, hw=0 hw_last=0
[  253.876452] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14828, diff=1, hw=0 hw_last=0
[  253.893032] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14829, diff=1, hw=0 hw_last=0
[  253.909607] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14830, diff=1, hw=0 hw_last=0
[  253.926186] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14831, diff=1, hw=0 hw_last=0
[  253.942768] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14832, diff=1, hw=0 hw_last=0
[  253.959346] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14833, diff=1, hw=0 hw_last=0
[  253.975932] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14834, diff=1, hw=0 hw_last=0
[  253.982043] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  253.982166] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 14835 to client
[  254.091986] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14841, diff=1, hw=0 hw_last=0
[  254.108566] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14842, diff=1, hw=0 hw_last=0
[  254.125145] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14843, diff=1, hw=0 hw_last=0
[  254.141726] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14844, diff=1, hw=0 hw_last=0
[  254.158303] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14845, diff=1, hw=0 hw_last=0
[  254.174882] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14846, diff=1, hw=0 hw_last=0
[  254.191460] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14847, diff=1, hw=0 hw_last=0
[  254.208039] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14848, diff=1, hw=0 hw_last=0
[  254.217170] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  254.217283] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000095dd8ec0
[  254.217370] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  254.217444] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000fefb5c61 state to 0000000095dd8ec0
[  254.217522] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  254.217594] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 0000000095dd8ec0
[  254.217674] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000fefb5c61
[  254.217748] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  254.217819] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  254.217891] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  254.217962] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  254.218036] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  254.218109] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  254.218184] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  254.218255] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  254.218326] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 0000000095dd8ec0
[  254.218401] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  254.218475] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000095dd8ec0
[  254.218557] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  254.218604] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  254.218640] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000095dd8ec0
[  254.218719] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000082174610 to 0000000095dd8ec0
[  254.218793] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000095dd8ec0
[  254.218880] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000095dd8ec0 nonblocking
[  254.218999] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  254.219079] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  254.224615] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14849, diff=1, hw=0 hw_last=0
[  254.224728] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000095dd8ec0
[  254.224797] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  254.224860] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  254.224922] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  254.224985] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  254.225050] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000095dd8ec0
[  254.225592] systemd-journald[214]: Data hash table of /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal has a fill level at 75.0 (2731 of 3640 items, 2097152 file size, 767 bytes per hash table item), suggesting rotation.
[  254.251197] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14850, diff=1, hw=0 hw_last=0
[  254.251362] systemd-journald[214]: /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal: Journal header limits reached or header out-of-date, rotating.
[  254.271421] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14851, diff=1, hw=0 hw_last=0
[  254.274359] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14852, diff=1, hw=0 hw_last=0
[  254.290934] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14853, diff=1, hw=0 hw_last=0
[  254.307510] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14854, diff=1, hw=0 hw_last=0
[  254.324089] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14855, diff=1, hw=0 hw_last=0
[  254.340667] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14856, diff=1, hw=0 hw_last=0
[  254.357248] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14857, diff=1, hw=0 hw_last=0
[  254.373827] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14858, diff=1, hw=0 hw_last=0
[  254.390405] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14859, diff=1, hw=0 hw_last=0
[  254.406982] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14860, diff=1, hw=0 hw_last=0
[  254.423560] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14861, diff=1, hw=0 hw_last=0
[  254.440139] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14862, diff=1, hw=0 hw_last=0
[  254.456718] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14863, diff=1, hw=0 hw_last=0
[  254.473297] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14864, diff=1, hw=0 hw_last=0
[  254.489876] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14865, diff=1, hw=0 hw_last=0
[  254.506456] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14866, diff=1, hw=0 hw_last=0
[  254.523041] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14867, diff=1, hw=0 hw_last=0
[  254.539618] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14868, diff=1, hw=0 hw_last=0
[  254.556197] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14869, diff=1, hw=0 hw_last=0
[  254.572780] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14870, diff=1, hw=0 hw_last=0
[  254.589356] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14871, diff=1, hw=0 hw_last=0
[  254.605932] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14872, diff=1, hw=0 hw_last=0
[  254.771727] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14882, diff=1, hw=0 hw_last=0
[  254.788307] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14883, diff=1, hw=0 hw_last=0
[  254.804886] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14884, diff=1, hw=0 hw_last=0
[  254.821465] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14885, diff=1, hw=0 hw_last=0
[  254.838044] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14886, diff=1, hw=0 hw_last=0
[  254.854624] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14887, diff=1, hw=0 hw_last=0
[  254.871204] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14888, diff=1, hw=0 hw_last=0
[  254.887781] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14889, diff=1, hw=0 hw_last=0
[  254.904362] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14890, diff=1, hw=0 hw_last=0
[  254.920939] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14891, diff=1, hw=0 hw_last=0
[  254.937518] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14892, diff=1, hw=0 hw_last=0
[  254.954101] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14893, diff=1, hw=0 hw_last=0
[  254.970679] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14894, diff=1, hw=0 hw_last=0
[  254.987257] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14895, diff=1, hw=0 hw_last=0
[  255.003836] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14896, diff=1, hw=0 hw_last=0
[  255.020413] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14897, diff=1, hw=0 hw_last=0
[  255.036993] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14898, diff=1, hw=0 hw_last=0
[  255.053574] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14899, diff=1, hw=0 hw_last=0
[  255.070152] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14900, diff=1, hw=0 hw_last=0
[  255.086742] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14901, diff=1, hw=0 hw_last=0
[  255.087829] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  255.087950] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 14902 to client
[  255.096222] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  255.096325] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008e9f664b
[  255.096408] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  255.096482] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000055579822 state to 000000008e9f664b
[  255.096558] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  255.096631] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 000000008e9f664b
[  255.096711] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 0000000055579822
[  255.096784] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  255.096856] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  255.096927] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  255.096998] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  255.097074] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  255.097145] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  255.097220] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  255.097291] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  255.097362] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 000000008e9f664b
[  255.097436] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  255.097508] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000008e9f664b
[  255.097589] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  255.097636] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  255.097672] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008e9f664b
[  255.097752] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000ab379aee to 000000008e9f664b
[  255.097826] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008e9f664b
[  255.097904] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  255.097976] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  255.098048] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  255.098129] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000008e9f664b
[  255.098204] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008e9f664b
[  255.098277] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  255.098349] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  255.098421] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  255.098492] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  255.098565] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008e9f664b
[  255.099995] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  255.103319] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14902, diff=1, hw=0 hw_last=0
[  255.119895] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14903, diff=1, hw=0 hw_last=0
[  255.136476] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14904, diff=1, hw=0 hw_last=0
[  255.153050] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14905, diff=1, hw=0 hw_last=0
[  255.169637] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14906, diff=1, hw=0 hw_last=0
[  255.186213] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14907, diff=1, hw=0 hw_last=0
[  255.202792] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14908, diff=1, hw=0 hw_last=0
[  255.219372] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14909, diff=1, hw=0 hw_last=0
[  255.235956] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14910, diff=1, hw=0 hw_last=0
[  255.252533] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14911, diff=1, hw=0 hw_last=0
[  255.269112] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14912, diff=1, hw=0 hw_last=0
[  255.285687] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14913, diff=1, hw=0 hw_last=0
[  255.302267] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14914, diff=1, hw=0 hw_last=0
[  255.335795] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  255.335858] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008e9f664b
[  255.351999] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14917, diff=1, hw=0 hw_last=0
[  255.368578] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14918, diff=1, hw=0 hw_last=0
[  255.385157] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14919, diff=1, hw=0 hw_last=0
[  255.401735] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14920, diff=1, hw=0 hw_last=0
[  255.418319] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14921, diff=1, hw=0 hw_last=0
[  255.434896] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14922, diff=1, hw=0 hw_last=0
[  255.451475] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14923, diff=1, hw=0 hw_last=0
[  255.468057] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14924, diff=1, hw=0 hw_last=0
[  255.484636] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14925, diff=1, hw=0 hw_last=0
[  255.501210] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14926, diff=1, hw=0 hw_last=0
[  255.517787] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14927, diff=1, hw=0 hw_last=0
[  255.534366] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14928, diff=1, hw=0 hw_last=0
[  255.550945] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14929, diff=1, hw=0 hw_last=0
[  255.567525] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14930, diff=1, hw=0 hw_last=0
[  255.584104] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14931, diff=1, hw=0 hw_last=0
[  255.600682] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14932, diff=1, hw=0 hw_last=0
[  255.617270] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14933, diff=1, hw=0 hw_last=0
[  255.633845] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14934, diff=1, hw=0 hw_last=0
[  255.650426] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14935, diff=1, hw=0 hw_last=0
[  255.667002] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14936, diff=1, hw=0 hw_last=0
[  255.683580] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14937, diff=1, hw=0 hw_last=0
[  255.700161] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14938, diff=1, hw=0 hw_last=0
[  255.716739] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14939, diff=1, hw=0 hw_last=0
[  255.733321] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14940, diff=1, hw=0 hw_last=0
[  255.749900] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14941, diff=1, hw=0 hw_last=0
[  255.766476] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14942, diff=1, hw=0 hw_last=0
[  255.783055] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14943, diff=1, hw=0 hw_last=0
[  255.799636] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14944, diff=1, hw=0 hw_last=0
[  255.816213] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14945, diff=1, hw=0 hw_last=0
[  255.832797] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14946, diff=1, hw=0 hw_last=0
[  255.849378] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14947, diff=1, hw=0 hw_last=0
[  255.865955] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14948, diff=1, hw=0 hw_last=0
[  255.882536] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14949, diff=1, hw=0 hw_last=0
[  255.899111] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14950, diff=1, hw=0 hw_last=0
[  255.915691] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14951, diff=1, hw=0 hw_last=0
[  255.932272] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14952, diff=1, hw=0 hw_last=0
[  255.948848] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14953, diff=1, hw=0 hw_last=0
[  255.965431] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14954, diff=1, hw=0 hw_last=0
[  255.982011] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14955, diff=1, hw=0 hw_last=0
[  255.998589] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14956, diff=1, hw=0 hw_last=0
[  256.015168] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14957, diff=1, hw=0 hw_last=0
[  256.031745] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14958, diff=1, hw=0 hw_last=0
[  256.048325] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14959, diff=1, hw=0 hw_last=0
[  256.064902] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14960, diff=1, hw=0 hw_last=0
[  256.081485] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14961, diff=1, hw=0 hw_last=0
[  256.098063] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14962, diff=1, hw=0 hw_last=0
[  256.114649] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14963, diff=1, hw=0 hw_last=0
[  256.121821] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  256.121940] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 14964 to client
[  256.124223] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  256.124327] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000cc24793
[  256.124411] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  256.124484] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000002cafbe1b state to 000000000cc24793
[  256.124561] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  256.124633] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a743c9a8 state to 000000000cc24793
[  256.124712] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 000000002cafbe1b
[  256.124786] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  256.124857] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  256.124928] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  256.124999] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  256.125074] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  256.125145] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  256.356556] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  256.356630] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000002cafbe1b state to 000000000cc24793
[  256.356708] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  256.356781] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a743c9a8 state to 000000000cc24793
[  256.356860] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 000000002cafbe1b
[  256.356934] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  256.357006] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  256.357078] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  256.357149] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  256.357224] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  256.357296] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  256.357373] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  256.357445] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  256.357517] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 000000000cc24793
[  256.357591] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  256.357666] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000000cc24793
[  256.357750] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  256.357798] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  256.357835] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000cc24793
[  256.357915] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000009472d261 to 000000000cc24793
[  256.357989] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000cc24793
[  256.358078] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000cc24793 nonblocking
[  256.358201] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  256.358279] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  256.363331] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14978, diff=1, hw=0 hw_last=0
[  256.363440] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000cc24793
[  256.363509] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  256.363572] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  256.363635] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  256.363698] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  256.363761] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000cc24793
[  256.379911] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14979, diff=1, hw=0 hw_last=0
[  256.396489] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14980, diff=1, hw=0 hw_last=0
[  256.413068] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14981, diff=1, hw=0 hw_last=0
[  256.429647] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14982, diff=1, hw=0 hw_last=0
[  256.446226] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14983, diff=1, hw=0 hw_last=0
[  256.462810] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14984, diff=1, hw=0 hw_last=0
[  256.479385] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14985, diff=1, hw=0 hw_last=0
[  256.495964] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14986, diff=1, hw=0 hw_last=0
[  256.512548] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14987, diff=1, hw=0 hw_last=0
[  256.529125] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14988, diff=1, hw=0 hw_last=0
[  256.545700] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14989, diff=1, hw=0 hw_last=0
[  256.562278] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14990, diff=1, hw=0 hw_last=0
[  256.578856] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14991, diff=1, hw=0 hw_last=0
[  256.595435] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14992, diff=1, hw=0 hw_last=0
[  256.612014] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14993, diff=1, hw=0 hw_last=0
[  256.628595] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14994, diff=1, hw=0 hw_last=0
[  256.645173] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14995, diff=1, hw=0 hw_last=0
[  256.661757] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14996, diff=1, hw=0 hw_last=0
[  256.678335] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14997, diff=1, hw=0 hw_last=0
[  256.694915] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14998, diff=1, hw=0 hw_last=0
[  256.711494] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=14999, diff=1, hw=0 hw_last=0
[  256.728070] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15000, diff=1, hw=0 hw_last=0
[  256.744651] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15001, diff=1, hw=0 hw_last=0
[  256.761229] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15002, diff=1, hw=0 hw_last=0
[  256.777809] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15003, diff=1, hw=0 hw_last=0
[  256.794388] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15004, diff=1, hw=0 hw_last=0
[  256.810970] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15005, diff=1, hw=0 hw_last=0
[  256.827546] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15006, diff=1, hw=0 hw_last=0
[  256.844125] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15007, diff=1, hw=0 hw_last=0
[  256.860705] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15008, diff=1, hw=0 hw_last=0
[  256.877285] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15009, diff=1, hw=0 hw_last=0
[  256.893866] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15010, diff=1, hw=0 hw_last=0
[  256.910447] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15011, diff=1, hw=0 hw_last=0
[  256.927023] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15012, diff=1, hw=0 hw_last=0
[  256.943602] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15013, diff=1, hw=0 hw_last=0
[  256.960180] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15014, diff=1, hw=0 hw_last=0
[  257.092815] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15022, diff=1, hw=0 hw_last=0
[  257.109393] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15023, diff=1, hw=0 hw_last=0
[  257.125970] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15024, diff=1, hw=0 hw_last=0
[  257.142554] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15025, diff=1, hw=0 hw_last=0
[  257.159132] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15026, diff=1, hw=0 hw_last=0
[  257.175719] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15027, diff=1, hw=0 hw_last=0
[  257.178372] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  257.178494] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 15028 to client
[  257.184769] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  257.184867] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007967e7cb
[  257.184950] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  257.185022] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000ec98bd42 state to 000000007967e7cb
[  257.185101] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  257.185173] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 000000007967e7cb
[  257.185253] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000ec98bd42
[  257.185327] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  257.185399] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  257.185469] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  257.185541] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  257.185616] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  257.185687] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  257.185762] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  257.185833] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  257.185905] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000007967e7cb
[  257.185978] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  257.186050] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000007967e7cb
[  257.186132] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  257.186177] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  257.186214] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000007967e7cb
[  257.186293] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000000cc24793 to 000000007967e7cb
[  257.186366] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000007967e7cb
[  257.186445] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  257.186518] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  257.186590] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  257.186670] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000007967e7cb
[  257.186745] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007967e7cb
[  257.186817] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  257.186890] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  257.186962] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  257.187033] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  257.187125] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007967e7cb
[  257.188515] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  257.192295] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15028, diff=1, hw=0 hw_last=0
[  257.208877] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15029, diff=1, hw=0 hw_last=0
[  257.225454] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15030, diff=1, hw=0 hw_last=0
[  257.242035] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15031, diff=1, hw=0 hw_last=0
[  257.258620] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15032, diff=1, hw=0 hw_last=0
[  257.275199] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15033, diff=1, hw=0 hw_last=0
[  257.291772] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15034, diff=1, hw=0 hw_last=0
[  257.308351] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15035, diff=1, hw=0 hw_last=0
[  257.324930] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15036, diff=1, hw=0 hw_last=0
[  257.341513] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15037, diff=1, hw=0 hw_last=0
[  257.358089] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15038, diff=1, hw=0 hw_last=0
[  257.374670] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15039, diff=1, hw=0 hw_last=0
[  257.391244] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15040, diff=1, hw=0 hw_last=0
[  257.407826] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15041, diff=1, hw=0 hw_last=0
[  257.417534] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  257.417651] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007967e7cb
[  257.417740] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  257.417814] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000ec98bd42 state to 000000007967e7cb
[  257.417892] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  257.417965] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 000000007967e7cb
[  257.418045] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000ec98bd42
[  257.418120] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  257.418192] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  257.418264] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  257.418336] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  257.418413] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  257.418484] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  257.418560] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  257.418633] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  257.418705] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000007967e7cb
[  257.418779] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  257.418854] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000007967e7cb
[  257.418936] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  257.424766] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  257.424831] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007967e7cb
[  257.440979] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15043, diff=1, hw=0 hw_last=0
[  257.457557] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15044, diff=1, hw=0 hw_last=0
[  257.474138] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15045, diff=1, hw=0 hw_last=0
[  257.490716] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15046, diff=1, hw=0 hw_last=0
[  257.507295] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15047, diff=1, hw=0 hw_last=0
[  257.523877] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15048, diff=1, hw=0 hw_last=0
[  257.540454] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15049, diff=1, hw=0 hw_last=0
[  257.557034] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15050, diff=1, hw=0 hw_last=0
[  257.573614] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15051, diff=1, hw=0 hw_last=0
[  257.590196] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15052, diff=1, hw=0 hw_last=0
[  257.606769] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15053, diff=1, hw=0 hw_last=0
[  257.623346] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15054, diff=1, hw=0 hw_last=0
[  257.639927] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15055, diff=1, hw=0 hw_last=0
[  257.656505] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15056, diff=1, hw=0 hw_last=0
[  257.673083] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15057, diff=1, hw=0 hw_last=0
[  257.689663] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15058, diff=1, hw=0 hw_last=0
[  257.706241] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15059, diff=1, hw=0 hw_last=0
[  257.722827] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15060, diff=1, hw=0 hw_last=0
[  257.739405] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15061, diff=1, hw=0 hw_last=0
[  257.755982] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15062, diff=1, hw=0 hw_last=0
[  257.772566] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15063, diff=1, hw=0 hw_last=0
[  257.789139] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15064, diff=1, hw=0 hw_last=0
[  257.805719] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15065, diff=1, hw=0 hw_last=0
[  257.822301] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15066, diff=1, hw=0 hw_last=0
[  257.838877] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15067, diff=1, hw=0 hw_last=0
[  257.855460] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15068, diff=1, hw=0 hw_last=0
[  257.872038] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15069, diff=1, hw=0 hw_last=0
[  257.888619] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15070, diff=1, hw=0 hw_last=0
[  257.905195] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15071, diff=1, hw=0 hw_last=0
[  257.921774] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15072, diff=1, hw=0 hw_last=0
[  257.938356] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15073, diff=1, hw=0 hw_last=0
[  257.954934] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15074, diff=1, hw=0 hw_last=0
[  257.971514] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15075, diff=1, hw=0 hw_last=0
[  257.988090] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15076, diff=1, hw=0 hw_last=0
[  258.004670] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15077, diff=1, hw=0 hw_last=0
[  258.021251] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15078, diff=1, hw=0 hw_last=0
[  258.037831] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15079, diff=1, hw=0 hw_last=0
[  258.054409] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15080, diff=1, hw=0 hw_last=0
[  258.070988] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15081, diff=1, hw=0 hw_last=0
[  258.087567] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15082, diff=1, hw=0 hw_last=0
[  258.104146] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15083, diff=1, hw=0 hw_last=0
[  258.120726] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15084, diff=1, hw=0 hw_last=0
[  258.137304] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15085, diff=1, hw=0 hw_last=0
[  258.153882] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15086, diff=1, hw=0 hw_last=0
[  258.170460] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15087, diff=1, hw=0 hw_last=0
[  258.187040] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15088, diff=1, hw=0 hw_last=0
[  258.203621] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15089, diff=1, hw=0 hw_last=0
[  258.220205] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15090, diff=1, hw=0 hw_last=0
[  258.224666] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  258.224784] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 15091 to client
[  258.229054] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  258.229161] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000018d86a98
[  258.229243] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  258.229317] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000215b6887 state to 0000000018d86a98
[  258.229394] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  258.229466] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 0000000018d86a98
[  258.229546] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000215b6887
[  258.229620] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  258.229692] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  258.229763] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  258.229835] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  258.229910] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  258.452434] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000018d86a98
[  258.452524] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  258.452597] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000215b6887 state to 0000000018d86a98
[  258.452676] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  258.452749] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 0000000018d86a98
[  258.452830] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000215b6887
[  258.452905] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  258.452977] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  258.453049] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  258.453123] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  258.453198] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  258.453270] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  258.453347] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  258.453419] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  258.453494] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 0000000018d86a98
[  258.453571] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  258.453645] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000018d86a98
[  258.453728] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  258.453780] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  258.453818] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000018d86a98
[  258.453904] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000ab379aee to 0000000018d86a98
[  258.453979] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000018d86a98
[  258.454067] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000018d86a98 nonblocking
[  258.454189] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  258.454269] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  258.468890] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15105, diff=1, hw=0 hw_last=0
[  258.469003] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000018d86a98
[  258.469071] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  258.469133] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  258.469195] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  258.469257] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  258.469319] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000018d86a98
[  258.485468] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15106, diff=1, hw=0 hw_last=0
[  258.502047] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15107, diff=1, hw=0 hw_last=0
[  258.518628] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15108, diff=1, hw=0 hw_last=0
[  258.535205] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15109, diff=1, hw=0 hw_last=0
[  258.551785] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15110, diff=1, hw=0 hw_last=0
[  258.568367] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15111, diff=1, hw=0 hw_last=0
[  258.584944] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15112, diff=1, hw=0 hw_last=0
[  258.601525] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15113, diff=1, hw=0 hw_last=0
[  258.618105] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15114, diff=1, hw=0 hw_last=0
[  258.634688] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15115, diff=1, hw=0 hw_last=0
[  258.651262] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15116, diff=1, hw=0 hw_last=0
[  258.667836] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15117, diff=1, hw=0 hw_last=0
[  258.684415] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15118, diff=1, hw=0 hw_last=0
[  258.700994] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15119, diff=1, hw=0 hw_last=0
[  258.717574] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15120, diff=1, hw=0 hw_last=0
[  258.734153] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15121, diff=1, hw=0 hw_last=0
[  258.750730] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15122, diff=1, hw=0 hw_last=0
[  258.767316] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15123, diff=1, hw=0 hw_last=0
[  258.783896] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15124, diff=1, hw=0 hw_last=0
[  258.800473] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15125, diff=1, hw=0 hw_last=0
[  258.817055] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15126, diff=1, hw=0 hw_last=0
[  258.833629] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15127, diff=1, hw=0 hw_last=0
[  258.850209] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15128, diff=1, hw=0 hw_last=0
[  258.866790] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15129, diff=1, hw=0 hw_last=0
[  258.883368] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15130, diff=1, hw=0 hw_last=0
[  258.899949] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15131, diff=1, hw=0 hw_last=0
[  258.916528] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15132, diff=1, hw=0 hw_last=0
[  258.933107] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15133, diff=1, hw=0 hw_last=0
[  258.949685] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15134, diff=1, hw=0 hw_last=0
[  258.966263] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15135, diff=1, hw=0 hw_last=0
[  258.982845] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15136, diff=1, hw=0 hw_last=0
[  258.999422] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15137, diff=1, hw=0 hw_last=0
[  259.016003] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15138, diff=1, hw=0 hw_last=0
[  259.032580] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15139, diff=1, hw=0 hw_last=0
[  259.049159] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15140, diff=1, hw=0 hw_last=0
[  259.181792] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15148, diff=1, hw=0 hw_last=0
[  259.198374] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15149, diff=1, hw=0 hw_last=0
[  259.214950] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15150, diff=1, hw=0 hw_last=0
[  259.231530] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15151, diff=1, hw=0 hw_last=0
[  259.248110] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15152, diff=1, hw=0 hw_last=0
[  259.264694] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15153, diff=1, hw=0 hw_last=0
[  259.273813] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  259.273936] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 15154 to client
[  259.275224] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  259.275327] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006e1bef3e
[  259.275422] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  259.275498] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000003519e999 state to 000000006e1bef3e
[  259.275581] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  259.275655] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 000000006e1bef3e
[  259.275737] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 000000003519e999
[  259.275813] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  259.275885] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  259.275957] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  259.276029] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  259.276105] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  259.276177] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  259.276254] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  259.276326] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  259.276398] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 000000006e1bef3e
[  259.276473] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  259.276546] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000006e1bef3e
[  259.276627] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  259.276675] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  259.276711] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006e1bef3e
[  259.276790] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000095dd8ec0 to 000000006e1bef3e
[  259.276864] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006e1bef3e
[  259.276943] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  259.277018] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  259.277092] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  259.277175] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000006e1bef3e
[  259.277252] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006e1bef3e
[  259.277326] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  259.277398] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  259.277471] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  259.277545] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  259.277617] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006e1bef3e
[  259.278975] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  259.281278] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15154, diff=1, hw=0 hw_last=0
[  259.297855] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15155, diff=1, hw=0 hw_last=0
[  259.314433] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15156, diff=1, hw=0 hw_last=0
[  259.331012] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15157, diff=1, hw=0 hw_last=0
[  259.347593] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15158, diff=1, hw=0 hw_last=0
[  259.364171] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15159, diff=1, hw=0 hw_last=0
[  259.380751] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15160, diff=1, hw=0 hw_last=0
[  259.397329] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15161, diff=1, hw=0 hw_last=0
[  259.413908] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15162, diff=1, hw=0 hw_last=0
[  259.430491] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15163, diff=1, hw=0 hw_last=0
[  259.447068] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15164, diff=1, hw=0 hw_last=0
[  259.463648] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15165, diff=1, hw=0 hw_last=0
[  259.480225] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15166, diff=1, hw=0 hw_last=0
[  259.496803] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15167, diff=1, hw=0 hw_last=0
[  259.507080] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  259.507195] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006e1bef3e
[  259.507286] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  259.507360] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000003519e999 state to 000000006e1bef3e
[  259.507439] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  259.507511] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 000000006e1bef3e
[  259.507589] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 000000003519e999
[  259.507664] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  259.507735] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  259.507806] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  259.507878] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  259.507952] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  259.508024] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  259.508099] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  259.508170] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  259.508242] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 000000006e1bef3e
[  259.508316] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  259.508389] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000006e1bef3e
[  259.508472] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  259.508522] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  259.745485] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15182, diff=1, hw=0 hw_last=0
[  259.762063] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15183, diff=1, hw=0 hw_last=0
[  259.778643] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15184, diff=1, hw=0 hw_last=0
[  259.795222] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15185, diff=1, hw=0 hw_last=0
[  259.811800] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15186, diff=1, hw=0 hw_last=0
[  259.828385] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15187, diff=1, hw=0 hw_last=0
[  259.844961] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15188, diff=1, hw=0 hw_last=0
[  259.861543] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15189, diff=1, hw=0 hw_last=0
[  259.878120] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15190, diff=1, hw=0 hw_last=0
[  259.894704] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15191, diff=1, hw=0 hw_last=0
[  259.911281] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15192, diff=1, hw=0 hw_last=0
[  259.927860] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15193, diff=1, hw=0 hw_last=0
[  259.944439] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15194, diff=1, hw=0 hw_last=0
[  259.961014] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15195, diff=1, hw=0 hw_last=0
[  259.977595] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15196, diff=1, hw=0 hw_last=0
[  259.994174] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15197, diff=1, hw=0 hw_last=0
[  260.010751] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15198, diff=1, hw=0 hw_last=0
[  260.027334] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15199, diff=1, hw=0 hw_last=0
[  260.043912] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15200, diff=1, hw=0 hw_last=0
[  260.060490] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15201, diff=1, hw=0 hw_last=0
[  260.077071] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15202, diff=1, hw=0 hw_last=0
[  260.093649] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15203, diff=1, hw=0 hw_last=0
[  260.110232] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15204, diff=1, hw=0 hw_last=0
[  260.126810] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15205, diff=1, hw=0 hw_last=0
[  260.143389] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15206, diff=1, hw=0 hw_last=0
[  260.159969] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15207, diff=1, hw=0 hw_last=0
[  260.176546] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15208, diff=1, hw=0 hw_last=0
[  260.193123] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15209, diff=1, hw=0 hw_last=0
[  260.209704] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15210, diff=1, hw=0 hw_last=0
[  260.226287] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15211, diff=1, hw=0 hw_last=0
[  260.242862] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15212, diff=1, hw=0 hw_last=0
[  260.259443] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15213, diff=1, hw=0 hw_last=0
[  260.276021] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15214, diff=1, hw=0 hw_last=0
[  260.292602] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15215, diff=1, hw=0 hw_last=0
[  260.309181] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15216, diff=1, hw=0 hw_last=0
[  260.325761] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15217, diff=1, hw=0 hw_last=0
[  260.342341] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15218, diff=1, hw=0 hw_last=0
[  260.358915] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15219, diff=1, hw=0 hw_last=0
[  260.375497] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15220, diff=1, hw=0 hw_last=0
[  260.392074] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15221, diff=1, hw=0 hw_last=0
[  260.408655] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15222, diff=1, hw=0 hw_last=0
[  260.425235] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15223, diff=1, hw=0 hw_last=0
[  260.441816] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15224, diff=1, hw=0 hw_last=0
[  260.454141] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  260.454264] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 15225 to client
[  260.458397] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15225, diff=1, hw=0 hw_last=0
[  260.467548] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  260.467644] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000004593454f
[  260.467727] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  260.467800] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000082b4fa6a state to 000000004593454f
[  260.467876] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  260.467949] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000e8543c49 state to 000000004593454f
[  260.468028] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000082b4fa6a
[  260.468102] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  260.468173] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  260.468244] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  260.468315] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  260.468391] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  260.468462] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  260.468539] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  260.468611] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  260.468682] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000004593454f
[  260.468757] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  260.468828] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000004593454f
[  260.468910] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  260.700072] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000e8543c49 state to 000000004593454f
[  260.700154] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 0000000082b4fa6a
[  260.700229] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  260.700303] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  260.700374] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  260.700446] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  260.700522] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  260.700594] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  260.700670] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  260.700742] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  260.700814] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000004593454f
[  260.700888] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  260.700962] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000004593454f
[  260.701045] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  260.701095] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  260.701132] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000004593454f
[  260.701212] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000095dd8ec0 to 000000004593454f
[  260.701286] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000004593454f
[  260.701374] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000004593454f nonblocking
[  260.701491] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  260.701566] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  260.707081] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15239, diff=1, hw=0 hw_last=0
[  260.707187] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000004593454f
[  260.707253] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  260.707316] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  260.707377] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  260.707440] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  260.707503] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000004593454f
[  260.723661] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15240, diff=1, hw=0 hw_last=0
[  260.740240] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15241, diff=1, hw=0 hw_last=0
[  260.756819] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15242, diff=1, hw=0 hw_last=0
[  260.773398] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15243, diff=1, hw=0 hw_last=0
[  260.789975] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15244, diff=1, hw=0 hw_last=0
[  260.806558] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15245, diff=1, hw=0 hw_last=0
[  260.823135] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15246, diff=1, hw=0 hw_last=0
[  260.839717] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15247, diff=1, hw=0 hw_last=0
[  260.856296] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15248, diff=1, hw=0 hw_last=0
[  260.872877] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15249, diff=1, hw=0 hw_last=0
[  260.889449] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15250, diff=1, hw=0 hw_last=0
[  260.906028] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15251, diff=1, hw=0 hw_last=0
[  260.922607] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15252, diff=1, hw=0 hw_last=0
[  260.939186] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15253, diff=1, hw=0 hw_last=0
[  260.955765] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15254, diff=1, hw=0 hw_last=0
[  260.972344] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15255, diff=1, hw=0 hw_last=0
[  260.988924] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15256, diff=1, hw=0 hw_last=0
[  261.005505] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15257, diff=1, hw=0 hw_last=0
[  261.022084] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15258, diff=1, hw=0 hw_last=0
[  261.038668] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15259, diff=1, hw=0 hw_last=0
[  261.055244] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15260, diff=1, hw=0 hw_last=0
[  261.071826] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15261, diff=1, hw=0 hw_last=0
[  261.088404] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15262, diff=1, hw=0 hw_last=0
[  261.104982] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15263, diff=1, hw=0 hw_last=0
[  261.121561] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15264, diff=1, hw=0 hw_last=0
[  261.138137] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15265, diff=1, hw=0 hw_last=0
[  261.154718] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15266, diff=1, hw=0 hw_last=0
[  261.171296] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15267, diff=1, hw=0 hw_last=0
[  261.187874] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15268, diff=1, hw=0 hw_last=0
[  261.204456] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15269, diff=1, hw=0 hw_last=0
[  261.221035] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15270, diff=1, hw=0 hw_last=0
[  261.237614] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15271, diff=1, hw=0 hw_last=0
[  261.254194] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15272, diff=1, hw=0 hw_last=0
[  261.270773] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15273, diff=1, hw=0 hw_last=0
[  261.287354] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15274, diff=1, hw=0 hw_last=0
[  261.303934] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15275, diff=1, hw=0 hw_last=0
[  261.320514] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15276, diff=1, hw=0 hw_last=0
[  261.337091] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15277, diff=1, hw=0 hw_last=0
[  261.486306] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15286, diff=1, hw=0 hw_last=0
[  261.502887] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15287, diff=1, hw=0 hw_last=0
[  261.519462] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15288, diff=1, hw=0 hw_last=0
[  261.536041] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15289, diff=1, hw=0 hw_last=0
[  261.552618] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15290, diff=1, hw=0 hw_last=0
[  261.569198] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15291, diff=1, hw=0 hw_last=0
[  261.585779] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15292, diff=1, hw=0 hw_last=0
[  261.602360] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15293, diff=1, hw=0 hw_last=0
[  261.618943] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15294, diff=1, hw=0 hw_last=0
[  261.626273] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  261.626399] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 15295 to client
[  261.628668] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  261.628773] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f37c832b
[  261.628854] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  261.628926] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000fefb5c61 state to 00000000f37c832b
[  261.629003] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  261.629075] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 00000000f37c832b
[  261.629156] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000fefb5c61
[  261.629229] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  261.629300] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  261.629371] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  261.629442] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  261.629518] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  261.629589] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  261.629664] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  261.629735] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  261.629807] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 00000000f37c832b
[  261.629881] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  261.629952] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000f37c832b
[  261.630035] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  261.630083] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  261.630120] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000f37c832b
[  261.630199] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000018d86a98 to 00000000f37c832b
[  261.630273] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000f37c832b
[  261.630351] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  261.630422] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  261.630495] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  261.630575] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 00000000f37c832b
[  261.630650] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f37c832b
[  261.630723] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  261.630795] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  261.630866] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  261.630938] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  261.631034] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f37c832b
[  261.632403] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  261.635523] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15295, diff=1, hw=0 hw_last=0
[  261.652100] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15296, diff=1, hw=0 hw_last=0
[  261.668679] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15297, diff=1, hw=0 hw_last=0
[  261.685257] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15298, diff=1, hw=0 hw_last=0
[  261.701840] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15299, diff=1, hw=0 hw_last=0
[  261.718418] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15300, diff=1, hw=0 hw_last=0
[  261.734999] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15301, diff=1, hw=0 hw_last=0
[  261.751578] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15302, diff=1, hw=0 hw_last=0
[  261.768156] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15303, diff=1, hw=0 hw_last=0
[  261.784740] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15304, diff=1, hw=0 hw_last=0
[  261.801317] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15305, diff=1, hw=0 hw_last=0
[  261.817895] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15306, diff=1, hw=0 hw_last=0
[  261.834471] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15307, diff=1, hw=0 hw_last=0
[  261.851054] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15308, diff=1, hw=0 hw_last=0
[  261.852332] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  261.852443] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f37c832b
[  261.852529] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  261.852603] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000fefb5c61 state to 00000000f37c832b
[  261.852680] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  261.852752] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 00000000f37c832b
[  261.852832] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000fefb5c61
[  261.852907] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  261.852978] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  261.853049] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  261.853120] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  261.853194] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  261.853267] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  261.853343] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  261.853414] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  261.853881] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000008e9f664b to 00000000f37c832b
[  261.853954] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000f37c832b
[  261.854043] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f37c832b nonblocking
[  261.854166] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  261.854237] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  261.867628] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15309, diff=1, hw=0 hw_last=0
[  261.867739] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f37c832b
[  261.867816] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  261.867878] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  261.867939] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  261.868001] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  261.868063] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f37c832b
[  261.884204] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15310, diff=1, hw=0 hw_last=0
[  261.900784] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15311, diff=1, hw=0 hw_last=0
[  261.917361] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15312, diff=1, hw=0 hw_last=0
[  261.933941] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15313, diff=1, hw=0 hw_last=0
[  261.950521] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15314, diff=1, hw=0 hw_last=0
[  261.967102] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15315, diff=1, hw=0 hw_last=0
[  261.983678] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15316, diff=1, hw=0 hw_last=0
[  262.000259] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15317, diff=1, hw=0 hw_last=0
[  262.016841] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15318, diff=1, hw=0 hw_last=0
[  262.033421] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15319, diff=1, hw=0 hw_last=0
[  262.049996] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15320, diff=1, hw=0 hw_last=0
[  262.066572] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15321, diff=1, hw=0 hw_last=0
[  262.083152] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15322, diff=1, hw=0 hw_last=0
[  262.099731] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15323, diff=1, hw=0 hw_last=0
[  262.116310] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15324, diff=1, hw=0 hw_last=0
[  262.132889] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15325, diff=1, hw=0 hw_last=0
[  262.149468] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15326, diff=1, hw=0 hw_last=0
[  262.166049] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15327, diff=1, hw=0 hw_last=0
[  262.182632] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15328, diff=1, hw=0 hw_last=0
[  262.199210] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15329, diff=1, hw=0 hw_last=0
[  262.215790] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15330, diff=1, hw=0 hw_last=0
[  262.232365] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15331, diff=1, hw=0 hw_last=0
[  262.248948] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15332, diff=1, hw=0 hw_last=0
[  262.265527] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15333, diff=1, hw=0 hw_last=0
[  262.282105] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15334, diff=1, hw=0 hw_last=0
[  262.298681] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15335, diff=1, hw=0 hw_last=0
[  262.315261] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15336, diff=1, hw=0 hw_last=0
[  262.331839] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15337, diff=1, hw=0 hw_last=0
[  262.348421] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15338, diff=1, hw=0 hw_last=0
[  262.364997] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15339, diff=1, hw=0 hw_last=0
[  262.381579] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15340, diff=1, hw=0 hw_last=0
[  262.398162] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15341, diff=1, hw=0 hw_last=0
[  262.414740] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15342, diff=1, hw=0 hw_last=0
[  262.431316] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15343, diff=1, hw=0 hw_last=0
[  262.447896] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15344, diff=1, hw=0 hw_last=0
[  262.464478] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15345, diff=1, hw=0 hw_last=0
[  262.481055] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15346, diff=1, hw=0 hw_last=0
[  262.497632] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15347, diff=1, hw=0 hw_last=0
[  262.514212] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15348, diff=1, hw=0 hw_last=0
[  262.530791] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15349, diff=1, hw=0 hw_last=0
[  262.547371] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15350, diff=1, hw=0 hw_last=0
[  262.563952] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15351, diff=1, hw=0 hw_last=0
[  262.580531] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15352, diff=1, hw=0 hw_last=0
[  262.597109] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15353, diff=1, hw=0 hw_last=0
[  262.613691] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15354, diff=1, hw=0 hw_last=0
[  262.630282] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15355, diff=1, hw=0 hw_last=0
[  262.631211] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  262.631329] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 15356 to client
[  262.639598] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  262.639703] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006c5644bb
[  262.779489] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15364, diff=1, hw=0 hw_last=0
[  262.796068] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15365, diff=1, hw=0 hw_last=0
[  262.812644] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15366, diff=1, hw=0 hw_last=0
[  262.829225] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15367, diff=1, hw=0 hw_last=0
[  262.845803] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15368, diff=1, hw=0 hw_last=0
[  262.862384] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15369, diff=1, hw=0 hw_last=0
[  262.863354] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  262.863469] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006c5644bb
[  262.863556] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  262.863630] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000087081e28 state to 000000006c5644bb
[  262.863709] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  262.863781] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000adb7ad91 state to 000000006c5644bb
[  262.863864] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 0000000087081e28
[  262.863939] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  262.864011] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  262.864082] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  262.864154] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  262.864230] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  262.864302] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  262.864378] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  262.864450] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  262.864521] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 000000006c5644bb
[  262.864596] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  262.864669] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000006c5644bb
[  262.864752] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  262.864802] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  262.864839] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006c5644bb
[  262.864918] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000000cc24793 to 000000006c5644bb
[  262.864992] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006c5644bb
[  262.865080] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006c5644bb nonblocking
[  262.865197] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  262.865274] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  262.878959] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15370, diff=1, hw=0 hw_last=0
[  262.879073] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006c5644bb
[  262.879142] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  262.879205] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  262.879266] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  262.879327] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  262.879390] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006c5644bb
[  262.895535] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15371, diff=1, hw=0 hw_last=0
[  262.912117] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15372, diff=1, hw=0 hw_last=0
[  262.928694] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15373, diff=1, hw=0 hw_last=0
[  262.945273] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15374, diff=1, hw=0 hw_last=0
[  262.961850] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15375, diff=1, hw=0 hw_last=0
[  262.978433] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15376, diff=1, hw=0 hw_last=0
[  262.995011] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15377, diff=1, hw=0 hw_last=0
[  263.011591] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15378, diff=1, hw=0 hw_last=0
[  263.028172] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15379, diff=1, hw=0 hw_last=0
[  263.044751] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15380, diff=1, hw=0 hw_last=0
[  263.061324] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15381, diff=1, hw=0 hw_last=0
[  263.077903] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15382, diff=1, hw=0 hw_last=0
[  263.094484] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15383, diff=1, hw=0 hw_last=0
[  263.111063] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15384, diff=1, hw=0 hw_last=0
[  263.127641] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15385, diff=1, hw=0 hw_last=0
[  263.144220] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15386, diff=1, hw=0 hw_last=0
[  263.160799] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15387, diff=1, hw=0 hw_last=0
[  263.177382] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15388, diff=1, hw=0 hw_last=0
[  263.193963] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15389, diff=1, hw=0 hw_last=0
[  263.210540] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15390, diff=1, hw=0 hw_last=0
[  263.227119] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15391, diff=1, hw=0 hw_last=0
[  263.243697] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15392, diff=1, hw=0 hw_last=0
[  263.260280] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15393, diff=1, hw=0 hw_last=0
[  263.276858] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15394, diff=1, hw=0 hw_last=0
[  263.293436] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15395, diff=1, hw=0 hw_last=0
[  263.310013] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15396, diff=1, hw=0 hw_last=0
[  263.326593] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15397, diff=1, hw=0 hw_last=0
[  263.343172] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15398, diff=1, hw=0 hw_last=0
[  263.558702] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15411, diff=1, hw=0 hw_last=0
[  263.575285] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15412, diff=1, hw=0 hw_last=0
[  263.591863] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15413, diff=1, hw=0 hw_last=0
[  263.608439] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15414, diff=1, hw=0 hw_last=0
[  263.625024] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15415, diff=1, hw=0 hw_last=0
[  263.636227] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  263.636352] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 15416 to client
[  263.641603] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15416, diff=1, hw=0 hw_last=0
[  263.650627] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  263.650727] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008a640c91
[  263.650810] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  263.650883] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000002cafbe1b state to 000000008a640c91
[  263.650979] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  263.651054] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 000000008a640c91
[  263.651134] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 000000002cafbe1b
[  263.651207] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  263.651279] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  263.651351] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  263.651422] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  263.651499] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  263.651570] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  263.651646] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  263.651718] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  263.651792] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000008a640c91
[  263.651868] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  263.651942] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000008a640c91
[  263.652025] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  263.652072] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  263.652109] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008a640c91
[  263.652190] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000006c5644bb to 000000008a640c91
[  263.652265] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008a640c91
[  263.652346] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  263.652427] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  263.652508] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  263.652591] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000008a640c91
[  263.652667] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008a640c91
[  263.652740] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  263.652813] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  263.652886] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  263.652958] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  263.653030] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008a640c91
[  263.654419] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  263.658185] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15417, diff=1, hw=0 hw_last=0
[  263.674763] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15418, diff=1, hw=0 hw_last=0
[  263.691343] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15419, diff=1, hw=0 hw_last=0
[  263.707919] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15420, diff=1, hw=0 hw_last=0
[  263.724501] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15421, diff=1, hw=0 hw_last=0
[  263.741080] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15422, diff=1, hw=0 hw_last=0
[  263.757658] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15423, diff=1, hw=0 hw_last=0
[  263.774238] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15424, diff=1, hw=0 hw_last=0
[  263.790820] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15425, diff=1, hw=0 hw_last=0
[  263.807396] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15426, diff=1, hw=0 hw_last=0
[  263.823976] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15427, diff=1, hw=0 hw_last=0
[  263.840552] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15428, diff=1, hw=0 hw_last=0
[  263.857132] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15429, diff=1, hw=0 hw_last=0
[  263.873711] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15430, diff=1, hw=0 hw_last=0
[  263.874290] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  263.874403] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008a640c91
[  263.874493] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  263.874568] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000002cafbe1b state to 000000008a640c91
[  263.874647] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  263.874719] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 000000008a640c91
[  263.874799] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 000000002cafbe1b
[  263.874873] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  263.874980] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  263.875057] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  263.875129] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  263.875205] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  263.875278] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  263.875354] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  263.875427] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  263.875499] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000008a640c91
[  263.875574] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  263.875649] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000008a640c91
[  263.875732] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  263.875780] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  263.876168] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  263.876239] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  263.890288] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15431, diff=1, hw=0 hw_last=0
[  263.890395] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008a640c91
[  263.890472] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  263.890535] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  263.890597] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  263.890659] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  263.890723] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008a640c91
[  263.906866] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15432, diff=1, hw=0 hw_last=0
[  263.923445] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15433, diff=1, hw=0 hw_last=0
[  263.940024] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15434, diff=1, hw=0 hw_last=0
[  263.956604] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15435, diff=1, hw=0 hw_last=0
[  263.973180] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15436, diff=1, hw=0 hw_last=0
[  263.989763] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15437, diff=1, hw=0 hw_last=0
[  264.006339] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15438, diff=1, hw=0 hw_last=0
[  264.022920] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15439, diff=1, hw=0 hw_last=0
[  264.039503] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15440, diff=1, hw=0 hw_last=0
[  264.056082] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15441, diff=1, hw=0 hw_last=0
[  264.072655] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15442, diff=1, hw=0 hw_last=0
[  264.089234] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15443, diff=1, hw=0 hw_last=0
[  264.105813] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15444, diff=1, hw=0 hw_last=0
[  264.122392] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15445, diff=1, hw=0 hw_last=0
[  264.138972] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15446, diff=1, hw=0 hw_last=0
[  264.155549] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15447, diff=1, hw=0 hw_last=0
[  264.172130] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15448, diff=1, hw=0 hw_last=0
[  264.188714] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15449, diff=1, hw=0 hw_last=0
[  264.205292] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15450, diff=1, hw=0 hw_last=0
[  264.221872] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15451, diff=1, hw=0 hw_last=0
[  264.238449] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15452, diff=1, hw=0 hw_last=0
[  264.255029] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15453, diff=1, hw=0 hw_last=0
[  264.271606] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15454, diff=1, hw=0 hw_last=0
[  264.288188] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15455, diff=1, hw=0 hw_last=0
[  264.304767] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15456, diff=1, hw=0 hw_last=0
[  264.321345] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15457, diff=1, hw=0 hw_last=0
[  264.337924] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15458, diff=1, hw=0 hw_last=0
[  264.354505] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15459, diff=1, hw=0 hw_last=0
[  264.371081] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15460, diff=1, hw=0 hw_last=0
[  264.387661] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15461, diff=1, hw=0 hw_last=0
[  264.404242] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15462, diff=1, hw=0 hw_last=0
[  264.420819] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15463, diff=1, hw=0 hw_last=0
[  264.437399] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15464, diff=1, hw=0 hw_last=0
[  264.453984] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15465, diff=1, hw=0 hw_last=0
[  264.470558] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15466, diff=1, hw=0 hw_last=0
[  264.487135] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15467, diff=1, hw=0 hw_last=0
[  264.503717] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15468, diff=1, hw=0 hw_last=0
[  264.520296] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15469, diff=1, hw=0 hw_last=0
[  264.536875] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15470, diff=1, hw=0 hw_last=0
[  264.553454] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15471, diff=1, hw=0 hw_last=0
[  264.570035] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15472, diff=1, hw=0 hw_last=0
[  264.586611] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15473, diff=1, hw=0 hw_last=0
[  264.603192] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15474, diff=1, hw=0 hw_last=0
[  264.619770] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15475, diff=1, hw=0 hw_last=0
[  264.636352] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15476, diff=1, hw=0 hw_last=0
[  264.652927] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15477, diff=1, hw=0 hw_last=0
[  264.669507] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15478, diff=1, hw=0 hw_last=0
[  264.686086] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15479, diff=1, hw=0 hw_last=0
[  264.702669] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15480, diff=1, hw=0 hw_last=0
[  264.715552] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  264.715676] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 15481 to client
[  264.719252] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15481, diff=1, hw=0 hw_last=0
[  264.962065] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000eae20a14
[  264.962144] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000018d86a98 to 00000000eae20a14
[  264.962218] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000eae20a14
[  264.962306] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000eae20a14 nonblocking
[  264.962424] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  264.962497] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  264.967937] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15496, diff=1, hw=0 hw_last=0
[  264.968045] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000eae20a14
[  264.968122] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  264.968185] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  264.968246] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  264.968307] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  264.968369] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000eae20a14
[  264.984513] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15497, diff=1, hw=0 hw_last=0
[  265.001094] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15498, diff=1, hw=0 hw_last=0
[  265.017672] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15499, diff=1, hw=0 hw_last=0
[  265.034252] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15500, diff=1, hw=0 hw_last=0
[  265.050829] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15501, diff=1, hw=0 hw_last=0
[  265.067410] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15502, diff=1, hw=0 hw_last=0
[  265.083987] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15503, diff=1, hw=0 hw_last=0
[  265.100568] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15504, diff=1, hw=0 hw_last=0
[  265.117150] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15505, diff=1, hw=0 hw_last=0
[  265.133730] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15506, diff=1, hw=0 hw_last=0
[  265.150304] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15507, diff=1, hw=0 hw_last=0
[  265.166881] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15508, diff=1, hw=0 hw_last=0
[  265.183461] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15509, diff=1, hw=0 hw_last=0
[  265.200040] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15510, diff=1, hw=0 hw_last=0
[  265.216620] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15511, diff=1, hw=0 hw_last=0
[  265.233198] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15512, diff=1, hw=0 hw_last=0
[  265.249778] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15513, diff=1, hw=0 hw_last=0
[  265.266362] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15514, diff=1, hw=0 hw_last=0
[  265.282939] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15515, diff=1, hw=0 hw_last=0
[  265.299521] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15516, diff=1, hw=0 hw_last=0
[  265.316099] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15517, diff=1, hw=0 hw_last=0
[  265.332677] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15518, diff=1, hw=0 hw_last=0
[  265.349254] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15519, diff=1, hw=0 hw_last=0
[  265.365837] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15520, diff=1, hw=0 hw_last=0
[  265.382414] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15521, diff=1, hw=0 hw_last=0
[  265.398993] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15522, diff=1, hw=0 hw_last=0
[  265.415571] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15523, diff=1, hw=0 hw_last=0
[  265.432152] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15524, diff=1, hw=0 hw_last=0
[  265.448729] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15525, diff=1, hw=0 hw_last=0
[  265.465309] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15526, diff=1, hw=0 hw_last=0
[  265.481890] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15527, diff=1, hw=0 hw_last=0
[  265.498468] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15528, diff=1, hw=0 hw_last=0
[  265.515049] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15529, diff=1, hw=0 hw_last=0
[  265.531631] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15530, diff=1, hw=0 hw_last=0
[  265.548206] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15531, diff=1, hw=0 hw_last=0
[  265.564783] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15532, diff=1, hw=0 hw_last=0
[  265.581365] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15533, diff=1, hw=0 hw_last=0
[  265.597944] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15534, diff=1, hw=0 hw_last=0
[  265.614522] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15535, diff=1, hw=0 hw_last=0
[  265.631101] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15536, diff=1, hw=0 hw_last=0
[  265.647682] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15537, diff=1, hw=0 hw_last=0
[  265.664260] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15538, diff=1, hw=0 hw_last=0
[  265.680840] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15539, diff=1, hw=0 hw_last=0
[  265.697419] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15540, diff=1, hw=0 hw_last=0
[  265.714000] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15541, diff=1, hw=0 hw_last=0
[  265.730577] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15542, diff=1, hw=0 hw_last=0
[  265.747156] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15543, diff=1, hw=0 hw_last=0
[  265.863214] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15550, diff=1, hw=0 hw_last=0
[  265.879796] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15551, diff=1, hw=0 hw_last=0
[  265.896373] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15552, diff=1, hw=0 hw_last=0
[  265.912955] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15553, diff=1, hw=0 hw_last=0
[  265.929533] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15554, diff=1, hw=0 hw_last=0
[  265.946115] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15555, diff=1, hw=0 hw_last=0
[  265.962693] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15556, diff=1, hw=0 hw_last=0
[  265.979271] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15557, diff=1, hw=0 hw_last=0
[  265.995848] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15558, diff=1, hw=0 hw_last=0
[  266.012428] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15559, diff=1, hw=0 hw_last=0
[  266.029008] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15560, diff=1, hw=0 hw_last=0
[  266.037586] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  266.037701] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000071ef6b0b
[  266.037789] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  266.037862] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000bac3ec2d state to 0000000071ef6b0b
[  266.037940] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  266.038013] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 0000000071ef6b0b
[  266.038094] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000bac3ec2d
[  266.038167] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  266.038238] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  266.038309] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  266.038380] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  266.038455] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  266.038526] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  266.038601] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  266.038673] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  266.038744] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 0000000071ef6b0b
[  266.038818] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  266.038928] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000071ef6b0b
[  266.039018] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  266.039064] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  266.039102] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000071ef6b0b
[  266.039185] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000006e1bef3e to 0000000071ef6b0b
[  266.039259] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000071ef6b0b
[  266.039350] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000071ef6b0b nonblocking
[  266.039465] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  266.039545] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  266.045582] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15561, diff=1, hw=0 hw_last=0
[  266.045682] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000071ef6b0b
[  266.045755] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  266.045818] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  266.045880] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  266.045943] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  266.046008] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000071ef6b0b
[  266.062163] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15562, diff=1, hw=0 hw_last=0
[  266.078741] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15563, diff=1, hw=0 hw_last=0
[  266.079385] systemd-journald[214]: Data hash table of /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal has a fill level at 75.1 (2732 of 3640 items, 2097152 file size, 767 bytes per hash table item), suggesting rotation.
[  266.095321] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15564, diff=1, hw=0 hw_last=0
[  266.105646] systemd-journald[214]: /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal: Journal header limits reached or header out-of-date, rotating.
[  266.111897] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15565, diff=1, hw=0 hw_last=0
[  266.128478] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15566, diff=1, hw=0 hw_last=0
[  266.145061] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15567, diff=1, hw=0 hw_last=0
[  266.161637] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15568, diff=1, hw=0 hw_last=0
[  266.178217] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15569, diff=1, hw=0 hw_last=0
[  266.194797] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15570, diff=1, hw=0 hw_last=0
[  266.211378] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15571, diff=1, hw=0 hw_last=0
[  266.227951] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15572, diff=1, hw=0 hw_last=0
[  266.244529] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15573, diff=1, hw=0 hw_last=0
[  266.261108] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15574, diff=1, hw=0 hw_last=0
[  266.277687] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15575, diff=1, hw=0 hw_last=0
[  266.294266] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15576, diff=1, hw=0 hw_last=0
[  266.310845] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15577, diff=1, hw=0 hw_last=0
[  266.327425] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15578, diff=1, hw=0 hw_last=0
[  266.344010] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15579, diff=1, hw=0 hw_last=0
[  266.360590] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15580, diff=1, hw=0 hw_last=0
[  266.377163] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15581, diff=1, hw=0 hw_last=0
[  266.393744] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15582, diff=1, hw=0 hw_last=0
[  266.509798] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15589, diff=1, hw=0 hw_last=0
[  266.526377] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15590, diff=1, hw=0 hw_last=0
[  266.542956] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15591, diff=1, hw=0 hw_last=0
[  266.559539] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15592, diff=1, hw=0 hw_last=0
[  266.576116] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15593, diff=1, hw=0 hw_last=0
[  266.592697] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15594, diff=1, hw=0 hw_last=0
[  266.609274] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15595, diff=1, hw=0 hw_last=0
[  266.625854] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15596, diff=1, hw=0 hw_last=0
[  266.642434] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15597, diff=1, hw=0 hw_last=0
[  266.659013] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15598, diff=1, hw=0 hw_last=0
[  266.675592] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15599, diff=1, hw=0 hw_last=0
[  266.692168] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15600, diff=1, hw=0 hw_last=0
[  266.708750] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15601, diff=1, hw=0 hw_last=0
[  266.725329] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15602, diff=1, hw=0 hw_last=0
[  266.741907] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15603, diff=1, hw=0 hw_last=0
[  266.758489] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15604, diff=1, hw=0 hw_last=0
[  266.775066] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15605, diff=1, hw=0 hw_last=0
[  266.791644] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15606, diff=1, hw=0 hw_last=0
[  266.808226] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15607, diff=1, hw=0 hw_last=0
[  266.824803] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15608, diff=1, hw=0 hw_last=0
[  266.841387] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15609, diff=1, hw=0 hw_last=0
[  266.852082] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  266.852202] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 15610 to client
[  266.857970] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15610, diff=1, hw=0 hw_last=0
[  266.867484] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  266.867585] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006fb5b2d2
[  266.867672] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  266.867748] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000003519e999 state to 000000006fb5b2d2
[  266.867826] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  266.867900] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 000000006fb5b2d2
[  266.867982] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 000000003519e999
[  266.868064] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  266.868140] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  266.868211] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  266.868283] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  266.868359] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  266.868430] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  266.868506] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  266.868578] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  266.868650] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000006fb5b2d2
[  266.868725] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  266.868798] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000006fb5b2d2
[  266.868880] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  266.868927] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  266.868963] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006fb5b2d2
[  266.869045] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000071ef6b0b to 000000006fb5b2d2
[  266.869119] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006fb5b2d2
[  266.869198] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  266.869271] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  266.869345] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  266.869426] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000006fb5b2d2
[  266.869501] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006fb5b2d2
[  266.869574] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  266.869646] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  266.869719] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  266.869792] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  266.869865] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006fb5b2d2
[  266.871336] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  266.874552] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15611, diff=1, hw=0 hw_last=0
[  266.891127] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15612, diff=1, hw=0 hw_last=0
[  266.907706] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15613, diff=1, hw=0 hw_last=0
[  266.924283] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15614, diff=1, hw=0 hw_last=0
[  266.940866] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15615, diff=1, hw=0 hw_last=0
[  266.957444] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15616, diff=1, hw=0 hw_last=0
[  266.974021] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15617, diff=1, hw=0 hw_last=0
[  266.990601] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15618, diff=1, hw=0 hw_last=0
[  267.007183] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15619, diff=1, hw=0 hw_last=0
[  267.023760] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15620, diff=1, hw=0 hw_last=0
[  267.099788] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  267.099862] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000003519e999 state to 000000006fb5b2d2
[  267.099940] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  267.100012] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 000000006fb5b2d2
[  267.100091] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 000000003519e999
[  267.100166] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  267.100237] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  267.100309] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  267.100380] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  267.100454] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  267.100526] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  267.100600] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  267.100672] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  267.100743] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000006fb5b2d2
[  267.100818] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  267.100892] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000006fb5b2d2
[  267.100974] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  267.101020] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  267.101056] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006fb5b2d2
[  267.101135] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000004593454f to 000000006fb5b2d2
[  267.101208] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006fb5b2d2
[  267.101296] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006fb5b2d2 nonblocking
[  267.101409] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  267.101484] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  267.106653] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15625, diff=1, hw=0 hw_last=0
[  267.106760] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006fb5b2d2
[  267.106828] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  267.106900] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  267.106963] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  267.107026] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  267.107089] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006fb5b2d2
[  267.123231] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15626, diff=1, hw=0 hw_last=0
[  267.139810] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15627, diff=1, hw=0 hw_last=0
[  267.156388] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15628, diff=1, hw=0 hw_last=0
[  267.172967] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15629, diff=1, hw=0 hw_last=0
[  267.189548] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15630, diff=1, hw=0 hw_last=0
[  267.206125] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15631, diff=1, hw=0 hw_last=0
[  267.222706] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15632, diff=1, hw=0 hw_last=0
[  267.239286] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15633, diff=1, hw=0 hw_last=0
[  267.255865] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15634, diff=1, hw=0 hw_last=0
[  267.272443] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15635, diff=1, hw=0 hw_last=0
[  267.289019] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15636, diff=1, hw=0 hw_last=0
[  267.305598] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15637, diff=1, hw=0 hw_last=0
[  267.322177] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15638, diff=1, hw=0 hw_last=0
[  267.338756] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15639, diff=1, hw=0 hw_last=0
[  267.355336] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15640, diff=1, hw=0 hw_last=0
[  267.371914] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15641, diff=1, hw=0 hw_last=0
[  267.388498] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15642, diff=1, hw=0 hw_last=0
[  267.405078] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15643, diff=1, hw=0 hw_last=0
[  267.421655] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15644, diff=1, hw=0 hw_last=0
[  267.438234] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15645, diff=1, hw=0 hw_last=0
[  267.454815] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15646, diff=1, hw=0 hw_last=0
[  267.471393] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15647, diff=1, hw=0 hw_last=0
[  267.487980] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15648, diff=1, hw=0 hw_last=0
[  267.504560] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15649, diff=1, hw=0 hw_last=0
[  267.521134] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15650, diff=1, hw=0 hw_last=0
[  267.537708] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15651, diff=1, hw=0 hw_last=0
[  267.554290] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15652, diff=1, hw=0 hw_last=0
[  267.570866] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15653, diff=1, hw=0 hw_last=0
[  267.587447] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15654, diff=1, hw=0 hw_last=0
[  267.604030] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15655, diff=1, hw=0 hw_last=0
[  267.620607] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15656, diff=1, hw=0 hw_last=0
[  267.637186] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15657, diff=1, hw=0 hw_last=0
[  267.653766] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15658, diff=1, hw=0 hw_last=0
[  267.670343] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15659, diff=1, hw=0 hw_last=0
[  267.686925] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15660, diff=1, hw=0 hw_last=0
[  267.703505] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15661, diff=1, hw=0 hw_last=0
[  267.897455] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  267.897535] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000000ace560b
[  267.897610] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000ace560b
[  267.897683] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  267.897755] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  267.897827] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  267.897900] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  267.897972] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000ace560b
[  267.899385] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  267.902461] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15673, diff=1, hw=0 hw_last=0
[  267.919036] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15674, diff=1, hw=0 hw_last=0
[  267.935616] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15675, diff=1, hw=0 hw_last=0
[  267.952193] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15676, diff=1, hw=0 hw_last=0
[  267.968777] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15677, diff=1, hw=0 hw_last=0
[  267.985354] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15678, diff=1, hw=0 hw_last=0
[  268.001936] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15679, diff=1, hw=0 hw_last=0
[  268.018513] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15680, diff=1, hw=0 hw_last=0
[  268.035095] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15681, diff=1, hw=0 hw_last=0
[  268.051672] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15682, diff=1, hw=0 hw_last=0
[  268.068251] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15683, diff=1, hw=0 hw_last=0
[  268.084830] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15684, diff=1, hw=0 hw_last=0
[  268.101407] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15685, diff=1, hw=0 hw_last=0
[  268.117986] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15686, diff=1, hw=0 hw_last=0
[  268.128100] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  268.128215] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000ace560b
[  268.128303] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  268.128377] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000082b4fa6a state to 000000000ace560b
[  268.128455] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  268.128528] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 000000000ace560b
[  268.128609] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000082b4fa6a
[  268.128683] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  268.128755] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  268.128826] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  268.128897] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  268.128972] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  268.129044] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  268.129119] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  268.129191] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  268.129263] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 000000000ace560b
[  268.129337] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  268.129411] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000000ace560b
[  268.129494] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  268.129542] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  268.129579] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000ace560b
[  268.129657] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000f37c832b to 000000000ace560b
[  268.129731] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000ace560b
[  268.129820] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000ace560b nonblocking
[  268.129937] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  268.130012] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  268.134565] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15687, diff=1, hw=0 hw_last=0
[  268.134668] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000ace560b
[  268.134743] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  268.134807] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  268.134881] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  268.134946] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  268.135008] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000ace560b
[  268.151139] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15688, diff=1, hw=0 hw_last=0
[  268.167721] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15689, diff=1, hw=0 hw_last=0
[  268.184297] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15690, diff=1, hw=0 hw_last=0
[  268.200878] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15691, diff=1, hw=0 hw_last=0
[  268.217458] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15692, diff=1, hw=0 hw_last=0
[  268.234037] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15693, diff=1, hw=0 hw_last=0
[  268.250615] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15694, diff=1, hw=0 hw_last=0
[  268.267197] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15695, diff=1, hw=0 hw_last=0
[  268.283776] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15696, diff=1, hw=0 hw_last=0
[  268.300353] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15697, diff=1, hw=0 hw_last=0
[  268.316930] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15698, diff=1, hw=0 hw_last=0
[  268.333509] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15699, diff=1, hw=0 hw_last=0
[  268.350087] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15700, diff=1, hw=0 hw_last=0
[  268.366666] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15701, diff=1, hw=0 hw_last=0
[  268.383245] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15702, diff=1, hw=0 hw_last=0
[  268.515884] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15710, diff=1, hw=0 hw_last=0
[  268.532463] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15711, diff=1, hw=0 hw_last=0
[  268.549041] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15712, diff=1, hw=0 hw_last=0
[  268.565620] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15713, diff=1, hw=0 hw_last=0
[  268.582202] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15714, diff=1, hw=0 hw_last=0
[  268.598779] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15715, diff=1, hw=0 hw_last=0
[  268.615356] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15716, diff=1, hw=0 hw_last=0
[  268.631937] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15717, diff=1, hw=0 hw_last=0
[  268.648518] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15718, diff=1, hw=0 hw_last=0
[  268.665096] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15719, diff=1, hw=0 hw_last=0
[  268.681674] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15720, diff=1, hw=0 hw_last=0
[  268.698253] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15721, diff=1, hw=0 hw_last=0
[  268.714835] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15722, diff=1, hw=0 hw_last=0
[  268.731416] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15723, diff=1, hw=0 hw_last=0
[  268.747995] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15724, diff=1, hw=0 hw_last=0
[  268.764571] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15725, diff=1, hw=0 hw_last=0
[  268.781153] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15726, diff=1, hw=0 hw_last=0
[  268.797730] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15727, diff=1, hw=0 hw_last=0
[  268.814308] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15728, diff=1, hw=0 hw_last=0
[  268.830891] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15729, diff=1, hw=0 hw_last=0
[  268.847471] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15730, diff=1, hw=0 hw_last=0
[  268.864048] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15731, diff=1, hw=0 hw_last=0
[  268.880624] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15732, diff=1, hw=0 hw_last=0
[  268.897206] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15733, diff=1, hw=0 hw_last=0
[  268.913785] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15734, diff=1, hw=0 hw_last=0
[  268.930361] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15735, diff=1, hw=0 hw_last=0
[  268.946945] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15736, diff=1, hw=0 hw_last=0
[  268.963523] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15737, diff=1, hw=0 hw_last=0
[  268.980102] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15738, diff=1, hw=0 hw_last=0
[  268.996681] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15739, diff=1, hw=0 hw_last=0
[  269.013260] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15740, diff=1, hw=0 hw_last=0
[  269.029840] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15741, diff=1, hw=0 hw_last=0
[  269.042783] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  269.042921] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 15742 to client
[  269.046423] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15742, diff=1, hw=0 hw_last=0
[  269.055209] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  269.055310] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000082174610
[  269.055394] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  269.055467] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000055579822 state to 0000000082174610
[  269.055546] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  269.055618] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a743c9a8 state to 0000000082174610
[  269.055698] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000055579822
[  269.055772] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  269.055843] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  269.055916] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  269.055989] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  269.056066] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  269.056138] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  269.056214] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  269.056285] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  269.056359] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 0000000082174610
[  269.056434] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  269.056507] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000082174610
[  269.056589] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  269.056638] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  269.056675] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000082174610
[  269.056754] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000008a640c91 to 0000000082174610
[  269.056828] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000082174610
[  269.056907] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  269.056980] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  269.057054] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  269.057136] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 0000000082174610
[  269.057211] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000082174610
[  269.057286] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  269.057358] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  269.057430] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  269.057503] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  269.057575] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000082174610
[  269.228794] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15753, diff=1, hw=0 hw_last=0
[  269.245372] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15754, diff=1, hw=0 hw_last=0
[  269.261950] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15755, diff=1, hw=0 hw_last=0
[  269.278527] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15756, diff=1, hw=0 hw_last=0
[  269.289847] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  269.289961] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000082174610
[  269.290050] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  269.290123] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000055579822 state to 0000000082174610
[  269.290200] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  269.290273] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a743c9a8 state to 0000000082174610
[  269.290353] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 0000000055579822
[  269.290427] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  269.290499] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  269.290571] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  269.290643] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  269.290718] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  269.290791] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  269.290904] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  269.290981] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  269.291055] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 0000000082174610
[  269.291131] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  269.291205] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000082174610
[  269.291287] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  269.291336] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  269.291373] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000082174610
[  269.291453] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000006c5644bb to 0000000082174610
[  269.291527] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000082174610
[  269.291616] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000082174610 nonblocking
[  269.291732] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  269.291803] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  269.295106] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15757, diff=1, hw=0 hw_last=0
[  269.295204] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000082174610
[  269.295276] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  269.295338] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  269.295400] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  269.295462] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  269.295523] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000082174610
[  269.311684] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15758, diff=1, hw=0 hw_last=0
[  269.328264] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15759, diff=1, hw=0 hw_last=0
[  269.344843] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15760, diff=1, hw=0 hw_last=0
[  269.361421] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15761, diff=1, hw=0 hw_last=0
[  269.378003] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15762, diff=1, hw=0 hw_last=0
[  269.394581] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15763, diff=1, hw=0 hw_last=0
[  269.411161] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15764, diff=1, hw=0 hw_last=0
[  269.427740] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15765, diff=1, hw=0 hw_last=0
[  269.444319] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15766, diff=1, hw=0 hw_last=0
[  269.460895] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15767, diff=1, hw=0 hw_last=0
[  269.477473] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15768, diff=1, hw=0 hw_last=0
[  269.494052] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15769, diff=1, hw=0 hw_last=0
[  269.510631] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15770, diff=1, hw=0 hw_last=0
[  269.527211] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15771, diff=1, hw=0 hw_last=0
[  269.543790] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15772, diff=1, hw=0 hw_last=0
[  269.560368] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15773, diff=1, hw=0 hw_last=0
[  269.576951] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15774, diff=1, hw=0 hw_last=0
[  269.593532] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15775, diff=1, hw=0 hw_last=0
[  269.610109] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15776, diff=1, hw=0 hw_last=0
[  269.626690] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15777, diff=1, hw=0 hw_last=0
[  269.643268] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15778, diff=1, hw=0 hw_last=0
[  269.659849] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15779, diff=1, hw=0 hw_last=0
[  269.676426] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15780, diff=1, hw=0 hw_last=0
[  269.693007] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15781, diff=1, hw=0 hw_last=0
[  269.709584] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15782, diff=1, hw=0 hw_last=0
[  269.726165] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15783, diff=1, hw=0 hw_last=0
[  269.742744] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15784, diff=1, hw=0 hw_last=0
[  269.759322] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15785, diff=1, hw=0 hw_last=0
[  269.775901] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15786, diff=1, hw=0 hw_last=0
[  269.792480] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15787, diff=1, hw=0 hw_last=0
[  270.240128] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15814, diff=1, hw=0 hw_last=0
[  270.256702] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15815, diff=1, hw=0 hw_last=0
[  270.273284] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15816, diff=1, hw=0 hw_last=0
[  270.289861] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15817, diff=1, hw=0 hw_last=0
[  270.306445] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15818, diff=1, hw=0 hw_last=0
[  270.323020] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15819, diff=1, hw=0 hw_last=0
[  270.339601] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15820, diff=1, hw=0 hw_last=0
[  270.356180] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15821, diff=1, hw=0 hw_last=0
[  270.372758] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15822, diff=1, hw=0 hw_last=0
[  270.389338] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15823, diff=1, hw=0 hw_last=0
[  270.405915] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15824, diff=1, hw=0 hw_last=0
[  270.422499] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15825, diff=1, hw=0 hw_last=0
[  270.422858] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  270.422964] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000001477df7c
[  270.423051] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  270.423124] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000087081e28 state to 000000001477df7c
[  270.423204] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  270.423278] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 000000001477df7c
[  270.423359] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000087081e28
[  270.423433] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  270.423505] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  270.423576] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  270.423648] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  270.423722] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  270.423794] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  270.423869] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  270.423940] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  270.424012] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000001477df7c
[  270.424086] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  270.424160] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000001477df7c
[  270.424243] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  270.424289] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  270.424325] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000001477df7c
[  270.424405] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000008a640c91 to 000000001477df7c
[  270.424482] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000001477df7c
[  270.424577] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000001477df7c nonblocking
[  270.424689] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  270.424774] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  270.439072] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15826, diff=1, hw=0 hw_last=0
[  270.439192] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000001477df7c
[  270.439274] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  270.439348] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  270.439422] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  270.439495] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  270.439569] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000001477df7c
[  270.455649] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15827, diff=1, hw=0 hw_last=0
[  270.472229] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15828, diff=1, hw=0 hw_last=0
[  270.488806] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15829, diff=1, hw=0 hw_last=0
[  270.505385] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15830, diff=1, hw=0 hw_last=0
[  270.521964] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15831, diff=1, hw=0 hw_last=0
[  270.538546] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15832, diff=1, hw=0 hw_last=0
[  270.555123] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15833, diff=1, hw=0 hw_last=0
[  270.571703] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15834, diff=1, hw=0 hw_last=0
[  270.588283] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15835, diff=1, hw=0 hw_last=0
[  270.604862] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15836, diff=1, hw=0 hw_last=0
[  270.621439] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15837, diff=1, hw=0 hw_last=0
[  270.638017] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15838, diff=1, hw=0 hw_last=0
[  270.654596] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15839, diff=1, hw=0 hw_last=0
[  270.671175] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15840, diff=1, hw=0 hw_last=0
[  270.687754] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15841, diff=1, hw=0 hw_last=0
[  270.704333] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15842, diff=1, hw=0 hw_last=0
[  270.720913] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15843, diff=1, hw=0 hw_last=0
[  270.737495] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15844, diff=1, hw=0 hw_last=0
[  270.754073] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15845, diff=1, hw=0 hw_last=0
[  270.770651] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15846, diff=1, hw=0 hw_last=0
[  270.787230] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15847, diff=1, hw=0 hw_last=0
[  270.803809] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15848, diff=1, hw=0 hw_last=0
[  271.228109] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  271.228181] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 0000000029aaf162
[  271.228261] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 000000002cafbe1b
[  271.228334] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  271.228406] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  271.228477] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  271.228549] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  271.228624] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  271.228696] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  271.228772] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  271.228845] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  271.228916] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 0000000029aaf162
[  271.228990] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  271.229062] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000029aaf162
[  271.229144] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  271.229194] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  271.229230] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000029aaf162
[  271.229309] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000000ace560b to 0000000029aaf162
[  271.229382] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000029aaf162
[  271.229460] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  271.229532] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  271.229606] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  271.229688] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 0000000029aaf162
[  271.229763] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000029aaf162
[  271.229836] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  271.229908] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  271.229980] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  271.230052] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  271.230124] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000029aaf162
[  271.231612] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  271.234874] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15874, diff=1, hw=0 hw_last=0
[  271.251453] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15875, diff=1, hw=0 hw_last=0
[  271.268033] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15876, diff=1, hw=0 hw_last=0
[  271.284610] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15877, diff=1, hw=0 hw_last=0
[  271.301191] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15878, diff=1, hw=0 hw_last=0
[  271.317771] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15879, diff=1, hw=0 hw_last=0
[  271.334350] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15880, diff=1, hw=0 hw_last=0
[  271.350929] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15881, diff=1, hw=0 hw_last=0
[  271.367511] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15882, diff=1, hw=0 hw_last=0
[  271.384088] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15883, diff=1, hw=0 hw_last=0
[  271.400671] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15884, diff=1, hw=0 hw_last=0
[  271.417246] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15885, diff=1, hw=0 hw_last=0
[  271.433825] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15886, diff=1, hw=0 hw_last=0
[  271.450402] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15887, diff=1, hw=0 hw_last=0
[  271.461172] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  271.461293] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000029aaf162
[  271.461379] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  271.461452] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000002cafbe1b state to 0000000029aaf162
[  271.461531] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  271.461603] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 0000000029aaf162
[  271.461683] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 000000002cafbe1b
[  271.461758] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  271.461829] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  271.461900] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  271.461971] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  271.462046] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  271.462117] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  271.462192] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  271.462264] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  271.462335] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 0000000029aaf162
[  271.462410] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  271.462483] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000029aaf162
[  271.462566] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  271.462612] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  271.462650] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000029aaf162
[  271.462729] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000eae20a14 to 0000000029aaf162
[  271.462842] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000029aaf162
[  271.462936] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000029aaf162 nonblocking
[  271.463050] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  271.463132] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  271.466980] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15888, diff=1, hw=0 hw_last=0
[  271.467083] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000029aaf162
[  271.467157] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  271.467222] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  271.467285] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  271.467347] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  271.467410] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000029aaf162
[  271.483559] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15889, diff=1, hw=0 hw_last=0
[  271.500139] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15890, diff=1, hw=0 hw_last=0
[  271.516717] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15891, diff=1, hw=0 hw_last=0
[  271.533297] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15892, diff=1, hw=0 hw_last=0
[  271.549878] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15893, diff=1, hw=0 hw_last=0
[  271.566455] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15894, diff=1, hw=0 hw_last=0
[  271.583034] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15895, diff=1, hw=0 hw_last=0
[  271.599621] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15896, diff=1, hw=0 hw_last=0
[  271.616195] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15897, diff=1, hw=0 hw_last=0
[  271.632770] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15898, diff=1, hw=0 hw_last=0
[  271.649348] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15899, diff=1, hw=0 hw_last=0
[  271.665927] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15900, diff=1, hw=0 hw_last=0
[  271.682506] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15901, diff=1, hw=0 hw_last=0
[  271.699085] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15902, diff=1, hw=0 hw_last=0
[  271.715665] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15903, diff=1, hw=0 hw_last=0
[  271.732243] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15904, diff=1, hw=0 hw_last=0
[  271.748826] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15905, diff=1, hw=0 hw_last=0
[  271.765405] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15906, diff=1, hw=0 hw_last=0
[  271.781983] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15907, diff=1, hw=0 hw_last=0
[  271.798561] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15908, diff=1, hw=0 hw_last=0
[  271.815142] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15909, diff=1, hw=0 hw_last=0
[  271.831722] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15910, diff=1, hw=0 hw_last=0
[  271.848299] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15911, diff=1, hw=0 hw_last=0
[  271.864880] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15912, diff=1, hw=0 hw_last=0
[  271.881458] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15913, diff=1, hw=0 hw_last=0
[  271.898037] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15914, diff=1, hw=0 hw_last=0
[  271.914618] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15915, diff=1, hw=0 hw_last=0
[  271.931196] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15916, diff=1, hw=0 hw_last=0
[  271.947775] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15917, diff=1, hw=0 hw_last=0
[  271.964352] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15918, diff=1, hw=0 hw_last=0
[  271.980936] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15919, diff=1, hw=0 hw_last=0
[  271.997515] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15920, diff=1, hw=0 hw_last=0
[  272.014091] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15921, diff=1, hw=0 hw_last=0
[  272.030671] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15922, diff=1, hw=0 hw_last=0
[  272.047250] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15923, diff=1, hw=0 hw_last=0
[  272.063829] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15924, diff=1, hw=0 hw_last=0
[  272.080408] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15925, diff=1, hw=0 hw_last=0
[  272.096990] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15926, diff=1, hw=0 hw_last=0
[  272.113567] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15927, diff=1, hw=0 hw_last=0
[  272.130147] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15928, diff=1, hw=0 hw_last=0
[  272.146726] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15929, diff=1, hw=0 hw_last=0
[  272.163305] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15930, diff=1, hw=0 hw_last=0
[  272.179882] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15931, diff=1, hw=0 hw_last=0
[  272.196462] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15932, diff=1, hw=0 hw_last=0
[  272.213048] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15933, diff=1, hw=0 hw_last=0
[  272.215668] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  272.215792] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 15934 to client
[  272.222061] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  272.222168] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000c0cf118d
[  272.222250] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  272.222323] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000215b6887 state to 00000000c0cf118d
[  272.222400] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  272.222472] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 00000000c0cf118d
[  272.222552] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000215b6887
[  272.222626] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  272.222697] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  272.222768] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  272.222861] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  272.222940] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  272.223014] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  272.223089] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  272.223160] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  272.223232] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 00000000c0cf118d
[  272.223306] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  272.223380] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000c0cf118d
[  272.225803] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  272.228894] systemd-journald[214]: Data hash table of /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal has a fill level at 75.0 (2731 of 3640 items, 2097152 file size, 767 bytes per hash table item), suggesting rotation.
[  272.229627] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15934, diff=1, hw=0 hw_last=0
[  272.254315] systemd-journald[214]: /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal: Journal header limits reached or header out-of-date, rotating.
[  272.254314] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15935, diff=1, hw=0 hw_last=0
[  272.274438] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15936, diff=1, hw=0 hw_last=0
[  272.279365] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15937, diff=1, hw=0 hw_last=0
[  272.295949] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15938, diff=1, hw=0 hw_last=0
[  272.312524] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15939, diff=1, hw=0 hw_last=0
[  272.329102] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15940, diff=1, hw=0 hw_last=0
[  272.345681] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15941, diff=1, hw=0 hw_last=0
[  272.362262] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15942, diff=1, hw=0 hw_last=0
[  272.378843] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15943, diff=1, hw=0 hw_last=0
[  272.395419] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15944, diff=1, hw=0 hw_last=0
[  272.411999] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15945, diff=1, hw=0 hw_last=0
[  272.428577] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15946, diff=1, hw=0 hw_last=0
[  272.445156] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15947, diff=1, hw=0 hw_last=0
[  272.446388] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  272.446500] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000c0cf118d
[  272.446586] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  272.446659] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000215b6887 state to 00000000c0cf118d
[  272.446738] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  272.446846] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 00000000c0cf118d
[  272.446929] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000215b6887
[  272.447006] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  272.447078] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  272.447150] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  272.447222] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  272.447299] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  272.447371] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  272.447448] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  272.447522] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  272.447594] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 00000000c0cf118d
[  272.447671] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  272.447747] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000c0cf118d
[  272.447830] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  272.447877] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  272.447914] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000c0cf118d
[  272.447994] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000071ef6b0b to 00000000c0cf118d
[  272.448068] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000c0cf118d
[  272.448159] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000c0cf118d nonblocking
[  272.448270] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  272.448345] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  272.461732] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15948, diff=1, hw=0 hw_last=0
[  272.461836] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000c0cf118d
[  272.461915] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  272.461978] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  272.462039] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  272.462100] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  272.462163] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000c0cf118d
[  272.478310] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15949, diff=1, hw=0 hw_last=0
[  272.494889] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15950, diff=1, hw=0 hw_last=0
[  272.511469] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15951, diff=1, hw=0 hw_last=0
[  272.528048] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15952, diff=1, hw=0 hw_last=0
[  272.544626] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15953, diff=1, hw=0 hw_last=0
[  272.561206] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15954, diff=1, hw=0 hw_last=0
[  272.577784] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15955, diff=1, hw=0 hw_last=0
[  272.594364] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15956, diff=1, hw=0 hw_last=0
[  272.610948] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15957, diff=1, hw=0 hw_last=0
[  272.627526] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15958, diff=1, hw=0 hw_last=0
[  272.644102] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15959, diff=1, hw=0 hw_last=0
[  272.660679] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15960, diff=1, hw=0 hw_last=0
[  272.677258] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15961, diff=1, hw=0 hw_last=0
[  272.693837] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15962, diff=1, hw=0 hw_last=0
[  272.710416] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15963, diff=1, hw=0 hw_last=0
[  272.726996] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15964, diff=1, hw=0 hw_last=0
[  272.743574] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15965, diff=1, hw=0 hw_last=0
[  272.876210] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15973, diff=1, hw=0 hw_last=0
[  272.892792] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15974, diff=1, hw=0 hw_last=0
[  272.909367] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15975, diff=1, hw=0 hw_last=0
[  272.925950] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15976, diff=1, hw=0 hw_last=0
[  272.942528] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15977, diff=1, hw=0 hw_last=0
[  272.959107] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15978, diff=1, hw=0 hw_last=0
[  272.975687] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15979, diff=1, hw=0 hw_last=0
[  272.992265] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15980, diff=1, hw=0 hw_last=0
[  273.008845] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15981, diff=1, hw=0 hw_last=0
[  273.025422] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15982, diff=1, hw=0 hw_last=0
[  273.042002] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15983, diff=1, hw=0 hw_last=0
[  273.058581] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15984, diff=1, hw=0 hw_last=0
[  273.075162] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15985, diff=1, hw=0 hw_last=0
[  273.091741] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15986, diff=1, hw=0 hw_last=0
[  273.108321] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15987, diff=1, hw=0 hw_last=0
[  273.124899] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15988, diff=1, hw=0 hw_last=0
[  273.141478] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15989, diff=1, hw=0 hw_last=0
[  273.158057] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15990, diff=1, hw=0 hw_last=0
[  273.174636] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15991, diff=1, hw=0 hw_last=0
[  273.191217] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15992, diff=1, hw=0 hw_last=0
[  273.207796] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15993, diff=1, hw=0 hw_last=0
[  273.224375] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15994, diff=1, hw=0 hw_last=0
[  273.237452] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  273.237572] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 15995 to client
[  273.240956] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15995, diff=1, hw=0 hw_last=0
[  273.249855] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  273.249957] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000ab379aee
[  273.250041] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  273.250115] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000bac3ec2d state to 00000000ab379aee
[  273.250192] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  273.250265] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000e8543c49 state to 00000000ab379aee
[  273.250345] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000bac3ec2d
[  273.250419] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  273.250491] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  273.250563] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  273.250635] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  273.250712] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  273.250800] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  273.250881] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  273.250955] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  273.251027] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 00000000ab379aee
[  273.251103] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  273.251176] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000ab379aee
[  273.251258] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  273.251306] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  273.251343] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000ab379aee
[  273.251424] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000c0cf118d to 00000000ab379aee
[  273.251498] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000ab379aee
[  273.251577] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  273.251650] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  273.251724] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  273.251806] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 00000000ab379aee
[  273.251882] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ab379aee
[  273.251956] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  273.252028] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  273.252101] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  273.252173] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  273.252246] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ab379aee
[  273.253701] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  273.257535] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15996, diff=1, hw=0 hw_last=0
[  273.274114] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15997, diff=1, hw=0 hw_last=0
[  273.290694] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15998, diff=1, hw=0 hw_last=0
[  273.307275] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=15999, diff=1, hw=0 hw_last=0
[  273.323855] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16000, diff=1, hw=0 hw_last=0
[  273.340432] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16001, diff=1, hw=0 hw_last=0
[  273.357012] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16002, diff=1, hw=0 hw_last=0
[  273.373591] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16003, diff=1, hw=0 hw_last=0
[  273.390174] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16004, diff=1, hw=0 hw_last=0
[  273.480825] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000ab379aee
[  273.480913] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  273.480986] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000bac3ec2d state to 00000000ab379aee
[  273.481065] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  273.481137] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000e8543c49 state to 00000000ab379aee
[  273.481217] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000bac3ec2d
[  273.481291] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  273.481363] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  273.481434] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  273.481506] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  273.481580] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  273.481651] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  273.481727] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  273.481799] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  273.481871] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 00000000ab379aee
[  273.481948] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  273.482021] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000ab379aee
[  273.482104] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  273.482151] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  273.482188] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000ab379aee
[  273.482267] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000006fb5b2d2 to 00000000ab379aee
[  273.482341] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000ab379aee
[  273.482427] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000ab379aee nonblocking
[  273.482540] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  273.482612] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  273.489642] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16010, diff=1, hw=0 hw_last=0
[  273.489743] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ab379aee
[  273.489821] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  273.489883] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  273.489945] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  273.490007] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  273.490069] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ab379aee
[  273.506221] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16011, diff=1, hw=0 hw_last=0
[  273.522800] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16012, diff=1, hw=0 hw_last=0
[  273.539380] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16013, diff=1, hw=0 hw_last=0
[  273.555958] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16014, diff=1, hw=0 hw_last=0
[  273.572539] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16015, diff=1, hw=0 hw_last=0
[  273.589116] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16016, diff=1, hw=0 hw_last=0
[  273.605696] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16017, diff=1, hw=0 hw_last=0
[  273.622277] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16018, diff=1, hw=0 hw_last=0
[  273.638857] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16019, diff=1, hw=0 hw_last=0
[  273.655433] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16020, diff=1, hw=0 hw_last=0
[  273.672010] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16021, diff=1, hw=0 hw_last=0
[  273.688589] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16022, diff=1, hw=0 hw_last=0
[  273.705169] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16023, diff=1, hw=0 hw_last=0
[  273.721748] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16024, diff=1, hw=0 hw_last=0
[  273.738327] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16025, diff=1, hw=0 hw_last=0
[  273.754906] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16026, diff=1, hw=0 hw_last=0
[  273.771487] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16027, diff=1, hw=0 hw_last=0
[  273.788068] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16028, diff=1, hw=0 hw_last=0
[  273.804647] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16029, diff=1, hw=0 hw_last=0
[  273.821226] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16030, diff=1, hw=0 hw_last=0
[  273.837807] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16031, diff=1, hw=0 hw_last=0
[  273.854384] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16032, diff=1, hw=0 hw_last=0
[  273.870963] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16033, diff=1, hw=0 hw_last=0
[  273.887543] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16034, diff=1, hw=0 hw_last=0
[  273.904121] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16035, diff=1, hw=0 hw_last=0
[  273.920701] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16036, diff=1, hw=0 hw_last=0
[  273.937280] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16037, diff=1, hw=0 hw_last=0
[  273.953859] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16038, diff=1, hw=0 hw_last=0
[  273.970437] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16039, diff=1, hw=0 hw_last=0
[  273.987017] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16040, diff=1, hw=0 hw_last=0
[  274.003597] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16041, diff=1, hw=0 hw_last=0
[  274.020175] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16042, diff=1, hw=0 hw_last=0
[  274.036754] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16043, diff=1, hw=0 hw_last=0
[  274.053333] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16044, diff=1, hw=0 hw_last=0
[  274.069913] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16045, diff=1, hw=0 hw_last=0
[  274.476046] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000fde3661d
[  274.476135] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  274.476208] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000003519e999 state to 00000000fde3661d
[  274.476286] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  274.476359] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 00000000fde3661d
[  274.476440] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 000000003519e999
[  274.476514] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  274.476585] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  274.476656] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  274.476727] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  274.476802] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  274.476873] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  274.476949] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  274.477020] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  274.477091] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 00000000fde3661d
[  274.477166] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  274.477239] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000fde3661d
[  274.477322] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  274.477371] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  274.477408] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000fde3661d
[  274.477488] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000000ace560b to 00000000fde3661d
[  274.477562] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000fde3661d
[  274.477649] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000fde3661d nonblocking
[  274.477758] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  274.477826] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  274.484395] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16070, diff=1, hw=0 hw_last=0
[  274.484502] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000fde3661d
[  274.484576] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  274.484638] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  274.484699] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  274.484763] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  274.484825] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000fde3661d
[  274.500973] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16071, diff=1, hw=0 hw_last=0
[  274.517553] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16072, diff=1, hw=0 hw_last=0
[  274.534130] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16073, diff=1, hw=0 hw_last=0
[  274.550710] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16074, diff=1, hw=0 hw_last=0
[  274.567288] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16075, diff=1, hw=0 hw_last=0
[  274.583870] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16076, diff=1, hw=0 hw_last=0
[  274.600448] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16077, diff=1, hw=0 hw_last=0
[  274.617027] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16078, diff=1, hw=0 hw_last=0
[  274.633609] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16079, diff=1, hw=0 hw_last=0
[  274.650188] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16080, diff=1, hw=0 hw_last=0
[  274.666766] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16081, diff=1, hw=0 hw_last=0
[  274.683342] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16082, diff=1, hw=0 hw_last=0
[  274.699921] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16083, diff=1, hw=0 hw_last=0
[  274.716499] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16084, diff=1, hw=0 hw_last=0
[  274.733079] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16085, diff=1, hw=0 hw_last=0
[  274.749658] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16086, diff=1, hw=0 hw_last=0
[  274.766238] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16087, diff=1, hw=0 hw_last=0
[  274.782819] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16088, diff=1, hw=0 hw_last=0
[  274.799399] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16089, diff=1, hw=0 hw_last=0
[  274.815978] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16090, diff=1, hw=0 hw_last=0
[  274.832556] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16091, diff=1, hw=0 hw_last=0
[  274.849135] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16092, diff=1, hw=0 hw_last=0
[  274.865715] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16093, diff=1, hw=0 hw_last=0
[  274.882294] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16094, diff=1, hw=0 hw_last=0
[  274.898871] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16095, diff=1, hw=0 hw_last=0
[  274.915453] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16096, diff=1, hw=0 hw_last=0
[  274.932032] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16097, diff=1, hw=0 hw_last=0
[  274.948610] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16098, diff=1, hw=0 hw_last=0
[  274.965189] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16099, diff=1, hw=0 hw_last=0
[  274.981768] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16100, diff=1, hw=0 hw_last=0
[  274.998348] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16101, diff=1, hw=0 hw_last=0
[  275.014928] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16102, diff=1, hw=0 hw_last=0
[  275.031505] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16103, diff=1, hw=0 hw_last=0
[  275.048086] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16104, diff=1, hw=0 hw_last=0
[  275.064666] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16105, diff=1, hw=0 hw_last=0
[  275.308356] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  275.308428] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  275.308500] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  275.308572] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  275.308644] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000095dd8ec0
[  275.310033] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  275.313360] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16120, diff=1, hw=0 hw_last=0
[  275.329936] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16121, diff=1, hw=0 hw_last=0
[  275.346515] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16122, diff=1, hw=0 hw_last=0
[  275.363094] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16123, diff=1, hw=0 hw_last=0
[  275.379675] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16124, diff=1, hw=0 hw_last=0
[  275.396255] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16125, diff=1, hw=0 hw_last=0
[  275.412831] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16126, diff=1, hw=0 hw_last=0
[  275.429413] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16127, diff=1, hw=0 hw_last=0
[  275.445992] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16128, diff=1, hw=0 hw_last=0
[  275.462572] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16129, diff=1, hw=0 hw_last=0
[  275.479149] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16130, diff=1, hw=0 hw_last=0
[  275.495730] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16131, diff=1, hw=0 hw_last=0
[  275.512306] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16132, diff=1, hw=0 hw_last=0
[  275.528885] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16133, diff=1, hw=0 hw_last=0
[  275.537547] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  275.537668] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000095dd8ec0
[  275.537755] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  275.537829] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000fefb5c61 state to 0000000095dd8ec0
[  275.537907] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  275.537980] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000adb7ad91 state to 0000000095dd8ec0
[  275.538061] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000fefb5c61
[  275.538135] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  275.538206] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  275.538277] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  275.538349] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  275.538424] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  275.538495] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  275.538569] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  275.538640] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  275.538712] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 0000000095dd8ec0
[  275.538823] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  275.538902] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000095dd8ec0
[  275.538986] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  275.539032] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  275.539070] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000095dd8ec0
[  275.539149] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000082174610 to 0000000095dd8ec0
[  275.539223] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000095dd8ec0
[  275.539311] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000095dd8ec0 nonblocking
[  275.539421] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  275.539495] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  275.545463] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16134, diff=1, hw=0 hw_last=0
[  275.545564] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000095dd8ec0
[  275.545639] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  275.545701] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  275.545762] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  275.545825] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  275.545886] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000095dd8ec0
[  275.562041] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16135, diff=1, hw=0 hw_last=0
[  275.578620] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16136, diff=1, hw=0 hw_last=0
[  275.595200] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16137, diff=1, hw=0 hw_last=0
[  275.611779] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16138, diff=1, hw=0 hw_last=0
[  275.628357] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16139, diff=1, hw=0 hw_last=0
[  275.644938] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16140, diff=1, hw=0 hw_last=0
[  275.661516] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16141, diff=1, hw=0 hw_last=0
[  275.678096] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16142, diff=1, hw=0 hw_last=0
[  275.694678] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16143, diff=1, hw=0 hw_last=0
[  275.711256] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16144, diff=1, hw=0 hw_last=0
[  275.727832] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16145, diff=1, hw=0 hw_last=0
[  275.744411] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16146, diff=1, hw=0 hw_last=0
[  275.760989] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16147, diff=1, hw=0 hw_last=0
[  275.777568] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16148, diff=1, hw=0 hw_last=0
[  275.794148] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16149, diff=1, hw=0 hw_last=0
[  275.810727] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16150, diff=1, hw=0 hw_last=0
[  275.827306] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16151, diff=1, hw=0 hw_last=0
[  275.843888] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16152, diff=1, hw=0 hw_last=0
[  275.860466] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16153, diff=1, hw=0 hw_last=0
[  275.877047] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16154, diff=1, hw=0 hw_last=0
[  275.893625] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16155, diff=1, hw=0 hw_last=0
[  275.910203] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16156, diff=1, hw=0 hw_last=0
[  275.926786] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16157, diff=1, hw=0 hw_last=0
[  275.943364] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16158, diff=1, hw=0 hw_last=0
[  275.959941] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16159, diff=1, hw=0 hw_last=0
[  275.976521] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16160, diff=1, hw=0 hw_last=0
[  275.993101] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16161, diff=1, hw=0 hw_last=0
[  276.009680] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16162, diff=1, hw=0 hw_last=0
[  276.026258] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16163, diff=1, hw=0 hw_last=0
[  276.042838] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16164, diff=1, hw=0 hw_last=0
[  276.059418] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16165, diff=1, hw=0 hw_last=0
[  276.075997] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16166, diff=1, hw=0 hw_last=0
[  276.092576] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16167, diff=1, hw=0 hw_last=0
[  276.109156] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16168, diff=1, hw=0 hw_last=0
[  276.125734] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16169, diff=1, hw=0 hw_last=0
[  276.142313] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16170, diff=1, hw=0 hw_last=0
[  276.158892] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16171, diff=1, hw=0 hw_last=0
[  276.175474] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16172, diff=1, hw=0 hw_last=0
[  276.192051] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16173, diff=1, hw=0 hw_last=0
[  276.208629] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16174, diff=1, hw=0 hw_last=0
[  276.225209] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16175, diff=1, hw=0 hw_last=0
[  276.241788] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16176, diff=1, hw=0 hw_last=0
[  276.258367] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16177, diff=1, hw=0 hw_last=0
[  276.274948] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16178, diff=1, hw=0 hw_last=0
[  276.291526] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16179, diff=1, hw=0 hw_last=0
[  276.308107] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16180, diff=1, hw=0 hw_last=0
[  276.324684] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16181, diff=1, hw=0 hw_last=0
[  276.341262] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16182, diff=1, hw=0 hw_last=0
[  276.357846] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16183, diff=1, hw=0 hw_last=0
[  276.364456] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  276.364582] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 16184 to client
[  276.366915] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  276.367027] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008e9f664b
[  276.367113] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  276.367187] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000055579822 state to 000000008e9f664b
[  276.367267] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  276.367341] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 000000008e9f664b
[  276.367420] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 0000000055579822
[  276.367496] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  276.367568] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  276.367640] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  276.367712] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  276.367788] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  276.367861] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  276.367936] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  276.368008] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  276.368080] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000008e9f664b
[  276.368155] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  276.368228] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000008e9f664b
[  276.368311] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  276.368357] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  276.368393] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008e9f664b
[  276.368473] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000095dd8ec0 to 000000008e9f664b
[  276.368547] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008e9f664b
[  276.368625] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  276.368699] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  276.368773] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  276.368854] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000008e9f664b
[  276.368929] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008e9f664b
[  276.369002] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  276.369074] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  276.369146] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  276.369218] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  276.369291] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008e9f664b
[  276.370657] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  276.374428] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16184, diff=1, hw=0 hw_last=0
[  276.573375] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16196, diff=1, hw=0 hw_last=0
[  276.589957] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16197, diff=1, hw=0 hw_last=0
[  276.599307] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  276.599426] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008e9f664b
[  276.599513] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  276.599587] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000055579822 state to 000000008e9f664b
[  276.599664] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  276.599736] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 000000008e9f664b
[  276.599815] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000055579822
[  276.599891] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  276.599962] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  276.600034] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  276.600105] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  276.600179] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  276.600250] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  276.600325] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  276.600397] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  276.600468] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000008e9f664b
[  276.600543] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  276.600617] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000008e9f664b
[  276.600699] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  276.600749] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  276.600785] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008e9f664b
[  276.600864] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000001477df7c to 000000008e9f664b
[  276.600938] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008e9f664b
[  276.601025] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000008e9f664b nonblocking
[  276.601138] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  276.601212] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  276.606531] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16198, diff=1, hw=0 hw_last=0
[  276.606634] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008e9f664b
[  276.606728] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  276.606794] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  276.606856] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  276.606918] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  276.606983] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008e9f664b
[  276.623112] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16199, diff=1, hw=0 hw_last=0
[  276.639689] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16200, diff=1, hw=0 hw_last=0
[  276.656267] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16201, diff=1, hw=0 hw_last=0
[  276.672847] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16202, diff=1, hw=0 hw_last=0
[  276.689427] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16203, diff=1, hw=0 hw_last=0
[  276.706005] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16204, diff=1, hw=0 hw_last=0
[  276.722585] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16205, diff=1, hw=0 hw_last=0
[  276.739165] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16206, diff=1, hw=0 hw_last=0
[  276.755744] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16207, diff=1, hw=0 hw_last=0
[  276.772324] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16208, diff=1, hw=0 hw_last=0
[  276.788901] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16209, diff=1, hw=0 hw_last=0
[  276.805479] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16210, diff=1, hw=0 hw_last=0
[  276.822059] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16211, diff=1, hw=0 hw_last=0
[  276.838638] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16212, diff=1, hw=0 hw_last=0
[  276.855218] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16213, diff=1, hw=0 hw_last=0
[  276.871796] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16214, diff=1, hw=0 hw_last=0
[  276.888375] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16215, diff=1, hw=0 hw_last=0
[  276.904954] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16216, diff=1, hw=0 hw_last=0
[  276.921536] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16217, diff=1, hw=0 hw_last=0
[  276.938116] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16218, diff=1, hw=0 hw_last=0
[  276.954696] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16219, diff=1, hw=0 hw_last=0
[  276.971275] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16220, diff=1, hw=0 hw_last=0
[  276.987853] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16221, diff=1, hw=0 hw_last=0
[  277.004430] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16222, diff=1, hw=0 hw_last=0
[  277.021010] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16223, diff=1, hw=0 hw_last=0
[  277.037588] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16224, diff=1, hw=0 hw_last=0
[  277.054167] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16225, diff=1, hw=0 hw_last=0
[  277.070750] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16226, diff=1, hw=0 hw_last=0
[  277.087327] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16227, diff=1, hw=0 hw_last=0
[  277.103905] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16228, diff=1, hw=0 hw_last=0
[  277.120486] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16229, diff=1, hw=0 hw_last=0
[  277.137063] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16230, diff=1, hw=0 hw_last=0
[  277.286277] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16239, diff=1, hw=0 hw_last=0
[  277.302857] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16240, diff=1, hw=0 hw_last=0
[  277.319436] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16241, diff=1, hw=0 hw_last=0
[  277.336015] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16242, diff=1, hw=0 hw_last=0
[  277.352595] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16243, diff=1, hw=0 hw_last=0
[  277.363516] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  277.363640] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 16244 to client
[  277.369177] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16244, diff=1, hw=0 hw_last=0
[  277.378920] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  277.379021] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e0dcab9c
[  277.379108] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  277.379183] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000087081e28 state to 00000000e0dcab9c
[  277.379261] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  277.379334] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000e8543c49 state to 00000000e0dcab9c
[  277.379413] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000087081e28
[  277.379494] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  277.379572] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  277.379643] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  277.379715] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  277.379791] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  277.379862] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  277.379937] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  277.380008] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  277.380080] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 00000000e0dcab9c
[  277.380154] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  277.380226] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000e0dcab9c
[  277.380308] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  277.380356] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  277.380392] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000e0dcab9c
[  277.380471] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000fde3661d to 00000000e0dcab9c
[  277.380545] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000e0dcab9c
[  277.380623] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  277.380695] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  277.380768] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  277.380849] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 00000000e0dcab9c
[  277.380924] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e0dcab9c
[  277.380996] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  277.381068] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  277.381140] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  277.381211] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  277.381283] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e0dcab9c
[  277.382688] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  277.385760] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16245, diff=1, hw=0 hw_last=0
[  277.402336] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16246, diff=1, hw=0 hw_last=0
[  277.418916] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16247, diff=1, hw=0 hw_last=0
[  277.435494] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16248, diff=1, hw=0 hw_last=0
[  277.452077] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16249, diff=1, hw=0 hw_last=0
[  277.468654] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16250, diff=1, hw=0 hw_last=0
[  277.485232] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16251, diff=1, hw=0 hw_last=0
[  277.501812] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16252, diff=1, hw=0 hw_last=0
[  277.518394] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16253, diff=1, hw=0 hw_last=0
[  277.534973] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16254, diff=1, hw=0 hw_last=0
[  277.551551] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16255, diff=1, hw=0 hw_last=0
[  277.568128] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16256, diff=1, hw=0 hw_last=0
[  277.584708] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16257, diff=1, hw=0 hw_last=0
[  277.601286] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16258, diff=1, hw=0 hw_last=0
[  277.610381] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  277.610497] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e0dcab9c
[  277.610584] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  277.610658] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000087081e28 state to 00000000e0dcab9c
[  277.610770] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  277.610847] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000e8543c49 state to 00000000e0dcab9c
[  277.610934] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 0000000087081e28
[  277.611010] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  277.611083] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  277.611155] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  277.611228] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  277.611305] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  277.611377] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  277.611453] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  277.611524] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  277.611597] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 00000000e0dcab9c
[  277.611673] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  277.611747] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000e0dcab9c
[  277.611831] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  277.611880] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  277.612339] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  277.617862] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16259, diff=1, hw=0 hw_last=0
[  277.617962] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e0dcab9c
[  277.618037] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  277.618100] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  277.618161] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  277.618223] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  277.618286] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e0dcab9c
[  277.634444] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16260, diff=1, hw=0 hw_last=0
[  277.651021] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16261, diff=1, hw=0 hw_last=0
[  277.667599] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16262, diff=1, hw=0 hw_last=0
[  277.684179] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16263, diff=1, hw=0 hw_last=0
[  277.700758] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16264, diff=1, hw=0 hw_last=0
[  277.717338] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16265, diff=1, hw=0 hw_last=0
[  277.733926] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16266, diff=1, hw=0 hw_last=0
[  277.750502] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16267, diff=1, hw=0 hw_last=0
[  277.767078] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16268, diff=1, hw=0 hw_last=0
[  277.783656] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16269, diff=1, hw=0 hw_last=0
[  277.800234] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16270, diff=1, hw=0 hw_last=0
[  277.816810] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16271, diff=1, hw=0 hw_last=0
[  277.833390] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16272, diff=1, hw=0 hw_last=0
[  277.849969] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16273, diff=1, hw=0 hw_last=0
[  277.866549] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16274, diff=1, hw=0 hw_last=0
[  277.883128] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16275, diff=1, hw=0 hw_last=0
[  277.899706] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16276, diff=1, hw=0 hw_last=0
[  277.916286] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16277, diff=1, hw=0 hw_last=0
[  277.932869] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16278, diff=1, hw=0 hw_last=0
[  277.949446] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16279, diff=1, hw=0 hw_last=0
[  277.966026] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16280, diff=1, hw=0 hw_last=0
[  277.982603] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16281, diff=1, hw=0 hw_last=0
[  277.999182] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16282, diff=1, hw=0 hw_last=0
[  278.015760] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16283, diff=1, hw=0 hw_last=0
[  278.016172] systemd-journald[214]: Data hash table of /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal has a fill level at 75.1 (2732 of 3640 items, 2097152 file size, 767 bytes per hash table item), suggesting rotation.
[  278.032341] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16284, diff=1, hw=0 hw_last=0
[  278.041827] systemd-journald[214]: /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal: Journal header limits reached or header out-of-date, rotating.
[  278.048919] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16285, diff=1, hw=0 hw_last=0
[  278.065502] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16286, diff=1, hw=0 hw_last=0
[  278.082081] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16287, diff=1, hw=0 hw_last=0
[  278.098659] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16288, diff=1, hw=0 hw_last=0
[  278.115238] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16289, diff=1, hw=0 hw_last=0
[  278.131818] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16290, diff=1, hw=0 hw_last=0
[  278.148396] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16291, diff=1, hw=0 hw_last=0
[  278.164975] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16292, diff=1, hw=0 hw_last=0
[  278.181554] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16293, diff=1, hw=0 hw_last=0
[  278.198133] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16294, diff=1, hw=0 hw_last=0
[  278.214714] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16295, diff=1, hw=0 hw_last=0
[  278.231292] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16296, diff=1, hw=0 hw_last=0
[  278.247874] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16297, diff=1, hw=0 hw_last=0
[  278.264449] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16298, diff=1, hw=0 hw_last=0
[  278.281030] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16299, diff=1, hw=0 hw_last=0
[  278.297608] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16300, diff=1, hw=0 hw_last=0
[  278.314187] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16301, diff=1, hw=0 hw_last=0
[  278.330767] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16302, diff=1, hw=0 hw_last=0
[  278.347347] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16303, diff=1, hw=0 hw_last=0
[  278.363928] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16304, diff=1, hw=0 hw_last=0
[  278.377639] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  278.377767] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 16305 to client
[  278.380508] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16305, diff=1, hw=0 hw_last=0
[  278.390051] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  278.390151] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007967e7cb
[  278.529725] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16314, diff=1, hw=0 hw_last=0
[  278.546304] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16315, diff=1, hw=0 hw_last=0
[  278.562882] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16316, diff=1, hw=0 hw_last=0
[  278.579459] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16317, diff=1, hw=0 hw_last=0
[  278.596039] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16318, diff=1, hw=0 hw_last=0
[  278.612617] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16319, diff=1, hw=0 hw_last=0
[  278.621886] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  278.622003] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007967e7cb
[  278.622092] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  278.622166] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000ec98bd42 state to 000000007967e7cb
[  278.622247] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  278.622319] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 000000007967e7cb
[  278.622400] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000ec98bd42
[  278.622476] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  278.622548] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  278.622620] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  278.622724] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  278.622806] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  278.622880] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  278.622958] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  278.623030] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  278.623103] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 000000007967e7cb
[  278.623179] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  278.623254] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000007967e7cb
[  278.623337] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  278.623385] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  278.623423] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000007967e7cb
[  278.623503] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000c0cf118d to 000000007967e7cb
[  278.623577] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000007967e7cb
[  278.623666] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007967e7cb nonblocking
[  278.623777] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  278.623849] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  278.629195] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16320, diff=1, hw=0 hw_last=0
[  278.629293] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007967e7cb
[  278.629365] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  278.629428] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  278.629489] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  278.629551] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  278.629613] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007967e7cb
[  278.645773] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16321, diff=1, hw=0 hw_last=0
[  278.662352] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16322, diff=1, hw=0 hw_last=0
[  278.678930] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16323, diff=1, hw=0 hw_last=0
[  278.695511] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16324, diff=1, hw=0 hw_last=0
[  278.712089] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16325, diff=1, hw=0 hw_last=0
[  278.728670] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16326, diff=1, hw=0 hw_last=0
[  278.745246] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16327, diff=1, hw=0 hw_last=0
[  278.761827] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16328, diff=1, hw=0 hw_last=0
[  278.778408] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16329, diff=1, hw=0 hw_last=0
[  278.794987] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16330, diff=1, hw=0 hw_last=0
[  278.811563] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16331, diff=1, hw=0 hw_last=0
[  278.828141] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16332, diff=1, hw=0 hw_last=0
[  278.844722] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16333, diff=1, hw=0 hw_last=0
[  278.861300] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16334, diff=1, hw=0 hw_last=0
[  278.877880] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16335, diff=1, hw=0 hw_last=0
[  278.894458] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16336, diff=1, hw=0 hw_last=0
[  278.911037] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16337, diff=1, hw=0 hw_last=0
[  278.927617] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16338, diff=1, hw=0 hw_last=0
[  278.944199] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16339, diff=1, hw=0 hw_last=0
[  278.960777] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16340, diff=1, hw=0 hw_last=0
[  278.977355] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16341, diff=1, hw=0 hw_last=0
[  278.993936] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16342, diff=1, hw=0 hw_last=0
[  279.010515] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16343, diff=1, hw=0 hw_last=0
[  279.027094] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16344, diff=1, hw=0 hw_last=0
[  279.043672] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16345, diff=1, hw=0 hw_last=0
[  279.060251] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16346, diff=1, hw=0 hw_last=0
[  279.076831] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16347, diff=1, hw=0 hw_last=0
[  279.093410] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16348, diff=1, hw=0 hw_last=0
[  279.109990] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16349, diff=1, hw=0 hw_last=0
[  279.524475] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16374, diff=1, hw=0 hw_last=0
[  279.541053] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16375, diff=1, hw=0 hw_last=0
[  279.557634] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16376, diff=1, hw=0 hw_last=0
[  279.574214] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16377, diff=1, hw=0 hw_last=0
[  279.590794] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16378, diff=1, hw=0 hw_last=0
[  279.607370] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16379, diff=1, hw=0 hw_last=0
[  279.623952] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16380, diff=1, hw=0 hw_last=0
[  279.640530] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16381, diff=1, hw=0 hw_last=0
[  279.657108] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16382, diff=1, hw=0 hw_last=0
[  279.673688] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16383, diff=1, hw=0 hw_last=0
[  279.690265] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16384, diff=1, hw=0 hw_last=0
[  279.706846] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16385, diff=1, hw=0 hw_last=0
[  279.723424] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16386, diff=1, hw=0 hw_last=0
[  279.731795] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  279.731907] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000018d86a98
[  279.731994] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  279.732067] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000215b6887 state to 0000000018d86a98
[  279.732145] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  279.732218] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 0000000018d86a98
[  279.732299] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000215b6887
[  279.732374] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  279.732445] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  279.732517] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  279.732589] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  279.732663] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  279.732736] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  279.732812] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  279.732885] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  279.732956] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 0000000018d86a98
[  279.733031] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  279.733105] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000018d86a98
[  279.733187] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  279.733236] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  279.733273] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000018d86a98
[  279.733352] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000ab379aee to 0000000018d86a98
[  279.733426] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000018d86a98
[  279.733515] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000018d86a98 nonblocking
[  279.733636] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  279.733719] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  279.740000] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16387, diff=1, hw=0 hw_last=0
[  279.740099] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000018d86a98
[  279.740173] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  279.740236] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  279.740298] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  279.740362] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  279.740427] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000018d86a98
[  279.756582] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16388, diff=1, hw=0 hw_last=0
[  279.773161] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16389, diff=1, hw=0 hw_last=0
[  279.789739] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16390, diff=1, hw=0 hw_last=0
[  279.806317] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16391, diff=1, hw=0 hw_last=0
[  279.822900] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16392, diff=1, hw=0 hw_last=0
[  279.839476] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16393, diff=1, hw=0 hw_last=0
[  279.856057] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16394, diff=1, hw=0 hw_last=0
[  279.872636] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16395, diff=1, hw=0 hw_last=0
[  279.889219] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16396, diff=1, hw=0 hw_last=0
[  279.905792] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16397, diff=1, hw=0 hw_last=0
[  279.922369] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16398, diff=1, hw=0 hw_last=0
[  279.938950] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16399, diff=1, hw=0 hw_last=0
[  279.955527] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16400, diff=1, hw=0 hw_last=0
[  279.972106] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16401, diff=1, hw=0 hw_last=0
[  279.988686] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16402, diff=1, hw=0 hw_last=0
[  280.005265] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16403, diff=1, hw=0 hw_last=0
[  280.021846] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16404, diff=1, hw=0 hw_last=0
[  280.038427] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16405, diff=1, hw=0 hw_last=0
[  280.055008] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16406, diff=1, hw=0 hw_last=0
[  280.071584] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16407, diff=1, hw=0 hw_last=0
[  280.088165] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16408, diff=1, hw=0 hw_last=0
[  280.104744] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16409, diff=1, hw=0 hw_last=0
[  280.121321] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16410, diff=1, hw=0 hw_last=0
[  280.137901] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16411, diff=1, hw=0 hw_last=0
[  280.154479] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16412, diff=1, hw=0 hw_last=0
[  280.171062] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16413, diff=1, hw=0 hw_last=0
[  280.187640] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16414, diff=1, hw=0 hw_last=0
[  280.204220] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16415, diff=1, hw=0 hw_last=0
[  280.220797] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16416, diff=1, hw=0 hw_last=0
[  280.237376] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16417, diff=1, hw=0 hw_last=0
[  280.253959] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16418, diff=1, hw=0 hw_last=0
[  280.270539] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16419, diff=1, hw=0 hw_last=0
[  280.287114] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16420, diff=1, hw=0 hw_last=0
[  280.303696] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16421, diff=1, hw=0 hw_last=0
[  280.320272] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16422, diff=1, hw=0 hw_last=0
[  280.336853] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16423, diff=1, hw=0 hw_last=0
[  280.353434] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16424, diff=1, hw=0 hw_last=0
[  280.370012] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16425, diff=1, hw=0 hw_last=0
[  280.386593] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16426, diff=1, hw=0 hw_last=0
[  280.403170] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16427, diff=1, hw=0 hw_last=0
[  280.419750] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16428, diff=1, hw=0 hw_last=0
[  280.436330] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16429, diff=1, hw=0 hw_last=0
[  280.452909] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16430, diff=1, hw=0 hw_last=0
[  280.469486] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16431, diff=1, hw=0 hw_last=0
[  280.486066] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16432, diff=1, hw=0 hw_last=0
[  280.502643] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16433, diff=1, hw=0 hw_last=0
[  280.519224] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16434, diff=1, hw=0 hw_last=0
[  280.535802] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16435, diff=1, hw=0 hw_last=0
[  280.552383] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16436, diff=1, hw=0 hw_last=0
[  280.563112] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  280.563231] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 16437 to client
[  280.568969] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16437, diff=1, hw=0 hw_last=0
[  280.578507] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  280.578609] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000d7e48c6b
[  280.578713] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  280.578791] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000bac3ec2d state to 00000000d7e48c6b
[  280.578871] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  280.578945] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 00000000d7e48c6b
[  280.579027] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000bac3ec2d
[  280.579102] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  280.579175] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  280.579249] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  280.579321] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  280.579397] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  280.579473] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  280.579556] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  280.579634] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  280.579707] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 00000000d7e48c6b
[  280.579783] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  280.579855] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000d7e48c6b
[  280.579938] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  280.579988] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  280.580025] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000d7e48c6b
[  280.580103] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000e0dcab9c to 00000000d7e48c6b
[  280.580178] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000d7e48c6b
[  280.580257] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  280.580332] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  280.580406] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  280.580488] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 00000000d7e48c6b
[  280.580563] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000d7e48c6b
[  280.580636] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  280.580708] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  280.580780] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  280.580854] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  280.580927] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000d7e48c6b
[  280.582314] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  280.585546] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16438, diff=1, hw=0 hw_last=0
[  280.602123] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16439, diff=1, hw=0 hw_last=0
[  280.618703] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16440, diff=1, hw=0 hw_last=0
[  280.635283] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16441, diff=1, hw=0 hw_last=0
[  280.802292] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000bac3ec2d state to 00000000d7e48c6b
[  280.802369] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  280.802442] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 00000000d7e48c6b
[  280.802521] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000bac3ec2d
[  280.802595] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  280.802704] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  280.802781] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  280.802853] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  280.802929] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  280.803001] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  280.803077] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  280.803149] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  280.803220] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 00000000d7e48c6b
[  280.803295] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  280.803369] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000d7e48c6b
[  280.803453] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  280.803504] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  280.803541] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000d7e48c6b
[  280.803621] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000fde3661d to 00000000d7e48c6b
[  280.803695] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000d7e48c6b
[  280.803783] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000d7e48c6b nonblocking
[  280.803894] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  280.803969] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  280.817651] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16452, diff=1, hw=0 hw_last=0
[  280.817745] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000d7e48c6b
[  280.817815] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  280.817877] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  280.817939] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  280.818003] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  280.818065] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000d7e48c6b
[  280.834230] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16453, diff=1, hw=0 hw_last=0
[  280.850808] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16454, diff=1, hw=0 hw_last=0
[  280.867387] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16455, diff=1, hw=0 hw_last=0
[  280.883966] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16456, diff=1, hw=0 hw_last=0
[  280.900544] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16457, diff=1, hw=0 hw_last=0
[  280.917124] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16458, diff=1, hw=0 hw_last=0
[  280.933703] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16459, diff=1, hw=0 hw_last=0
[  280.950284] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16460, diff=1, hw=0 hw_last=0
[  280.966864] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16461, diff=1, hw=0 hw_last=0
[  280.983442] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16462, diff=1, hw=0 hw_last=0
[  281.000017] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16463, diff=1, hw=0 hw_last=0
[  281.016596] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16464, diff=1, hw=0 hw_last=0
[  281.033175] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16465, diff=1, hw=0 hw_last=0
[  281.049754] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16466, diff=1, hw=0 hw_last=0
[  281.066333] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16467, diff=1, hw=0 hw_last=0
[  281.082913] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16468, diff=1, hw=0 hw_last=0
[  281.099492] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16469, diff=1, hw=0 hw_last=0
[  281.116077] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16470, diff=1, hw=0 hw_last=0
[  281.132655] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16471, diff=1, hw=0 hw_last=0
[  281.149234] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16472, diff=1, hw=0 hw_last=0
[  281.165812] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16473, diff=1, hw=0 hw_last=0
[  281.182392] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16474, diff=1, hw=0 hw_last=0
[  281.198972] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16475, diff=1, hw=0 hw_last=0
[  281.215550] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16476, diff=1, hw=0 hw_last=0
[  281.232128] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16477, diff=1, hw=0 hw_last=0
[  281.248706] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16478, diff=1, hw=0 hw_last=0
[  281.265286] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16479, diff=1, hw=0 hw_last=0
[  281.281868] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16480, diff=1, hw=0 hw_last=0
[  281.298445] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16481, diff=1, hw=0 hw_last=0
[  281.315022] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16482, diff=1, hw=0 hw_last=0
[  281.331604] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16483, diff=1, hw=0 hw_last=0
[  281.348181] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16484, diff=1, hw=0 hw_last=0
[  281.364761] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16485, diff=1, hw=0 hw_last=0
[  281.381341] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16486, diff=1, hw=0 hw_last=0
[  281.397920] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16487, diff=1, hw=0 hw_last=0
[  281.414499] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16488, diff=1, hw=0 hw_last=0
[  281.606759] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  281.606832] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000082b4fa6a state to 000000004593454f
[  281.606908] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  281.606980] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a743c9a8 state to 000000004593454f
[  281.607059] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000082b4fa6a
[  281.607132] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  281.607203] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  281.607274] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  281.607345] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  281.607420] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  281.607491] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  281.607567] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  281.607638] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  281.607710] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 000000004593454f
[  281.607785] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  281.607858] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000004593454f
[  281.607939] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  281.607987] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  281.608024] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000004593454f
[  281.608103] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000008e9f664b to 000000004593454f
[  281.608177] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000004593454f
[  281.608256] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  281.608328] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  281.608402] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  281.608484] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000004593454f
[  281.608559] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000004593454f
[  281.608631] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  281.608703] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  281.608775] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  281.608847] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  281.608919] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000004593454f
[  281.610347] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  281.613458] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16500, diff=1, hw=0 hw_last=0
[  281.630034] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16501, diff=1, hw=0 hw_last=0
[  281.646613] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16502, diff=1, hw=0 hw_last=0
[  281.663192] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16503, diff=1, hw=0 hw_last=0
[  281.679776] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16504, diff=1, hw=0 hw_last=0
[  281.696352] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16505, diff=1, hw=0 hw_last=0
[  281.712931] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16506, diff=1, hw=0 hw_last=0
[  281.729512] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16507, diff=1, hw=0 hw_last=0
[  281.746096] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16508, diff=1, hw=0 hw_last=0
[  281.762672] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16509, diff=1, hw=0 hw_last=0
[  281.779248] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16510, diff=1, hw=0 hw_last=0
[  281.795826] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16511, diff=1, hw=0 hw_last=0
[  281.812404] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16512, diff=1, hw=0 hw_last=0
[  281.828984] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16513, diff=1, hw=0 hw_last=0
[  281.830230] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  281.830340] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000004593454f
[  281.830430] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  281.830503] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000082b4fa6a state to 000000004593454f
[  281.830581] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  281.830687] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a743c9a8 state to 000000004593454f
[  281.830774] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 0000000082b4fa6a
[  281.830849] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  281.830921] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  281.830992] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  281.831064] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  281.831141] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  281.831214] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  281.831290] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  281.831362] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  281.831433] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 000000004593454f
[  281.831508] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  281.831581] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000004593454f
[  281.831664] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  281.831712] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  281.831749] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000004593454f
[  281.831827] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000095dd8ec0 to 000000004593454f
[  281.831900] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000004593454f
[  281.831988] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000004593454f nonblocking
[  281.832099] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  281.832171] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  281.845561] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16514, diff=1, hw=0 hw_last=0
[  281.845659] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000004593454f
[  281.895297] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16517, diff=1, hw=0 hw_last=0
[  281.911876] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16518, diff=1, hw=0 hw_last=0
[  281.928455] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16519, diff=1, hw=0 hw_last=0
[  281.945036] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16520, diff=1, hw=0 hw_last=0
[  281.961613] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16521, diff=1, hw=0 hw_last=0
[  281.978194] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16522, diff=1, hw=0 hw_last=0
[  281.994773] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16523, diff=1, hw=0 hw_last=0
[  282.011353] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16524, diff=1, hw=0 hw_last=0
[  282.027928] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16525, diff=1, hw=0 hw_last=0
[  282.044506] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16526, diff=1, hw=0 hw_last=0
[  282.061085] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16527, diff=1, hw=0 hw_last=0
[  282.077665] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16528, diff=1, hw=0 hw_last=0
[  282.094244] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16529, diff=1, hw=0 hw_last=0
[  282.110823] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16530, diff=1, hw=0 hw_last=0
[  282.127402] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16531, diff=1, hw=0 hw_last=0
[  282.143987] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16532, diff=1, hw=0 hw_last=0
[  282.160567] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16533, diff=1, hw=0 hw_last=0
[  282.177144] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16534, diff=1, hw=0 hw_last=0
[  282.193720] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16535, diff=1, hw=0 hw_last=0
[  282.210302] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16536, diff=1, hw=0 hw_last=0
[  282.226881] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16537, diff=1, hw=0 hw_last=0
[  282.243461] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16538, diff=1, hw=0 hw_last=0
[  282.260037] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16539, diff=1, hw=0 hw_last=0
[  282.276617] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16540, diff=1, hw=0 hw_last=0
[  282.293198] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16541, diff=1, hw=0 hw_last=0
[  282.309779] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16542, diff=1, hw=0 hw_last=0
[  282.326358] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16543, diff=1, hw=0 hw_last=0
[  282.342932] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16544, diff=1, hw=0 hw_last=0
[  282.359516] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16545, diff=1, hw=0 hw_last=0
[  282.376091] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16546, diff=1, hw=0 hw_last=0
[  282.392671] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16547, diff=1, hw=0 hw_last=0
[  282.409251] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16548, diff=1, hw=0 hw_last=0
[  282.425831] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16549, diff=1, hw=0 hw_last=0
[  282.442409] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16550, diff=1, hw=0 hw_last=0
[  282.458992] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16551, diff=1, hw=0 hw_last=0
[  282.475568] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16552, diff=1, hw=0 hw_last=0
[  282.492148] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16553, diff=1, hw=0 hw_last=0
[  282.508727] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16554, diff=1, hw=0 hw_last=0
[  282.525305] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16555, diff=1, hw=0 hw_last=0
[  282.541884] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16556, diff=1, hw=0 hw_last=0
[  282.558467] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16557, diff=1, hw=0 hw_last=0
[  282.575045] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16558, diff=1, hw=0 hw_last=0
[  282.591623] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16559, diff=1, hw=0 hw_last=0
[  282.608201] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16560, diff=1, hw=0 hw_last=0
[  282.624789] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16561, diff=1, hw=0 hw_last=0
[  282.627277] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  282.627398] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 16562 to client
[  282.633665] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  282.633765] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f37c832b
[  282.633847] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  282.633919] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000fefb5c61 state to 00000000f37c832b
[  282.633998] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  282.634071] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 00000000f37c832b
[  282.634150] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000fefb5c61
[  282.634224] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  282.634295] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  282.634366] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  282.634438] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  282.634514] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  282.634585] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  282.634682] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  282.634758] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  282.634831] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 00000000f37c832b
[  282.634905] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  282.634978] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000f37c832b
[  282.635060] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  282.865885] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000fefb5c61
[  282.865961] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  282.866032] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  282.866104] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  282.866175] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  282.866250] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  282.866321] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  282.866397] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  282.866469] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  282.866541] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 00000000f37c832b
[  282.866650] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  282.866734] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000f37c832b
[  282.866820] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  282.866869] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  282.866906] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000f37c832b
[  282.866988] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000008e9f664b to 00000000f37c832b
[  282.867062] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000f37c832b
[  282.867151] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f37c832b nonblocking
[  282.867263] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  282.867334] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  282.873472] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16576, diff=1, hw=0 hw_last=0
[  282.873564] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f37c832b
[  282.873642] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  282.873705] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  282.873766] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  282.873829] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  282.873891] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f37c832b
[  282.890049] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16577, diff=1, hw=0 hw_last=0
[  282.906629] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16578, diff=1, hw=0 hw_last=0
[  282.923208] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16579, diff=1, hw=0 hw_last=0
[  282.939786] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16580, diff=1, hw=0 hw_last=0
[  282.956366] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16581, diff=1, hw=0 hw_last=0
[  282.972947] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16582, diff=1, hw=0 hw_last=0
[  282.989526] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16583, diff=1, hw=0 hw_last=0
[  283.006104] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16584, diff=1, hw=0 hw_last=0
[  283.022686] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16585, diff=1, hw=0 hw_last=0
[  283.039263] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16586, diff=1, hw=0 hw_last=0
[  283.055839] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16587, diff=1, hw=0 hw_last=0
[  283.072418] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16588, diff=1, hw=0 hw_last=0
[  283.088997] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16589, diff=1, hw=0 hw_last=0
[  283.105575] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16590, diff=1, hw=0 hw_last=0
[  283.122155] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16591, diff=1, hw=0 hw_last=0
[  283.138734] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16592, diff=1, hw=0 hw_last=0
[  283.155313] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16593, diff=1, hw=0 hw_last=0
[  283.171892] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16594, diff=1, hw=0 hw_last=0
[  283.188477] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16595, diff=1, hw=0 hw_last=0
[  283.205055] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16596, diff=1, hw=0 hw_last=0
[  283.221633] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16597, diff=1, hw=0 hw_last=0
[  283.238212] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16598, diff=1, hw=0 hw_last=0
[  283.254790] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16599, diff=1, hw=0 hw_last=0
[  283.271369] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16600, diff=1, hw=0 hw_last=0
[  283.287949] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16601, diff=1, hw=0 hw_last=0
[  283.304527] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16602, diff=1, hw=0 hw_last=0
[  283.321107] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16603, diff=1, hw=0 hw_last=0
[  283.337690] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16604, diff=1, hw=0 hw_last=0
[  283.354267] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16605, diff=1, hw=0 hw_last=0
[  283.370845] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16606, diff=1, hw=0 hw_last=0
[  283.387425] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16607, diff=1, hw=0 hw_last=0
[  283.404006] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16608, diff=1, hw=0 hw_last=0
[  283.420582] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16609, diff=1, hw=0 hw_last=0
[  283.437163] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16610, diff=1, hw=0 hw_last=0
[  283.453742] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16611, diff=1, hw=0 hw_last=0
[  283.470320] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16612, diff=1, hw=0 hw_last=0
[  283.486899] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16613, diff=1, hw=0 hw_last=0
[  283.503477] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16614, diff=1, hw=0 hw_last=0
[  283.520057] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16615, diff=1, hw=0 hw_last=0
[  283.536638] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16616, diff=1, hw=0 hw_last=0
[  283.553216] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16617, diff=1, hw=0 hw_last=0
[  283.569795] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16618, diff=1, hw=0 hw_last=0
[  283.586374] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16619, diff=1, hw=0 hw_last=0
[  283.602954] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16620, diff=1, hw=0 hw_last=0
[  283.619536] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16621, diff=1, hw=0 hw_last=0
[  283.636116] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16622, diff=1, hw=0 hw_last=0
[  283.652693] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16623, diff=1, hw=0 hw_last=0
[  283.669272] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16624, diff=1, hw=0 hw_last=0
[  283.685851] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16625, diff=1, hw=0 hw_last=0
[  283.702430] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16626, diff=1, hw=0 hw_last=0
[  283.716450] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  283.716574] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 16627 to client
[  283.719016] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16627, diff=1, hw=0 hw_last=0
[  283.727852] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  283.727955] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009472d261
[  283.728037] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  283.728110] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000055579822 state to 000000009472d261
[  283.728187] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  283.728259] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 000000009472d261
[  283.728339] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000055579822
[  283.728413] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  283.728484] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  283.728555] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  283.728626] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  283.728701] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  283.728772] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  283.728847] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  283.728918] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  283.728990] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 000000009472d261
[  283.729064] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  283.729137] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000009472d261
[  283.729218] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  283.729264] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  283.729300] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000009472d261
[  283.729380] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000d7e48c6b to 000000009472d261
[  283.729453] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000009472d261
[  283.729532] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  283.729605] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  283.729678] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  283.729759] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000009472d261
[  283.729834] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009472d261
[  283.729907] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  283.729980] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  283.730053] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  283.730125] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  283.730197] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009472d261
[  283.731678] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  283.735594] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16628, diff=1, hw=0 hw_last=0
[  283.752172] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16629, diff=1, hw=0 hw_last=0
[  283.768750] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16630, diff=1, hw=0 hw_last=0
[  283.785329] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16631, diff=1, hw=0 hw_last=0
[  283.801910] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16632, diff=1, hw=0 hw_last=0
[  283.818491] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16633, diff=1, hw=0 hw_last=0
[  283.835070] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16634, diff=1, hw=0 hw_last=0
[  283.851648] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16635, diff=1, hw=0 hw_last=0
[  283.868230] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16636, diff=1, hw=0 hw_last=0
[  283.884809] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16637, diff=1, hw=0 hw_last=0
[  283.901387] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16638, diff=1, hw=0 hw_last=0
[  283.917966] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16639, diff=1, hw=0 hw_last=0
[  283.934543] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16640, diff=1, hw=0 hw_last=0
[  283.935140] systemd-journald[214]: Data hash table of /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal has a fill level at 75.0 (2731 of 3640 items, 2097152 file size, 767 bytes per hash table item), suggesting rotation.
[  283.951124] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16641, diff=1, hw=0 hw_last=0
[  283.957334] systemd-journald[214]: /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal: Journal header limits reached or header out-of-date, rotating.
[  283.959503] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  283.967697] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16642, diff=1, hw=0 hw_last=0
[  283.977419] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009472d261
[  283.977520] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  284.183224] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16655, diff=1, hw=0 hw_last=0
[  284.199803] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16656, diff=1, hw=0 hw_last=0
[  284.216381] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16657, diff=1, hw=0 hw_last=0
[  284.232961] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16658, diff=1, hw=0 hw_last=0
[  284.249540] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16659, diff=1, hw=0 hw_last=0
[  284.266121] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16660, diff=1, hw=0 hw_last=0
[  284.282702] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16661, diff=1, hw=0 hw_last=0
[  284.299281] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16662, diff=1, hw=0 hw_last=0
[  284.315860] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16663, diff=1, hw=0 hw_last=0
[  284.332439] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16664, diff=1, hw=0 hw_last=0
[  284.349019] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16665, diff=1, hw=0 hw_last=0
[  284.365596] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16666, diff=1, hw=0 hw_last=0
[  284.382177] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16667, diff=1, hw=0 hw_last=0
[  284.398754] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16668, diff=1, hw=0 hw_last=0
[  284.415336] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16669, diff=1, hw=0 hw_last=0
[  284.431915] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16670, diff=1, hw=0 hw_last=0
[  284.448495] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16671, diff=1, hw=0 hw_last=0
[  284.465073] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16672, diff=1, hw=0 hw_last=0
[  284.481653] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16673, diff=1, hw=0 hw_last=0
[  284.498233] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16674, diff=1, hw=0 hw_last=0
[  284.514810] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16675, diff=1, hw=0 hw_last=0
[  284.531392] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16676, diff=1, hw=0 hw_last=0
[  284.547968] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16677, diff=1, hw=0 hw_last=0
[  284.564547] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16678, diff=1, hw=0 hw_last=0
[  284.581126] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16679, diff=1, hw=0 hw_last=0
[  284.597705] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16680, diff=1, hw=0 hw_last=0
[  284.614287] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16681, diff=1, hw=0 hw_last=0
[  284.630865] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16682, diff=1, hw=0 hw_last=0
[  284.647443] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16683, diff=1, hw=0 hw_last=0
[  284.664023] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16684, diff=1, hw=0 hw_last=0
[  284.680601] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16685, diff=1, hw=0 hw_last=0
[  284.697185] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16686, diff=1, hw=0 hw_last=0
[  284.713761] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16687, diff=1, hw=0 hw_last=0
[  284.730342] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16688, diff=1, hw=0 hw_last=0
[  284.746920] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16689, diff=1, hw=0 hw_last=0
[  284.763500] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16690, diff=1, hw=0 hw_last=0
[  284.780080] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16691, diff=1, hw=0 hw_last=0
[  284.796662] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16692, diff=1, hw=0 hw_last=0
[  284.802703] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  284.802827] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 16693 to client
[  284.806100] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  284.806202] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008a640c91
[  284.806284] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  284.806357] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000002cafbe1b state to 000000008a640c91
[  284.806435] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  284.806507] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 000000008a640c91
[  284.806613] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 000000002cafbe1b
[  284.806700] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  284.806774] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  284.806847] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  284.806922] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  284.806997] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  284.807070] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  284.807147] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  284.807219] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  284.807292] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 000000008a640c91
[  284.807368] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  284.807441] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000008a640c91
[  284.807523] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  284.807571] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  284.807608] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008a640c91
[  284.807689] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000018d86a98 to 000000008a640c91
[  284.807762] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008a640c91
[  284.807842] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  284.807915] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  284.807989] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  285.038941] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  285.038979] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008a640c91
[  285.039061] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000007967e7cb to 000000008a640c91
[  285.039136] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008a640c91
[  285.039226] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000008a640c91 nonblocking
[  285.039344] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  285.039418] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  285.045345] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16707, diff=1, hw=0 hw_last=0
[  285.045434] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008a640c91
[  285.045503] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  285.045565] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  285.045627] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  285.045690] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  285.045753] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008a640c91
[  285.061925] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16708, diff=1, hw=0 hw_last=0
[  285.078504] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16709, diff=1, hw=0 hw_last=0
[  285.095085] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16710, diff=1, hw=0 hw_last=0
[  285.111661] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16711, diff=1, hw=0 hw_last=0
[  285.128240] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16712, diff=1, hw=0 hw_last=0
[  285.144823] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16713, diff=1, hw=0 hw_last=0
[  285.161399] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16714, diff=1, hw=0 hw_last=0
[  285.177978] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16715, diff=1, hw=0 hw_last=0
[  285.194560] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16716, diff=1, hw=0 hw_last=0
[  285.211141] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16717, diff=1, hw=0 hw_last=0
[  285.227716] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16718, diff=1, hw=0 hw_last=0
[  285.244293] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16719, diff=1, hw=0 hw_last=0
[  285.260871] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16720, diff=1, hw=0 hw_last=0
[  285.277451] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16721, diff=1, hw=0 hw_last=0
[  285.294030] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16722, diff=1, hw=0 hw_last=0
[  285.310608] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16723, diff=1, hw=0 hw_last=0
[  285.327187] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16724, diff=1, hw=0 hw_last=0
[  285.343767] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16725, diff=1, hw=0 hw_last=0
[  285.360352] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16726, diff=1, hw=0 hw_last=0
[  285.376932] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16727, diff=1, hw=0 hw_last=0
[  285.393507] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16728, diff=1, hw=0 hw_last=0
[  285.410086] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16729, diff=1, hw=0 hw_last=0
[  285.426667] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16730, diff=1, hw=0 hw_last=0
[  285.443246] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16731, diff=1, hw=0 hw_last=0
[  285.459825] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16732, diff=1, hw=0 hw_last=0
[  285.476405] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16733, diff=1, hw=0 hw_last=0
[  285.492982] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16734, diff=1, hw=0 hw_last=0
[  285.509563] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16735, diff=1, hw=0 hw_last=0
[  285.526143] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16736, diff=1, hw=0 hw_last=0
[  285.542722] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16737, diff=1, hw=0 hw_last=0
[  285.559300] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16738, diff=1, hw=0 hw_last=0
[  285.575880] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16739, diff=1, hw=0 hw_last=0
[  285.592457] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16740, diff=1, hw=0 hw_last=0
[  285.609038] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16741, diff=1, hw=0 hw_last=0
[  285.625616] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16742, diff=1, hw=0 hw_last=0
[  285.642196] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16743, diff=1, hw=0 hw_last=0
[  285.658776] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16744, diff=1, hw=0 hw_last=0
[  285.675357] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16745, diff=1, hw=0 hw_last=0
[  285.691934] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16746, diff=1, hw=0 hw_last=0
[  285.708513] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16747, diff=1, hw=0 hw_last=0
[  285.725094] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16748, diff=1, hw=0 hw_last=0
[  285.741675] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16749, diff=1, hw=0 hw_last=0
[  285.758252] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16750, diff=1, hw=0 hw_last=0
[  285.774831] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16751, diff=1, hw=0 hw_last=0
[  285.791410] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16752, diff=1, hw=0 hw_last=0
[  285.807987] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16753, diff=1, hw=0 hw_last=0
[  285.824569] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16754, diff=1, hw=0 hw_last=0
[  286.182666] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  286.182742] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  286.182817] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 00000000eae20a14
[  286.182894] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  286.182969] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000eae20a14
[  286.183053] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  286.183103] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  286.183140] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000eae20a14
[  286.183223] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000018d86a98 to 00000000eae20a14
[  286.183297] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000eae20a14
[  286.183386] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000eae20a14 nonblocking
[  286.183500] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  286.183577] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  286.189309] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16776, diff=1, hw=0 hw_last=0
[  286.189396] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000eae20a14
[  286.189468] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  286.189532] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  286.189594] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  286.189657] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  286.189721] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000eae20a14
[  286.205889] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16777, diff=1, hw=0 hw_last=0
[  286.222469] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16778, diff=1, hw=0 hw_last=0
[  286.239048] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16779, diff=1, hw=0 hw_last=0
[  286.255626] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16780, diff=1, hw=0 hw_last=0
[  286.272204] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16781, diff=1, hw=0 hw_last=0
[  286.288787] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16782, diff=1, hw=0 hw_last=0
[  286.305365] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16783, diff=1, hw=0 hw_last=0
[  286.321944] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16784, diff=1, hw=0 hw_last=0
[  286.338527] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16785, diff=1, hw=0 hw_last=0
[  286.355104] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16786, diff=1, hw=0 hw_last=0
[  286.371679] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16787, diff=1, hw=0 hw_last=0
[  286.388257] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16788, diff=1, hw=0 hw_last=0
[  286.404836] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16789, diff=1, hw=0 hw_last=0
[  286.421415] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16790, diff=1, hw=0 hw_last=0
[  286.437995] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16791, diff=1, hw=0 hw_last=0
[  286.454574] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16792, diff=1, hw=0 hw_last=0
[  286.471152] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16793, diff=1, hw=0 hw_last=0
[  286.487736] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16794, diff=1, hw=0 hw_last=0
[  286.504315] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16795, diff=1, hw=0 hw_last=0
[  286.520895] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16796, diff=1, hw=0 hw_last=0
[  286.537472] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16797, diff=1, hw=0 hw_last=0
[  286.554052] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16798, diff=1, hw=0 hw_last=0
[  286.570633] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16799, diff=1, hw=0 hw_last=0
[  286.587211] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16800, diff=1, hw=0 hw_last=0
[  286.603791] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16801, diff=1, hw=0 hw_last=0
[  286.620368] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16802, diff=1, hw=0 hw_last=0
[  286.636948] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16803, diff=1, hw=0 hw_last=0
[  286.653528] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16804, diff=1, hw=0 hw_last=0
[  286.670110] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16805, diff=1, hw=0 hw_last=0
[  286.686685] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16806, diff=1, hw=0 hw_last=0
[  286.703265] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16807, diff=1, hw=0 hw_last=0
[  286.719843] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16808, diff=1, hw=0 hw_last=0
[  286.736424] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16809, diff=1, hw=0 hw_last=0
[  286.753002] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16810, diff=1, hw=0 hw_last=0
[  286.769581] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16811, diff=1, hw=0 hw_last=0
[  286.786162] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16812, diff=1, hw=0 hw_last=0
[  286.802743] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16813, diff=1, hw=0 hw_last=0
[  286.819319] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16814, diff=1, hw=0 hw_last=0
[  286.835899] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16815, diff=1, hw=0 hw_last=0
[  286.852481] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16816, diff=1, hw=0 hw_last=0
[  286.869058] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16817, diff=1, hw=0 hw_last=0
[  286.885636] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16818, diff=1, hw=0 hw_last=0
[  287.067666] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 16829 to client
[  287.068015] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16829, diff=1, hw=0 hw_last=0
[  287.076942] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  287.077047] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000305e034
[  287.077129] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  287.077202] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000215b6887 state to 000000000305e034
[  287.077279] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  287.077351] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 000000000305e034
[  287.077431] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000215b6887
[  287.077505] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  287.077576] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  287.077647] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  287.077718] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  287.077794] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  287.077865] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  287.077939] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  287.078010] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  287.078082] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 000000000305e034
[  287.078156] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  287.078228] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000000305e034
[  287.078308] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  287.078354] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  287.078391] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000305e034
[  287.078468] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000009472d261 to 000000000305e034
[  287.078543] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000305e034
[  287.078640] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  287.078717] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  287.078792] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  287.078875] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000000305e034
[  287.078951] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000305e034
[  287.079025] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  287.079098] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  287.079170] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  287.079243] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  287.079316] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000305e034
[  287.080688] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  287.084595] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16830, diff=1, hw=0 hw_last=0
[  287.101171] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16831, diff=1, hw=0 hw_last=0
[  287.117749] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16832, diff=1, hw=0 hw_last=0
[  287.134329] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16833, diff=1, hw=0 hw_last=0
[  287.150910] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16834, diff=1, hw=0 hw_last=0
[  287.167488] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16835, diff=1, hw=0 hw_last=0
[  287.184067] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16836, diff=1, hw=0 hw_last=0
[  287.200647] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16837, diff=1, hw=0 hw_last=0
[  287.217228] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16838, diff=1, hw=0 hw_last=0
[  287.233808] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16839, diff=1, hw=0 hw_last=0
[  287.250384] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16840, diff=1, hw=0 hw_last=0
[  287.266964] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16841, diff=1, hw=0 hw_last=0
[  287.283541] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16842, diff=1, hw=0 hw_last=0
[  287.300120] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16843, diff=1, hw=0 hw_last=0
[  287.307810] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  287.307924] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000305e034
[  287.308011] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  287.308086] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000215b6887 state to 000000000305e034
[  287.308164] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  287.308236] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 000000000305e034
[  287.308315] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000215b6887
[  287.308390] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  287.308462] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  287.308533] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  287.308605] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  287.308681] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  287.308754] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  287.308830] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  287.308902] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  287.308974] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 000000000305e034
[  287.309049] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  287.309123] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000000305e034
[  287.309205] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  287.309253] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  287.309289] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000305e034
[  287.309367] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000d7e48c6b to 000000000305e034
[  287.309442] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000305e034
[  287.309528] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000305e034 nonblocking
[  287.309646] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  287.747757] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16870, diff=1, hw=0 hw_last=0
[  287.764334] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16871, diff=1, hw=0 hw_last=0
[  287.780913] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16872, diff=1, hw=0 hw_last=0
[  287.797490] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16873, diff=1, hw=0 hw_last=0
[  287.814070] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16874, diff=1, hw=0 hw_last=0
[  287.830651] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16875, diff=1, hw=0 hw_last=0
[  287.847232] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16876, diff=1, hw=0 hw_last=0
[  287.863809] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16877, diff=1, hw=0 hw_last=0
[  287.880388] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16878, diff=1, hw=0 hw_last=0
[  287.896968] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16879, diff=1, hw=0 hw_last=0
[  287.913549] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16880, diff=1, hw=0 hw_last=0
[  287.930125] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16881, diff=1, hw=0 hw_last=0
[  287.946706] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16882, diff=1, hw=0 hw_last=0
[  287.963287] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16883, diff=1, hw=0 hw_last=0
[  287.979877] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16884, diff=1, hw=0 hw_last=0
[  287.996448] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16885, diff=1, hw=0 hw_last=0
[  288.013024] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16886, diff=1, hw=0 hw_last=0
[  288.029602] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16887, diff=1, hw=0 hw_last=0
[  288.046181] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16888, diff=1, hw=0 hw_last=0
[  288.062760] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16889, diff=1, hw=0 hw_last=0
[  288.079342] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16890, diff=1, hw=0 hw_last=0
[  288.095920] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16891, diff=1, hw=0 hw_last=0
[  288.112498] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16892, diff=1, hw=0 hw_last=0
[  288.129077] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16893, diff=1, hw=0 hw_last=0
[  288.145660] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16894, diff=1, hw=0 hw_last=0
[  288.156235] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  288.156367] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 16895 to client
[  288.162241] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16895, diff=1, hw=0 hw_last=0
[  288.171658] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  288.171761] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006fb5b2d2
[  288.171848] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  288.171923] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000003519e999 state to 000000006fb5b2d2
[  288.172003] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  288.172077] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000adb7ad91 state to 000000006fb5b2d2
[  288.172159] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 000000003519e999
[  288.172235] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  288.172307] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  288.172385] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  288.172461] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  288.172541] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  288.172612] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  288.172688] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  288.172761] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  288.172832] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 000000006fb5b2d2
[  288.172907] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  288.172980] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000006fb5b2d2
[  288.173063] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  288.173112] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  288.173149] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006fb5b2d2
[  288.173226] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000f37c832b to 000000006fb5b2d2
[  288.173300] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006fb5b2d2
[  288.173380] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  288.173453] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  288.173526] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  288.173607] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000006fb5b2d2
[  288.173682] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006fb5b2d2
[  288.173756] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  288.173828] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  288.173900] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  288.173973] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  288.174045] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006fb5b2d2
[  288.175520] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  288.178819] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16896, diff=1, hw=0 hw_last=0
[  288.195397] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16897, diff=1, hw=0 hw_last=0
[  288.211977] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16898, diff=1, hw=0 hw_last=0
[  288.228557] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16899, diff=1, hw=0 hw_last=0
[  288.245137] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16900, diff=1, hw=0 hw_last=0
[  288.261717] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16901, diff=1, hw=0 hw_last=0
[  288.278294] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16902, diff=1, hw=0 hw_last=0
[  288.294875] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16903, diff=1, hw=0 hw_last=0
[  288.311458] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16904, diff=1, hw=0 hw_last=0
[  288.328035] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16905, diff=1, hw=0 hw_last=0
[  288.344616] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16906, diff=1, hw=0 hw_last=0
[  288.361189] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16907, diff=1, hw=0 hw_last=0
[  288.377768] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16908, diff=1, hw=0 hw_last=0
[  288.394346] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16909, diff=1, hw=0 hw_last=0
[  288.406731] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  288.406846] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006fb5b2d2
[  288.406932] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  288.407008] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000003519e999 state to 000000006fb5b2d2
[  288.407086] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  288.407158] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000adb7ad91 state to 000000006fb5b2d2
[  288.407238] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 000000003519e999
[  288.407312] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  288.407383] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  288.407454] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  288.407526] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  288.407601] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  288.407672] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  288.407749] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  288.407820] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  288.407892] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 000000006fb5b2d2
[  288.407966] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  288.408040] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000006fb5b2d2
[  288.408122] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  288.408171] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  288.408207] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006fb5b2d2
[  288.408287] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000004593454f to 000000006fb5b2d2
[  288.408361] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006fb5b2d2
[  288.408448] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006fb5b2d2 nonblocking
[  288.408562] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  288.408637] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  288.410923] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16910, diff=1, hw=0 hw_last=0
[  288.411014] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006fb5b2d2
[  288.411085] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  288.411148] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  288.411212] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  288.411275] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  288.411341] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006fb5b2d2
[  288.427502] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16911, diff=1, hw=0 hw_last=0
[  288.444081] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16912, diff=1, hw=0 hw_last=0
[  288.460660] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16913, diff=1, hw=0 hw_last=0
[  288.477240] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16914, diff=1, hw=0 hw_last=0
[  288.493818] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16915, diff=1, hw=0 hw_last=0
[  288.510398] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16916, diff=1, hw=0 hw_last=0
[  288.526977] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16917, diff=1, hw=0 hw_last=0
[  288.543559] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16918, diff=1, hw=0 hw_last=0
[  288.560139] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16919, diff=1, hw=0 hw_last=0
[  288.576719] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16920, diff=1, hw=0 hw_last=0
[  288.593292] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16921, diff=1, hw=0 hw_last=0
[  288.609870] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16922, diff=1, hw=0 hw_last=0
[  288.626449] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16923, diff=1, hw=0 hw_last=0
[  288.643029] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16924, diff=1, hw=0 hw_last=0
[  288.659608] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16925, diff=1, hw=0 hw_last=0
[  288.676187] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16926, diff=1, hw=0 hw_last=0
[  288.692766] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16927, diff=1, hw=0 hw_last=0
[  288.709346] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16928, diff=1, hw=0 hw_last=0
[  288.725926] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16929, diff=1, hw=0 hw_last=0
[  288.742508] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16930, diff=1, hw=0 hw_last=0
[  288.759087] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16931, diff=1, hw=0 hw_last=0
[  288.775666] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16932, diff=1, hw=0 hw_last=0
[  288.792246] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16933, diff=1, hw=0 hw_last=0
[  288.808821] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16934, diff=1, hw=0 hw_last=0
[  288.825402] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16935, diff=1, hw=0 hw_last=0
[  288.841983] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16936, diff=1, hw=0 hw_last=0
[  288.858562] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16937, diff=1, hw=0 hw_last=0
[  289.250582] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  289.250661] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  289.250735] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  289.250808] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000000ace560b
[  289.250883] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  289.250956] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000000ace560b
[  289.251039] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  289.251087] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  289.251124] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000ace560b
[  289.251204] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000006fb5b2d2 to 000000000ace560b
[  289.251279] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000ace560b
[  289.251358] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  289.251431] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  289.251505] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  289.251586] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000000ace560b
[  289.251661] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000ace560b
[  289.251734] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  289.251807] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  289.251879] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  289.251951] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  289.252024] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000ace560b
[  289.253390] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  289.256471] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16961, diff=1, hw=0 hw_last=0
[  289.273047] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16962, diff=1, hw=0 hw_last=0
[  289.289626] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16963, diff=1, hw=0 hw_last=0
[  289.306204] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16964, diff=1, hw=0 hw_last=0
[  289.322785] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16965, diff=1, hw=0 hw_last=0
[  289.339364] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16966, diff=1, hw=0 hw_last=0
[  289.355940] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16967, diff=1, hw=0 hw_last=0
[  289.372524] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16968, diff=1, hw=0 hw_last=0
[  289.389102] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16969, diff=1, hw=0 hw_last=0
[  289.405684] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16970, diff=1, hw=0 hw_last=0
[  289.422261] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16971, diff=1, hw=0 hw_last=0
[  289.438841] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16972, diff=1, hw=0 hw_last=0
[  289.455416] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16973, diff=1, hw=0 hw_last=0
[  289.471997] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16974, diff=1, hw=0 hw_last=0
[  289.481427] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  289.481544] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000ace560b
[  289.481629] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  289.481703] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000082b4fa6a state to 000000000ace560b
[  289.481780] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  289.481852] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 000000000ace560b
[  289.481932] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000082b4fa6a
[  289.482006] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  289.482078] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  289.482149] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  289.482220] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  289.482295] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  289.482367] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  289.482442] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  289.482548] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  289.482627] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000000ace560b
[  289.482709] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  289.482785] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000000ace560b
[  289.482869] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  289.482918] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  289.482955] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000ace560b
[  289.483037] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000f37c832b to 000000000ace560b
[  289.483111] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000ace560b
[  289.483199] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000ace560b nonblocking
[  289.483307] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  289.483382] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  289.488572] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16975, diff=1, hw=0 hw_last=0
[  289.488667] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000ace560b
[  289.488743] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  289.488806] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  289.488868] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  289.488932] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  289.488994] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000ace560b
[  289.505150] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16976, diff=1, hw=0 hw_last=0
[  289.521729] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16977, diff=1, hw=0 hw_last=0
[  289.538310] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16978, diff=1, hw=0 hw_last=0
[  289.554887] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=16979, diff=1, hw=0 hw_last=0
[  290.035683] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17008, diff=1, hw=0 hw_last=0
[  290.052262] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17009, diff=1, hw=0 hw_last=0
[  290.068844] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17010, diff=1, hw=0 hw_last=0
[  290.085423] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17011, diff=1, hw=0 hw_last=0
[  290.102001] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17012, diff=1, hw=0 hw_last=0
[  290.118580] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17013, diff=1, hw=0 hw_last=0
[  290.135158] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17014, diff=1, hw=0 hw_last=0
[  290.151737] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17015, diff=1, hw=0 hw_last=0
[  290.168319] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17016, diff=1, hw=0 hw_last=0
[  290.184897] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17017, diff=1, hw=0 hw_last=0
[  290.201475] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17018, diff=1, hw=0 hw_last=0
[  290.218055] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17019, diff=1, hw=0 hw_last=0
[  290.234635] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17020, diff=1, hw=0 hw_last=0
[  290.251215] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17021, diff=1, hw=0 hw_last=0
[  290.267793] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17022, diff=1, hw=0 hw_last=0
[  290.284370] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17023, diff=1, hw=0 hw_last=0
[  290.300953] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17024, diff=1, hw=0 hw_last=0
[  290.317530] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17025, diff=1, hw=0 hw_last=0
[  290.334110] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17026, diff=1, hw=0 hw_last=0
[  290.350689] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17027, diff=1, hw=0 hw_last=0
[  290.367272] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17028, diff=1, hw=0 hw_last=0
[  290.372463] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  290.372588] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 17029 to client
[  290.376871] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  290.376973] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000cc24793
[  290.377057] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  290.377129] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000fefb5c61 state to 000000000cc24793
[  290.377206] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  290.377278] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000e8543c49 state to 000000000cc24793
[  290.377357] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000fefb5c61
[  290.377430] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  290.377501] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  290.377573] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  290.377644] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  290.377719] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  290.377790] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  290.377865] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  290.377937] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  290.378008] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 000000000cc24793
[  290.378082] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  290.378154] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000000cc24793
[  290.378236] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  290.378285] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  290.378322] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000cc24793
[  290.378401] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000000305e034 to 000000000cc24793
[  290.378475] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000cc24793
[  290.378568] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  290.378643] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  290.378719] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  290.378803] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000000cc24793
[  290.378878] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000cc24793
[  290.378951] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  290.379023] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  290.379096] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  290.379168] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  290.379240] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000cc24793
[  290.380620] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  290.383854] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17029, diff=1, hw=0 hw_last=0
[  290.400436] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17030, diff=1, hw=0 hw_last=0
[  290.417009] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17031, diff=1, hw=0 hw_last=0
[  290.433591] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17032, diff=1, hw=0 hw_last=0
[  290.450170] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17033, diff=1, hw=0 hw_last=0
[  290.466749] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17034, diff=1, hw=0 hw_last=0
[  290.483329] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17035, diff=1, hw=0 hw_last=0
[  290.499908] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17036, diff=1, hw=0 hw_last=0
[  290.516489] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17037, diff=1, hw=0 hw_last=0
[  290.533069] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17038, diff=1, hw=0 hw_last=0
[  290.549644] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17039, diff=1, hw=0 hw_last=0
[  290.566224] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17040, diff=1, hw=0 hw_last=0
[  290.608673] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  290.608744] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  290.608815] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  290.608886] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  290.608961] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  290.609032] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  290.609107] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  290.609179] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  290.609250] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 000000000cc24793
[  290.609324] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  290.609398] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000000cc24793
[  290.609481] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  290.609529] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  290.609566] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000cc24793
[  290.609645] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000009472d261 to 000000000cc24793
[  290.609719] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000cc24793
[  290.609806] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000cc24793 nonblocking
[  290.609926] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  290.610000] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  290.615958] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17043, diff=1, hw=0 hw_last=0
[  290.616055] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000cc24793
[  290.616132] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  290.616195] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  290.616256] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  290.616318] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  290.616381] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000cc24793
[  290.632535] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17044, diff=1, hw=0 hw_last=0
[  290.649114] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17045, diff=1, hw=0 hw_last=0
[  290.665696] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17046, diff=1, hw=0 hw_last=0
[  290.682273] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17047, diff=1, hw=0 hw_last=0
[  290.698851] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17048, diff=1, hw=0 hw_last=0
[  290.715434] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17049, diff=1, hw=0 hw_last=0
[  290.732010] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17050, diff=1, hw=0 hw_last=0
[  290.748591] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17051, diff=1, hw=0 hw_last=0
[  290.765172] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17052, diff=1, hw=0 hw_last=0
[  290.781751] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17053, diff=1, hw=0 hw_last=0
[  290.798326] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17054, diff=1, hw=0 hw_last=0
[  290.814904] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17055, diff=1, hw=0 hw_last=0
[  290.831483] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17056, diff=1, hw=0 hw_last=0
[  290.848063] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17057, diff=1, hw=0 hw_last=0
[  290.864642] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17058, diff=1, hw=0 hw_last=0
[  290.881220] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17059, diff=1, hw=0 hw_last=0
[  290.897800] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17060, diff=1, hw=0 hw_last=0
[  290.914383] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17061, diff=1, hw=0 hw_last=0
[  290.930961] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17062, diff=1, hw=0 hw_last=0
[  290.947542] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17063, diff=1, hw=0 hw_last=0
[  290.964121] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17064, diff=1, hw=0 hw_last=0
[  290.980699] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17065, diff=1, hw=0 hw_last=0
[  290.997277] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17066, diff=1, hw=0 hw_last=0
[  291.013859] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17067, diff=1, hw=0 hw_last=0
[  291.030434] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17068, diff=1, hw=0 hw_last=0
[  291.047016] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17069, diff=1, hw=0 hw_last=0
[  291.063595] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17070, diff=1, hw=0 hw_last=0
[  291.080173] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17071, diff=1, hw=0 hw_last=0
[  291.096754] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17072, diff=1, hw=0 hw_last=0
[  291.113332] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17073, diff=1, hw=0 hw_last=0
[  291.129910] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17074, diff=1, hw=0 hw_last=0
[  291.146492] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17075, diff=1, hw=0 hw_last=0
[  291.163067] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17076, diff=1, hw=0 hw_last=0
[  291.179647] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17077, diff=1, hw=0 hw_last=0
[  291.196227] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17078, diff=1, hw=0 hw_last=0
[  291.212809] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17079, diff=1, hw=0 hw_last=0
[  291.229385] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17080, diff=1, hw=0 hw_last=0
[  291.245965] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17081, diff=1, hw=0 hw_last=0
[  291.262544] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17082, diff=1, hw=0 hw_last=0
[  291.279122] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17083, diff=1, hw=0 hw_last=0
[  291.362020] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17088, diff=1, hw=0 hw_last=0
[  291.378599] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17089, diff=1, hw=0 hw_last=0
[  291.395177] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17090, diff=1, hw=0 hw_last=0
[  291.411756] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17091, diff=1, hw=0 hw_last=0
[  291.428338] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17092, diff=1, hw=0 hw_last=0
[  291.444916] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17093, diff=1, hw=0 hw_last=0
[  291.461495] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17094, diff=1, hw=0 hw_last=0
[  291.478073] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17095, diff=1, hw=0 hw_last=0
[  291.494657] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17096, diff=1, hw=0 hw_last=0
[  291.501789] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  291.501911] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 17097 to client
[  291.504180] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  291.504279] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000001477df7c
[  291.504362] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  291.504434] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000087081e28 state to 000000001477df7c
[  291.504512] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  291.504584] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 000000001477df7c
[  291.504663] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 0000000087081e28
[  291.504737] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  291.504807] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  291.504879] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  291.504949] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  291.505024] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  291.505095] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  291.505169] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  291.505241] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  291.505312] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 000000001477df7c
[  291.505387] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  291.505460] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000001477df7c
[  291.505544] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  291.505590] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  291.505625] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000001477df7c
[  291.505704] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000eae20a14 to 000000001477df7c
[  291.505777] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000001477df7c
[  291.505856] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  291.505928] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  291.506000] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  291.506080] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000001477df7c
[  291.506155] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000001477df7c
[  291.506228] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  291.506300] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  291.506372] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  291.506445] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  291.506537] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000001477df7c
[  291.507889] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  291.511239] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17097, diff=1, hw=0 hw_last=0
[  291.527816] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17098, diff=1, hw=0 hw_last=0
[  291.544397] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17099, diff=1, hw=0 hw_last=0
[  291.560975] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17100, diff=1, hw=0 hw_last=0
[  291.577555] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17101, diff=1, hw=0 hw_last=0
[  291.594136] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17102, diff=1, hw=0 hw_last=0
[  291.610712] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17103, diff=1, hw=0 hw_last=0
[  291.627293] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17104, diff=1, hw=0 hw_last=0
[  291.643873] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17105, diff=1, hw=0 hw_last=0
[  291.660455] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17106, diff=1, hw=0 hw_last=0
[  291.677030] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17107, diff=1, hw=0 hw_last=0
[  291.693613] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17108, diff=1, hw=0 hw_last=0
[  291.710189] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17109, diff=1, hw=0 hw_last=0
[  291.726768] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17110, diff=1, hw=0 hw_last=0
[  291.735761] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  291.735881] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000001477df7c
[  291.735968] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  291.736044] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000087081e28 state to 000000001477df7c
[  291.736122] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  291.736193] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 000000001477df7c
[  291.736272] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000087081e28
[  291.736349] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  291.736425] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  291.736497] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  291.736568] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  291.736644] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  291.736715] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  291.736791] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  291.736862] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  291.942289] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17123, diff=1, hw=0 hw_last=0
[  291.958869] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17124, diff=1, hw=0 hw_last=0
[  291.975448] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17125, diff=1, hw=0 hw_last=0
[  291.992027] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17126, diff=1, hw=0 hw_last=0
[  292.008606] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17127, diff=1, hw=0 hw_last=0
[  292.025186] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17128, diff=1, hw=0 hw_last=0
[  292.041765] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17129, diff=1, hw=0 hw_last=0
[  292.058347] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17130, diff=1, hw=0 hw_last=0
[  292.074928] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17131, diff=1, hw=0 hw_last=0
[  292.091504] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17132, diff=1, hw=0 hw_last=0
[  292.108083] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17133, diff=1, hw=0 hw_last=0
[  292.124664] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17134, diff=1, hw=0 hw_last=0
[  292.141244] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17135, diff=1, hw=0 hw_last=0
[  292.157823] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17136, diff=1, hw=0 hw_last=0
[  292.174403] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17137, diff=1, hw=0 hw_last=0
[  292.190980] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17138, diff=1, hw=0 hw_last=0
[  292.207559] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17139, diff=1, hw=0 hw_last=0
[  292.224136] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17140, diff=1, hw=0 hw_last=0
[  292.240716] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17141, diff=1, hw=0 hw_last=0
[  292.257295] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17142, diff=1, hw=0 hw_last=0
[  292.273875] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17143, diff=1, hw=0 hw_last=0
[  292.290456] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17144, diff=1, hw=0 hw_last=0
[  292.307036] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17145, diff=1, hw=0 hw_last=0
[  292.323614] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17146, diff=1, hw=0 hw_last=0
[  292.340195] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17147, diff=1, hw=0 hw_last=0
[  292.356773] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17148, diff=1, hw=0 hw_last=0
[  292.373352] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17149, diff=1, hw=0 hw_last=0
[  292.389930] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17150, diff=1, hw=0 hw_last=0
[  292.406512] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17151, diff=1, hw=0 hw_last=0
[  292.423089] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17152, diff=1, hw=0 hw_last=0
[  292.439669] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17153, diff=1, hw=0 hw_last=0
[  292.456248] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17154, diff=1, hw=0 hw_last=0
[  292.472824] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17155, diff=1, hw=0 hw_last=0
[  292.489406] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17156, diff=1, hw=0 hw_last=0
[  292.505985] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17157, diff=1, hw=0 hw_last=0
[  292.522565] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17158, diff=1, hw=0 hw_last=0
[  292.539144] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17159, diff=1, hw=0 hw_last=0
[  292.555726] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17160, diff=1, hw=0 hw_last=0
[  292.572304] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17161, diff=1, hw=0 hw_last=0
[  292.588882] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17162, diff=1, hw=0 hw_last=0
[  292.605469] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17163, diff=1, hw=0 hw_last=0
[  292.607673] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  292.607793] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 17164 to client
[  292.615072] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  292.615178] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000029aaf162
[  292.615261] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  292.615333] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000002cafbe1b state to 0000000029aaf162
[  292.615411] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  292.615483] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 0000000029aaf162
[  292.615562] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 000000002cafbe1b
[  292.615636] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  292.615707] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  292.615778] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  292.615850] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  292.615926] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  292.615998] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  292.616073] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  292.616144] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  292.616216] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 0000000029aaf162
[  292.616290] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  292.616362] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000029aaf162
[  292.616444] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  292.616492] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  292.616528] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000029aaf162
[  292.616606] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000001477df7c to 0000000029aaf162
[  292.616680] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000029aaf162
[  292.616758] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  292.616831] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  292.616904] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  292.616987] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 0000000029aaf162
[  292.617062] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000029aaf162
[  292.617134] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  292.617206] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  292.617278] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  292.617350] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  292.617423] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000029aaf162
[  292.618859] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  292.622046] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17164, diff=1, hw=0 hw_last=0
[  292.638623] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17165, diff=1, hw=0 hw_last=0
[  292.655203] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17166, diff=1, hw=0 hw_last=0
[  292.671783] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17167, diff=1, hw=0 hw_last=0
[  292.688362] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17168, diff=1, hw=0 hw_last=0
[  292.704942] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17169, diff=1, hw=0 hw_last=0
[  292.721519] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17170, diff=1, hw=0 hw_last=0
[  292.738102] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17171, diff=1, hw=0 hw_last=0
[  292.754679] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17172, diff=1, hw=0 hw_last=0
[  292.771260] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17173, diff=1, hw=0 hw_last=0
[  292.787838] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17174, diff=1, hw=0 hw_last=0
[  292.804418] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17175, diff=1, hw=0 hw_last=0
[  292.820994] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17176, diff=1, hw=0 hw_last=0
[  292.837573] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17177, diff=1, hw=0 hw_last=0
[  292.847096] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  292.847215] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000029aaf162
[  292.847301] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  292.847375] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000002cafbe1b state to 0000000029aaf162
[  292.847453] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  292.847525] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 0000000029aaf162
[  292.847603] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 000000002cafbe1b
[  292.847678] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  292.847749] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  292.847820] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  292.847892] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  292.847967] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  292.848039] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  292.848115] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  292.848186] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  292.848258] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 0000000029aaf162
[  292.848332] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  292.848406] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000029aaf162
[  292.848488] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  292.848535] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  292.848572] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000029aaf162
[  292.848651] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000eae20a14 to 0000000029aaf162
[  292.848724] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000029aaf162
[  292.848812] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000029aaf162 nonblocking
[  292.848929] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  292.849005] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  292.854150] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17178, diff=1, hw=0 hw_last=0
[  292.854247] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000029aaf162
[  292.854315] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  292.854377] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  292.854439] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  292.854511] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  292.854578] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000029aaf162
[  292.870729] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17179, diff=1, hw=0 hw_last=0
[  292.887307] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17180, diff=1, hw=0 hw_last=0
[  292.903886] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17181, diff=1, hw=0 hw_last=0
[  292.920464] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17182, diff=1, hw=0 hw_last=0
[  292.937044] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17183, diff=1, hw=0 hw_last=0
[  292.953625] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17184, diff=1, hw=0 hw_last=0
[  292.970202] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17185, diff=1, hw=0 hw_last=0
[  292.986783] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17186, diff=1, hw=0 hw_last=0
[  293.003364] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17187, diff=1, hw=0 hw_last=0
[  293.019945] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17188, diff=1, hw=0 hw_last=0
[  293.036519] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17189, diff=1, hw=0 hw_last=0
[  293.053095] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17190, diff=1, hw=0 hw_last=0
[  293.451001] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17214, diff=1, hw=0 hw_last=0
[  293.467578] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17215, diff=1, hw=0 hw_last=0
[  293.484157] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17216, diff=1, hw=0 hw_last=0
[  293.500737] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17217, diff=1, hw=0 hw_last=0
[  293.517319] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17218, diff=1, hw=0 hw_last=0
[  293.533896] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17219, diff=1, hw=0 hw_last=0
[  293.550476] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17220, diff=1, hw=0 hw_last=0
[  293.567052] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17221, diff=1, hw=0 hw_last=0
[  293.583633] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17222, diff=1, hw=0 hw_last=0
[  293.600212] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17223, diff=1, hw=0 hw_last=0
[  293.616792] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17224, diff=1, hw=0 hw_last=0
[  293.633370] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17225, diff=1, hw=0 hw_last=0
[  293.649952] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17226, diff=1, hw=0 hw_last=0
[  293.666533] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17227, diff=1, hw=0 hw_last=0
[  293.683110] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17228, diff=1, hw=0 hw_last=0
[  293.699692] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17229, diff=1, hw=0 hw_last=0
[  293.712357] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  293.712478] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 17230 to client
[  293.716272] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17230, diff=1, hw=0 hw_last=0
[  293.725753] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  293.725854] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006e1bef3e
[  293.725936] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  293.726009] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000ec98bd42 state to 000000006e1bef3e
[  293.726085] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  293.726157] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 000000006e1bef3e
[  293.726236] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000ec98bd42
[  293.726310] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  293.726381] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  293.726453] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  293.726541] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  293.726619] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  293.726693] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  293.726770] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  293.726841] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  293.726913] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 000000006e1bef3e
[  293.726987] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  293.727059] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000006e1bef3e
[  293.727140] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  293.727188] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  293.727224] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006e1bef3e
[  293.727304] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000000cc24793 to 000000006e1bef3e
[  293.727377] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006e1bef3e
[  293.727456] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  293.727528] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  293.727601] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  293.727682] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000006e1bef3e
[  293.727758] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006e1bef3e
[  293.727831] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  293.727903] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  293.727976] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  293.728050] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  293.728123] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006e1bef3e
[  293.729536] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  293.732852] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17231, diff=1, hw=0 hw_last=0
[  293.749429] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17232, diff=1, hw=0 hw_last=0
[  293.766008] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17233, diff=1, hw=0 hw_last=0
[  293.782588] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17234, diff=1, hw=0 hw_last=0
[  293.799170] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17235, diff=1, hw=0 hw_last=0
[  293.815748] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17236, diff=1, hw=0 hw_last=0
[  293.832325] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17237, diff=1, hw=0 hw_last=0
[  293.848907] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17238, diff=1, hw=0 hw_last=0
[  293.865489] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17239, diff=1, hw=0 hw_last=0
[  293.882066] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17240, diff=1, hw=0 hw_last=0
[  293.898643] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17241, diff=1, hw=0 hw_last=0
[  293.915224] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17242, diff=1, hw=0 hw_last=0
[  293.931800] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17243, diff=1, hw=0 hw_last=0
[  293.948379] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17244, diff=1, hw=0 hw_last=0
[  293.957239] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  293.957354] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006e1bef3e
[  294.273729] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  294.273801] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  294.273876] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  294.273947] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  294.274019] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 00000000ab379aee
[  294.274094] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  294.274167] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000ab379aee
[  294.274247] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  294.274291] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  294.274328] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000ab379aee
[  294.274404] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000000ace560b to 00000000ab379aee
[  294.274495] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000ab379aee
[  294.274576] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  294.274652] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  294.274726] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  294.274806] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 00000000ab379aee
[  294.274881] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ab379aee
[  294.274954] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  294.275026] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  294.275099] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  294.275171] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  294.275244] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ab379aee
[  294.275709] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  294.275805] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000ab379aee
[  294.275881] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  294.275953] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000bac3ec2d state to 00000000ab379aee
[  294.276027] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  294.276099] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a743c9a8 state to 00000000ab379aee
[  294.276175] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000bac3ec2d
[  294.276250] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  294.276324] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  294.276396] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  294.276468] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  294.276542] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  294.276614] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  294.276687] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  294.276758] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  294.276831] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 00000000ab379aee
[  294.276905] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  294.276979] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000ab379aee
[  294.277054] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  294.277096] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  294.277131] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000ab379aee
[  294.277207] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000006fb5b2d2 to 00000000ab379aee
[  294.277281] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000ab379aee
[  294.277360] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000ab379aee nonblocking
[  294.277464] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  294.277530] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  294.279960] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17264, diff=1, hw=0 hw_last=0
[  294.280052] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ab379aee
[  294.280124] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  294.280185] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  294.280248] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  294.280309] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  294.280370] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ab379aee
[  294.296540] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17265, diff=1, hw=0 hw_last=0
[  294.313120] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17266, diff=1, hw=0 hw_last=0
[  294.329696] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17267, diff=1, hw=0 hw_last=0
[  294.346275] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17268, diff=1, hw=0 hw_last=0
[  294.362855] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17269, diff=1, hw=0 hw_last=0
[  294.379434] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17270, diff=1, hw=0 hw_last=0
[  294.396015] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17271, diff=1, hw=0 hw_last=0
[  294.412593] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17272, diff=1, hw=0 hw_last=0
[  294.429172] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17273, diff=1, hw=0 hw_last=0
[  294.445753] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17274, diff=1, hw=0 hw_last=0
[  294.462329] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17275, diff=1, hw=0 hw_last=0
[  294.478910] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17276, diff=1, hw=0 hw_last=0
[  294.495487] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17277, diff=1, hw=0 hw_last=0
[  294.512066] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17278, diff=1, hw=0 hw_last=0
[  294.528647] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17279, diff=1, hw=0 hw_last=0
[  294.545226] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17280, diff=1, hw=0 hw_last=0
[  294.561806] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17281, diff=1, hw=0 hw_last=0
[  294.578385] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17282, diff=1, hw=0 hw_last=0
[  294.594963] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17283, diff=1, hw=0 hw_last=0
[  294.611541] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17284, diff=1, hw=0 hw_last=0
[  294.628123] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17285, diff=1, hw=0 hw_last=0
[  294.644703] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17286, diff=1, hw=0 hw_last=0
[  294.661280] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17287, diff=1, hw=0 hw_last=0
[  294.677861] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17288, diff=1, hw=0 hw_last=0
[  294.694441] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17289, diff=1, hw=0 hw_last=0
[  294.711019] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17290, diff=1, hw=0 hw_last=0
[  294.727599] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17291, diff=1, hw=0 hw_last=0
[  294.744180] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17292, diff=1, hw=0 hw_last=0
[  294.760756] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17293, diff=1, hw=0 hw_last=0
[  294.777337] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17294, diff=1, hw=0 hw_last=0
[  294.793927] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17295, diff=1, hw=0 hw_last=0
[  294.794569] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  294.794679] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 17296 to client
[  294.802946] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  294.803048] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000fde3661d
[  294.803129] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  294.803203] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000003519e999 state to 00000000fde3661d
[  294.803281] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  294.803353] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 00000000fde3661d
[  294.803433] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 000000003519e999
[  294.803507] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  294.803578] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  294.803649] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  294.803720] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  294.803794] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  294.803865] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  294.803939] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  294.804010] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  294.804081] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 00000000fde3661d
[  294.804155] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  294.804227] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000fde3661d
[  294.804307] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  294.804355] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  294.804391] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000fde3661d
[  294.804469] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000ab379aee to 00000000fde3661d
[  294.804543] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000fde3661d
[  294.804620] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  294.804693] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  294.804766] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  294.804846] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 00000000fde3661d
[  294.804920] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000fde3661d
[  294.804993] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  294.805065] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  294.805136] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  294.805208] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  294.805280] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000fde3661d
[  294.806659] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  294.810500] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17296, diff=1, hw=0 hw_last=0
[  294.827079] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17297, diff=1, hw=0 hw_last=0
[  294.843656] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17298, diff=1, hw=0 hw_last=0
[  294.860236] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17299, diff=1, hw=0 hw_last=0
[  294.876817] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17300, diff=1, hw=0 hw_last=0
[  294.893396] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17301, diff=1, hw=0 hw_last=0
[  294.909975] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17302, diff=1, hw=0 hw_last=0
[  294.926553] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17303, diff=1, hw=0 hw_last=0
[  294.943134] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17304, diff=1, hw=0 hw_last=0
[  294.959714] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17305, diff=1, hw=0 hw_last=0
[  294.976292] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17306, diff=1, hw=0 hw_last=0
[  294.992873] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17307, diff=1, hw=0 hw_last=0
[  295.009448] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17308, diff=1, hw=0 hw_last=0
[  295.026030] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17309, diff=1, hw=0 hw_last=0
[  295.035143] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  295.035256] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000fde3661d
[  295.035342] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  295.035416] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000003519e999 state to 00000000fde3661d
[  295.035495] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  295.035567] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 00000000fde3661d
[  295.035649] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 000000003519e999
[  295.035723] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  295.035794] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  295.037045] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  295.042602] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17310, diff=1, hw=0 hw_last=0
[  295.042701] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000fde3661d
[  295.042772] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  295.042834] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  295.042896] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  295.042958] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  295.043022] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000fde3661d
[  295.059183] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17311, diff=1, hw=0 hw_last=0
[  295.075764] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17312, diff=1, hw=0 hw_last=0
[  295.092340] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17313, diff=1, hw=0 hw_last=0
[  295.108920] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17314, diff=1, hw=0 hw_last=0
[  295.125498] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17315, diff=1, hw=0 hw_last=0
[  295.142080] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17316, diff=1, hw=0 hw_last=0
[  295.158656] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17317, diff=1, hw=0 hw_last=0
[  295.175238] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17318, diff=1, hw=0 hw_last=0
[  295.191819] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17319, diff=1, hw=0 hw_last=0
[  295.208399] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17320, diff=1, hw=0 hw_last=0
[  295.224973] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17321, diff=1, hw=0 hw_last=0
[  295.241549] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17322, diff=1, hw=0 hw_last=0
[  295.258129] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17323, diff=1, hw=0 hw_last=0
[  295.274709] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17324, diff=1, hw=0 hw_last=0
[  295.291287] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17325, diff=1, hw=0 hw_last=0
[  295.307867] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17326, diff=1, hw=0 hw_last=0
[  295.324447] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17327, diff=1, hw=0 hw_last=0
[  295.341025] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17328, diff=1, hw=0 hw_last=0
[  295.357604] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17329, diff=1, hw=0 hw_last=0
[  295.374190] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17330, diff=1, hw=0 hw_last=0
[  295.390767] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17331, diff=1, hw=0 hw_last=0
[  295.407344] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17332, diff=1, hw=0 hw_last=0
[  295.423925] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17333, diff=1, hw=0 hw_last=0
[  295.440504] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17334, diff=1, hw=0 hw_last=0
[  295.457081] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17335, diff=1, hw=0 hw_last=0
[  295.473661] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17336, diff=1, hw=0 hw_last=0
[  295.474118] systemd-journald[214]: Data hash table of /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal has a fill level at 75.1 (2732 of 3640 items, 2097152 file size, 767 bytes per hash table item), suggesting rotation.
[  295.490243] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17337, diff=1, hw=0 hw_last=0
[  295.499644] systemd-journald[214]: /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal: Journal header limits reached or header out-of-date, rotating.
[  295.506817] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17338, diff=1, hw=0 hw_last=0
[  295.523402] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17339, diff=1, hw=0 hw_last=0
[  295.539980] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17340, diff=1, hw=0 hw_last=0
[  295.556558] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17341, diff=1, hw=0 hw_last=0
[  295.573136] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17342, diff=1, hw=0 hw_last=0
[  295.589714] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17343, diff=1, hw=0 hw_last=0
[  295.606294] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17344, diff=1, hw=0 hw_last=0
[  295.622873] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17345, diff=1, hw=0 hw_last=0
[  295.639453] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17346, diff=1, hw=0 hw_last=0
[  295.656032] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17347, diff=1, hw=0 hw_last=0
[  295.672611] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17348, diff=1, hw=0 hw_last=0
[  295.689190] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17349, diff=1, hw=0 hw_last=0
[  295.705772] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17350, diff=1, hw=0 hw_last=0
[  295.722350] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17351, diff=1, hw=0 hw_last=0
[  295.738930] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17352, diff=1, hw=0 hw_last=0
[  295.755509] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17353, diff=1, hw=0 hw_last=0
[  295.772088] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17354, diff=1, hw=0 hw_last=0
[  295.788666] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17355, diff=1, hw=0 hw_last=0
[  295.805248] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17356, diff=1, hw=0 hw_last=0
[  295.821827] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17357, diff=1, hw=0 hw_last=0
[  295.838404] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17358, diff=1, hw=0 hw_last=0
[  295.854986] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17359, diff=1, hw=0 hw_last=0
[  295.871567] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17360, diff=1, hw=0 hw_last=0
[  295.881610] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  295.881682] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  295.881754] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  295.881829] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  295.881901] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  295.881977] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  295.882050] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  295.882122] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 000000006c5644bb
[  295.882196] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  295.882269] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000006c5644bb
[  295.882350] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  295.882396] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  295.882450] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006c5644bb
[  295.882534] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000006e1bef3e to 000000006c5644bb
[  295.882609] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006c5644bb
[  295.882690] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  295.882763] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  295.882837] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  295.882921] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000006c5644bb
[  295.882996] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006c5644bb
[  295.883070] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  295.883142] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  295.883215] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  295.883288] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  295.883360] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006c5644bb
[  295.884747] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  295.888148] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17361, diff=1, hw=0 hw_last=0
[  295.904726] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17362, diff=1, hw=0 hw_last=0
[  295.921305] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17363, diff=1, hw=0 hw_last=0
[  295.937884] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17364, diff=1, hw=0 hw_last=0
[  295.954465] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17365, diff=1, hw=0 hw_last=0
[  295.971044] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17366, diff=1, hw=0 hw_last=0
[  295.987623] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17367, diff=1, hw=0 hw_last=0
[  296.004203] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17368, diff=1, hw=0 hw_last=0
[  296.020782] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17369, diff=1, hw=0 hw_last=0
[  296.037363] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17370, diff=1, hw=0 hw_last=0
[  296.053940] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17371, diff=1, hw=0 hw_last=0
[  296.070520] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17372, diff=1, hw=0 hw_last=0
[  296.087096] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17373, diff=1, hw=0 hw_last=0
[  296.103678] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17374, diff=1, hw=0 hw_last=0
[  296.104701] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  296.104813] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006c5644bb
[  296.104900] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  296.104974] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000082b4fa6a state to 000000006c5644bb
[  296.105053] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  296.105126] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 000000006c5644bb
[  296.105206] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000082b4fa6a
[  296.105281] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  296.105353] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  296.105425] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  296.105496] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  296.105571] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  296.105643] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  296.105719] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  296.105790] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  296.105862] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 000000006c5644bb
[  296.105937] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  296.106011] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000006c5644bb
[  296.106094] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  296.106140] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  296.106177] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006c5644bb
[  296.106257] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000000cc24793 to 000000006c5644bb
[  296.106332] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006c5644bb
[  296.106419] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006c5644bb nonblocking
[  296.106566] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  296.106641] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  296.120253] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17375, diff=1, hw=0 hw_last=0
[  296.120348] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006c5644bb
[  296.120422] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  296.120485] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  296.120550] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  296.120613] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  296.120675] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006c5644bb
[  296.136831] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17376, diff=1, hw=0 hw_last=0
[  296.153409] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17377, diff=1, hw=0 hw_last=0
[  296.252884] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17383, diff=1, hw=0 hw_last=0
[  296.269465] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17384, diff=1, hw=0 hw_last=0
[  296.286047] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17385, diff=1, hw=0 hw_last=0
[  296.302626] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17386, diff=1, hw=0 hw_last=0
[  296.319198] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17387, diff=1, hw=0 hw_last=0
[  296.335778] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17388, diff=1, hw=0 hw_last=0
[  296.352357] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17389, diff=1, hw=0 hw_last=0
[  296.368935] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17390, diff=1, hw=0 hw_last=0
[  296.385514] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17391, diff=1, hw=0 hw_last=0
[  296.402093] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17392, diff=1, hw=0 hw_last=0
[  296.418672] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17393, diff=1, hw=0 hw_last=0
[  296.435258] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17394, diff=1, hw=0 hw_last=0
[  296.451836] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17395, diff=1, hw=0 hw_last=0
[  296.468413] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17396, diff=1, hw=0 hw_last=0
[  296.484994] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17397, diff=1, hw=0 hw_last=0
[  296.501573] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17398, diff=1, hw=0 hw_last=0
[  296.518152] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17399, diff=1, hw=0 hw_last=0
[  296.534730] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17400, diff=1, hw=0 hw_last=0
[  296.551309] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17401, diff=1, hw=0 hw_last=0
[  296.567889] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17402, diff=1, hw=0 hw_last=0
[  296.584466] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17403, diff=1, hw=0 hw_last=0
[  296.601046] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17404, diff=1, hw=0 hw_last=0
[  296.617625] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17405, diff=1, hw=0 hw_last=0
[  296.634205] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17406, diff=1, hw=0 hw_last=0
[  296.650784] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17407, diff=1, hw=0 hw_last=0
[  296.667365] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17408, diff=1, hw=0 hw_last=0
[  296.683943] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17409, diff=1, hw=0 hw_last=0
[  296.700522] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17410, diff=1, hw=0 hw_last=0
[  296.717104] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17411, diff=1, hw=0 hw_last=0
[  296.733682] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17412, diff=1, hw=0 hw_last=0
[  296.750260] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17413, diff=1, hw=0 hw_last=0
[  296.766839] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17414, diff=1, hw=0 hw_last=0
[  296.783418] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17415, diff=1, hw=0 hw_last=0
[  296.800002] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17416, diff=1, hw=0 hw_last=0
[  296.816576] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17417, diff=1, hw=0 hw_last=0
[  296.833155] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17418, diff=1, hw=0 hw_last=0
[  296.849734] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17419, diff=1, hw=0 hw_last=0
[  296.866315] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17420, diff=1, hw=0 hw_last=0
[  296.882896] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17421, diff=1, hw=0 hw_last=0
[  296.899474] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17422, diff=1, hw=0 hw_last=0
[  296.916053] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17423, diff=1, hw=0 hw_last=0
[  296.932630] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17424, diff=1, hw=0 hw_last=0
[  296.949208] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17425, diff=1, hw=0 hw_last=0
[  296.965790] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17426, diff=1, hw=0 hw_last=0
[  296.982377] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17427, diff=1, hw=0 hw_last=0
[  296.984626] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  296.984745] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 17428 to client
[  296.992028] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  296.992133] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000018d86a98
[  296.992216] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  296.992289] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000055579822 state to 0000000018d86a98
[  296.992367] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  296.992439] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 0000000018d86a98
[  296.992519] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000055579822
[  296.992594] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  296.992664] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  296.992735] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  296.992807] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  296.992881] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  296.992953] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  296.993028] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  296.993099] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  296.993170] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 0000000018d86a98
[  296.993245] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  296.993316] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000018d86a98
[  297.224350] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 0000000055579822
[  297.224426] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  297.224497] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  297.224568] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  297.224639] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  297.224715] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  297.224786] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  297.224861] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  297.224932] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  297.225004] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 0000000018d86a98
[  297.225078] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  297.225152] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000018d86a98
[  297.225234] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  297.225282] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  297.225318] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000018d86a98
[  297.225397] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000c0cf118d to 0000000018d86a98
[  297.225470] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000018d86a98
[  297.225558] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000018d86a98 nonblocking
[  297.225678] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  297.225768] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  297.231059] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17442, diff=1, hw=0 hw_last=0
[  297.231175] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000018d86a98
[  297.231245] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  297.231308] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  297.231370] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  297.231432] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  297.231497] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000018d86a98
[  297.247636] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17443, diff=1, hw=0 hw_last=0
[  297.264214] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17444, diff=1, hw=0 hw_last=0
[  297.280792] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17445, diff=1, hw=0 hw_last=0
[  297.297370] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17446, diff=1, hw=0 hw_last=0
[  297.313950] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17447, diff=1, hw=0 hw_last=0
[  297.330532] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17448, diff=1, hw=0 hw_last=0
[  297.347108] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17449, diff=1, hw=0 hw_last=0
[  297.363688] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17450, diff=1, hw=0 hw_last=0
[  297.380268] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17451, diff=1, hw=0 hw_last=0
[  297.396848] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17452, diff=1, hw=0 hw_last=0
[  297.413425] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17453, diff=1, hw=0 hw_last=0
[  297.430003] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17454, diff=1, hw=0 hw_last=0
[  297.446583] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17455, diff=1, hw=0 hw_last=0
[  297.463161] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17456, diff=1, hw=0 hw_last=0
[  297.479741] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17457, diff=1, hw=0 hw_last=0
[  297.496320] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17458, diff=1, hw=0 hw_last=0
[  297.512900] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17459, diff=1, hw=0 hw_last=0
[  297.529478] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17460, diff=1, hw=0 hw_last=0
[  297.546061] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17461, diff=1, hw=0 hw_last=0
[  297.562640] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17462, diff=1, hw=0 hw_last=0
[  297.579218] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17463, diff=1, hw=0 hw_last=0
[  297.595797] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17464, diff=1, hw=0 hw_last=0
[  297.612377] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17465, diff=1, hw=0 hw_last=0
[  297.628954] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17466, diff=1, hw=0 hw_last=0
[  297.645533] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17467, diff=1, hw=0 hw_last=0
[  297.662113] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17468, diff=1, hw=0 hw_last=0
[  297.678692] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17469, diff=1, hw=0 hw_last=0
[  297.695271] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17470, diff=1, hw=0 hw_last=0
[  297.711850] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17471, diff=1, hw=0 hw_last=0
[  297.728429] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17472, diff=1, hw=0 hw_last=0
[  297.745008] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17473, diff=1, hw=0 hw_last=0
[  297.761587] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17474, diff=1, hw=0 hw_last=0
[  297.778168] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17475, diff=1, hw=0 hw_last=0
[  297.794747] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17476, diff=1, hw=0 hw_last=0
[  297.811327] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17477, diff=1, hw=0 hw_last=0
[  297.827907] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17478, diff=1, hw=0 hw_last=0
[  297.844485] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17479, diff=1, hw=0 hw_last=0
[  297.861066] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17480, diff=1, hw=0 hw_last=0
[  297.877641] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17481, diff=1, hw=0 hw_last=0
[  298.103751] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000eae20a14
[  298.103831] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000001477df7c to 00000000eae20a14
[  298.103905] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000eae20a14
[  298.103983] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  298.104056] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  298.104129] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  298.104210] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 00000000eae20a14
[  298.104285] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000eae20a14
[  298.104357] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  298.104430] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  298.104503] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  298.104576] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  298.104649] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000eae20a14
[  298.106153] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  298.109758] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17495, diff=1, hw=0 hw_last=0
[  298.126335] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17496, diff=1, hw=0 hw_last=0
[  298.142912] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17497, diff=1, hw=0 hw_last=0
[  298.159495] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17498, diff=1, hw=0 hw_last=0
[  298.176074] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17499, diff=1, hw=0 hw_last=0
[  298.192653] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17500, diff=1, hw=0 hw_last=0
[  298.209239] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17501, diff=1, hw=0 hw_last=0
[  298.225817] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17502, diff=1, hw=0 hw_last=0
[  298.242395] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17503, diff=1, hw=0 hw_last=0
[  298.258972] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17504, diff=1, hw=0 hw_last=0
[  298.275550] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17505, diff=1, hw=0 hw_last=0
[  298.292129] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17506, diff=1, hw=0 hw_last=0
[  298.308706] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17507, diff=1, hw=0 hw_last=0
[  298.325284] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17508, diff=1, hw=0 hw_last=0
[  298.335102] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  298.335220] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000eae20a14
[  298.335309] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  298.335382] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000087081e28 state to 00000000eae20a14
[  298.335458] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  298.335530] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000e8543c49 state to 00000000eae20a14
[  298.335612] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000087081e28
[  298.335687] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  298.335758] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  298.335829] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  298.335900] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  298.335975] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  298.336046] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  298.336121] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  298.336192] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  298.336263] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 00000000eae20a14
[  298.336339] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  298.336412] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000eae20a14
[  298.336495] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  298.336541] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  298.336577] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000eae20a14
[  298.336655] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000e0dcab9c to 00000000eae20a14
[  298.336728] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000eae20a14
[  298.336816] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000eae20a14 nonblocking
[  298.336936] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  298.337014] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  298.341862] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17509, diff=1, hw=0 hw_last=0
[  298.341971] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000eae20a14
[  298.342040] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  298.342104] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  298.342166] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  298.342229] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  298.342292] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000eae20a14
[  298.358441] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17510, diff=1, hw=0 hw_last=0
[  298.375020] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17511, diff=1, hw=0 hw_last=0
[  298.391600] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17512, diff=1, hw=0 hw_last=0
[  298.408178] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17513, diff=1, hw=0 hw_last=0
[  298.424756] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17514, diff=1, hw=0 hw_last=0
[  298.441336] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17515, diff=1, hw=0 hw_last=0
[  298.457914] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17516, diff=1, hw=0 hw_last=0
[  298.474495] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17517, diff=1, hw=0 hw_last=0
[  298.491075] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17518, diff=1, hw=0 hw_last=0
[  298.507654] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17519, diff=1, hw=0 hw_last=0
[  298.673445] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17529, diff=1, hw=0 hw_last=0
[  298.690024] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17530, diff=1, hw=0 hw_last=0
[  298.706612] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17531, diff=1, hw=0 hw_last=0
[  298.723181] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17532, diff=1, hw=0 hw_last=0
[  298.739762] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17533, diff=1, hw=0 hw_last=0
[  298.756340] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17534, diff=1, hw=0 hw_last=0
[  298.772918] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17535, diff=1, hw=0 hw_last=0
[  298.789497] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17536, diff=1, hw=0 hw_last=0
[  298.806077] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17537, diff=1, hw=0 hw_last=0
[  298.822657] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17538, diff=1, hw=0 hw_last=0
[  298.839235] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17539, diff=1, hw=0 hw_last=0
[  298.855817] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17540, diff=1, hw=0 hw_last=0
[  298.872399] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17541, diff=1, hw=0 hw_last=0
[  298.888974] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17542, diff=1, hw=0 hw_last=0
[  298.905553] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17543, diff=1, hw=0 hw_last=0
[  298.922132] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17544, diff=1, hw=0 hw_last=0
[  298.938712] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17545, diff=1, hw=0 hw_last=0
[  298.955290] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17546, diff=1, hw=0 hw_last=0
[  298.971871] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17547, diff=1, hw=0 hw_last=0
[  298.988449] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17548, diff=1, hw=0 hw_last=0
[  299.005028] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17549, diff=1, hw=0 hw_last=0
[  299.021609] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17550, diff=1, hw=0 hw_last=0
[  299.038190] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17551, diff=1, hw=0 hw_last=0
[  299.054766] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17552, diff=1, hw=0 hw_last=0
[  299.071346] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17553, diff=1, hw=0 hw_last=0
[  299.087923] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17554, diff=1, hw=0 hw_last=0
[  299.104504] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17555, diff=1, hw=0 hw_last=0
[  299.121082] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17556, diff=1, hw=0 hw_last=0
[  299.137662] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17557, diff=1, hw=0 hw_last=0
[  299.154241] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17558, diff=1, hw=0 hw_last=0
[  299.170820] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17559, diff=1, hw=0 hw_last=0
[  299.187403] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17560, diff=1, hw=0 hw_last=0
[  299.196375] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  299.196496] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 17561 to client
[  299.197789] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  299.197895] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008a640c91
[  299.197980] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  299.198055] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000002cafbe1b state to 000000008a640c91
[  299.198133] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  299.198206] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 000000008a640c91
[  299.198286] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 000000002cafbe1b
[  299.198361] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  299.198461] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  299.198542] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  299.198623] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  299.198703] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  299.198777] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  299.198853] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  299.198926] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  299.199000] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 000000008a640c91
[  299.199076] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  299.199149] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000008a640c91
[  299.199232] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  299.199283] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  299.199319] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008a640c91
[  299.199399] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000006e1bef3e to 000000008a640c91
[  299.199473] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008a640c91
[  299.199553] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  299.199627] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  299.199702] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  299.199783] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000008a640c91
[  299.199858] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008a640c91
[  299.199931] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  299.200004] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  299.200076] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  299.200149] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  299.200222] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008a640c91
[  299.201682] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  299.432185] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000008a640c91 nonblocking
[  299.432303] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  299.432374] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  299.436091] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17575, diff=1, hw=0 hw_last=0
[  299.436181] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008a640c91
[  299.436259] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  299.436321] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  299.436384] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  299.436445] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  299.436509] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008a640c91
[  299.452668] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17576, diff=1, hw=0 hw_last=0
[  299.469247] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17577, diff=1, hw=0 hw_last=0
[  299.485826] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17578, diff=1, hw=0 hw_last=0
[  299.502406] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17579, diff=1, hw=0 hw_last=0
[  299.518984] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17580, diff=1, hw=0 hw_last=0
[  299.535562] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17581, diff=1, hw=0 hw_last=0
[  299.552145] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17582, diff=1, hw=0 hw_last=0
[  299.568722] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17583, diff=1, hw=0 hw_last=0
[  299.585301] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17584, diff=1, hw=0 hw_last=0
[  299.601881] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17585, diff=1, hw=0 hw_last=0
[  299.618460] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17586, diff=1, hw=0 hw_last=0
[  299.635038] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17587, diff=1, hw=0 hw_last=0
[  299.651616] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17588, diff=1, hw=0 hw_last=0
[  299.668195] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17589, diff=1, hw=0 hw_last=0
[  299.684774] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17590, diff=1, hw=0 hw_last=0
[  299.701353] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17591, diff=1, hw=0 hw_last=0
[  299.717933] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17592, diff=1, hw=0 hw_last=0
[  299.734512] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17593, diff=1, hw=0 hw_last=0
[  299.751094] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17594, diff=1, hw=0 hw_last=0
[  299.767671] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17595, diff=1, hw=0 hw_last=0
[  299.784251] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17596, diff=1, hw=0 hw_last=0
[  299.800831] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17597, diff=1, hw=0 hw_last=0
[  299.817409] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17598, diff=1, hw=0 hw_last=0
[  299.833987] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17599, diff=1, hw=0 hw_last=0
[  299.850568] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17600, diff=1, hw=0 hw_last=0
[  299.867146] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17601, diff=1, hw=0 hw_last=0
[  299.883726] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17602, diff=1, hw=0 hw_last=0
[  299.900304] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17603, diff=1, hw=0 hw_last=0
[  299.916885] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17604, diff=1, hw=0 hw_last=0
[  299.933463] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17605, diff=1, hw=0 hw_last=0
[  299.950042] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17606, diff=1, hw=0 hw_last=0
[  299.966622] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17607, diff=1, hw=0 hw_last=0
[  299.983203] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17608, diff=1, hw=0 hw_last=0
[  299.999780] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17609, diff=1, hw=0 hw_last=0
[  300.016360] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17610, diff=1, hw=0 hw_last=0
[  300.032940] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17611, diff=1, hw=0 hw_last=0
[  300.049517] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17612, diff=1, hw=0 hw_last=0
[  300.066097] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17613, diff=1, hw=0 hw_last=0
[  300.082678] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17614, diff=1, hw=0 hw_last=0
[  300.099256] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17615, diff=1, hw=0 hw_last=0
[  300.115834] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17616, diff=1, hw=0 hw_last=0
[  300.132416] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17617, diff=1, hw=0 hw_last=0
[  300.148992] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17618, diff=1, hw=0 hw_last=0
[  300.165572] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17619, diff=1, hw=0 hw_last=0
[  300.182152] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17620, diff=1, hw=0 hw_last=0
[  300.198730] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17621, diff=1, hw=0 hw_last=0
[  300.215311] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17622, diff=1, hw=0 hw_last=0
[  300.231890] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17623, diff=1, hw=0 hw_last=0
[  300.248468] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17624, diff=1, hw=0 hw_last=0
[  300.265047] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17625, diff=1, hw=0 hw_last=0
[  300.281627] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17626, diff=1, hw=0 hw_last=0
[  300.308070] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  300.308141] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  300.308213] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  300.308284] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  300.308360] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  300.308431] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  300.308507] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  300.308579] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  300.308651] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 000000000cc24793
[  300.308725] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  300.308798] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000000cc24793
[  300.308880] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  300.308925] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  300.308961] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000cc24793
[  300.309038] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000ab379aee to 000000000cc24793
[  300.309112] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000cc24793
[  300.309191] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  300.309263] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  300.309337] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  300.309419] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000000cc24793
[  300.309494] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000cc24793
[  300.309567] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  300.309639] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  300.309711] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  300.309783] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  300.309855] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000cc24793
[  300.311317] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  300.314792] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17628, diff=1, hw=0 hw_last=0
[  300.331368] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17629, diff=1, hw=0 hw_last=0
[  300.347948] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17630, diff=1, hw=0 hw_last=0
[  300.364527] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17631, diff=1, hw=0 hw_last=0
[  300.381109] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17632, diff=1, hw=0 hw_last=0
[  300.397687] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17633, diff=1, hw=0 hw_last=0
[  300.414266] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17634, diff=1, hw=0 hw_last=0
[  300.430846] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17635, diff=1, hw=0 hw_last=0
[  300.447424] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17636, diff=1, hw=0 hw_last=0
[  300.464006] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17637, diff=1, hw=0 hw_last=0
[  300.480582] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17638, diff=1, hw=0 hw_last=0
[  300.497162] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17639, diff=1, hw=0 hw_last=0
[  300.513739] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17640, diff=1, hw=0 hw_last=0
[  300.530319] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17641, diff=1, hw=0 hw_last=0
[  300.531623] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  300.531736] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000cc24793
[  300.531822] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  300.531896] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000215b6887 state to 000000000cc24793
[  300.531973] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  300.532046] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000adb7ad91 state to 000000000cc24793
[  300.532126] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000215b6887
[  300.532200] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  300.532272] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  300.532343] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  300.532414] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  300.532489] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  300.532560] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  300.532635] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  300.532706] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  300.532777] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 000000000cc24793
[  300.532852] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  300.532926] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000000cc24793
[  300.533008] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  300.533054] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  300.533091] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000cc24793
[  300.533169] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000095dd8ec0 to 000000000cc24793
[  300.533245] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000cc24793
[  300.533339] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000cc24793 nonblocking
[  300.533470] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  300.533551] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  300.546898] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17642, diff=1, hw=0 hw_last=0
[  300.547006] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000cc24793
[  300.547076] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  300.547140] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  300.547202] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  300.547265] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  300.547329] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000cc24793
[  300.563474] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17643, diff=1, hw=0 hw_last=0
[  300.580054] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17644, diff=1, hw=0 hw_last=0
[  300.679528] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17650, diff=1, hw=0 hw_last=0
[  300.696110] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17651, diff=1, hw=0 hw_last=0
[  300.712689] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17652, diff=1, hw=0 hw_last=0
[  300.729264] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17653, diff=1, hw=0 hw_last=0
[  300.745843] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17654, diff=1, hw=0 hw_last=0
[  300.762422] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17655, diff=1, hw=0 hw_last=0
[  300.779003] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17656, diff=1, hw=0 hw_last=0
[  300.795580] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17657, diff=1, hw=0 hw_last=0
[  300.812160] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17658, diff=1, hw=0 hw_last=0
[  300.828739] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17659, diff=1, hw=0 hw_last=0
[  300.845318] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17660, diff=1, hw=0 hw_last=0
[  300.861899] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17661, diff=1, hw=0 hw_last=0
[  300.878480] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17662, diff=1, hw=0 hw_last=0
[  300.895063] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17663, diff=1, hw=0 hw_last=0
[  300.911638] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17664, diff=1, hw=0 hw_last=0
[  300.928216] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17665, diff=1, hw=0 hw_last=0
[  300.944795] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17666, diff=1, hw=0 hw_last=0
[  300.961375] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17667, diff=1, hw=0 hw_last=0
[  300.977954] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17668, diff=1, hw=0 hw_last=0
[  300.994532] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17669, diff=1, hw=0 hw_last=0
[  301.011110] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17670, diff=1, hw=0 hw_last=0
[  301.027692] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17671, diff=1, hw=0 hw_last=0
[  301.044269] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17672, diff=1, hw=0 hw_last=0
[  301.060850] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17673, diff=1, hw=0 hw_last=0
[  301.077427] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17674, diff=1, hw=0 hw_last=0
[  301.094010] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17675, diff=1, hw=0 hw_last=0
[  301.110589] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17676, diff=1, hw=0 hw_last=0
[  301.127171] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17677, diff=1, hw=0 hw_last=0
[  301.143745] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17678, diff=1, hw=0 hw_last=0
[  301.160323] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17679, diff=1, hw=0 hw_last=0
[  301.176903] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17680, diff=1, hw=0 hw_last=0
[  301.193487] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17681, diff=1, hw=0 hw_last=0
[  301.210062] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17682, diff=1, hw=0 hw_last=0
[  301.226643] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17683, diff=1, hw=0 hw_last=0
[  301.243221] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17684, diff=1, hw=0 hw_last=0
[  301.259799] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17685, diff=1, hw=0 hw_last=0
[  301.276378] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17686, diff=1, hw=0 hw_last=0
[  301.292958] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17687, diff=1, hw=0 hw_last=0
[  301.309537] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17688, diff=1, hw=0 hw_last=0
[  301.326115] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17689, diff=1, hw=0 hw_last=0
[  301.342696] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17690, diff=1, hw=0 hw_last=0
[  301.359276] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17691, diff=1, hw=0 hw_last=0
[  301.375854] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17692, diff=1, hw=0 hw_last=0
[  301.392435] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17693, diff=1, hw=0 hw_last=0
[  301.409012] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17694, diff=1, hw=0 hw_last=0
[  301.425595] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17695, diff=1, hw=0 hw_last=0
[  301.434765] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  301.434887] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 17696 to client
[  301.436191] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  301.436298] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000ace560b
[  301.436382] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  301.436456] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000bac3ec2d state to 000000000ace560b
[  301.436536] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  301.436609] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 000000000ace560b
[  301.436689] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000bac3ec2d
[  301.436764] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  301.436838] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  301.436914] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  301.436989] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  301.437065] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  301.437137] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  301.437213] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  301.437285] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  301.437357] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000000ace560b
[  301.668194] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  301.668313] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000ace560b
[  301.668402] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  301.668476] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000bac3ec2d state to 000000000ace560b
[  301.668557] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  301.668634] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 000000000ace560b
[  301.668715] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000bac3ec2d
[  301.668790] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  301.668861] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  301.668933] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  301.669004] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  301.669079] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  301.669150] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  301.669225] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  301.669296] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  301.669368] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000000ace560b
[  301.669442] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  301.669516] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000000ace560b
[  301.669598] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  301.669646] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  301.669683] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000ace560b
[  301.669762] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000d7e48c6b to 000000000ace560b
[  301.669836] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000ace560b
[  301.669924] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000ace560b nonblocking
[  301.670050] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  301.670125] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  301.674284] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17710, diff=1, hw=0 hw_last=0
[  301.674393] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000ace560b
[  301.674466] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  301.674529] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  301.674592] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  301.674654] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  301.674718] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000ace560b
[  301.690861] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17711, diff=1, hw=0 hw_last=0
[  301.707439] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17712, diff=1, hw=0 hw_last=0
[  301.724018] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17713, diff=1, hw=0 hw_last=0
[  301.740597] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17714, diff=1, hw=0 hw_last=0
[  301.757176] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17715, diff=1, hw=0 hw_last=0
[  301.773755] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17716, diff=1, hw=0 hw_last=0
[  301.790336] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17717, diff=1, hw=0 hw_last=0
[  301.806914] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17718, diff=1, hw=0 hw_last=0
[  301.823493] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17719, diff=1, hw=0 hw_last=0
[  301.840073] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17720, diff=1, hw=0 hw_last=0
[  301.856650] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17721, diff=1, hw=0 hw_last=0
[  301.873229] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17722, diff=1, hw=0 hw_last=0
[  301.889808] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17723, diff=1, hw=0 hw_last=0
[  301.906389] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17724, diff=1, hw=0 hw_last=0
[  301.922966] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17725, diff=1, hw=0 hw_last=0
[  301.939545] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17726, diff=1, hw=0 hw_last=0
[  301.956125] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17727, diff=1, hw=0 hw_last=0
[  301.972704] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17728, diff=1, hw=0 hw_last=0
[  301.989284] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17729, diff=1, hw=0 hw_last=0
[  302.005865] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17730, diff=1, hw=0 hw_last=0
[  302.022447] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17731, diff=1, hw=0 hw_last=0
[  302.039021] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17732, diff=1, hw=0 hw_last=0
[  302.055601] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17733, diff=1, hw=0 hw_last=0
[  302.072180] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17734, diff=1, hw=0 hw_last=0
[  302.088761] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17735, diff=1, hw=0 hw_last=0
[  302.105339] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17736, diff=1, hw=0 hw_last=0
[  302.121919] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17737, diff=1, hw=0 hw_last=0
[  302.138497] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17738, diff=1, hw=0 hw_last=0
[  302.155077] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17739, diff=1, hw=0 hw_last=0
[  302.171656] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17740, diff=1, hw=0 hw_last=0
[  302.188236] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17741, diff=1, hw=0 hw_last=0
[  302.204815] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17742, diff=1, hw=0 hw_last=0
[  302.221393] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17743, diff=1, hw=0 hw_last=0
[  302.237973] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17744, diff=1, hw=0 hw_last=0
[  302.254553] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17745, diff=1, hw=0 hw_last=0
[  302.271130] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17746, diff=1, hw=0 hw_last=0
[  302.287709] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17747, diff=1, hw=0 hw_last=0
[  302.304288] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17748, diff=1, hw=0 hw_last=0
[  302.320869] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17749, diff=1, hw=0 hw_last=0
[  302.337447] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17750, diff=1, hw=0 hw_last=0
[  302.354027] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17751, diff=1, hw=0 hw_last=0
[  302.370607] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17752, diff=1, hw=0 hw_last=0
[  302.387185] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17753, diff=1, hw=0 hw_last=0
[  302.403764] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17754, diff=1, hw=0 hw_last=0
[  302.420342] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17755, diff=1, hw=0 hw_last=0
[  302.436922] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17756, diff=1, hw=0 hw_last=0
[  302.453501] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17757, diff=1, hw=0 hw_last=0
[  302.470080] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17758, diff=1, hw=0 hw_last=0
[  302.486661] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17759, diff=1, hw=0 hw_last=0
[  302.503239] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17760, diff=1, hw=0 hw_last=0
[  302.519819] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17761, diff=1, hw=0 hw_last=0
[  302.536397] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17762, diff=1, hw=0 hw_last=0
[  302.552979] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17763, diff=1, hw=0 hw_last=0
[  302.564834] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  302.564952] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 17764 to client
[  302.569561] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17764, diff=1, hw=0 hw_last=0
[  302.579222] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  302.579318] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008e9f664b
[  302.579401] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  302.579474] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000003519e999 state to 000000008e9f664b
[  302.579551] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  302.579623] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000e8543c49 state to 000000008e9f664b
[  302.579702] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 000000003519e999
[  302.579776] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  302.579848] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  302.579919] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  302.579990] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  302.580065] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  302.580136] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  302.580213] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  302.580285] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  302.580358] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 000000008e9f664b
[  302.580433] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  302.580506] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000008e9f664b
[  302.580589] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  302.580637] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  302.580674] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008e9f664b
[  302.580755] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000008a640c91 to 000000008e9f664b
[  302.580830] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008e9f664b
[  302.580909] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  302.580982] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  302.581058] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  302.581147] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000008e9f664b
[  302.581226] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008e9f664b
[  302.581298] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  302.581370] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  302.581442] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  302.581514] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  302.581586] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008e9f664b
[  302.583066] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  302.586140] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17765, diff=1, hw=0 hw_last=0
[  302.602720] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17766, diff=1, hw=0 hw_last=0
[  302.619301] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17767, diff=1, hw=0 hw_last=0
[  302.635877] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17768, diff=1, hw=0 hw_last=0
[  302.652459] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17769, diff=1, hw=0 hw_last=0
[  302.669039] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17770, diff=1, hw=0 hw_last=0
[  302.685614] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17771, diff=1, hw=0 hw_last=0
[  302.702197] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17772, diff=1, hw=0 hw_last=0
[  302.718777] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17773, diff=1, hw=0 hw_last=0
[  302.735354] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17774, diff=1, hw=0 hw_last=0
[  302.751932] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17775, diff=1, hw=0 hw_last=0
[  302.768513] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17776, diff=1, hw=0 hw_last=0
[  302.785089] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17777, diff=1, hw=0 hw_last=0
[  302.934298] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17786, diff=1, hw=0 hw_last=0
[  302.950878] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17787, diff=1, hw=0 hw_last=0
[  302.967460] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17788, diff=1, hw=0 hw_last=0
[  302.984036] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17789, diff=1, hw=0 hw_last=0
[  303.000615] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17790, diff=1, hw=0 hw_last=0
[  303.017193] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17791, diff=1, hw=0 hw_last=0
[  303.033773] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17792, diff=1, hw=0 hw_last=0
[  303.050352] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17793, diff=1, hw=0 hw_last=0
[  303.066932] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17794, diff=1, hw=0 hw_last=0
[  303.083511] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17795, diff=1, hw=0 hw_last=0
[  303.100089] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17796, diff=1, hw=0 hw_last=0
[  303.116671] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17797, diff=1, hw=0 hw_last=0
[  303.133254] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17798, diff=1, hw=0 hw_last=0
[  303.149828] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17799, diff=1, hw=0 hw_last=0
[  303.166408] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17800, diff=1, hw=0 hw_last=0
[  303.182986] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17801, diff=1, hw=0 hw_last=0
[  303.199566] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17802, diff=1, hw=0 hw_last=0
[  303.216145] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17803, diff=1, hw=0 hw_last=0
[  303.232724] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17804, diff=1, hw=0 hw_last=0
[  303.249304] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17805, diff=1, hw=0 hw_last=0
[  303.265882] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17806, diff=1, hw=0 hw_last=0
[  303.282461] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17807, diff=1, hw=0 hw_last=0
[  303.299042] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17808, diff=1, hw=0 hw_last=0
[  303.315620] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17809, diff=1, hw=0 hw_last=0
[  303.332199] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17810, diff=1, hw=0 hw_last=0
[  303.348779] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17811, diff=1, hw=0 hw_last=0
[  303.365358] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17812, diff=1, hw=0 hw_last=0
[  303.381940] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17813, diff=1, hw=0 hw_last=0
[  303.398518] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17814, diff=1, hw=0 hw_last=0
[  303.415096] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17815, diff=1, hw=0 hw_last=0
[  303.431675] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17816, diff=1, hw=0 hw_last=0
[  303.448254] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17817, diff=1, hw=0 hw_last=0
[  303.464833] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17818, diff=1, hw=0 hw_last=0
[  303.481411] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17819, diff=1, hw=0 hw_last=0
[  303.497991] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17820, diff=1, hw=0 hw_last=0
[  303.514572] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17821, diff=1, hw=0 hw_last=0
[  303.531151] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17822, diff=1, hw=0 hw_last=0
[  303.547730] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17823, diff=1, hw=0 hw_last=0
[  303.564310] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17824, diff=1, hw=0 hw_last=0
[  303.580887] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17825, diff=1, hw=0 hw_last=0
[  303.597466] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17826, diff=1, hw=0 hw_last=0
[  303.614046] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17827, diff=1, hw=0 hw_last=0
[  303.630627] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17828, diff=1, hw=0 hw_last=0
[  303.644201] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  303.644322] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 17829 to client
[  303.647211] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17829, diff=1, hw=0 hw_last=0
[  303.656596] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  303.656686] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000305e034
[  303.656770] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  303.656843] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000fefb5c61 state to 000000000305e034
[  303.656919] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  303.656991] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 000000000305e034
[  303.657071] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000fefb5c61
[  303.657146] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  303.657218] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  303.657289] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  303.657361] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  303.657437] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  303.657508] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  303.657584] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  303.657655] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  303.657728] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 000000000305e034
[  303.657802] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  303.657876] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000000305e034
[  303.657958] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  303.658005] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  303.890050] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  303.890121] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  303.890194] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  303.890266] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  303.890384] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  303.890462] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  303.890541] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  303.890615] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  303.890688] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 000000000305e034
[  303.890765] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  303.890840] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000000305e034
[  303.890924] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  303.890976] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  303.891013] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000305e034
[  303.891094] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000001477df7c to 000000000305e034
[  303.891170] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000305e034
[  303.891259] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000305e034 nonblocking
[  303.891376] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  303.891456] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  303.895894] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17844, diff=1, hw=0 hw_last=0
[  303.895986] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000305e034
[  303.896057] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  303.896121] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  303.896183] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  303.896246] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  303.896310] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000305e034
[  303.912473] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17845, diff=1, hw=0 hw_last=0
[  303.929054] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17846, diff=1, hw=0 hw_last=0
[  303.945630] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17847, diff=1, hw=0 hw_last=0
[  303.962210] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17848, diff=1, hw=0 hw_last=0
[  303.978789] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17849, diff=1, hw=0 hw_last=0
[  303.995369] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17850, diff=1, hw=0 hw_last=0
[  304.011948] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17851, diff=1, hw=0 hw_last=0
[  304.028527] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17852, diff=1, hw=0 hw_last=0
[  304.045108] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17853, diff=1, hw=0 hw_last=0
[  304.061685] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17854, diff=1, hw=0 hw_last=0
[  304.078263] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17855, diff=1, hw=0 hw_last=0
[  304.094842] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17856, diff=1, hw=0 hw_last=0
[  304.111421] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17857, diff=1, hw=0 hw_last=0
[  304.128000] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17858, diff=1, hw=0 hw_last=0
[  304.144579] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17859, diff=1, hw=0 hw_last=0
[  304.161161] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17860, diff=1, hw=0 hw_last=0
[  304.177738] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17861, diff=1, hw=0 hw_last=0
[  304.194318] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17862, diff=1, hw=0 hw_last=0
[  304.210899] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17863, diff=1, hw=0 hw_last=0
[  304.227475] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17864, diff=1, hw=0 hw_last=0
[  304.244058] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17865, diff=1, hw=0 hw_last=0
[  304.260635] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17866, diff=1, hw=0 hw_last=0
[  304.277214] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17867, diff=1, hw=0 hw_last=0
[  304.293794] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17868, diff=1, hw=0 hw_last=0
[  304.310372] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17869, diff=1, hw=0 hw_last=0
[  304.326951] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17870, diff=1, hw=0 hw_last=0
[  304.343531] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17871, diff=1, hw=0 hw_last=0
[  304.360109] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17872, diff=1, hw=0 hw_last=0
[  304.376688] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17873, diff=1, hw=0 hw_last=0
[  304.393268] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17874, diff=1, hw=0 hw_last=0
[  304.409847] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17875, diff=1, hw=0 hw_last=0
[  304.426425] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17876, diff=1, hw=0 hw_last=0
[  304.443007] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17877, diff=1, hw=0 hw_last=0
[  304.459588] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17878, diff=1, hw=0 hw_last=0
[  304.476164] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17879, diff=1, hw=0 hw_last=0
[  304.492743] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17880, diff=1, hw=0 hw_last=0
[  304.509323] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17881, diff=1, hw=0 hw_last=0
[  304.525901] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17882, diff=1, hw=0 hw_last=0
[  304.542481] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17883, diff=1, hw=0 hw_last=0
[  304.559059] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17884, diff=1, hw=0 hw_last=0
[  304.575639] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17885, diff=1, hw=0 hw_last=0
[  304.592220] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17886, diff=1, hw=0 hw_last=0
[  304.608798] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17887, diff=1, hw=0 hw_last=0
[  304.625377] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17888, diff=1, hw=0 hw_last=0
[  304.641956] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17889, diff=1, hw=0 hw_last=0
[  304.658537] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17890, diff=1, hw=0 hw_last=0
[  304.675117] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17891, diff=1, hw=0 hw_last=0
[  304.691695] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17892, diff=1, hw=0 hw_last=0
[  304.708272] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17893, diff=1, hw=0 hw_last=0
[  304.724855] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17894, diff=1, hw=0 hw_last=0
[  304.731983] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  304.732103] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 17895 to client
[  304.734420] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  304.734523] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000029aaf162
[  304.734609] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  304.734684] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000055579822 state to 0000000029aaf162
[  304.734762] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  304.734836] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 0000000029aaf162
[  304.734916] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 0000000055579822
[  304.734991] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  304.735062] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  304.735133] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  304.735205] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  304.735281] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  304.735352] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  304.735428] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  304.735500] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  304.735571] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 0000000029aaf162
[  304.735646] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  304.735719] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000029aaf162
[  304.735801] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  304.735849] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  304.735886] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000029aaf162
[  304.735966] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000000305e034 to 0000000029aaf162
[  304.736040] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000029aaf162
[  304.736118] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  304.736192] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  304.736264] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  304.736345] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 0000000029aaf162
[  304.736420] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000029aaf162
[  304.736493] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  304.736565] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  304.736637] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  304.736709] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  304.736781] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000029aaf162
[  304.738211] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  304.741439] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17895, diff=1, hw=0 hw_last=0
[  304.758015] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17896, diff=1, hw=0 hw_last=0
[  304.774594] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17897, diff=1, hw=0 hw_last=0
[  304.791173] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17898, diff=1, hw=0 hw_last=0
[  304.807755] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17899, diff=1, hw=0 hw_last=0
[  304.824334] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17900, diff=1, hw=0 hw_last=0
[  304.840912] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17901, diff=1, hw=0 hw_last=0
[  304.857489] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17902, diff=1, hw=0 hw_last=0
[  304.874071] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17903, diff=1, hw=0 hw_last=0
[  304.890653] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17904, diff=1, hw=0 hw_last=0
[  304.907228] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17905, diff=1, hw=0 hw_last=0
[  304.923813] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17906, diff=1, hw=0 hw_last=0
[  304.940386] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17907, diff=1, hw=0 hw_last=0
[  304.956965] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17908, diff=1, hw=0 hw_last=0
[  304.967653] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  304.967769] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000029aaf162
[  304.967858] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  304.967933] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000055579822 state to 0000000029aaf162
[  304.968011] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  304.968083] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 0000000029aaf162
[  304.968163] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000055579822
[  304.968238] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  304.968309] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  304.968381] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  304.968452] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  304.968528] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  305.023281] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17912, diff=1, hw=0 hw_last=0
[  305.039859] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17913, diff=1, hw=0 hw_last=0
[  305.056436] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17914, diff=1, hw=0 hw_last=0
[  305.073015] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17915, diff=1, hw=0 hw_last=0
[  305.089598] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17916, diff=1, hw=0 hw_last=0
[  305.106175] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17917, diff=1, hw=0 hw_last=0
[  305.122754] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17918, diff=1, hw=0 hw_last=0
[  305.139336] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17919, diff=1, hw=0 hw_last=0
[  305.155913] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17920, diff=1, hw=0 hw_last=0
[  305.172491] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17921, diff=1, hw=0 hw_last=0
[  305.189070] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17922, diff=1, hw=0 hw_last=0
[  305.205648] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17923, diff=1, hw=0 hw_last=0
[  305.222227] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17924, diff=1, hw=0 hw_last=0
[  305.238807] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17925, diff=1, hw=0 hw_last=0
[  305.255385] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17926, diff=1, hw=0 hw_last=0
[  305.271965] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17927, diff=1, hw=0 hw_last=0
[  305.288545] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17928, diff=1, hw=0 hw_last=0
[  305.305127] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17929, diff=1, hw=0 hw_last=0
[  305.321705] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17930, diff=1, hw=0 hw_last=0
[  305.338282] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17931, diff=1, hw=0 hw_last=0
[  305.354861] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17932, diff=1, hw=0 hw_last=0
[  305.371443] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17933, diff=1, hw=0 hw_last=0
[  305.388020] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17934, diff=1, hw=0 hw_last=0
[  305.404600] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17935, diff=1, hw=0 hw_last=0
[  305.421178] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17936, diff=1, hw=0 hw_last=0
[  305.437757] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17937, diff=1, hw=0 hw_last=0
[  305.454337] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17938, diff=1, hw=0 hw_last=0
[  305.470916] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17939, diff=1, hw=0 hw_last=0
[  305.487495] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17940, diff=1, hw=0 hw_last=0
[  305.504076] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17941, diff=1, hw=0 hw_last=0
[  305.520653] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17942, diff=1, hw=0 hw_last=0
[  305.537233] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17943, diff=1, hw=0 hw_last=0
[  305.553812] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17944, diff=1, hw=0 hw_last=0
[  305.570392] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17945, diff=1, hw=0 hw_last=0
[  305.586970] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17946, diff=1, hw=0 hw_last=0
[  305.603550] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17947, diff=1, hw=0 hw_last=0
[  305.620129] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17948, diff=1, hw=0 hw_last=0
[  305.636707] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17949, diff=1, hw=0 hw_last=0
[  305.653287] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17950, diff=1, hw=0 hw_last=0
[  305.669866] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17951, diff=1, hw=0 hw_last=0
[  305.686446] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17952, diff=1, hw=0 hw_last=0
[  305.703026] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17953, diff=1, hw=0 hw_last=0
[  305.719604] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17954, diff=1, hw=0 hw_last=0
[  305.736183] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17955, diff=1, hw=0 hw_last=0
[  305.752764] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17956, diff=1, hw=0 hw_last=0
[  305.769343] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17957, diff=1, hw=0 hw_last=0
[  305.785921] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17958, diff=1, hw=0 hw_last=0
[  305.802500] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17959, diff=1, hw=0 hw_last=0
[  305.819080] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17960, diff=1, hw=0 hw_last=0
[  305.835659] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17961, diff=1, hw=0 hw_last=0
[  305.852238] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17962, diff=1, hw=0 hw_last=0
[  305.868817] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17963, diff=1, hw=0 hw_last=0
[  305.885399] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17964, diff=1, hw=0 hw_last=0
[  305.901977] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17965, diff=1, hw=0 hw_last=0
[  305.918555] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17966, diff=1, hw=0 hw_last=0
[  305.935140] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17967, diff=1, hw=0 hw_last=0
[  305.944982] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  305.945099] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 17968 to client
[  305.946442] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  306.067772] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17975, diff=1, hw=0 hw_last=0
[  306.084354] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17976, diff=1, hw=0 hw_last=0
[  306.100934] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17977, diff=1, hw=0 hw_last=0
[  306.117511] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17978, diff=1, hw=0 hw_last=0
[  306.134090] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17979, diff=1, hw=0 hw_last=0
[  306.150668] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17980, diff=1, hw=0 hw_last=0
[  306.167245] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17981, diff=1, hw=0 hw_last=0
[  306.179444] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  306.179562] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007967e7cb
[  306.179649] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  306.179721] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000087081e28 state to 000000007967e7cb
[  306.179799] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  306.179871] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 000000007967e7cb
[  306.179951] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 0000000087081e28
[  306.180025] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  306.180096] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  306.180168] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  306.180239] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  306.180314] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  306.180385] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  306.180460] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  306.180532] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  306.180604] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 000000007967e7cb
[  306.180677] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  306.180752] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000007967e7cb
[  306.180834] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  306.180882] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  306.180919] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000007967e7cb
[  306.180999] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000008a640c91 to 000000007967e7cb
[  306.181073] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000007967e7cb
[  306.181161] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007967e7cb nonblocking
[  306.181279] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  306.181350] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  306.183825] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17982, diff=1, hw=0 hw_last=0
[  306.183916] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007967e7cb
[  306.183993] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  306.184057] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  306.184119] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  306.184182] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  306.184246] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007967e7cb
[  306.200403] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17983, diff=1, hw=0 hw_last=0
[  306.216984] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17984, diff=1, hw=0 hw_last=0
[  306.233560] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17985, diff=1, hw=0 hw_last=0
[  306.250140] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17986, diff=1, hw=0 hw_last=0
[  306.266719] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17987, diff=1, hw=0 hw_last=0
[  306.283298] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17988, diff=1, hw=0 hw_last=0
[  306.299879] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17989, diff=1, hw=0 hw_last=0
[  306.316455] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17990, diff=1, hw=0 hw_last=0
[  306.333036] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17991, diff=1, hw=0 hw_last=0
[  306.349618] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17992, diff=1, hw=0 hw_last=0
[  306.366194] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17993, diff=1, hw=0 hw_last=0
[  306.382772] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17994, diff=1, hw=0 hw_last=0
[  306.399351] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17995, diff=1, hw=0 hw_last=0
[  306.415931] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17996, diff=1, hw=0 hw_last=0
[  306.432509] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17997, diff=1, hw=0 hw_last=0
[  306.449088] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17998, diff=1, hw=0 hw_last=0
[  306.465667] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=17999, diff=1, hw=0 hw_last=0
[  306.482246] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18000, diff=1, hw=0 hw_last=0
[  306.498826] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18001, diff=1, hw=0 hw_last=0
[  306.515408] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18002, diff=1, hw=0 hw_last=0
[  306.531987] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18003, diff=1, hw=0 hw_last=0
[  306.548564] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18004, diff=1, hw=0 hw_last=0
[  306.565143] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18005, diff=1, hw=0 hw_last=0
[  306.581723] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18006, diff=1, hw=0 hw_last=0
[  306.598301] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18007, diff=1, hw=0 hw_last=0
[  306.614881] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18008, diff=1, hw=0 hw_last=0
[  306.631460] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18009, diff=1, hw=0 hw_last=0
[  306.648038] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18010, diff=1, hw=0 hw_last=0
[  306.664618] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18011, diff=1, hw=0 hw_last=0
[  306.681197] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18012, diff=1, hw=0 hw_last=0
[  306.697782] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18013, diff=1, hw=0 hw_last=0
[  306.714359] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18014, diff=1, hw=0 hw_last=0
[  306.730935] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18015, diff=1, hw=0 hw_last=0
[  306.747517] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18016, diff=1, hw=0 hw_last=0
[  306.764095] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18017, diff=1, hw=0 hw_last=0
[  306.780673] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18018, diff=1, hw=0 hw_last=0
[  306.797252] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18019, diff=1, hw=0 hw_last=0
[  306.813831] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18020, diff=1, hw=0 hw_last=0
[  306.830411] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18021, diff=1, hw=0 hw_last=0
[  306.846990] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18022, diff=1, hw=0 hw_last=0
[  306.863568] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18023, diff=1, hw=0 hw_last=0
[  306.880147] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18024, diff=1, hw=0 hw_last=0
[  306.896727] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18025, diff=1, hw=0 hw_last=0
[  306.913306] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18026, diff=1, hw=0 hw_last=0
[  306.929885] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18027, diff=1, hw=0 hw_last=0
[  306.946468] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18028, diff=1, hw=0 hw_last=0
[  306.963045] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18029, diff=1, hw=0 hw_last=0
[  306.979624] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18030, diff=1, hw=0 hw_last=0
[  306.996202] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18031, diff=1, hw=0 hw_last=0
[  307.012781] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18032, diff=1, hw=0 hw_last=0
[  307.029361] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18033, diff=1, hw=0 hw_last=0
[  307.045942] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18034, diff=1, hw=0 hw_last=0
[  307.062521] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18035, diff=1, hw=0 hw_last=0
[  307.079099] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18036, diff=1, hw=0 hw_last=0
[  307.095680] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18037, diff=1, hw=0 hw_last=0
[  307.112257] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18038, diff=1, hw=0 hw_last=0
[  307.128835] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18039, diff=1, hw=0 hw_last=0
[  307.145417] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18040, diff=1, hw=0 hw_last=0
[  307.157928] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  307.158047] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 18041 to client
[  307.162001] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18041, diff=1, hw=0 hw_last=0
[  307.171312] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  307.171408] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009472d261
[  307.171492] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  307.171565] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000ec98bd42 state to 000000009472d261
[  307.171642] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  307.171714] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a743c9a8 state to 000000009472d261
[  307.171794] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000ec98bd42
[  307.171868] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  307.171940] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  307.172011] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  307.172083] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  307.172158] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  307.172230] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  307.172306] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  307.172378] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  307.172450] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 000000009472d261
[  307.172525] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  307.172598] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000009472d261
[  307.172678] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  307.172726] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  307.172763] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000009472d261
[  307.172842] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000000ace560b to 000000009472d261
[  307.172915] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000009472d261
[  307.172994] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  307.173066] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  307.173139] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  307.173219] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000009472d261
[  307.173294] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009472d261
[  307.173366] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  307.173439] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  307.173512] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  307.173585] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  307.173658] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009472d261
[  307.175158] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  307.178580] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18042, diff=1, hw=0 hw_last=0
[  307.394108] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18055, diff=1, hw=0 hw_last=0
[  307.395057] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  307.395165] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009472d261
[  307.395256] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  307.395331] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000ec98bd42 state to 000000009472d261
[  307.395410] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  307.395482] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a743c9a8 state to 000000009472d261
[  307.395562] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000ec98bd42
[  307.395637] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  307.395709] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  307.395780] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  307.395852] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  307.395927] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  307.396001] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  307.396077] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  307.396150] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  307.396221] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 000000009472d261
[  307.396296] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  307.396370] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000009472d261
[  307.396454] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  307.396502] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  307.396538] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000009472d261
[  307.396617] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000ab379aee to 000000009472d261
[  307.396691] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000009472d261
[  307.396779] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000009472d261 nonblocking
[  307.396899] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  307.396982] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  307.410685] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18056, diff=1, hw=0 hw_last=0
[  307.410784] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009472d261
[  307.410855] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  307.410919] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  307.410981] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  307.411044] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  307.411107] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009472d261
[  307.414609] systemd-journald[214]: Data hash table of /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal has a fill level at 75.1 (2732 of 3640 items, 2097152 file size, 767 bytes per hash table item), suggesting rotation.
[  307.427267] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18057, diff=1, hw=0 hw_last=0
[  307.440595] systemd-journald[214]: /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal: Journal header limits reached or header out-of-date, rotating.
[  307.443845] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18058, diff=1, hw=0 hw_last=0
[  307.460582] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18059, diff=1, hw=0 hw_last=0
[  307.477002] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18060, diff=1, hw=0 hw_last=0
[  307.493579] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18061, diff=1, hw=0 hw_last=0
[  307.510160] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18062, diff=1, hw=0 hw_last=0
[  307.526738] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18063, diff=1, hw=0 hw_last=0
[  307.543317] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18064, diff=1, hw=0 hw_last=0
[  307.559899] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18065, diff=1, hw=0 hw_last=0
[  307.576479] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18066, diff=1, hw=0 hw_last=0
[  307.593054] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18067, diff=1, hw=0 hw_last=0
[  307.609632] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18068, diff=1, hw=0 hw_last=0
[  307.626211] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18069, diff=1, hw=0 hw_last=0
[  307.642791] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18070, diff=1, hw=0 hw_last=0
[  307.659370] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18071, diff=1, hw=0 hw_last=0
[  307.675949] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18072, diff=1, hw=0 hw_last=0
[  307.692528] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18073, diff=1, hw=0 hw_last=0
[  307.709108] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18074, diff=1, hw=0 hw_last=0
[  307.725690] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18075, diff=1, hw=0 hw_last=0
[  307.742271] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18076, diff=1, hw=0 hw_last=0
[  307.758847] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18077, diff=1, hw=0 hw_last=0
[  307.775425] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18078, diff=1, hw=0 hw_last=0
[  307.792004] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18079, diff=1, hw=0 hw_last=0
[  307.808583] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18080, diff=1, hw=0 hw_last=0
[  307.825161] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18081, diff=1, hw=0 hw_last=0
[  307.841741] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18082, diff=1, hw=0 hw_last=0
[  307.858320] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18083, diff=1, hw=0 hw_last=0
[  307.874899] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18084, diff=1, hw=0 hw_last=0
[  307.891479] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18085, diff=1, hw=0 hw_last=0
[  307.908058] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18086, diff=1, hw=0 hw_last=0
[  308.355705] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18113, diff=1, hw=0 hw_last=0
[  308.372283] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18114, diff=1, hw=0 hw_last=0
[  308.388861] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18115, diff=1, hw=0 hw_last=0
[  308.405439] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18116, diff=1, hw=0 hw_last=0
[  308.422017] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18117, diff=1, hw=0 hw_last=0
[  308.431561] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  308.431675] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006fb5b2d2
[  308.431762] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  308.431836] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000215b6887 state to 000000006fb5b2d2
[  308.431915] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  308.431987] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 000000006fb5b2d2
[  308.432068] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000215b6887
[  308.432142] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  308.432215] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  308.432286] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  308.432358] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  308.432435] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  308.432507] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  308.432582] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  308.432655] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  308.432727] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000006fb5b2d2
[  308.432801] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  308.432876] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000006fb5b2d2
[  308.432958] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  308.433006] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  308.433042] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006fb5b2d2
[  308.433122] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000000ace560b to 000000006fb5b2d2
[  308.433196] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006fb5b2d2
[  308.433284] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006fb5b2d2 nonblocking
[  308.433402] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  308.433474] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  308.438595] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18118, diff=1, hw=0 hw_last=0
[  308.438692] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006fb5b2d2
[  308.438771] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  308.438835] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  308.438897] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  308.438960] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  308.439023] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006fb5b2d2
[  308.455183] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18119, diff=1, hw=0 hw_last=0
[  308.471760] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18120, diff=1, hw=0 hw_last=0
[  308.488333] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18121, diff=1, hw=0 hw_last=0
[  308.504911] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18122, diff=1, hw=0 hw_last=0
[  308.521490] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18123, diff=1, hw=0 hw_last=0
[  308.538071] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18124, diff=1, hw=0 hw_last=0
[  308.554648] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18125, diff=1, hw=0 hw_last=0
[  308.571228] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18126, diff=1, hw=0 hw_last=0
[  308.587808] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18127, diff=1, hw=0 hw_last=0
[  308.604389] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18128, diff=1, hw=0 hw_last=0
[  308.620966] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18129, diff=1, hw=0 hw_last=0
[  308.637547] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18130, diff=1, hw=0 hw_last=0
[  308.654122] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18131, diff=1, hw=0 hw_last=0
[  308.670701] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18132, diff=1, hw=0 hw_last=0
[  308.687280] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18133, diff=1, hw=0 hw_last=0
[  308.703859] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18134, diff=1, hw=0 hw_last=0
[  308.720439] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18135, diff=1, hw=0 hw_last=0
[  308.737017] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18136, diff=1, hw=0 hw_last=0
[  308.753599] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18137, diff=1, hw=0 hw_last=0
[  308.770180] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18138, diff=1, hw=0 hw_last=0
[  308.786757] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18139, diff=1, hw=0 hw_last=0
[  308.803336] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18140, diff=1, hw=0 hw_last=0
[  308.819914] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18141, diff=1, hw=0 hw_last=0
[  308.836493] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18142, diff=1, hw=0 hw_last=0
[  308.853072] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18143, diff=1, hw=0 hw_last=0
[  308.869652] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18144, diff=1, hw=0 hw_last=0
[  308.886230] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18145, diff=1, hw=0 hw_last=0
[  308.902810] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18146, diff=1, hw=0 hw_last=0
[  308.919390] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18147, diff=1, hw=0 hw_last=0
[  308.935968] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18148, diff=1, hw=0 hw_last=0
[  309.228398] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  309.228447] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  309.228484] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000004593454f
[  309.228563] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000007967e7cb to 000000004593454f
[  309.228636] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000004593454f
[  309.228714] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  309.228787] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  309.228861] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  309.228941] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000004593454f
[  309.229016] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000004593454f
[  309.229089] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  309.229162] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  309.229234] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  309.229306] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  309.229378] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000004593454f
[  309.230852] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  309.234399] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18166, diff=1, hw=0 hw_last=0
[  309.250977] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18167, diff=1, hw=0 hw_last=0
[  309.267556] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18168, diff=1, hw=0 hw_last=0
[  309.284140] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18169, diff=1, hw=0 hw_last=0
[  309.300719] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18170, diff=1, hw=0 hw_last=0
[  309.317297] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18171, diff=1, hw=0 hw_last=0
[  309.333874] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18172, diff=1, hw=0 hw_last=0
[  309.350453] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18173, diff=1, hw=0 hw_last=0
[  309.367037] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18174, diff=1, hw=0 hw_last=0
[  309.383613] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18175, diff=1, hw=0 hw_last=0
[  309.400194] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18176, diff=1, hw=0 hw_last=0
[  309.416772] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18177, diff=1, hw=0 hw_last=0
[  309.433350] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18178, diff=1, hw=0 hw_last=0
[  309.449929] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18179, diff=1, hw=0 hw_last=0
[  309.452239] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  309.452352] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000004593454f
[  309.452441] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  309.452514] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000bac3ec2d state to 000000004593454f
[  309.452592] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  309.452665] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 000000004593454f
[  309.452746] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000bac3ec2d
[  309.452821] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  309.452893] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  309.452964] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  309.453035] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  309.453111] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  309.453182] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  309.453258] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  309.453330] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  309.453401] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 000000004593454f
[  309.453476] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  309.453550] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000004593454f
[  309.453633] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  309.453678] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  309.453714] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000004593454f
[  309.453795] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000008e9f664b to 000000004593454f
[  309.453868] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000004593454f
[  309.453956] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000004593454f nonblocking
[  309.454073] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  309.454146] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  309.466506] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18180, diff=1, hw=0 hw_last=0
[  309.466605] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000004593454f
[  309.466685] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  309.466748] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  309.466809] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  309.466873] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  309.466937] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000004593454f
[  309.483083] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18181, diff=1, hw=0 hw_last=0
[  309.499664] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18182, diff=1, hw=0 hw_last=0
[  309.516242] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18183, diff=1, hw=0 hw_last=0
[  309.532821] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18184, diff=1, hw=0 hw_last=0
[  309.549400] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18185, diff=1, hw=0 hw_last=0
[  309.565981] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18186, diff=1, hw=0 hw_last=0
[  309.582558] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18187, diff=1, hw=0 hw_last=0
[  309.599138] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18188, diff=1, hw=0 hw_last=0
[  309.615718] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18189, diff=1, hw=0 hw_last=0
[  309.632299] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18190, diff=1, hw=0 hw_last=0
[  309.648874] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18191, diff=1, hw=0 hw_last=0
[  309.665453] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18192, diff=1, hw=0 hw_last=0
[  309.682033] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18193, diff=1, hw=0 hw_last=0
[  309.698611] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18194, diff=1, hw=0 hw_last=0
[  309.715191] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18195, diff=1, hw=0 hw_last=0
[  309.731770] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18196, diff=1, hw=0 hw_last=0
[  309.748349] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18197, diff=1, hw=0 hw_last=0
[  309.764931] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18198, diff=1, hw=0 hw_last=0
[  309.781508] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18199, diff=1, hw=0 hw_last=0
[  309.798093] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18200, diff=1, hw=0 hw_last=0
[  309.814667] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18201, diff=1, hw=0 hw_last=0
[  309.831248] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18202, diff=1, hw=0 hw_last=0
[  309.847826] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18203, diff=1, hw=0 hw_last=0
[  309.864405] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18204, diff=1, hw=0 hw_last=0
[  309.880982] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18205, diff=1, hw=0 hw_last=0
[  309.897562] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18206, diff=1, hw=0 hw_last=0
[  309.914141] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18207, diff=1, hw=0 hw_last=0
[  309.930721] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18208, diff=1, hw=0 hw_last=0
[  309.947300] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18209, diff=1, hw=0 hw_last=0
[  309.963878] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18210, diff=1, hw=0 hw_last=0
[  309.980461] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18211, diff=1, hw=0 hw_last=0
[  309.997037] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18212, diff=1, hw=0 hw_last=0
[  310.013616] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18213, diff=1, hw=0 hw_last=0
[  310.030197] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18214, diff=1, hw=0 hw_last=0
[  310.046775] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18215, diff=1, hw=0 hw_last=0
[  310.063357] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18216, diff=1, hw=0 hw_last=0
[  310.079933] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18217, diff=1, hw=0 hw_last=0
[  310.096513] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18218, diff=1, hw=0 hw_last=0
[  310.113092] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18219, diff=1, hw=0 hw_last=0
[  310.129672] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18220, diff=1, hw=0 hw_last=0
[  310.146250] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18221, diff=1, hw=0 hw_last=0
[  310.162829] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18222, diff=1, hw=0 hw_last=0
[  310.179408] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18223, diff=1, hw=0 hw_last=0
[  310.195988] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18224, diff=1, hw=0 hw_last=0
[  310.212571] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18225, diff=1, hw=0 hw_last=0
[  310.229147] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18226, diff=1, hw=0 hw_last=0
[  310.245726] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18227, diff=1, hw=0 hw_last=0
[  310.262305] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18228, diff=1, hw=0 hw_last=0
[  310.278884] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18229, diff=1, hw=0 hw_last=0
[  310.295466] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18230, diff=1, hw=0 hw_last=0
[  310.305011] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  310.305132] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 18231 to client
[  310.306468] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  310.306575] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000fde3661d
[  310.306663] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  310.306738] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000082b4fa6a state to 00000000fde3661d
[  310.306819] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  310.306893] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 00000000fde3661d
[  310.306976] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000082b4fa6a
[  310.307052] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  310.307124] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  310.307198] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  310.307274] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  310.307351] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  310.307423] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  310.307500] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  310.307572] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  310.307644] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 00000000fde3661d
[  310.307719] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  310.307792] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000fde3661d
[  310.307875] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  310.307924] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  310.345205] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18233, diff=1, hw=0 hw_last=0
[  310.361783] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18234, diff=1, hw=0 hw_last=0
[  310.378365] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18235, diff=1, hw=0 hw_last=0
[  310.394946] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18236, diff=1, hw=0 hw_last=0
[  310.411524] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18237, diff=1, hw=0 hw_last=0
[  310.428102] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18238, diff=1, hw=0 hw_last=0
[  310.444682] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18239, diff=1, hw=0 hw_last=0
[  310.461264] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18240, diff=1, hw=0 hw_last=0
[  310.477842] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18241, diff=1, hw=0 hw_last=0
[  310.494419] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18242, diff=1, hw=0 hw_last=0
[  310.511000] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18243, diff=1, hw=0 hw_last=0
[  310.527576] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18244, diff=1, hw=0 hw_last=0
[  310.539183] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  310.539302] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000fde3661d
[  310.539390] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  310.539465] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000082b4fa6a state to 00000000fde3661d
[  310.539545] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  310.539617] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 00000000fde3661d
[  310.539698] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 0000000082b4fa6a
[  310.539773] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  310.539846] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  310.539917] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  310.539989] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  310.540065] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  310.540138] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  310.540214] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  310.540286] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  310.540358] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 00000000fde3661d
[  310.540433] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  310.540510] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000fde3661d
[  310.540596] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  310.540643] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  310.540680] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000fde3661d
[  310.540762] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000000305e034 to 00000000fde3661d
[  310.540836] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000fde3661d
[  310.540924] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000fde3661d nonblocking
[  310.541053] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  310.541131] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  310.544155] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18245, diff=1, hw=0 hw_last=0
[  310.544249] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000fde3661d
[  310.544317] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  310.544381] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  310.544444] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  310.544506] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  310.544568] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000fde3661d
[  310.560734] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18246, diff=1, hw=0 hw_last=0
[  310.577311] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18247, diff=1, hw=0 hw_last=0
[  310.593890] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18248, diff=1, hw=0 hw_last=0
[  310.610469] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18249, diff=1, hw=0 hw_last=0
[  310.627047] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18250, diff=1, hw=0 hw_last=0
[  310.643626] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18251, diff=1, hw=0 hw_last=0
[  310.660208] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18252, diff=1, hw=0 hw_last=0
[  310.676785] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18253, diff=1, hw=0 hw_last=0
[  310.693366] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18254, diff=1, hw=0 hw_last=0
[  310.709946] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18255, diff=1, hw=0 hw_last=0
[  310.726527] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18256, diff=1, hw=0 hw_last=0
[  310.743102] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18257, diff=1, hw=0 hw_last=0
[  310.759680] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18258, diff=1, hw=0 hw_last=0
[  310.776259] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18259, diff=1, hw=0 hw_last=0
[  310.792839] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18260, diff=1, hw=0 hw_last=0
[  310.809417] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18261, diff=1, hw=0 hw_last=0
[  310.825998] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18262, diff=1, hw=0 hw_last=0
[  310.842576] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18263, diff=1, hw=0 hw_last=0
[  310.859157] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18264, diff=1, hw=0 hw_last=0
[  310.875735] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18265, diff=1, hw=0 hw_last=0
[  310.892315] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18266, diff=1, hw=0 hw_last=0
[  310.908894] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18267, diff=1, hw=0 hw_last=0
[  310.925475] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18268, diff=1, hw=0 hw_last=0
[  311.157584] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18282, diff=1, hw=0 hw_last=0
[  311.174161] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18283, diff=1, hw=0 hw_last=0
[  311.190741] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18284, diff=1, hw=0 hw_last=0
[  311.207319] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18285, diff=1, hw=0 hw_last=0
[  311.223899] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18286, diff=1, hw=0 hw_last=0
[  311.240477] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18287, diff=1, hw=0 hw_last=0
[  311.257056] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18288, diff=1, hw=0 hw_last=0
[  311.273636] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18289, diff=1, hw=0 hw_last=0
[  311.290216] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18290, diff=1, hw=0 hw_last=0
[  311.306798] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18291, diff=1, hw=0 hw_last=0
[  311.323377] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18292, diff=1, hw=0 hw_last=0
[  311.339953] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18293, diff=1, hw=0 hw_last=0
[  311.356532] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18294, diff=1, hw=0 hw_last=0
[  311.373111] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18295, diff=1, hw=0 hw_last=0
[  311.389696] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18296, diff=1, hw=0 hw_last=0
[  311.399597] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  311.399715] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 18297 to client
[  311.401000] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  311.401112] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006c5644bb
[  311.401200] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  311.401280] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000fefb5c61 state to 000000006c5644bb
[  311.401358] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  311.401430] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000e8543c49 state to 000000006c5644bb
[  311.401511] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000fefb5c61
[  311.401584] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  311.401656] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  311.401728] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  311.401801] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  311.401876] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  311.401948] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  311.402024] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  311.402096] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  311.402168] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000006c5644bb
[  311.402271] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  311.402352] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000006c5644bb
[  311.402437] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  311.402488] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  311.402526] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006c5644bb
[  311.402611] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000fde3661d to 000000006c5644bb
[  311.402685] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006c5644bb
[  311.402766] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  311.402841] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  311.402916] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  311.402998] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000006c5644bb
[  311.403075] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006c5644bb
[  311.403148] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  311.403221] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  311.403294] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  311.403367] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  311.403439] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006c5644bb
[  311.404867] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  311.406281] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18297, diff=1, hw=0 hw_last=0
[  311.422856] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18298, diff=1, hw=0 hw_last=0
[  311.439434] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18299, diff=1, hw=0 hw_last=0
[  311.456011] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18300, diff=1, hw=0 hw_last=0
[  311.472592] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18301, diff=1, hw=0 hw_last=0
[  311.489172] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18302, diff=1, hw=0 hw_last=0
[  311.505751] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18303, diff=1, hw=0 hw_last=0
[  311.522329] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18304, diff=1, hw=0 hw_last=0
[  311.538908] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18305, diff=1, hw=0 hw_last=0
[  311.555492] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18306, diff=1, hw=0 hw_last=0
[  311.572069] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18307, diff=1, hw=0 hw_last=0
[  311.588647] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18308, diff=1, hw=0 hw_last=0
[  311.605226] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18309, diff=1, hw=0 hw_last=0
[  311.621803] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18310, diff=1, hw=0 hw_last=0
[  311.633073] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  311.633193] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006c5644bb
[  311.633280] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  311.633354] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000fefb5c61 state to 000000006c5644bb
[  311.634032] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  311.634108] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  311.634180] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  311.634292] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000006c5644bb
[  311.634375] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  311.634455] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000006c5644bb
[  311.634541] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  311.634590] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  311.634627] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006c5644bb
[  311.634710] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000029aaf162 to 000000006c5644bb
[  311.634785] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006c5644bb
[  311.634875] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006c5644bb nonblocking
[  311.634992] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  311.635068] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  311.638381] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18311, diff=1, hw=0 hw_last=0
[  311.638471] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006c5644bb
[  311.638540] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  311.638603] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  311.638666] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  311.638728] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  311.638792] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006c5644bb
[  311.654959] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18312, diff=1, hw=0 hw_last=0
[  311.671538] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18313, diff=1, hw=0 hw_last=0
[  311.688117] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18314, diff=1, hw=0 hw_last=0
[  311.704696] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18315, diff=1, hw=0 hw_last=0
[  311.721275] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18316, diff=1, hw=0 hw_last=0
[  311.737854] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18317, diff=1, hw=0 hw_last=0
[  311.754436] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18318, diff=1, hw=0 hw_last=0
[  311.771012] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18319, diff=1, hw=0 hw_last=0
[  311.787594] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18320, diff=1, hw=0 hw_last=0
[  311.804174] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18321, diff=1, hw=0 hw_last=0
[  311.820751] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18322, diff=1, hw=0 hw_last=0
[  311.837330] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18323, diff=1, hw=0 hw_last=0
[  311.853907] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18324, diff=1, hw=0 hw_last=0
[  311.870487] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18325, diff=1, hw=0 hw_last=0
[  311.887066] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18326, diff=1, hw=0 hw_last=0
[  311.903645] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18327, diff=1, hw=0 hw_last=0
[  311.920224] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18328, diff=1, hw=0 hw_last=0
[  311.936803] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18329, diff=1, hw=0 hw_last=0
[  311.953384] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18330, diff=1, hw=0 hw_last=0
[  311.969964] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18331, diff=1, hw=0 hw_last=0
[  311.986545] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18332, diff=1, hw=0 hw_last=0
[  312.003123] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18333, diff=1, hw=0 hw_last=0
[  312.019701] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18334, diff=1, hw=0 hw_last=0
[  312.036281] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18335, diff=1, hw=0 hw_last=0
[  312.052860] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18336, diff=1, hw=0 hw_last=0
[  312.069438] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18337, diff=1, hw=0 hw_last=0
[  312.086017] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18338, diff=1, hw=0 hw_last=0
[  312.102595] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18339, diff=1, hw=0 hw_last=0
[  312.119177] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18340, diff=1, hw=0 hw_last=0
[  312.135755] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18341, diff=1, hw=0 hw_last=0
[  312.152335] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18342, diff=1, hw=0 hw_last=0
[  312.168913] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18343, diff=1, hw=0 hw_last=0
[  312.185493] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18344, diff=1, hw=0 hw_last=0
[  312.202071] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18345, diff=1, hw=0 hw_last=0
[  312.218650] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18346, diff=1, hw=0 hw_last=0
[  312.235229] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18347, diff=1, hw=0 hw_last=0
[  312.251809] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18348, diff=1, hw=0 hw_last=0
[  312.268388] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18349, diff=1, hw=0 hw_last=0
[  312.284980] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18350, diff=1, hw=0 hw_last=0
[  312.301560] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18351, diff=1, hw=0 hw_last=0
[  312.318132] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18352, diff=1, hw=0 hw_last=0
[  312.334708] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18353, diff=1, hw=0 hw_last=0
[  312.782350] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18380, diff=1, hw=0 hw_last=0
[  312.791739] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  312.791852] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000071ef6b0b
[  312.791938] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  312.792011] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000055579822 state to 0000000071ef6b0b
[  312.792089] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  312.792161] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000002eee26c9 state to 0000000071ef6b0b
[  312.792242] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 0000000055579822
[  312.792316] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  312.792387] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  312.792459] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  312.792530] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  312.792604] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  312.792676] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  312.792751] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  312.792823] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  312.792894] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 0000000071ef6b0b
[  312.792969] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  312.793042] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000071ef6b0b
[  312.793126] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  312.793174] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  312.793211] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000071ef6b0b
[  312.793290] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000007967e7cb to 0000000071ef6b0b
[  312.793364] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000071ef6b0b
[  312.793452] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000071ef6b0b nonblocking
[  312.793570] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  312.793646] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  312.798927] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18381, diff=1, hw=0 hw_last=0
[  312.799027] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000071ef6b0b
[  312.799103] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  312.799165] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  312.799228] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  312.799290] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  312.799354] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000071ef6b0b
[  312.815503] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18382, diff=1, hw=0 hw_last=0
[  312.832085] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18383, diff=1, hw=0 hw_last=0
[  312.848663] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18384, diff=1, hw=0 hw_last=0
[  312.865241] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18385, diff=1, hw=0 hw_last=0
[  312.881819] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18386, diff=1, hw=0 hw_last=0
[  312.898401] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18387, diff=1, hw=0 hw_last=0
[  312.914979] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18388, diff=1, hw=0 hw_last=0
[  312.931558] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18389, diff=1, hw=0 hw_last=0
[  312.948143] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18390, diff=1, hw=0 hw_last=0
[  312.964719] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18391, diff=1, hw=0 hw_last=0
[  312.981294] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18392, diff=1, hw=0 hw_last=0
[  312.997873] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18393, diff=1, hw=0 hw_last=0
[  313.014452] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18394, diff=1, hw=0 hw_last=0
[  313.031031] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18395, diff=1, hw=0 hw_last=0
[  313.047610] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18396, diff=1, hw=0 hw_last=0
[  313.064190] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18397, diff=1, hw=0 hw_last=0
[  313.080769] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18398, diff=1, hw=0 hw_last=0
[  313.097351] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18399, diff=1, hw=0 hw_last=0
[  313.113930] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18400, diff=1, hw=0 hw_last=0
[  313.130509] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18401, diff=1, hw=0 hw_last=0
[  313.147087] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18402, diff=1, hw=0 hw_last=0
[  313.163669] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18403, diff=1, hw=0 hw_last=0
[  313.180245] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18404, diff=1, hw=0 hw_last=0
[  313.196824] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18405, diff=1, hw=0 hw_last=0
[  313.213403] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18406, diff=1, hw=0 hw_last=0
[  313.229982] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18407, diff=1, hw=0 hw_last=0
[  313.246562] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18408, diff=1, hw=0 hw_last=0
[  313.263143] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18409, diff=1, hw=0 hw_last=0
[  313.279721] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18410, diff=1, hw=0 hw_last=0
[  313.296301] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18411, diff=1, hw=0 hw_last=0
[  313.312879] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18412, diff=1, hw=0 hw_last=0
[  313.329458] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18413, diff=1, hw=0 hw_last=0
[  313.346036] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18414, diff=1, hw=0 hw_last=0
[  313.362616] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18415, diff=1, hw=0 hw_last=0
[  313.688438] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 00000000e0dcab9c
[  313.688512] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  313.688584] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000e0dcab9c
[  313.688666] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  313.688714] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  313.688750] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000e0dcab9c
[  313.688828] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000006fb5b2d2 to 00000000e0dcab9c
[  313.688902] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000e0dcab9c
[  313.688979] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  313.689051] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  313.689124] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  313.689203] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 00000000e0dcab9c
[  313.689278] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e0dcab9c
[  313.689351] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  313.689425] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  313.689496] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  313.689569] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  313.689641] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e0dcab9c
[  313.691150] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  313.693706] systemd-journald[214]: Data hash table of /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal has a fill level at 75.1 (2732 of 3640 items, 2097152 file size, 767 bytes per hash table item), suggesting rotation.
[  313.694212] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18435, diff=1, hw=0 hw_last=0
[  313.716327] systemd-journald[214]: /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal: Journal header limits reached or header out-of-date, rotating.
[  313.716301] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18436, diff=1, hw=0 hw_last=0
[  313.736425] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18437, diff=1, hw=0 hw_last=0
[  313.743945] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18438, diff=1, hw=0 hw_last=0
[  313.760527] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18439, diff=1, hw=0 hw_last=0
[  313.777102] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18440, diff=1, hw=0 hw_last=0
[  313.793682] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18441, diff=1, hw=0 hw_last=0
[  313.810263] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18442, diff=1, hw=0 hw_last=0
[  313.826844] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18443, diff=1, hw=0 hw_last=0
[  313.843423] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18444, diff=1, hw=0 hw_last=0
[  313.859998] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18445, diff=1, hw=0 hw_last=0
[  313.876578] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18446, diff=1, hw=0 hw_last=0
[  313.893154] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18447, diff=1, hw=0 hw_last=0
[  313.909736] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18448, diff=1, hw=0 hw_last=0
[  313.918971] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  313.919084] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e0dcab9c
[  313.919171] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  313.919245] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000002cafbe1b state to 00000000e0dcab9c
[  313.919323] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  313.919395] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 00000000e0dcab9c
[  313.919475] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 000000002cafbe1b
[  313.919550] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  313.919621] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  313.919693] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  313.919764] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  313.919838] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  313.919909] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  313.919986] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  313.920058] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  313.920129] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 00000000e0dcab9c
[  313.920203] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  313.920277] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000e0dcab9c
[  313.920360] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  313.920411] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  313.920447] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000e0dcab9c
[  313.920526] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000009472d261 to 00000000e0dcab9c
[  313.920600] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000e0dcab9c
[  313.920687] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e0dcab9c nonblocking
[  313.920803] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  313.920881] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  313.926312] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18449, diff=1, hw=0 hw_last=0
[  313.926422] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e0dcab9c
[  313.926492] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  313.926557] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  313.926618] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  313.926681] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  313.926744] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e0dcab9c
[  313.942891] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18450, diff=1, hw=0 hw_last=0
[  313.959468] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18451, diff=1, hw=0 hw_last=0
[  314.490001] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18483, diff=1, hw=0 hw_last=0
[  314.506582] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18484, diff=1, hw=0 hw_last=0
[  314.523161] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18485, diff=1, hw=0 hw_last=0
[  314.539741] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18486, diff=1, hw=0 hw_last=0
[  314.556319] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18487, diff=1, hw=0 hw_last=0
[  314.572896] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18488, diff=1, hw=0 hw_last=0
[  314.589477] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18489, diff=1, hw=0 hw_last=0
[  314.606055] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18490, diff=1, hw=0 hw_last=0
[  314.622637] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18491, diff=1, hw=0 hw_last=0
[  314.639214] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18492, diff=1, hw=0 hw_last=0
[  314.655793] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18493, diff=1, hw=0 hw_last=0
[  314.672377] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18494, diff=1, hw=0 hw_last=0
[  314.675442] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  314.675563] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 18495 to client
[  314.681836] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  314.681938] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f37c832b
[  314.682021] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  314.682093] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000ec98bd42 state to 00000000f37c832b
[  314.682171] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  314.682262] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000adb7ad91 state to 00000000f37c832b
[  314.682347] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000ec98bd42
[  314.682421] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  314.682492] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  314.682564] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  314.682636] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  314.682711] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  314.682784] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  314.682859] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  314.682932] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  314.683004] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 00000000f37c832b
[  314.683084] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  314.683157] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000f37c832b
[  314.683238] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  314.683289] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  314.683326] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000f37c832b
[  314.683407] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000e0dcab9c to 00000000f37c832b
[  314.683480] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000f37c832b
[  314.683559] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  314.683633] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  314.683706] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  314.683787] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 00000000f37c832b
[  314.683862] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f37c832b
[  314.683934] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  314.684006] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  314.684078] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  314.684150] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  314.684222] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f37c832b
[  314.685679] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  314.688957] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18495, diff=1, hw=0 hw_last=0
[  314.705537] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18496, diff=1, hw=0 hw_last=0
[  314.722114] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18497, diff=1, hw=0 hw_last=0
[  314.738692] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18498, diff=1, hw=0 hw_last=0
[  314.755274] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18499, diff=1, hw=0 hw_last=0
[  314.771854] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18500, diff=1, hw=0 hw_last=0
[  314.788432] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18501, diff=1, hw=0 hw_last=0
[  314.805013] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18502, diff=1, hw=0 hw_last=0
[  314.821594] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18503, diff=1, hw=0 hw_last=0
[  314.838172] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18504, diff=1, hw=0 hw_last=0
[  314.854749] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18505, diff=1, hw=0 hw_last=0
[  314.871328] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18506, diff=1, hw=0 hw_last=0
[  314.887907] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18507, diff=1, hw=0 hw_last=0
[  314.904486] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18508, diff=1, hw=0 hw_last=0
[  314.913097] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  314.913217] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f37c832b
[  314.913304] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  314.913377] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000ec98bd42 state to 00000000f37c832b
[  314.913456] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  314.913528] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000adb7ad91 state to 00000000f37c832b
[  314.913609] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000ec98bd42
[  314.913684] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  314.913755] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  314.913827] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  314.913898] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  314.913974] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  314.914045] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  314.914120] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  314.914191] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  314.914306] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 00000000f37c832b
[  314.914389] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  314.914468] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000f37c832b
[  314.914552] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  314.914603] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  314.914641] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000f37c832b
[  314.914722] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000006fb5b2d2 to 00000000f37c832b
[  314.914796] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000f37c832b
[  314.914886] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f37c832b nonblocking
[  314.914993] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  314.915066] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  314.921065] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18509, diff=1, hw=0 hw_last=0
[  314.921158] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f37c832b
[  314.921234] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  314.921297] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  314.921359] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  314.921421] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  314.921483] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f37c832b
[  314.937641] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18510, diff=1, hw=0 hw_last=0
[  314.954219] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18511, diff=1, hw=0 hw_last=0
[  314.970798] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18512, diff=1, hw=0 hw_last=0
[  314.987377] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18513, diff=1, hw=0 hw_last=0
[  315.003956] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18514, diff=1, hw=0 hw_last=0
[  315.020539] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18515, diff=1, hw=0 hw_last=0
[  315.037114] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18516, diff=1, hw=0 hw_last=0
[  315.053694] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18517, diff=1, hw=0 hw_last=0
[  315.070275] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18518, diff=1, hw=0 hw_last=0
[  315.086855] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18519, diff=1, hw=0 hw_last=0
[  315.103431] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18520, diff=1, hw=0 hw_last=0
[  315.120010] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18521, diff=1, hw=0 hw_last=0
[  315.136589] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18522, diff=1, hw=0 hw_last=0
[  315.153168] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18523, diff=1, hw=0 hw_last=0
[  315.169747] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18524, diff=1, hw=0 hw_last=0
[  315.186326] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18525, diff=1, hw=0 hw_last=0
[  315.202905] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18526, diff=1, hw=0 hw_last=0
[  315.219485] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18527, diff=1, hw=0 hw_last=0
[  315.236067] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18528, diff=1, hw=0 hw_last=0
[  315.252645] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18529, diff=1, hw=0 hw_last=0
[  315.269223] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18530, diff=1, hw=0 hw_last=0
[  315.285802] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18531, diff=1, hw=0 hw_last=0
[  315.302382] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18532, diff=1, hw=0 hw_last=0
[  315.318960] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18533, diff=1, hw=0 hw_last=0
[  315.335540] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18534, diff=1, hw=0 hw_last=0
[  315.352120] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18535, diff=1, hw=0 hw_last=0
[  315.368698] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18536, diff=1, hw=0 hw_last=0
[  315.385278] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18537, diff=1, hw=0 hw_last=0
[  315.401857] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18538, diff=1, hw=0 hw_last=0
[  315.418439] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18539, diff=1, hw=0 hw_last=0
[  315.435016] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18540, diff=1, hw=0 hw_last=0
[  315.451597] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18541, diff=1, hw=0 hw_last=0
[  315.468175] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18542, diff=1, hw=0 hw_last=0
[  315.484754] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18543, diff=1, hw=0 hw_last=0
[  315.501334] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18544, diff=1, hw=0 hw_last=0
[  315.517912] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18545, diff=1, hw=0 hw_last=0
[  315.534494] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18546, diff=1, hw=0 hw_last=0
[  315.551070] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18547, diff=1, hw=0 hw_last=0
[  315.567650] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18548, diff=1, hw=0 hw_last=0
[  315.584227] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18549, diff=1, hw=0 hw_last=0
[  315.600806] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18550, diff=1, hw=0 hw_last=0
[  315.679419] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  315.679491] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  315.679566] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  315.679638] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  315.679710] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 0000000082174610
[  315.679783] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  315.679856] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000082174610
[  315.679938] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  315.679989] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  315.680026] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000082174610
[  315.680105] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000071ef6b0b to 0000000082174610
[  315.680180] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000082174610
[  315.680258] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  315.680330] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  315.680404] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  315.680486] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 0000000082174610
[  315.680561] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000082174610
[  315.680635] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  315.680707] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  315.680780] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  315.680852] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  315.680925] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000082174610
[  315.682389] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  315.683711] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18555, diff=1, hw=0 hw_last=0
[  315.700288] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18556, diff=1, hw=0 hw_last=0
[  315.716868] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18557, diff=1, hw=0 hw_last=0
[  315.733444] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18558, diff=1, hw=0 hw_last=0
[  315.750026] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18559, diff=1, hw=0 hw_last=0
[  315.766607] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18560, diff=1, hw=0 hw_last=0
[  315.783186] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18561, diff=1, hw=0 hw_last=0
[  315.799763] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18562, diff=1, hw=0 hw_last=0
[  315.816342] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18563, diff=1, hw=0 hw_last=0
[  315.832928] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18564, diff=1, hw=0 hw_last=0
[  315.849501] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18565, diff=1, hw=0 hw_last=0
[  315.866081] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18566, diff=1, hw=0 hw_last=0
[  315.882660] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18567, diff=1, hw=0 hw_last=0
[  315.899236] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18568, diff=1, hw=0 hw_last=0
[  315.910231] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  315.910348] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000082174610
[  315.910434] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  315.910507] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000215b6887 state to 0000000082174610
[  315.910586] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  315.910658] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 0000000082174610
[  315.910736] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000215b6887
[  315.910811] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  315.910882] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  315.910954] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  315.911025] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  315.911100] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  315.911172] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  315.911249] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  315.911321] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  315.911392] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 0000000082174610
[  315.911468] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  315.911542] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000082174610
[  315.911626] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  315.911675] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  315.911712] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000082174610
[  315.911792] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000004593454f to 0000000082174610
[  315.911866] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000082174610
[  315.911958] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000082174610 nonblocking
[  315.912083] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  315.912158] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  315.915817] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18569, diff=1, hw=0 hw_last=0
[  315.915925] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000082174610
[  315.915996] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  315.916059] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  315.916121] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  315.916184] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  315.916247] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000082174610
[  315.932395] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18570, diff=1, hw=0 hw_last=0
[  315.948972] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18571, diff=1, hw=0 hw_last=0
[  315.965552] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18572, diff=1, hw=0 hw_last=0
[  315.982130] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18573, diff=1, hw=0 hw_last=0
[  316.114761] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18581, diff=1, hw=0 hw_last=0
[  316.131341] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18582, diff=1, hw=0 hw_last=0
[  316.147920] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18583, diff=1, hw=0 hw_last=0
[  316.164499] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18584, diff=1, hw=0 hw_last=0
[  316.181078] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18585, diff=1, hw=0 hw_last=0
[  316.197658] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18586, diff=1, hw=0 hw_last=0
[  316.214237] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18587, diff=1, hw=0 hw_last=0
[  316.230820] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18588, diff=1, hw=0 hw_last=0
[  316.247397] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18589, diff=1, hw=0 hw_last=0
[  316.263975] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18590, diff=1, hw=0 hw_last=0
[  316.280555] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18591, diff=1, hw=0 hw_last=0
[  316.297134] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18592, diff=1, hw=0 hw_last=0
[  316.313713] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18593, diff=1, hw=0 hw_last=0
[  316.330291] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18594, diff=1, hw=0 hw_last=0
[  316.346873] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18595, diff=1, hw=0 hw_last=0
[  316.363449] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18596, diff=1, hw=0 hw_last=0
[  316.380030] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18597, diff=1, hw=0 hw_last=0
[  316.396608] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18598, diff=1, hw=0 hw_last=0
[  316.413187] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18599, diff=1, hw=0 hw_last=0
[  316.429766] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18600, diff=1, hw=0 hw_last=0
[  316.446355] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18601, diff=1, hw=0 hw_last=0
[  316.462926] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18602, diff=1, hw=0 hw_last=0
[  316.479506] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18603, diff=1, hw=0 hw_last=0
[  316.496084] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18604, diff=1, hw=0 hw_last=0
[  316.512666] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18605, diff=1, hw=0 hw_last=0
[  316.529242] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18606, diff=1, hw=0 hw_last=0
[  316.545822] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18607, diff=1, hw=0 hw_last=0
[  316.562401] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18608, diff=1, hw=0 hw_last=0
[  316.578983] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18609, diff=1, hw=0 hw_last=0
[  316.595559] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18610, diff=1, hw=0 hw_last=0
[  316.612138] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18611, diff=1, hw=0 hw_last=0
[  316.628717] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18612, diff=1, hw=0 hw_last=0
[  316.645296] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18613, diff=1, hw=0 hw_last=0
[  316.661877] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18614, diff=1, hw=0 hw_last=0
[  316.678459] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18615, diff=1, hw=0 hw_last=0
[  316.684969] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  316.685087] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 18616 to client
[  316.687363] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  316.687466] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000d7e48c6b
[  316.687549] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  316.687621] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000003519e999 state to 00000000d7e48c6b
[  316.687697] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  316.687769] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000002eee26c9 state to 00000000d7e48c6b
[  316.687849] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 000000003519e999
[  316.687923] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  316.687994] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  316.688066] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  316.688137] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  316.688212] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  316.688283] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  316.688358] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  316.688430] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  316.688501] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 00000000d7e48c6b
[  316.688575] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  316.688647] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000d7e48c6b
[  316.688729] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  316.688773] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  316.688809] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000d7e48c6b
[  316.688888] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000006c5644bb to 00000000d7e48c6b
[  316.688961] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000d7e48c6b
[  316.689039] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  316.689112] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  316.689185] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  316.689265] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 00000000d7e48c6b
[  316.689341] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000d7e48c6b
[  316.689413] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  316.811094] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18623, diff=1, hw=0 hw_last=0
[  316.827676] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18624, diff=1, hw=0 hw_last=0
[  316.844255] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18625, diff=1, hw=0 hw_last=0
[  316.860833] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18626, diff=1, hw=0 hw_last=0
[  316.877412] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18627, diff=1, hw=0 hw_last=0
[  316.893990] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18628, diff=1, hw=0 hw_last=0
[  316.910568] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18629, diff=1, hw=0 hw_last=0
[  316.919290] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  316.919409] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000d7e48c6b
[  316.919499] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  316.919576] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000003519e999 state to 00000000d7e48c6b
[  316.919655] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  316.919727] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000002eee26c9 state to 00000000d7e48c6b
[  316.919808] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 000000003519e999
[  316.919883] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  316.919954] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  316.920026] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  316.920097] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  316.920171] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  316.920243] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  316.920319] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  316.920391] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  316.920462] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 00000000d7e48c6b
[  316.920537] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  316.920610] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000d7e48c6b
[  316.920693] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  316.920740] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  316.920776] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000d7e48c6b
[  316.920857] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000fde3661d to 00000000d7e48c6b
[  316.920930] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000d7e48c6b
[  316.921018] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000d7e48c6b nonblocking
[  316.921141] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  316.921224] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  316.927146] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18630, diff=1, hw=0 hw_last=0
[  316.927246] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000d7e48c6b
[  316.927319] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  316.927384] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  316.927446] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  316.927508] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  316.927573] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000d7e48c6b
[  316.943725] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18631, diff=1, hw=0 hw_last=0
[  316.960304] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18632, diff=1, hw=0 hw_last=0
[  316.976885] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18633, diff=1, hw=0 hw_last=0
[  316.993463] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18634, diff=1, hw=0 hw_last=0
[  317.010041] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18635, diff=1, hw=0 hw_last=0
[  317.026620] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18636, diff=1, hw=0 hw_last=0
[  317.043202] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18637, diff=1, hw=0 hw_last=0
[  317.059778] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18638, diff=1, hw=0 hw_last=0
[  317.076359] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18639, diff=1, hw=0 hw_last=0
[  317.092938] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18640, diff=1, hw=0 hw_last=0
[  317.109519] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18641, diff=1, hw=0 hw_last=0
[  317.126093] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18642, diff=1, hw=0 hw_last=0
[  317.142673] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18643, diff=1, hw=0 hw_last=0
[  317.159252] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18644, diff=1, hw=0 hw_last=0
[  317.175831] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18645, diff=1, hw=0 hw_last=0
[  317.192410] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18646, diff=1, hw=0 hw_last=0
[  317.208989] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18647, diff=1, hw=0 hw_last=0
[  317.225568] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18648, diff=1, hw=0 hw_last=0
[  317.242152] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18649, diff=1, hw=0 hw_last=0
[  317.258730] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18650, diff=1, hw=0 hw_last=0
[  317.275309] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18651, diff=1, hw=0 hw_last=0
[  317.291887] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18652, diff=1, hw=0 hw_last=0
[  317.308465] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18653, diff=1, hw=0 hw_last=0
[  317.325045] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18654, diff=1, hw=0 hw_last=0
[  317.341624] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18655, diff=1, hw=0 hw_last=0
[  317.358203] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18656, diff=1, hw=0 hw_last=0
[  317.374782] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18657, diff=1, hw=0 hw_last=0
[  317.391361] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18658, diff=1, hw=0 hw_last=0
[  317.822428] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18684, diff=1, hw=0 hw_last=0
[  317.839007] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18685, diff=1, hw=0 hw_last=0
[  317.855591] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18686, diff=1, hw=0 hw_last=0
[  317.872165] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18687, diff=1, hw=0 hw_last=0
[  317.888748] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18688, diff=1, hw=0 hw_last=0
[  317.905321] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18689, diff=1, hw=0 hw_last=0
[  317.921903] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18690, diff=1, hw=0 hw_last=0
[  317.931061] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  317.931180] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006e1bef3e
[  317.931266] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  317.931341] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000082b4fa6a state to 000000006e1bef3e
[  317.931419] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  317.931492] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000e8543c49 state to 000000006e1bef3e
[  317.931574] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000082b4fa6a
[  317.931648] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  317.931719] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  317.931792] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  317.931864] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  317.931938] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  317.932009] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  317.932085] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  317.932156] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  317.932228] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000006e1bef3e
[  317.932302] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  317.932376] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000006e1bef3e
[  317.932458] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  317.932505] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  317.932542] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006e1bef3e
[  317.932622] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000006c5644bb to 000000006e1bef3e
[  317.932696] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006e1bef3e
[  317.932785] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006e1bef3e nonblocking
[  317.932909] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  317.932991] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  317.938477] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18691, diff=1, hw=0 hw_last=0
[  317.938571] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006e1bef3e
[  317.938640] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  317.938704] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  317.938765] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  317.938828] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  317.938892] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006e1bef3e
[  317.955057] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18692, diff=1, hw=0 hw_last=0
[  317.971637] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18693, diff=1, hw=0 hw_last=0
[  317.988216] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18694, diff=1, hw=0 hw_last=0
[  318.004794] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18695, diff=1, hw=0 hw_last=0
[  318.021372] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18696, diff=1, hw=0 hw_last=0
[  318.037955] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18697, diff=1, hw=0 hw_last=0
[  318.054532] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18698, diff=1, hw=0 hw_last=0
[  318.071111] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18699, diff=1, hw=0 hw_last=0
[  318.087691] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18700, diff=1, hw=0 hw_last=0
[  318.104271] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18701, diff=1, hw=0 hw_last=0
[  318.120845] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18702, diff=1, hw=0 hw_last=0
[  318.137424] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18703, diff=1, hw=0 hw_last=0
[  318.154004] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18704, diff=1, hw=0 hw_last=0
[  318.170584] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18705, diff=1, hw=0 hw_last=0
[  318.187163] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18706, diff=1, hw=0 hw_last=0
[  318.203741] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18707, diff=1, hw=0 hw_last=0
[  318.220320] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18708, diff=1, hw=0 hw_last=0
[  318.236904] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18709, diff=1, hw=0 hw_last=0
[  318.253482] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18710, diff=1, hw=0 hw_last=0
[  318.270063] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18711, diff=1, hw=0 hw_last=0
[  318.286641] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18712, diff=1, hw=0 hw_last=0
[  318.303217] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18713, diff=1, hw=0 hw_last=0
[  318.319797] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18714, diff=1, hw=0 hw_last=0
[  318.336375] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18715, diff=1, hw=0 hw_last=0
[  318.352955] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18716, diff=1, hw=0 hw_last=0
[  318.369534] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18717, diff=1, hw=0 hw_last=0
[  318.386113] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18718, diff=1, hw=0 hw_last=0
[  318.745331] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  318.745403] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  318.745475] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 0000000018d86a98
[  318.745549] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  318.745622] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000018d86a98
[  318.745704] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  318.745751] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  318.745789] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000018d86a98
[  318.745868] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000082174610 to 0000000018d86a98
[  318.745942] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000018d86a98
[  318.746020] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  318.746092] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  318.746196] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  318.746287] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 0000000018d86a98
[  318.746367] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000018d86a98
[  318.746445] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  318.746521] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  318.746594] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  318.746668] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  318.746743] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000018d86a98
[  318.748178] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  318.750866] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18740, diff=1, hw=0 hw_last=0
[  318.767441] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18741, diff=1, hw=0 hw_last=0
[  318.784021] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18742, diff=1, hw=0 hw_last=0
[  318.800600] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18743, diff=1, hw=0 hw_last=0
[  318.817179] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18744, diff=1, hw=0 hw_last=0
[  318.833761] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18745, diff=1, hw=0 hw_last=0
[  318.850339] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18746, diff=1, hw=0 hw_last=0
[  318.866916] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18747, diff=1, hw=0 hw_last=0
[  318.883496] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18748, diff=1, hw=0 hw_last=0
[  318.900080] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18749, diff=1, hw=0 hw_last=0
[  318.916656] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18750, diff=1, hw=0 hw_last=0
[  318.933235] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18751, diff=1, hw=0 hw_last=0
[  318.949828] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18752, diff=1, hw=0 hw_last=0
[  318.966390] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18753, diff=1, hw=0 hw_last=0
[  318.968335] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  318.968448] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000018d86a98
[  318.968538] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  318.968611] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000fefb5c61 state to 0000000018d86a98
[  318.968690] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  318.968762] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 0000000018d86a98
[  318.968843] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000fefb5c61
[  318.968917] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  318.968988] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  318.969059] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  318.969130] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  318.969205] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  318.969276] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  318.969351] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  318.969422] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  318.969494] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 0000000018d86a98
[  318.969567] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  318.969641] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000018d86a98
[  318.969724] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  318.969772] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  318.969808] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000018d86a98
[  318.969889] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000071ef6b0b to 0000000018d86a98
[  318.969966] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000018d86a98
[  318.970055] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000018d86a98 nonblocking
[  318.970188] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  318.970270] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  318.982970] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18754, diff=1, hw=0 hw_last=0
[  318.983071] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000018d86a98
[  318.983141] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  318.983206] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  318.983268] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  318.983330] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  318.983393] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000018d86a98
[  318.999546] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18755, diff=1, hw=0 hw_last=0
[  319.016127] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18756, diff=1, hw=0 hw_last=0
[  319.032705] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18757, diff=1, hw=0 hw_last=0
[  319.049283] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18758, diff=1, hw=0 hw_last=0
[  319.198493] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18767, diff=1, hw=0 hw_last=0
[  319.215073] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18768, diff=1, hw=0 hw_last=0
[  319.231652] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18769, diff=1, hw=0 hw_last=0
[  319.248231] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18770, diff=1, hw=0 hw_last=0
[  319.264810] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18771, diff=1, hw=0 hw_last=0
[  319.281389] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18772, diff=1, hw=0 hw_last=0
[  319.297976] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18773, diff=1, hw=0 hw_last=0
[  319.314552] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18774, diff=1, hw=0 hw_last=0
[  319.331128] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18775, diff=1, hw=0 hw_last=0
[  319.331518] systemd-journald[214]: Data hash table of /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal has a fill level at 75.1 (2732 of 3640 items, 2097152 file size, 767 bytes per hash table item), suggesting rotation.
[  319.347710] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18776, diff=1, hw=0 hw_last=0
[  319.353800] systemd-journald[214]: /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal: Journal header limits reached or header out-of-date, rotating.
[  319.364286] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18777, diff=1, hw=0 hw_last=0
[  319.380869] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18778, diff=1, hw=0 hw_last=0
[  319.397444] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18779, diff=1, hw=0 hw_last=0
[  319.414025] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18780, diff=1, hw=0 hw_last=0
[  319.430604] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18781, diff=1, hw=0 hw_last=0
[  319.447182] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18782, diff=1, hw=0 hw_last=0
[  319.463763] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18783, diff=1, hw=0 hw_last=0
[  319.480340] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18784, diff=1, hw=0 hw_last=0
[  319.496920] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18785, diff=1, hw=0 hw_last=0
[  319.513499] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18786, diff=1, hw=0 hw_last=0
[  319.530081] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18787, diff=1, hw=0 hw_last=0
[  319.546658] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18788, diff=1, hw=0 hw_last=0
[  319.563238] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18789, diff=1, hw=0 hw_last=0
[  319.579817] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18790, diff=1, hw=0 hw_last=0
[  319.596394] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18791, diff=1, hw=0 hw_last=0
[  319.612974] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18792, diff=1, hw=0 hw_last=0
[  319.629553] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18793, diff=1, hw=0 hw_last=0
[  319.646134] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18794, diff=1, hw=0 hw_last=0
[  319.662711] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18795, diff=1, hw=0 hw_last=0
[  319.679293] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18796, diff=1, hw=0 hw_last=0
[  319.695873] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18797, diff=1, hw=0 hw_last=0
[  319.712453] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18798, diff=1, hw=0 hw_last=0
[  319.729031] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18799, diff=1, hw=0 hw_last=0
[  319.745609] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18800, diff=1, hw=0 hw_last=0
[  319.762186] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18801, diff=1, hw=0 hw_last=0
[  319.778771] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18802, diff=1, hw=0 hw_last=0
[  319.792016] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  319.792139] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 18803 to client
[  319.795355] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18803, diff=1, hw=0 hw_last=0
[  319.804407] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  319.804489] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000eae20a14
[  319.804561] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  319.804623] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000087081e28 state to 00000000eae20a14
[  319.804689] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  319.804751] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 00000000eae20a14
[  319.804818] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 0000000087081e28
[  319.804881] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  319.804941] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  319.805000] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  319.805060] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  319.805123] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  319.805182] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  319.805247] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  319.805308] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  319.805368] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 00000000eae20a14
[  319.805431] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  319.805493] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000eae20a14
[  319.805563] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  319.805609] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  319.805641] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000eae20a14
[  319.805708] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000f37c832b to 00000000eae20a14
[  319.805771] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000eae20a14
[  319.805836] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  319.806236] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  319.806298] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  319.806359] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  319.806423] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000eae20a14
[  319.807921] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  319.811932] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18804, diff=1, hw=0 hw_last=0
[  319.828509] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18805, diff=1, hw=0 hw_last=0
[  319.845089] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18806, diff=1, hw=0 hw_last=0
[  319.861669] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18807, diff=1, hw=0 hw_last=0
[  319.878250] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18808, diff=1, hw=0 hw_last=0
[  319.894828] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18809, diff=1, hw=0 hw_last=0
[  319.911407] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18810, diff=1, hw=0 hw_last=0
[  319.927987] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18811, diff=1, hw=0 hw_last=0
[  319.944569] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18812, diff=1, hw=0 hw_last=0
[  319.961145] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18813, diff=1, hw=0 hw_last=0
[  319.977727] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18814, diff=1, hw=0 hw_last=0
[  319.994301] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18815, diff=1, hw=0 hw_last=0
[  320.010880] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18816, diff=1, hw=0 hw_last=0
[  320.027461] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18817, diff=1, hw=0 hw_last=0
[  320.035621] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  320.035727] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000eae20a14
[  320.035803] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  320.035865] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000087081e28 state to 00000000eae20a14
[  320.035930] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  320.035991] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 00000000eae20a14
[  320.036059] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000087081e28
[  320.036122] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  320.036181] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  320.036242] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  320.036302] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  320.036366] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  320.036426] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  320.036489] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  320.036549] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  320.036609] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 00000000eae20a14
[  320.036671] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  320.036733] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000eae20a14
[  320.036804] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  320.036849] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  320.036881] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000eae20a14
[  320.036947] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000e0dcab9c to 00000000eae20a14
[  320.037009] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000eae20a14
[  320.037085] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000eae20a14 nonblocking
[  320.037183] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  320.037261] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  320.044036] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18818, diff=1, hw=0 hw_last=0
[  320.044136] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000eae20a14
[  320.044204] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  320.044267] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  320.044329] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  320.044391] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  320.044454] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000eae20a14
[  320.060616] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18819, diff=1, hw=0 hw_last=0
[  320.077195] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18820, diff=1, hw=0 hw_last=0
[  320.093773] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18821, diff=1, hw=0 hw_last=0
[  320.110351] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18822, diff=1, hw=0 hw_last=0
[  320.126931] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18823, diff=1, hw=0 hw_last=0
[  320.143511] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18824, diff=1, hw=0 hw_last=0
[  320.160089] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18825, diff=1, hw=0 hw_last=0
[  320.176675] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18826, diff=1, hw=0 hw_last=0
[  320.193250] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18827, diff=1, hw=0 hw_last=0
[  320.209824] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18828, diff=1, hw=0 hw_last=0
[  320.226404] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18829, diff=1, hw=0 hw_last=0
[  320.242983] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18830, diff=1, hw=0 hw_last=0
[  320.259562] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18831, diff=1, hw=0 hw_last=0
[  320.276141] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18832, diff=1, hw=0 hw_last=0
[  320.292720] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18833, diff=1, hw=0 hw_last=0
[  320.309300] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18834, diff=1, hw=0 hw_last=0
[  320.325882] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18835, diff=1, hw=0 hw_last=0
[  320.766422] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 000000002cafbe1b
[  320.766486] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  320.766546] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  320.766606] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  320.766666] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  320.766730] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  320.766791] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  320.766855] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  320.766915] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  320.766975] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000008a640c91
[  320.767039] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  320.767099] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000008a640c91
[  320.767171] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  320.767217] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  320.767248] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008a640c91
[  320.767318] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000eae20a14 to 000000008a640c91
[  320.767381] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008a640c91
[  320.767448] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  320.767509] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  320.767572] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  320.767642] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000008a640c91
[  320.767707] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008a640c91
[  320.767768] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  320.767829] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  320.767890] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  320.767951] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  320.768011] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008a640c91
[  320.769461] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  320.773527] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18862, diff=1, hw=0 hw_last=0
[  320.790103] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18863, diff=1, hw=0 hw_last=0
[  320.806684] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18864, diff=1, hw=0 hw_last=0
[  320.823260] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18865, diff=1, hw=0 hw_last=0
[  320.839843] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18866, diff=1, hw=0 hw_last=0
[  320.856422] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18867, diff=1, hw=0 hw_last=0
[  320.873002] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18868, diff=1, hw=0 hw_last=0
[  320.889581] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18869, diff=1, hw=0 hw_last=0
[  320.906160] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18870, diff=1, hw=0 hw_last=0
[  320.922741] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18871, diff=1, hw=0 hw_last=0
[  320.939318] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18872, diff=1, hw=0 hw_last=0
[  320.955898] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18873, diff=1, hw=0 hw_last=0
[  320.972476] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18874, diff=1, hw=0 hw_last=0
[  320.989053] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18875, diff=1, hw=0 hw_last=0
[  321.000373] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  321.000480] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008a640c91
[  321.000556] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  321.000619] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000002cafbe1b state to 000000008a640c91
[  321.000686] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  321.000747] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 000000008a640c91
[  321.000815] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 000000002cafbe1b
[  321.000878] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  321.000938] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  321.000998] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  321.001058] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  321.001121] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  321.001181] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  321.001245] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  321.001305] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  321.001365] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000008a640c91
[  321.001429] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  321.001490] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000008a640c91
[  321.001561] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  321.001607] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  321.001639] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008a640c91
[  321.001709] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000f37c832b to 000000008a640c91
[  321.001771] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008a640c91
[  321.001848] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000008a640c91 nonblocking
[  321.001956] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  321.002031] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  321.005633] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18876, diff=1, hw=0 hw_last=0
[  321.005735] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008a640c91
[  321.005806] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  321.005868] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  321.005930] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  321.005993] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  321.006056] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008a640c91
[  321.022208] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18877, diff=1, hw=0 hw_last=0
[  321.154844] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18885, diff=1, hw=0 hw_last=0
[  321.171421] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18886, diff=1, hw=0 hw_last=0
[  321.187998] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18887, diff=1, hw=0 hw_last=0
[  321.204577] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18888, diff=1, hw=0 hw_last=0
[  321.221156] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18889, diff=1, hw=0 hw_last=0
[  321.237735] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18890, diff=1, hw=0 hw_last=0
[  321.254314] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18891, diff=1, hw=0 hw_last=0
[  321.270893] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18892, diff=1, hw=0 hw_last=0
[  321.287473] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18893, diff=1, hw=0 hw_last=0
[  321.304054] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18894, diff=1, hw=0 hw_last=0
[  321.320633] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18895, diff=1, hw=0 hw_last=0
[  321.337212] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18896, diff=1, hw=0 hw_last=0
[  321.353791] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18897, diff=1, hw=0 hw_last=0
[  321.370370] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18898, diff=1, hw=0 hw_last=0
[  321.386951] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18899, diff=1, hw=0 hw_last=0
[  321.403529] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18900, diff=1, hw=0 hw_last=0
[  321.420106] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18901, diff=1, hw=0 hw_last=0
[  321.436686] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18902, diff=1, hw=0 hw_last=0
[  321.453264] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18903, diff=1, hw=0 hw_last=0
[  321.469846] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18904, diff=1, hw=0 hw_last=0
[  321.486425] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18905, diff=1, hw=0 hw_last=0
[  321.503004] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18906, diff=1, hw=0 hw_last=0
[  321.519583] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18907, diff=1, hw=0 hw_last=0
[  321.536161] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18908, diff=1, hw=0 hw_last=0
[  321.552741] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18909, diff=1, hw=0 hw_last=0
[  321.569319] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18910, diff=1, hw=0 hw_last=0
[  321.585901] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18911, diff=1, hw=0 hw_last=0
[  321.602480] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18912, diff=1, hw=0 hw_last=0
[  321.619057] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18913, diff=1, hw=0 hw_last=0
[  321.635637] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18914, diff=1, hw=0 hw_last=0
[  321.652217] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18915, diff=1, hw=0 hw_last=0
[  321.668797] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18916, diff=1, hw=0 hw_last=0
[  321.685378] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18917, diff=1, hw=0 hw_last=0
[  321.701954] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18918, diff=1, hw=0 hw_last=0
[  321.718533] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18919, diff=1, hw=0 hw_last=0
[  321.735127] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18920, diff=1, hw=0 hw_last=0
[  321.735851] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  321.735956] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 18921 to client
[  321.744212] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  321.744304] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000cc24793
[  321.744376] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  321.744438] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000ec98bd42 state to 000000000cc24793
[  321.744503] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  321.744564] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a743c9a8 state to 000000000cc24793
[  321.744632] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000ec98bd42
[  321.744696] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  321.744755] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  321.744815] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  321.744875] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  321.744940] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  321.744999] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  321.745062] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  321.745122] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  321.745182] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 000000000cc24793
[  321.745245] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  321.745305] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000000cc24793
[  321.745375] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  321.745419] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  321.745451] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000cc24793
[  321.745518] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000018d86a98 to 000000000cc24793
[  321.745580] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000cc24793
[  321.745647] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  321.745708] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  321.745770] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  321.745839] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000000cc24793
[  321.745902] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000cc24793
[  321.768275] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18922, diff=1, hw=0 hw_last=0
[  321.784854] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18923, diff=1, hw=0 hw_last=0
[  321.801433] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18924, diff=1, hw=0 hw_last=0
[  321.818016] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18925, diff=1, hw=0 hw_last=0
[  321.834593] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18926, diff=1, hw=0 hw_last=0
[  321.851174] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18927, diff=1, hw=0 hw_last=0
[  321.867752] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18928, diff=1, hw=0 hw_last=0
[  321.884333] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18929, diff=1, hw=0 hw_last=0
[  321.900915] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18930, diff=1, hw=0 hw_last=0
[  321.917494] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18931, diff=1, hw=0 hw_last=0
[  321.934069] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18932, diff=1, hw=0 hw_last=0
[  321.950646] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18933, diff=1, hw=0 hw_last=0
[  321.967226] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18934, diff=1, hw=0 hw_last=0
[  321.968451] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  321.968551] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000cc24793
[  321.968627] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  321.968689] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000ec98bd42 state to 000000000cc24793
[  321.968756] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  321.968816] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a743c9a8 state to 000000000cc24793
[  321.968885] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000ec98bd42
[  321.968948] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  321.969008] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  321.969067] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  321.969127] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  321.969190] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  321.969250] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  321.969315] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  321.969374] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  321.969434] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 000000000cc24793
[  321.969497] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  321.969559] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000000cc24793
[  321.969630] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  321.969675] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  321.969707] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000cc24793
[  321.969775] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000082174610 to 000000000cc24793
[  321.969838] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000cc24793
[  321.969915] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000cc24793 nonblocking
[  321.970019] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  321.970097] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  321.983802] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18935, diff=1, hw=0 hw_last=0
[  321.983903] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000cc24793
[  321.983972] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  321.984035] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  321.984096] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  321.984160] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  321.984223] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000cc24793
[  322.000380] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18936, diff=1, hw=0 hw_last=0
[  322.016961] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18937, diff=1, hw=0 hw_last=0
[  322.033539] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18938, diff=1, hw=0 hw_last=0
[  322.050118] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18939, diff=1, hw=0 hw_last=0
[  322.066701] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18940, diff=1, hw=0 hw_last=0
[  322.083277] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18941, diff=1, hw=0 hw_last=0
[  322.099856] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18942, diff=1, hw=0 hw_last=0
[  322.116438] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18943, diff=1, hw=0 hw_last=0
[  322.133020] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18944, diff=1, hw=0 hw_last=0
[  322.149591] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18945, diff=1, hw=0 hw_last=0
[  322.166172] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18946, diff=1, hw=0 hw_last=0
[  322.182749] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18947, diff=1, hw=0 hw_last=0
[  322.199329] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18948, diff=1, hw=0 hw_last=0
[  322.215908] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18949, diff=1, hw=0 hw_last=0
[  322.232487] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18950, diff=1, hw=0 hw_last=0
[  322.249066] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18951, diff=1, hw=0 hw_last=0
[  322.265645] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18952, diff=1, hw=0 hw_last=0
[  322.282230] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18953, diff=1, hw=0 hw_last=0
[  322.298809] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18954, diff=1, hw=0 hw_last=0
[  322.315386] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18955, diff=1, hw=0 hw_last=0
[  322.331967] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18956, diff=1, hw=0 hw_last=0
[  322.845928] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18987, diff=1, hw=0 hw_last=0
[  322.862506] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18988, diff=1, hw=0 hw_last=0
[  322.879087] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18989, diff=1, hw=0 hw_last=0
[  322.895667] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18990, diff=1, hw=0 hw_last=0
[  322.912245] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18991, diff=1, hw=0 hw_last=0
[  322.928822] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18992, diff=1, hw=0 hw_last=0
[  322.945399] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18993, diff=1, hw=0 hw_last=0
[  322.961979] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18994, diff=1, hw=0 hw_last=0
[  322.963055] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  322.963150] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000ace560b
[  322.963225] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  322.963288] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000bac3ec2d state to 000000000ace560b
[  322.963356] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  322.963417] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 000000000ace560b
[  322.963487] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000bac3ec2d
[  322.963550] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  322.963609] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  322.963669] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  322.963730] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  322.963793] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  322.963853] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  322.963916] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  322.963977] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  322.964036] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 000000000ace560b
[  322.964100] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  322.964162] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000000ace560b
[  322.964232] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  322.964278] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  322.964311] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000ace560b
[  322.964379] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000d7e48c6b to 000000000ace560b
[  322.964442] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000ace560b
[  322.964517] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000ace560b nonblocking
[  322.964621] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  322.964704] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  322.978554] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18995, diff=1, hw=0 hw_last=0
[  322.978655] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000ace560b
[  322.978724] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  322.978790] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  322.978852] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  322.978915] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  322.978977] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000ace560b
[  322.995134] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18996, diff=1, hw=0 hw_last=0
[  323.011712] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18997, diff=1, hw=0 hw_last=0
[  323.028291] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18998, diff=1, hw=0 hw_last=0
[  323.044871] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=18999, diff=1, hw=0 hw_last=0
[  323.061453] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19000, diff=1, hw=0 hw_last=0
[  323.078028] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19001, diff=1, hw=0 hw_last=0
[  323.094608] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19002, diff=1, hw=0 hw_last=0
[  323.111191] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19003, diff=1, hw=0 hw_last=0
[  323.127769] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19004, diff=1, hw=0 hw_last=0
[  323.144347] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19005, diff=1, hw=0 hw_last=0
[  323.160922] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19006, diff=1, hw=0 hw_last=0
[  323.177502] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19007, diff=1, hw=0 hw_last=0
[  323.194081] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19008, diff=1, hw=0 hw_last=0
[  323.210660] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19009, diff=1, hw=0 hw_last=0
[  323.227239] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19010, diff=1, hw=0 hw_last=0
[  323.243818] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19011, diff=1, hw=0 hw_last=0
[  323.260397] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19012, diff=1, hw=0 hw_last=0
[  323.276981] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19013, diff=1, hw=0 hw_last=0
[  323.293558] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19014, diff=1, hw=0 hw_last=0
[  323.310138] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19015, diff=1, hw=0 hw_last=0
[  323.326716] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19016, diff=1, hw=0 hw_last=0
[  323.343297] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19017, diff=1, hw=0 hw_last=0
[  323.359875] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19018, diff=1, hw=0 hw_last=0
[  323.376453] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19019, diff=1, hw=0 hw_last=0
[  323.393033] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19020, diff=1, hw=0 hw_last=0
[  323.409612] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19021, diff=1, hw=0 hw_last=0
[  323.426190] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19022, diff=1, hw=0 hw_last=0
[  323.751073] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  323.751134] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000008e9f664b
[  323.751204] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  323.751249] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  323.751281] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008e9f664b
[  323.751351] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000000ace560b to 000000008e9f664b
[  323.751413] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008e9f664b
[  323.751480] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  323.751542] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  323.751605] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  323.751676] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000008e9f664b
[  323.751740] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008e9f664b
[  323.751802] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  323.751862] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  323.751923] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  323.751984] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  323.752044] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008e9f664b
[  323.753471] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  323.757782] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19042, diff=1, hw=0 hw_last=0
[  323.774361] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19043, diff=1, hw=0 hw_last=0
[  323.790938] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19044, diff=1, hw=0 hw_last=0
[  323.807517] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19045, diff=1, hw=0 hw_last=0
[  323.824100] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19046, diff=1, hw=0 hw_last=0
[  323.840678] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19047, diff=1, hw=0 hw_last=0
[  323.857256] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19048, diff=1, hw=0 hw_last=0
[  323.873837] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19049, diff=1, hw=0 hw_last=0
[  323.890416] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19050, diff=1, hw=0 hw_last=0
[  323.906998] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19051, diff=1, hw=0 hw_last=0
[  323.923575] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19052, diff=1, hw=0 hw_last=0
[  323.940154] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19053, diff=1, hw=0 hw_last=0
[  323.956730] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19054, diff=1, hw=0 hw_last=0
[  323.973308] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19055, diff=1, hw=0 hw_last=0
[  323.981566] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  323.981671] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008e9f664b
[  323.981746] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  323.981808] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000003519e999 state to 000000008e9f664b
[  323.981874] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  323.981935] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 000000008e9f664b
[  323.982004] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 000000003519e999
[  323.982067] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  323.982167] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  323.982231] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  323.982294] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  323.982358] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  323.982419] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  323.982484] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  323.982544] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  323.982605] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000008e9f664b
[  323.982669] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  323.982731] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000008e9f664b
[  323.982804] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  323.982851] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  323.982883] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008e9f664b
[  323.982952] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000006e1bef3e to 000000008e9f664b
[  323.983014] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008e9f664b
[  323.983091] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000008e9f664b nonblocking
[  323.983190] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  323.983268] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  323.989886] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19056, diff=1, hw=0 hw_last=0
[  323.989987] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008e9f664b
[  323.990058] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  323.990131] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  323.990194] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  323.990256] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  323.990321] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008e9f664b
[  324.006464] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19057, diff=1, hw=0 hw_last=0
[  324.023044] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19058, diff=1, hw=0 hw_last=0
[  324.039621] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19059, diff=1, hw=0 hw_last=0
[  324.056200] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19060, diff=1, hw=0 hw_last=0
[  324.072780] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19061, diff=1, hw=0 hw_last=0
[  324.089361] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19062, diff=1, hw=0 hw_last=0
[  324.105939] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19063, diff=1, hw=0 hw_last=0
[  324.122519] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19064, diff=1, hw=0 hw_last=0
[  324.139103] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19065, diff=1, hw=0 hw_last=0
[  324.155680] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19066, diff=1, hw=0 hw_last=0
[  324.172255] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19067, diff=1, hw=0 hw_last=0
[  324.188834] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19068, diff=1, hw=0 hw_last=0
[  324.205412] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19069, diff=1, hw=0 hw_last=0
[  324.221991] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19070, diff=1, hw=0 hw_last=0
[  324.238570] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19071, diff=1, hw=0 hw_last=0
[  324.255149] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19072, diff=1, hw=0 hw_last=0
[  324.271729] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19073, diff=1, hw=0 hw_last=0
[  324.288309] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19074, diff=1, hw=0 hw_last=0
[  324.304892] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19075, diff=1, hw=0 hw_last=0
[  324.321469] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19076, diff=1, hw=0 hw_last=0
[  324.338049] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19077, diff=1, hw=0 hw_last=0
[  324.354627] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19078, diff=1, hw=0 hw_last=0
[  324.371207] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19079, diff=1, hw=0 hw_last=0
[  324.387785] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19080, diff=1, hw=0 hw_last=0
[  324.404362] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19081, diff=1, hw=0 hw_last=0
[  324.420942] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19082, diff=1, hw=0 hw_last=0
[  324.437521] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19083, diff=1, hw=0 hw_last=0
[  324.454100] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19084, diff=1, hw=0 hw_last=0
[  324.470680] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19085, diff=1, hw=0 hw_last=0
[  324.487259] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19086, diff=1, hw=0 hw_last=0
[  324.503837] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19087, diff=1, hw=0 hw_last=0
[  324.520417] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19088, diff=1, hw=0 hw_last=0
[  324.537001] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19089, diff=1, hw=0 hw_last=0
[  324.553578] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19090, diff=1, hw=0 hw_last=0
[  324.570157] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19091, diff=1, hw=0 hw_last=0
[  324.586734] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19092, diff=1, hw=0 hw_last=0
[  324.603316] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19093, diff=1, hw=0 hw_last=0
[  324.619895] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19094, diff=1, hw=0 hw_last=0
[  324.636472] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19095, diff=1, hw=0 hw_last=0
[  324.653055] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19096, diff=1, hw=0 hw_last=0
[  324.669634] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19097, diff=1, hw=0 hw_last=0
[  324.686209] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19098, diff=1, hw=0 hw_last=0
[  324.702794] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19099, diff=1, hw=0 hw_last=0
[  324.719371] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19100, diff=1, hw=0 hw_last=0
[  324.735947] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19101, diff=1, hw=0 hw_last=0
[  324.752526] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19102, diff=1, hw=0 hw_last=0
[  324.769111] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19103, diff=1, hw=0 hw_last=0
[  324.774756] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  324.774867] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 19104 to client
[  324.778175] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  324.778273] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000c0cf118d
[  324.778346] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  324.778410] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000082b4fa6a state to 00000000c0cf118d
[  324.778477] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  324.778538] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 00000000c0cf118d
[  324.778609] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000082b4fa6a
[  324.778673] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  324.778734] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  324.778795] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  324.778856] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  324.778921] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  324.778982] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  324.779047] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  324.779107] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  324.779169] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 00000000c0cf118d
[  324.779231] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  324.779293] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000c0cf118d
[  324.779365] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  324.779410] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  324.779443] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000c0cf118d
[  324.779511] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000000cc24793 to 00000000c0cf118d
[  324.852009] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19108, diff=1, hw=0 hw_last=0
[  324.868589] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19109, diff=1, hw=0 hw_last=0
[  324.885170] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19110, diff=1, hw=0 hw_last=0
[  324.901747] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19111, diff=1, hw=0 hw_last=0
[  324.918327] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19112, diff=1, hw=0 hw_last=0
[  324.934907] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19113, diff=1, hw=0 hw_last=0
[  324.951486] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19114, diff=1, hw=0 hw_last=0
[  324.968066] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19115, diff=1, hw=0 hw_last=0
[  324.984642] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19116, diff=1, hw=0 hw_last=0
[  325.001222] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19117, diff=1, hw=0 hw_last=0
[  325.009901] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  325.010004] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000c0cf118d
[  325.010080] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  325.010182] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000082b4fa6a state to 00000000c0cf118d
[  325.010256] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  325.010319] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 00000000c0cf118d
[  325.010392] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 0000000082b4fa6a
[  325.010456] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  325.010517] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  325.010578] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  325.010639] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  325.010704] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  325.010766] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  325.010831] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  325.010892] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  325.010955] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 00000000c0cf118d
[  325.011018] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  325.011082] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000c0cf118d
[  325.011156] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  325.011203] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  325.011236] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000c0cf118d
[  325.011304] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000018d86a98 to 00000000c0cf118d
[  325.011367] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000c0cf118d
[  325.011444] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000c0cf118d nonblocking
[  325.011553] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  325.011630] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  325.016118] systemd-journald[214]: Data hash table of /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal has a fill level at 75.0 (2731 of 3640 items, 2097152 file size, 767 bytes per hash table item), suggesting rotation.
[  325.017798] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19118, diff=1, hw=0 hw_last=0
[  325.041516] systemd-journald[214]: /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal: Journal header limits reached or header out-of-date, rotating.
[  325.041499] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000c0cf118d
[  325.041531] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19119, diff=1, hw=0 hw_last=0
[  325.050953] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19120, diff=1, hw=0 hw_last=0
[  325.061630] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  325.061713] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  325.061778] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  325.061841] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  325.061906] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000c0cf118d
[  325.067536] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19121, diff=1, hw=0 hw_last=0
[  325.084113] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19122, diff=1, hw=0 hw_last=0
[  325.100689] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19123, diff=1, hw=0 hw_last=0
[  325.117272] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19124, diff=1, hw=0 hw_last=0
[  325.133848] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19125, diff=1, hw=0 hw_last=0
[  325.150428] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19126, diff=1, hw=0 hw_last=0
[  325.167009] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19127, diff=1, hw=0 hw_last=0
[  325.183589] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19128, diff=1, hw=0 hw_last=0
[  325.200164] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19129, diff=1, hw=0 hw_last=0
[  325.216743] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19130, diff=1, hw=0 hw_last=0
[  325.233325] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19131, diff=1, hw=0 hw_last=0
[  325.249901] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19132, diff=1, hw=0 hw_last=0
[  325.266481] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19133, diff=1, hw=0 hw_last=0
[  325.283059] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19134, diff=1, hw=0 hw_last=0
[  325.299638] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19135, diff=1, hw=0 hw_last=0
[  325.316217] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19136, diff=1, hw=0 hw_last=0
[  325.332800] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19137, diff=1, hw=0 hw_last=0
[  325.349377] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19138, diff=1, hw=0 hw_last=0
[  325.365956] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19139, diff=1, hw=0 hw_last=0
[  325.515168] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19148, diff=1, hw=0 hw_last=0
[  325.531747] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19149, diff=1, hw=0 hw_last=0
[  325.548327] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19150, diff=1, hw=0 hw_last=0
[  325.564909] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19151, diff=1, hw=0 hw_last=0
[  325.581486] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19152, diff=1, hw=0 hw_last=0
[  325.598066] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19153, diff=1, hw=0 hw_last=0
[  325.614644] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19154, diff=1, hw=0 hw_last=0
[  325.631223] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19155, diff=1, hw=0 hw_last=0
[  325.647803] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19156, diff=1, hw=0 hw_last=0
[  325.664383] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19157, diff=1, hw=0 hw_last=0
[  325.680964] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19158, diff=1, hw=0 hw_last=0
[  325.697542] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19159, diff=1, hw=0 hw_last=0
[  325.714122] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19160, diff=1, hw=0 hw_last=0
[  325.730701] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19161, diff=1, hw=0 hw_last=0
[  325.747278] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19162, diff=1, hw=0 hw_last=0
[  325.763856] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19163, diff=1, hw=0 hw_last=0
[  325.780436] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19164, diff=1, hw=0 hw_last=0
[  325.797019] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19165, diff=1, hw=0 hw_last=0
[  325.804156] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  325.804268] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 19166 to client
[  325.806525] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  325.806617] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000029aaf162
[  325.806690] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  325.806753] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000055579822 state to 0000000029aaf162
[  325.806822] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  325.806884] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000e8543c49 state to 0000000029aaf162
[  325.806953] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 0000000055579822
[  325.807016] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  325.807077] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  325.807137] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  325.807198] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  325.807263] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  325.807323] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  325.807388] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  325.807448] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  325.807509] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 0000000029aaf162
[  325.807572] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  325.807634] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000029aaf162
[  325.807705] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  325.807752] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  325.807784] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000029aaf162
[  325.807852] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000008a640c91 to 0000000029aaf162
[  325.807915] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000029aaf162
[  325.807982] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  325.808044] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  325.808107] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  325.808178] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 0000000029aaf162
[  325.808243] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000029aaf162
[  325.808305] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  325.808366] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  325.808426] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  325.808488] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  325.808549] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000029aaf162
[  325.809983] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  325.813602] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19166, diff=1, hw=0 hw_last=0
[  325.830177] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19167, diff=1, hw=0 hw_last=0
[  325.846758] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19168, diff=1, hw=0 hw_last=0
[  325.863336] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19169, diff=1, hw=0 hw_last=0
[  325.879915] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19170, diff=1, hw=0 hw_last=0
[  325.896496] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19171, diff=1, hw=0 hw_last=0
[  325.913075] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19172, diff=1, hw=0 hw_last=0
[  325.929653] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19173, diff=1, hw=0 hw_last=0
[  325.946234] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19174, diff=1, hw=0 hw_last=0
[  325.962816] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19175, diff=1, hw=0 hw_last=0
[  325.979393] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19176, diff=1, hw=0 hw_last=0
[  325.995972] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19177, diff=1, hw=0 hw_last=0
[  326.012549] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19178, diff=1, hw=0 hw_last=0
[  326.029130] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19179, diff=1, hw=0 hw_last=0
[  326.037357] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  326.037863] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  326.037923] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  326.037982] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  326.038042] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  326.038143] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  326.038214] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  326.038284] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  326.038345] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  326.038406] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 0000000029aaf162
[  326.038471] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  326.038534] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000029aaf162
[  326.038607] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  326.038656] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  326.038689] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000029aaf162
[  326.038759] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000eae20a14 to 0000000029aaf162
[  326.038822] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000029aaf162
[  326.038901] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000029aaf162 nonblocking
[  326.039001] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  326.039075] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  326.045707] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19180, diff=1, hw=0 hw_last=0
[  326.045806] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000029aaf162
[  326.045883] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  326.045946] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  326.046007] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  326.046070] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  326.046146] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000029aaf162
[  326.062285] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19181, diff=1, hw=0 hw_last=0
[  326.078862] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19182, diff=1, hw=0 hw_last=0
[  326.095442] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19183, diff=1, hw=0 hw_last=0
[  326.112020] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19184, diff=1, hw=0 hw_last=0
[  326.128602] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19185, diff=1, hw=0 hw_last=0
[  326.145182] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19186, diff=1, hw=0 hw_last=0
[  326.161759] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19187, diff=1, hw=0 hw_last=0
[  326.178338] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19188, diff=1, hw=0 hw_last=0
[  326.194919] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19189, diff=1, hw=0 hw_last=0
[  326.211498] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19190, diff=1, hw=0 hw_last=0
[  326.228074] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19191, diff=1, hw=0 hw_last=0
[  326.244653] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19192, diff=1, hw=0 hw_last=0
[  326.261232] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19193, diff=1, hw=0 hw_last=0
[  326.277811] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19194, diff=1, hw=0 hw_last=0
[  326.294390] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19195, diff=1, hw=0 hw_last=0
[  326.310970] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19196, diff=1, hw=0 hw_last=0
[  326.327549] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19197, diff=1, hw=0 hw_last=0
[  326.344128] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19198, diff=1, hw=0 hw_last=0
[  326.360711] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19199, diff=1, hw=0 hw_last=0
[  326.377289] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19200, diff=1, hw=0 hw_last=0
[  326.393867] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19201, diff=1, hw=0 hw_last=0
[  326.410445] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19202, diff=1, hw=0 hw_last=0
[  326.427025] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19203, diff=1, hw=0 hw_last=0
[  326.443603] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19204, diff=1, hw=0 hw_last=0
[  326.460184] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19205, diff=1, hw=0 hw_last=0
[  326.476762] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19206, diff=1, hw=0 hw_last=0
[  326.493341] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19207, diff=1, hw=0 hw_last=0
[  326.509920] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19208, diff=1, hw=0 hw_last=0
[  326.526500] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19209, diff=1, hw=0 hw_last=0
[  326.543081] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19210, diff=1, hw=0 hw_last=0
[  326.559658] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19211, diff=1, hw=0 hw_last=0
[  326.576238] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19212, diff=1, hw=0 hw_last=0
[  326.592817] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19213, diff=1, hw=0 hw_last=0
[  326.609396] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19214, diff=1, hw=0 hw_last=0
[  326.625975] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19215, diff=1, hw=0 hw_last=0
[  326.642554] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19216, diff=1, hw=0 hw_last=0
[  326.659133] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19217, diff=1, hw=0 hw_last=0
[  326.675713] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19218, diff=1, hw=0 hw_last=0
[  326.692291] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19219, diff=1, hw=0 hw_last=0
[  326.708871] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19220, diff=1, hw=0 hw_last=0
[  327.065891] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  327.065952] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000002eee26c9 state to 000000007967e7cb
[  327.066020] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 0000000087081e28
[  327.066125] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  327.066195] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  327.066259] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  327.066320] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  327.066386] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  327.066447] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  327.066512] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  327.066574] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  327.066635] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000007967e7cb
[  327.066700] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  327.066763] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000007967e7cb
[  327.066836] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  327.066883] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  327.066914] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000007967e7cb
[  327.066984] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000008a640c91 to 000000007967e7cb
[  327.067048] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000007967e7cb
[  327.067126] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007967e7cb nonblocking
[  327.067231] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  327.067304] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  327.073616] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19242, diff=1, hw=0 hw_last=0
[  327.073706] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007967e7cb
[  327.073781] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  327.073843] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  327.073905] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  327.073967] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  327.074029] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007967e7cb
[  327.090195] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19243, diff=1, hw=0 hw_last=0
[  327.106773] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19244, diff=1, hw=0 hw_last=0
[  327.123351] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19245, diff=1, hw=0 hw_last=0
[  327.139932] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19246, diff=1, hw=0 hw_last=0
[  327.156512] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19247, diff=1, hw=0 hw_last=0
[  327.173090] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19248, diff=1, hw=0 hw_last=0
[  327.189669] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19249, diff=1, hw=0 hw_last=0
[  327.206249] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19250, diff=1, hw=0 hw_last=0
[  327.222831] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19251, diff=1, hw=0 hw_last=0
[  327.239405] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19252, diff=1, hw=0 hw_last=0
[  327.255984] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19253, diff=1, hw=0 hw_last=0
[  327.272563] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19254, diff=1, hw=0 hw_last=0
[  327.289142] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19255, diff=1, hw=0 hw_last=0
[  327.305722] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19256, diff=1, hw=0 hw_last=0
[  327.322301] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19257, diff=1, hw=0 hw_last=0
[  327.338880] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19258, diff=1, hw=0 hw_last=0
[  327.355459] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19259, diff=1, hw=0 hw_last=0
[  327.372041] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19260, diff=1, hw=0 hw_last=0
[  327.388620] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19261, diff=1, hw=0 hw_last=0
[  327.405198] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19262, diff=1, hw=0 hw_last=0
[  327.421776] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19263, diff=1, hw=0 hw_last=0
[  327.438356] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19264, diff=1, hw=0 hw_last=0
[  327.454935] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19265, diff=1, hw=0 hw_last=0
[  327.471514] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19266, diff=1, hw=0 hw_last=0
[  327.488094] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19267, diff=1, hw=0 hw_last=0
[  327.504672] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19268, diff=1, hw=0 hw_last=0
[  327.521252] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19269, diff=1, hw=0 hw_last=0
[  327.537831] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19270, diff=1, hw=0 hw_last=0
[  327.554412] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19271, diff=1, hw=0 hw_last=0
[  327.570990] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19272, diff=1, hw=0 hw_last=0
[  327.587569] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19273, diff=1, hw=0 hw_last=0
[  327.604149] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19274, diff=1, hw=0 hw_last=0
[  327.620728] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19275, diff=1, hw=0 hw_last=0
[  327.637306] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19276, diff=1, hw=0 hw_last=0
[  327.653886] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19277, diff=1, hw=0 hw_last=0
[  327.670464] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19278, diff=1, hw=0 hw_last=0
[  327.687044] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19279, diff=1, hw=0 hw_last=0
[  327.831319] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  327.831380] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000095dd8ec0
[  327.832802] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  327.836265] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19288, diff=1, hw=0 hw_last=0
[  327.852840] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19289, diff=1, hw=0 hw_last=0
[  327.869421] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19290, diff=1, hw=0 hw_last=0
[  327.885998] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19291, diff=1, hw=0 hw_last=0
[  327.902579] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19292, diff=1, hw=0 hw_last=0
[  327.919158] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19293, diff=1, hw=0 hw_last=0
[  327.935738] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19294, diff=1, hw=0 hw_last=0
[  327.952317] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19295, diff=1, hw=0 hw_last=0
[  327.968896] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19296, diff=1, hw=0 hw_last=0
[  327.985478] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19297, diff=1, hw=0 hw_last=0
[  328.002055] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19298, diff=1, hw=0 hw_last=0
[  328.018634] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19299, diff=1, hw=0 hw_last=0
[  328.035212] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19300, diff=1, hw=0 hw_last=0
[  328.051791] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19301, diff=1, hw=0 hw_last=0
[  328.060201] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  328.060305] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000095dd8ec0
[  328.060380] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  328.060443] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000002cafbe1b state to 0000000095dd8ec0
[  328.060509] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  328.060570] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 0000000095dd8ec0
[  328.060639] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 000000002cafbe1b
[  328.060703] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  328.060764] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  328.060825] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  328.060885] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  328.060948] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  328.061008] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  328.061073] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  328.061133] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  328.061193] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 0000000095dd8ec0
[  328.061257] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  328.061320] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000095dd8ec0
[  328.061390] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  328.061435] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  328.061467] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000095dd8ec0
[  328.061535] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000000cc24793 to 0000000095dd8ec0
[  328.061599] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000095dd8ec0
[  328.061675] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000095dd8ec0 nonblocking
[  328.061785] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  328.061860] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  328.068369] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19302, diff=1, hw=0 hw_last=0
[  328.068476] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000095dd8ec0
[  328.068547] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  328.068611] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  328.068673] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  328.068735] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  328.068798] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000095dd8ec0
[  328.084947] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19303, diff=1, hw=0 hw_last=0
[  328.101525] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19304, diff=1, hw=0 hw_last=0
[  328.118104] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19305, diff=1, hw=0 hw_last=0
[  328.134683] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19306, diff=1, hw=0 hw_last=0
[  328.151263] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19307, diff=1, hw=0 hw_last=0
[  328.167844] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19308, diff=1, hw=0 hw_last=0
[  328.184420] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19309, diff=1, hw=0 hw_last=0
[  328.200999] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19310, diff=1, hw=0 hw_last=0
[  328.217581] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19311, diff=1, hw=0 hw_last=0
[  328.234160] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19312, diff=1, hw=0 hw_last=0
[  328.250737] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19313, diff=1, hw=0 hw_last=0
[  328.267315] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19314, diff=1, hw=0 hw_last=0
[  328.283894] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19315, diff=1, hw=0 hw_last=0
[  328.300473] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19316, diff=1, hw=0 hw_last=0
[  328.317053] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19317, diff=1, hw=0 hw_last=0
[  328.333632] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19318, diff=1, hw=0 hw_last=0
[  328.350211] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19319, diff=1, hw=0 hw_last=0
[  328.366792] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19320, diff=1, hw=0 hw_last=0
[  328.383372] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19321, diff=1, hw=0 hw_last=0
[  328.399950] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19322, diff=1, hw=0 hw_last=0
[  328.416528] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19323, diff=1, hw=0 hw_last=0
[  328.433108] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19324, diff=1, hw=0 hw_last=0
[  328.449688] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19325, diff=1, hw=0 hw_last=0
[  328.466267] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19326, diff=1, hw=0 hw_last=0
[  328.482846] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19327, diff=1, hw=0 hw_last=0
[  328.499426] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19328, diff=1, hw=0 hw_last=0
[  328.516003] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19329, diff=1, hw=0 hw_last=0
[  328.532584] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19330, diff=1, hw=0 hw_last=0
[  328.549162] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19331, diff=1, hw=0 hw_last=0
[  328.565741] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19332, diff=1, hw=0 hw_last=0
[  328.582321] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19333, diff=1, hw=0 hw_last=0
[  328.598899] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19334, diff=1, hw=0 hw_last=0
[  328.615479] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19335, diff=1, hw=0 hw_last=0
[  328.632058] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19336, diff=1, hw=0 hw_last=0
[  328.648637] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19337, diff=1, hw=0 hw_last=0
[  328.665218] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19338, diff=1, hw=0 hw_last=0
[  328.681796] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19339, diff=1, hw=0 hw_last=0
[  328.698376] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19340, diff=1, hw=0 hw_last=0
[  328.714955] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19341, diff=1, hw=0 hw_last=0
[  328.731535] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19342, diff=1, hw=0 hw_last=0
[  328.748112] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19343, diff=1, hw=0 hw_last=0
[  328.764691] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19344, diff=1, hw=0 hw_last=0
[  328.781270] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19345, diff=1, hw=0 hw_last=0
[  328.797850] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19346, diff=1, hw=0 hw_last=0
[  328.814429] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19347, diff=1, hw=0 hw_last=0
[  328.831009] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19348, diff=1, hw=0 hw_last=0
[  328.847588] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19349, diff=1, hw=0 hw_last=0
[  328.864167] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19350, diff=1, hw=0 hw_last=0
[  328.880750] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19351, diff=1, hw=0 hw_last=0
[  328.888035] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  328.888148] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 19352 to client
[  328.890410] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  328.890503] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006fb5b2d2
[  328.890576] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  328.890640] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000215b6887 state to 000000006fb5b2d2
[  328.890706] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  328.890769] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000adb7ad91 state to 000000006fb5b2d2
[  328.890839] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000215b6887
[  328.890902] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  328.890963] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  328.891023] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  328.891084] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  328.891149] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  328.891210] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  328.891274] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  328.891335] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  328.891397] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 000000006fb5b2d2
[  328.891461] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  328.891522] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000006fb5b2d2
[  328.891592] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  328.891640] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  328.891671] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006fb5b2d2
[  328.891742] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000008e9f664b to 000000006fb5b2d2
[  328.891804] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006fb5b2d2
[  328.891873] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  328.891935] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  328.891998] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  328.892068] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000006fb5b2d2
[  328.892133] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006fb5b2d2
[  328.892194] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  328.892256] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  328.892317] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  328.892378] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  328.892439] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006fb5b2d2
[  328.893873] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  328.897334] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19352, diff=1, hw=0 hw_last=0
[  328.913909] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19353, diff=1, hw=0 hw_last=0
[  329.125425] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  329.125484] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  329.125544] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  329.125604] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  329.125667] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  329.125728] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  329.125792] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  329.125852] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  329.125912] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 000000006fb5b2d2
[  329.125975] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  329.126037] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000006fb5b2d2
[  329.126153] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  329.126210] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  329.126244] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006fb5b2d2
[  329.126320] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000000ace560b to 000000006fb5b2d2
[  329.126385] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006fb5b2d2
[  329.126466] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006fb5b2d2 nonblocking
[  329.126568] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  329.126645] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  329.129438] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19366, diff=1, hw=0 hw_last=0
[  329.129532] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006fb5b2d2
[  329.129599] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  329.129662] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  329.129724] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  329.129787] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  329.129849] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006fb5b2d2
[  329.146016] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19367, diff=1, hw=0 hw_last=0
[  329.162596] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19368, diff=1, hw=0 hw_last=0
[  329.179172] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19369, diff=1, hw=0 hw_last=0
[  329.195752] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19370, diff=1, hw=0 hw_last=0
[  329.212331] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19371, diff=1, hw=0 hw_last=0
[  329.228912] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19372, diff=1, hw=0 hw_last=0
[  329.245491] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19373, diff=1, hw=0 hw_last=0
[  329.262069] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19374, diff=1, hw=0 hw_last=0
[  329.278648] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19375, diff=1, hw=0 hw_last=0
[  329.295227] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19376, diff=1, hw=0 hw_last=0
[  329.311805] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19377, diff=1, hw=0 hw_last=0
[  329.328384] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19378, diff=1, hw=0 hw_last=0
[  329.344963] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19379, diff=1, hw=0 hw_last=0
[  329.361543] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19380, diff=1, hw=0 hw_last=0
[  329.378121] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19381, diff=1, hw=0 hw_last=0
[  329.394701] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19382, diff=1, hw=0 hw_last=0
[  329.411281] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19383, diff=1, hw=0 hw_last=0
[  329.427860] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19384, diff=1, hw=0 hw_last=0
[  329.444443] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19385, diff=1, hw=0 hw_last=0
[  329.461019] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19386, diff=1, hw=0 hw_last=0
[  329.477597] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19387, diff=1, hw=0 hw_last=0
[  329.494177] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19388, diff=1, hw=0 hw_last=0
[  329.510757] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19389, diff=1, hw=0 hw_last=0
[  329.527335] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19390, diff=1, hw=0 hw_last=0
[  329.543914] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19391, diff=1, hw=0 hw_last=0
[  329.560494] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19392, diff=1, hw=0 hw_last=0
[  329.577072] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19393, diff=1, hw=0 hw_last=0
[  329.593653] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19394, diff=1, hw=0 hw_last=0
[  329.610231] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19395, diff=1, hw=0 hw_last=0
[  329.626810] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19396, diff=1, hw=0 hw_last=0
[  329.643390] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19397, diff=1, hw=0 hw_last=0
[  329.659968] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19398, diff=1, hw=0 hw_last=0
[  329.676548] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19399, diff=1, hw=0 hw_last=0
[  329.693127] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19400, diff=1, hw=0 hw_last=0
[  329.709706] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19401, diff=1, hw=0 hw_last=0
[  329.726287] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19402, diff=1, hw=0 hw_last=0
[  329.742865] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19403, diff=1, hw=0 hw_last=0
[  329.759445] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19404, diff=1, hw=0 hw_last=0
[  329.776024] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19405, diff=1, hw=0 hw_last=0
[  329.792602] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19406, diff=1, hw=0 hw_last=0
[  329.925236] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19414, diff=1, hw=0 hw_last=0
[  329.941820] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19415, diff=1, hw=0 hw_last=0
[  329.948743] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  329.948854] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 19416 to client
[  329.951103] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  329.951189] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000004593454f
[  329.951261] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  329.951322] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000bac3ec2d state to 000000004593454f
[  329.951388] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  329.951449] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 000000004593454f
[  329.951519] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000bac3ec2d
[  329.951582] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  329.951642] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  329.951701] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  329.951761] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  329.951825] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  329.951886] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  329.951950] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  329.952010] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  329.952070] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000004593454f
[  329.952133] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  329.952193] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000004593454f
[  329.952263] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  329.952306] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  329.952337] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000004593454f
[  329.952405] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000006fb5b2d2 to 000000004593454f
[  329.952467] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000004593454f
[  329.952533] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  329.952594] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  329.952655] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  329.952724] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000004593454f
[  329.952787] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000004593454f
[  329.952849] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  329.952910] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  329.952971] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  329.953032] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  329.953093] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000004593454f
[  329.954525] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  329.958403] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19416, diff=1, hw=0 hw_last=0
[  329.974982] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19417, diff=1, hw=0 hw_last=0
[  329.991558] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19418, diff=1, hw=0 hw_last=0
[  330.008135] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19419, diff=1, hw=0 hw_last=0
[  330.024717] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19420, diff=1, hw=0 hw_last=0
[  330.041296] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19421, diff=1, hw=0 hw_last=0
[  330.057876] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19422, diff=1, hw=0 hw_last=0
[  330.074454] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19423, diff=1, hw=0 hw_last=0
[  330.091036] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19424, diff=1, hw=0 hw_last=0
[  330.107615] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19425, diff=1, hw=0 hw_last=0
[  330.124193] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19426, diff=1, hw=0 hw_last=0
[  330.140772] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19427, diff=1, hw=0 hw_last=0
[  330.157352] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19428, diff=1, hw=0 hw_last=0
[  330.173930] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19429, diff=1, hw=0 hw_last=0
[  330.174808] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  330.174911] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000004593454f
[  330.174992] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  330.175056] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000bac3ec2d state to 000000004593454f
[  330.175123] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  330.175185] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 000000004593454f
[  330.175255] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000bac3ec2d
[  330.175318] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  330.175379] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  330.175440] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  330.175500] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  330.175563] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  330.175623] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  330.175688] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  330.175749] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  330.175809] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000004593454f
[  330.175874] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  330.175936] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000004593454f
[  330.176009] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  330.176052] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  330.176084] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000004593454f
[  330.176151] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000008e9f664b to 000000004593454f
[  330.176214] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000004593454f
[  330.190612] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000004593454f
[  330.190684] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  330.190747] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  330.190809] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  330.190871] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  330.190936] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000004593454f
[  330.207084] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19431, diff=1, hw=0 hw_last=0
[  330.223662] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19432, diff=1, hw=0 hw_last=0
[  330.240241] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19433, diff=1, hw=0 hw_last=0
[  330.256821] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19434, diff=1, hw=0 hw_last=0
[  330.273401] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19435, diff=1, hw=0 hw_last=0
[  330.289979] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19436, diff=1, hw=0 hw_last=0
[  330.306559] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19437, diff=1, hw=0 hw_last=0
[  330.323137] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19438, diff=1, hw=0 hw_last=0
[  330.339717] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19439, diff=1, hw=0 hw_last=0
[  330.356299] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19440, diff=1, hw=0 hw_last=0
[  330.372875] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19441, diff=1, hw=0 hw_last=0
[  330.389453] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19442, diff=1, hw=0 hw_last=0
[  330.406032] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19443, diff=1, hw=0 hw_last=0
[  330.422611] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19444, diff=1, hw=0 hw_last=0
[  330.439190] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19445, diff=1, hw=0 hw_last=0
[  330.455769] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19446, diff=1, hw=0 hw_last=0
[  330.472349] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19447, diff=1, hw=0 hw_last=0
[  330.488928] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19448, diff=1, hw=0 hw_last=0
[  330.505507] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19449, diff=1, hw=0 hw_last=0
[  330.522089] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19450, diff=1, hw=0 hw_last=0
[  330.538667] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19451, diff=1, hw=0 hw_last=0
[  330.555246] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19452, diff=1, hw=0 hw_last=0
[  330.571825] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19453, diff=1, hw=0 hw_last=0
[  330.588403] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19454, diff=1, hw=0 hw_last=0
[  330.604982] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19455, diff=1, hw=0 hw_last=0
[  330.621563] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19456, diff=1, hw=0 hw_last=0
[  330.638142] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19457, diff=1, hw=0 hw_last=0
[  330.654721] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19458, diff=1, hw=0 hw_last=0
[  330.671300] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19459, diff=1, hw=0 hw_last=0
[  330.687878] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19460, diff=1, hw=0 hw_last=0
[  330.704459] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19461, diff=1, hw=0 hw_last=0
[  330.721037] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19462, diff=1, hw=0 hw_last=0
[  330.737616] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19463, diff=1, hw=0 hw_last=0
[  330.754195] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19464, diff=1, hw=0 hw_last=0
[  330.770775] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19465, diff=1, hw=0 hw_last=0
[  330.787356] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19466, diff=1, hw=0 hw_last=0
[  330.803933] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19467, diff=1, hw=0 hw_last=0
[  330.820513] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19468, diff=1, hw=0 hw_last=0
[  330.837092] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19469, diff=1, hw=0 hw_last=0
[  330.853671] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19470, diff=1, hw=0 hw_last=0
[  330.870251] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19471, diff=1, hw=0 hw_last=0
[  330.886830] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19472, diff=1, hw=0 hw_last=0
[  330.903409] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19473, diff=1, hw=0 hw_last=0
[  330.919989] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19474, diff=1, hw=0 hw_last=0
[  330.936567] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19475, diff=1, hw=0 hw_last=0
[  330.953147] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19476, diff=1, hw=0 hw_last=0
[  330.969727] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19477, diff=1, hw=0 hw_last=0
[  330.986309] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19478, diff=1, hw=0 hw_last=0
[  331.002884] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19479, diff=1, hw=0 hw_last=0
[  331.019466] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19480, diff=1, hw=0 hw_last=0
[  331.031541] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  331.031654] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 19481 to client
[  331.036049] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19481, diff=1, hw=0 hw_last=0
[  331.044924] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  331.045006] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000001477df7c
[  331.168682] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19489, diff=1, hw=0 hw_last=0
[  331.185265] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19490, diff=1, hw=0 hw_last=0
[  331.201844] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19491, diff=1, hw=0 hw_last=0
[  331.218419] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19492, diff=1, hw=0 hw_last=0
[  331.235000] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19493, diff=1, hw=0 hw_last=0
[  331.251576] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19494, diff=1, hw=0 hw_last=0
[  331.268158] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19495, diff=1, hw=0 hw_last=0
[  331.268661] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  331.268755] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000001477df7c
[  331.268835] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  331.268898] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000003519e999 state to 000000001477df7c
[  331.268965] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  331.269026] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000002eee26c9 state to 000000001477df7c
[  331.269097] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 000000003519e999
[  331.269160] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  331.269221] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  331.269281] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  331.269341] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  331.269404] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  331.269464] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  331.269528] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  331.269588] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  331.269649] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 000000001477df7c
[  331.269713] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  331.269775] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000001477df7c
[  331.269847] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  331.269896] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  331.269928] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000001477df7c
[  331.269997] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000c0cf118d to 000000001477df7c
[  331.270085] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000001477df7c
[  331.270168] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000001477df7c nonblocking
[  331.270266] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  331.270342] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  331.284733] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19496, diff=1, hw=0 hw_last=0
[  331.284843] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000001477df7c
[  331.284912] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  331.284975] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  331.285037] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  331.285101] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  331.285165] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000001477df7c
[  331.301312] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19497, diff=1, hw=0 hw_last=0
[  331.317893] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19498, diff=1, hw=0 hw_last=0
[  331.334468] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19499, diff=1, hw=0 hw_last=0
[  331.351047] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19500, diff=1, hw=0 hw_last=0
[  331.367629] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19501, diff=1, hw=0 hw_last=0
[  331.384209] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19502, diff=1, hw=0 hw_last=0
[  331.400785] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19503, diff=1, hw=0 hw_last=0
[  331.417365] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19504, diff=1, hw=0 hw_last=0
[  331.433947] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19505, diff=1, hw=0 hw_last=0
[  331.450524] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19506, diff=1, hw=0 hw_last=0
[  331.467101] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19507, diff=1, hw=0 hw_last=0
[  331.483680] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19508, diff=1, hw=0 hw_last=0
[  331.500260] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19509, diff=1, hw=0 hw_last=0
[  331.516839] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19510, diff=1, hw=0 hw_last=0
[  331.533418] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19511, diff=1, hw=0 hw_last=0
[  331.549997] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19512, diff=1, hw=0 hw_last=0
[  331.566576] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19513, diff=1, hw=0 hw_last=0
[  331.583155] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19514, diff=1, hw=0 hw_last=0
[  331.599737] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19515, diff=1, hw=0 hw_last=0
[  331.616317] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19516, diff=1, hw=0 hw_last=0
[  331.632894] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19517, diff=1, hw=0 hw_last=0
[  331.649473] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19518, diff=1, hw=0 hw_last=0
[  331.666051] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19519, diff=1, hw=0 hw_last=0
[  331.682631] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19520, diff=1, hw=0 hw_last=0
[  331.699210] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19521, diff=1, hw=0 hw_last=0
[  331.715790] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19522, diff=1, hw=0 hw_last=0
[  331.732369] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19523, diff=1, hw=0 hw_last=0
[  331.748947] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19524, diff=1, hw=0 hw_last=0
[  332.163434] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19549, diff=1, hw=0 hw_last=0
[  332.180013] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19550, diff=1, hw=0 hw_last=0
[  332.196593] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19551, diff=1, hw=0 hw_last=0
[  332.213172] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19552, diff=1, hw=0 hw_last=0
[  332.229752] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19553, diff=1, hw=0 hw_last=0
[  332.246331] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19554, diff=1, hw=0 hw_last=0
[  332.262910] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19555, diff=1, hw=0 hw_last=0
[  332.279489] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19556, diff=1, hw=0 hw_last=0
[  332.296067] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19557, diff=1, hw=0 hw_last=0
[  332.312649] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19558, diff=1, hw=0 hw_last=0
[  332.329225] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19559, diff=1, hw=0 hw_last=0
[  332.345804] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19560, diff=1, hw=0 hw_last=0
[  332.354463] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  332.354571] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006c5644bb
[  332.354647] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  332.354708] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000fefb5c61 state to 000000006c5644bb
[  332.354775] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  332.354836] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000e8543c49 state to 000000006c5644bb
[  332.354906] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000fefb5c61
[  332.354968] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  332.355029] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  332.355088] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  332.355149] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  332.355212] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  332.355273] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  332.355337] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  332.355400] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  332.355460] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 000000006c5644bb
[  332.355523] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  332.355585] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000006c5644bb
[  332.355656] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  332.355699] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  332.355731] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006c5644bb
[  332.355800] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000029aaf162 to 000000006c5644bb
[  332.355862] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006c5644bb
[  332.355939] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006c5644bb nonblocking
[  332.356040] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  332.356117] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  332.362380] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19561, diff=1, hw=0 hw_last=0
[  332.362473] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006c5644bb
[  332.362542] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  332.362606] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  332.362668] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  332.362732] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  332.362799] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006c5644bb
[  332.378960] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19562, diff=1, hw=0 hw_last=0
[  332.395539] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19563, diff=1, hw=0 hw_last=0
[  332.412117] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19564, diff=1, hw=0 hw_last=0
[  332.428696] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19565, diff=1, hw=0 hw_last=0
[  332.445275] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19566, diff=1, hw=0 hw_last=0
[  332.461856] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19567, diff=1, hw=0 hw_last=0
[  332.478434] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19568, diff=1, hw=0 hw_last=0
[  332.495013] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19569, diff=1, hw=0 hw_last=0
[  332.511594] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19570, diff=1, hw=0 hw_last=0
[  332.528173] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19571, diff=1, hw=0 hw_last=0
[  332.544751] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19572, diff=1, hw=0 hw_last=0
[  332.561328] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19573, diff=1, hw=0 hw_last=0
[  332.577907] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19574, diff=1, hw=0 hw_last=0
[  332.594488] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19575, diff=1, hw=0 hw_last=0
[  332.611066] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19576, diff=1, hw=0 hw_last=0
[  332.627645] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19577, diff=1, hw=0 hw_last=0
[  332.644224] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19578, diff=1, hw=0 hw_last=0
[  332.660804] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19579, diff=1, hw=0 hw_last=0
[  332.677384] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19580, diff=1, hw=0 hw_last=0
[  332.693963] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19581, diff=1, hw=0 hw_last=0
[  332.710542] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19582, diff=1, hw=0 hw_last=0
[  332.727120] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19583, diff=1, hw=0 hw_last=0
[  332.876333] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19592, diff=1, hw=0 hw_last=0
[  332.892913] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19593, diff=1, hw=0 hw_last=0
[  332.909492] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19594, diff=1, hw=0 hw_last=0
[  332.926071] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19595, diff=1, hw=0 hw_last=0
[  332.942650] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19596, diff=1, hw=0 hw_last=0
[  332.959231] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19597, diff=1, hw=0 hw_last=0
[  332.975809] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19598, diff=1, hw=0 hw_last=0
[  332.992388] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19599, diff=1, hw=0 hw_last=0
[  333.008967] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19600, diff=1, hw=0 hw_last=0
[  333.025545] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19601, diff=1, hw=0 hw_last=0
[  333.042126] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19602, diff=1, hw=0 hw_last=0
[  333.058706] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19603, diff=1, hw=0 hw_last=0
[  333.075288] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19604, diff=1, hw=0 hw_last=0
[  333.091865] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19605, diff=1, hw=0 hw_last=0
[  333.108443] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19606, diff=1, hw=0 hw_last=0
[  333.125022] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19607, diff=1, hw=0 hw_last=0
[  333.141603] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19608, diff=1, hw=0 hw_last=0
[  333.158181] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19609, diff=1, hw=0 hw_last=0
[  333.174761] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19610, diff=1, hw=0 hw_last=0
[  333.191344] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19611, diff=1, hw=0 hw_last=0
[  333.202114] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  333.202227] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 19612 to client
[  333.207927] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19612, diff=1, hw=0 hw_last=0
[  333.217494] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  333.217578] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000071ef6b0b
[  333.217650] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  333.217713] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000055579822 state to 0000000071ef6b0b
[  333.217781] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  333.217843] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 0000000071ef6b0b
[  333.217911] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000055579822
[  333.217974] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  333.218053] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  333.218122] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  333.218187] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  333.218259] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  333.218319] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  333.218385] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  333.218445] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  333.218506] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 0000000071ef6b0b
[  333.218571] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  333.218632] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000071ef6b0b
[  333.218704] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  333.218753] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  333.218785] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000071ef6b0b
[  333.218852] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000006c5644bb to 0000000071ef6b0b
[  333.218914] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000071ef6b0b
[  333.218982] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  333.219044] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  333.219107] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  333.219176] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 0000000071ef6b0b
[  333.219240] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000071ef6b0b
[  333.219302] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  333.219363] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  333.219424] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  333.219485] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  333.219546] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000071ef6b0b
[  333.220993] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  333.224508] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19613, diff=1, hw=0 hw_last=0
[  333.241081] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19614, diff=1, hw=0 hw_last=0
[  333.257663] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19615, diff=1, hw=0 hw_last=0
[  333.274241] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19616, diff=1, hw=0 hw_last=0
[  333.290822] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19617, diff=1, hw=0 hw_last=0
[  333.307401] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19618, diff=1, hw=0 hw_last=0
[  333.323979] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19619, diff=1, hw=0 hw_last=0
[  333.340561] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19620, diff=1, hw=0 hw_last=0
[  333.357142] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19621, diff=1, hw=0 hw_last=0
[  333.373720] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19622, diff=1, hw=0 hw_last=0
[  333.390296] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19623, diff=1, hw=0 hw_last=0
[  333.406877] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19624, diff=1, hw=0 hw_last=0
[  333.449252] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  333.449318] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000055579822 state to 0000000071ef6b0b
[  333.449385] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  333.449446] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 0000000071ef6b0b
[  333.449516] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 0000000055579822
[  333.449581] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  333.449641] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  333.449702] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  333.449761] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  333.449825] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  333.449885] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  333.449950] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  333.450010] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  333.450109] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 0000000071ef6b0b
[  333.450179] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  333.450243] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000071ef6b0b
[  333.450317] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  333.450365] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  333.450397] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000071ef6b0b
[  333.450468] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000007967e7cb to 0000000071ef6b0b
[  333.450530] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000071ef6b0b
[  333.450609] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000071ef6b0b nonblocking
[  333.450709] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  333.450786] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  333.456610] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19627, diff=1, hw=0 hw_last=0
[  333.456704] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000071ef6b0b
[  333.456780] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  333.456843] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  333.456905] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  333.456969] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  333.457032] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000071ef6b0b
[  333.473187] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19628, diff=1, hw=0 hw_last=0
[  333.489768] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19629, diff=1, hw=0 hw_last=0
[  333.506346] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19630, diff=1, hw=0 hw_last=0
[  333.522924] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19631, diff=1, hw=0 hw_last=0
[  333.539503] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19632, diff=1, hw=0 hw_last=0
[  333.556087] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19633, diff=1, hw=0 hw_last=0
[  333.572663] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19634, diff=1, hw=0 hw_last=0
[  333.589244] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19635, diff=1, hw=0 hw_last=0
[  333.605824] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19636, diff=1, hw=0 hw_last=0
[  333.622400] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19637, diff=1, hw=0 hw_last=0
[  333.638977] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19638, diff=1, hw=0 hw_last=0
[  333.655556] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19639, diff=1, hw=0 hw_last=0
[  333.672135] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19640, diff=1, hw=0 hw_last=0
[  333.688714] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19641, diff=1, hw=0 hw_last=0
[  333.705294] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19642, diff=1, hw=0 hw_last=0
[  333.721872] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19643, diff=1, hw=0 hw_last=0
[  333.738453] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19644, diff=1, hw=0 hw_last=0
[  333.755033] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19645, diff=1, hw=0 hw_last=0
[  333.771612] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19646, diff=1, hw=0 hw_last=0
[  333.788189] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19647, diff=1, hw=0 hw_last=0
[  333.804770] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19648, diff=1, hw=0 hw_last=0
[  333.821349] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19649, diff=1, hw=0 hw_last=0
[  333.837927] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19650, diff=1, hw=0 hw_last=0
[  333.854507] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19651, diff=1, hw=0 hw_last=0
[  333.871088] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19652, diff=1, hw=0 hw_last=0
[  333.887665] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19653, diff=1, hw=0 hw_last=0
[  333.904246] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19654, diff=1, hw=0 hw_last=0
[  333.920824] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19655, diff=1, hw=0 hw_last=0
[  333.937404] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19656, diff=1, hw=0 hw_last=0
[  333.953982] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19657, diff=1, hw=0 hw_last=0
[  333.970562] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19658, diff=1, hw=0 hw_last=0
[  333.987141] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19659, diff=1, hw=0 hw_last=0
[  334.003721] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19660, diff=1, hw=0 hw_last=0
[  334.020300] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19661, diff=1, hw=0 hw_last=0
[  334.036881] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19662, diff=1, hw=0 hw_last=0
[  334.053459] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19663, diff=1, hw=0 hw_last=0
[  334.280568] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  334.280630] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ab379aee
[  334.282058] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  334.285573] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19677, diff=1, hw=0 hw_last=0
[  334.302151] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19678, diff=1, hw=0 hw_last=0
[  334.318741] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19679, diff=1, hw=0 hw_last=0
[  334.335310] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19680, diff=1, hw=0 hw_last=0
[  334.351891] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19681, diff=1, hw=0 hw_last=0
[  334.368468] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19682, diff=1, hw=0 hw_last=0
[  334.385047] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19683, diff=1, hw=0 hw_last=0
[  334.401630] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19684, diff=1, hw=0 hw_last=0
[  334.418211] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19685, diff=1, hw=0 hw_last=0
[  334.434788] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19686, diff=1, hw=0 hw_last=0
[  334.451368] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19687, diff=1, hw=0 hw_last=0
[  334.467943] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19688, diff=1, hw=0 hw_last=0
[  334.484525] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19689, diff=1, hw=0 hw_last=0
[  334.501101] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19690, diff=1, hw=0 hw_last=0
[  334.510437] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  334.510542] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000ab379aee
[  334.510615] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  334.510677] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000087081e28 state to 00000000ab379aee
[  334.510744] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  334.510805] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 00000000ab379aee
[  334.510873] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000087081e28
[  334.510936] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  334.510996] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  334.511056] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  334.511115] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  334.511178] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  334.511239] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  334.511304] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  334.511364] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  334.511424] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 00000000ab379aee
[  334.511486] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  334.511549] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000ab379aee
[  334.511621] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  334.511665] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  334.511696] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000ab379aee
[  334.511763] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000095dd8ec0 to 00000000ab379aee
[  334.511825] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000ab379aee
[  334.511901] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000ab379aee nonblocking
[  334.512005] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  334.512079] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  334.517681] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19691, diff=1, hw=0 hw_last=0
[  334.517792] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ab379aee
[  334.517862] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  334.517924] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  334.517986] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  334.518060] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  334.518126] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ab379aee
[  334.534256] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19692, diff=1, hw=0 hw_last=0
[  334.550834] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19693, diff=1, hw=0 hw_last=0
[  334.567413] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19694, diff=1, hw=0 hw_last=0
[  334.583992] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19695, diff=1, hw=0 hw_last=0
[  334.600572] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19696, diff=1, hw=0 hw_last=0
[  334.617150] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19697, diff=1, hw=0 hw_last=0
[  334.633730] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19698, diff=1, hw=0 hw_last=0
[  334.650310] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19699, diff=1, hw=0 hw_last=0
[  334.666892] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19700, diff=1, hw=0 hw_last=0
[  334.683466] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19701, diff=1, hw=0 hw_last=0
[  334.700045] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19702, diff=1, hw=0 hw_last=0
[  334.716624] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19703, diff=1, hw=0 hw_last=0
[  334.733203] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19704, diff=1, hw=0 hw_last=0
[  334.749783] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19705, diff=1, hw=0 hw_last=0
[  334.766362] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19706, diff=1, hw=0 hw_last=0
[  334.782941] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19707, diff=1, hw=0 hw_last=0
[  334.799524] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19708, diff=1, hw=0 hw_last=0
[  334.816100] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19709, diff=1, hw=0 hw_last=0
[  334.832682] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19710, diff=1, hw=0 hw_last=0
[  334.849259] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19711, diff=1, hw=0 hw_last=0
[  334.865838] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19712, diff=1, hw=0 hw_last=0
[  334.882421] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19713, diff=1, hw=0 hw_last=0
[  334.898997] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19714, diff=1, hw=0 hw_last=0
[  334.915576] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19715, diff=1, hw=0 hw_last=0
[  334.932153] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19716, diff=1, hw=0 hw_last=0
[  334.948734] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19717, diff=1, hw=0 hw_last=0
[  334.965313] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19718, diff=1, hw=0 hw_last=0
[  334.981892] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19719, diff=1, hw=0 hw_last=0
[  334.998472] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19720, diff=1, hw=0 hw_last=0
[  335.015050] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19721, diff=1, hw=0 hw_last=0
[  335.031629] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19722, diff=1, hw=0 hw_last=0
[  335.048208] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19723, diff=1, hw=0 hw_last=0
[  335.064789] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19724, diff=1, hw=0 hw_last=0
[  335.081370] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19725, diff=1, hw=0 hw_last=0
[  335.097946] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19726, diff=1, hw=0 hw_last=0
[  335.114527] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19727, diff=1, hw=0 hw_last=0
[  335.131107] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19728, diff=1, hw=0 hw_last=0
[  335.147684] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19729, diff=1, hw=0 hw_last=0
[  335.164264] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19730, diff=1, hw=0 hw_last=0
[  335.180844] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19731, diff=1, hw=0 hw_last=0
[  335.197422] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19732, diff=1, hw=0 hw_last=0
[  335.214002] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19733, diff=1, hw=0 hw_last=0
[  335.230582] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19734, diff=1, hw=0 hw_last=0
[  335.247160] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19735, diff=1, hw=0 hw_last=0
[  335.263738] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19736, diff=1, hw=0 hw_last=0
[  335.280317] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19737, diff=1, hw=0 hw_last=0
[  335.296896] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19738, diff=1, hw=0 hw_last=0
[  335.313483] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19739, diff=1, hw=0 hw_last=0
[  335.316167] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  335.316276] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 19740 to client
[  335.322532] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  335.322627] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f37c832b
[  335.322698] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  335.322760] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000ec98bd42 state to 00000000f37c832b
[  335.322827] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  335.322889] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 00000000f37c832b
[  335.322957] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000ec98bd42
[  335.323020] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  335.323080] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  335.323141] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  335.323201] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  335.323266] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  335.323326] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  335.323390] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  335.323451] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  335.323511] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 00000000f37c832b
[  335.323574] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  335.323635] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000f37c832b
[  335.323707] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  335.323751] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  335.323783] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000f37c832b
[  335.323851] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000004593454f to 00000000f37c832b
[  335.323914] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000f37c832b
[  335.323982] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  335.324043] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  335.324105] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  335.324175] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 00000000f37c832b
[  335.324240] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f37c832b
[  335.324302] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  335.324362] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  335.324423] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  335.324484] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  335.324546] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f37c832b
[  335.325893] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  335.330062] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19740, diff=1, hw=0 hw_last=0
[  335.346639] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19741, diff=1, hw=0 hw_last=0
[  335.554131] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f37c832b
[  335.554209] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  335.554271] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000ec98bd42 state to 00000000f37c832b
[  335.554338] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  335.554400] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 00000000f37c832b
[  335.554468] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000ec98bd42
[  335.554531] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  335.554591] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  335.554651] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  335.554714] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  335.554782] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  335.554843] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  335.554907] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  335.554968] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  335.555029] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 00000000f37c832b
[  335.555092] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  335.555154] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000f37c832b
[  335.555226] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  335.555271] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  335.555302] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000f37c832b
[  335.555371] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000006fb5b2d2 to 00000000f37c832b
[  335.555433] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000f37c832b
[  335.555510] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000f37c832b nonblocking
[  335.555616] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  335.555686] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  335.562167] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19754, diff=1, hw=0 hw_last=0
[  335.562261] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f37c832b
[  335.562336] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  335.562398] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  335.562459] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  335.562521] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  335.562584] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f37c832b
[  335.578747] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19755, diff=1, hw=0 hw_last=0
[  335.595323] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19756, diff=1, hw=0 hw_last=0
[  335.611904] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19757, diff=1, hw=0 hw_last=0
[  335.628482] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19758, diff=1, hw=0 hw_last=0
[  335.645061] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19759, diff=1, hw=0 hw_last=0
[  335.661643] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19760, diff=1, hw=0 hw_last=0
[  335.678220] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19761, diff=1, hw=0 hw_last=0
[  335.694799] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19762, diff=1, hw=0 hw_last=0
[  335.711379] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19763, diff=1, hw=0 hw_last=0
[  335.727961] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19764, diff=1, hw=0 hw_last=0
[  335.744536] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19765, diff=1, hw=0 hw_last=0
[  335.761113] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19766, diff=1, hw=0 hw_last=0
[  335.777693] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19767, diff=1, hw=0 hw_last=0
[  335.794273] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19768, diff=1, hw=0 hw_last=0
[  335.810851] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19769, diff=1, hw=0 hw_last=0
[  335.827431] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19770, diff=1, hw=0 hw_last=0
[  335.844009] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19771, diff=1, hw=0 hw_last=0
[  335.860589] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19772, diff=1, hw=0 hw_last=0
[  335.877171] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19773, diff=1, hw=0 hw_last=0
[  335.893750] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19774, diff=1, hw=0 hw_last=0
[  335.910330] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19775, diff=1, hw=0 hw_last=0
[  335.926907] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19776, diff=1, hw=0 hw_last=0
[  335.943488] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19777, diff=1, hw=0 hw_last=0
[  335.960065] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19778, diff=1, hw=0 hw_last=0
[  335.976645] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19779, diff=1, hw=0 hw_last=0
[  335.993223] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19780, diff=1, hw=0 hw_last=0
[  336.009802] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19781, diff=1, hw=0 hw_last=0
[  336.026381] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19782, diff=1, hw=0 hw_last=0
[  336.042962] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19783, diff=1, hw=0 hw_last=0
[  336.059540] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19784, diff=1, hw=0 hw_last=0
[  336.076119] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19785, diff=1, hw=0 hw_last=0
[  336.092698] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19786, diff=1, hw=0 hw_last=0
[  336.109277] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19787, diff=1, hw=0 hw_last=0
[  336.125857] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19788, diff=1, hw=0 hw_last=0
[  336.142436] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19789, diff=1, hw=0 hw_last=0
[  336.573500] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19815, diff=1, hw=0 hw_last=0
[  336.590080] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19816, diff=1, hw=0 hw_last=0
[  336.606660] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19817, diff=1, hw=0 hw_last=0
[  336.623235] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19818, diff=1, hw=0 hw_last=0
[  336.632283] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  336.632393] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000082174610
[  336.632469] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  336.632531] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000215b6887 state to 0000000082174610
[  336.632598] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  336.632658] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a743c9a8 state to 0000000082174610
[  336.632727] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000215b6887
[  336.632791] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  336.632851] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  336.632911] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  336.632971] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  336.633035] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  336.633095] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  336.633159] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  336.633220] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  336.633280] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 0000000082174610
[  336.633343] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  336.633405] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000082174610
[  336.633475] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  336.633522] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  336.633553] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000082174610
[  336.633621] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000004593454f to 0000000082174610
[  336.633684] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000082174610
[  336.633759] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000082174610 nonblocking
[  336.633875] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  336.633977] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  336.639816] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19819, diff=1, hw=0 hw_last=0
[  336.639923] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000082174610
[  336.639990] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  336.640054] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  336.640115] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  336.640178] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  336.640241] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000082174610
[  336.656392] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19820, diff=1, hw=0 hw_last=0
[  336.672972] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19821, diff=1, hw=0 hw_last=0
[  336.689552] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19822, diff=1, hw=0 hw_last=0
[  336.706130] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19823, diff=1, hw=0 hw_last=0
[  336.722708] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19824, diff=1, hw=0 hw_last=0
[  336.739291] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19825, diff=1, hw=0 hw_last=0
[  336.755869] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19826, diff=1, hw=0 hw_last=0
[  336.772446] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19827, diff=1, hw=0 hw_last=0
[  336.772905] systemd-journald[214]: Data hash table of /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal has a fill level at 75.1 (2732 of 3640 items, 2097152 file size, 767 bytes per hash table item), suggesting rotation.
[  336.789026] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19828, diff=1, hw=0 hw_last=0
[  336.799307] systemd-journald[214]: /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal: Journal header limits reached or header out-of-date, rotating.
[  336.805606] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19829, diff=1, hw=0 hw_last=0
[  336.822186] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19830, diff=1, hw=0 hw_last=0
[  336.838763] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19831, diff=1, hw=0 hw_last=0
[  336.855341] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19832, diff=1, hw=0 hw_last=0
[  336.871933] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19833, diff=1, hw=0 hw_last=0
[  336.888503] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19834, diff=1, hw=0 hw_last=0
[  336.905079] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19835, diff=1, hw=0 hw_last=0
[  336.921658] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19836, diff=1, hw=0 hw_last=0
[  336.938238] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19837, diff=1, hw=0 hw_last=0
[  336.954820] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19838, diff=1, hw=0 hw_last=0
[  336.971398] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19839, diff=1, hw=0 hw_last=0
[  336.987976] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19840, diff=1, hw=0 hw_last=0
[  337.004554] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19841, diff=1, hw=0 hw_last=0
[  337.021134] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19842, diff=1, hw=0 hw_last=0
[  337.037714] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19843, diff=1, hw=0 hw_last=0
[  337.054291] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19844, diff=1, hw=0 hw_last=0
[  337.070871] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19845, diff=1, hw=0 hw_last=0
[  337.087452] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19846, diff=1, hw=0 hw_last=0
[  337.104031] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19847, diff=1, hw=0 hw_last=0
[  337.236663] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19855, diff=1, hw=0 hw_last=0
[  337.253245] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19856, diff=1, hw=0 hw_last=0
[  337.269821] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19857, diff=1, hw=0 hw_last=0
[  337.286400] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19858, diff=1, hw=0 hw_last=0
[  337.302980] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19859, diff=1, hw=0 hw_last=0
[  337.319559] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19860, diff=1, hw=0 hw_last=0
[  337.336138] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19861, diff=1, hw=0 hw_last=0
[  337.352718] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19862, diff=1, hw=0 hw_last=0
[  337.369298] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19863, diff=1, hw=0 hw_last=0
[  337.385877] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19864, diff=1, hw=0 hw_last=0
[  337.402457] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19865, diff=1, hw=0 hw_last=0
[  337.419034] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19866, diff=1, hw=0 hw_last=0
[  337.435616] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19867, diff=1, hw=0 hw_last=0
[  337.452193] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19868, diff=1, hw=0 hw_last=0
[  337.468772] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19869, diff=1, hw=0 hw_last=0
[  337.485351] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19870, diff=1, hw=0 hw_last=0
[  337.501930] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19871, diff=1, hw=0 hw_last=0
[  337.518510] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19872, diff=1, hw=0 hw_last=0
[  337.535089] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19873, diff=1, hw=0 hw_last=0
[  337.551671] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19874, diff=1, hw=0 hw_last=0
[  337.564222] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  337.564338] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 19875 to client
[  337.568255] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19875, diff=1, hw=0 hw_last=0
[  337.577607] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  337.577687] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000305e034
[  337.577757] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  337.577818] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000bac3ec2d state to 000000000305e034
[  337.577887] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  337.577949] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 000000000305e034
[  337.578037] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000bac3ec2d
[  337.578106] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  337.578168] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  337.578229] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  337.578290] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  337.578354] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  337.578415] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  337.578479] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  337.578540] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  337.578601] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 000000000305e034
[  337.578664] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  337.578726] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000000305e034
[  337.578797] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  337.578847] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  337.578879] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000305e034
[  337.578947] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000ab379aee to 000000000305e034
[  337.579010] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000305e034
[  337.579077] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  337.579139] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  337.579201] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  337.579271] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000000305e034
[  337.579336] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000305e034
[  337.579397] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  337.579457] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  337.579517] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  337.579581] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  337.579642] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000305e034
[  337.581151] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  337.584833] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19876, diff=1, hw=0 hw_last=0
[  337.601409] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19877, diff=1, hw=0 hw_last=0
[  337.617990] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19878, diff=1, hw=0 hw_last=0
[  337.634568] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19879, diff=1, hw=0 hw_last=0
[  337.651150] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19880, diff=1, hw=0 hw_last=0
[  337.667727] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19881, diff=1, hw=0 hw_last=0
[  337.684308] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19882, diff=1, hw=0 hw_last=0
[  337.700887] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19883, diff=1, hw=0 hw_last=0
[  337.717469] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19884, diff=1, hw=0 hw_last=0
[  337.734048] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19885, diff=1, hw=0 hw_last=0
[  337.750623] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19886, diff=1, hw=0 hw_last=0
[  337.767205] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19887, diff=1, hw=0 hw_last=0
[  337.808539] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  337.808600] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 000000000305e034
[  337.808669] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000bac3ec2d
[  337.808732] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  337.808792] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  337.808852] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  337.808912] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  337.808976] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  337.809036] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  337.809101] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  337.809161] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  337.809221] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 000000000305e034
[  337.809285] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  337.809347] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000000305e034
[  337.809419] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  337.809465] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  337.809496] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000305e034
[  337.809564] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000001477df7c to 000000000305e034
[  337.809627] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000305e034
[  337.809704] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000305e034 nonblocking
[  337.809809] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  337.809882] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  337.816939] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19890, diff=1, hw=0 hw_last=0
[  337.817043] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000305e034
[  337.817119] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  337.817182] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  337.817243] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  337.817304] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  337.817368] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000305e034
[  337.833515] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19891, diff=1, hw=0 hw_last=0
[  337.850096] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19892, diff=1, hw=0 hw_last=0
[  337.866674] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19893, diff=1, hw=0 hw_last=0
[  337.883253] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19894, diff=1, hw=0 hw_last=0
[  337.899832] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19895, diff=1, hw=0 hw_last=0
[  337.916413] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19896, diff=1, hw=0 hw_last=0
[  337.932991] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19897, diff=1, hw=0 hw_last=0
[  337.949572] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19898, diff=1, hw=0 hw_last=0
[  337.966154] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19899, diff=1, hw=0 hw_last=0
[  337.982731] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19900, diff=1, hw=0 hw_last=0
[  337.999306] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19901, diff=1, hw=0 hw_last=0
[  338.015885] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19902, diff=1, hw=0 hw_last=0
[  338.032465] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19903, diff=1, hw=0 hw_last=0
[  338.049043] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19904, diff=1, hw=0 hw_last=0
[  338.065622] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19905, diff=1, hw=0 hw_last=0
[  338.082202] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19906, diff=1, hw=0 hw_last=0
[  338.098782] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19907, diff=1, hw=0 hw_last=0
[  338.115364] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19908, diff=1, hw=0 hw_last=0
[  338.131941] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19909, diff=1, hw=0 hw_last=0
[  338.148520] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19910, diff=1, hw=0 hw_last=0
[  338.165100] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19911, diff=1, hw=0 hw_last=0
[  338.181677] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19912, diff=1, hw=0 hw_last=0
[  338.198256] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19913, diff=1, hw=0 hw_last=0
[  338.214835] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19914, diff=1, hw=0 hw_last=0
[  338.231417] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19915, diff=1, hw=0 hw_last=0
[  338.247997] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19916, diff=1, hw=0 hw_last=0
[  338.264574] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19917, diff=1, hw=0 hw_last=0
[  338.281152] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19918, diff=1, hw=0 hw_last=0
[  338.297731] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19919, diff=1, hw=0 hw_last=0
[  338.314311] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19920, diff=1, hw=0 hw_last=0
[  338.330891] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19921, diff=1, hw=0 hw_last=0
[  338.347470] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19922, diff=1, hw=0 hw_last=0
[  338.364049] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19923, diff=1, hw=0 hw_last=0
[  338.380627] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19924, diff=1, hw=0 hw_last=0
[  338.397208] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19925, diff=1, hw=0 hw_last=0
[  338.413786] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19926, diff=1, hw=0 hw_last=0
[  338.430367] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19927, diff=1, hw=0 hw_last=0
[  338.706575] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006e1bef3e
[  338.706642] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000071ef6b0b to 000000006e1bef3e
[  338.706704] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006e1bef3e
[  338.706771] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  338.706833] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  338.706894] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  338.706963] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000006e1bef3e
[  338.707028] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006e1bef3e
[  338.707090] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  338.707151] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  338.707211] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  338.707272] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  338.707333] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006e1bef3e
[  338.708764] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  338.712222] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19944, diff=1, hw=0 hw_last=0
[  338.728796] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19945, diff=1, hw=0 hw_last=0
[  338.745376] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19946, diff=1, hw=0 hw_last=0
[  338.761954] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19947, diff=1, hw=0 hw_last=0
[  338.778536] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19948, diff=1, hw=0 hw_last=0
[  338.795113] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19949, diff=1, hw=0 hw_last=0
[  338.811692] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19950, diff=1, hw=0 hw_last=0
[  338.828276] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19951, diff=1, hw=0 hw_last=0
[  338.844851] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19952, diff=1, hw=0 hw_last=0
[  338.861433] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19953, diff=1, hw=0 hw_last=0
[  338.878009] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19954, diff=1, hw=0 hw_last=0
[  338.894592] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19955, diff=1, hw=0 hw_last=0
[  338.911171] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19956, diff=1, hw=0 hw_last=0
[  338.927749] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19957, diff=1, hw=0 hw_last=0
[  338.929117] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  338.929220] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006e1bef3e
[  338.929295] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  338.929357] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000082b4fa6a state to 000000006e1bef3e
[  338.929424] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  338.929485] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 000000006e1bef3e
[  338.929554] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000082b4fa6a
[  338.929618] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  338.929678] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  338.929738] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  338.929798] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  338.929862] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  338.929923] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  338.930015] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  338.930085] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  338.930149] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 000000006e1bef3e
[  338.930214] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  338.930277] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000006e1bef3e
[  338.930349] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  338.930397] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  338.930430] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006e1bef3e
[  338.930499] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000006c5644bb to 000000006e1bef3e
[  338.930562] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006e1bef3e
[  338.930639] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006e1bef3e nonblocking
[  338.930740] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  338.930828] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  338.944325] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19958, diff=1, hw=0 hw_last=0
[  338.944443] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006e1bef3e
[  338.944522] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  338.944597] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  338.944669] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  338.944744] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  338.944819] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006e1bef3e
[  338.960903] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19959, diff=1, hw=0 hw_last=0
[  338.977480] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19960, diff=1, hw=0 hw_last=0
[  338.994061] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19961, diff=1, hw=0 hw_last=0
[  339.010638] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19962, diff=1, hw=0 hw_last=0
[  339.027217] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19963, diff=1, hw=0 hw_last=0
[  339.043800] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19964, diff=1, hw=0 hw_last=0
[  339.060375] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19965, diff=1, hw=0 hw_last=0
[  339.076955] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19966, diff=1, hw=0 hw_last=0
[  339.093537] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19967, diff=1, hw=0 hw_last=0
[  339.242749] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19976, diff=1, hw=0 hw_last=0
[  339.259329] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19977, diff=1, hw=0 hw_last=0
[  339.275907] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19978, diff=1, hw=0 hw_last=0
[  339.292486] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19979, diff=1, hw=0 hw_last=0
[  339.309063] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19980, diff=1, hw=0 hw_last=0
[  339.325643] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19981, diff=1, hw=0 hw_last=0
[  339.342221] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19982, diff=1, hw=0 hw_last=0
[  339.358802] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19983, diff=1, hw=0 hw_last=0
[  339.375380] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19984, diff=1, hw=0 hw_last=0
[  339.391960] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19985, diff=1, hw=0 hw_last=0
[  339.408538] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19986, diff=1, hw=0 hw_last=0
[  339.425119] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19987, diff=1, hw=0 hw_last=0
[  339.441697] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19988, diff=1, hw=0 hw_last=0
[  339.458277] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19989, diff=1, hw=0 hw_last=0
[  339.474857] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19990, diff=1, hw=0 hw_last=0
[  339.491438] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19991, diff=1, hw=0 hw_last=0
[  339.508014] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19992, diff=1, hw=0 hw_last=0
[  339.524594] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19993, diff=1, hw=0 hw_last=0
[  339.541171] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19994, diff=1, hw=0 hw_last=0
[  339.557754] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19995, diff=1, hw=0 hw_last=0
[  339.574331] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19996, diff=1, hw=0 hw_last=0
[  339.590910] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19997, diff=1, hw=0 hw_last=0
[  339.607488] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19998, diff=1, hw=0 hw_last=0
[  339.624068] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=19999, diff=1, hw=0 hw_last=0
[  339.640650] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20000, diff=1, hw=0 hw_last=0
[  339.657227] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20001, diff=1, hw=0 hw_last=0
[  339.673808] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20002, diff=1, hw=0 hw_last=0
[  339.681719] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  339.681834] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 20003 to client
[  339.683111] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  339.683207] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000018d86a98
[  339.683282] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  339.683345] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000fefb5c61 state to 0000000018d86a98
[  339.683411] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  339.683471] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 0000000018d86a98
[  339.683538] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000fefb5c61
[  339.683601] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  339.683661] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  339.683721] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  339.683781] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  339.683847] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  339.683912] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  339.683977] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  339.684038] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  339.684098] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 0000000018d86a98
[  339.684161] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  339.684222] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000018d86a98
[  339.684293] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  339.684340] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  339.684372] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000018d86a98
[  339.684439] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000006e1bef3e to 0000000018d86a98
[  339.684502] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000018d86a98
[  339.684568] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  339.684629] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  339.684691] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  339.684761] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 0000000018d86a98
[  339.684825] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000018d86a98
[  339.684886] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  339.684947] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  339.685007] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  339.685068] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  339.685129] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000018d86a98
[  339.686559] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  339.690391] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20003, diff=1, hw=0 hw_last=0
[  339.706968] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20004, diff=1, hw=0 hw_last=0
[  339.723549] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20005, diff=1, hw=0 hw_last=0
[  339.740126] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20006, diff=1, hw=0 hw_last=0
[  339.756707] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20007, diff=1, hw=0 hw_last=0
[  339.773288] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20008, diff=1, hw=0 hw_last=0
[  339.914265] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  339.914327] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000fefb5c61 state to 0000000018d86a98
[  339.914394] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  339.914454] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 0000000018d86a98
[  339.914524] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000fefb5c61
[  339.914587] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  339.914650] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  339.914712] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  339.914773] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  339.914837] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  339.914900] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  339.914965] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  339.915026] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  339.915087] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 0000000018d86a98
[  339.915151] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  339.915214] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000018d86a98
[  339.915286] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  339.915333] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  339.915365] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000018d86a98
[  339.915433] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000071ef6b0b to 0000000018d86a98
[  339.915496] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000018d86a98
[  339.915572] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000018d86a98 nonblocking
[  339.915678] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  339.915767] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  339.922496] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20017, diff=1, hw=0 hw_last=0
[  339.922616] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000018d86a98
[  339.922699] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  339.922773] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  339.922847] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  339.922920] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  339.922995] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000018d86a98
[  339.939076] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20018, diff=1, hw=0 hw_last=0
[  339.955653] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20019, diff=1, hw=0 hw_last=0
[  339.972233] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20020, diff=1, hw=0 hw_last=0
[  339.988811] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20021, diff=1, hw=0 hw_last=0
[  340.005392] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20022, diff=1, hw=0 hw_last=0
[  340.021968] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20023, diff=1, hw=0 hw_last=0
[  340.038550] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20024, diff=1, hw=0 hw_last=0
[  340.055128] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20025, diff=1, hw=0 hw_last=0
[  340.071708] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20026, diff=1, hw=0 hw_last=0
[  340.088289] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20027, diff=1, hw=0 hw_last=0
[  340.104867] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20028, diff=1, hw=0 hw_last=0
[  340.121444] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20029, diff=1, hw=0 hw_last=0
[  340.138022] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20030, diff=1, hw=0 hw_last=0
[  340.154601] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20031, diff=1, hw=0 hw_last=0
[  340.171181] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20032, diff=1, hw=0 hw_last=0
[  340.187760] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20033, diff=1, hw=0 hw_last=0
[  340.204340] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20034, diff=1, hw=0 hw_last=0
[  340.220919] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20035, diff=1, hw=0 hw_last=0
[  340.237501] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20036, diff=1, hw=0 hw_last=0
[  340.254088] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20037, diff=1, hw=0 hw_last=0
[  340.270658] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20038, diff=1, hw=0 hw_last=0
[  340.287236] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20039, diff=1, hw=0 hw_last=0
[  340.303818] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20040, diff=1, hw=0 hw_last=0
[  340.320393] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20041, diff=1, hw=0 hw_last=0
[  340.336975] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20042, diff=1, hw=0 hw_last=0
[  340.353552] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20043, diff=1, hw=0 hw_last=0
[  340.370132] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20044, diff=1, hw=0 hw_last=0
[  340.386712] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20045, diff=1, hw=0 hw_last=0
[  340.403292] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20046, diff=1, hw=0 hw_last=0
[  340.419870] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20047, diff=1, hw=0 hw_last=0
[  340.436449] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20048, diff=1, hw=0 hw_last=0
[  340.453027] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20049, diff=1, hw=0 hw_last=0
[  340.469607] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20050, diff=1, hw=0 hw_last=0
[  340.486188] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20051, diff=1, hw=0 hw_last=0
[  340.502766] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20052, diff=1, hw=0 hw_last=0
[  340.519347] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20053, diff=1, hw=0 hw_last=0
[  340.679728] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009472d261
[  340.679790] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  340.679850] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  340.679911] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  340.679972] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  340.680032] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009472d261
[  340.681439] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  340.685141] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20063, diff=1, hw=0 hw_last=0
[  340.701719] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20064, diff=1, hw=0 hw_last=0
[  340.718299] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20065, diff=1, hw=0 hw_last=0
[  340.734879] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20066, diff=1, hw=0 hw_last=0
[  340.751460] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20067, diff=1, hw=0 hw_last=0
[  340.768039] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20068, diff=1, hw=0 hw_last=0
[  340.784617] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20069, diff=1, hw=0 hw_last=0
[  340.801197] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20070, diff=1, hw=0 hw_last=0
[  340.817779] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20071, diff=1, hw=0 hw_last=0
[  340.834357] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20072, diff=1, hw=0 hw_last=0
[  340.850934] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20073, diff=1, hw=0 hw_last=0
[  340.867514] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20074, diff=1, hw=0 hw_last=0
[  340.884091] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20075, diff=1, hw=0 hw_last=0
[  340.900670] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20076, diff=1, hw=0 hw_last=0
[  340.910309] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  340.910415] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009472d261
[  340.910491] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  340.910554] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000055579822 state to 000000009472d261
[  340.910620] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  340.910681] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000e8543c49 state to 000000009472d261
[  340.910750] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000055579822
[  340.910813] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  340.910873] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  340.910933] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  340.910993] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  340.911056] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  340.911116] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  340.911180] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  340.911240] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  340.911300] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 000000009472d261
[  340.911363] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  340.911425] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000009472d261
[  340.911496] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  340.911544] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  340.911575] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000009472d261
[  340.911643] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000ab379aee to 000000009472d261
[  340.911706] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000009472d261
[  340.911785] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000009472d261 nonblocking
[  340.911894] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  340.911977] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  340.917247] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20077, diff=1, hw=0 hw_last=0
[  340.917357] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009472d261
[  340.917428] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  340.917491] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  340.917553] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  340.917615] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  340.917678] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009472d261
[  340.933828] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20078, diff=1, hw=0 hw_last=0
[  340.950409] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20079, diff=1, hw=0 hw_last=0
[  340.966986] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20080, diff=1, hw=0 hw_last=0
[  340.983563] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20081, diff=1, hw=0 hw_last=0
[  341.000145] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20082, diff=1, hw=0 hw_last=0
[  341.016725] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20083, diff=1, hw=0 hw_last=0
[  341.033302] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20084, diff=1, hw=0 hw_last=0
[  341.049883] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20085, diff=1, hw=0 hw_last=0
[  341.066462] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20086, diff=1, hw=0 hw_last=0
[  341.083042] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20087, diff=1, hw=0 hw_last=0
[  341.099618] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20088, diff=1, hw=0 hw_last=0
[  341.116196] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20089, diff=1, hw=0 hw_last=0
[  341.132775] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20090, diff=1, hw=0 hw_last=0
[  341.149354] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20091, diff=1, hw=0 hw_last=0
[  341.165933] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20092, diff=1, hw=0 hw_last=0
[  341.182513] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20093, diff=1, hw=0 hw_last=0
[  341.740071] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  341.740133] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  341.740194] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  341.740264] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000008a640c91
[  341.740327] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008a640c91
[  341.740390] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  341.740450] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  341.740510] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  341.740571] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  341.740631] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008a640c91
[  341.742022] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  341.746215] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20127, diff=1, hw=0 hw_last=0
[  341.762793] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20128, diff=1, hw=0 hw_last=0
[  341.779370] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20129, diff=1, hw=0 hw_last=0
[  341.795949] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20130, diff=1, hw=0 hw_last=0
[  341.812531] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20131, diff=1, hw=0 hw_last=0
[  341.829109] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20132, diff=1, hw=0 hw_last=0
[  341.845688] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20133, diff=1, hw=0 hw_last=0
[  341.862268] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20134, diff=1, hw=0 hw_last=0
[  341.878849] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20135, diff=1, hw=0 hw_last=0
[  341.895432] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20136, diff=1, hw=0 hw_last=0
[  341.912005] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20137, diff=1, hw=0 hw_last=0
[  341.928589] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20138, diff=1, hw=0 hw_last=0
[  341.945164] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20139, diff=1, hw=0 hw_last=0
[  341.961740] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20140, diff=1, hw=0 hw_last=0
[  341.970553] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  341.970658] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008a640c91
[  341.970733] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  341.970795] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000002cafbe1b state to 000000008a640c91
[  341.970862] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  341.970923] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000002eee26c9 state to 000000008a640c91
[  341.970992] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 000000002cafbe1b
[  341.971056] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  341.971115] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  341.971175] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  341.971235] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  341.971299] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  341.971359] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  341.971423] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  341.971484] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  341.971544] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 000000008a640c91
[  341.971607] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  341.971669] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000008a640c91
[  341.971739] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  341.971784] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  341.971815] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008a640c91
[  341.971884] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000f37c832b to 000000008a640c91
[  341.971946] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008a640c91
[  341.972021] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000008a640c91 nonblocking
[  341.972126] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  341.972203] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  341.978316] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20141, diff=1, hw=0 hw_last=0
[  341.978428] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008a640c91
[  341.978499] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  341.978564] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  341.978626] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  341.978690] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  341.978753] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008a640c91
[  341.994897] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20142, diff=1, hw=0 hw_last=0
[  342.011476] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20143, diff=1, hw=0 hw_last=0
[  342.028055] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20144, diff=1, hw=0 hw_last=0
[  342.044635] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20145, diff=1, hw=0 hw_last=0
[  342.061213] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20146, diff=1, hw=0 hw_last=0
[  342.077791] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20147, diff=1, hw=0 hw_last=0
[  342.094373] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20148, diff=1, hw=0 hw_last=0
[  342.110949] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20149, diff=1, hw=0 hw_last=0
[  342.127530] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20150, diff=1, hw=0 hw_last=0
[  342.144108] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20151, diff=1, hw=0 hw_last=0
[  342.160690] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20152, diff=1, hw=0 hw_last=0
[  342.177264] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20153, diff=1, hw=0 hw_last=0
[  342.193849] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20154, diff=1, hw=0 hw_last=0
[  342.326481] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20162, diff=1, hw=0 hw_last=0
[  342.343057] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20163, diff=1, hw=0 hw_last=0
[  342.359636] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20164, diff=1, hw=0 hw_last=0
[  342.376216] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20165, diff=1, hw=0 hw_last=0
[  342.392797] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20166, diff=1, hw=0 hw_last=0
[  342.409374] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20167, diff=1, hw=0 hw_last=0
[  342.425954] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20168, diff=1, hw=0 hw_last=0
[  342.442533] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20169, diff=1, hw=0 hw_last=0
[  342.459111] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20170, diff=1, hw=0 hw_last=0
[  342.475691] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20171, diff=1, hw=0 hw_last=0
[  342.492270] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20172, diff=1, hw=0 hw_last=0
[  342.508849] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20173, diff=1, hw=0 hw_last=0
[  342.525428] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20174, diff=1, hw=0 hw_last=0
[  342.542008] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20175, diff=1, hw=0 hw_last=0
[  342.558587] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20176, diff=1, hw=0 hw_last=0
[  342.575166] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20177, diff=1, hw=0 hw_last=0
[  342.591747] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20178, diff=1, hw=0 hw_last=0
[  342.608325] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20179, diff=1, hw=0 hw_last=0
[  342.624906] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20180, diff=1, hw=0 hw_last=0
[  342.641483] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20181, diff=1, hw=0 hw_last=0
[  342.658064] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20182, diff=1, hw=0 hw_last=0
[  342.674643] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20183, diff=1, hw=0 hw_last=0
[  342.691221] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20184, diff=1, hw=0 hw_last=0
[  342.707804] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20185, diff=1, hw=0 hw_last=0
[  342.724381] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20186, diff=1, hw=0 hw_last=0
[  342.740961] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20187, diff=1, hw=0 hw_last=0
[  342.757540] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20188, diff=1, hw=0 hw_last=0
[  342.774116] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20189, diff=1, hw=0 hw_last=0
[  342.790698] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20190, diff=1, hw=0 hw_last=0
[  342.807284] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20191, diff=1, hw=0 hw_last=0
[  342.809984] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  342.810100] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 20192 to client
[  342.816353] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  342.816442] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000cc24793
[  342.816513] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  342.816574] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000ec98bd42 state to 000000000cc24793
[  342.816640] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  342.816701] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 000000000cc24793
[  342.816769] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000ec98bd42
[  342.816832] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  342.816891] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  342.816951] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  342.817011] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  342.817074] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  342.817134] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  342.817197] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  342.817257] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  342.817317] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000000cc24793
[  342.817380] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  342.817440] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000000cc24793
[  342.817510] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  342.817556] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  342.817587] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000cc24793
[  342.817654] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000008a640c91 to 000000000cc24793
[  342.817716] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000cc24793
[  342.817783] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  342.817843] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  342.817905] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  342.817993] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000000cc24793
[  342.818059] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000cc24793
[  342.818121] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  342.818182] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  342.818244] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  342.818306] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  342.818366] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000cc24793
[  342.819800] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  342.823864] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20192, diff=1, hw=0 hw_last=0
[  342.825678] systemd-journald[214]: Data hash table of /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal has a fill level at 75.0 (2731 of 3640 items, 2097152 file size, 767 bytes per hash table item), suggesting rotation.
[  342.890180] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20196, diff=1, hw=0 hw_last=0
[  342.906757] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20197, diff=1, hw=0 hw_last=0
[  342.923344] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20198, diff=1, hw=0 hw_last=0
[  342.939916] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20199, diff=1, hw=0 hw_last=0
[  342.956499] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20200, diff=1, hw=0 hw_last=0
[  342.973078] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20201, diff=1, hw=0 hw_last=0
[  342.989656] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20202, diff=1, hw=0 hw_last=0
[  343.006233] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20203, diff=1, hw=0 hw_last=0
[  343.022811] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20204, diff=1, hw=0 hw_last=0
[  343.039390] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20205, diff=1, hw=0 hw_last=0
[  343.047561] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  343.047664] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000cc24793
[  343.047739] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  343.047801] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000ec98bd42 state to 000000000cc24793
[  343.047868] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  343.047929] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 000000000cc24793
[  343.047998] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000ec98bd42
[  343.048062] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  343.048122] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  343.048182] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  343.048241] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  343.048304] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  343.048365] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  343.048429] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  343.048489] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  343.048549] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000000cc24793
[  343.048613] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  343.048675] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000000cc24793
[  343.048746] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  343.048790] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  343.048821] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000cc24793
[  343.048889] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000082174610 to 000000000cc24793
[  343.048951] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000cc24793
[  343.049027] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000cc24793 nonblocking
[  343.049136] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  343.049213] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  343.055966] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20206, diff=1, hw=0 hw_last=0
[  343.056076] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000cc24793
[  343.056148] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  343.056212] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  343.056273] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  343.056336] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  343.056399] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000cc24793
[  343.072544] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20207, diff=1, hw=0 hw_last=0
[  343.089125] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20208, diff=1, hw=0 hw_last=0
[  343.105701] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20209, diff=1, hw=0 hw_last=0
[  343.122280] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20210, diff=1, hw=0 hw_last=0
[  343.138861] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20211, diff=1, hw=0 hw_last=0
[  343.155442] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20212, diff=1, hw=0 hw_last=0
[  343.172018] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20213, diff=1, hw=0 hw_last=0
[  343.188599] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20214, diff=1, hw=0 hw_last=0
[  343.205180] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20215, diff=1, hw=0 hw_last=0
[  343.221756] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20216, diff=1, hw=0 hw_last=0
[  343.238334] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20217, diff=1, hw=0 hw_last=0
[  343.254912] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20218, diff=1, hw=0 hw_last=0
[  343.271492] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20219, diff=1, hw=0 hw_last=0
[  343.288071] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20220, diff=1, hw=0 hw_last=0
[  343.304650] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20221, diff=1, hw=0 hw_last=0
[  343.321229] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20222, diff=1, hw=0 hw_last=0
[  343.337810] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20223, diff=1, hw=0 hw_last=0
[  343.354391] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20224, diff=1, hw=0 hw_last=0
[  343.370970] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20225, diff=1, hw=0 hw_last=0
[  343.387547] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20226, diff=1, hw=0 hw_last=0
[  343.404128] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20227, diff=1, hw=0 hw_last=0
[  343.420706] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20228, diff=1, hw=0 hw_last=0
[  343.437285] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20229, diff=1, hw=0 hw_last=0
[  343.453864] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20230, diff=1, hw=0 hw_last=0
[  343.845362] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  343.845426] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  343.845486] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  343.845551] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  343.845611] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  343.845670] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 00000000fde3661d
[  343.845734] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  343.845794] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000fde3661d
[  343.845865] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  343.845909] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  343.845958] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000fde3661d
[  343.846032] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000009472d261 to 00000000fde3661d
[  343.846095] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000fde3661d
[  343.846164] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  343.846225] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  343.846288] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  343.846359] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 00000000fde3661d
[  343.846423] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000fde3661d
[  343.846484] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  343.846547] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  343.846608] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  343.846670] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  343.846732] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000fde3661d
[  343.848189] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  343.851775] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20254, diff=1, hw=0 hw_last=0
[  343.868349] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20255, diff=1, hw=0 hw_last=0
[  343.884928] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20256, diff=1, hw=0 hw_last=0
[  343.901505] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20257, diff=1, hw=0 hw_last=0
[  343.918090] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20258, diff=1, hw=0 hw_last=0
[  343.934666] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20259, diff=1, hw=0 hw_last=0
[  343.951247] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20260, diff=1, hw=0 hw_last=0
[  343.967827] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20261, diff=1, hw=0 hw_last=0
[  343.984409] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20262, diff=1, hw=0 hw_last=0
[  344.000986] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20263, diff=1, hw=0 hw_last=0
[  344.017565] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20264, diff=1, hw=0 hw_last=0
[  344.034144] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20265, diff=1, hw=0 hw_last=0
[  344.050720] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20266, diff=1, hw=0 hw_last=0
[  344.067298] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20267, diff=1, hw=0 hw_last=0
[  344.076569] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  344.076678] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000fde3661d
[  344.076756] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  344.076818] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000215b6887 state to 00000000fde3661d
[  344.076884] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  344.076946] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000adb7ad91 state to 00000000fde3661d
[  344.077015] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000215b6887
[  344.077078] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  344.077138] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  344.077198] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  344.077258] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  344.077322] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  344.077382] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  344.077446] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  344.077507] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  344.077567] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 00000000fde3661d
[  344.077631] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  344.077693] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000fde3661d
[  344.077765] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  344.077811] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  344.077843] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000fde3661d
[  344.077911] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000000305e034 to 00000000fde3661d
[  344.078010] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000fde3661d
[  344.078091] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000fde3661d nonblocking
[  344.078194] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  344.078281] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  344.083876] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20268, diff=1, hw=0 hw_last=0
[  344.083978] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000fde3661d
[  344.084066] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  344.084139] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  344.084213] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  344.084287] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  344.084362] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000fde3661d
[  344.100454] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20269, diff=1, hw=0 hw_last=0
[  344.117033] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20270, diff=1, hw=0 hw_last=0
[  344.133613] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20271, diff=1, hw=0 hw_last=0
[  344.282824] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20280, diff=1, hw=0 hw_last=0
[  344.299402] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20281, diff=1, hw=0 hw_last=0
[  344.315982] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20282, diff=1, hw=0 hw_last=0
[  344.332561] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20283, diff=1, hw=0 hw_last=0
[  344.349140] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20284, diff=1, hw=0 hw_last=0
[  344.365719] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20285, diff=1, hw=0 hw_last=0
[  344.382300] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20286, diff=1, hw=0 hw_last=0
[  344.398880] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20287, diff=1, hw=0 hw_last=0
[  344.415460] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20288, diff=1, hw=0 hw_last=0
[  344.432036] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20289, diff=1, hw=0 hw_last=0
[  344.448618] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20290, diff=1, hw=0 hw_last=0
[  344.465198] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20291, diff=1, hw=0 hw_last=0
[  344.481774] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20292, diff=1, hw=0 hw_last=0
[  344.498354] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20293, diff=1, hw=0 hw_last=0
[  344.514934] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20294, diff=1, hw=0 hw_last=0
[  344.531512] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20295, diff=1, hw=0 hw_last=0
[  344.548092] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20296, diff=1, hw=0 hw_last=0
[  344.564671] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20297, diff=1, hw=0 hw_last=0
[  344.581250] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20298, diff=1, hw=0 hw_last=0
[  344.597830] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20299, diff=1, hw=0 hw_last=0
[  344.614407] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20300, diff=1, hw=0 hw_last=0
[  344.630987] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20301, diff=1, hw=0 hw_last=0
[  344.647568] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20302, diff=1, hw=0 hw_last=0
[  344.664145] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20303, diff=1, hw=0 hw_last=0
[  344.680724] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20304, diff=1, hw=0 hw_last=0
[  344.697306] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20305, diff=1, hw=0 hw_last=0
[  344.713883] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20306, diff=1, hw=0 hw_last=0
[  344.730462] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20307, diff=1, hw=0 hw_last=0
[  344.747041] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20308, diff=1, hw=0 hw_last=0
[  344.763623] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20309, diff=1, hw=0 hw_last=0
[  344.780200] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20310, diff=1, hw=0 hw_last=0
[  344.796783] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20311, diff=1, hw=0 hw_last=0
[  344.813360] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20312, diff=1, hw=0 hw_last=0
[  344.829939] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20313, diff=1, hw=0 hw_last=0
[  344.846519] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20314, diff=1, hw=0 hw_last=0
[  344.863096] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20315, diff=1, hw=0 hw_last=0
[  344.879674] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20316, diff=1, hw=0 hw_last=0
[  344.896268] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20317, diff=1, hw=0 hw_last=0
[  344.896371] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  344.896462] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 20318 to client
[  344.905721] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  344.905811] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008e9f664b
[  344.905883] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  344.905962] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000003519e999 state to 000000008e9f664b
[  344.906035] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  344.906097] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 000000008e9f664b
[  344.906167] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 000000003519e999
[  344.906230] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  344.906292] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  344.906352] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  344.906413] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  344.906478] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  344.906540] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  344.906605] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  344.906666] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  344.906727] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 000000008e9f664b
[  344.906790] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  344.906852] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000008e9f664b
[  344.906924] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  344.906972] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  344.907004] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008e9f664b
[  344.907072] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000018d86a98 to 000000008e9f664b
[  344.907135] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008e9f664b
[  344.907202] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  344.907264] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  344.907327] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  344.909226] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  344.912842] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20318, diff=1, hw=0 hw_last=0
[  344.929417] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20319, diff=1, hw=0 hw_last=0
[  344.945998] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20320, diff=1, hw=0 hw_last=0
[  344.962576] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20321, diff=1, hw=0 hw_last=0
[  344.979156] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20322, diff=1, hw=0 hw_last=0
[  344.995739] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20323, diff=1, hw=0 hw_last=0
[  345.012317] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20324, diff=1, hw=0 hw_last=0
[  345.028895] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20325, diff=1, hw=0 hw_last=0
[  345.045478] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20326, diff=1, hw=0 hw_last=0
[  345.062057] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20327, diff=1, hw=0 hw_last=0
[  345.078634] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20328, diff=1, hw=0 hw_last=0
[  345.095214] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20329, diff=1, hw=0 hw_last=0
[  345.111789] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20330, diff=1, hw=0 hw_last=0
[  345.128368] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20331, diff=1, hw=0 hw_last=0
[  345.137104] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  345.137212] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000008e9f664b
[  345.137287] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  345.137349] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000003519e999 state to 000000008e9f664b
[  345.137416] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  345.137477] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 000000008e9f664b
[  345.137546] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 000000003519e999
[  345.137609] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  345.137670] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  345.137730] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  345.137791] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  345.137854] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  345.137949] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  345.138020] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  345.138086] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  345.138149] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 000000008e9f664b
[  345.138214] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  345.138278] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000008e9f664b
[  345.138350] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  345.138400] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  345.138431] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008e9f664b
[  345.138501] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000006e1bef3e to 000000008e9f664b
[  345.138564] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000008e9f664b
[  345.138643] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000008e9f664b nonblocking
[  345.138744] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  345.138828] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  345.144946] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20332, diff=1, hw=0 hw_last=0
[  345.145053] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000008e9f664b
[  345.145140] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  345.145214] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  345.145288] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  345.145362] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  345.145435] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000008e9f664b
[  345.161523] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20333, diff=1, hw=0 hw_last=0
[  345.178102] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20334, diff=1, hw=0 hw_last=0
[  345.194681] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20335, diff=1, hw=0 hw_last=0
[  345.211260] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20336, diff=1, hw=0 hw_last=0
[  345.227840] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20337, diff=1, hw=0 hw_last=0
[  345.244421] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20338, diff=1, hw=0 hw_last=0
[  345.260998] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20339, diff=1, hw=0 hw_last=0
[  345.277577] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20340, diff=1, hw=0 hw_last=0
[  345.294160] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20341, diff=1, hw=0 hw_last=0
[  345.310738] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20342, diff=1, hw=0 hw_last=0
[  345.327313] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20343, diff=1, hw=0 hw_last=0
[  345.343892] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20344, diff=1, hw=0 hw_last=0
[  345.360471] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20345, diff=1, hw=0 hw_last=0
[  345.377050] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20346, diff=1, hw=0 hw_last=0
[  345.393629] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20347, diff=1, hw=0 hw_last=0
[  345.410209] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20348, diff=1, hw=0 hw_last=0
[  345.426788] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20349, diff=1, hw=0 hw_last=0
[  345.443367] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20350, diff=1, hw=0 hw_last=0
[  345.459950] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20351, diff=1, hw=0 hw_last=0
[  345.476530] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20352, diff=1, hw=0 hw_last=0
[  346.182544] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000018d86a98 to 00000000c0cf118d
[  346.182607] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000c0cf118d
[  346.182685] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000c0cf118d nonblocking
[  346.182785] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  346.182859] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  346.189434] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20395, diff=1, hw=0 hw_last=0
[  346.189542] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000c0cf118d
[  346.189614] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  346.189676] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  346.189739] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  346.189803] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  346.189865] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000c0cf118d
[  346.206013] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20396, diff=1, hw=0 hw_last=0
[  346.222590] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20397, diff=1, hw=0 hw_last=0
[  346.239172] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20398, diff=1, hw=0 hw_last=0
[  346.255749] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20399, diff=1, hw=0 hw_last=0
[  346.272328] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20400, diff=1, hw=0 hw_last=0
[  346.288909] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20401, diff=1, hw=0 hw_last=0
[  346.305488] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20402, diff=1, hw=0 hw_last=0
[  346.322068] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20403, diff=1, hw=0 hw_last=0
[  346.338649] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20404, diff=1, hw=0 hw_last=0
[  346.355228] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20405, diff=1, hw=0 hw_last=0
[  346.371802] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20406, diff=1, hw=0 hw_last=0
[  346.388381] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20407, diff=1, hw=0 hw_last=0
[  346.404960] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20408, diff=1, hw=0 hw_last=0
[  346.421539] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20409, diff=1, hw=0 hw_last=0
[  346.438119] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20410, diff=1, hw=0 hw_last=0
[  346.454698] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20411, diff=1, hw=0 hw_last=0
[  346.471277] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20412, diff=1, hw=0 hw_last=0
[  346.487862] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20413, diff=1, hw=0 hw_last=0
[  346.504439] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20414, diff=1, hw=0 hw_last=0
[  346.521021] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20415, diff=1, hw=0 hw_last=0
[  346.537595] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20416, diff=1, hw=0 hw_last=0
[  346.554179] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20417, diff=1, hw=0 hw_last=0
[  346.570754] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20418, diff=1, hw=0 hw_last=0
[  346.587333] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20419, diff=1, hw=0 hw_last=0
[  346.603915] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20420, diff=1, hw=0 hw_last=0
[  346.620491] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20421, diff=1, hw=0 hw_last=0
[  346.637070] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20422, diff=1, hw=0 hw_last=0
[  346.653649] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20423, diff=1, hw=0 hw_last=0
[  346.670228] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20424, diff=1, hw=0 hw_last=0
[  346.686809] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20425, diff=1, hw=0 hw_last=0
[  346.703387] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20426, diff=1, hw=0 hw_last=0
[  346.719966] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20427, diff=1, hw=0 hw_last=0
[  346.736546] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20428, diff=1, hw=0 hw_last=0
[  346.753126] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20429, diff=1, hw=0 hw_last=0
[  346.769704] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20430, diff=1, hw=0 hw_last=0
[  346.786285] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20431, diff=1, hw=0 hw_last=0
[  346.802864] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20432, diff=1, hw=0 hw_last=0
[  346.819442] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20433, diff=1, hw=0 hw_last=0
[  346.836021] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20434, diff=1, hw=0 hw_last=0
[  346.852602] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20435, diff=1, hw=0 hw_last=0
[  346.869182] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20436, diff=1, hw=0 hw_last=0
[  346.885758] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20437, diff=1, hw=0 hw_last=0
[  346.902339] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20438, diff=1, hw=0 hw_last=0
[  346.918918] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20439, diff=1, hw=0 hw_last=0
[  346.935499] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20440, diff=1, hw=0 hw_last=0
[  346.952077] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20441, diff=1, hw=0 hw_last=0
[  346.968656] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20442, diff=1, hw=0 hw_last=0
[  346.985242] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20443, diff=1, hw=0 hw_last=0
[  347.230767] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  347.230815] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  347.230847] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000e0dcab9c
[  347.230917] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000009472d261 to 00000000e0dcab9c
[  347.230980] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000e0dcab9c
[  347.231058] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e0dcab9c nonblocking
[  347.231159] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  347.231232] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  347.233924] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20458, diff=1, hw=0 hw_last=0
[  347.234008] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e0dcab9c
[  347.234079] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  347.234143] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  347.234205] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  347.234268] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  347.234330] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e0dcab9c
[  347.250504] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20459, diff=1, hw=0 hw_last=0
[  347.267081] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20460, diff=1, hw=0 hw_last=0
[  347.283660] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20461, diff=1, hw=0 hw_last=0
[  347.300240] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20462, diff=1, hw=0 hw_last=0
[  347.316819] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20463, diff=1, hw=0 hw_last=0
[  347.333399] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20464, diff=1, hw=0 hw_last=0
[  347.349978] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20465, diff=1, hw=0 hw_last=0
[  347.366558] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20466, diff=1, hw=0 hw_last=0
[  347.383137] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20467, diff=1, hw=0 hw_last=0
[  347.399719] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20468, diff=1, hw=0 hw_last=0
[  347.416294] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20469, diff=1, hw=0 hw_last=0
[  347.432871] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20470, diff=1, hw=0 hw_last=0
[  347.449450] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20471, diff=1, hw=0 hw_last=0
[  347.466030] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20472, diff=1, hw=0 hw_last=0
[  347.482608] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20473, diff=1, hw=0 hw_last=0
[  347.499188] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20474, diff=1, hw=0 hw_last=0
[  347.515767] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20475, diff=1, hw=0 hw_last=0
[  347.532346] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20476, diff=1, hw=0 hw_last=0
[  347.548925] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20477, diff=1, hw=0 hw_last=0
[  347.565509] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20478, diff=1, hw=0 hw_last=0
[  347.582087] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20479, diff=1, hw=0 hw_last=0
[  347.598667] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20480, diff=1, hw=0 hw_last=0
[  347.615245] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20481, diff=1, hw=0 hw_last=0
[  347.631822] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20482, diff=1, hw=0 hw_last=0
[  347.648401] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20483, diff=1, hw=0 hw_last=0
[  347.664980] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20484, diff=1, hw=0 hw_last=0
[  347.681570] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20485, diff=1, hw=0 hw_last=0
[  347.698139] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20486, diff=1, hw=0 hw_last=0
[  347.714719] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20487, diff=1, hw=0 hw_last=0
[  347.731298] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20488, diff=1, hw=0 hw_last=0
[  347.747876] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20489, diff=1, hw=0 hw_last=0
[  347.764458] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20490, diff=1, hw=0 hw_last=0
[  347.781035] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20491, diff=1, hw=0 hw_last=0
[  347.797616] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20492, diff=1, hw=0 hw_last=0
[  347.814194] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20493, diff=1, hw=0 hw_last=0
[  347.830773] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20494, diff=1, hw=0 hw_last=0
[  347.847352] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20495, diff=1, hw=0 hw_last=0
[  347.863931] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20496, diff=1, hw=0 hw_last=0
[  347.880511] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20497, diff=1, hw=0 hw_last=0
[  347.897089] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20498, diff=1, hw=0 hw_last=0
[  347.913670] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20499, diff=1, hw=0 hw_last=0
[  347.930250] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20500, diff=1, hw=0 hw_last=0
[  347.946829] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20501, diff=1, hw=0 hw_last=0
[  347.963410] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20502, diff=1, hw=0 hw_last=0
[  347.978991] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  347.979107] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 20503 to client
[  347.979997] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20503, diff=1, hw=0 hw_last=0
[  347.989371] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  347.989462] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007967e7cb
[  347.989535] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  347.989596] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000087081e28 state to 000000007967e7cb
[  347.989663] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  347.989725] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 000000007967e7cb
[  347.989794] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000087081e28
[  347.989857] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  347.989933] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  347.989998] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  347.990061] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  347.990126] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  347.990189] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  347.990255] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  347.990316] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  347.990377] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 000000007967e7cb
[  347.990442] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  347.990504] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000007967e7cb
[  347.990578] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  347.990624] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  347.990656] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000007967e7cb
[  347.990724] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000000cc24793 to 000000007967e7cb
[  347.990788] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000007967e7cb
[  347.990856] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  347.990918] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  347.990981] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  347.991052] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000007967e7cb
[  347.991116] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000007967e7cb
[  347.991179] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  347.991240] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  347.991301] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  347.991363] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  347.991424] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000007967e7cb
[  347.992893] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  347.996578] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20504, diff=1, hw=0 hw_last=0
[  348.013149] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20505, diff=1, hw=0 hw_last=0
[  348.029729] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20506, diff=1, hw=0 hw_last=0
[  348.046308] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20507, diff=1, hw=0 hw_last=0
[  348.062893] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20508, diff=1, hw=0 hw_last=0
[  348.079468] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20509, diff=1, hw=0 hw_last=0
[  348.096047] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20510, diff=1, hw=0 hw_last=0
[  348.112628] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20511, diff=1, hw=0 hw_last=0
[  348.129209] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20512, diff=1, hw=0 hw_last=0
[  348.145785] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20513, diff=1, hw=0 hw_last=0
[  348.162365] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20514, diff=1, hw=0 hw_last=0
[  348.178942] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20515, diff=1, hw=0 hw_last=0
[  348.195521] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20516, diff=1, hw=0 hw_last=0
[  348.212101] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20517, diff=1, hw=0 hw_last=0
[  348.221310] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  348.221415] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000007967e7cb
[  348.221492] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  348.221554] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000087081e28 state to 000000007967e7cb
[  348.221619] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  348.221679] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 000000007967e7cb
[  348.221747] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 0000000087081e28
[  348.221809] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  348.221869] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  348.221961] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  348.222027] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  348.222094] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  348.222156] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  348.222223] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  348.222284] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  348.222346] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 000000007967e7cb
[  348.222412] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  348.222475] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000007967e7cb
[  348.222546] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  348.222592] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  348.222624] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000007967e7cb
[  348.222694] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000008a640c91 to 000000007967e7cb
[  348.222756] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000007967e7cb
[  348.222834] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000007967e7cb nonblocking
[  348.222932] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  348.223017] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  348.361312] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20526, diff=1, hw=0 hw_last=0
[  348.377894] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20527, diff=1, hw=0 hw_last=0
[  348.394467] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20528, diff=1, hw=0 hw_last=0
[  348.411044] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20529, diff=1, hw=0 hw_last=0
[  348.427624] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20530, diff=1, hw=0 hw_last=0
[  348.444202] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20531, diff=1, hw=0 hw_last=0
[  348.460781] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20532, diff=1, hw=0 hw_last=0
[  348.477361] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20533, diff=1, hw=0 hw_last=0
[  348.493940] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20534, diff=1, hw=0 hw_last=0
[  348.510519] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20535, diff=1, hw=0 hw_last=0
[  348.527099] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20536, diff=1, hw=0 hw_last=0
[  348.543681] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20537, diff=1, hw=0 hw_last=0
[  348.560258] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20538, diff=1, hw=0 hw_last=0
[  348.576839] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20539, diff=1, hw=0 hw_last=0
[  348.593416] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20540, diff=1, hw=0 hw_last=0
[  348.609994] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20541, diff=1, hw=0 hw_last=0
[  348.626573] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20542, diff=1, hw=0 hw_last=0
[  348.643153] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20543, diff=1, hw=0 hw_last=0
[  348.659734] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20544, diff=1, hw=0 hw_last=0
[  348.676312] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20545, diff=1, hw=0 hw_last=0
[  348.692890] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20546, diff=1, hw=0 hw_last=0
[  348.693249] systemd-journald[214]: Data hash table of /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal has a fill level at 75.1 (2732 of 3640 items, 2097152 file size, 767 bytes per hash table item), suggesting rotation.
[  348.709470] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20547, diff=1, hw=0 hw_last=0
[  348.718484] systemd-journald[214]: /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal: Journal header limits reached or header out-of-date, rotating.
[  348.726051] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20548, diff=1, hw=0 hw_last=0
[  348.742632] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20549, diff=1, hw=0 hw_last=0
[  348.759208] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20550, diff=1, hw=0 hw_last=0
[  348.775791] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20551, diff=1, hw=0 hw_last=0
[  348.792366] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20552, diff=1, hw=0 hw_last=0
[  348.808948] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20553, diff=1, hw=0 hw_last=0
[  348.825524] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20554, diff=1, hw=0 hw_last=0
[  348.842104] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20555, diff=1, hw=0 hw_last=0
[  348.858682] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20556, diff=1, hw=0 hw_last=0
[  348.875262] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20557, diff=1, hw=0 hw_last=0
[  348.891843] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20558, diff=1, hw=0 hw_last=0
[  348.908423] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20559, diff=1, hw=0 hw_last=0
[  348.925003] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20560, diff=1, hw=0 hw_last=0
[  348.941591] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20561, diff=1, hw=0 hw_last=0
[  348.943278] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  348.943390] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 20562 to client
[  348.950648] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  348.950738] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000095dd8ec0
[  348.950808] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  348.950869] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000002cafbe1b state to 0000000095dd8ec0
[  348.950935] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  348.950995] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 0000000095dd8ec0
[  348.951063] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 000000002cafbe1b
[  348.951126] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  348.951186] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  348.951246] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  348.951306] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  348.951369] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  348.951430] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  348.951494] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  348.951553] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  348.951613] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 0000000095dd8ec0
[  348.951677] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  348.951737] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000095dd8ec0
[  348.951807] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  348.951852] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  348.951884] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000095dd8ec0
[  348.951952] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000007967e7cb to 0000000095dd8ec0
[  348.952014] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000095dd8ec0
[  348.952080] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  348.952142] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  348.974744] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20563, diff=1, hw=0 hw_last=0
[  348.991321] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20564, diff=1, hw=0 hw_last=0
[  349.007902] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20565, diff=1, hw=0 hw_last=0
[  349.024486] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20566, diff=1, hw=0 hw_last=0
[  349.041063] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20567, diff=1, hw=0 hw_last=0
[  349.057641] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20568, diff=1, hw=0 hw_last=0
[  349.074219] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20569, diff=1, hw=0 hw_last=0
[  349.090802] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20570, diff=1, hw=0 hw_last=0
[  349.107381] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20571, diff=1, hw=0 hw_last=0
[  349.123957] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20572, diff=1, hw=0 hw_last=0
[  349.140538] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20573, diff=1, hw=0 hw_last=0
[  349.157113] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20574, diff=1, hw=0 hw_last=0
[  349.173697] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20575, diff=1, hw=0 hw_last=0
[  349.181689] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  349.181798] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000095dd8ec0
[  349.181877] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  349.181982] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000002cafbe1b state to 0000000095dd8ec0
[  349.182054] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  349.182117] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 0000000095dd8ec0
[  349.182187] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 000000002cafbe1b
[  349.182252] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  349.182314] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  349.182376] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  349.182437] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  349.182502] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  349.182564] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  349.182630] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  349.182692] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  349.182753] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 0000000095dd8ec0
[  349.182816] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  349.182880] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000095dd8ec0
[  349.182952] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  349.182998] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  349.183030] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000095dd8ec0
[  349.183101] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000000cc24793 to 0000000095dd8ec0
[  349.183164] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000095dd8ec0
[  349.183241] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000095dd8ec0 nonblocking
[  349.183344] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  349.183431] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  349.190270] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20576, diff=1, hw=0 hw_last=0
[  349.190365] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000095dd8ec0
[  349.190454] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  349.190530] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  349.190604] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  349.190678] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  349.190754] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000095dd8ec0
[  349.206849] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20577, diff=1, hw=0 hw_last=0
[  349.223426] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20578, diff=1, hw=0 hw_last=0
[  349.240005] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20579, diff=1, hw=0 hw_last=0
[  349.256584] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20580, diff=1, hw=0 hw_last=0
[  349.273163] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20581, diff=1, hw=0 hw_last=0
[  349.289745] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20582, diff=1, hw=0 hw_last=0
[  349.306324] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20583, diff=1, hw=0 hw_last=0
[  349.322903] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20584, diff=1, hw=0 hw_last=0
[  349.339483] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20585, diff=1, hw=0 hw_last=0
[  349.356064] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20586, diff=1, hw=0 hw_last=0
[  349.372638] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20587, diff=1, hw=0 hw_last=0
[  349.389216] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20588, diff=1, hw=0 hw_last=0
[  349.405807] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20589, diff=1, hw=0 hw_last=0
[  349.422391] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20590, diff=1, hw=0 hw_last=0
[  349.438962] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20591, diff=1, hw=0 hw_last=0
[  349.455535] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20592, diff=1, hw=0 hw_last=0
[  349.472114] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20593, diff=1, hw=0 hw_last=0
[  349.488696] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20594, diff=1, hw=0 hw_last=0
[  349.505274] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20595, diff=1, hw=0 hw_last=0
[  349.521851] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20596, diff=1, hw=0 hw_last=0
[  349.538433] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20597, diff=1, hw=0 hw_last=0
[  349.637905] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20603, diff=1, hw=0 hw_last=0
[  349.654484] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20604, diff=1, hw=0 hw_last=0
[  349.671064] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20605, diff=1, hw=0 hw_last=0
[  349.687642] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20606, diff=1, hw=0 hw_last=0
[  349.704221] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20607, diff=1, hw=0 hw_last=0
[  349.720801] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20608, diff=1, hw=0 hw_last=0
[  349.737383] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20609, diff=1, hw=0 hw_last=0
[  349.753963] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20610, diff=1, hw=0 hw_last=0
[  349.770540] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20611, diff=1, hw=0 hw_last=0
[  349.787119] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20612, diff=1, hw=0 hw_last=0
[  349.803697] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20613, diff=1, hw=0 hw_last=0
[  349.820279] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20614, diff=1, hw=0 hw_last=0
[  349.836858] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20615, diff=1, hw=0 hw_last=0
[  349.853436] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20616, diff=1, hw=0 hw_last=0
[  349.870015] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20617, diff=1, hw=0 hw_last=0
[  349.886594] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20618, diff=1, hw=0 hw_last=0
[  349.903173] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20619, diff=1, hw=0 hw_last=0
[  349.919752] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20620, diff=1, hw=0 hw_last=0
[  349.936332] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20621, diff=1, hw=0 hw_last=0
[  349.952917] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20622, diff=1, hw=0 hw_last=0
[  349.959458] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  349.959571] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 20623 to client
[  349.961851] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  349.961974] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000d7e48c6b
[  349.962053] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  349.962118] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000ec98bd42 state to 00000000d7e48c6b
[  349.962186] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  349.962251] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 00000000d7e48c6b
[  349.962321] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000ec98bd42
[  349.962386] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  349.962448] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  349.962511] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  349.962572] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  349.962639] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  349.962700] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  349.962766] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  349.962827] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  349.962888] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 00000000d7e48c6b
[  349.962952] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  349.963013] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000d7e48c6b
[  349.963083] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  349.963133] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  349.963165] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000d7e48c6b
[  349.963234] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000e0dcab9c to 00000000d7e48c6b
[  349.963297] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000d7e48c6b
[  349.963365] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  349.963428] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  349.963491] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  349.963562] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 00000000d7e48c6b
[  349.963626] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000d7e48c6b
[  349.963688] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  349.963750] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  349.963812] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  349.963873] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  349.963936] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000d7e48c6b
[  349.965369] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  349.969500] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20623, diff=1, hw=0 hw_last=0
[  349.986074] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20624, diff=1, hw=0 hw_last=0
[  350.002653] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20625, diff=1, hw=0 hw_last=0
[  350.019232] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20626, diff=1, hw=0 hw_last=0
[  350.035813] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20627, diff=1, hw=0 hw_last=0
[  350.052396] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20628, diff=1, hw=0 hw_last=0
[  350.068972] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20629, diff=1, hw=0 hw_last=0
[  350.085551] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20630, diff=1, hw=0 hw_last=0
[  350.102131] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20631, diff=1, hw=0 hw_last=0
[  350.118714] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20632, diff=1, hw=0 hw_last=0
[  350.135288] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20633, diff=1, hw=0 hw_last=0
[  350.151868] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20634, diff=1, hw=0 hw_last=0
[  350.168446] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20635, diff=1, hw=0 hw_last=0
[  350.317655] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20644, diff=1, hw=0 hw_last=0
[  350.334234] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20645, diff=1, hw=0 hw_last=0
[  350.350812] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20646, diff=1, hw=0 hw_last=0
[  350.367395] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20647, diff=1, hw=0 hw_last=0
[  350.383974] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20648, diff=1, hw=0 hw_last=0
[  350.400548] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20649, diff=1, hw=0 hw_last=0
[  350.417128] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20650, diff=1, hw=0 hw_last=0
[  350.433706] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20651, diff=1, hw=0 hw_last=0
[  350.450286] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20652, diff=1, hw=0 hw_last=0
[  350.466865] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20653, diff=1, hw=0 hw_last=0
[  350.483444] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20654, diff=1, hw=0 hw_last=0
[  350.500024] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20655, diff=1, hw=0 hw_last=0
[  350.516606] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20656, diff=1, hw=0 hw_last=0
[  350.533182] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20657, diff=1, hw=0 hw_last=0
[  350.549764] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20658, diff=1, hw=0 hw_last=0
[  350.566342] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20659, diff=1, hw=0 hw_last=0
[  350.582922] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20660, diff=1, hw=0 hw_last=0
[  350.599501] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20661, diff=1, hw=0 hw_last=0
[  350.616080] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20662, diff=1, hw=0 hw_last=0
[  350.632658] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20663, diff=1, hw=0 hw_last=0
[  350.649237] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20664, diff=1, hw=0 hw_last=0
[  350.665815] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20665, diff=1, hw=0 hw_last=0
[  350.682395] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20666, diff=1, hw=0 hw_last=0
[  350.698974] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20667, diff=1, hw=0 hw_last=0
[  350.715552] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20668, diff=1, hw=0 hw_last=0
[  350.732133] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20669, diff=1, hw=0 hw_last=0
[  350.748714] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20670, diff=1, hw=0 hw_last=0
[  350.765293] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20671, diff=1, hw=0 hw_last=0
[  350.781872] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20672, diff=1, hw=0 hw_last=0
[  350.798450] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20673, diff=1, hw=0 hw_last=0
[  350.815029] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20674, diff=1, hw=0 hw_last=0
[  350.831609] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20675, diff=1, hw=0 hw_last=0
[  350.848189] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20676, diff=1, hw=0 hw_last=0
[  350.864767] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20677, diff=1, hw=0 hw_last=0
[  350.881347] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20678, diff=1, hw=0 hw_last=0
[  350.897924] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20679, diff=1, hw=0 hw_last=0
[  350.914504] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20680, diff=1, hw=0 hw_last=0
[  350.931084] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20681, diff=1, hw=0 hw_last=0
[  350.947663] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20682, diff=1, hw=0 hw_last=0
[  350.964246] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20683, diff=1, hw=0 hw_last=0
[  350.973352] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  350.973466] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 20684 to client
[  350.974740] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  350.974836] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000004593454f
[  350.974915] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  350.974979] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000bac3ec2d state to 000000004593454f
[  350.975051] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  350.975114] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a743c9a8 state to 000000004593454f
[  350.975182] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 00000000bac3ec2d
[  350.975245] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  350.975306] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  350.975366] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  350.975427] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  350.975491] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  350.975552] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  350.975616] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  350.975676] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  350.975737] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 000000004593454f
[  350.975801] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  350.975861] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000004593454f
[  350.975931] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  350.975975] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  350.976007] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000004593454f
[  350.976073] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000c0cf118d to 000000004593454f
[  350.976136] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000004593454f
[  351.395300] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20709, diff=1, hw=0 hw_last=0
[  351.411879] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20710, diff=1, hw=0 hw_last=0
[  351.428458] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20711, diff=1, hw=0 hw_last=0
[  351.445038] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20712, diff=1, hw=0 hw_last=0
[  351.461616] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20713, diff=1, hw=0 hw_last=0
[  351.478196] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20714, diff=1, hw=0 hw_last=0
[  351.494775] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20715, diff=1, hw=0 hw_last=0
[  351.511356] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20716, diff=1, hw=0 hw_last=0
[  351.527936] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20717, diff=1, hw=0 hw_last=0
[  351.544513] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20718, diff=1, hw=0 hw_last=0
[  351.561092] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20719, diff=1, hw=0 hw_last=0
[  351.577672] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20720, diff=1, hw=0 hw_last=0
[  351.594250] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20721, diff=1, hw=0 hw_last=0
[  351.610829] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20722, diff=1, hw=0 hw_last=0
[  351.627408] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20723, diff=1, hw=0 hw_last=0
[  351.643988] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20724, diff=1, hw=0 hw_last=0
[  351.660566] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20725, diff=1, hw=0 hw_last=0
[  351.677145] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20726, diff=1, hw=0 hw_last=0
[  351.693726] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20727, diff=1, hw=0 hw_last=0
[  351.710305] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20728, diff=1, hw=0 hw_last=0
[  351.726883] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20729, diff=1, hw=0 hw_last=0
[  351.743463] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20730, diff=1, hw=0 hw_last=0
[  351.760043] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20731, diff=1, hw=0 hw_last=0
[  351.776626] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20732, diff=1, hw=0 hw_last=0
[  351.793201] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20733, diff=1, hw=0 hw_last=0
[  351.809781] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20734, diff=1, hw=0 hw_last=0
[  351.826364] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20735, diff=1, hw=0 hw_last=0
[  351.842938] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20736, diff=1, hw=0 hw_last=0
[  351.859517] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20737, diff=1, hw=0 hw_last=0
[  351.876099] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20738, diff=1, hw=0 hw_last=0
[  351.892678] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20739, diff=1, hw=0 hw_last=0
[  351.909255] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20740, diff=1, hw=0 hw_last=0
[  351.925835] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20741, diff=1, hw=0 hw_last=0
[  351.942419] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20742, diff=1, hw=0 hw_last=0
[  351.953641] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  351.953754] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 20743 to client
[  351.958999] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20743, diff=1, hw=0 hw_last=0
[  351.968020] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  351.968104] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000001477df7c
[  351.968175] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  351.968237] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000003519e999 state to 000000001477df7c
[  351.968304] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  351.968365] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 000000001477df7c
[  351.968433] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 000000003519e999
[  351.968497] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  351.968557] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  351.968617] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  351.968677] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  351.968740] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  351.968800] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  351.968865] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  351.968925] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  351.968986] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000001477df7c
[  351.969048] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  351.969110] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000001477df7c
[  351.969181] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  351.969228] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  351.969259] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000001477df7c
[  351.969328] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000004593454f to 000000001477df7c
[  351.969391] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000001477df7c
[  351.969459] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  351.969521] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  351.969583] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  351.969652] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000001477df7c
[  351.969725] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000001477df7c
[  351.969791] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  351.969881] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  352.058473] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20749, diff=1, hw=0 hw_last=0
[  352.075052] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20750, diff=1, hw=0 hw_last=0
[  352.091632] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20751, diff=1, hw=0 hw_last=0
[  352.108214] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20752, diff=1, hw=0 hw_last=0
[  352.124792] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20753, diff=1, hw=0 hw_last=0
[  352.141370] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20754, diff=1, hw=0 hw_last=0
[  352.157949] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20755, diff=1, hw=0 hw_last=0
[  352.174527] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20756, diff=1, hw=0 hw_last=0
[  352.191107] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20757, diff=1, hw=0 hw_last=0
[  352.199597] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  352.199706] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000001477df7c
[  352.199781] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  352.199843] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000003519e999 state to 000000001477df7c
[  352.199910] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  352.199971] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 000000001477df7c
[  352.200040] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 000000003519e999
[  352.200104] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  352.200165] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  352.200225] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  352.200285] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  352.200352] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  352.200413] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  352.200475] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  352.200537] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  352.200598] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000001477df7c
[  352.200662] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  352.200724] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000001477df7c
[  352.200796] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  352.200842] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  352.200874] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000001477df7c
[  352.200942] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000c0cf118d to 000000001477df7c
[  352.201005] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000001477df7c
[  352.201080] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000001477df7c nonblocking
[  352.201192] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  352.201266] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  352.207685] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20758, diff=1, hw=0 hw_last=0
[  352.207792] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000001477df7c
[  352.207861] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  352.207925] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  352.207987] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  352.208050] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  352.208114] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000001477df7c
[  352.224262] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20759, diff=1, hw=0 hw_last=0
[  352.240842] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20760, diff=1, hw=0 hw_last=0
[  352.257420] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20761, diff=1, hw=0 hw_last=0
[  352.273998] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20762, diff=1, hw=0 hw_last=0
[  352.290581] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20763, diff=1, hw=0 hw_last=0
[  352.307159] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20764, diff=1, hw=0 hw_last=0
[  352.323738] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20765, diff=1, hw=0 hw_last=0
[  352.340316] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20766, diff=1, hw=0 hw_last=0
[  352.356901] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20767, diff=1, hw=0 hw_last=0
[  352.373476] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20768, diff=1, hw=0 hw_last=0
[  352.390053] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20769, diff=1, hw=0 hw_last=0
[  352.406631] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20770, diff=1, hw=0 hw_last=0
[  352.423210] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20771, diff=1, hw=0 hw_last=0
[  352.439789] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20772, diff=1, hw=0 hw_last=0
[  352.456368] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20773, diff=1, hw=0 hw_last=0
[  352.472948] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20774, diff=1, hw=0 hw_last=0
[  352.489529] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20775, diff=1, hw=0 hw_last=0
[  352.506108] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20776, diff=1, hw=0 hw_last=0
[  352.522687] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20777, diff=1, hw=0 hw_last=0
[  352.539266] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20778, diff=1, hw=0 hw_last=0
[  352.555844] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20779, diff=1, hw=0 hw_last=0
[  352.572425] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20780, diff=1, hw=0 hw_last=0
[  352.589002] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20781, diff=1, hw=0 hw_last=0
[  352.605581] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20782, diff=1, hw=0 hw_last=0
[  352.622160] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20783, diff=1, hw=0 hw_last=0
[  352.638740] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20784, diff=1, hw=0 hw_last=0
[  352.721636] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20789, diff=1, hw=0 hw_last=0
[  352.738216] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20790, diff=1, hw=0 hw_last=0
[  352.754795] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20791, diff=1, hw=0 hw_last=0
[  352.771376] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20792, diff=1, hw=0 hw_last=0
[  352.787955] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20793, diff=1, hw=0 hw_last=0
[  352.804533] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20794, diff=1, hw=0 hw_last=0
[  352.821112] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20795, diff=1, hw=0 hw_last=0
[  352.837692] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20796, diff=1, hw=0 hw_last=0
[  352.854270] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20797, diff=1, hw=0 hw_last=0
[  352.870851] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20798, diff=1, hw=0 hw_last=0
[  352.887430] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20799, diff=1, hw=0 hw_last=0
[  352.904010] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20800, diff=1, hw=0 hw_last=0
[  352.920588] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20801, diff=1, hw=0 hw_last=0
[  352.937166] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20802, diff=1, hw=0 hw_last=0
[  352.953748] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20803, diff=1, hw=0 hw_last=0
[  352.963193] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  352.963303] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 20804 to client
[  352.964582] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  352.964681] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000eae20a14
[  352.964762] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  352.964828] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000082b4fa6a state to 00000000eae20a14
[  352.964898] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  352.964960] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 00000000eae20a14
[  352.965030] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 0000000082b4fa6a
[  352.965093] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  352.965153] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  352.965213] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  352.965274] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  352.965339] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  352.965400] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  352.965464] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  352.965525] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  352.965587] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 00000000eae20a14
[  352.965649] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  352.965711] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000eae20a14
[  352.965781] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  352.965824] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  352.965883] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000eae20a14
[  352.965961] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000d7e48c6b to 00000000eae20a14
[  352.966027] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000eae20a14
[  352.966098] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  352.966162] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  352.966226] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  352.966297] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 00000000eae20a14
[  352.966363] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000eae20a14
[  352.966428] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  352.966490] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  352.966553] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  352.966614] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  352.966675] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000eae20a14
[  352.968093] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  352.970330] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20804, diff=1, hw=0 hw_last=0
[  352.986908] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20805, diff=1, hw=0 hw_last=0
[  353.003487] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20806, diff=1, hw=0 hw_last=0
[  353.020064] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20807, diff=1, hw=0 hw_last=0
[  353.036647] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20808, diff=1, hw=0 hw_last=0
[  353.053227] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20809, diff=1, hw=0 hw_last=0
[  353.069805] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20810, diff=1, hw=0 hw_last=0
[  353.086382] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20811, diff=1, hw=0 hw_last=0
[  353.102962] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20812, diff=1, hw=0 hw_last=0
[  353.119546] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20813, diff=1, hw=0 hw_last=0
[  353.136121] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20814, diff=1, hw=0 hw_last=0
[  353.152700] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20815, diff=1, hw=0 hw_last=0
[  353.169287] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20816, diff=1, hw=0 hw_last=0
[  353.185865] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20817, diff=1, hw=0 hw_last=0
[  353.188934] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  353.189042] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000eae20a14
[  353.189118] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  353.189181] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000082b4fa6a state to 00000000eae20a14
[  353.401385] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20830, diff=1, hw=0 hw_last=0
[  353.417963] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20831, diff=1, hw=0 hw_last=0
[  353.434542] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20832, diff=1, hw=0 hw_last=0
[  353.451122] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20833, diff=1, hw=0 hw_last=0
[  353.467701] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20834, diff=1, hw=0 hw_last=0
[  353.484281] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20835, diff=1, hw=0 hw_last=0
[  353.500867] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20836, diff=1, hw=0 hw_last=0
[  353.517445] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20837, diff=1, hw=0 hw_last=0
[  353.534022] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20838, diff=1, hw=0 hw_last=0
[  353.550600] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20839, diff=1, hw=0 hw_last=0
[  353.567179] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20840, diff=1, hw=0 hw_last=0
[  353.583761] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20841, diff=1, hw=0 hw_last=0
[  353.600338] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20842, diff=1, hw=0 hw_last=0
[  353.616915] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20843, diff=1, hw=0 hw_last=0
[  353.633498] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20844, diff=1, hw=0 hw_last=0
[  353.650075] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20845, diff=1, hw=0 hw_last=0
[  353.666655] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20846, diff=1, hw=0 hw_last=0
[  353.683233] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20847, diff=1, hw=0 hw_last=0
[  353.699814] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20848, diff=1, hw=0 hw_last=0
[  353.716395] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20849, diff=1, hw=0 hw_last=0
[  353.732970] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20850, diff=1, hw=0 hw_last=0
[  353.749551] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20851, diff=1, hw=0 hw_last=0
[  353.766128] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20852, diff=1, hw=0 hw_last=0
[  353.782708] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20853, diff=1, hw=0 hw_last=0
[  353.799290] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20854, diff=1, hw=0 hw_last=0
[  353.815869] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20855, diff=1, hw=0 hw_last=0
[  353.832446] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20856, diff=1, hw=0 hw_last=0
[  353.849025] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20857, diff=1, hw=0 hw_last=0
[  353.865604] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20858, diff=1, hw=0 hw_last=0
[  353.882183] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20859, diff=1, hw=0 hw_last=0
[  353.898764] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20860, diff=1, hw=0 hw_last=0
[  353.915342] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20861, diff=1, hw=0 hw_last=0
[  353.931921] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20862, diff=1, hw=0 hw_last=0
[  353.948499] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20863, diff=1, hw=0 hw_last=0
[  353.965082] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20864, diff=1, hw=0 hw_last=0
[  353.981659] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20865, diff=1, hw=0 hw_last=0
[  353.998240] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20866, diff=1, hw=0 hw_last=0
[  354.014820] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20867, diff=1, hw=0 hw_last=0
[  354.031399] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20868, diff=1, hw=0 hw_last=0
[  354.047975] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20869, diff=1, hw=0 hw_last=0
[  354.064556] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20870, diff=1, hw=0 hw_last=0
[  354.081137] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20871, diff=1, hw=0 hw_last=0
[  354.097719] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20872, diff=1, hw=0 hw_last=0
[  354.100938] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  354.101053] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 20873 to client
[  354.107333] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  354.107427] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000071ef6b0b
[  354.107500] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  354.107562] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000055579822 state to 0000000071ef6b0b
[  354.107628] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  354.107689] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 0000000071ef6b0b
[  354.107758] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000055579822
[  354.107821] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  354.107881] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  354.107941] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  354.108001] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  354.108066] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  354.108127] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  354.108191] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  354.108252] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  354.108312] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 0000000071ef6b0b
[  354.108375] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  354.108436] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000071ef6b0b
[  354.108506] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  354.108552] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  354.108583] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000071ef6b0b
[  354.109222] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  354.109284] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  354.109345] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000071ef6b0b
[  354.110747] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  354.114302] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20873, diff=1, hw=0 hw_last=0
[  354.130881] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20874, diff=1, hw=0 hw_last=0
[  354.147455] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20875, diff=1, hw=0 hw_last=0
[  354.164036] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20876, diff=1, hw=0 hw_last=0
[  354.180617] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20877, diff=1, hw=0 hw_last=0
[  354.197197] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20878, diff=1, hw=0 hw_last=0
[  354.213776] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20879, diff=1, hw=0 hw_last=0
[  354.230355] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20880, diff=1, hw=0 hw_last=0
[  354.246935] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20881, diff=1, hw=0 hw_last=0
[  354.263515] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20882, diff=1, hw=0 hw_last=0
[  354.280092] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20883, diff=1, hw=0 hw_last=0
[  354.296673] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20884, diff=1, hw=0 hw_last=0
[  354.313250] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20885, diff=1, hw=0 hw_last=0
[  354.329829] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20886, diff=1, hw=0 hw_last=0
[  354.339209] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  354.339319] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000071ef6b0b
[  354.339395] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  354.339459] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000055579822 state to 0000000071ef6b0b
[  354.339526] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  354.339587] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 0000000071ef6b0b
[  354.339657] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 0000000055579822
[  354.339720] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  354.339781] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  354.339841] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  354.339902] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  354.339966] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  354.340028] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  354.340093] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  354.340154] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  354.340214] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 0000000071ef6b0b
[  354.340278] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  354.340341] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000071ef6b0b
[  354.340412] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  354.340455] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  354.340487] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000071ef6b0b
[  354.340554] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000007967e7cb to 0000000071ef6b0b
[  354.340617] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000071ef6b0b
[  354.340696] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000071ef6b0b nonblocking
[  354.340799] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  354.340875] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  354.346404] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20887, diff=1, hw=0 hw_last=0
[  354.346517] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000071ef6b0b
[  354.346592] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  354.346654] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  354.346716] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  354.346778] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  354.346841] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000071ef6b0b
[  354.348754] systemd-journald[214]: Data hash table of /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal has a fill level at 75.1 (2732 of 3640 items, 2097152 file size, 767 bytes per hash table item), suggesting rotation.
[  354.355681] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  354.372978] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000ab379aee
[  354.372982] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20888, diff=1, hw=0 hw_last=0
[  354.373066] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  354.373142] systemd-journald[214]: /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal: Journal header limits reached or header out-of-date, rotating.
[  354.373128] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000087081e28 state to 00000000ab379aee
[  354.393208] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  354.393210] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20889, diff=1, hw=0 hw_last=0
[  354.393289] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000e8543c49 state to 00000000ab379aee
[  354.393360] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 0000000087081e28
[  354.393425] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  354.393487] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  354.393550] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  354.393613] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  354.393678] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  354.393741] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  354.393805] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  354.393877] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  354.393943] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 00000000ab379aee
[  354.394008] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  354.394069] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000ab379aee
[  354.394137] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  354.394402] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  354.394464] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  354.394526] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  354.394592] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 00000000ab379aee
[  354.394655] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ab379aee
[  354.394718] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  354.394782] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  354.394847] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  354.394910] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  354.394975] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ab379aee
[  354.395479] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  354.395571] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000ab379aee
[  354.395637] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  354.395699] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000087081e28 state to 00000000ab379aee
[  354.395764] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  354.395827] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000e8543c49 state to 00000000ab379aee
[  354.395893] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 0000000087081e28
[  354.395957] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  354.396019] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  354.396082] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  354.396143] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  354.396148] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20890, diff=1, hw=0 hw_last=0
[  354.396207] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  354.396271] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  354.396335] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  354.396396] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  354.396457] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 00000000ab379aee
[  354.396522] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  354.396585] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000ab379aee
[  354.396654] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  354.396692] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  354.396722] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000ab379aee
[  354.396791] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000095dd8ec0 to 00000000ab379aee
[  354.396854] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000ab379aee
[  354.396923] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000ab379aee nonblocking
[  354.397024] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  354.397103] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  354.412726] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20891, diff=1, hw=0 hw_last=0
[  354.412838] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000ab379aee
[  354.412906] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  354.412969] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  354.413030] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  354.413092] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  354.413155] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000ab379aee
[  354.429297] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20892, diff=1, hw=0 hw_last=0
[  354.445880] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20893, diff=1, hw=0 hw_last=0
[  354.462458] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20894, diff=1, hw=0 hw_last=0
[  354.479038] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20895, diff=1, hw=0 hw_last=0
[  354.495620] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20896, diff=1, hw=0 hw_last=0
[  354.512198] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20897, diff=1, hw=0 hw_last=0
[  354.528772] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20898, diff=1, hw=0 hw_last=0
[  354.545350] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20899, diff=1, hw=0 hw_last=0
[  354.561928] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20900, diff=1, hw=0 hw_last=0
[  354.578507] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20901, diff=1, hw=0 hw_last=0
[  354.595086] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20902, diff=1, hw=0 hw_last=0
[  354.611665] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20903, diff=1, hw=0 hw_last=0
[  354.628244] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20904, diff=1, hw=0 hw_last=0
[  354.644831] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20905, diff=1, hw=0 hw_last=0
[  354.661410] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20906, diff=1, hw=0 hw_last=0
[  354.677988] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20907, diff=1, hw=0 hw_last=0
[  354.694563] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20908, diff=1, hw=0 hw_last=0
[  354.711147] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20909, diff=1, hw=0 hw_last=0
[  354.727726] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20910, diff=1, hw=0 hw_last=0
[  354.744303] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20911, diff=1, hw=0 hw_last=0
[  354.760881] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20912, diff=1, hw=0 hw_last=0
[  354.777464] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20913, diff=1, hw=0 hw_last=0
[  354.794040] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20914, diff=1, hw=0 hw_last=0
[  354.810623] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20915, diff=1, hw=0 hw_last=0
[  354.827197] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20916, diff=1, hw=0 hw_last=0
[  354.843779] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20917, diff=1, hw=0 hw_last=0
[  354.860357] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20918, diff=1, hw=0 hw_last=0
[  355.251850] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  355.251911] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  355.251972] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  355.252037] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  355.252098] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  355.252165] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  355.252233] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  355.252298] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 000000000ace560b
[  355.252364] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  355.252426] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000000ace560b
[  355.252497] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  355.252541] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  355.252573] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000ace560b
[  355.252641] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000eae20a14 to 000000000ace560b
[  355.252704] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000ace560b
[  355.252771] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  355.252833] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  355.252895] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  355.252966] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000000ace560b
[  355.253030] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000ace560b
[  355.253092] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  355.253153] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  355.253214] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  355.253275] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  355.253337] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000ace560b
[  355.254757] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  355.258263] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20942, diff=1, hw=0 hw_last=0
[  355.274844] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20943, diff=1, hw=0 hw_last=0
[  355.291420] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20944, diff=1, hw=0 hw_last=0
[  355.308002] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20945, diff=1, hw=0 hw_last=0
[  355.324583] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20946, diff=1, hw=0 hw_last=0
[  355.341161] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20947, diff=1, hw=0 hw_last=0
[  355.357740] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20948, diff=1, hw=0 hw_last=0
[  355.374319] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20949, diff=1, hw=0 hw_last=0
[  355.390900] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20950, diff=1, hw=0 hw_last=0
[  355.407478] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20951, diff=1, hw=0 hw_last=0
[  355.424060] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20952, diff=1, hw=0 hw_last=0
[  355.440634] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20953, diff=1, hw=0 hw_last=0
[  355.457213] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20954, diff=1, hw=0 hw_last=0
[  355.473794] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20955, diff=1, hw=0 hw_last=0
[  355.475436] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  355.475538] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000ace560b
[  355.475614] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  355.475676] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000002cafbe1b state to 000000000ace560b
[  355.475743] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  355.475804] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000002eee26c9 state to 000000000ace560b
[  355.475872] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 000000002cafbe1b
[  355.475935] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  355.475996] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  355.476056] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  355.476117] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  355.476181] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  355.476241] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  355.476306] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  355.476366] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  355.476427] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 000000000ace560b
[  355.476490] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  355.476553] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000000ace560b
[  355.476625] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  355.476669] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  355.476702] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000ace560b
[  355.476769] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000d7e48c6b to 000000000ace560b
[  355.476832] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000ace560b
[  355.476909] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000ace560b nonblocking
[  355.477013] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  355.477096] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  355.490372] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20956, diff=1, hw=0 hw_last=0
[  355.490483] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000ace560b
[  355.490570] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  355.490645] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  355.490718] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  355.490792] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  355.490866] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000ace560b
[  355.506947] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20957, diff=1, hw=0 hw_last=0
[  355.523528] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20958, diff=1, hw=0 hw_last=0
[  356.004322] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20987, diff=1, hw=0 hw_last=0
[  356.020900] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20988, diff=1, hw=0 hw_last=0
[  356.037481] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20989, diff=1, hw=0 hw_last=0
[  356.054059] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20990, diff=1, hw=0 hw_last=0
[  356.070638] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20991, diff=1, hw=0 hw_last=0
[  356.087218] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20992, diff=1, hw=0 hw_last=0
[  356.103797] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20993, diff=1, hw=0 hw_last=0
[  356.120378] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20994, diff=1, hw=0 hw_last=0
[  356.136955] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20995, diff=1, hw=0 hw_last=0
[  356.153534] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20996, diff=1, hw=0 hw_last=0
[  356.170126] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20997, diff=1, hw=0 hw_last=0
[  356.186694] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20998, diff=1, hw=0 hw_last=0
[  356.203271] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=20999, diff=1, hw=0 hw_last=0
[  356.219855] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21000, diff=1, hw=0 hw_last=0
[  356.236431] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21001, diff=1, hw=0 hw_last=0
[  356.253008] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21002, diff=1, hw=0 hw_last=0
[  356.269594] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21003, diff=1, hw=0 hw_last=0
[  356.286174] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21004, diff=1, hw=0 hw_last=0
[  356.297167] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  356.297282] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 21005 to client
[  356.302755] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21005, diff=1, hw=0 hw_last=0
[  356.311558] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  356.311650] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000082174610
[  356.311721] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  356.311784] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000215b6887 state to 0000000082174610
[  356.311850] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  356.311911] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 0000000082174610
[  356.311980] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000215b6887
[  356.312045] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  356.312106] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  356.312167] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  356.312228] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  356.312296] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  356.312358] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  356.312425] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  356.312489] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  356.312550] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 0000000082174610
[  356.312614] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  356.312676] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000082174610
[  356.312747] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  356.312791] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  356.312823] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000082174610
[  356.312900] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000001477df7c to 0000000082174610
[  356.312963] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000082174610
[  356.313030] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  356.313092] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  356.313154] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  356.313224] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 0000000082174610
[  356.313289] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000082174610
[  356.313351] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  356.313412] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  356.313473] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  356.313534] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  356.313596] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000082174610
[  356.315036] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  356.319335] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21006, diff=1, hw=0 hw_last=0
[  356.335914] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21007, diff=1, hw=0 hw_last=0
[  356.352493] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21008, diff=1, hw=0 hw_last=0
[  356.369072] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21009, diff=1, hw=0 hw_last=0
[  356.385652] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21010, diff=1, hw=0 hw_last=0
[  356.402232] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21011, diff=1, hw=0 hw_last=0
[  356.418808] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21012, diff=1, hw=0 hw_last=0
[  356.435391] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21013, diff=1, hw=0 hw_last=0
[  356.451970] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21014, diff=1, hw=0 hw_last=0
[  356.468547] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21015, diff=1, hw=0 hw_last=0
[  356.485128] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21016, diff=1, hw=0 hw_last=0
[  356.501704] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21017, diff=1, hw=0 hw_last=0
[  356.518283] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21018, diff=1, hw=0 hw_last=0
[  356.534857] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21019, diff=1, hw=0 hw_last=0
[  356.546752] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (3)
[  356.546812] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  356.546872] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  356.546931] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  356.546996] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  356.547056] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  356.547120] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  356.547180] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  356.547241] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 0000000082174610
[  356.547305] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  356.547367] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000082174610
[  356.547438] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  356.547484] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  356.547516] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000082174610
[  356.547584] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000004593454f to 0000000082174610
[  356.547647] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000082174610
[  356.547724] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000082174610 nonblocking
[  356.547829] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  356.547911] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  356.551439] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21020, diff=1, hw=0 hw_last=0
[  356.551549] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000082174610
[  356.551632] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  356.551706] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  356.551779] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  356.551852] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  356.551926] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000082174610
[  356.568017] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21021, diff=1, hw=0 hw_last=0
[  356.584596] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21022, diff=1, hw=0 hw_last=0
[  356.601173] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21023, diff=1, hw=0 hw_last=0
[  356.617751] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21024, diff=1, hw=0 hw_last=0
[  356.634333] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21025, diff=1, hw=0 hw_last=0
[  356.650912] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21026, diff=1, hw=0 hw_last=0
[  356.667491] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21027, diff=1, hw=0 hw_last=0
[  356.684072] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21028, diff=1, hw=0 hw_last=0
[  356.700651] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21029, diff=1, hw=0 hw_last=0
[  356.717226] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21030, diff=1, hw=0 hw_last=0
[  356.733803] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21031, diff=1, hw=0 hw_last=0
[  356.750383] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21032, diff=1, hw=0 hw_last=0
[  356.766962] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21033, diff=1, hw=0 hw_last=0
[  356.783541] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21034, diff=1, hw=0 hw_last=0
[  356.800120] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21035, diff=1, hw=0 hw_last=0
[  356.816699] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21036, diff=1, hw=0 hw_last=0
[  356.833283] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21037, diff=1, hw=0 hw_last=0
[  356.849863] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21038, diff=1, hw=0 hw_last=0
[  356.866442] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21039, diff=1, hw=0 hw_last=0
[  356.883020] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21040, diff=1, hw=0 hw_last=0
[  356.899599] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21041, diff=1, hw=0 hw_last=0
[  356.916178] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21042, diff=1, hw=0 hw_last=0
[  356.932757] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21043, diff=1, hw=0 hw_last=0
[  356.949336] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21044, diff=1, hw=0 hw_last=0
[  356.965915] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21045, diff=1, hw=0 hw_last=0
[  356.982494] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21046, diff=1, hw=0 hw_last=0
[  356.999072] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21047, diff=1, hw=0 hw_last=0
[  357.015651] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21048, diff=1, hw=0 hw_last=0
[  357.032233] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21049, diff=1, hw=0 hw_last=0
[  357.048813] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21050, diff=1, hw=0 hw_last=0
[  357.065390] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21051, diff=1, hw=0 hw_last=0
[  357.081970] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21052, diff=1, hw=0 hw_last=0
[  357.098549] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21053, diff=1, hw=0 hw_last=0
[  357.115129] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21054, diff=1, hw=0 hw_last=0
[  357.131706] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21055, diff=1, hw=0 hw_last=0
[  357.148288] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21056, diff=1, hw=0 hw_last=0
[  357.164865] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21057, diff=1, hw=0 hw_last=0
[  357.181447] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21058, diff=1, hw=0 hw_last=0
[  357.198025] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21059, diff=1, hw=0 hw_last=0
[  357.380400] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21070, diff=1, hw=0 hw_last=0
[  357.396982] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21071, diff=1, hw=0 hw_last=0
[  357.413561] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21072, diff=1, hw=0 hw_last=0
[  357.430141] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21073, diff=1, hw=0 hw_last=0
[  357.446718] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21074, diff=1, hw=0 hw_last=0
[  357.463298] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21075, diff=1, hw=0 hw_last=0
[  357.479882] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21076, diff=1, hw=0 hw_last=0
[  357.496458] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21077, diff=1, hw=0 hw_last=0
[  357.513038] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21078, diff=1, hw=0 hw_last=0
[  357.529614] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21079, diff=1, hw=0 hw_last=0
[  357.546194] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21080, diff=1, hw=0 hw_last=0
[  357.555161] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  357.555269] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000305e034
[  357.555344] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  357.555408] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000bac3ec2d state to 000000000305e034
[  357.555475] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  357.555536] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000adb7ad91 state to 000000000305e034
[  357.555605] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000bac3ec2d
[  357.555668] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  357.555728] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  357.555787] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  357.555847] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  357.555910] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  357.555970] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  357.556034] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  357.556095] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  357.556155] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000000305e034
[  357.556218] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  357.556281] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000000305e034
[  357.556351] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  357.556395] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  357.556426] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000305e034
[  357.556495] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000001477df7c to 000000000305e034
[  357.556557] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000305e034
[  357.556635] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000000305e034 nonblocking
[  357.556748] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  357.556819] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  357.562770] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21081, diff=1, hw=0 hw_last=0
[  357.562879] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000305e034
[  357.562954] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  357.563016] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  357.563077] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  357.563138] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  357.563200] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000305e034
[  357.579347] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21082, diff=1, hw=0 hw_last=0
[  357.595927] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21083, diff=1, hw=0 hw_last=0
[  357.612507] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21084, diff=1, hw=0 hw_last=0
[  357.629084] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21085, diff=1, hw=0 hw_last=0
[  357.645661] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21086, diff=1, hw=0 hw_last=0
[  357.662244] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21087, diff=1, hw=0 hw_last=0
[  357.678823] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21088, diff=1, hw=0 hw_last=0
[  357.695402] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21089, diff=1, hw=0 hw_last=0
[  357.711982] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21090, diff=1, hw=0 hw_last=0
[  357.728561] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21091, diff=1, hw=0 hw_last=0
[  357.745136] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21092, diff=1, hw=0 hw_last=0
[  357.761714] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21093, diff=1, hw=0 hw_last=0
[  357.778293] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21094, diff=1, hw=0 hw_last=0
[  357.794872] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21095, diff=1, hw=0 hw_last=0
[  357.811451] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21096, diff=1, hw=0 hw_last=0
[  357.828030] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21097, diff=1, hw=0 hw_last=0
[  357.844609] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21098, diff=1, hw=0 hw_last=0
[  357.861188] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21099, diff=1, hw=0 hw_last=0
[  357.877775] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21100, diff=1, hw=0 hw_last=0
[  357.894352] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21101, diff=1, hw=0 hw_last=0
[  357.910931] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21102, diff=1, hw=0 hw_last=0
[  357.927508] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21103, diff=1, hw=0 hw_last=0
[  357.944087] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21104, diff=1, hw=0 hw_last=0
[  357.960665] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21105, diff=1, hw=0 hw_last=0
[  357.977246] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21106, diff=1, hw=0 hw_last=0
[  357.993827] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21107, diff=1, hw=0 hw_last=0
[  358.010405] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21108, diff=1, hw=0 hw_last=0
[  358.026986] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21109, diff=1, hw=0 hw_last=0
[  358.043566] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21110, diff=1, hw=0 hw_last=0
[  358.060141] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21111, diff=1, hw=0 hw_last=0
[  358.076726] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21112, diff=1, hw=0 hw_last=0
[  358.093302] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21113, diff=1, hw=0 hw_last=0
[  358.109884] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21114, diff=1, hw=0 hw_last=0
[  358.126462] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21115, diff=1, hw=0 hw_last=0
[  358.143043] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21116, diff=1, hw=0 hw_last=0
[  358.159618] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21117, diff=1, hw=0 hw_last=0
[  358.176197] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21118, diff=1, hw=0 hw_last=0
[  358.192776] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21119, diff=1, hw=0 hw_last=0
[  358.209355] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21120, diff=1, hw=0 hw_last=0
[  358.225937] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21121, diff=1, hw=0 hw_last=0
[  358.242515] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21122, diff=1, hw=0 hw_last=0
[  358.259094] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21123, diff=1, hw=0 hw_last=0
[  358.275674] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21124, diff=1, hw=0 hw_last=0
[  358.292251] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21125, diff=1, hw=0 hw_last=0
[  358.308832] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21126, diff=1, hw=0 hw_last=0
[  358.325409] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21127, diff=1, hw=0 hw_last=0
[  358.341939] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  358.342000] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21128, diff=1, hw=0 hw_last=0
[  358.342100] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 21129 to client
[  358.351374] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  358.351470] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000029aaf162
[  358.351543] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  358.351605] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000003519e999 state to 0000000029aaf162
[  358.351672] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  358.351733] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000000a2f4549 state to 0000000029aaf162
[  358.351801] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 000000003519e999
[  358.351864] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  358.351925] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  358.351985] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  358.352046] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  358.352110] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  358.352172] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  358.352236] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  358.352296] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  358.352357] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 0000000029aaf162
[  358.352421] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  358.352483] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000029aaf162
[  358.352553] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  358.352599] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  358.352630] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000029aaf162
[  358.352698] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000000ace560b to 0000000029aaf162
[  358.352761] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000029aaf162
[  358.352829] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  358.352891] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  358.352953] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  358.353023] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 0000000029aaf162
[  358.353088] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000029aaf162
[  358.353149] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  358.353211] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  358.353272] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  358.353333] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  358.353394] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000029aaf162
[  358.354818] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  358.358575] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21129, diff=1, hw=0 hw_last=0
[  358.375153] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21130, diff=1, hw=0 hw_last=0
[  358.391730] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21131, diff=1, hw=0 hw_last=0
[  358.408311] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21132, diff=1, hw=0 hw_last=0
[  358.424892] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21133, diff=1, hw=0 hw_last=0
[  358.441471] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21134, diff=1, hw=0 hw_last=0
[  358.458052] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21135, diff=1, hw=0 hw_last=0
[  358.474630] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21136, diff=1, hw=0 hw_last=0
[  358.491224] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21137, diff=1, hw=0 hw_last=0
[  358.583314] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  358.583377] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  358.583437] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  358.583500] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  358.583561] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  358.583621] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 0000000029aaf162
[  358.583684] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  358.583746] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000029aaf162
[  358.583817] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  358.583864] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  358.583895] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000029aaf162
[  358.583962] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000eae20a14 to 0000000029aaf162
[  358.584024] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000029aaf162
[  358.584099] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000029aaf162 nonblocking
[  358.584202] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  358.584286] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  358.590680] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21143, diff=1, hw=0 hw_last=0
[  358.590788] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000029aaf162
[  358.590873] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  358.590946] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  358.591019] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  358.591091] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  358.591164] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000029aaf162
[  358.607257] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21144, diff=1, hw=0 hw_last=0
[  358.623837] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21145, diff=1, hw=0 hw_last=0
[  358.640414] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21146, diff=1, hw=0 hw_last=0
[  358.656996] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21147, diff=1, hw=0 hw_last=0
[  358.673573] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21148, diff=1, hw=0 hw_last=0
[  358.690155] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21149, diff=1, hw=0 hw_last=0
[  358.706731] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21150, diff=1, hw=0 hw_last=0
[  358.723312] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21151, diff=1, hw=0 hw_last=0
[  358.739892] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21152, diff=1, hw=0 hw_last=0
[  358.756470] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21153, diff=1, hw=0 hw_last=0
[  358.773046] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21154, diff=1, hw=0 hw_last=0
[  358.789624] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21155, diff=1, hw=0 hw_last=0
[  358.806203] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21156, diff=1, hw=0 hw_last=0
[  358.822783] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21157, diff=1, hw=0 hw_last=0
[  358.839362] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21158, diff=1, hw=0 hw_last=0
[  358.855941] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21159, diff=1, hw=0 hw_last=0
[  358.872520] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21160, diff=1, hw=0 hw_last=0
[  358.889106] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21161, diff=1, hw=0 hw_last=0
[  358.905681] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21162, diff=1, hw=0 hw_last=0
[  358.922262] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21163, diff=1, hw=0 hw_last=0
[  358.938841] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21164, diff=1, hw=0 hw_last=0
[  358.955420] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21165, diff=1, hw=0 hw_last=0
[  358.971998] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21166, diff=1, hw=0 hw_last=0
[  358.988577] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21167, diff=1, hw=0 hw_last=0
[  359.005157] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21168, diff=1, hw=0 hw_last=0
[  359.021736] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21169, diff=1, hw=0 hw_last=0
[  359.038315] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21170, diff=1, hw=0 hw_last=0
[  359.054895] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21171, diff=1, hw=0 hw_last=0
[  359.071472] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21172, diff=1, hw=0 hw_last=0
[  359.088052] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21173, diff=1, hw=0 hw_last=0
[  359.104635] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21174, diff=1, hw=0 hw_last=0
[  359.121213] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21175, diff=1, hw=0 hw_last=0
[  359.137792] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21176, diff=1, hw=0 hw_last=0
[  359.154370] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21177, diff=1, hw=0 hw_last=0
[  359.170952] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21178, diff=1, hw=0 hw_last=0
[  359.187528] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21179, diff=1, hw=0 hw_last=0
[  359.204106] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21180, diff=1, hw=0 hw_last=0
[  359.220685] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21181, diff=1, hw=0 hw_last=0
[  359.237265] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21182, diff=1, hw=0 hw_last=0
[  359.253845] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21183, diff=1, hw=0 hw_last=0
[  359.270427] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21184, diff=1, hw=0 hw_last=0
[  359.386483] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21191, diff=1, hw=0 hw_last=0
[  359.403063] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21192, diff=1, hw=0 hw_last=0
[  359.419641] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21193, diff=1, hw=0 hw_last=0
[  359.436225] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21194, diff=1, hw=0 hw_last=0
[  359.452802] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21195, diff=1, hw=0 hw_last=0
[  359.469382] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21196, diff=1, hw=0 hw_last=0
[  359.485961] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21197, diff=1, hw=0 hw_last=0
[  359.502539] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21198, diff=1, hw=0 hw_last=0
[  359.519121] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21199, diff=1, hw=0 hw_last=0
[  359.535700] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21200, diff=1, hw=0 hw_last=0
[  359.552290] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21201, diff=1, hw=0 hw_last=0
[  359.568855] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21202, diff=1, hw=0 hw_last=0
[  359.585434] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21203, diff=1, hw=0 hw_last=0
[  359.593012] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  359.593123] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000018d86a98
[  359.593199] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  359.593261] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000fefb5c61 state to 0000000018d86a98
[  359.593327] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  359.593388] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000002eee26c9 state to 0000000018d86a98
[  359.593456] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000fefb5c61
[  359.593519] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  359.593579] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  359.593639] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  359.593699] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  359.593763] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  359.593859] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  359.593932] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  359.593996] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  359.594059] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 0000000018d86a98
[  359.594123] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  359.594186] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000018d86a98
[  359.594258] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  359.594305] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  359.594337] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000018d86a98
[  359.594407] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000071ef6b0b to 0000000018d86a98
[  359.594470] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000018d86a98
[  359.594548] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000018d86a98 nonblocking
[  359.594648] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  359.594731] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  359.602010] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21204, diff=1, hw=0 hw_last=0
[  359.602119] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000018d86a98
[  359.602203] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  359.602276] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  359.602349] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  359.602421] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  359.602494] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000018d86a98
[  359.618588] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21205, diff=1, hw=0 hw_last=0
[  359.635168] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21206, diff=1, hw=0 hw_last=0
[  359.651760] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21207, diff=1, hw=0 hw_last=0
[  359.668337] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21208, diff=1, hw=0 hw_last=0
[  359.684908] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21209, diff=1, hw=0 hw_last=0
[  359.701485] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21210, diff=1, hw=0 hw_last=0
[  359.718066] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21211, diff=1, hw=0 hw_last=0
[  359.734642] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21212, diff=1, hw=0 hw_last=0
[  359.751222] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21213, diff=1, hw=0 hw_last=0
[  359.767806] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21214, diff=1, hw=0 hw_last=0
[  359.784383] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21215, diff=1, hw=0 hw_last=0
[  359.800957] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21216, diff=1, hw=0 hw_last=0
[  359.802141] systemd-journald[214]: Data hash table of /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal has a fill level at 75.1 (2732 of 3640 items, 2097152 file size, 767 bytes per hash table item), suggesting rotation.
[  359.828278] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21217, diff=1, hw=0 hw_last=0
[  359.828421] systemd-journald[214]: /run/log/journal/c9388924ea834ccdb6784f6625da44b3/system.journal: Journal header limits reached or header out-of-date, rotating.
[  359.848495] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21218, diff=1, hw=0 hw_last=0
[  359.850696] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21219, diff=1, hw=0 hw_last=0
[  359.867274] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21220, diff=1, hw=0 hw_last=0
[  359.883851] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21221, diff=1, hw=0 hw_last=0
[  359.900432] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21222, diff=1, hw=0 hw_last=0
[  359.917012] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21223, diff=1, hw=0 hw_last=0
[  359.933593] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21224, diff=1, hw=0 hw_last=0
[  359.950171] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21225, diff=1, hw=0 hw_last=0
[  359.966752] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21226, diff=1, hw=0 hw_last=0
[  359.983332] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21227, diff=1, hw=0 hw_last=0
[  359.999911] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21228, diff=1, hw=0 hw_last=0
[  360.016488] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21229, diff=1, hw=0 hw_last=0
[  360.033067] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21230, diff=1, hw=0 hw_last=0
[  360.049645] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21231, diff=1, hw=0 hw_last=0
[  360.066227] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21232, diff=1, hw=0 hw_last=0
[  360.082805] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21233, diff=1, hw=0 hw_last=0
[  360.099383] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21234, diff=1, hw=0 hw_last=0
[  360.115963] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21235, diff=1, hw=0 hw_last=0
[  360.132545] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21236, diff=1, hw=0 hw_last=0
[  360.149120] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21237, diff=1, hw=0 hw_last=0
[  360.165703] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21238, diff=1, hw=0 hw_last=0
[  360.182281] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21239, diff=1, hw=0 hw_last=0
[  360.198860] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21240, diff=1, hw=0 hw_last=0
[  360.215440] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21241, diff=1, hw=0 hw_last=0
[  360.232020] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21242, diff=1, hw=0 hw_last=0
[  360.248599] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21243, diff=1, hw=0 hw_last=0
[  360.265177] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21244, diff=1, hw=0 hw_last=0
[  360.281757] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21245, diff=1, hw=0 hw_last=0
[  360.298332] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21246, diff=1, hw=0 hw_last=0
[  360.314914] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21247, diff=1, hw=0 hw_last=0
[  360.331492] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21248, diff=1, hw=0 hw_last=0
[  360.348076] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21249, diff=1, hw=0 hw_last=0
[  360.364651] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21250, diff=1, hw=0 hw_last=0
[  360.381002] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  360.381119] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 21251 to client
[  360.381239] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21251, diff=1, hw=0 hw_last=0
[  360.390396] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  360.390490] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000009472d261
[  360.390562] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  360.390625] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000055579822 state to 000000009472d261
[  360.390691] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  360.390752] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000e8543c49 state to 000000009472d261
[  360.390818] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000055579822
[  360.390881] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  360.390941] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  360.391001] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  360.391061] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  360.391125] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  360.391185] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  360.391250] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  360.391310] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  360.391370] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 000000009472d261
[  360.391433] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  360.391493] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000009472d261
[  360.391563] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  360.391609] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  360.391640] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000009472d261
[  360.391708] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000018d86a98 to 000000009472d261
[  360.391771] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000009472d261
[  360.391837] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  360.391899] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  360.391961] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  360.392031] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000009472d261
[  360.392094] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000009472d261
[  360.392155] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  360.392215] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  360.392276] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  360.392336] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  360.392397] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009472d261
[  360.393748] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  360.397832] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21252, diff=1, hw=0 hw_last=0
[  360.414394] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21253, diff=1, hw=0 hw_last=0
[  360.430972] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21254, diff=1, hw=0 hw_last=0
[  360.447552] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21255, diff=1, hw=0 hw_last=0
[  360.630109] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  360.630183] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  360.630257] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  360.630329] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  360.630402] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000009472d261
[  360.646500] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21267, diff=1, hw=0 hw_last=0
[  360.663079] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21268, diff=1, hw=0 hw_last=0
[  360.679657] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21269, diff=1, hw=0 hw_last=0
[  360.696235] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21270, diff=1, hw=0 hw_last=0
[  360.712818] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21271, diff=1, hw=0 hw_last=0
[  360.729395] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21272, diff=1, hw=0 hw_last=0
[  360.745974] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21273, diff=1, hw=0 hw_last=0
[  360.762555] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21274, diff=1, hw=0 hw_last=0
[  360.779135] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21275, diff=1, hw=0 hw_last=0
[  360.795710] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21276, diff=1, hw=0 hw_last=0
[  360.812287] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21277, diff=1, hw=0 hw_last=0
[  360.828865] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21278, diff=1, hw=0 hw_last=0
[  360.845445] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21279, diff=1, hw=0 hw_last=0
[  360.862024] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21280, diff=1, hw=0 hw_last=0
[  360.878603] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21281, diff=1, hw=0 hw_last=0
[  360.895182] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21282, diff=1, hw=0 hw_last=0
[  360.911761] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21283, diff=1, hw=0 hw_last=0
[  360.928347] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21284, diff=1, hw=0 hw_last=0
[  360.944921] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21285, diff=1, hw=0 hw_last=0
[  360.961502] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21286, diff=1, hw=0 hw_last=0
[  360.978086] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21287, diff=1, hw=0 hw_last=0
[  360.994662] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21288, diff=1, hw=0 hw_last=0
[  361.011240] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21289, diff=1, hw=0 hw_last=0
[  361.027818] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21290, diff=1, hw=0 hw_last=0
[  361.044399] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21291, diff=1, hw=0 hw_last=0
[  361.060980] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21292, diff=1, hw=0 hw_last=0
[  361.077558] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21293, diff=1, hw=0 hw_last=0
[  361.094136] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21294, diff=1, hw=0 hw_last=0
[  361.110712] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21295, diff=1, hw=0 hw_last=0
[  361.127296] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21296, diff=1, hw=0 hw_last=0
[  361.143871] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21297, diff=1, hw=0 hw_last=0
[  361.160454] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21298, diff=1, hw=0 hw_last=0
[  361.177032] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21299, diff=1, hw=0 hw_last=0
[  361.193613] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21300, diff=1, hw=0 hw_last=0
[  361.210193] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21301, diff=1, hw=0 hw_last=0
[  361.226770] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21302, diff=1, hw=0 hw_last=0
[  361.243351] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21303, diff=1, hw=0 hw_last=0
[  361.259929] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21304, diff=1, hw=0 hw_last=0
[  361.276508] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21305, diff=1, hw=0 hw_last=0
[  361.293084] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21306, diff=1, hw=0 hw_last=0
[  361.309665] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21307, diff=1, hw=0 hw_last=0
[  361.326244] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21308, diff=1, hw=0 hw_last=0
[  361.342826] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21309, diff=1, hw=0 hw_last=0
[  361.359405] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21310, diff=1, hw=0 hw_last=0
[  361.371670] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  361.371783] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 21311 to client
[  361.375989] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21311, diff=1, hw=0 hw_last=0
[  361.385052] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  361.385140] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006fb5b2d2
[  361.385212] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  361.385274] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000087081e28 state to 000000006fb5b2d2
[  361.385340] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  361.385401] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 000000006fb5b2d2
[  361.385469] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 0000000087081e28
[  361.385531] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  361.385591] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  361.385652] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  361.385711] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  361.385775] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  361.385855] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  361.385923] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  361.385986] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  361.607672] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  361.607733] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 000000006fb5b2d2
[  361.607802] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000087081e28
[  361.607866] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  361.607926] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  361.607986] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  361.608046] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  361.608110] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  361.608097] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21325, diff=1, hw=0 hw_last=0
[  361.608171] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  361.608238] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  361.608298] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  361.608358] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 000000006fb5b2d2
[  361.608422] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  361.608484] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000006fb5b2d2
[  361.608554] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  361.608599] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  361.608630] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006fb5b2d2
[  361.608699] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000000ace560b to 000000006fb5b2d2
[  361.608761] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006fb5b2d2
[  361.608837] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 000000006fb5b2d2 nonblocking
[  361.608943] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  361.609022] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  361.624673] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21326, diff=1, hw=0 hw_last=0
[  361.624784] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006fb5b2d2
[  361.624851] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  361.624915] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  361.624976] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  361.625038] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  361.625101] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006fb5b2d2
[  361.641250] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21327, diff=1, hw=0 hw_last=0
[  361.657831] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21328, diff=1, hw=0 hw_last=0
[  361.674408] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21329, diff=1, hw=0 hw_last=0
[  361.690987] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21330, diff=1, hw=0 hw_last=0
[  361.707568] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21331, diff=1, hw=0 hw_last=0
[  361.724148] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21332, diff=1, hw=0 hw_last=0
[  361.740725] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21333, diff=1, hw=0 hw_last=0
[  361.757306] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21334, diff=1, hw=0 hw_last=0
[  361.773887] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21335, diff=1, hw=0 hw_last=0
[  361.790468] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21336, diff=1, hw=0 hw_last=0
[  361.807041] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21337, diff=1, hw=0 hw_last=0
[  361.823618] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21338, diff=1, hw=0 hw_last=0
[  361.840198] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21339, diff=1, hw=0 hw_last=0
[  361.856777] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21340, diff=1, hw=0 hw_last=0
[  361.873356] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21341, diff=1, hw=0 hw_last=0
[  361.889935] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21342, diff=1, hw=0 hw_last=0
[  361.906518] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21343, diff=1, hw=0 hw_last=0
[  361.923093] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21344, diff=1, hw=0 hw_last=0
[  361.939679] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21345, diff=1, hw=0 hw_last=0
[  361.956254] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21346, diff=1, hw=0 hw_last=0
[  361.972836] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21347, diff=1, hw=0 hw_last=0
[  361.989412] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21348, diff=1, hw=0 hw_last=0
[  362.005996] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21349, diff=1, hw=0 hw_last=0
[  362.022576] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21350, diff=1, hw=0 hw_last=0
[  362.039154] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21351, diff=1, hw=0 hw_last=0
[  362.055732] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21352, diff=1, hw=0 hw_last=0
[  362.072309] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21353, diff=1, hw=0 hw_last=0
[  362.088886] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21354, diff=1, hw=0 hw_last=0
[  362.105467] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21355, diff=1, hw=0 hw_last=0
[  362.122047] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21356, diff=1, hw=0 hw_last=0
[  362.138624] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21357, diff=1, hw=0 hw_last=0
[  362.155206] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21358, diff=1, hw=0 hw_last=0
[  362.171782] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21359, diff=1, hw=0 hw_last=0
[  362.188363] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21360, diff=1, hw=0 hw_last=0
[  362.204942] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21361, diff=1, hw=0 hw_last=0
[  362.221522] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21362, diff=1, hw=0 hw_last=0
[  362.238103] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21363, diff=1, hw=0 hw_last=0
[  362.254683] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21364, diff=1, hw=0 hw_last=0
[  362.271262] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21365, diff=1, hw=0 hw_last=0
[  362.287840] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21366, diff=1, hw=0 hw_last=0
[  362.304419] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21367, diff=1, hw=0 hw_last=0
[  362.321000] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21368, diff=1, hw=0 hw_last=0
[  362.337577] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21369, diff=1, hw=0 hw_last=0
[  362.354157] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21370, diff=1, hw=0 hw_last=0
[  362.370735] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21371, diff=1, hw=0 hw_last=0
[  362.387320] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21372, diff=1, hw=0 hw_last=0
[  362.403892] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21373, diff=1, hw=0 hw_last=0
[  362.420471] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21374, diff=1, hw=0 hw_last=0
[  362.437052] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21375, diff=1, hw=0 hw_last=0
[  362.453633] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21376, diff=1, hw=0 hw_last=0
[  362.470210] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21377, diff=1, hw=0 hw_last=0
[  362.486796] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21378, diff=1, hw=0 hw_last=0
[  362.494419] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  362.494531] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 21379 to client
[  362.495816] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  362.495911] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000cc24793
[  362.495987] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  362.496049] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000ec98bd42 state to 000000000cc24793
[  362.496115] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  362.496175] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 000000000cc24793
[  362.496243] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000ec98bd42
[  362.496306] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  362.496366] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  362.496427] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  362.496491] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  362.496556] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  362.496616] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  362.496679] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  362.496739] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  362.496799] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 000000000cc24793
[  362.496862] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  362.496922] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000000cc24793
[  362.496993] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  362.497039] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  362.497070] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000cc24793
[  362.497136] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000000305e034 to 000000000cc24793
[  362.497198] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000000cc24793
[  362.497266] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  362.497326] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  362.497388] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  362.497456] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000000cc24793
[  362.497519] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000cc24793
[  362.497581] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  362.497642] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  362.497702] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  362.497762] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  362.497853] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000cc24793
[  362.499224] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  362.503376] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21379, diff=1, hw=0 hw_last=0
[  362.519956] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21380, diff=1, hw=0 hw_last=0
[  362.536534] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21381, diff=1, hw=0 hw_last=0
[  362.553110] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21382, diff=1, hw=0 hw_last=0
[  362.569689] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21383, diff=1, hw=0 hw_last=0
[  362.586273] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21384, diff=1, hw=0 hw_last=0
[  362.602853] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21385, diff=1, hw=0 hw_last=0
[  362.619428] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21386, diff=1, hw=0 hw_last=0
[  362.636009] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21387, diff=1, hw=0 hw_last=0
[  362.652594] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21388, diff=1, hw=0 hw_last=0
[  362.669168] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21389, diff=1, hw=0 hw_last=0
[  362.685748] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21390, diff=1, hw=0 hw_last=0
[  362.702325] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21391, diff=1, hw=0 hw_last=0
[  362.718626] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  362.718738] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000000cc24793
[  362.718814] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  362.718876] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000ec98bd42 state to 000000000cc24793
[  362.718904] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21392, diff=1, hw=0 hw_last=0
[  362.735602] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000000cc24793
[  362.735680] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  362.735743] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  362.735803] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  362.735865] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  362.735927] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000000cc24793
[  362.752059] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21394, diff=1, hw=0 hw_last=0
[  362.768636] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21395, diff=1, hw=0 hw_last=0
[  362.785215] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21396, diff=1, hw=0 hw_last=0
[  362.801793] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21397, diff=1, hw=0 hw_last=0
[  362.818374] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21398, diff=1, hw=0 hw_last=0
[  362.834952] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21399, diff=1, hw=0 hw_last=0
[  362.851533] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21400, diff=1, hw=0 hw_last=0
[  362.868111] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21401, diff=1, hw=0 hw_last=0
[  362.884691] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21402, diff=1, hw=0 hw_last=0
[  362.901273] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21403, diff=1, hw=0 hw_last=0
[  362.917851] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21404, diff=1, hw=0 hw_last=0
[  362.934425] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21405, diff=1, hw=0 hw_last=0
[  362.951004] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21406, diff=1, hw=0 hw_last=0
[  362.967585] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21407, diff=1, hw=0 hw_last=0
[  362.984163] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21408, diff=1, hw=0 hw_last=0
[  363.000742] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21409, diff=1, hw=0 hw_last=0
[  363.017320] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21410, diff=1, hw=0 hw_last=0
[  363.033903] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21411, diff=1, hw=0 hw_last=0
[  363.050482] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21412, diff=1, hw=0 hw_last=0
[  363.067066] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21413, diff=1, hw=0 hw_last=0
[  363.083640] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21414, diff=1, hw=0 hw_last=0
[  363.100223] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21415, diff=1, hw=0 hw_last=0
[  363.116799] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21416, diff=1, hw=0 hw_last=0
[  363.133380] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21417, diff=1, hw=0 hw_last=0
[  363.149961] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21418, diff=1, hw=0 hw_last=0
[  363.166537] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21419, diff=1, hw=0 hw_last=0
[  363.183125] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21420, diff=1, hw=0 hw_last=0
[  363.199694] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21421, diff=1, hw=0 hw_last=0
[  363.216272] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21422, diff=1, hw=0 hw_last=0
[  363.232854] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21423, diff=1, hw=0 hw_last=0
[  363.249432] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21424, diff=1, hw=0 hw_last=0
[  363.266010] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21425, diff=1, hw=0 hw_last=0
[  363.282591] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21426, diff=1, hw=0 hw_last=0
[  363.299170] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21427, diff=1, hw=0 hw_last=0
[  363.315747] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21428, diff=1, hw=0 hw_last=0
[  363.332327] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21429, diff=1, hw=0 hw_last=0
[  363.348907] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21430, diff=1, hw=0 hw_last=0
[  363.365487] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21431, diff=1, hw=0 hw_last=0
[  363.382069] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21432, diff=1, hw=0 hw_last=0
[  363.398645] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21433, diff=1, hw=0 hw_last=0
[  363.415226] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21434, diff=1, hw=0 hw_last=0
[  363.431802] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21435, diff=1, hw=0 hw_last=0
[  363.448384] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21436, diff=1, hw=0 hw_last=0
[  363.464962] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21437, diff=1, hw=0 hw_last=0
[  363.481543] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21438, diff=1, hw=0 hw_last=0
[  363.498121] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21439, diff=1, hw=0 hw_last=0
[  363.514698] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21440, diff=1, hw=0 hw_last=0
[  363.531277] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21441, diff=1, hw=0 hw_last=0
[  363.547856] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21442, diff=1, hw=0 hw_last=0
[  363.564437] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21443, diff=1, hw=0 hw_last=0
[  363.581016] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21444, diff=1, hw=0 hw_last=0
[  363.597597] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21445, diff=1, hw=0 hw_last=0
[  363.611492] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  363.611606] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 21446 to client
[  363.614181] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21446, diff=1, hw=0 hw_last=0
[  363.680497] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21450, diff=1, hw=0 hw_last=0
[  363.697076] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21451, diff=1, hw=0 hw_last=0
[  363.713658] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21452, diff=1, hw=0 hw_last=0
[  363.730237] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21453, diff=1, hw=0 hw_last=0
[  363.746816] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21454, diff=1, hw=0 hw_last=0
[  363.763397] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21455, diff=1, hw=0 hw_last=0
[  363.779983] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21456, diff=1, hw=0 hw_last=0
[  363.796554] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21457, diff=1, hw=0 hw_last=0
[  363.813134] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21458, diff=1, hw=0 hw_last=0
[  363.829711] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21459, diff=1, hw=0 hw_last=0
[  363.846289] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21460, diff=1, hw=0 hw_last=0
[  363.854587] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  363.854695] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000fde3661d
[  363.854773] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  363.854836] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000215b6887 state to 00000000fde3661d
[  363.854902] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  363.854963] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 00000000fde3661d
[  363.855032] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000215b6887
[  363.855095] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  363.855156] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  363.855217] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  363.855277] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  363.855341] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  363.855401] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  363.855467] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  363.855527] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  363.855588] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 00000000fde3661d
[  363.855651] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  363.855713] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000fde3661d
[  363.855786] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  363.855830] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  363.855862] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000fde3661d
[  363.855931] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000000305e034 to 00000000fde3661d
[  363.855993] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000fde3661d
[  363.856070] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000fde3661d nonblocking
[  363.856169] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  363.856252] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  363.862868] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21461, diff=1, hw=0 hw_last=0
[  363.862984] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000fde3661d
[  363.863071] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  363.863144] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  363.863217] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  363.863290] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  363.863363] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000fde3661d
[  363.879443] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21462, diff=1, hw=0 hw_last=0
[  363.896021] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21463, diff=1, hw=0 hw_last=0
[  363.912600] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21464, diff=1, hw=0 hw_last=0
[  363.929178] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21465, diff=1, hw=0 hw_last=0
[  363.945757] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21466, diff=1, hw=0 hw_last=0
[  363.962340] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21467, diff=1, hw=0 hw_last=0
[  363.978918] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21468, diff=1, hw=0 hw_last=0
[  363.995499] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21469, diff=1, hw=0 hw_last=0
[  364.012079] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21470, diff=1, hw=0 hw_last=0
[  364.028660] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21471, diff=1, hw=0 hw_last=0
[  364.045234] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21472, diff=1, hw=0 hw_last=0
[  364.061809] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21473, diff=1, hw=0 hw_last=0
[  364.078390] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21474, diff=1, hw=0 hw_last=0
[  364.094968] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21475, diff=1, hw=0 hw_last=0
[  364.111547] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21476, diff=1, hw=0 hw_last=0
[  364.128127] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21477, diff=1, hw=0 hw_last=0
[  364.144706] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21478, diff=1, hw=0 hw_last=0
[  364.161290] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21479, diff=1, hw=0 hw_last=0
[  364.177870] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21480, diff=1, hw=0 hw_last=0
[  364.194446] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21481, diff=1, hw=0 hw_last=0
[  364.211028] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21482, diff=1, hw=0 hw_last=0
[  364.227606] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21483, diff=1, hw=0 hw_last=0
[  364.244184] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21484, diff=1, hw=0 hw_last=0
[  364.260762] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21485, diff=1, hw=0 hw_last=0
[  364.277342] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21486, diff=1, hw=0 hw_last=0
[  364.293924] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21487, diff=1, hw=0 hw_last=0
[  364.310504] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21488, diff=1, hw=0 hw_last=0
[  364.327079] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21489, diff=1, hw=0 hw_last=0
[  364.343659] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21490, diff=1, hw=0 hw_last=0
[  364.360239] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21491, diff=1, hw=0 hw_last=0
[  364.376819] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21492, diff=1, hw=0 hw_last=0
[  364.393396] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21493, diff=1, hw=0 hw_last=0
[  364.409974] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21494, diff=1, hw=0 hw_last=0
[  364.426558] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21495, diff=1, hw=0 hw_last=0
[  364.443132] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21496, diff=1, hw=0 hw_last=0
[  364.459713] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21497, diff=1, hw=0 hw_last=0
[  364.476292] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21498, diff=1, hw=0 hw_last=0
[  364.492871] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21499, diff=1, hw=0 hw_last=0
[  364.509456] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21500, diff=1, hw=0 hw_last=0
[  364.526032] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21501, diff=1, hw=0 hw_last=0
[  364.542610] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21502, diff=1, hw=0 hw_last=0
[  364.559189] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21503, diff=1, hw=0 hw_last=0
[  364.575771] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21504, diff=1, hw=0 hw_last=0
[  364.592350] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21505, diff=1, hw=0 hw_last=0
[  364.608927] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21506, diff=1, hw=0 hw_last=0
[  364.625507] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21507, diff=1, hw=0 hw_last=0
[  364.642085] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21508, diff=1, hw=0 hw_last=0
[  364.658666] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21509, diff=1, hw=0 hw_last=0
[  364.675243] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21510, diff=1, hw=0 hw_last=0
[  364.691823] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21511, diff=1, hw=0 hw_last=0
[  364.708405] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21512, diff=1, hw=0 hw_last=0
[  364.724988] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21513, diff=1, hw=0 hw_last=0
[  364.728619] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  364.728735] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 21514 to client
[  364.734018] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  364.734113] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 000000006c5644bb
[  364.734184] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  364.734245] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000bac3ec2d state to 000000006c5644bb
[  364.734311] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  364.734372] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a743c9a8 state to 000000006c5644bb
[  364.734440] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000bac3ec2d
[  364.734503] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  364.734563] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  364.734623] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  364.734683] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  364.734747] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  364.734808] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  364.734872] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  364.734932] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  364.734992] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 0000000040b0d341 state to 000000006c5644bb
[  364.735055] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  364.735116] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 000000006c5644bb
[  364.735184] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  364.735227] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  364.735259] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006c5644bb
[  364.735326] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000006fb5b2d2 to 000000006c5644bb
[  364.735388] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 000000006c5644bb
[  364.735454] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  364.735516] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  364.735577] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  364.735647] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 000000006c5644bb
[  364.735711] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 000000006c5644bb
[  364.735772] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  364.735833] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  364.735893] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  364.735953] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  364.736014] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 000000006c5644bb
[  364.737339] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  364.741570] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21514, diff=1, hw=0 hw_last=0
[  364.758147] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21515, diff=1, hw=0 hw_last=0
[  364.774723] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21516, diff=1, hw=0 hw_last=0
[  364.791303] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21517, diff=1, hw=0 hw_last=0
[  365.006827] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21530, diff=1, hw=0 hw_last=0
[  365.023406] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21531, diff=1, hw=0 hw_last=0
[  365.039984] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21532, diff=1, hw=0 hw_last=0
[  365.056564] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21533, diff=1, hw=0 hw_last=0
[  365.073147] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21534, diff=1, hw=0 hw_last=0
[  365.089724] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21535, diff=1, hw=0 hw_last=0
[  365.106305] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21536, diff=1, hw=0 hw_last=0
[  365.122884] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21537, diff=1, hw=0 hw_last=0
[  365.139466] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21538, diff=1, hw=0 hw_last=0
[  365.156043] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21539, diff=1, hw=0 hw_last=0
[  365.172617] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21540, diff=1, hw=0 hw_last=0
[  365.189197] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21541, diff=1, hw=0 hw_last=0
[  365.205779] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21542, diff=1, hw=0 hw_last=0
[  365.222356] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21543, diff=1, hw=0 hw_last=0
[  365.238933] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21544, diff=1, hw=0 hw_last=0
[  365.255512] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21545, diff=1, hw=0 hw_last=0
[  365.272092] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21546, diff=1, hw=0 hw_last=0
[  365.288677] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21547, diff=1, hw=0 hw_last=0
[  365.305253] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21548, diff=1, hw=0 hw_last=0
[  365.321832] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21549, diff=1, hw=0 hw_last=0
[  365.338412] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21550, diff=1, hw=0 hw_last=0
[  365.354992] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21551, diff=1, hw=0 hw_last=0
[  365.371568] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21552, diff=1, hw=0 hw_last=0
[  365.388149] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21553, diff=1, hw=0 hw_last=0
[  365.404731] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21554, diff=1, hw=0 hw_last=0
[  365.421308] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21555, diff=1, hw=0 hw_last=0
[  365.437889] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21556, diff=1, hw=0 hw_last=0
[  365.454466] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21557, diff=1, hw=0 hw_last=0
[  365.471043] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21558, diff=1, hw=0 hw_last=0
[  365.487627] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21559, diff=1, hw=0 hw_last=0
[  365.504204] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21560, diff=1, hw=0 hw_last=0
[  365.520780] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21561, diff=1, hw=0 hw_last=0
[  365.537363] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21562, diff=1, hw=0 hw_last=0
[  365.553942] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21563, diff=1, hw=0 hw_last=0
[  365.570520] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21564, diff=1, hw=0 hw_last=0
[  365.587098] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21565, diff=1, hw=0 hw_last=0
[  365.603676] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21566, diff=1, hw=0 hw_last=0
[  365.620259] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21567, diff=1, hw=0 hw_last=0
[  365.636838] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21568, diff=1, hw=0 hw_last=0
[  365.653415] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21569, diff=1, hw=0 hw_last=0
[  365.669996] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21570, diff=1, hw=0 hw_last=0
[  365.686578] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21571, diff=1, hw=0 hw_last=0
[  365.703157] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21572, diff=1, hw=0 hw_last=0
[  365.719735] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21573, diff=1, hw=0 hw_last=0
[  365.736313] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21574, diff=1, hw=0 hw_last=0
[  365.752890] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21575, diff=1, hw=0 hw_last=0
[  365.769473] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21576, diff=1, hw=0 hw_last=0
[  365.786049] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21577, diff=1, hw=0 hw_last=0
[  365.802630] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21578, diff=1, hw=0 hw_last=0
[  365.819210] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21579, diff=1, hw=0 hw_last=0
[  365.835795] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21580, diff=1, hw=0 hw_last=0
[  365.841418] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  365.841531] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 21581 to client
[  365.844800] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  365.844899] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000c0cf118d
[  365.844970] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  365.845032] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000082b4fa6a state to 00000000c0cf118d
[  365.845099] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  365.845160] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 00000000c0cf118d
[  365.845230] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 0000000082b4fa6a
[  365.845292] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  366.034746] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21592, diff=1, hw=0 hw_last=0
[  366.051323] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21593, diff=1, hw=0 hw_last=0
[  366.067903] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21594, diff=1, hw=0 hw_last=0
[  366.075837] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  366.075944] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000c0cf118d
[  366.076020] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  366.076081] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000082b4fa6a state to 00000000c0cf118d
[  366.076148] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  366.076209] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 000000007c00ddba state to 00000000c0cf118d
[  366.076277] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000082b4fa6a
[  366.076340] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  366.076400] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  366.076459] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  366.076519] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  366.076582] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  366.076641] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  366.076705] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  366.076765] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  366.076825] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000161e8f51 state to 00000000c0cf118d
[  366.076891] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  366.076953] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000c0cf118d
[  366.077024] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  366.077070] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  366.077102] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000c0cf118d
[  366.077169] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 0000000018d86a98 to 00000000c0cf118d
[  366.077231] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000c0cf118d
[  366.077309] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000c0cf118d nonblocking
[  366.077421] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  366.077500] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  366.084478] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21595, diff=1, hw=0 hw_last=0
[  366.084589] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000c0cf118d
[  366.084656] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  366.084719] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  366.084780] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  366.084843] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (2)
[  366.084905] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000c0cf118d
[  366.101056] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21596, diff=1, hw=0 hw_last=0
[  366.117634] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21597, diff=1, hw=0 hw_last=0
[  366.134215] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21598, diff=1, hw=0 hw_last=0
[  366.150793] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21599, diff=1, hw=0 hw_last=0
[  366.167372] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21600, diff=1, hw=0 hw_last=0
[  366.183953] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21601, diff=1, hw=0 hw_last=0
[  366.200531] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21602, diff=1, hw=0 hw_last=0
[  366.217110] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21603, diff=1, hw=0 hw_last=0
[  366.233690] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21604, diff=1, hw=0 hw_last=0
[  366.250271] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21605, diff=1, hw=0 hw_last=0
[  366.266846] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21606, diff=1, hw=0 hw_last=0
[  366.283422] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21607, diff=1, hw=0 hw_last=0
[  366.300002] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21608, diff=1, hw=0 hw_last=0
[  366.316580] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21609, diff=1, hw=0 hw_last=0
[  366.333159] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21610, diff=1, hw=0 hw_last=0
[  366.349738] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21611, diff=1, hw=0 hw_last=0
[  366.366319] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21612, diff=1, hw=0 hw_last=0
[  366.382897] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21613, diff=1, hw=0 hw_last=0
[  366.399480] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21614, diff=1, hw=0 hw_last=0
[  366.416063] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21615, diff=1, hw=0 hw_last=0
[  366.432640] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21616, diff=1, hw=0 hw_last=0
[  366.449221] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21617, diff=1, hw=0 hw_last=0
[  366.465797] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21618, diff=1, hw=0 hw_last=0
[  366.482375] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21619, diff=1, hw=0 hw_last=0
[  366.498955] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21620, diff=1, hw=0 hw_last=0
[  366.515534] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21621, diff=1, hw=0 hw_last=0
[  366.532112] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21622, diff=1, hw=0 hw_last=0
[  366.548692] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21623, diff=1, hw=0 hw_last=0
[  366.565271] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21624, diff=1, hw=0 hw_last=0
[  366.581850] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21625, diff=1, hw=0 hw_last=0
[  366.598428] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21626, diff=1, hw=0 hw_last=0
[  366.615011] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21627, diff=1, hw=0 hw_last=0
[  366.631588] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21628, diff=1, hw=0 hw_last=0
[  366.648170] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21629, diff=1, hw=0 hw_last=0
[  366.664749] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21630, diff=1, hw=0 hw_last=0
[  366.681326] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21631, diff=1, hw=0 hw_last=0
[  366.697908] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21632, diff=1, hw=0 hw_last=0
[  366.714483] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21633, diff=1, hw=0 hw_last=0
[  366.731065] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21634, diff=1, hw=0 hw_last=0
[  366.747642] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21635, diff=1, hw=0 hw_last=0
[  366.764222] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21636, diff=1, hw=0 hw_last=0
[  366.780803] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21637, diff=1, hw=0 hw_last=0
[  366.797382] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21638, diff=1, hw=0 hw_last=0
[  366.813958] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21639, diff=1, hw=0 hw_last=0
[  366.830543] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21640, diff=1, hw=0 hw_last=0
[  366.847122] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21641, diff=1, hw=0 hw_last=0
[  366.863701] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21642, diff=1, hw=0 hw_last=0
[  366.880278] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21643, diff=1, hw=0 hw_last=0
[  366.896855] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21644, diff=1, hw=0 hw_last=0
[  366.913438] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21645, diff=1, hw=0 hw_last=0
[  366.928790] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  366.928900] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 21646 to client
[  366.930021] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21646, diff=1, hw=0 hw_last=0
[  366.939170] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  366.939263] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000e0dcab9c
[  366.939334] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  366.939395] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 00000000fefb5c61 state to 00000000e0dcab9c
[  366.939460] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  366.939521] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000ed79f4fd state to 00000000e0dcab9c
[  366.939588] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 00000000fefb5c61
[  366.939650] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  366.939710] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  366.939769] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  366.939828] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  366.939892] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  366.939952] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  366.940015] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  366.940075] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  366.940135] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 000000004b0e648a state to 00000000e0dcab9c
[  366.940197] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  366.940259] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000e0dcab9c
[  366.940328] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  366.940371] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  366.940403] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000e0dcab9c
[  366.940471] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 00000000c0cf118d to 00000000e0dcab9c
[  366.940536] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000e0dcab9c
[  366.940603] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  366.940664] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  366.940727] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  366.940798] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 00000000e0dcab9c
[  366.940862] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e0dcab9c
[  366.940924] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  366.940985] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  366.941046] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  366.941107] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  366.941168] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e0dcab9c
[  366.942580] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  366.946600] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21647, diff=1, hw=0 hw_last=0
[  366.963181] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21648, diff=1, hw=0 hw_last=0
[  366.979758] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21649, diff=1, hw=0 hw_last=0
[  366.996335] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21650, diff=1, hw=0 hw_last=0
[  367.012918] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21651, diff=1, hw=0 hw_last=0
[  367.029498] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21652, diff=1, hw=0 hw_last=0
[  367.046075] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21653, diff=1, hw=0 hw_last=0
[  367.062657] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21654, diff=1, hw=0 hw_last=0
[  367.079242] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21655, diff=1, hw=0 hw_last=0
[  367.095817] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21656, diff=1, hw=0 hw_last=0
[  367.112392] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21657, diff=1, hw=0 hw_last=0
[  367.128973] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21658, diff=1, hw=0 hw_last=0
[  367.145551] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21659, diff=1, hw=0 hw_last=0
[  367.171090] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  367.171153] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000e0dcab9c
[  367.171224] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  367.171267] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  367.171298] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000e0dcab9c
[  367.171366] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000009472d261 to 00000000e0dcab9c
[  367.171429] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000e0dcab9c
[  367.171506] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 00000000e0dcab9c nonblocking
[  367.171601] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  367.171682] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  367.178706] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21661, diff=1, hw=0 hw_last=0
[  367.178817] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000e0dcab9c
[  367.178902] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  367.178975] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  367.179049] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  367.179122] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  367.179196] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000e0dcab9c
[  367.195283] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21662, diff=1, hw=0 hw_last=0
[  367.211861] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21663, diff=1, hw=0 hw_last=0
[  367.228439] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21664, diff=1, hw=0 hw_last=0
[  367.245021] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21665, diff=1, hw=0 hw_last=0
[  367.261598] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21666, diff=1, hw=0 hw_last=0
[  367.278180] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21667, diff=1, hw=0 hw_last=0
[  367.294758] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21668, diff=1, hw=0 hw_last=0
[  367.311339] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21669, diff=1, hw=0 hw_last=0
[  367.327918] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21670, diff=1, hw=0 hw_last=0
[  367.344495] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21671, diff=1, hw=0 hw_last=0
[  367.361070] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21672, diff=1, hw=0 hw_last=0
[  367.377649] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21673, diff=1, hw=0 hw_last=0
[  367.394229] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21674, diff=1, hw=0 hw_last=0
[  367.410808] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21675, diff=1, hw=0 hw_last=0
[  367.427387] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21676, diff=1, hw=0 hw_last=0
[  367.443967] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21677, diff=1, hw=0 hw_last=0
[  367.460545] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21678, diff=1, hw=0 hw_last=0
[  367.477130] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21679, diff=1, hw=0 hw_last=0
[  367.493709] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21680, diff=1, hw=0 hw_last=0
[  367.510288] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21681, diff=1, hw=0 hw_last=0
[  367.526868] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21682, diff=1, hw=0 hw_last=0
[  367.543445] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21683, diff=1, hw=0 hw_last=0
[  367.560023] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21684, diff=1, hw=0 hw_last=0
[  367.576603] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21685, diff=1, hw=0 hw_last=0
[  367.593183] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21686, diff=1, hw=0 hw_last=0
[  367.609761] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21687, diff=1, hw=0 hw_last=0
[  367.626340] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21688, diff=1, hw=0 hw_last=0
[  367.642920] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21689, diff=1, hw=0 hw_last=0
[  367.659497] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21690, diff=1, hw=0 hw_last=0
[  367.676077] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21691, diff=1, hw=0 hw_last=0
[  367.692658] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21692, diff=1, hw=0 hw_last=0
[  367.709237] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21693, diff=1, hw=0 hw_last=0
[  367.725819] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21694, diff=1, hw=0 hw_last=0
[  367.742397] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21695, diff=1, hw=0 hw_last=0
[  367.758975] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21696, diff=1, hw=0 hw_last=0
[  367.775553] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21697, diff=1, hw=0 hw_last=0
[  367.792132] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21698, diff=1, hw=0 hw_last=0
[  367.808710] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21699, diff=1, hw=0 hw_last=0
[  367.825290] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21700, diff=1, hw=0 hw_last=0
[  367.841872] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21701, diff=1, hw=0 hw_last=0
[  367.858451] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21702, diff=1, hw=0 hw_last=0
[  367.875029] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21703, diff=1, hw=0 hw_last=0
[  367.891611] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21704, diff=1, hw=0 hw_last=0
[  367.908190] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21705, diff=1, hw=0 hw_last=0
[  367.924769] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21706, diff=1, hw=0 hw_last=0
[  367.941349] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21707, diff=1, hw=0 hw_last=0
[  367.957941] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21708, diff=1, hw=0 hw_last=0
[  367.974506] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21709, diff=1, hw=0 hw_last=0
[  367.991098] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21710, diff=1, hw=0 hw_last=0
[  367.991142] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  367.991237] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 21711 to client
[  368.000505] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  368.000601] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f37c832b
[  368.000672] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  368.000734] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000055579822 state to 00000000f37c832b
[  368.000801] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  368.000861] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 00000000f37c832b
[  368.000929] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:69] for [PLANE:41:plane-1] state 0000000055579822
[  368.000993] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (5)
[  368.001053] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (6)
[  368.001113] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (5)
[  368.001174] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  368.001239] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  368.001299] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  368.001363] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  368.001424] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  368.001484] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 00000000f37c832b
[  368.001548] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  368.001609] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000f37c832b
[  368.001681] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  368.001726] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  368.001776] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000f37c832b
[  368.001849] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000006c5644bb to 00000000f37c832b
[  368.001912] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000f37c832b
[  368.001982] [drm:drm_atomic_normalize_zpos [drm]] [CRTC:48:crtc-1] calculating normalized zpos values
[  368.002043] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] processing zpos value 0
[  368.002105] [drm:drm_atomic_normalize_zpos [drm]] [PLANE:41:plane-1] normalized zpos value 0
[  368.002177] tidss 4a00000.dss: [drm:drm_atomic_add_affected_planes [drm]] Adding all current planes for [CRTC:48:crtc-1] to 00000000f37c832b
[  368.002242] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 00000000f37c832b
[  368.002306] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  368.002367] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  368.002427] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  368.002488] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  368.002549] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 00000000f37c832b
[  368.003914] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_MAP_DUMB
[  368.007674] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21711, diff=1, hw=0 hw_last=0
[  368.024248] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21712, diff=1, hw=0 hw_last=0
[  368.040827] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21713, diff=1, hw=0 hw_last=0
[  368.057407] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21714, diff=1, hw=0 hw_last=0
[  368.073986] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21715, diff=1, hw=0 hw_last=0
[  368.090564] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21716, diff=1, hw=0 hw_last=0
[  368.107147] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21717, diff=1, hw=0 hw_last=0
[  368.123724] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21718, diff=1, hw=0 hw_last=0
[  368.140305] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21719, diff=1, hw=0 hw_last=0
[  368.156887] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21720, diff=1, hw=0 hw_last=0
[  368.173463] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21721, diff=1, hw=0 hw_last=0
[  368.190044] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21722, diff=1, hw=0 hw_last=0
[  368.206618] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21723, diff=1, hw=0 hw_last=0
[  368.223199] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21724, diff=1, hw=0 hw_last=0
[  368.224263] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  368.224363] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 00000000f37c832b
[  368.224440] [drm:drm_mode_object_get [drm]] OBJ ID: 69 (2)
[  368.224506] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 0000000055579822 state to 00000000f37c832b
[  368.224575] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  368.224636] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000a0f08777 state to 00000000f37c832b
[  368.224706] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 0000000055579822
[  368.224770] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (3)
[  368.224834] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  368.224894] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  368.224954] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (3)
[  368.225018] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  368.225079] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  368.225143] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  368.225204] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  368.225265] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000fb7462e4 state to 00000000f37c832b
[  368.225327] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  368.225390] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 00000000f37c832b
[  368.225462] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  368.225509] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  368.225540] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 00000000f37c832b
[  368.306088] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21729, diff=1, hw=0 hw_last=0
[  368.322666] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21730, diff=1, hw=0 hw_last=0
[  368.339250] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21731, diff=1, hw=0 hw_last=0
[  368.355827] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21732, diff=1, hw=0 hw_last=0
[  368.372406] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21733, diff=1, hw=0 hw_last=0
[  368.388989] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21734, diff=1, hw=0 hw_last=0
[  368.405564] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21735, diff=1, hw=0 hw_last=0
[  368.422140] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21736, diff=1, hw=0 hw_last=0
[  368.438719] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21737, diff=1, hw=0 hw_last=0
[  368.455297] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21738, diff=1, hw=0 hw_last=0
[  368.471877] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21739, diff=1, hw=0 hw_last=0
[  368.488456] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21740, diff=1, hw=0 hw_last=0
[  368.505035] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21741, diff=1, hw=0 hw_last=0
[  368.521614] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21742, diff=1, hw=0 hw_last=0
[  368.538194] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21743, diff=1, hw=0 hw_last=0
[  368.554778] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21744, diff=1, hw=0 hw_last=0
[  368.571357] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21745, diff=1, hw=0 hw_last=0
[  368.587935] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21746, diff=1, hw=0 hw_last=0
[  368.604513] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21747, diff=1, hw=0 hw_last=0
[  368.621097] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21748, diff=1, hw=0 hw_last=0
[  368.637671] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21749, diff=1, hw=0 hw_last=0
[  368.654252] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21750, diff=1, hw=0 hw_last=0
[  368.670829] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21751, diff=1, hw=0 hw_last=0
[  368.687409] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21752, diff=1, hw=0 hw_last=0
[  368.703988] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21753, diff=1, hw=0 hw_last=0
[  368.720568] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21754, diff=1, hw=0 hw_last=0
[  368.737148] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21755, diff=1, hw=0 hw_last=0
[  368.753726] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21756, diff=1, hw=0 hw_last=0
[  368.770310] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21757, diff=1, hw=0 hw_last=0
[  368.786885] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21758, diff=1, hw=0 hw_last=0
[  368.803464] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21759, diff=1, hw=0 hw_last=0
[  368.820044] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21760, diff=1, hw=0 hw_last=0
[  368.836623] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21761, diff=1, hw=0 hw_last=0
[  368.853200] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21762, diff=1, hw=0 hw_last=0
[  368.869783] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21763, diff=1, hw=0 hw_last=0
[  368.886362] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21764, diff=1, hw=0 hw_last=0
[  368.902939] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21765, diff=1, hw=0 hw_last=0
[  368.919518] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21766, diff=1, hw=0 hw_last=0
[  368.936098] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21767, diff=1, hw=0 hw_last=0
[  368.952679] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21768, diff=1, hw=0 hw_last=0
[  368.969257] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21769, diff=1, hw=0 hw_last=0
[  368.985839] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21770, diff=1, hw=0 hw_last=0
[  369.002416] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21771, diff=1, hw=0 hw_last=0
[  369.018993] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21772, diff=1, hw=0 hw_last=0
[  369.035575] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21773, diff=1, hw=0 hw_last=0
[  369.052156] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21774, diff=1, hw=0 hw_last=0
[  369.062626] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_WAIT_VBLANK
[  369.062739] tidss 4a00000.dss: [drm:drm_wait_vblank_ioctl [drm]] crtc 1 returning 21775 to client
[  369.068738] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21775, diff=1, hw=0 hw_last=0
[  369.078015] [drm:drm_ioctl [drm]] comm="weston" pid=695, dev=0xe200, auth=1, DRM_IOCTL_MODE_ATOMIC
[  369.078106] tidss 4a00000.dss: [drm:drm_atomic_state_init [drm]] Allocated atomic state 0000000095dd8ec0
[  369.078180] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (2)
[  369.078246] tidss 4a00000.dss: [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:41:plane-1] 000000002cafbe1b state to 0000000095dd8ec0
[  369.078314] [drm:drm_mode_object_get [drm]] OBJ ID: 68 (2)
[  369.078376] tidss 4a00000.dss: [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:48:crtc-1] 00000000e8543c49 state to 0000000095dd8ec0
[  369.078446] tidss 4a00000.dss: [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:66] for [PLANE:41:plane-1] state 000000002cafbe1b
[  369.078508] [drm:drm_mode_object_get [drm]] OBJ ID: 66 (5)
[  369.078570] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (6)
[  369.078630] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (5)
[  369.078699] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (4)
[  369.078768] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  369.078832] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  369.078897] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  369.078957] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  369.301957] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (4)
[  369.302017] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 69 (3)
[  369.302082] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (5)
[  369.302143] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (4)
[  369.302209] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (4)
[  369.302273] [drm:drm_mode_object_get [drm]] OBJ ID: 50 (5)
[  369.302334] tidss 4a00000.dss: [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:50:HDMI-A-1] 00000000128754f7 state to 0000000095dd8ec0
[  369.302398] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (6)
[  369.302460] tidss 4a00000.dss: [drm:drm_atomic_check_only [drm]] checking 0000000095dd8ec0
[  369.302532] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:50:HDMI-A-1]
[  369.302581] tidss 4a00000.dss: [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] keeps [ENCODER:49:None-49], now on [CRTC:48:crtc-1]
[  369.302613] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000095dd8ec0
[  369.302682] tidss 4a00000.dss: [drm:drm_atomic_get_private_obj_state [drm]] Added new private object 00000000f0fabaf3 state 000000000cc24793 to 0000000095dd8ec0
[  369.302745] tidss 4a00000.dss: [drm:drm_atomic_add_encoder_bridges [drm]] Adding all bridges for [encoder:49:None-49] to 0000000095dd8ec0
[  369.302822] tidss 4a00000.dss: [drm:drm_atomic_nonblocking_commit [drm]] committing 0000000095dd8ec0 nonblocking
[  369.302927] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: hwmode: htotal 1056, vtotal 628, vdisplay 600
[  369.303005] tidss 4a00000.dss: [drm:drm_calc_timestamping_constants [drm]] crtc 48: clock 40000 kHz framedur 16579200 linedur 26400
[  369.317421] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21790, diff=1, hw=0 hw_last=0
[  369.317533] tidss 4a00000.dss: [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state 0000000095dd8ec0
[  369.317601] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (5)
[  369.317663] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 50 (4)
[  369.317736] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 68 (3)
[  369.317801] [drm:drm_mode_object_put.part.0 [drm]] OBJ ID: 66 (2)
[  369.317866] tidss 4a00000.dss: [drm:__drm_atomic_state_free [drm]] Freeing atomic state 0000000095dd8ec0
[  369.334001] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21791, diff=1, hw=0 hw_last=0
[  369.350579] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21792, diff=1, hw=0 hw_last=0
[  369.367157] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21793, diff=1, hw=0 hw_last=0
[  369.383736] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21794, diff=1, hw=0 hw_last=0
[  369.400316] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21795, diff=1, hw=0 hw_last=0
[  369.416896] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21796, diff=1, hw=0 hw_last=0
[  369.433475] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21797, diff=1, hw=0 hw_last=0
[  369.450056] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21798, diff=1, hw=0 hw_last=0
[  369.466635] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21799, diff=1, hw=0 hw_last=0
[  369.483212] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21800, diff=1, hw=0 hw_last=0
[  369.499788] tidss 4a00000.dss: [drm:drm_update_vblank_count [drm]] updating vblank count on crtc 1: current=21801, diff=1, hw=0 hw_last=0
[  369.516366] tidss 4a00000.dss: [drm:drm_up