/dts-v1/;

/ {
	#address-cells = <0x02>;
	model = "Texas Instruments J784S4 EVM";
	#size-cells = <0x02>;
	interrupt-parent = <0x01>;
	compatible = "ti,j784s4-evm\0ti,j784s4";

	can-phy0 {
		pinctrl-names = "default";
		standby-gpios = <0x0e 0x45 0x00>;
		pinctrl-0 = <0x9b>;
		#phy-cells = <0x00>;
		compatible = "ti,tcan1042";
		phandle = <0x11>;
		max-bitrate = <0x4c4b40>;
	};

	mux-controller {
		#mux-state-cells = <0x01>;
		idle-state = <0x01>;
		mux-gpios = <0x96 0x0e 0x00>;
		compatible = "gpio-mux";
		status = "disabled";
		phandle = <0x9d>;
	};

	l2-cache0 {
		cache-size = <0x200000>;
		cache-level = <0x02>;
		cache-sets = <0x400>;
		cache-unified;
		compatible = "cache";
		cache-line-size = <0x40>;
		next-level-cache = <0x02>;
		phandle = <0x93>;
	};

	l3-cache0 {
		cache-level = <0x03>;
		cache-unified;
		compatible = "cache";
		phandle = <0x02>;
	};

	regulator-vsys-io-1v8 {
		regulator-max-microvolt = <0x1b7740>;
		regulator-boot-on;
		regulator-always-on;
		regulator-min-microvolt = <0x1b7740>;
		regulator-name = "vsys_io_1v8";
		compatible = "regulator-fixed";
		phandle = <0x37>;
	};

	clock-edp1-refclk {
		#clock-cells = <0x00>;
		clock-frequency = <0x124f800>;
		compatible = "fixed-clock";
		phandle = <0x35>;
	};

	thermal-zones {
		phandle = <0x1ac>;

		main0-thermal {
			polling-delay = <0x1f4>;
			polling-delay-passive = <0xfa>;
			thermal-sensors = <0x8a 0x02>;
			phandle = <0x1b1>;

			trips {

				main0-crit {
					temperature = <0x1e848>;
					hysteresis = <0x7d0>;
					type = "critical";
					phandle = <0x1b2>;
				};
			};
		};

		main2-thermal {
			polling-delay = <0x1f4>;
			polling-delay-passive = <0xfa>;
			thermal-sensors = <0x8a 0x04>;
			phandle = <0x1b5>;

			trips {

				main2-crit {
					temperature = <0x1e848>;
					hysteresis = <0x7d0>;
					type = "critical";
					phandle = <0x1b6>;
				};
			};
		};

		wkup1-thermal {
			polling-delay = <0x1f4>;
			polling-delay-passive = <0xfa>;
			thermal-sensors = <0x8a 0x01>;
			phandle = <0x1af>;

			trips {

				wkup1-crit {
					temperature = <0x1e848>;
					hysteresis = <0x7d0>;
					type = "critical";
					phandle = <0x1b0>;
				};
			};
		};

		main4-thermal {
			polling-delay = <0x1f4>;
			polling-delay-passive = <0xfa>;
			thermal-sensors = <0x8a 0x06>;
			phandle = <0x1b9>;

			trips {

				main4-crit {
					temperature = <0x1e848>;
					hysteresis = <0x7d0>;
					type = "critical";
					phandle = <0x1ba>;
				};
			};
		};

		main1-thermal {
			polling-delay = <0x1f4>;
			polling-delay-passive = <0xfa>;
			thermal-sensors = <0x8a 0x03>;
			phandle = <0x1b3>;

			trips {

				main1-crit {
					temperature = <0x1e848>;
					hysteresis = <0x7d0>;
					type = "critical";
					phandle = <0x1b4>;
				};
			};
		};

		wkup0-thermal {
			polling-delay = <0x1f4>;
			polling-delay-passive = <0xfa>;
			thermal-sensors = <0x8a 0x00>;
			phandle = <0x1ad>;

			trips {

				wkup0-crit {
					temperature = <0x1e848>;
					hysteresis = <0x7d0>;
					type = "critical";
					phandle = <0x1ae>;
				};
			};
		};

		main3-thermal {
			polling-delay = <0x1f4>;
			polling-delay-passive = <0xfa>;
			thermal-sensors = <0x8a 0x05>;
			phandle = <0x1b7>;

			trips {

				main3-crit {
					temperature = <0x1e848>;
					hysteresis = <0x7d0>;
					type = "critical";
					phandle = <0x1b8>;
				};
			};
		};
	};

	connector-dp1 {
		label = "DP1";
		type = "full-size";
		compatible = "dp-connector";
		dp-pwr-supply = <0xa0>;
		phandle = <0x1c1>;

		port {

			endpoint {
				remote-endpoint = <0xa1>;
				phandle = <0x3a>;
			};
		};
	};

	regulator-dp0-prw {
		regulator-max-microvolt = <0x325aa0>;
		gpio = <0x36 0x00 0x00>;
		enable-active-high;
		regulator-min-microvolt = <0x325aa0>;
		regulator-name = "dp0-pwr";
		compatible = "regulator-fixed";
		phandle = <0x99>;
	};

	can-phy3 {
		standby-gpios = <0x96 0x07 0x00>;
		#phy-cells = <0x00>;
		compatible = "ti,tcan1042";
		status = "disabled";
		phandle = <0x57>;
		mux-states = <0x9d 0x01>;
		max-bitrate = <0x4c4b40>;
	};

	regulator-vsys-io-1v2 {
		regulator-max-microvolt = <0x124f80>;
		regulator-boot-on;
		regulator-always-on;
		regulator-min-microvolt = <0x124f80>;
		regulator-name = "vsys_io_1v2";
		compatible = "regulator-fixed";
		phandle = <0x38>;
	};

	memory@80000000 {
		bootph-all;
		device_type = "memory";
		reg = <0x00 0x80000000 0x00 0x80000000 0x08 0x80000000 0x07 0x80000000>;
	};

	timer-cl0-cpu0 {
		interrupts = <0x01 0x0d 0x08 0x01 0x0e 0x08 0x01 0x0b 0x08 0x01 0x0a 0x08>;
		compatible = "arm,armv8-timer";
		phandle = <0xa3>;
	};

	bus@100000 {
		#address-cells = <0x02>;
		bootph-all;
		#size-cells = <0x02>;
		compatible = "simple-bus";
		ranges = <0x00 0x100000 0x00 0x100000 0x00 0x20000 0x00 0x600000 0x00 0x600000 0x00 0x31100 0x00 0x700000 0x00 0x700000 0x00 0x1000 0x00 0xa40000 0x00 0xa40000 0x00 0x800 0x00 0x1000000 0x00 0x1000000 0x00 0xd000000 0x00 0x4210000 0x00 0x4210000 0x00 0x10000 0x00 0x4220000 0x00 0x4220000 0x00 0x10000 0x00 0xd000000 0x00 0xd000000 0x00 0x800000 0x00 0xd800000 0x00 0xd800000 0x00 0x800000 0x00 0xe000000 0x00 0xe000000 0x00 0x800000 0x00 0xe800000 0x00 0xe800000 0x00 0x800000 0x00 0x10000000 0x00 0x10000000 0x00 0x8000000 0x00 0x18000000 0x00 0x18000000 0x00 0x8000000 0x00 0x64800000 0x00 0x64800000 0x00 0x70c000 0x00 0x65800000 0x00 0x65800000 0x00 0x70c000 0x00 0x66800000 0x00 0x66800000 0x00 0x70c000 0x00 0x67800000 0x00 0x67800000 0x00 0x70c000 0x00 0x6f000000 0x00 0x6f000000 0x00 0x310000 0x00 0x70000000 0x00 0x70000000 0x00 0x400000 0x00 0x30000000 0x00 0x30000000 0x00 0xc400000 0x40 0x00 0x40 0x00 0x01 0x00 0x41 0x00 0x41 0x00 0x01 0x00 0x42 0x00 0x42 0x00 0x01 0x00 0x43 0x00 0x43 0x00 0x01 0x00 0x44 0x00 0x44 0x00 0x00 0x8000000 0x44 0x10000000 0x44 0x10000000 0x00 0x8000000 0x4e 0x20000000 0x4e 0x20000000 0x00 0x80000 0x00 0x28380000 0x00 0x28380000 0x00 0x3880000 0x00 0x40200000 0x00 0x40200000 0x00 0x998400 0x00 0x40f00000 0x00 0x40f00000 0x00 0x20000 0x00 0x41000000 0x00 0x41000000 0x00 0x20000 0x00 0x41400000 0x00 0x41400000 0x00 0x20000 0x00 0x41c00000 0x00 0x41c00000 0x00 0x100000 0x00 0x42040000 0x00 0x42040000 0x00 0x3ac2400 0x00 0x45100000 0x00 0x45100000 0x00 0xc24000 0x00 0x46000000 0x00 0x46000000 0x00 0x200000 0x00 0x47000000 0x00 0x47000000 0x00 0x68400 0x00 0x50000000 0x00 0x50000000 0x00 0x10000000 0x04 0x00 0x04 0x00 0x04 0x00>;
		phandle = <0xa5>;

		mcasp@2b20000 {
			power-domains = <0x07 0x10b 0x01>;
			clock-names = "fck";
			reg-names = "mpu\0dat";
			assigned-clocks = <0x06 0x10b 0x00>;
			assigned-clock-parents = <0x06 0x10b 0x01>;
			interrupts = <0x00 0x224 0x04 0x00 0x225 0x04>;
			clocks = <0x06 0x10b 0x00>;
			dma-names = "tx\0rx";
			compatible = "ti,am33xx-mcasp-audio";
			status = "disabled";
			interrupt-names = "tx\0rx";
			reg = <0x00 0x2b20000 0x00 0x2000 0x00 0x2b28000 0x00 0x1000>;
			phandle = <0x1a0>;
			dmas = <0x24 0xc402 0x24 0x4402>;
		};

		watchdog@2260000 {
			power-domains = <0x07 0x162 0x01>;
			assigned-clocks = <0x06 0x162 0x00>;
			assigned-clock-parents = <0x06 0x162 0x04>;
			clocks = <0x06 0x162 0x00>;
			compatible = "ti,j7-rti-wdt";
			reg = <0x00 0x2260000 0x00 0x100>;
			phandle = <0x1aa>;
		};

		timer@2410000 {
			power-domains = <0x07 0x62 0x01>;
			clock-names = "fck";
			assigned-clocks = <0x06 0x62 0x02>;
			assigned-clock-parents = <0x06 0x62 0x03>;
			interrupts = <0x00 0xe1 0x04>;
			clocks = <0x06 0x62 0x02>;
			compatible = "ti,am654-timer";
			status = "reserved";
			ti,timer-pwm;
			reg = <0x00 0x2410000 0x00 0x400>;
			phandle = <0xf7>;
		};

		watchdog@2540000 {
			power-domains = <0x07 0x16d 0x01>;
			assigned-clocks = <0x06 0x16d 0x00>;
			assigned-clock-parents = <0x06 0x16e 0x04>;
			clocks = <0x06 0x16d 0x00>;
			compatible = "ti,j7-rti-wdt";
			status = "reserved";
			reg = <0x00 0x2540000 0x00 0x100>;
			phandle = <0x196>;
		};

		dsp@65800000 {
			ti,sci = <0x05>;
			reg-names = "l2sram\0l1dram";
			firmware-name = "j784s4-c71_1-fw";
			resets = <0x1c 0x21 0x01>;
			memory-region = <0x1d8 0x1d9>;
			compatible = "ti,j721s2-c71-dsp";
			status = "okay";
			reg = <0x00 0x65800000 0x00 0x80000 0x00 0x65e00000 0x00 0xc000>;
			ti,sci-dev-id = <0x21>;
			phandle = <0x186>;
			mboxes = <0x6f 0x73>;
			ti,sci-proc-ids = <0x31 0xff>;
		};

		phy@45a0000 {
			power-domains = <0x07 0xd6 0x01>;
			#phy-cells = <0x00>;
			compatible = "cdns,dphy-rx";
			status = "disabled";
			reg = <0x00 0x45a0000 0x00 0x1100>;
			phandle = <0x3f>;
		};

		watchdog@23e0000 {
			power-domains = <0x07 0x16b 0x01>;
			assigned-clocks = <0x06 0x16b 0x00>;
			assigned-clock-parents = <0x06 0x16b 0x04>;
			clocks = <0x06 0x16b 0x00>;
			compatible = "ti,j7-rti-wdt";
			status = "reserved";
			reg = <0x00 0x23e0000 0x00 0x100>;
			phandle = <0x194>;
		};

		timer@2450000 {
			power-domains = <0x07 0x66 0x01>;
			clock-names = "fck";
			assigned-clocks = <0x06 0x66 0x02>;
			assigned-clock-parents = <0x06 0x66 0x03>;
			interrupts = <0x00 0xe5 0x04>;
			clocks = <0x06 0x66 0x02>;
			compatible = "ti,am654-timer";
			status = "reserved";
			ti,timer-pwm;
			reg = <0x00 0x2450000 0x00 0x400>;
			phandle = <0xfb>;
		};

		gpio@620000 {
			power-domains = <0x07 0xa5 0x01>;
			ti,davinci-gpio-unbanked = <0x00>;
			clock-names = "gpio";
			gpio-controller;
			interrupts = <0xa3 0xa4 0xa5 0xa6 0xa7>;
			clocks = <0x06 0xa5 0x00>;
			interrupt-parent = <0x2c>;
			ti,ngpio = <0x42>;
			compatible = "ti,j721e-gpio\0ti,keystone-gpio";
			#interrupt-cells = <0x02>;
			status = "disabled";
			reg = <0x00 0x620000 0x00 0x100>;
			phandle = <0x115>;
			#gpio-cells = <0x02>;
			interrupt-controller;
		};

		i2c@2020000 {
			power-domains = <0x07 0x110 0x01>;
			#address-cells = <0x01>;
			clock-names = "fck";
			interrupts = <0x00 0xca 0x04>;
			clocks = <0x06 0x110 0x02>;
			#size-cells = <0x00>;
			compatible = "ti,j721e-i2c\0ti,omap4-i2c";
			status = "disabled";
			reg = <0x00 0x2020000 0x00 0x100>;
			phandle = <0x11b>;
		};

		can@2681000 {
			power-domains = <0x07 0x103 0x01>;
			clock-names = "hclk\0cclk";
			reg-names = "m_can\0message_ram";
			interrupts = <0x00 0x252 0x04 0x00 0x253 0x04>;
			clocks = <0x06 0x103 0x06 0x06 0x103 0x01>;
			compatible = "bosch,m_can";
			status = "disabled";
			interrupt-names = "int0\0int1";
			reg = <0x00 0x2681000 0x00 0x200 0x00 0x2688000 0x00 0x8000>;
			phandle = <0x16f>;
			bosch,mram-cfg = <0x00 0x80 0x40 0x40 0x40 0x40 0x20 0x20>;
		};

		can@27c1000 {
			power-domains = <0x07 0x101 0x01>;
			clock-names = "hclk\0cclk";
			reg-names = "m_can\0message_ram";
			interrupts = <0x00 0x24c 0x04 0x00 0x24d 0x04>;
			clocks = <0x06 0x101 0x06 0x06 0x101 0x01>;
			compatible = "bosch,m_can";
			status = "disabled";
			interrupt-names = "int0\0int1";
			reg = <0x00 0x27c1000 0x00 0x200 0x00 0x27c8000 0x00 0x8000>;
			phandle = <0x16d>;
			bosch,mram-cfg = <0x00 0x80 0x40 0x40 0x40 0x40 0x20 0x20>;
		};

		watchdog@2330000 {
			power-domains = <0x07 0x167 0x01>;
			assigned-clocks = <0x06 0x167 0x00>;
			assigned-clock-parents = <0x06 0x167 0x04>;
			clocks = <0x06 0x167 0x00>;
			compatible = "ti,j7-rti-wdt";
			status = "reserved";
			reg = <0x00 0x2330000 0x00 0x100>;
			phandle = <0x191>;
		};

		timer@2490000 {
			power-domains = <0x07 0x6a 0x01>;
			clock-names = "fck";
			assigned-clocks = <0x06 0x6a 0x02>;
			assigned-clock-parents = <0x06 0x6a 0x03>;
			interrupts = <0x00 0xe9 0x04>;
			clocks = <0x06 0x6a 0x02>;
			compatible = "ti,am654-timer";
			status = "reserved";
			ti,timer-pwm;
			reg = <0x00 0x2490000 0x00 0x400>;
			phandle = <0xff>;
		};

		i2c@2060000 {
			power-domains = <0x07 0x114 0x01>;
			#address-cells = <0x01>;
			clock-names = "fck";
			interrupts = <0x00 0xce 0x04>;
			clocks = <0x06 0x114 0x02>;
			#size-cells = <0x00>;
			compatible = "ti,j721e-i2c\0ti,omap4-i2c";
			status = "disabled";
			reg = <0x00 0x2060000 0x00 0x100>;
			phandle = <0x122>;
		};

		can@2711000 {
			power-domains = <0x07 0xf6 0x01>;
			clock-names = "hclk\0cclk";
			reg-names = "m_can\0message_ram";
			interrupts = <0x00 0x7f 0x04 0x00 0x80 0x04>;
			clocks = <0x06 0xf6 0x06 0x06 0xf6 0x01>;
			compatible = "bosch,m_can";
			status = "disabled";
			interrupt-names = "int0\0int1";
			reg = <0x00 0x2711000 0x00 0x200 0x00 0x2718000 0x00 0x8000>;
			phandle = <0x162>;
			bosch,mram-cfg = <0x00 0x80 0x40 0x40 0x40 0x40 0x20 0x20>;
		};

		pcie@2910000 {
			power-domains = <0x07 0x14d 0x01>;
			dma-ranges = <0x2000000 0x00 0x00 0x00 0x00 0x10000 0x00>;
			ti,syscon-acspcie-proxy-ctrl = <0x4a 0x01>;
			#address-cells = <0x03>;
			dma-coherent;
			phy-names = "pcie-phy";
			bus-range = <0x00 0xff>;
			clock-names = "fck\0pcie_refclk";
			reg-names = "intd_cfg\0user_cfg\0reg\0cfg";
			interrupts = <0x00 0x14a 0x01>;
			clocks = <0x06 0x14d 0x00 0x49 0x00>;
			#size-cells = <0x02>;
			max-link-speed = <0x03>;
			device_type = "pci";
			reset-gpios = <0x46 0x02 0x00>;
			num-lanes = <0x02>;
			compatible = "ti,j784s4-pcie-host";
			ranges = <0x1000000 0x00 0x1000 0x41 0x1000 0x00 0x100000 0x2000000 0x00 0x101000 0x41 0x101000 0x00 0xffeff000>;
			msi-map = <0x00 0x45 0x10000 0x10000>;
			ti,syscon-pcie-ctrl = <0x48 0x00>;
			status = "okay";
			vendor-id = <0x104c>;
			interrupt-names = "link_state";
			phys = <0x4b>;
			reg = <0x00 0x2910000 0x00 0x1000 0x00 0x2917000 0x00 0x400 0x00 0xd800000 0x00 0x800000 0x41 0x00 0x00 0x1000>;
			phandle = <0x13d>;
			device-id = <0xb012>;
		};

		timer@2520000 {
			power-domains = <0x07 0x73 0x01>;
			clock-names = "fck";
			assigned-clocks = <0x06 0x73 0x02>;
			assigned-clock-parents = <0x06 0x73 0x03>;
			interrupts = <0x00 0xf2 0x04>;
			clocks = <0x06 0x73 0x02>;
			compatible = "ti,am654-timer";
			ti,timer-pwm;
			reg = <0x00 0x2520000 0x00 0x400>;
			phandle = <0x108>;
		};

		can@2751000 {
			power-domains = <0x07 0xfa 0x01>;
			clock-names = "hclk\0cclk";
			reg-names = "m_can\0message_ram";
			interrupts = <0x00 0x8b 0x04 0x00 0x8c 0x04>;
			clocks = <0x06 0xfa 0x06 0x06 0xfa 0x01>;
			compatible = "bosch,m_can";
			status = "disabled";
			interrupt-names = "int0\0int1";
			reg = <0x00 0x2751000 0x00 0x200 0x00 0x2758000 0x00 0x8000>;
			phandle = <0x166>;
			bosch,mram-cfg = <0x00 0x80 0x40 0x40 0x40 0x40 0x20 0x20>;
		};

		bus@28380000 {
			#address-cells = <0x02>;
			bootph-all;
			#size-cells = <0x02>;
			compatible = "simple-bus";
			ranges = <0x00 0x28380000 0x00 0x28380000 0x00 0x3880000 0x00 0x40200000 0x00 0x40200000 0x00 0x998400 0x00 0x40f00000 0x00 0x40f00000 0x00 0x20000 0x00 0x41000000 0x00 0x41000000 0x00 0x20000 0x00 0x41400000 0x00 0x41400000 0x00 0x20000 0x00 0x41c00000 0x00 0x41c00000 0x00 0x100000 0x00 0x42040000 0x00 0x42040000 0x00 0x3ac2400 0x00 0x45100000 0x00 0x45100000 0x00 0xc24000 0x00 0x46000000 0x00 0x46000000 0x00 0x200000 0x00 0x47000000 0x00 0x47000000 0x00 0x68400 0x00 0x50000000 0x00 0x50000000 0x00 0x10000000 0x04 0x00 0x04 0x00 0x04 0x00>;
			phandle = <0xa6>;

			ethernet@46000000 {
				power-domains = <0x07 0x3f 0x01>;
				pinctrl-names = "default";
				#address-cells = <0x02>;
				dma-coherent;
				pinctrl-0 = <0x17>;
				clock-names = "fck";
				reg-names = "cpsw_nuss";
				clocks = <0x06 0x3f 0x00>;
				#size-cells = <0x02>;
				dma-names = "tx0\0tx1\0tx2\0tx3\0tx4\0tx5\0tx6\0tx7\0rx";
				compatible = "ti,j721e-cpsw-nuss";
				ranges = <0x00 0x00 0x00 0x46000000 0x00 0x200000>;
				status = "okay";
				reg = <0x00 0x46000000 0x00 0x200000>;
				phandle = <0xd4>;
				dmas = <0x16 0xf000 0x16 0xf001 0x16 0xf002 0x16 0xf003 0x16 0xf004 0x16 0xf005 0x16 0xf006 0x16 0xf007 0x16 0x7000>;

				cpts@3d000 {
					ti,pps = <0x03 0x01>;
					ti,cpts-ext-ts-inputs = <0x04>;
					clock-names = "cpts";
					assigned-clocks = <0x06 0x3f 0x03>;
					assigned-clock-parents = <0x06 0x3f 0x05>;
					clocks = <0x06 0x3f 0x03>;
					interrupts-extended = <0x01 0x00 0x35a 0x04>;
					compatible = "ti,am65-cpts";
					interrupt-names = "cpts";
					reg = <0x00 0x3d000 0x00 0x400>;
					ti,cpts-periodic-outputs = <0x02>;
				};

				mdio@f00 {
					pinctrl-names = "default";
					#address-cells = <0x01>;
					pinctrl-0 = <0x1b>;
					clock-names = "fck";
					clocks = <0x06 0x3f 0x00>;
					bus_freq = <0xf4240>;
					#size-cells = <0x00>;
					compatible = "ti,cpsw-mdio\0ti,davinci_mdio";
					reg = <0x00 0xf00 0x00 0x100>;
					phandle = <0xd6>;

					ethernet-phy@0 {
						ti,min-output-impedance;
						ti,fifo-depth = <0x01>;
						ti,rx-internal-delay = <0x07>;
						reg = <0x00>;
						phandle = <0x1a>;
					};
				};

				ethernet-ports {
					#address-cells = <0x01>;
					#size-cells = <0x00>;

					port@1 {
						phy-mode = "rgmii-rxid";
						local-mac-address = [68 e7 4a 08 be 4f];
						label = "port1";
						status = "okay";
						ti,syscon-efuse = <0x18 0x00>;
						phys = <0x19 0x01>;
						ti,mac-only;
						reg = <0x01>;
						phandle = <0xd5>;
						phy-handle = <0x1a>;
					};
				};
			};

			temperature-sensor@42040000 {
				power-domains = <0x07 0xf3 0x00>;
				#thermal-sensor-cells = <0x01>;
				compatible = "ti,j7200-vtm";
				reg = <0x00 0x42040000 0x00 0x350 0x00 0x42050000 0x00 0x350>;
				bootph-pre-ram;
				phandle = <0x8a>;
			};

			can@40528000 {
				power-domains = <0x07 0x107 0x01>;
				pinctrl-names = "default";
				pinctrl-0 = <0x10>;
				clock-names = "hclk\0cclk";
				reg-names = "m_can\0message_ram";
				interrupts = <0x00 0x340 0x04 0x00 0x341 0x04>;
				clocks = <0x06 0x107 0x06 0x06 0x107 0x01>;
				compatible = "bosch,m_can";
				status = "okay";
				interrupt-names = "int0\0int1";
				phys = <0x11>;
				reg = <0x00 0x40528000 0x00 0x200 0x00 0x40500000 0x00 0x8000>;
				phandle = <0xcd>;
				bosch,mram-cfg = <0x00 0x80 0x40 0x40 0x40 0x40 0x20 0x20>;
			};

			timer@40420000 {
				power-domains = <0x07 0x76 0x01>;
				clock-names = "fck";
				assigned-clocks = <0x06 0x76 0x02>;
				assigned-clock-parents = <0x06 0x76 0x03>;
				interrupts = <0x00 0x332 0x04>;
				clocks = <0x06 0x76 0x02>;
				compatible = "ti,am654-timer";
				status = "reserved";
				ti,timer-pwm;
				reg = <0x00 0x40420000 0x00 0x400>;
				phandle = <0xb4>;
			};

			can@40568000 {
				power-domains = <0x07 0x108 0x01>;
				pinctrl-names = "default";
				pinctrl-0 = <0x12>;
				clock-names = "hclk\0cclk";
				reg-names = "m_can\0message_ram";
				interrupts = <0x00 0x343 0x04 0x00 0x344 0x04>;
				clocks = <0x06 0x108 0x06 0x06 0x108 0x01>;
				compatible = "bosch,m_can";
				status = "okay";
				interrupt-names = "int0\0int1";
				phys = <0x13>;
				reg = <0x00 0x40568000 0x00 0x200 0x00 0x40540000 0x00 0x8000>;
				phandle = <0xce>;
				bosch,mram-cfg = <0x00 0x80 0x40 0x40 0x40 0x40 0x20 0x20>;
			};

			gpio@42100000 {
				power-domains = <0x07 0xa8 0x01>;
				ti,davinci-gpio-unbanked = <0x00>;
				clock-names = "gpio";
				gpio-controller;
				interrupts = <0x70 0x71 0x72 0x73 0x74 0x75>;
				clocks = <0x06 0xa8 0x00>;
				interrupt-parent = <0x0a>;
				ti,ngpio = <0x59>;
				compatible = "ti,j721e-gpio\0ti,keystone-gpio";
				#interrupt-cells = <0x02>;
				status = "disabled";
				reg = <0x00 0x42100000 0x00 0x100>;
				phandle = <0xbe>;
				#gpio-cells = <0x02>;
				interrupt-controller;
			};

			timer@40460000 {
				power-domains = <0x07 0x7a 0x01>;
				clock-names = "fck";
				assigned-clocks = <0x06 0x7a 0x02>;
				assigned-clock-parents = <0x06 0x7a 0x03>;
				interrupts = <0x00 0x336 0x04>;
				clocks = <0x06 0x7a 0x02>;
				compatible = "ti,am654-timer";
				status = "reserved";
				ti,timer-pwm;
				reg = <0x00 0x40460000 0x00 0x400>;
				phandle = <0xb8>;
			};

			bus@28380000 {
				dma-ranges;
				#address-cells = <0x02>;
				dma-coherent;
				#size-cells = <0x02>;
				compatible = "simple-bus";
				ranges = <0x00 0x28380000 0x00 0x28380000 0x00 0x3880000>;
				ti,sci-dev-id = <0x143>;
				phandle = <0xd2>;

				ringacc@2b800000 {
					ti,sci = <0x05>;
					reg-names = "rt\0fifos\0proxy_gcfg\0proxy_target\0cfg";
					bootph-all;
					ti,num-rings = <0x11e>;
					compatible = "ti,am654-navss-ringacc";
					reg = <0x00 0x2b800000 0x00 0x400000 0x00 0x2b000000 0x00 0x400000 0x00 0x28590000 0x00 0x100 0x00 0x2a500000 0x00 0x40000 0x00 0x28440000 0x00 0x40000>;
					ti,sci-dev-id = <0x148>;
					phandle = <0x15>;
					msi-parent = <0x14>;
					ti,sci-rm-range-gp-rings = <0x01>;
				};

				dma-controller@285c0000 {
					ti,sci-rm-range-rflow = <0x00>;
					ti,sci-rm-range-rchan = <0x0a 0x0b>;
					ti,sci = <0x05>;
					reg-names = "gcfg\0rchanrt\0tchanrt\0tchan\0rchan\0rflow";
					bootph-all;
					ti,ringacc = <0x15>;
					compatible = "ti,j721e-navss-mcu-udmap";
					ti,sci-rm-range-tchan = <0x0d 0x0f>;
					reg = <0x00 0x285c0000 0x00 0x100 0x00 0x2a800000 0x00 0x40000 0x00 0x2aa00000 0x00 0x40000 0x00 0x284a0000 0x00 0x4000 0x00 0x284c0000 0x00 0x4000 0x00 0x28400000 0x00 0x2000>;
					ti,sci-dev-id = <0x149>;
					phandle = <0x16>;
					msi-parent = <0x14>;
					#dma-cells = <0x01>;
				};
			};

			r5fss@41000000 {
				power-domains = <0x07 0x159 0x01>;
				#address-cells = <0x01>;
				ti,cluster-mode = <0x00>;
				#size-cells = <0x01>;
				compatible = "ti,j721s2-r5fss";
				ranges = <0x41000000 0x00 0x41000000 0x20000 0x41400000 0x00 0x41400000 0x20000>;
				phandle = <0xd7>;

				r5f@41000000 {
					ti,btcm-enable = <0x01>;
					ti,sci = <0x05>;
					reg-names = "atcm\0btcm";
					firmware-name = "j784s4-mcu-r5f0_0-fw";
					resets = <0x1c 0x15a 0x01>;
					memory-region = <0x1c4 0x1c5>;
					compatible = "ti,j721s2-r5f";
					status = "okay";
					reg = <0x41000000 0x10000 0x41010000 0x10000>;
					ti,sci-dev-id = <0x15a>;
					phandle = <0xd8>;
					mboxes = <0x1d 0x1e>;
					ti,atcm-enable = <0x01>;
					ti,sci-proc-ids = <0x01 0xff>;
					ti,loczrama = <0x01>;
				};

				r5f@41400000 {
					ti,btcm-enable = <0x01>;
					ti,sci = <0x05>;
					reg-names = "atcm\0btcm";
					firmware-name = "j784s4-mcu-r5f0_1-fw";
					resets = <0x1c 0x15b 0x01>;
					memory-region = <0x1c6 0x1c7>;
					compatible = "ti,j721s2-r5f";
					status = "okay";
					reg = <0x41400000 0x10000 0x41410000 0x10000>;
					ti,sci-dev-id = <0x15b>;
					phandle = <0xd9>;
					mboxes = <0x1d 0x21>;
					ti,atcm-enable = <0x01>;
					ti,sci-proc-ids = <0x02 0xff>;
					ti,loczrama = <0x01>;
				};
			};

			bus@43000000 {
				#address-cells = <0x01>;
				#size-cells = <0x01>;
				compatible = "simple-bus";
				ranges = <0x00 0x00 0x43000000 0x20000>;
				phandle = <0xa7>;

				chipid@14 {
					bootph-all;
					compatible = "ti,am654-chipid";
					reg = <0x14 0x04>;
					phandle = <0xa8>;
				};
			};

			esm@42080000 {
				compatible = "ti,j721e-esm";
				reg = <0x00 0x42080000 0x00 0x1000>;
				bootph-pre-ram;
				phandle = <0xe3>;
				ti,esm-pins = <0x3f>;
			};

			sram@41c00000 {
				#address-cells = <0x01>;
				#size-cells = <0x01>;
				compatible = "mmio-sram";
				ranges = <0x00 0x00 0x41c00000 0x100000>;
				reg = <0x00 0x41c00000 0x00 0x100000>;
				phandle = <0xaa>;
			};

			spi@40300000 {
				power-domains = <0x07 0x180 0x01>;
				#address-cells = <0x01>;
				interrupts = <0x00 0x350 0x04>;
				clocks = <0x06 0x180 0x00>;
				#size-cells = <0x00>;
				compatible = "ti,am654-mcspi\0ti,omap4-mcspi";
				status = "disabled";
				reg = <0x00 0x40300000 0x00 0x400>;
				phandle = <0xcf>;
			};

			timer@40430000 {
				power-domains = <0x07 0x77 0x01>;
				clock-names = "fck";
				assigned-clocks = <0x06 0x77 0x02>;
				assigned-clock-parents = <0x06 0x77 0x03>;
				interrupts = <0x00 0x333 0x04>;
				clocks = <0x06 0x77 0x02>;
				compatible = "ti,am654-timer";
				status = "reserved";
				ti,timer-pwm;
				reg = <0x00 0x40430000 0x00 0x400>;
				phandle = <0xb5>;
			};

			bus@47000000 {
				#address-cells = <0x02>;
				bootph-all;
				#size-cells = <0x02>;
				compatible = "simple-bus";
				ranges = <0x00 0x47000000 0x00 0x47000000 0x00 0x100 0x00 0x47040000 0x00 0x47040000 0x00 0x100 0x00 0x47050000 0x00 0x47050000 0x00 0x100 0x00 0x50000000 0x00 0x50000000 0x00 0x10000000 0x04 0x00 0x04 0x00 0x04 0x00>;
				status = "okay";
				phandle = <0xdc>;

				spi@47050000 {
					power-domains = <0x07 0xa2 0x01>;
					pinctrl-names = "default";
					#address-cells = <0x01>;
					pinctrl-0 = <0x29>;
					bootph-all;
					cdns,phase-detect-selector = <0x02>;
					interrupts = <0x00 0x349 0x04>;
					clocks = <0x06 0xa2 0x07>;
					cdns,fifo-width = <0x04>;
					#size-cells = <0x00>;
					cdns,trigger-address = <0x00>;
					compatible = "ti,am654-ospi\0cdns,qspi-nor";
					status = "okay";
					reg = <0x00 0x47050000 0x00 0x100 0x07 0x00 0x01 0x00>;
					phandle = <0xe0>;
					cdns,fifo-depth = <0x100>;

					flash@0 {
						cdns,tshsl-ns = <0x3c>;
						spi-tx-bus-width = <0x01>;
						bootph-all;
						spi-max-frequency = <0x2625a00>;
						spi-rx-bus-width = <0x04>;
						cdns,tsd2d-ns = <0x3c>;
						cdns,read-delay = <0x02>;
						cdns,tslch-ns = <0x3c>;
						compatible = "jedec,spi-nor";
						reg = <0x00>;
						phandle = <0xe1>;
						cdns,tchsh-ns = <0x3c>;

						partitions {
							#address-cells = <0x01>;
							#size-cells = <0x01>;
							compatible = "fixed-partitions";

							partition@800000 {
								label = "qspi.rootfs";
								reg = <0x800000 0x37c0000>;
							};

							partition@280000 {
								label = "qspi.u-boot";
								reg = <0x280000 0x400000>;
							};

							partition@0 {
								label = "qspi.tiboot3";
								reg = <0x00 0x80000>;
							};

							partition@80000 {
								label = "qspi.tispl";
								reg = <0x80000 0x200000>;
							};

							partition@680000 {
								label = "qspi.env";
								reg = <0x680000 0x40000>;
							};

							partition@3fc0000 {
								bootph-all;
								label = "qspi.phypattern";
								reg = <0x3fc0000 0x40000>;
							};

							partition@6c0000 {
								label = "qspi.env.backup";
								reg = <0x6c0000 0x40000>;
							};
						};
					};
				};

				spi@47040000 {
					power-domains = <0x07 0xa1 0x01>;
					pinctrl-names = "default";
					#address-cells = <0x01>;
					pinctrl-0 = <0x27 0x28>;
					assigned-clocks = <0x06 0xa1 0x07>;
					assigned-clock-parents = <0x06 0xa1 0x09>;
					bootph-all;
					cdns,phase-detect-selector = <0x02>;
					assigned-clock-rates = <0x9ef21aa>;
					interrupts = <0x00 0x348 0x04>;
					clocks = <0x06 0xa1 0x07>;
					cdns,fifo-width = <0x04>;
					#size-cells = <0x00>;
					cdns,trigger-address = <0x00>;
					compatible = "ti,am654-ospi\0cdns,qspi-nor";
					status = "okay";
					reg = <0x00 0x47040000 0x00 0x100 0x05 0x00 0x01 0x00>;
					phandle = <0xdd>;
					cdns,fifo-depth = <0x100>;

					flash@0 {
						cdns,tshsl-ns = <0x3c>;
						spi-tx-bus-width = <0x08>;
						bootph-all;
						spi-max-frequency = <0x17d7840>;
						spi-rx-bus-width = <0x08>;
						cdns,phy-mode;
						cdns,tsd2d-ns = <0x3c>;
						cdns,read-delay = <0x04>;
						cdns,tslch-ns = <0x3c>;
						compatible = "jedec,spi-nor";
						reg = <0x00>;
						phandle = <0xde>;
						cdns,tchsh-ns = <0x3c>;

						partitions {
							#address-cells = <0x01>;
							#size-cells = <0x01>;
							compatible = "fixed-partitions";

							partition@800000 {
								label = "ospi.rootfs";
								reg = <0x800000 0x37c0000>;
							};

							partition@280000 {
								label = "ospi.u-boot";
								reg = <0x280000 0x400000>;
							};

							partition@0 {
								label = "ospi.tiboot3";
								reg = <0x00 0x80000>;
							};

							partition@80000 {
								label = "ospi.tispl";
								reg = <0x80000 0x200000>;
							};

							partition@680000 {
								label = "ospi.env";
								reg = <0x680000 0x40000>;
							};

							partition@3fc0000 {
								bootph-all;
								label = "ospi.phypattern";
								reg = <0x3fc0000 0x40000>;
							};

							partition@6c0000 {
								label = "ospi.env.backup";
								reg = <0x6c0000 0x40000>;
							};
						};
					};
				};
			};

			gpio@42110000 {
				power-domains = <0x07 0xa7 0x01>;
				pinctrl-names = "default";
				ti,davinci-gpio-unbanked = <0x00>;
				pinctrl-0 = <0x0b>;
				clock-names = "gpio";
				gpio-controller;
				interrupts = <0x67 0x68 0x69 0x6a 0x6b 0x6c>;
				clocks = <0x06 0xa7 0x00>;
				interrupt-parent = <0x0a>;
				ti,ngpio = <0x59>;
				compatible = "ti,j721e-gpio\0ti,keystone-gpio";
				#interrupt-cells = <0x02>;
				status = "okay";
				reg = <0x00 0x42110000 0x00 0x100>;
				phandle = <0x0e>;
				#gpio-cells = <0x02>;
				interrupt-controller;
			};

			timer@40470000 {
				power-domains = <0x07 0x7b 0x01>;
				clock-names = "fck";
				assigned-clocks = <0x06 0x7b 0x02>;
				assigned-clock-parents = <0x06 0x7b 0x03>;
				interrupts = <0x00 0x337 0x04>;
				clocks = <0x06 0x7b 0x02>;
				compatible = "ti,am654-timer";
				status = "reserved";
				ti,timer-pwm;
				reg = <0x00 0x40470000 0x00 0x400>;
				phandle = <0xb9>;
			};

			esm@40800000 {
				compatible = "ti,j721e-esm";
				reg = <0x00 0x40800000 0x00 0x1000>;
				bootph-pre-ram;
				phandle = <0xe2>;
				ti,esm-pins = <0x5f>;
			};

			pinctrl@40f04280 {
				#pinctrl-cells = <0x01>;
				pinctrl-single,register-width = <0x20>;
				compatible = "ti,j7200-padconf\0pinctrl-single";
				status = "reserved";
				reg = <0x00 0x40f04280 0x00 0x28>;
				phandle = <0xb0>;
				pinctrl-single,function-mask = <0x0f>;
			};

			mailbox@2a480000 {
				reg-names = "target_data\0rt\0scfg";
				#mbox-cells = <0x01>;
				compatible = "ti,am654-secure-proxy";
				status = "disabled";
				reg = <0x00 0x2a480000 0x00 0x80000 0x00 0x2a380000 0x00 0x80000 0x00 0x2a400000 0x00 0x80000>;
				bootph-pre-ram;
				phandle = <0xd3>;
			};

			pinctrl@4301c000 {
				#pinctrl-cells = <0x01>;
				bootph-all;
				pinctrl-single,register-width = <0x20>;
				compatible = "ti,j7200-padconf\0pinctrl-single";
				reg = <0x00 0x4301c000 0x00 0x34>;
				phandle = <0xab>;
				pinctrl-single,function-mask = <0xffffffff>;

				mcu-fss0-ospi0-default-pins {
					pinctrl-single,pins = <0x00 0x10000 0x2c 0x10000 0x0c 0x54000 0x10 0x54000 0x14 0x54000 0x18 0x54000 0x1c 0x54000 0x20 0x54000 0x24 0x54000 0x28 0x54000 0x08 0x54000>;
					bootph-all;
					phandle = <0x27>;
				};
			};

			bus@40f00000 {
				#address-cells = <0x01>;
				#size-cells = <0x01>;
				compatible = "simple-bus";
				ranges = <0x00 0x00 0x40f00000 0x20000>;
				phandle = <0xb1>;

				ethernet-mac-syscon@200 {
					compatible = "ti,am62p-cpsw-mac-efuse\0syscon";
					reg = <0x200 0x08>;
					phandle = <0x18>;
				};

				phy@4040 {
					#phy-cells = <0x01>;
					compatible = "ti,am654-phy-gmii-sel";
					reg = <0x4040 0x04>;
					phandle = <0x19>;
				};
			};

			watchdog@40600000 {
				power-domains = <0x07 0x16f 0x01>;
				assigned-clocks = <0x06 0x16f 0x00>;
				assigned-clock-parents = <0x06 0x16f 0x04>;
				clocks = <0x06 0x16f 0x01>;
				compatible = "ti,j7-rti-wdt";
				status = "reserved";
				reg = <0x00 0x40600000 0x00 0x100>;
				phandle = <0xe4>;
			};

			mailbox@43600000 {
				reg-names = "target_data\0rt\0scfg";
				#mbox-cells = <0x01>;
				compatible = "ti,am654-secure-proxy";
				status = "disabled";
				reg = <0x00 0x43600000 0x00 0x10000 0x00 0x44880000 0x00 0x20000 0x00 0x44860000 0x00 0x20000>;
				bootph-pre-ram;
				phandle = <0xa9>;
			};

			serial@40a00000 {
				power-domains = <0x07 0x95 0x01>;
				pinctrl-names = "default";
				pinctrl-0 = <0x09>;
				clock-names = "fclk";
				bootph-all;
				interrupts = <0x00 0x34e 0x04>;
				clocks = <0x06 0x95 0x00>;
				compatible = "ti,j721e-uart\0ti,am654-uart";
				status = "okay";
				reg = <0x00 0x40a00000 0x00 0x200>;
				phandle = <0xbd>;
			};

			timer@40400000 {
				power-domains = <0x07 0x23 0x01>;
				clock-names = "fck";
				assigned-clocks = <0x06 0x23 0x02>;
				assigned-clock-parents = <0x06 0x23 0x03>;
				bootph-all;
				interrupts = <0x00 0x330 0x04>;
				clocks = <0x06 0x23 0x02>;
				compatible = "ti,am654-timer";
				status = "reserved";
				ti,timer-pwm;
				reg = <0x00 0x40400000 0x00 0x400>;
				phandle = <0xb2>;
			};

			spi@40310000 {
				power-domains = <0x07 0x181 0x01>;
				#address-cells = <0x01>;
				interrupts = <0x00 0x351 0x04>;
				clocks = <0x06 0x181 0x00>;
				#size-cells = <0x00>;
				compatible = "ti,am654-mcspi\0ti,omap4-mcspi";
				status = "disabled";
				reg = <0x00 0x40310000 0x00 0x400>;
				phandle = <0xd0>;
			};

			timer@40440000 {
				power-domains = <0x07 0x78 0x01>;
				clock-names = "fck";
				assigned-clocks = <0x06 0x78 0x02>;
				assigned-clock-parents = <0x06 0x78 0x03>;
				interrupts = <0x00 0x334 0x04>;
				clocks = <0x06 0x78 0x02>;
				compatible = "ti,am654-timer";
				status = "reserved";
				ti,timer-pwm;
				reg = <0x00 0x40440000 0x00 0x400>;
				phandle = <0xb6>;
			};

			interrupt-controller@42200000 {
				ti,interrupt-ranges = <0x10 0x3c0 0x10>;
				ti,intr-trigger-type = <0x01>;
				ti,sci = <0x05>;
				interrupt-parent = <0x01>;
				compatible = "ti,sci-intr";
				#interrupt-cells = <0x01>;
				reg = <0x00 0x42200000 0x00 0x400>;
				ti,sci-dev-id = <0xb1>;
				phandle = <0x0a>;
				interrupt-controller;
			};

			pinctrl@40f04200 {
				#pinctrl-cells = <0x01>;
				pinctrl-single,register-width = <0x20>;
				compatible = "ti,j7200-padconf\0pinctrl-single";
				status = "reserved";
				reg = <0x00 0x40f04200 0x00 0x28>;
				phandle = <0xaf>;
				pinctrl-single,function-mask = <0x0f>;
			};

			timer@40480000 {
				power-domains = <0x07 0x7c 0x01>;
				clock-names = "fck";
				assigned-clocks = <0x06 0x7c 0x02>;
				assigned-clock-parents = <0x06 0x7c 0x03>;
				interrupts = <0x00 0x338 0x04>;
				clocks = <0x06 0x7c 0x02>;
				compatible = "ti,am654-timer";
				status = "reserved";
				ti,timer-pwm;
				reg = <0x00 0x40480000 0x00 0x400>;
				phandle = <0xba>;
			};

			i2c@40b00000 {
				power-domains = <0x07 0x115 0x01>;
				#address-cells = <0x01>;
				clock-names = "fck";
				interrupts = <0x00 0x354 0x04>;
				clocks = <0x06 0x115 0x02>;
				#size-cells = <0x00>;
				compatible = "ti,j721e-i2c\0ti,omap4-i2c";
				status = "disabled";
				reg = <0x00 0x40b00000 0x00 0x100>;
				phandle = <0xcb>;
			};

			tscadc@40200000 {
				power-domains = <0x07 0x00 0x01>;
				pinctrl-names = "default";
				pinctrl-0 = <0x25>;
				clock-names = "fck";
				assigned-clocks = <0x06 0x00 0x02>;
				assigned-clock-rates = <0x3938700>;
				interrupts = <0x00 0x35c 0x04>;
				clocks = <0x06 0x00 0x00>;
				dma-names = "fifo0\0fifo1";
				compatible = "ti,am3359-tscadc";
				status = "okay";
				reg = <0x00 0x40200000 0x00 0x1000>;
				phandle = <0xda>;
				dmas = <0x24 0x7400 0x24 0x7401>;

				adc {
					ti,adc-channels = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07>;
					#io-channel-cells = <0x01>;
					compatible = "ti,am3359-adc";
				};
			};

			watchdog@40610000 {
				power-domains = <0x07 0x170 0x01>;
				assigned-clocks = <0x06 0x170 0x00>;
				assigned-clock-parents = <0x06 0x170 0x04>;
				clocks = <0x06 0x170 0x01>;
				compatible = "ti,j7-rti-wdt";
				status = "reserved";
				reg = <0x00 0x40610000 0x00 0x100>;
				phandle = <0xe5>;
			};

			serial@42300000 {
				power-domains = <0x07 0x18d 0x01>;
				pinctrl-names = "default";
				pinctrl-0 = <0x08>;
				clock-names = "fclk";
				interrupts = <0x00 0x381 0x04>;
				clocks = <0x06 0x18d 0x00>;
				compatible = "ti,j721e-uart\0ti,am654-uart";
				status = "reserved";
				reg = <0x00 0x42300000 0x00 0x200>;
				phandle = <0xbc>;
			};

			system-controller@44083000 {
				reg-names = "debug_messages";
				ti,host-id = <0x0c>;
				compatible = "ti,k2g-sci";
				reg = <0x00 0x44083000 0x00 0x1000>;
				phandle = <0x05>;
				mboxes = <0x03 0x0b 0x03 0x0d>;
				mbox-names = "rx\0tx";

				clock-controller {
					pinctrl-names = "default";
					pinctrl-0 = <0x04>;
					bootph-all;
					#clock-cells = <0x02>;
					compatible = "ti,k2g-sci-clk";
					phandle = <0x06>;
				};

				reset-controller {
					#reset-cells = <0x02>;
					bootph-all;
					compatible = "ti,sci-reset";
					phandle = <0x1c>;
				};

				power-controller {
					bootph-all;
					#power-domain-cells = <0x02>;
					compatible = "ti,sci-pm-domain";
					phandle = <0x07>;
				};
			};

			timer@40410000 {
				power-domains = <0x07 0x75 0x01>;
				clock-names = "fck";
				assigned-clocks = <0x06 0x75 0x02>;
				assigned-clock-parents = <0x06 0x75 0x03>;
				interrupts = <0x00 0x331 0x04>;
				clocks = <0x06 0x75 0x02>;
				compatible = "ti,am654-timer";
				status = "reserved";
				ti,timer-pwm;
				reg = <0x00 0x40410000 0x00 0x400>;
				phandle = <0xb3>;
			};

			spi@40320000 {
				power-domains = <0x07 0x182 0x01>;
				#address-cells = <0x01>;
				interrupts = <0x00 0x352 0x04>;
				clocks = <0x06 0x182 0x00>;
				#size-cells = <0x00>;
				compatible = "ti,am654-mcspi\0ti,omap4-mcspi";
				status = "disabled";
				reg = <0x00 0x40320000 0x00 0x400>;
				phandle = <0xd1>;
			};

			i2c@42120000 {
				power-domains = <0x07 0x117 0x01>;
				pinctrl-names = "default";
				#address-cells = <0x01>;
				pinctrl-0 = <0x0c>;
				clock-names = "fck";
				bootph-all;
				interrupts = <0x00 0x380 0x04>;
				clocks = <0x06 0x117 0x02>;
				#size-cells = <0x00>;
				clock-frequency = <0x61a80>;
				compatible = "ti,j721e-i2c\0ti,omap4-i2c";
				status = "okay";
				reg = <0x00 0x42120000 0x00 0x100>;
				phandle = <0xbf>;

				regulator@43 {
					regulator-max-microvolt = <0xcd140>;
					regulator-boot-on;
					regulator-always-on;
					regulator-min-microvolt = <0xb98c0>;
					regulator-name = "VDD_CORE_0V8";
					compatible = "ti,tps62873";
					reg = <0x43>;
					phandle = <0xca>;
				};

				eeprom@50 {
					compatible = "atmel,24c256";
					reg = <0x50>;
				};

				pmic@48 {
					system-power-controller;
					pinctrl-names = "default";
					pinctrl-0 = <0x0d>;
					gpio-controller;
					interrupts = <0x27 0x02>;
					buck12-supply = <0x0f>;
					interrupt-parent = <0x0e>;
					compatible = "ti,tps6594-q1";
					reg = <0x48>;
					ldo1-supply = <0x0f>;
					phandle = <0xc0>;
					#gpio-cells = <0x02>;
					ldo2-supply = <0x0f>;
					buck3-supply = <0x0f>;
					ldo3-supply = <0x0f>;
					buck4-supply = <0x0f>;
					ldo4-supply = <0x0f>;
					ti,primary-pmic;
					buck5-supply = <0x0f>;

					regulators {

						buck5 {
							regulator-max-microvolt = <0xcf850>;
							regulator-boot-on;
							bootph-all;
							regulator-always-on;
							regulator-min-microvolt = <0xcf850>;
							regulator-name = "vdd_mcu_0v85";
							phandle = <0xc4>;
						};

						ldo4 {
							regulator-max-microvolt = <0x1b7740>;
							regulator-boot-on;
							bootph-all;
							regulator-always-on;
							regulator-min-microvolt = <0x1b7740>;
							regulator-name = "vda_mcu_1v8";
							phandle = <0xc8>;
						};

						buck3 {
							regulator-max-microvolt = <0xcf850>;
							regulator-boot-on;
							bootph-all;
							regulator-always-on;
							regulator-min-microvolt = <0xcf850>;
							regulator-name = "vdd_ram_0v85";
							phandle = <0xc2>;
						};

						ldo2 {
							regulator-max-microvolt = <0x325aa0>;
							regulator-boot-on;
							bootph-all;
							regulator-always-on;
							regulator-min-microvolt = <0x325aa0>;
							regulator-name = "vdd_mcuio_3v3";
							phandle = <0xc6>;
						};

						buck4 {
							regulator-max-microvolt = <0x1b7740>;
							regulator-boot-on;
							bootph-all;
							regulator-always-on;
							regulator-min-microvolt = <0x1b7740>;
							regulator-name = "vdd_io_1v8";
							phandle = <0xc3>;
						};

						buck12 {
							regulator-max-microvolt = <0x10c8e0>;
							regulator-boot-on;
							bootph-all;
							regulator-always-on;
							regulator-min-microvolt = <0x10c8e0>;
							regulator-name = "vdd_ddr_1v1";
							phandle = <0xc1>;
						};

						ldo3 {
							regulator-max-microvolt = "\0\f5";
							regulator-boot-on;
							bootph-all;
							regulator-always-on;
							regulator-min-microvolt = "\0\f5";
							regulator-name = "vds_dll_0v8";
							phandle = <0xc7>;
						};

						ldo1 {
							regulator-max-microvolt = <0x1b7740>;
							regulator-boot-on;
							bootph-all;
							regulator-always-on;
							regulator-min-microvolt = <0x1b7740>;
							regulator-name = "vdd_mcuio_1v8";
							phandle = <0xc5>;
						};
					};
				};

				regulator@40 {
					regulator-max-microvolt = <0x144b50>;
					regulator-boot-on;
					regulator-always-on;
					regulator-min-microvolt = <0xb71b0>;
					regulator-name = "VDD_CPU_AVS";
					compatible = "ti,tps62873";
					reg = <0x40>;
					bootph-pre-ram;
					phandle = <0xc9>;
				};
			};

			timer@40450000 {
				power-domains = <0x07 0x79 0x01>;
				clock-names = "fck";
				assigned-clocks = <0x06 0x79 0x02>;
				assigned-clock-parents = <0x06 0x79 0x03>;
				interrupts = <0x00 0x335 0x04>;
				clocks = <0x06 0x79 0x02>;
				compatible = "ti,am654-timer";
				status = "reserved";
				ti,timer-pwm;
				reg = <0x00 0x40450000 0x00 0x400>;
				phandle = <0xb7>;
			};

			pinctrl@4301c190 {
				#pinctrl-cells = <0x01>;
				pinctrl-single,register-width = <0x20>;
				compatible = "ti,j7200-padconf\0pinctrl-single";
				reg = <0x00 0x4301c190 0x00 0x04>;
				phandle = <0xae>;
				pinctrl-single,function-mask = <0xffffffff>;
			};

			pinctrl@4301c068 {
				#pinctrl-cells = <0x01>;
				bootph-all;
				pinctrl-single,register-width = <0x20>;
				compatible = "ti,j7200-padconf\0pinctrl-single";
				reg = <0x00 0x4301c068 0x00 0x120>;
				phandle = <0xad>;
				pinctrl-single,function-mask = <0xffffffff>;

				wkup_gpio_pins_default {
					pinctrl-single,pins = <0x70 0x54007>;
					phandle = <0x0b>;
				};

				mcu-uart0-default-pins {
					pinctrl-single,pins = <0x90 0x54000 0x94 0x10000 0x8c 0x54000 0x88 0x10000>;
					bootph-all;
					phandle = <0x09>;
				};

				wkup-uart0-default-pins {
					pinctrl-single,pins = <0x48 0x54000 0x4c 0x10000>;
					bootph-all;
					phandle = <0x08>;
				};

				mcu-mcan0-gpio-default-pins {
					pinctrl-single,pins = <0x40 0x54007>;
					phandle = <0x9b>;
				};

				mcu-adc1-default-pins {
					pinctrl-single,pins = <0xec 0x54000 0xf0 0x54000 0xf4 0x54000 0xf8 0x54000 0xfc 0x54000 0x100 0x54000 0x104 0x54000 0x108 0x54000>;
					phandle = <0x26>;
				};

				mcu-mcan0-default-pins {
					pinctrl-single,pins = <0x50 0x10000 0x54 0x54000>;
					phandle = <0x10>;
				};

				mcu-mdio-default-pins {
					pinctrl-single,pins = <0x34 0x10000 0x30 0x54000>;
					phandle = <0x1b>;
				};

				mcu-mcan1-gpio-default-pins {
					pinctrl-single,pins = <0x60 0x54007>;
					phandle = <0x9c>;
				};

				mcu-mcan1-default-pins {
					pinctrl-single,pins = <0x68 0x10000 0x6c 0x54000>;
					phandle = <0x12>;
				};

				mcu-cpsw-default-pins {
					pinctrl-single,pins = <0x2c 0x54000 0x28 0x54000 0x24 0x54000 0x20 0x54000 0x1c 0x54000 0x04 0x54000 0x14 0x10000 0x10 0x10000 0x0c 0x10000 0x08 0x10000 0x18 0x10000 0x00 0x10000>;
					phandle = <0x17>;
				};

				wkup-i2c0-default-pins {
					pinctrl-single,pins = <0x98 0x54000 0x9c 0x54000>;
					bootph-all;
					phandle = <0x0c>;
				};

				mcu-adc0-default-pins {
					pinctrl-single,pins = <0xcc 0x54000 0xd0 0x54000 0xd4 0x54000 0xd8 0x54000 0xdc 0x54000 0xe0 0x54000 0xe4 0x54000 0xe8 0x54000>;
					phandle = <0x25>;
				};
			};

			timer@40490000 {
				power-domains = <0x07 0x7d 0x01>;
				clock-names = "fck";
				assigned-clocks = <0x06 0x7d 0x02>;
				assigned-clock-parents = <0x06 0x7d 0x03>;
				interrupts = <0x00 0x339 0x04>;
				clocks = <0x06 0x7d 0x02>;
				compatible = "ti,am654-timer";
				status = "reserved";
				ti,timer-pwm;
				reg = <0x00 0x40490000 0x00 0x400>;
				phandle = <0xbb>;
			};

			i2c@40b10000 {
				power-domains = <0x07 0x116 0x01>;
				#address-cells = <0x01>;
				clock-names = "fck";
				interrupts = <0x00 0x355 0x04>;
				clocks = <0x06 0x116 0x02>;
				#size-cells = <0x00>;
				compatible = "ti,j721e-i2c\0ti,omap4-i2c";
				status = "disabled";
				reg = <0x00 0x40b10000 0x00 0x100>;
				phandle = <0xcc>;
			};

			pinctrl@4301c038 {
				#pinctrl-cells = <0x01>;
				bootph-all;
				pinctrl-single,register-width = <0x20>;
				compatible = "ti,j7200-padconf\0pinctrl-single";
				status = "okay";
				reg = <0x00 0x4301c038 0x00 0x2c>;
				phandle = <0xac>;
				pinctrl-single,function-mask = <0xffffffff>;

				mcu-fss0-ospi1-default-pins {
					pinctrl-single,pins = <0x08 0x10000 0x24 0x10000 0x14 0x54000 0x18 0x54000 0x1c 0x54000 0x20 0x54000 0x10 0x54000 0x0c 0x54000>;
					bootph-all;
					phandle = <0x29>;
				};

				pmic-irq-default-pins {
					pinctrl-single,pins = <0x28 0x54007>;
					phandle = <0x0d>;
				};

				mcu-fss0-ospi0-1-default-pins {
					pinctrl-single,pins = <0x04 0x10006 0x00 0x10006>;
					bootph-all;
					phandle = <0x28>;
				};
			};

			tscadc@40210000 {
				power-domains = <0x07 0x01 0x01>;
				pinctrl-names = "default";
				pinctrl-0 = <0x26>;
				clock-names = "fck";
				assigned-clocks = <0x06 0x01 0x02>;
				assigned-clock-rates = <0x3938700>;
				interrupts = <0x00 0x35d 0x04>;
				clocks = <0x06 0x01 0x00>;
				dma-names = "fifo0\0fifo1";
				compatible = "ti,am3359-tscadc";
				status = "okay";
				reg = <0x00 0x40210000 0x00 0x1000>;
				phandle = <0xdb>;
				dmas = <0x24 0x7402 0x24 0x7403>;

				adc {
					ti,adc-channels = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07>;
					#io-channel-cells = <0x01>;
					compatible = "ti,am3359-adc";
				};
			};
		};

		serial@2810000 {
			power-domains = <0x07 0x184 0x01>;
			clock-names = "fclk";
			interrupts = <0x00 0xc1 0x04>;
			clocks = <0x06 0x184 0x00>;
			compatible = "ti,j721e-uart\0ti,am654-uart";
			status = "disabled";
			reg = <0x00 0x2810000 0x00 0x200>;
			phandle = <0x10b>;
		};

		spi@2120000 {
			power-domains = <0x07 0x17a 0x01>;
			#address-cells = <0x01>;
			interrupts = <0x00 0xba 0x04>;
			clocks = <0x06 0x17a 0x00>;
			#size-cells = <0x00>;
			compatible = "ti,am654-mcspi\0ti,omap4-mcspi";
			status = "disabled";
			reg = <0x00 0x2120000 0x00 0x400>;
			phandle = <0x175>;
		};

		can@2791000 {
			power-domains = <0x07 0xfe 0x01>;
			clock-names = "hclk\0cclk";
			reg-names = "m_can\0message_ram";
			interrupts = <0x00 0x243 0x04 0x00 0x244 0x04>;
			clocks = <0x06 0xfe 0x06 0x06 0xfe 0x01>;
			compatible = "bosch,m_can";
			status = "disabled";
			interrupt-names = "int0\0int1";
			reg = <0x00 0x2791000 0x00 0x200 0x00 0x2798000 0x00 0x8000>;
			phandle = <0x16a>;
			bosch,mram-cfg = <0x00 0x80 0x40 0x40 0x40 0x40 0x20 0x20>;
		};

		pwm@3020000 {
			power-domains = <0x07 0xdd 0x01>;
			clock-names = "tbclk\0fck";
			clocks = <0x2a 0x02 0x06 0xdd 0x00>;
			#pwm-cells = <0x03>;
			compatible = "ti,am654-ehrpwm\0ti,am3352-ehrpwm";
			status = "disabled";
			reg = <0x00 0x3020000 0x00 0x100>;
			phandle = <0xed>;
		};

		serial@2850000 {
			power-domains = <0x07 0x188 0x01>;
			clock-names = "fclk";
			interrupts = <0x00 0xc5 0x04>;
			clocks = <0x06 0x188 0x00>;
			compatible = "ti,j721e-uart\0ti,am654-uart";
			status = "disabled";
			reg = <0x00 0x2850000 0x00 0x200>;
			phandle = <0x10f>;
		};

		spi@2160000 {
			power-domains = <0x07 0x17e 0x01>;
			#address-cells = <0x01>;
			interrupts = <0x00 0xbe 0x04>;
			clocks = <0x06 0x17e 0x00>;
			#size-cells = <0x00>;
			compatible = "ti,am654-mcspi\0ti,omap4-mcspi";
			status = "disabled";
			reg = <0x00 0x2160000 0x00 0x400>;
			phandle = <0x179>;
		};

		ticsi2rx@4510000 {
			power-domains = <0x07 0x49 0x01>;
			#address-cells = <0x02>;
			#size-cells = <0x02>;
			dma-names = "rx0\0rx1\0rx2\0rx3\0rx4\0rx5\0rx6\0rx7";
			compatible = "ti,j721e-csi2rx-shim";
			ranges;
			status = "disabled";
			reg = <0x00 0x4510000 0x00 0x1000>;
			phandle = <0x12a>;
			dmas = <0x3c 0x00 0x4960 0x00 0x3c 0x00 0x4961 0x00 0x3c 0x00 0x4962 0x00 0x3c 0x00 0x4963 0x00 0x3c 0x00 0x4964 0x00 0x3c 0x00 0x4965 0x00 0x3c 0x00 0x4966 0x00 0x3c 0x00 0x4967 0x00>;

			csi-bridge@4514000 {
				phy-names = "dphy";
				clock-names = "sys_clk\0p_clk\0pixel_if0_clk\0pixel_if1_clk\0pixel_if2_clk\0pixel_if3_clk";
				interrupts = <0x00 0x9d 0x04 0x00 0x9c 0x04>;
				clocks = <0x06 0x49 0x02 0x06 0x49 0x00 0x06 0x49 0x02 0x06 0x49 0x02 0x06 0x49 0x03 0x06 0x49 0x03>;
				compatible = "ti,j721e-csi2rx\0cdns,csi2rx";
				interrupt-names = "error_irq\0irq";
				phys = <0x3e>;
				reg = <0x00 0x4514000 0x00 0x1000>;
				phandle = <0x12b>;

				ports {
					#address-cells = <0x01>;
					#size-cells = <0x00>;

					port@0 {
						status = "disabled";
						reg = <0x00>;
						phandle = <0x12c>;
					};

					port@3 {
						status = "disabled";
						reg = <0x03>;
						phandle = <0x12f>;
					};

					port@1 {
						status = "disabled";
						reg = <0x01>;
						phandle = <0x12d>;
					};

					port@4 {
						status = "disabled";
						reg = <0x04>;
						phandle = <0x130>;
					};

					port@2 {
						status = "disabled";
						reg = <0x02>;
						phandle = <0x12e>;
					};
				};
			};
		};

		serial@2890000 {
			power-domains = <0x07 0x18c 0x01>;
			clock-names = "fclk";
			interrupts = <0x00 0xf9 0x04>;
			clocks = <0x06 0x18c 0x00>;
			compatible = "ti,j721e-uart\0ti,am654-uart";
			status = "disabled";
			reg = <0x00 0x2890000 0x00 0x200>;
			phandle = <0x113>;
		};

		watchdog@2230000 {
			power-domains = <0x07 0x15f 0x01>;
			assigned-clocks = <0x06 0x15f 0x00>;
			assigned-clock-parents = <0x06 0x15f 0x04>;
			clocks = <0x06 0x15f 0x00>;
			compatible = "ti,j7-rti-wdt";
			reg = <0x00 0x2230000 0x00 0x100>;
			phandle = <0x18c>;
		};

		timer@24d0000 {
			power-domains = <0x07 0x6e 0x01>;
			clock-names = "fck";
			assigned-clocks = <0x06 0x6e 0x02>;
			assigned-clock-parents = <0x06 0x6e 0x03>;
			interrupts = <0x00 0xed 0x04>;
			clocks = <0x06 0x6e 0x02>;
			compatible = "ti,am654-timer";
			status = "reserved";
			ti,timer-pwm;
			reg = <0x00 0x24d0000 0x00 0x400>;
			phandle = <0x103>;
		};

		esm@700000 {
			compatible = "ti,j721e-esm";
			reg = <0x00 0x700000 0x00 0x1000>;
			bootph-pre-ram;
			phandle = <0x188>;
			ti,esm-pins = <0x2b0 0x2b1 0x2b2 0x2b3 0x2b4 0x2b5 0x2b6 0x2b7>;
		};

		wiz@5050000 {
			power-domains = <0x07 0x197 0x01>;
			#reset-cells = <0x01>;
			#address-cells = <0x01>;
			clock-names = "fck\0core_ref_clk\0ext_ref_clk\0core_ref1_clk";
			assigned-clocks = <0x06 0x197 0x06>;
			assigned-clock-parents = <0x06 0x197 0x0a>;
			clocks = <0x06 0x197 0x02 0x06 0x197 0x06 0x4c 0x06 0x197 0x05>;
			#size-cells = <0x01>;
			#clock-cells = <0x01>;
			num-lanes = <0x04>;
			compatible = "ti,j784s4-wiz-10g";
			ranges = <0x5050000 0x00 0x5050000 0x10000 0xa030a00 0x00 0xa030a00 0x40>;
			status = "disabled";
			phandle = <0x4f>;

			serdes@5050000 {
				#address-cells = <0x01>;
				clock-names = "refclk\0phy_en_refclk";
				reg-names = "torrent_phy";
				assigned-clocks = <0x4f 0x00 0x4f 0x01 0x4f 0x02>;
				assigned-clock-parents = <0x06 0x197 0x06 0x06 0x197 0x06 0x06 0x197 0x06>;
				resets = <0x4f 0x00>;
				clocks = <0x4f 0x00 0x4f 0x10>;
				#size-cells = <0x00>;
				#clock-cells = <0x01>;
				compatible = "ti,j721e-serdes-10g";
				status = "okay";
				reg = <0x5050000 0x10000 0xa030a00 0x40>;
				phandle = <0x13f>;
				reset-names = "torrent_reset";

				phy@0 {
					cdns,max-bit-rate = <0xa8c>;
					resets = <0x4f 0x01 0x4f 0x02 0x4f 0x03 0x4f 0x04>;
					#phy-cells = <0x00>;
					cdns,phy-type = <0x06>;
					reg = <0x00>;
					phandle = <0x7e>;
					cdns,num-lanes = <0x04>;
				};
			};
		};

		mcasp@2b30000 {
			power-domains = <0x07 0x10c 0x01>;
			clock-names = "fck";
			reg-names = "mpu\0dat";
			assigned-clocks = <0x06 0x10c 0x00>;
			assigned-clock-parents = <0x06 0x10c 0x01>;
			interrupts = <0x00 0x226 0x04 0x00 0x227 0x04>;
			clocks = <0x06 0x10c 0x00>;
			dma-names = "tx\0rx";
			compatible = "ti,am33xx-mcasp-audio";
			status = "disabled";
			interrupt-names = "tx\0rx";
			reg = <0x00 0x2b30000 0x00 0x2000 0x00 0x2b38000 0x00 0x1000>;
			phandle = <0x1a1>;
			dmas = <0x24 0xc403 0x24 0x4403>;
		};

		watchdog@2270000 {
			power-domains = <0x07 0x163 0x01>;
			assigned-clocks = <0x06 0x163 0x00>;
			assigned-clock-parents = <0x06 0x163 0x04>;
			clocks = <0x06 0x163 0x00>;
			compatible = "ti,j7-rti-wdt";
			reg = <0x00 0x2270000 0x00 0x100>;
			phandle = <0x1ab>;
		};

		dss@4a00000 {
			power-domains = <0x07 0xda 0x01>;
			clock-names = "fck\0vp1\0vp2\0vp3\0vp4";
			reg-names = "common_m\0common_s0\0common_s1\0common_s2\0vidl1\0vidl2\0vid1\0vid2\0ovr1\0ovr2\0ovr3\0ovr4\0vp1\0vp2\0vp3\0vp4\0wb";
			assigned-clocks = <0x06 0xda 0x02 0x06 0xda 0x05 0x06 0xda 0x0e 0x06 0xda 0x12>;
			assigned-clock-parents = <0x06 0xda 0x03 0x06 0xda 0x07 0x06 0xda 0x10 0x06 0xda 0x16>;
			interrupts = <0x00 0x25a 0x04 0x00 0x25b 0x04 0x00 0x25c 0x04 0x00 0x25d 0x04>;
			clocks = <0x06 0xda 0x00 0x06 0xda 0x02 0x06 0xda 0x05 0x06 0xda 0x0e 0x06 0xda 0x12>;
			compatible = "ti,j721e-dss";
			status = "disabled";
			interrupt-names = "common_m\0common_s0\0common_s1\0common_s2";
			reg = <0x00 0x4a00000 0x00 0x10000 0x00 0x4a10000 0x00 0x10000 0x00 0x4b00000 0x00 0x10000 0x00 0x4b10000 0x00 0x10000 0x00 0x4a20000 0x00 0x10000 0x00 0x4a30000 0x00 0x10000 0x00 0x4a50000 0x00 0x10000 0x00 0x4a60000 0x00 0x10000 0x00 0x4a70000 0x00 0x10000 0x00 0x4a90000 0x00 0x10000 0x00 0x4ab0000 0x00 0x10000 0x00 0x4ad0000 0x00 0x10000 0x00 0x4a80000 0x00 0x10000 0x00 0x4aa0000 0x00 0x10000 0x00 0x4ac0000 0x00 0x10000 0x00 0x4ae0000 0x00 0x10000 0x00 0x4af0000 0x00 0x10000>;
			phandle = <0x19d>;

			ports {
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				phandle = <0x19e>;

				port@0 {
					reg = <0x00>;

					endpoint {
						remote-endpoint = <0x81>;
						phandle = <0x7f>;
					};
				};

				port@2 {
					reg = <0x02>;

					endpoint {
						remote-endpoint = <0x82>;
						phandle = <0x7c>;
					};
				};
			};
		};

		timer@2420000 {
			power-domains = <0x07 0x63 0x01>;
			clock-names = "fck";
			assigned-clocks = <0x06 0x63 0x02>;
			assigned-clock-parents = <0x06 0x63 0x03>;
			interrupts = <0x00 0xe2 0x04>;
			clocks = <0x06 0x63 0x02>;
			compatible = "ti,am654-timer";
			status = "reserved";
			ti,timer-pwm;
			reg = <0x00 0x2420000 0x00 0x400>;
			phandle = <0xf8>;
		};

		watchdog@2550000 {
			power-domains = <0x07 0x16e 0x01>;
			assigned-clocks = <0x06 0x16e 0x00>;
			assigned-clock-parents = <0x06 0x16e 0x04>;
			clocks = <0x06 0x16e 0x00>;
			compatible = "ti,j7-rti-wdt";
			status = "reserved";
			reg = <0x00 0x2550000 0x00 0x100>;
			phandle = <0x197>;
		};

		mmc@4fb0000 {
			power-domains = <0x07 0x8d 0x01>;
			ti,otap-del-sel-legacy = <0x00>;
			pinctrl-names = "default";
			dma-coherent;
			pinctrl-0 = <0x41>;
			clock-names = "clk_ahb\0clk_xin";
			vqmmc-supply = <0x43>;
			assigned-clocks = <0x06 0x8d 0x04>;
			assigned-clock-parents = <0x06 0x8d 0x05>;
			bus-width = <0x04>;
			ti,trm-icp = <0x08>;
			ti,otap-del-sel-sd-hs = <0x00>;
			bootph-all;
			interrupts = <0x00 0x04 0x04>;
			ti,otap-del-sel-sdr104 = <0x05>;
			ti,itap-del-sel-sd-hs = <0x00>;
			clocks = <0x06 0x8d 0x03 0x06 0x8d 0x04>;
			vmmc-supply = <0x42>;
			ti,clkbuf-sel = <0x07>;
			ti,otap-del-sel-sdr50 = <0x0c>;
			ti,otap-del-sel-sdr12 = <0x0f>;
			ti,itap-del-sel-sdr12 = <0x00>;
			ti,otap-del-sel-ddr50 = <0x0c>;
			compatible = "ti,j721e-sdhci-4bit";
			status = "okay";
			disable-wp;
			ti,itap-del-sel-ddr50 = <0x02>;
			reg = <0x00 0x4fb0000 0x00 0x1000 0x00 0x4fb8000 0x00 0x400>;
			phandle = <0x13b>;
			ti,otap-del-sel-sdr25 = <0x0f>;
			ti,itap-del-sel-sdr25 = <0x00>;
			ti,itap-del-sel-legacy = <0x00>;
		};

		watchdog@2300000 {
			power-domains = <0x07 0x164 0x01>;
			assigned-clocks = <0x06 0x164 0x00>;
			assigned-clock-parents = <0x06 0x164 0x04>;
			clocks = <0x06 0x164 0x00>;
			compatible = "ti,j7-rti-wdt";
			status = "reserved";
			reg = <0x00 0x2300000 0x00 0x100>;
			phandle = <0x18e>;
		};

		dsp@66800000 {
			ti,sci = <0x05>;
			reg-names = "l2sram\0l1dram";
			firmware-name = "j784s4-c71_2-fw";
			resets = <0x1c 0x25 0x01>;
			memory-region = <0x1da 0x1db>;
			compatible = "ti,j721s2-c71-dsp";
			status = "okay";
			reg = <0x00 0x66800000 0x00 0x80000 0x00 0x66e00000 0x00 0xc000>;
			ti,sci-dev-id = <0x25>;
			phandle = <0x187>;
			mboxes = <0x76 0x77>;
			ti,sci-proc-ids = <0x32 0xff>;
		};

		watchdog@23f0000 {
			power-domains = <0x07 0x16c 0x01>;
			assigned-clocks = <0x06 0x16c 0x00>;
			assigned-clock-parents = <0x06 0x16c 0x04>;
			clocks = <0x06 0x16c 0x00>;
			compatible = "ti,j7-rti-wdt";
			status = "reserved";
			reg = <0x00 0x23f0000 0x00 0x100>;
			phandle = <0x195>;
		};

		timer@2460000 {
			power-domains = <0x07 0x67 0x01>;
			clock-names = "fck";
			assigned-clocks = <0x06 0x67 0x02>;
			assigned-clock-parents = <0x06 0x67 0x03>;
			interrupts = <0x00 0xe6 0x04>;
			clocks = <0x06 0x67 0x02>;
			compatible = "ti,am654-timer";
			status = "reserved";
			ti,timer-pwm;
			reg = <0x00 0x2460000 0x00 0x400>;
			phandle = <0xfc>;
		};

		pinctrl@104280 {
			#pinctrl-cells = <0x01>;
			pinctrl-single,register-width = <0x20>;
			compatible = "ti,j7200-padconf\0pinctrl-single";
			reg = <0x00 0x104280 0x00 0x20>;
			phandle = <0xf3>;
			pinctrl-single,function-mask = <0x1f>;
		};

		gpio@630000 {
			power-domains = <0x07 0xa6 0x01>;
			ti,davinci-gpio-unbanked = <0x00>;
			clock-names = "gpio";
			gpio-controller;
			interrupts = <0xac 0xad 0xae 0xaf 0xb0>;
			clocks = <0x06 0xa6 0x00>;
			interrupt-parent = <0x2c>;
			ti,ngpio = <0x42>;
			compatible = "ti,j721e-gpio\0ti,keystone-gpio";
			#interrupt-cells = <0x02>;
			status = "disabled";
			reg = <0x00 0x630000 0x00 0x100>;
			phandle = <0x116>;
			#gpio-cells = <0x02>;
			interrupt-controller;
		};

		i2c@2030000 {
			power-domains = <0x07 0x111 0x01>;
			pinctrl-names = "default";
			#address-cells = <0x01>;
			pinctrl-0 = <0x30>;
			clock-names = "fck";
			interrupts = <0x00 0xcb 0x04>;
			clocks = <0x06 0x111 0x02>;
			#size-cells = <0x00>;
			clock-frequency = <0x61a80>;
			compatible = "ti,j721e-i2c\0ti,omap4-i2c";
			status = "okay";
			reg = <0x00 0x2030000 0x00 0x100>;
			phandle = <0x11c>;

			gpio@20 {
				gpio-controller;
				compatible = "ti,tca6408";
				reg = <0x20>;
				phandle = <0x31>;
				#gpio-cells = <0x02>;
			};

			audio-codec@44 {
				VDD1-supply = <0x0f>;
				VDD2-supply = <0x0f>;
				clock-names = "scki";
				clocks = <0x32>;
				#sound-dai-cells = <0x01>;
				reset-gpios = <0x31 0x00 0x01>;
				compatible = "ti,pcm3168a";
				reg = <0x44>;
				phandle = <0x9f>;
				VCCDA1-supply = <0x33>;
				VCCAD1-supply = <0x33>;
				VCCDA2-supply = <0x33>;
				VCCAD2-supply = <0x33>;
			};
		};

		can@2691000 {
			power-domains = <0x07 0x104 0x01>;
			clock-names = "hclk\0cclk";
			reg-names = "m_can\0message_ram";
			interrupts = <0x00 0x255 0x04 0x00 0x256 0x04>;
			clocks = <0x06 0x104 0x06 0x06 0x104 0x01>;
			compatible = "bosch,m_can";
			status = "disabled";
			interrupt-names = "int0\0int1";
			reg = <0x00 0x2691000 0x00 0x200 0x00 0x2698000 0x00 0x8000>;
			phandle = <0x170>;
			bosch,mram-cfg = <0x00 0x80 0x40 0x40 0x40 0x40 0x20 0x20>;
		};

		can@27d1000 {
			power-domains = <0x07 0x102 0x01>;
			clock-names = "hclk\0cclk";
			reg-names = "m_can\0message_ram";
			interrupts = <0x00 0x24f 0x04 0x00 0x250 0x04>;
			clocks = <0x06 0x102 0x06 0x06 0x102 0x01>;
			compatible = "bosch,m_can";
			status = "disabled";
			interrupt-names = "int0\0int1";
			reg = <0x00 0x27d1000 0x00 0x200 0x00 0x27d8000 0x00 0x8000>;
			phandle = <0x16e>;
			bosch,mram-cfg = <0x00 0x80 0x40 0x40 0x40 0x40 0x20 0x20>;
		};

		usb@4104000 {
			power-domains = <0x07 0x18e 0x01>;
			ti,vbus-divider;
			pinctrl-names = "default";
			#address-cells = <0x02>;
			dma-coherent;
			pinctrl-0 = <0x2d>;
			clock-names = "ref\0lpm";
			assigned-clocks = <0x06 0x18e 0x15>;
			assigned-clock-parents = <0x06 0x18e 0x16>;
			bootph-all;
			clocks = <0x06 0x18e 0x15 0x06 0x18e 0x02>;
			#size-cells = <0x02>;
			compatible = "ti,j721e-usb";
			ranges;
			status = "okay";
			reg = <0x00 0x4104000 0x00 0x100>;
			phandle = <0x117>;

			usb@6000000 {
				phy-names = "cdns3,usb3-phy";
				reg-names = "otg\0xhci\0dev";
				bootph-all;
				interrupts = <0x00 0x60 0x04 0x00 0x66 0x04 0x00 0x78 0x04>;
				compatible = "cdns,usb3";
				interrupt-names = "host\0peripheral\0otg";
				phys = <0x2e>;
				reg = <0x00 0x6000000 0x00 0x10000 0x00 0x6010000 0x00 0x10000 0x00 0x6020000 0x00 0x10000>;
				phandle = <0x118>;
				dr_mode = "otg";
				maximum-speed = "super-speed";
			};
		};

		can@2721000 {
			power-domains = <0x07 0xf7 0x01>;
			clock-names = "hclk\0cclk";
			reg-names = "m_can\0message_ram";
			interrupts = <0x00 0x82 0x04 0x00 0x83 0x04>;
			clocks = <0x06 0xf7 0x06 0x06 0xf7 0x01>;
			compatible = "bosch,m_can";
			status = "disabled";
			interrupt-names = "int0\0int1";
			reg = <0x00 0x2721000 0x00 0x200 0x00 0x2728000 0x00 0x8000>;
			phandle = <0x163>;
			bosch,mram-cfg = <0x00 0x80 0x40 0x40 0x40 0x40 0x20 0x20>;
		};

		pcie@2920000 {
			power-domains = <0x07 0x14e 0x01>;
			dma-ranges = <0x2000000 0x00 0x00 0x00 0x00 0x10000 0x00>;
			#address-cells = <0x03>;
			dma-coherent;
			bus-range = <0x00 0xff>;
			clock-names = "fck";
			reg-names = "intd_cfg\0user_cfg\0reg\0cfg";
			interrupts = <0x00 0x156 0x01>;
			clocks = <0x06 0x14e 0x00>;
			#size-cells = <0x02>;
			max-link-speed = <0x03>;
			device_type = "pci";
			num-lanes = <0x02>;
			compatible = "ti,j784s4-pcie-host";
			ranges = <0x1000000 0x00 0x1000 0x44 0x1000 0x00 0x10000 0x2000000 0x00 0x11000 0x44 0x11000 0x00 0x7fef000>;
			msi-map = <0x00 0x45 0x20000 0x10000>;
			ti,syscon-pcie-ctrl = <0x87 0x00>;
			status = "disabled";
			vendor-id = <0x104c>;
			interrupt-names = "link_state";
			reg = <0x00 0x2920000 0x00 0x1000 0x00 0x2927000 0x00 0x400 0x00 0xe000000 0x00 0x800000 0x44 0x00 0x00 0x1000>;
			phandle = <0x1a5>;
			device-id = <0xb012>;
		};

		bus@30000000 {
			dma-ranges;
			#address-cells = <0x02>;
			dma-coherent;
			bootph-all;
			#size-cells = <0x02>;
			compatible = "simple-bus";
			ranges = <0x00 0x30000000 0x00 0x30000000 0x00 0xc400000>;
			ti,sci-dev-id = <0x118>;
			phandle = <0x140>;

			ringacc@3c000000 {
				ti,sci = <0x05>;
				reg-names = "rt\0fifos\0proxy_gcfg\0proxy_target\0cfg";
				ti,num-rings = <0x400>;
				compatible = "ti,am654-navss-ringacc";
				reg = <0x00 0x3c000000 0x00 0x400000 0x00 0x38000000 0x00 0x400000 0x00 0x31120000 0x00 0x100 0x00 0x33000000 0x00 0x40000 0x00 0x31080000 0x00 0x40000>;
				ti,sci-dev-id = <0x13b>;
				phandle = <0x51>;
				msi-parent = <0x14>;
				ti,sci-rm-range-gp-rings = <0x01>;
			};

			mailbox@31f80000 {
				interrupts = <0x1b4>;
				ti,mbox-num-users = <0x04>;
				#mbox-cells = <0x01>;
				interrupt-parent = <0x50>;
				ti,mbox-num-fifos = <0x10>;
				compatible = "ti,am654-mailbox";
				status = "okay";
				reg = <0x00 0x31f80000 0x00 0x200>;
				phandle = <0x1d>;

				mbox-mcu-r5fss0-core0 {
					ti,mbox-rx = <0x00 0x00 0x00>;
					phandle = <0x1e>;
					ti,mbox-tx = <0x01 0x00 0x00>;
				};

				mbox-mcu-r5fss0-core1 {
					ti,mbox-rx = <0x02 0x00 0x00>;
					phandle = <0x21>;
					ti,mbox-tx = <0x03 0x00 0x00>;
				};
			};

			dma-controller@311a0000 {
				ti,sci-rm-range-rchan = <0x21>;
				ti,sci = <0x05>;
				reg-names = "gcfg\0rchanrt\0tchanrt\0ringrt";
				compatible = "ti,j721s2-dmss-bcdma-csi";
				ti,sci-rm-range-tchan = <0x22>;
				reg = <0x00 0x311a0000 0x00 0x100 0x00 0x35d00000 0x00 0x20000 0x00 0x35c00000 0x00 0x10000 0x00 0x35e00000 0x00 0x80000>;
				ti,sci-dev-id = <0x119>;
				phandle = <0x3c>;
				msi-parent = <0x14>;
				#dma-cells = <0x03>;
			};

			mailbox@31f8b000 {
				ti,mbox-num-users = <0x04>;
				#mbox-cells = <0x01>;
				interrupt-parent = <0x50>;
				ti,mbox-num-fifos = <0x10>;
				compatible = "ti,am654-mailbox";
				status = "disabled";
				reg = <0x00 0x31f8b000 0x00 0x200>;
				phandle = <0x147>;
			};

			mailbox@31f99000 {
				ti,mbox-num-users = <0x04>;
				#mbox-cells = <0x01>;
				interrupt-parent = <0x50>;
				ti,mbox-num-fifos = <0x10>;
				compatible = "ti,am654-mailbox";
				status = "disabled";
				reg = <0x00 0x31f99000 0x00 0x200>;
				phandle = <0x151>;
			};

			mailbox@31f96000 {
				ti,mbox-num-users = <0x04>;
				#mbox-cells = <0x01>;
				interrupt-parent = <0x50>;
				ti,mbox-num-fifos = <0x10>;
				compatible = "ti,am654-mailbox";
				status = "disabled";
				reg = <0x00 0x31f96000 0x00 0x200>;
				phandle = <0x14e>;
			};

			hwlock@30e00000 {
				compatible = "ti,am654-hwspinlock";
				reg = <0x00 0x30e00000 0x00 0x1000>;
				phandle = <0x141>;
				#hwlock-cells = <0x01>;
			};

			mailbox@31f93000 {
				ti,mbox-num-users = <0x04>;
				#mbox-cells = <0x01>;
				interrupt-parent = <0x50>;
				ti,mbox-num-fifos = <0x10>;
				compatible = "ti,am654-mailbox";
				status = "disabled";
				reg = <0x00 0x31f93000 0x00 0x200>;
				phandle = <0x14b>;
			};

			mailbox@31f90000 {
				ti,mbox-num-users = <0x04>;
				#mbox-cells = <0x01>;
				interrupt-parent = <0x50>;
				ti,mbox-num-fifos = <0x10>;
				compatible = "ti,am654-mailbox";
				status = "disabled";
				reg = <0x00 0x31f90000 0x00 0x200>;
				phandle = <0x148>;
			};

			mailbox@31f88000 {
				ti,mbox-num-users = <0x04>;
				#mbox-cells = <0x01>;
				interrupt-parent = <0x50>;
				ti,mbox-num-fifos = <0x10>;
				compatible = "ti,am654-mailbox";
				status = "disabled";
				reg = <0x00 0x31f88000 0x00 0x200>;
				phandle = <0x144>;
			};

			mailbox@31f85000 {
				interrupts = <0x1a0>;
				ti,mbox-num-users = <0x04>;
				#mbox-cells = <0x01>;
				interrupt-parent = <0x50>;
				ti,mbox-num-fifos = <0x10>;
				compatible = "ti,am654-mailbox";
				status = "okay";
				reg = <0x00 0x31f85000 0x00 0x200>;
				phandle = <0x76>;

				mbox-c71-3 {
					ti,mbox-rx = <0x02 0x00 0x00>;
					phandle = <0x84>;
					ti,mbox-tx = <0x03 0x00 0x00>;
				};

				mbox-c71-2 {
					ti,mbox-rx = <0x00 0x00 0x00>;
					phandle = <0x77>;
					ti,mbox-tx = <0x01 0x00 0x00>;
				};
			};

			mailbox@31f82000 {
				interrupts = <0x1ac>;
				ti,mbox-num-users = <0x04>;
				#mbox-cells = <0x01>;
				interrupt-parent = <0x50>;
				ti,mbox-num-fifos = <0x10>;
				compatible = "ti,am654-mailbox";
				status = "okay";
				reg = <0x00 0x31f82000 0x00 0x200>;
				phandle = <0x61>;

				mbox-main-r5fss1-core1 {
					ti,mbox-rx = <0x02 0x00 0x00>;
					phandle = <0x65>;
					ti,mbox-tx = <0x03 0x00 0x00>;
				};

				mbox-main-r5fss1-core0 {
					ti,mbox-rx = <0x00 0x00 0x00>;
					phandle = <0x62>;
					ti,mbox-tx = <0x01 0x00 0x00>;
				};
			};

			interrupt-controller@310e0000 {
				ti,interrupt-ranges = <0x00 0x40 0x40 0x40 0x1c0 0x40 0x80 0x2a0 0x40>;
				ti,intr-trigger-type = <0x04>;
				ti,sci = <0x05>;
				interrupt-parent = <0x01>;
				compatible = "ti,sci-intr";
				#interrupt-cells = <0x01>;
				reg = <0x00 0x310e0000 0x00 0x4000>;
				ti,sci-dev-id = <0x11b>;
				phandle = <0x50>;
				interrupt-controller;
			};

			mailbox@31f9b000 {
				ti,mbox-num-users = <0x04>;
				#mbox-cells = <0x01>;
				interrupt-parent = <0x50>;
				ti,mbox-num-fifos = <0x10>;
				compatible = "ti,am654-mailbox";
				status = "disabled";
				reg = <0x00 0x31f9b000 0x00 0x200>;
				phandle = <0x153>;
			};

			cpts@310d0000 {
				ti,cpts-ext-ts-inputs = <0x08>;
				clock-names = "cpts";
				reg-names = "cpts";
				assigned-clocks = <0x06 0x3e 0x03>;
				assigned-clock-parents = <0x06 0x3e 0x05>;
				clocks = <0x06 0x11a 0x00>;
				interrupts-extended = <0x50 0x187>;
				compatible = "ti,j721e-cpts";
				interrupt-names = "cpts";
				reg = <0x00 0x310d0000 0x00 0x400>;
				ti,cpts-periodic-outputs = <0x06>;
			};

			navss-sram@30000000 {
				#address-cells = <0x01>;
				#size-cells = <0x01>;
				compatible = "mmio-sram";
				ranges = <0x00 0x00 0x30000000 0x10000>;
				reg = <0x00 0x30000000 0x00 0x10000>;
				phandle = <0x40>;
			};

			mailbox@31f8a000 {
				ti,mbox-num-users = <0x04>;
				#mbox-cells = <0x01>;
				interrupt-parent = <0x50>;
				ti,mbox-num-fifos = <0x10>;
				compatible = "ti,am654-mailbox";
				status = "disabled";
				reg = <0x00 0x31f8a000 0x00 0x200>;
				phandle = <0x146>;
			};

			mailbox@31f98000 {
				ti,mbox-num-users = <0x04>;
				#mbox-cells = <0x01>;
				interrupt-parent = <0x50>;
				ti,mbox-num-fifos = <0x10>;
				compatible = "ti,am654-mailbox";
				status = "disabled";
				reg = <0x00 0x31f98000 0x00 0x200>;
				phandle = <0x150>;
			};

			mailbox@31f95000 {
				ti,mbox-num-users = <0x04>;
				#mbox-cells = <0x01>;
				interrupt-parent = <0x50>;
				ti,mbox-num-fifos = <0x10>;
				compatible = "ti,am654-mailbox";
				status = "disabled";
				reg = <0x00 0x31f95000 0x00 0x200>;
				phandle = <0x14d>;
			};

			mailbox@31f92000 {
				ti,mbox-num-users = <0x04>;
				#mbox-cells = <0x01>;
				interrupt-parent = <0x50>;
				ti,mbox-num-fifos = <0x10>;
				compatible = "ti,am654-mailbox";
				status = "disabled";
				reg = <0x00 0x31f92000 0x00 0x200>;
				phandle = <0x14a>;
			};

			mailbox@31f87000 {
				ti,mbox-num-users = <0x04>;
				#mbox-cells = <0x01>;
				interrupt-parent = <0x50>;
				ti,mbox-num-fifos = <0x10>;
				compatible = "ti,am654-mailbox";
				status = "disabled";
				reg = <0x00 0x31f87000 0x00 0x200>;
				phandle = <0x143>;
			};

			mailbox@31f84000 {
				interrupts = <0x1a4>;
				ti,mbox-num-users = <0x04>;
				#mbox-cells = <0x01>;
				interrupt-parent = <0x50>;
				ti,mbox-num-fifos = <0x10>;
				compatible = "ti,am654-mailbox";
				status = "okay";
				reg = <0x00 0x31f84000 0x00 0x200>;
				phandle = <0x6f>;

				mbox-c71-1 {
					ti,mbox-rx = <0x02 0x00 0x00>;
					phandle = <0x73>;
					ti,mbox-tx = <0x03 0x00 0x00>;
				};

				mbox-c71-0 {
					ti,mbox-rx = <0x00 0x00 0x00>;
					phandle = <0x70>;
					ti,mbox-tx = <0x01 0x00 0x00>;
				};
			};

			mailbox@31f81000 {
				interrupts = <0x1b0>;
				ti,mbox-num-users = <0x04>;
				#mbox-cells = <0x01>;
				interrupt-parent = <0x50>;
				ti,mbox-num-fifos = <0x10>;
				compatible = "ti,am654-mailbox";
				status = "okay";
				reg = <0x00 0x31f81000 0x00 0x200>;
				phandle = <0x5a>;

				mbox-main-r5fss0-core1 {
					ti,mbox-rx = <0x02 0x00 0x00>;
					phandle = <0x5e>;
					ti,mbox-tx = <0x03 0x00 0x00>;
				};

				mbox-main-r5fss0-core0 {
					ti,mbox-rx = <0x00 0x00 0x00>;
					phandle = <0x5b>;
					ti,mbox-tx = <0x01 0x00 0x00>;
				};
			};

			mailbox@32c00000 {
				reg-names = "target_data\0rt\0scfg";
				bootph-all;
				interrupts = <0x00 0x25 0x04>;
				#mbox-cells = <0x01>;
				compatible = "ti,am654-secure-proxy";
				interrupt-names = "rx_011";
				reg = <0x00 0x32c00000 0x00 0x100000 0x00 0x32400000 0x00 0x100000 0x00 0x32800000 0x00 0x100000>;
				phandle = <0x03>;
			};

			dma-controller@31150000 {
				ti,sci-rm-range-rflow = <0x00>;
				ti,sci-rm-range-rchan = <0x0a 0x0b 0x0c>;
				ti,sci = <0x05>;
				reg-names = "gcfg\0rchanrt\0tchanrt\0tchan\0rchan\0rflow";
				ti,ringacc = <0x51>;
				compatible = "ti,j721e-navss-main-udmap";
				ti,sci-rm-range-tchan = <0x0d 0x0f 0x10>;
				reg = <0x00 0x31150000 0x00 0x100 0x00 0x34000000 0x00 0x80000 0x00 0x35000000 0x00 0x200000 0x00 0x30b00000 0x00 0x20000 0x00 0x30c00000 0x00 0x8000 0x00 0x30d00000 0x00 0x4000>;
				ti,sci-dev-id = <0x13f>;
				phandle = <0x24>;
				msi-parent = <0x14>;
				#dma-cells = <0x01>;
			};

			msi-controller@33d00000 {
				ti,interrupt-ranges = <0x00 0x00 0x100>;
				ti,sci = <0x05>;
				interrupt-parent = <0x50>;
				msi-controller;
				compatible = "ti,sci-inta";
				#interrupt-cells = <0x00>;
				reg = <0x00 0x33d00000 0x00 0x100000>;
				ti,sci-dev-id = <0x141>;
				phandle = <0x14>;
				ti,unmapped-event-sources = <0x3c>;
				interrupt-controller;
			};

			mailbox@31f9a000 {
				ti,mbox-num-users = <0x04>;
				#mbox-cells = <0x01>;
				interrupt-parent = <0x50>;
				ti,mbox-num-fifos = <0x10>;
				compatible = "ti,am654-mailbox";
				status = "disabled";
				reg = <0x00 0x31f9a000 0x00 0x200>;
				phandle = <0x152>;
			};

			mailbox@31f97000 {
				ti,mbox-num-users = <0x04>;
				#mbox-cells = <0x01>;
				interrupt-parent = <0x50>;
				ti,mbox-num-fifos = <0x10>;
				compatible = "ti,am654-mailbox";
				status = "disabled";
				reg = <0x00 0x31f97000 0x00 0x200>;
				phandle = <0x14f>;
			};

			mailbox@31f94000 {
				ti,mbox-num-users = <0x04>;
				#mbox-cells = <0x01>;
				interrupt-parent = <0x50>;
				ti,mbox-num-fifos = <0x10>;
				compatible = "ti,am654-mailbox";
				status = "disabled";
				reg = <0x00 0x31f94000 0x00 0x200>;
				phandle = <0x14c>;
			};

			mailbox@31f91000 {
				ti,mbox-num-users = <0x04>;
				#mbox-cells = <0x01>;
				interrupt-parent = <0x50>;
				ti,mbox-num-fifos = <0x10>;
				compatible = "ti,am654-mailbox";
				status = "disabled";
				reg = <0x00 0x31f91000 0x00 0x200>;
				phandle = <0x149>;
			};

			mailbox@31f89000 {
				ti,mbox-num-users = <0x04>;
				#mbox-cells = <0x01>;
				interrupt-parent = <0x50>;
				ti,mbox-num-fifos = <0x10>;
				compatible = "ti,am654-mailbox";
				status = "disabled";
				reg = <0x00 0x31f89000 0x00 0x200>;
				phandle = <0x145>;
			};

			mailbox@31f86000 {
				ti,mbox-num-users = <0x04>;
				#mbox-cells = <0x01>;
				interrupt-parent = <0x50>;
				ti,mbox-num-fifos = <0x10>;
				compatible = "ti,am654-mailbox";
				status = "disabled";
				reg = <0x00 0x31f86000 0x00 0x200>;
				phandle = <0x142>;
			};

			mailbox@31f83000 {
				interrupts = <0x1a8>;
				ti,mbox-num-users = <0x04>;
				#mbox-cells = <0x01>;
				interrupt-parent = <0x50>;
				ti,mbox-num-fifos = <0x10>;
				compatible = "ti,am654-mailbox";
				status = "okay";
				reg = <0x00 0x31f83000 0x00 0x200>;
				phandle = <0x68>;

				mbox-main-r5fss2-core0 {
					ti,mbox-rx = <0x00 0x00 0x00>;
					phandle = <0x69>;
					ti,mbox-tx = <0x01 0x00 0x00>;
				};

				mbox-main-r5fss2-core1 {
					ti,mbox-rx = <0x02 0x00 0x00>;
					phandle = <0x6c>;
					ti,mbox-tx = <0x03 0x00 0x00>;
				};
			};
		};

		timer@2530000 {
			power-domains = <0x07 0x74 0x01>;
			clock-names = "fck";
			assigned-clocks = <0x06 0x74 0x02>;
			assigned-clock-parents = <0x06 0x74 0x03>;
			interrupts = <0x00 0xf3 0x04>;
			clocks = <0x06 0x74 0x02>;
			compatible = "ti,am654-timer";
			ti,timer-pwm;
			reg = <0x00 0x2530000 0x00 0x400>;
			phandle = <0x109>;
		};

		interrupt-controller@a00000 {
			ti,interrupt-ranges = <0x08 0x188 0x38>;
			ti,intr-trigger-type = <0x01>;
			ti,sci = <0x05>;
			interrupt-parent = <0x01>;
			compatible = "ti,sci-intr";
			#interrupt-cells = <0x01>;
			reg = <0x00 0xa00000 0x00 0x800>;
			ti,sci-dev-id = <0x0a>;
			phandle = <0x2c>;
			interrupt-controller;
		};

		bridge@a000000 {
			power-domains = <0x07 0xd9 0x01>;
			pinctrl-names = "default";
			phy-names = "dpphy";
			pinctrl-0 = <0x7d>;
			reg-names = "mhdptx\0j721e-intg";
			interrupts = <0x00 0x266 0x04>;
			clocks = <0x06 0xd9 0x0b>;
			interrupt-parent = <0x01>;
			compatible = "ti,j721e-mhdp8546";
			status = "disabled";
			phys = <0x7e>;
			reg = <0x00 0xa000000 0x00 0x30a00 0x00 0x4f40000 0x00 0x20>;
			phandle = <0x19b>;

			ports {
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				phandle = <0x19c>;

				port@0 {
					reg = <0x00>;

					endpoint {
						remote-endpoint = <0x7f>;
						phandle = <0x81>;
					};
				};

				port@4 {
					reg = <0x04>;

					endpoint {
						remote-endpoint = <0x80>;
						phandle = <0x9a>;
					};
				};
			};
		};

		phy@4580000 {
			power-domains = <0x07 0xd4 0x01>;
			#phy-cells = <0x00>;
			compatible = "cdns,dphy-rx";
			status = "disabled";
			reg = <0x00 0x4580000 0x00 0x1100>;
			phandle = <0x3d>;
		};

		mmc@4f80000 {
			power-domains = <0x07 0x8c 0x01>;
			ti,itap-del-sel-mmc-hs = <0x0a>;
			ti,otap-del-sel-hs400 = <0x05>;
			ti,otap-del-sel-legacy = <0x00>;
			ti,otap-del-sel-mmc-hs = <0x00>;
			dma-coherent;
			clock-names = "clk_ahb\0clk_xin";
			assigned-clocks = <0x06 0x8c 0x02>;
			assigned-clock-parents = <0x06 0x8c 0x03>;
			mmc-hs200-1_8v;
			bus-width = <0x08>;
			ti,trm-icp = <0x08>;
			non-removable;
			bootph-all;
			mmc-hs400-1_8v;
			interrupts = <0x00 0x03 0x04>;
			clocks = <0x06 0x8c 0x01 0x06 0x8c 0x02>;
			ti,clkbuf-sel = <0x07>;
			ti,otap-del-sel-ddr52 = <0x06>;
			mmc-ddr-1_8v;
			compatible = "ti,j721e-sdhci-8bit";
			ti,otap-del-sel-hs200 = <0x08>;
			status = "okay";
			disable-wp;
			ti,driver-strength-ohm = <0x32>;
			reg = <0x00 0x4f80000 0x00 0x1000 0x00 0x4f88000 0x00 0x400>;
			phandle = <0x13a>;
			ti,strobe-sel = <0x77>;
			ti,itap-del-sel-legacy = <0x10>;
		};

		can@2761000 {
			power-domains = <0x07 0xfb 0x01>;
			clock-names = "hclk\0cclk";
			reg-names = "m_can\0message_ram";
			interrupts = <0x00 0x8e 0x04 0x00 0x8f 0x04>;
			clocks = <0x06 0xfb 0x06 0x06 0xfb 0x01>;
			compatible = "bosch,m_can";
			status = "disabled";
			interrupt-names = "int0\0int1";
			reg = <0x00 0x2761000 0x00 0x200 0x00 0x2768000 0x00 0x8000>;
			phandle = <0x167>;
			bosch,mram-cfg = <0x00 0x80 0x40 0x40 0x40 0x40 0x20 0x20>;
		};

		serial@2820000 {
			power-domains = <0x07 0x185 0x01>;
			clock-names = "fclk";
			interrupts = <0x00 0xc2 0x04>;
			clocks = <0x06 0x185 0x00>;
			compatible = "ti,j721e-uart\0ti,am654-uart";
			status = "reserved";
			reg = <0x00 0x2820000 0x00 0x200>;
			phandle = <0x10c>;
		};

		r5fss@5e00000 {
			power-domains = <0x07 0x151 0x01>;
			#address-cells = <0x01>;
			ti,cluster-mode = <0x00>;
			#size-cells = <0x01>;
			compatible = "ti,j721s2-r5fss";
			ranges = <0x5e00000 0x00 0x5e00000 0x20000 0x5f00000 0x00 0x5f00000 0x20000>;
			phandle = <0x17f>;

			r5f@5f00000 {
				ti,btcm-enable = <0x01>;
				ti,sci = <0x05>;
				reg-names = "atcm\0btcm";
				firmware-name = "j784s4-main-r5f1_1-fw";
				resets = <0x1c 0x156 0x01>;
				memory-region = <0x1d0 0x1d1>;
				compatible = "ti,j721s2-r5f";
				status = "okay";
				reg = <0x5f00000 0x10000 0x5f10000 0x10000>;
				ti,sci-dev-id = <0x156>;
				phandle = <0x181>;
				mboxes = <0x61 0x65>;
				ti,atcm-enable = <0x01>;
				ti,sci-proc-ids = <0x09 0xff>;
				ti,loczrama = <0x01>;
			};

			r5f@5e00000 {
				ti,btcm-enable = <0x01>;
				ti,sci = <0x05>;
				reg-names = "atcm\0btcm";
				firmware-name = "j784s4-main-r5f1_0-fw";
				resets = <0x1c 0x155 0x01>;
				memory-region = <0x1ce 0x1cf>;
				compatible = "ti,j721s2-r5f";
				status = "okay";
				reg = <0x5e00000 0x10000 0x5e10000 0x10000>;
				ti,sci-dev-id = <0x155>;
				phandle = <0x180>;
				mboxes = <0x61 0x62>;
				ti,atcm-enable = <0x01>;
				ti,sci-proc-ids = <0x08 0xff>;
				ti,loczrama = <0x01>;
			};
		};

		spi@2130000 {
			power-domains = <0x07 0x17b 0x01>;
			#address-cells = <0x01>;
			interrupts = <0x00 0xbb 0x04>;
			clocks = <0x06 0x17b 0x00>;
			#size-cells = <0x00>;
			compatible = "ti,am654-mcspi\0ti,omap4-mcspi";
			status = "disabled";
			reg = <0x00 0x2130000 0x00 0x400>;
			phandle = <0x176>;
		};

		mux-controller@a40000 {
			mux-reg-masks-state = <0x68 0x1ffff 0x10011>;
			compatible = "reg-mux";
			status = "okay";
			reg = <0x00 0xa40000 0x00 0x800>;
			phandle = <0x19a>;
			#mux-control-cells = <0x01>;
		};

		pwm@3030000 {
			power-domains = <0x07 0xde 0x01>;
			clock-names = "tbclk\0fck";
			clocks = <0x2a 0x03 0x06 0xde 0x00>;
			#pwm-cells = <0x03>;
			compatible = "ti,am654-ehrpwm\0ti,am3352-ehrpwm";
			status = "disabled";
			reg = <0x00 0x3030000 0x00 0x100>;
			phandle = <0xee>;
		};

		serial@2860000 {
			power-domains = <0x07 0x189 0x01>;
			clock-names = "fclk";
			interrupts = <0x00 0xc6 0x04>;
			clocks = <0x06 0x189 0x00>;
			compatible = "ti,j721e-uart\0ti,am654-uart";
			status = "disabled";
			reg = <0x00 0x2860000 0x00 0x200>;
			phandle = <0x110>;
		};

		spi@2170000 {
			power-domains = <0x07 0x17f 0x01>;
			#address-cells = <0x01>;
			interrupts = <0x00 0xbf 0x04>;
			clocks = <0x06 0x17f 0x00>;
			#size-cells = <0x00>;
			compatible = "ti,am654-mcspi\0ti,omap4-mcspi";
			status = "disabled";
			reg = <0x00 0x2170000 0x00 0x400>;
			phandle = <0x17a>;
		};

		watchdog@2200000 {
			power-domains = <0x07 0x15c 0x01>;
			assigned-clocks = <0x06 0x15c 0x00>;
			assigned-clock-parents = <0x06 0x15c 0x04>;
			clocks = <0x06 0x15c 0x00>;
			compatible = "ti,j7-rti-wdt";
			reg = <0x00 0x2200000 0x00 0x100>;
			phandle = <0x189>;
		};

		watchdog@22f0000 {
			power-domains = <0x07 0x168 0x01>;
			assigned-clocks = <0x06 0x168 0x00>;
			assigned-clock-parents = <0x06 0x168 0x04>;
			clocks = <0x06 0x168 0x00>;
			compatible = "ti,j7-rti-wdt";
			status = "reserved";
			reg = <0x00 0x22f0000 0x00 0x100>;
			phandle = <0x18d>;
		};

		timer@24a0000 {
			power-domains = <0x07 0x6b 0x01>;
			clock-names = "fck";
			assigned-clocks = <0x06 0x6b 0x02>;
			assigned-clock-parents = <0x06 0x6b 0x03>;
			interrupts = <0x00 0xea 0x04>;
			clocks = <0x06 0x6b 0x02>;
			compatible = "ti,am654-timer";
			ti,timer-pwm;
			reg = <0x00 0x24a0000 0x00 0x400>;
			phandle = <0x100>;
		};

		wiz@5020000 {
			power-domains = <0x07 0x196 0x01>;
			#reset-cells = <0x01>;
			#address-cells = <0x01>;
			clock-names = "fck\0core_ref_clk\0ext_ref_clk\0core_ref1_clk";
			assigned-clocks = <0x06 0x196 0x06>;
			assigned-clock-parents = <0x06 0x196 0x0a>;
			clocks = <0x06 0x196 0x02 0x06 0x196 0x06 0x4c 0x06 0x196 0x05>;
			#size-cells = <0x01>;
			#clock-cells = <0x01>;
			num-lanes = <0x04>;
			compatible = "ti,j784s4-wiz-10g";
			ranges = <0x5020000 0x00 0x5020000 0x10000>;
			status = "disabled";
			phandle = <0x89>;

			serdes@5020000 {
				#address-cells = <0x01>;
				clock-names = "refclk\0phy_en_refclk";
				reg-names = "torrent_phy";
				assigned-clocks = <0x89 0x00 0x89 0x01 0x89 0x02>;
				assigned-clock-parents = <0x06 0x196 0x06 0x06 0x196 0x06 0x06 0x196 0x06>;
				resets = <0x89 0x00>;
				clocks = <0x89 0x00 0x89 0x10>;
				#size-cells = <0x00>;
				#clock-cells = <0x01>;
				compatible = "ti,j721e-serdes-10g";
				status = "disabled";
				reg = <0x5020000 0x10000>;
				phandle = <0x1a7>;
				reset-names = "torrent_reset";
			};
		};

		bus@100000 {
			#address-cells = <0x01>;
			#size-cells = <0x01>;
			compatible = "simple-bus";
			ranges = <0x00 0x00 0x100000 0x1c000>;
			reg = <0x00 0x100000 0x00 0x1c000>;
			phandle = <0xe7>;

			pcie2-ctrl@4078 {
				compatible = "ti,j784s4-pcie-ctrl\0syscon";
				reg = <0x4078 0x04>;
				phandle = <0x87>;
			};

			pcie3-ctrl@407c {
				compatible = "ti,j784s4-pcie-ctrl\0syscon";
				reg = <0x407c 0x04>;
				phandle = <0x88>;
			};

			clock-controller@4140 {
				#clock-cells = <0x01>;
				compatible = "ti,am654-ehrpwm-tbclk";
				reg = <0x4140 0x18>;
				phandle = <0x2a>;
			};

			clock-controller@1a090 {
				compatible = "ti,j784s4-acspcie-proxy-ctrl\0syscon";
				reg = <0x1a090 0x04>;
				phandle = <0x4a>;
			};

			mux-controller@4080 {
				bootph-all;
				idle-states = <0x01 0x01 0x02 0x02 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x00 0x00 0x00 0x00>;
				mux-reg-masks = <0x00 0x03 0x04 0x03 0x08 0x03 0x0c 0x03 0x10 0x03 0x14 0x03 0x18 0x03 0x1c 0x03 0x20 0x03 0x24 0x03 0x28 0x03 0x2c 0x03 0x40 0x03 0x44 0x03 0x48 0x03 0x4c 0x03>;
				compatible = "reg-mux";
				reg = <0x4080 0x50>;
				phandle = <0xe9>;
				#mux-control-cells = <0x01>;
			};

			phy@4044 {
				#phy-cells = <0x01>;
				ti,qsgmii-main-ports = <0x07 0x07>;
				compatible = "ti,j784s4-cpsw9g-phy-gmii-sel";
				reg = <0x4044 0x20>;
				phandle = <0xe8>;
			};

			phy@4034 {
				#phy-cells = <0x01>;
				compatible = "ti,am654-phy-gmii-sel";
				reg = <0x4034 0x04>;
				phandle = <0x53>;
			};

			pcie0-ctrl@4070 {
				compatible = "ti,j784s4-pcie-ctrl\0syscon";
				reg = <0x4070 0x04>;
				phandle = <0x44>;
			};

			mux-controller@4000 {
				idle-states = <0x00>;
				mux-reg-masks = <0x00 0x8000000>;
				compatible = "reg-mux";
				reg = <0x4000 0x04>;
				phandle = <0xea>;
				#mux-control-cells = <0x01>;
			};

			clock@82e4 {
				assigned-clocks = <0x06 0x9d 0x22>;
				assigned-clock-parents = <0x06 0x9d 0x3f>;
				clocks = <0x06 0x9d 0x22>;
				#clock-cells = <0x00>;
				compatible = "ti,am62-audio-refclk";
				reg = <0x82e4 0x04>;
				phandle = <0x32>;
			};

			pcie1-ctrl@4074 {
				bootph-all;
				compatible = "ti,j784s4-pcie-ctrl\0syscon";
				reg = <0x4074 0x04>;
				phandle = <0x48>;
			};
		};

		mcasp@2b00000 {
			power-domains = <0x07 0x109 0x01>;
			pinctrl-names = "default";
			op-mode = <0x00>;
			pinctrl-0 = <0x83>;
			auxclk-fs-ratio = <0x100>;
			clock-names = "fck";
			reg-names = "mpu\0dat";
			assigned-clocks = <0x06 0x109 0x00>;
			assigned-clock-parents = <0x06 0x109 0x01>;
			interrupts = <0x00 0x220 0x04 0x00 0x221 0x04>;
			clocks = <0x06 0x109 0x00>;
			serial-dir = <0x00 0x00 0x00 0x01 0x02 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00>;
			dma-names = "tx\0rx";
			#sound-dai-cells = <0x00>;
			compatible = "ti,am33xx-mcasp-audio";
			status = "okay";
			interrupt-names = "tx\0rx";
			reg = <0x00 0x2b00000 0x00 0x2000 0x00 0x2b08000 0x00 0x1000>;
			phandle = <0x9e>;
			dmas = <0x24 0xc400 0x24 0x4400>;
			tdm-slots = <0x02>;
		};

		ticsi2rx@4520000 {
			power-domains = <0x07 0x4a 0x01>;
			#address-cells = <0x02>;
			#size-cells = <0x02>;
			dma-names = "rx0\0rx1\0rx2\0rx3\0rx4\0rx5\0rx6\0rx7";
			compatible = "ti,j721e-csi2rx-shim";
			ranges;
			status = "disabled";
			reg = <0x00 0x4520000 0x00 0x1000>;
			phandle = <0x131>;
			dmas = <0x3c 0x00 0x4980 0x00 0x3c 0x00 0x4981 0x00 0x3c 0x00 0x4982 0x00 0x3c 0x00 0x4983 0x00 0x3c 0x00 0x4984 0x00 0x3c 0x00 0x4985 0x00 0x3c 0x00 0x4986 0x00 0x3c 0x00 0x4987 0x00>;

			csi-bridge@4524000 {
				phy-names = "dphy";
				clock-names = "sys_clk\0p_clk\0pixel_if0_clk\0pixel_if1_clk\0pixel_if2_clk\0pixel_if3_clk";
				interrupts = <0x00 0xa1 0x04 0x00 0xa0 0x04>;
				clocks = <0x06 0x4a 0x02 0x06 0x4a 0x00 0x06 0x4a 0x02 0x06 0x4a 0x02 0x06 0x4a 0x03 0x06 0x4a 0x03>;
				compatible = "ti,j721e-csi2rx\0cdns,csi2rx";
				interrupt-names = "error_irq\0irq";
				phys = <0x3f>;
				reg = <0x00 0x4524000 0x00 0x1000>;
				phandle = <0x132>;

				ports {
					#address-cells = <0x01>;
					#size-cells = <0x00>;

					port@0 {
						status = "disabled";
						reg = <0x00>;
						phandle = <0x133>;
					};

					port@3 {
						status = "disabled";
						reg = <0x03>;
						phandle = <0x136>;
					};

					port@1 {
						status = "disabled";
						reg = <0x01>;
						phandle = <0x134>;
					};

					port@4 {
						status = "disabled";
						reg = <0x04>;
						phandle = <0x137>;
					};

					port@2 {
						status = "disabled";
						reg = <0x02>;
						phandle = <0x135>;
					};
				};
			};
		};

		watchdog@2240000 {
			power-domains = <0x07 0x160 0x01>;
			assigned-clocks = <0x06 0x160 0x00>;
			assigned-clock-parents = <0x06 0x160 0x04>;
			clocks = <0x06 0x160 0x00>;
			compatible = "ti,j7-rti-wdt";
			reg = <0x00 0x2240000 0x00 0x100>;
			phandle = <0x1a8>;
		};

		timer@24e0000 {
			power-domains = <0x07 0x6f 0x01>;
			clock-names = "fck";
			assigned-clocks = <0x06 0x6f 0x02>;
			assigned-clock-parents = <0x06 0x6f 0x03>;
			interrupts = <0x00 0xee 0x04>;
			clocks = <0x06 0x6f 0x02>;
			compatible = "ti,am654-timer";
			ti,timer-pwm;
			reg = <0x00 0x24e0000 0x00 0x400>;
			phandle = <0x104>;
		};

		video-codec@4210000 {
			power-domains = <0x07 0xf1 0x01>;
			interrupts = <0x00 0xb6 0x04>;
			clocks = <0x06 0xf1 0x02>;
			sram = <0x40>;
			compatible = "ti,j721s2-wave521c\0cnm,wave521c";
			reg = <0x00 0x4210000 0x00 0x10000>;
			phandle = <0x138>;
		};

		wiz@5060000 {
			power-domains = <0x07 0x194 0x01>;
			#reset-cells = <0x01>;
			#address-cells = <0x01>;
			clock-names = "fck\0core_ref_clk\0ext_ref_clk\0core_ref1_clk";
			assigned-clocks = <0x06 0x194 0x06>;
			assigned-clock-parents = <0x06 0x194 0x0a>;
			clocks = <0x06 0x194 0x02 0x06 0x194 0x06 0x4c 0x06 0x194 0x05>;
			#size-cells = <0x01>;
			#clock-cells = <0x01>;
			num-lanes = <0x04>;
			compatible = "ti,j784s4-wiz-10g";
			ranges = <0x5060000 0x00 0x5060000 0x10000>;
			status = "okay";
			phandle = <0x4d>;

			serdes@5060000 {
				#address-cells = <0x01>;
				clock-names = "refclk\0phy_en_refclk";
				reg-names = "torrent_phy";
				assigned-clocks = <0x4d 0x00 0x4d 0x01 0x4d 0x02>;
				assigned-clock-parents = <0x06 0x194 0x06 0x06 0x194 0x06 0x06 0x194 0x06>;
				resets = <0x4d 0x00>;
				clocks = <0x4d 0x00 0x4d 0x10>;
				#size-cells = <0x00>;
				#clock-cells = <0x01>;
				compatible = "ti,j721e-serdes-10g";
				status = "okay";
				reg = <0x5060000 0x10000>;
				phandle = <0x49>;
				reset-names = "torrent_reset";

				phy@3 {
					bootph-all;
					resets = <0x4d 0x04>;
					#phy-cells = <0x00>;
					cdns,phy-type = <0x04>;
					reg = <0x03>;
					phandle = <0x2e>;
					cdns,num-lanes = <0x01>;
				};

				phy@0 {
					bootph-all;
					resets = <0x4d 0x01 0x4d 0x02>;
					#phy-cells = <0x00>;
					cdns,phy-type = <0x02>;
					reg = <0x00>;
					phandle = <0x4b>;
					cdns,num-lanes = <0x02>;
				};
			};
		};

		mcasp@2b40000 {
			power-domains = <0x07 0x10d 0x01>;
			clock-names = "fck";
			reg-names = "mpu\0dat";
			assigned-clocks = <0x06 0x10d 0x00>;
			assigned-clock-parents = <0x06 0x10d 0x01>;
			interrupts = <0x00 0x228 0x04 0x00 0x229 0x04>;
			clocks = <0x06 0x10d 0x00>;
			dma-names = "tx\0rx";
			compatible = "ti,am33xx-mcasp-audio";
			status = "disabled";
			interrupt-names = "tx\0rx";
			reg = <0x00 0x2b40000 0x00 0x2000 0x00 0x2b48000 0x00 0x1000>;
			phandle = <0x1a2>;
			dmas = <0x24 0xc404 0x24 0x4404>;
		};

		watchdog@23c0000 {
			power-domains = <0x07 0x169 0x01>;
			assigned-clocks = <0x06 0x169 0x00>;
			assigned-clock-parents = <0x06 0x169 0x04>;
			clocks = <0x06 0x169 0x00>;
			compatible = "ti,j7-rti-wdt";
			status = "reserved";
			reg = <0x00 0x23c0000 0x00 0x100>;
			phandle = <0x192>;
		};

		timer@2430000 {
			power-domains = <0x07 0x64 0x01>;
			clock-names = "fck";
			assigned-clocks = <0x06 0x64 0x02>;
			assigned-clock-parents = <0x06 0x64 0x03>;
			interrupts = <0x00 0xe3 0x04>;
			clocks = <0x06 0x64 0x02>;
			compatible = "ti,am654-timer";
			status = "reserved";
			ti,timer-pwm;
			reg = <0x00 0x2430000 0x00 0x400>;
			phandle = <0xf9>;
		};

		pinctrl@104200 {
			#pinctrl-cells = <0x01>;
			pinctrl-single,register-width = <0x20>;
			compatible = "ti,j7200-padconf\0pinctrl-single";
			reg = <0x00 0x104200 0x00 0x50>;
			phandle = <0xf2>;
			pinctrl-single,function-mask = <0x07>;
		};

		gpio@600000 {
			power-domains = <0x07 0xa3 0x01>;
			ti,davinci-gpio-unbanked = <0x00>;
			clock-names = "gpio";
			gpio-controller;
			interrupts = <0x91 0x92 0x93 0x94 0x95>;
			clocks = <0x06 0xa3 0x00>;
			interrupt-parent = <0x2c>;
			ti,ngpio = <0x42>;
			compatible = "ti,j721e-gpio\0ti,keystone-gpio";
			#interrupt-cells = <0x02>;
			status = "okay";
			reg = <0x00 0x600000 0x00 0x100>;
			phandle = <0x98>;
			#gpio-cells = <0x02>;
			interrupt-controller;
		};

		phy@4480000 {
			power-domains = <0x07 0x192 0x01>;
			clock-names = "psm\0pll_ref";
			assigned-clocks = <0x06 0x192 0x03>;
			assigned-clock-parents = <0x06 0x192 0x04>;
			assigned-clock-rates = <0x124f800>;
			clocks = <0x06 0x192 0x14 0x06 0x192 0x03>;
			#phy-cells = <0x00>;
			compatible = "ti,j721e-dphy";
			status = "okay";
			reg = <0x00 0x4480000 0x00 0x1000>;
			phandle = <0x7a>;
		};

		i2c@2000000 {
			power-domains = <0x07 0x10e 0x01>;
			pinctrl-names = "default";
			#address-cells = <0x01>;
			pinctrl-0 = <0x2f>;
			clock-names = "fck";
			interrupts = <0x00 0xc8 0x04>;
			clocks = <0x06 0x10e 0x02>;
			#size-cells = <0x00>;
			clock-frequency = <0x61a80>;
			compatible = "ti,j721e-i2c\0ti,omap4-i2c";
			status = "okay";
			reg = <0x00 0x2000000 0x00 0x100>;
			phandle = <0x119>;

			gpio@22 {
				gpio-controller;
				gpio-line-names = "R_GPIO_RGMII1_RST\0ENET2_I2CMUX_SEL\0GPIO_USD_PWR_EN\0USBC_PWR_EN\0USBC_MODE_SEL1\0USBC_MODE_SEL0\0GPIO_LIN_EN\0R_CAN_STB\0CTRL_PM_I2C_OE#\0ENET2_EXP_PWRDN\0ENET2_EXP_SPARE2\0CDCI2_RSTZ\0USB2.0_MUX_SEL\0CANUART_MUX_SEL0\0CANUART_MUX2_SEL1\0CANUART_MUX1_SEL1\0ENET1_EXP_PWRDN\0ENET1_EXP_RESETZ\0ENET1_I2CMUX_SEL\0ENET1_EXP_SPARE2\0ENET2_EXP_RESETZ\0USER_INPUT1\0USER_LED1\0USER_LED2";
				compatible = "ti,tca6424";
				reg = <0x22>;
				phandle = <0x96>;
				#gpio-cells = <0x02>;

				p15-hog {
					gpio-hog;
					output-high;
					line-name = "CANUART_MUX1_SEL1";
					gpios = <0x0f 0x00>;
				};

				p13-hog {
					gpio-hog;
					output-high;
					line-name = "CANUART_MUX_SEL0";
					gpios = <0x0e 0x00>;
				};
			};

			gpio@20 {
				gpio-controller;
				gpio-line-names = "PCIE1_2L_MODE_SEL\0PCIE1_4L_PERSTZ\0PCIE1_2L_RC_RSTZ\0PCIE1_2L_EP_RST_EN\0PCIE0_4L_MODE_SEL\0PCIE0_4L_PERSTZ\0PCIE0_4L_RC_RSTZ\0PCIE0_4L_EP_RST_EN\0PCIE1_4L_PRSNT#\0PCIE0_4L_PRSNT#\0CDCI1_OE1/OE4\0CDCI1_OE2/OE3\0AUDIO_MUX_SEL\0EXP_MUX2\0EXP_MUX3\0GESI_EXP_PHY_RSTZ";
				compatible = "ti,tca6416";
				reg = <0x20>;
				phandle = <0x46>;
				#gpio-cells = <0x02>;

				p12-hog {
					gpio-hog;
					line-name = "AUDIO_MUX_SEL";
					gpios = <0x0c 0x00>;
					output-low;
				};
			};
		};

		can@27a1000 {
			power-domains = <0x07 0xff 0x01>;
			clock-names = "hclk\0cclk";
			reg-names = "m_can\0message_ram";
			interrupts = <0x00 0x246 0x04 0x00 0x247 0x04>;
			clocks = <0x06 0xff 0x06 0x06 0xff 0x01>;
			compatible = "bosch,m_can";
			status = "disabled";
			interrupt-names = "int0\0int1";
			reg = <0x00 0x27a1000 0x00 0x200 0x00 0x27a8000 0x00 0x8000>;
			phandle = <0x16b>;
			bosch,mram-cfg = <0x00 0x80 0x40 0x40 0x40 0x40 0x20 0x20>;
		};

		watchdog@2310000 {
			power-domains = <0x07 0x165 0x01>;
			assigned-clocks = <0x06 0x165 0x00>;
			assigned-clock-parents = <0x06 0x165 0x04>;
			clocks = <0x06 0x165 0x00>;
			compatible = "ti,j7-rti-wdt";
			status = "reserved";
			reg = <0x00 0x2310000 0x00 0x100>;
			phandle = <0x18f>;
		};

		timer@2470000 {
			power-domains = <0x07 0x68 0x01>;
			clock-names = "fck";
			assigned-clocks = <0x06 0x68 0x02>;
			assigned-clock-parents = <0x06 0x68 0x03>;
			interrupts = <0x00 0xe7 0x04>;
			clocks = <0x06 0x68 0x02>;
			compatible = "ti,am654-timer";
			status = "reserved";
			ti,timer-pwm;
			reg = <0x00 0x2470000 0x00 0x400>;
			phandle = <0xfd>;
		};

		i2c@2040000 {
			power-domains = <0x07 0x112 0x01>;
			pinctrl-names = "default";
			#address-cells = <0x01>;
			pinctrl-0 = <0x34>;
			clock-names = "fck";
			interrupts = <0x00 0xcc 0x04>;
			clocks = <0x06 0x112 0x02>;
			#size-cells = <0x00>;
			clock-frequency = <0x61a80>;
			compatible = "ti,j721e-i2c\0ti,omap4-i2c";
			status = "disabled";
			reg = <0x00 0x2040000 0x00 0x100>;
			phandle = <0x11d>;

			gpio@20 {
				gpio-controller;
				compatible = "ti,tca6408";
				reg = <0x20>;
				phandle = <0x36>;
				#gpio-cells = <0x02>;
			};

			dsi-edp-bridge@2c {
				vccio-supply = <0x37>;
				clock-names = "refclk";
				clocks = <0x35>;
				vcca-supply = <0x38>;
				compatible = "ti,sn65dsi86";
				enable-gpios = <0x36 0x02 0x00>;
				reg = <0x2c>;
				phandle = <0x11e>;
				vpll-supply = <0x37>;
				vcc-supply = <0x38>;

				ports {
					#address-cells = <0x01>;
					#size-cells = <0x00>;
					phandle = <0x11f>;

					port@0 {
						reg = <0x00>;

						endpoint {
							remote-endpoint = <0x39>;
							phandle = <0x7b>;
						};
					};

					port@1 {
						reg = <0x01>;

						endpoint {
							remote-endpoint = <0x3a>;
							phandle = <0xa1>;
						};
					};
				};
			};
		};

		dsp@67800000 {
			ti,sci = <0x05>;
			reg-names = "l2sram\0l1dram";
			firmware-name = "j784s4-c71_3-fw";
			resets = <0x1c 0x28 0x01>;
			memory-region = <0x1dc 0x1dd>;
			compatible = "ti,j721s2-c71-dsp";
			status = "okay";
			reg = <0x00 0x67800000 0x00 0x80000 0x00 0x67e00000 0x00 0xc000>;
			ti,sci-dev-id = <0x28>;
			phandle = <0x1a4>;
			mboxes = <0x76 0x84>;
			ti,sci-proc-ids = <0x33 0xff>;
		};

		crypto@4e00000 {
			power-domains = <0x07 0x171 0x01>;
			#address-cells = <0x02>;
			#size-cells = <0x02>;
			dma-names = "tx\0rx1\0rx2";
			compatible = "ti,j721e-sa2ul";
			ranges = <0x00 0x4e00000 0x00 0x4e00000 0x00 0x30000>;
			reg = <0x00 0x4e00000 0x00 0x1200>;
			phandle = <0xf4>;
			dmas = <0x24 0xca40 0x24 0x4a40 0x24 0x4a41>;

			rng@4e10000 {
				interrupts = <0x00 0x0b 0x04>;
				compatible = "inside-secure,safexcel-eip76";
				reg = <0x00 0x4e10000 0x00 0x7d>;
				phandle = <0xf5>;
			};
		};

		interrupt-controller@1800000 {
			#address-cells = <0x02>;
			interrupts = <0x01 0x09 0x04>;
			#size-cells = <0x02>;
			compatible = "arm,gic-v3";
			ranges;
			#interrupt-cells = <0x03>;
			reg = <0x00 0x1800000 0x00 0x10000 0x00 0x1900000 0x00 0x100000 0x00 0x6f000000 0x00 0x2000 0x00 0x6f010000 0x00 0x1000 0x00 0x6f020000 0x00 0x2000>;
			phandle = <0x01>;
			interrupt-controller;

			msi-controller@1820000 {
				socionext,synquacer-pre-its = <0x1000000 0x400000>;
				msi-controller;
				compatible = "arm,gic-v3-its";
				reg = <0x00 0x1820000 0x00 0x10000>;
				phandle = <0x45>;
				#msi-cells = <0x01>;
			};
		};

		pinctrl@11c000 {
			#pinctrl-cells = <0x01>;
			bootph-all;
			pinctrl-single,register-width = <0x20>;
			compatible = "ti,j7200-padconf\0pinctrl-single";
			reg = <0x00 0x11c000 0x00 0x120>;
			phandle = <0xf1>;
			pinctrl-single,function-mask = <0xffffffff>;

			main-mcan16-default-pins {
				pinctrl-single,pins = <0x28 0x54000 0x24 0x10000>;
				phandle = <0x58>;
			};

			main-usbss0-default-pins {
				pinctrl-single,pins = <0xec 0x10006>;
				bootph-all;
				phandle = <0x2d>;
			};

			audio-ext-refclk1-default-pins {
				pinctrl-single,pins = <0x78 0x10001>;
				phandle = <0x04>;
			};

			main-i2c3-default-pins {
				pinctrl-single,pins = <0x64 0x5400d 0x60 0x5400d>;
				phandle = <0x30>;
			};

			vdd-sd-dv-default-pins {
				pinctrl-single,pins = <0x20 0x54007>;
				phandle = <0x97>;
			};

			main-i2c0-default-pins {
				pinctrl-single,pins = <0xe0 0x54000 0xe4 0x54000>;
				phandle = <0x2f>;
			};

			main-cpsw2g-mdio-default-pins {
				pinctrl-single,pins = <0xc0 0x54006 0xbc 0x54006>;
				phandle = <0x55>;
			};

			main-i2c4-default-pins {
				pinctrl-single,pins = <0x14 0x64008 0x10 0x64008>;
				phandle = <0x34>;
			};

			dp0-default-pins {
				pinctrl-single,pins = <0xcc 0x5400c>;
				phandle = <0x7d>;
			};

			main-mcan4-default-pins {
				pinctrl-single,pins = <0x88 0x54000 0x84 0x10000>;
				phandle = <0x56>;
			};

			main-i2c5-default-pins {
				pinctrl-single,pins = <0x1c 0x54008 0x18 0x54008>;
				phandle = <0x3b>;
			};

			main-uart8-default-pins {
				pinctrl-single,pins = <0x40 0x5400e 0x44 0x1000e 0xd0 0x5400b 0xd4 0x1000b>;
				bootph-all;
				phandle = <0x2b>;
			};

			main-mcasp0-default-pins {
				pinctrl-single,pins = <0x38 0x01 0x3c 0x01 0x7c 0x01 0x80 0x44001>;
				phandle = <0x83>;
			};

			main-mmc1-default-pins {
				pinctrl-single,pins = <0x104 0x54000 0x108 0x54000 0x100 0x54000 0xfc 0x54000 0xf8 0x54000 0xf4 0x54000 0xf0 0x54000 0xe8 0x54008>;
				bootph-all;
				phandle = <0x41>;
			};

			main-cpsw2g-default-pins {
				pinctrl-single,pins = <0xb8 0x54006 0xa0 0x54006 0xa4 0x54006 0xa8 0x54006 0xb0 0x54006 0xac 0x54006 0x8c 0x54006 0x90 0x54006 0x94 0x54006 0x98 0x54006 0xb4 0x54006 0x9c 0x54006>;
				phandle = <0x52>;
			};
		};

		timer@2500000 {
			power-domains = <0x07 0x71 0x01>;
			clock-names = "fck";
			assigned-clocks = <0x06 0x71 0x02>;
			assigned-clock-parents = <0x06 0x71 0x03>;
			interrupts = <0x00 0xf0 0x04>;
			clocks = <0x06 0x71 0x02>;
			compatible = "ti,am654-timer";
			ti,timer-pwm;
			reg = <0x00 0x2500000 0x00 0x400>;
			phandle = <0x106>;
		};

		can@2731000 {
			power-domains = <0x07 0xf8 0x01>;
			clock-names = "hclk\0cclk";
			reg-names = "m_can\0message_ram";
			interrupts = <0x00 0x85 0x04 0x00 0x86 0x04>;
			clocks = <0x06 0xf8 0x06 0x06 0xf8 0x01>;
			compatible = "bosch,m_can";
			status = "disabled";
			interrupt-names = "int0\0int1";
			reg = <0x00 0x2731000 0x00 0x200 0x00 0x2738000 0x00 0x8000>;
			phandle = <0x164>;
			bosch,mram-cfg = <0x00 0x80 0x40 0x40 0x40 0x40 0x20 0x20>;
		};

		pcie@2930000 {
			power-domains = <0x07 0x14f 0x01>;
			dma-ranges = <0x2000000 0x00 0x00 0x00 0x00 0x10000 0x00>;
			#address-cells = <0x03>;
			dma-coherent;
			bus-range = <0x00 0xff>;
			clock-names = "fck";
			reg-names = "intd_cfg\0user_cfg\0reg\0cfg";
			interrupts = <0x00 0x162 0x01>;
			clocks = <0x06 0x14f 0x00>;
			#size-cells = <0x02>;
			max-link-speed = <0x03>;
			device_type = "pci";
			num-lanes = <0x02>;
			compatible = "ti,j784s4-pcie-host";
			ranges = <0x1000000 0x00 0x1000 0x44 0x10001000 0x00 0x10000 0x2000000 0x00 0x11000 0x44 0x10011000 0x00 0x7fef000>;
			msi-map = <0x00 0x45 0x30000 0x10000>;
			ti,syscon-pcie-ctrl = <0x88 0x00>;
			status = "disabled";
			vendor-id = <0x104c>;
			interrupt-names = "link_state";
			reg = <0x00 0x2930000 0x00 0x1000 0x00 0x2937000 0x00 0x400 0x00 0xe800000 0x00 0x800000 0x44 0x10000000 0x00 0x1000>;
			phandle = <0x1a6>;
			device-id = <0xb012>;
		};

		ethernet@c200000 {
			power-domains = <0x07 0x3e 0x01>;
			pinctrl-names = "default";
			#address-cells = <0x02>;
			dma-coherent;
			pinctrl-0 = <0x52>;
			clock-names = "fck";
			reg-names = "cpsw_nuss";
			clocks = <0x06 0x3e 0x00>;
			#size-cells = <0x02>;
			dma-names = "tx0\0tx1\0tx2\0tx3\0tx4\0tx5\0tx6\0tx7\0rx";
			compatible = "ti,j721e-cpsw-nuss";
			ranges = <0x00 0x00 0x00 0xc200000 0x00 0x200000>;
			status = "okay";
			reg = <0x00 0xc200000 0x00 0x200000>;
			phandle = <0x15e>;
			dmas = <0x24 0xc640 0x24 0xc641 0x24 0xc642 0x24 0xc643 0x24 0xc644 0x24 0xc645 0x24 0xc646 0x24 0xc647 0x24 0x4640>;

			cpts@3d000 {
				ti,cpts-ext-ts-inputs = <0x04>;
				clock-names = "cpts";
				clocks = <0x06 0x3e 0x03>;
				interrupts-extended = <0x01 0x00 0x15 0x04>;
				compatible = "ti,am65-cpts";
				interrupt-names = "cpts";
				reg = <0x00 0x3d000 0x00 0x400>;
				ti,cpts-periodic-outputs = <0x02>;
			};

			mdio@f00 {
				pinctrl-names = "default";
				#address-cells = <0x01>;
				pinctrl-0 = <0x55>;
				clock-names = "fck";
				clocks = <0x06 0x3e 0x00>;
				bus_freq = <0xf4240>;
				#size-cells = <0x00>;
				compatible = "ti,cpsw-mdio\0ti,davinci_mdio";
				status = "okay";
				reg = <0x00 0xf00 0x00 0x100>;
				phandle = <0x160>;

				ethernet-phy@0 {
					ti,min-output-impedance;
					ti,fifo-depth = <0x01>;
					ti,rx-internal-delay = <0x07>;
					reg = <0x00>;
					phandle = <0x54>;
				};
			};

			ethernet-ports {
				#address-cells = <0x01>;
				#size-cells = <0x00>;

				port@1 {
					phy-mode = "rgmii-rxid";
					label = "port1";
					status = "okay";
					phys = <0x53 0x01>;
					ti,mac-only;
					reg = <0x01>;
					phandle = <0x15f>;
					phy-handle = <0x54>;
				};
			};
		};

		sram@70000000 {
			#address-cells = <0x01>;
			#size-cells = <0x01>;
			compatible = "mmio-sram";
			ranges = <0x00 0x00 0x70000000 0x800000>;
			reg = <0x00 0x70000000 0x00 0x800000>;
			phandle = <0xe6>;

			tifs-sram@1f0000 {
				reg = <0x1f0000 0x10000>;
			};

			atf-sram@0 {
				reg = <0x00 0x20000>;
			};

			l3cache-sram@200000 {
				reg = <0x200000 0x200000>;
			};
		};

		phy@4590000 {
			power-domains = <0x07 0xd5 0x01>;
			#phy-cells = <0x00>;
			compatible = "cdns,dphy-rx";
			status = "disabled";
			reg = <0x00 0x4590000 0x00 0x1100>;
			phandle = <0x3e>;
		};

		spi@2100000 {
			power-domains = <0x07 0x178 0x01>;
			#address-cells = <0x01>;
			interrupts = <0x00 0xb8 0x04>;
			clocks = <0x06 0x178 0x00>;
			#size-cells = <0x00>;
			compatible = "ti,am654-mcspi\0ti,omap4-mcspi";
			status = "disabled";
			reg = <0x00 0x2100000 0x00 0x400>;
			phandle = <0x173>;
		};

		can@2771000 {
			power-domains = <0x07 0xfc 0x01>;
			clock-names = "hclk\0cclk";
			reg-names = "m_can\0message_ram";
			interrupts = <0x00 0x91 0x04 0x00 0x92 0x04>;
			clocks = <0x06 0xfc 0x06 0x06 0xfc 0x01>;
			compatible = "bosch,m_can";
			status = "disabled";
			interrupt-names = "int0\0int1";
			reg = <0x00 0x2771000 0x00 0x200 0x00 0x2778000 0x00 0x8000>;
			phandle = <0x168>;
			bosch,mram-cfg = <0x00 0x80 0x40 0x40 0x40 0x40 0x20 0x20>;
		};

		pwm@3000000 {
			power-domains = <0x07 0xdb 0x01>;
			clock-names = "tbclk\0fck";
			clocks = <0x2a 0x00 0x06 0xdb 0x00>;
			#pwm-cells = <0x03>;
			compatible = "ti,am654-ehrpwm\0ti,am3352-ehrpwm";
			status = "disabled";
			reg = <0x00 0x3000000 0x00 0x100>;
			phandle = <0xeb>;
		};

		serial@2830000 {
			power-domains = <0x07 0x186 0x01>;
			clock-names = "fclk";
			interrupts = <0x00 0xc3 0x04>;
			clocks = <0x06 0x186 0x00>;
			compatible = "ti,j721e-uart\0ti,am654-uart";
			status = "disabled";
			reg = <0x00 0x2830000 0x00 0x200>;
			phandle = <0x10d>;
		};

		spi@2140000 {
			power-domains = <0x07 0x17c 0x01>;
			#address-cells = <0x01>;
			interrupts = <0x00 0xbc 0x04>;
			clocks = <0x06 0x17c 0x00>;
			#size-cells = <0x00>;
			compatible = "ti,am654-mcspi\0ti,omap4-mcspi";
			status = "disabled";
			reg = <0x00 0x2140000 0x00 0x400>;
			phandle = <0x177>;
		};

		pwm@3040000 {
			power-domains = <0x07 0xdf 0x01>;
			clock-names = "tbclk\0fck";
			clocks = <0x2a 0x04 0x06 0xdf 0x00>;
			#pwm-cells = <0x03>;
			compatible = "ti,am654-ehrpwm\0ti,am3352-ehrpwm";
			status = "disabled";
			reg = <0x00 0x3040000 0x00 0x100>;
			phandle = <0xef>;
		};

		serial@2870000 {
			power-domains = <0x07 0x18a 0x01>;
			clock-names = "fclk";
			interrupts = <0x00 0xc7 0x04>;
			clocks = <0x06 0x18a 0x00>;
			compatible = "ti,j721e-uart\0ti,am654-uart";
			status = "disabled";
			reg = <0x00 0x2870000 0x00 0x200>;
			phandle = <0x111>;
		};

		can@26a1000 {
			power-domains = <0x07 0x105 0x01>;
			pinctrl-names = "default";
			pinctrl-0 = <0x58>;
			clock-names = "hclk\0cclk";
			reg-names = "m_can\0message_ram";
			interrupts = <0x00 0x310 0x04 0x00 0x311 0x04>;
			clocks = <0x06 0x105 0x06 0x06 0x105 0x01>;
			compatible = "bosch,m_can";
			status = "okay";
			interrupt-names = "int0\0int1";
			phys = <0x59>;
			reg = <0x00 0x26a1000 0x00 0x200 0x00 0x26a8000 0x00 0x8000>;
			phandle = <0x171>;
			bosch,mram-cfg = <0x00 0x80 0x40 0x40 0x40 0x40 0x20 0x20>;
		};

		watchdog@2210000 {
			power-domains = <0x07 0x15d 0x01>;
			assigned-clocks = <0x06 0x15d 0x00>;
			assigned-clock-parents = <0x06 0x15d 0x04>;
			clocks = <0x06 0x15d 0x00>;
			compatible = "ti,j7-rti-wdt";
			reg = <0x00 0x2210000 0x00 0x100>;
			phandle = <0x18a>;
		};

		timer@24b0000 {
			power-domains = <0x07 0x6c 0x01>;
			clock-names = "fck";
			assigned-clocks = <0x06 0x6c 0x02>;
			assigned-clock-parents = <0x06 0x6c 0x03>;
			interrupts = <0x00 0xeb 0x04>;
			clocks = <0x06 0x6c 0x02>;
			compatible = "ti,am654-timer";
			ti,timer-pwm;
			reg = <0x00 0x24b0000 0x00 0x400>;
			phandle = <0x101>;
		};

		r5fss@5c00000 {
			power-domains = <0x07 0x150 0x01>;
			#address-cells = <0x01>;
			ti,cluster-mode = <0x00>;
			#size-cells = <0x01>;
			compatible = "ti,j721s2-r5fss";
			ranges = <0x5c00000 0x00 0x5c00000 0x20000 0x5d00000 0x00 0x5d00000 0x20000>;
			phandle = <0x17c>;

			r5f@5d00000 {
				ti,btcm-enable = <0x01>;
				ti,sci = <0x05>;
				reg-names = "atcm\0btcm";
				firmware-name = "j784s4-main-r5f0_1-fw";
				resets = <0x1c 0x154 0x01>;
				memory-region = <0x1cc 0x1cd>;
				compatible = "ti,j721s2-r5f";
				status = "okay";
				reg = <0x5d00000 0x10000 0x5d10000 0x10000>;
				ti,sci-dev-id = <0x154>;
				phandle = <0x17e>;
				mboxes = <0x5a 0x5e>;
				ti,atcm-enable = <0x01>;
				ti,sci-proc-ids = <0x07 0xff>;
				ti,loczrama = <0x01>;
			};

			r5f@5c00000 {
				ti,btcm-enable = <0x01>;
				ti,sci = <0x05>;
				reg-names = "atcm\0btcm";
				firmware-name = "j784s4-main-r5f0_0-fw";
				resets = <0x1c 0x153 0x01>;
				memory-region = <0x1c8 0x1c9 0x1ca 0x1cb>;
				compatible = "ti,j721s2-r5f";
				status = "okay";
				reg = <0x5c00000 0x10000 0x5c10000 0x10000>;
				ti,sci-dev-id = <0x153>;
				phandle = <0x17d>;
				mboxes = <0x5a 0x5b>;
				ti,atcm-enable = <0x01>;
				ti,sci-proc-ids = <0x06 0xff>;
				ti,loczrama = <0x01>;
			};
		};

		mcasp@2b10000 {
			power-domains = <0x07 0x10a 0x01>;
			clock-names = "fck";
			reg-names = "mpu\0dat";
			assigned-clocks = <0x06 0x10a 0x00>;
			assigned-clock-parents = <0x06 0x10a 0x01>;
			interrupts = <0x00 0x222 0x04 0x00 0x223 0x04>;
			clocks = <0x06 0x10a 0x00>;
			dma-names = "tx\0rx";
			compatible = "ti,am33xx-mcasp-audio";
			status = "disabled";
			interrupt-names = "tx\0rx";
			reg = <0x00 0x2b10000 0x00 0x2000 0x00 0x2b18000 0x00 0x1000>;
			phandle = <0x19f>;
			dmas = <0x24 0xc401 0x24 0x4401>;
		};

		dsp@64800000 {
			ti,sci = <0x05>;
			reg-names = "l2sram\0l1dram";
			firmware-name = "j784s4-c71_0-fw";
			resets = <0x1c 0x1e 0x01>;
			memory-region = <0x1d6 0x1d7>;
			compatible = "ti,j721s2-c71-dsp";
			status = "okay";
			reg = <0x00 0x64800000 0x00 0x80000 0x00 0x64e00000 0x00 0xc000>;
			ti,sci-dev-id = <0x1e>;
			phandle = <0x185>;
			mboxes = <0x6f 0x70>;
			ti,sci-proc-ids = <0x30 0xff>;
		};

		watchdog@2250000 {
			power-domains = <0x07 0x161 0x01>;
			assigned-clocks = <0x06 0x161 0x00>;
			assigned-clock-parents = <0x06 0x161 0x04>;
			clocks = <0x06 0x161 0x00>;
			compatible = "ti,j7-rti-wdt";
			reg = <0x00 0x2250000 0x00 0x100>;
			phandle = <0x1a9>;
		};

		timer@2400000 {
			power-domains = <0x07 0x61 0x01>;
			clock-names = "fck";
			assigned-clocks = <0x06 0x61 0x02>;
			assigned-clock-parents = <0x06 0x61 0x03>;
			interrupts = <0x00 0xe0 0x04>;
			clocks = <0x06 0x61 0x02>;
			compatible = "ti,am654-timer";
			status = "reserved";
			ti,timer-pwm;
			reg = <0x00 0x2400000 0x00 0x400>;
			phandle = <0xf6>;
		};

		timer@24f0000 {
			power-domains = <0x07 0x70 0x01>;
			clock-names = "fck";
			assigned-clocks = <0x06 0x70 0x02>;
			assigned-clock-parents = <0x06 0x70 0x03>;
			interrupts = <0x00 0xef 0x04>;
			clocks = <0x06 0x70 0x02>;
			compatible = "ti,am654-timer";
			ti,timer-pwm;
			reg = <0x00 0x24f0000 0x00 0x400>;
			phandle = <0x105>;
		};

		video-codec@4220000 {
			power-domains = <0x07 0xf2 0x01>;
			interrupts = <0x00 0xb7 0x04>;
			clocks = <0x06 0xf2 0x02>;
			sram = <0x40>;
			compatible = "ti,j721s2-wave521c\0cnm,wave521c";
			reg = <0x00 0x4220000 0x00 0x10000>;
			phandle = <0x139>;
		};

		wiz@5070000 {
			power-domains = <0x07 0x195 0x01>;
			#reset-cells = <0x01>;
			#address-cells = <0x01>;
			clock-names = "fck\0core_ref_clk\0ext_ref_clk\0core_ref1_clk";
			assigned-clocks = <0x06 0x195 0x06>;
			assigned-clock-parents = <0x06 0x195 0x0a>;
			clocks = <0x06 0x195 0x02 0x06 0x195 0x06 0x4c 0x06 0x195 0x05>;
			#size-cells = <0x01>;
			#clock-cells = <0x01>;
			num-lanes = <0x04>;
			compatible = "ti,j784s4-wiz-10g";
			ranges = <0x5070000 0x00 0x5070000 0x10000>;
			status = "okay";
			phandle = <0x4e>;

			serdes@5070000 {
				#address-cells = <0x01>;
				clock-names = "refclk\0phy_en_refclk";
				reg-names = "torrent_phy";
				assigned-clocks = <0x4e 0x00 0x4e 0x01 0x4e 0x02>;
				assigned-clock-parents = <0x06 0x195 0x06 0x06 0x195 0x06 0x06 0x195 0x06>;
				resets = <0x4e 0x00>;
				clocks = <0x4e 0x00 0x4e 0x10>;
				#size-cells = <0x00>;
				#clock-cells = <0x01>;
				compatible = "ti,j721e-serdes-10g";
				status = "okay";
				reg = <0x5070000 0x10000>;
				phandle = <0x13e>;
				reset-names = "torrent_reset";

				phy@0 {
					resets = <0x4e 0x01 0x4e 0x02 0x4e 0x03 0x4e 0x04>;
					#phy-cells = <0x00>;
					cdns,phy-type = <0x02>;
					reg = <0x00>;
					phandle = <0x47>;
					cdns,num-lanes = <0x04>;
				};
			};
		};

		r5fss@5900000 {
			power-domains = <0x07 0x152 0x01>;
			#address-cells = <0x01>;
			ti,cluster-mode = <0x00>;
			#size-cells = <0x01>;
			compatible = "ti,j721s2-r5fss";
			ranges = <0x5900000 0x00 0x5900000 0x20000 0x5a00000 0x00 0x5a00000 0x20000>;
			phandle = <0x182>;

			r5f@5900000 {
				ti,btcm-enable = <0x01>;
				ti,sci = <0x05>;
				reg-names = "atcm\0btcm";
				firmware-name = "j784s4-main-r5f2_0-fw";
				resets = <0x1c 0x157 0x01>;
				memory-region = <0x1d2 0x1d3>;
				compatible = "ti,j721s2-r5f";
				status = "okay";
				reg = <0x5900000 0x10000 0x5910000 0x10000>;
				ti,sci-dev-id = <0x157>;
				phandle = <0x183>;
				mboxes = <0x68 0x69>;
				ti,atcm-enable = <0x01>;
				ti,sci-proc-ids = <0x0a 0xff>;
				ti,loczrama = <0x01>;
			};

			r5f@5a00000 {
				ti,btcm-enable = <0x01>;
				ti,sci = <0x05>;
				reg-names = "atcm\0btcm";
				firmware-name = "j784s4-main-r5f2_1-fw";
				resets = <0x1c 0x158 0x01>;
				memory-region = <0x1d4 0x1d5>;
				compatible = "ti,j721s2-r5f";
				status = "okay";
				reg = <0x5a00000 0x10000 0x5a10000 0x10000>;
				ti,sci-dev-id = <0x158>;
				phandle = <0x184>;
				mboxes = <0x68 0x6c>;
				ti,atcm-enable = <0x01>;
				ti,sci-proc-ids = <0x0b 0xff>;
				ti,loczrama = <0x01>;
			};
		};

		ufs-wrapper@4e80000 {
			power-domains = <0x07 0x183 0x01>;
			#address-cells = <0x02>;
			assigned-clocks = <0x06 0x183 0x03>;
			assigned-clock-parents = <0x06 0x183 0x06>;
			clocks = <0x06 0x183 0x03>;
			#size-cells = <0x02>;
			compatible = "ti,j721e-ufs";
			ranges;
			status = "okay";
			reg = <0x00 0x4e80000 0x00 0x100>;
			phandle = <0x17b>;

			ufs@4e84000 {
				freq-table-hz = <0xee6b280 0xee6b280 0x124f800 0x124f800 0x124f800 0x124f800>;
				dma-coherent;
				clock-names = "core_clk\0phy_clk\0ref_clk";
				interrupts = <0x00 0x11 0x04>;
				clocks = <0x06 0x183 0x01 0x06 0x183 0x03 0x06 0x183 0x03>;
				compatible = "cdns,ufshc-m31-16nm\0jedec,ufs-2.0";
				reg = <0x00 0x4e84000 0x00 0x10000>;
			};
		};

		watchdog@23d0000 {
			power-domains = <0x07 0x16a 0x01>;
			assigned-clocks = <0x06 0x16a 0x00>;
			assigned-clock-parents = <0x06 0x16a 0x04>;
			clocks = <0x06 0x16a 0x00>;
			compatible = "ti,j7-rti-wdt";
			status = "reserved";
			reg = <0x00 0x23d0000 0x00 0x100>;
			phandle = <0x193>;
		};

		timer@2440000 {
			power-domains = <0x07 0x65 0x01>;
			clock-names = "fck";
			assigned-clocks = <0x06 0x65 0x02>;
			assigned-clock-parents = <0x06 0x65 0x03>;
			interrupts = <0x00 0xe4 0x04>;
			clocks = <0x06 0x65 0x02>;
			compatible = "ti,am654-timer";
			status = "reserved";
			ti,timer-pwm;
			reg = <0x00 0x2440000 0x00 0x400>;
			phandle = <0xfa>;
		};

		gpio@610000 {
			power-domains = <0x07 0xa4 0x01>;
			ti,davinci-gpio-unbanked = <0x00>;
			clock-names = "gpio";
			gpio-controller;
			interrupts = <0x9a 0x9b 0x9c 0x9d 0x9e>;
			clocks = <0x06 0xa4 0x00>;
			interrupt-parent = <0x2c>;
			ti,ngpio = <0x42>;
			compatible = "ti,j721e-gpio\0ti,keystone-gpio";
			#interrupt-cells = <0x02>;
			status = "disabled";
			reg = <0x00 0x610000 0x00 0x100>;
			phandle = <0x114>;
			#gpio-cells = <0x02>;
			interrupt-controller;
		};

		i2c@2010000 {
			power-domains = <0x07 0x10f 0x01>;
			#address-cells = <0x01>;
			clock-names = "fck";
			interrupts = <0x00 0xc9 0x04>;
			clocks = <0x06 0x10f 0x02>;
			#size-cells = <0x00>;
			compatible = "ti,j721e-i2c\0ti,omap4-i2c";
			status = "disabled";
			reg = <0x00 0x2010000 0x00 0x100>;
			phandle = <0x11a>;
		};

		can@27b1000 {
			power-domains = <0x07 0x100 0x01>;
			clock-names = "hclk\0cclk";
			reg-names = "m_can\0message_ram";
			interrupts = <0x00 0x249 0x04 0x00 0x24a 0x04>;
			clocks = <0x06 0x100 0x06 0x06 0x100 0x01>;
			compatible = "bosch,m_can";
			status = "disabled";
			interrupt-names = "int0\0int1";
			reg = <0x00 0x27b1000 0x00 0x200 0x00 0x27b8000 0x00 0x8000>;
			phandle = <0x16c>;
			bosch,mram-cfg = <0x00 0x80 0x40 0x40 0x40 0x40 0x20 0x20>;
		};

		watchdog@2320000 {
			power-domains = <0x07 0x166 0x01>;
			assigned-clocks = <0x06 0x166 0x00>;
			assigned-clock-parents = <0x06 0x166 0x04>;
			clocks = <0x06 0x166 0x00>;
			compatible = "ti,j7-rti-wdt";
			status = "reserved";
			reg = <0x00 0x2320000 0x00 0x100>;
			phandle = <0x190>;
		};

		timer@2480000 {
			power-domains = <0x07 0x69 0x01>;
			clock-names = "fck";
			assigned-clocks = <0x06 0x69 0x02>;
			assigned-clock-parents = <0x06 0x69 0x03>;
			interrupts = <0x00 0xe8 0x04>;
			clocks = <0x06 0x69 0x02>;
			compatible = "ti,am654-timer";
			status = "reserved";
			ti,timer-pwm;
			reg = <0x00 0x2480000 0x00 0x400>;
			phandle = <0xfe>;
		};

		i2c@2050000 {
			power-domains = <0x07 0x113 0x01>;
			pinctrl-names = "default";
			#address-cells = <0x01>;
			pinctrl-0 = <0x3b>;
			clock-names = "fck";
			interrupts = <0x00 0xcd 0x04>;
			clocks = <0x06 0x113 0x02>;
			#size-cells = <0x00>;
			clock-frequency = <0x61a80>;
			compatible = "ti,j721e-i2c\0ti,omap4-i2c";
			status = "disabled";
			reg = <0x00 0x2050000 0x00 0x100>;
			phandle = <0x120>;

			gpio@20 {
				gpio-controller;
				gpio-line-names = "CSI2_EXP_RSTZ\0CSI2_EXP_A_GPIO0\0CSI2_EXP_A_GPIO1\0CSI2_EXP_A_GPIO3\0CSI2_EXP_B_GPIO1\0CSI2_EXP_B_GPIO2\0CSI2_EXP_B_GPIO3\0CSI2_EXP_B_GPIO4";
				compatible = "ti,tca6408";
				reg = <0x20>;
				phandle = <0x121>;
				#gpio-cells = <0x02>;
			};
		};

		can@2701000 {
			power-domains = <0x07 0xf5 0x01>;
			clock-names = "hclk\0cclk";
			reg-names = "m_can\0message_ram";
			interrupts = <0x00 0x7c 0x04 0x00 0x7d 0x04>;
			clocks = <0x06 0xf5 0x06 0x06 0xf5 0x01>;
			compatible = "bosch,m_can";
			status = "disabled";
			interrupt-names = "int0\0int1";
			reg = <0x00 0x2701000 0x00 0x200 0x00 0x2708000 0x00 0x8000>;
			phandle = <0x161>;
			bosch,mram-cfg = <0x00 0x80 0x40 0x40 0x40 0x40 0x20 0x20>;
		};

		pcie@2900000 {
			power-domains = <0x07 0x14c 0x01>;
			dma-ranges = <0x2000000 0x00 0x00 0x00 0x00 0x10000 0x00>;
			#address-cells = <0x03>;
			dma-coherent;
			phy-names = "pcie-phy";
			bus-range = <0x00 0xff>;
			clock-names = "fck";
			reg-names = "intd_cfg\0user_cfg\0reg\0cfg";
			interrupts = <0x00 0x13e 0x01>;
			clocks = <0x06 0x14c 0x00>;
			#size-cells = <0x02>;
			max-link-speed = <0x03>;
			device_type = "pci";
			reset-gpios = <0x46 0x06 0x00>;
			num-lanes = <0x04>;
			compatible = "ti,j784s4-pcie-host";
			ranges = <0x1000000 0x00 0x1000 0x40 0x1000 0x00 0x100000 0x2000000 0x00 0x101000 0x40 0x101000 0x00 0xffeff000>;
			msi-map = <0x00 0x45 0x00 0x10000>;
			ti,syscon-pcie-ctrl = <0x44 0x00>;
			status = "okay";
			vendor-id = <0x104c>;
			interrupt-names = "link_state";
			phys = <0x47>;
			reg = <0x00 0x2900000 0x00 0x1000 0x00 0x2907000 0x00 0x400 0x00 0xd000000 0x00 0x800000 0x40 0x00 0x00 0x1000>;
			phandle = <0x13c>;
			device-id = <0xb012>;
		};

		timer@2510000 {
			power-domains = <0x07 0x72 0x01>;
			clock-names = "fck";
			assigned-clocks = <0x06 0x72 0x02>;
			assigned-clock-parents = <0x06 0x72 0x03>;
			interrupts = <0x00 0xf1 0x04>;
			clocks = <0x06 0x72 0x02>;
			compatible = "ti,am654-timer";
			ti,timer-pwm;
			reg = <0x00 0x2510000 0x00 0x400>;
			phandle = <0x107>;
		};

		can@2741000 {
			power-domains = <0x07 0xf9 0x01>;
			pinctrl-names = "default";
			pinctrl-0 = <0x56>;
			clock-names = "hclk\0cclk";
			reg-names = "m_can\0message_ram";
			interrupts = <0x00 0x88 0x04 0x00 0x89 0x04>;
			clocks = <0x06 0xf9 0x06 0x06 0xf9 0x01>;
			compatible = "bosch,m_can";
			status = "disabled";
			interrupt-names = "int0\0int1";
			phys = <0x57>;
			reg = <0x00 0x2741000 0x00 0x200 0x00 0x2748000 0x00 0x8000>;
			phandle = <0x165>;
			bosch,mram-cfg = <0x00 0x80 0x40 0x40 0x40 0x40 0x20 0x20>;
		};

		serial@2800000 {
			power-domains = <0x07 0x92 0x01>;
			clock-names = "fclk";
			interrupts = <0x00 0xc0 0x04>;
			clocks = <0x06 0x92 0x00>;
			compatible = "ti,j721e-uart\0ti,am654-uart";
			status = "disabled";
			reg = <0x00 0x2800000 0x00 0x200>;
			phandle = <0x10a>;
		};

		spi@2110000 {
			power-domains = <0x07 0x179 0x01>;
			#address-cells = <0x01>;
			interrupts = <0x00 0xb9 0x04>;
			clocks = <0x06 0x179 0x00>;
			#size-cells = <0x00>;
			compatible = "ti,am654-mcspi\0ti,omap4-mcspi";
			status = "disabled";
			reg = <0x00 0x2110000 0x00 0x400>;
			phandle = <0x174>;
		};

		can@2781000 {
			power-domains = <0x07 0xfd 0x01>;
			clock-names = "hclk\0cclk";
			reg-names = "m_can\0message_ram";
			interrupts = <0x00 0x240 0x04 0x00 0x241 0x04>;
			clocks = <0x06 0xfd 0x06 0x06 0xfd 0x01>;
			compatible = "bosch,m_can";
			status = "disabled";
			interrupt-names = "int0\0int1";
			reg = <0x00 0x2781000 0x00 0x200 0x00 0x2788000 0x00 0x8000>;
			phandle = <0x169>;
			bosch,mram-cfg = <0x00 0x80 0x40 0x40 0x40 0x40 0x20 0x20>;
		};

		pwm@3010000 {
			power-domains = <0x07 0xdc 0x01>;
			clock-names = "tbclk\0fck";
			clocks = <0x2a 0x01 0x06 0xdc 0x00>;
			#pwm-cells = <0x03>;
			compatible = "ti,am654-ehrpwm\0ti,am3352-ehrpwm";
			status = "disabled";
			reg = <0x00 0x3010000 0x00 0x100>;
			phandle = <0xec>;
		};

		serial@2840000 {
			power-domains = <0x07 0x187 0x01>;
			clock-names = "fclk";
			interrupts = <0x00 0xc4 0x04>;
			clocks = <0x06 0x187 0x00>;
			compatible = "ti,j721e-uart\0ti,am654-uart";
			status = "disabled";
			reg = <0x00 0x2840000 0x00 0x200>;
			phandle = <0x10e>;
		};

		spi@2150000 {
			power-domains = <0x07 0x17d 0x01>;
			#address-cells = <0x01>;
			interrupts = <0x00 0xbd 0x04>;
			clocks = <0x06 0x17d 0x00>;
			#size-cells = <0x00>;
			compatible = "ti,am654-mcspi\0ti,omap4-mcspi";
			status = "disabled";
			reg = <0x00 0x2150000 0x00 0x400>;
			phandle = <0x178>;
		};

		gpu@4e20000000 {
			power-domains = <0x07 0xb5 0x01 0x07 0xb6 0x01>;
			clock-names = "core";
			assigned-clocks = <0x06 0xb5 0x01>;
			power-domain-names = "firmware\0dust";
			assigned-clock-rates = <0x2faf0800>;
			interrupts = <0x00 0x18 0x04>;
			clocks = <0x06 0xb5 0x01>;
			compatible = "ti,j721s2-pvr\0img,pvr-bxs64";
			reg = <0x4e 0x20000000 0x00 0x80000>;
			phandle = <0x1a3>;
		};

		ethernet@c000000 {
			power-domains = <0x07 0x40 0x01>;
			#address-cells = <0x02>;
			dma-coherent;
			clock-names = "fck";
			reg-names = "cpsw_nuss";
			clocks = <0x06 0x40 0x00>;
			#size-cells = <0x02>;
			dma-names = "tx0\0tx1\0tx2\0tx3\0tx4\0tx5\0tx6\0tx7\0rx";
			compatible = "ti,j784s4-cpswxg-nuss";
			ranges = <0x00 0x00 0x00 0xc000000 0x00 0x200000>;
			status = "disabled";
			reg = <0x00 0xc000000 0x00 0x200000>;
			phandle = <0x154>;
			dmas = <0x24 0xca00 0x24 0xca01 0x24 0xca02 0x24 0xca03 0x24 0xca04 0x24 0xca05 0x24 0xca06 0x24 0xca07 0x24 0x4a00>;

			cpts@3d000 {
				ti,cpts-ext-ts-inputs = <0x04>;
				clock-names = "cpts";
				clocks = <0x06 0x40 0x03>;
				interrupts-extended = <0x01 0x00 0x10 0x04>;
				compatible = "ti,am65-cpts";
				interrupt-names = "cpts";
				reg = <0x00 0x3d000 0x00 0x400>;
				ti,cpts-periodic-outputs = <0x02>;
			};

			mdio@f00 {
				#address-cells = <0x01>;
				clock-names = "fck";
				clocks = <0x06 0x40 0x00>;
				bus_freq = <0xf4240>;
				#size-cells = <0x00>;
				compatible = "ti,cpsw-mdio\0ti,davinci_mdio";
				status = "disabled";
				reg = <0x00 0xf00 0x00 0x100>;
				phandle = <0x15d>;
			};

			ethernet-ports {
				#address-cells = <0x01>;
				#size-cells = <0x00>;

				port@7 {
					label = "port7";
					status = "disabled";
					ti,mac-only;
					reg = <0x07>;
					phandle = <0x15b>;
				};

				port@5 {
					label = "port5";
					status = "disabled";
					ti,mac-only;
					reg = <0x05>;
					phandle = <0x159>;
				};

				port@3 {
					label = "port3";
					status = "disabled";
					ti,mac-only;
					reg = <0x03>;
					phandle = <0x157>;
				};

				port@1 {
					label = "port1";
					status = "disabled";
					ti,mac-only;
					reg = <0x01>;
					phandle = <0x155>;
				};

				port@8 {
					label = "port8";
					status = "disabled";
					ti,mac-only;
					reg = <0x08>;
					phandle = <0x15c>;
				};

				port@6 {
					label = "port6";
					status = "disabled";
					ti,mac-only;
					reg = <0x06>;
					phandle = <0x15a>;
				};

				port@4 {
					label = "port4";
					status = "disabled";
					ti,mac-only;
					reg = <0x04>;
					phandle = <0x158>;
				};

				port@2 {
					label = "port2";
					status = "disabled";
					ti,mac-only;
					reg = <0x02>;
					phandle = <0x156>;
				};
			};
		};

		pwm@3050000 {
			power-domains = <0x07 0xe0 0x01>;
			clock-names = "tbclk\0fck";
			clocks = <0x2a 0x05 0x06 0xe0 0x00>;
			#pwm-cells = <0x03>;
			compatible = "ti,am654-ehrpwm\0ti,am3352-ehrpwm";
			status = "disabled";
			reg = <0x00 0x3050000 0x00 0x100>;
			phandle = <0xf0>;
		};

		ticsi2rx@4500000 {
			power-domains = <0x07 0x48 0x01>;
			#address-cells = <0x02>;
			#size-cells = <0x02>;
			dma-names = "rx0\0rx1\0rx2\0rx3\0rx4\0rx5\0rx6\0rx7";
			compatible = "ti,j721e-csi2rx-shim";
			ranges;
			status = "disabled";
			reg = <0x00 0x4500000 0x00 0x1000>;
			phandle = <0x123>;
			dmas = <0x3c 0x00 0x4940 0x00 0x3c 0x00 0x4941 0x00 0x3c 0x00 0x4942 0x00 0x3c 0x00 0x4943 0x00 0x3c 0x00 0x4944 0x00 0x3c 0x00 0x4945 0x00 0x3c 0x00 0x4946 0x00 0x3c 0x00 0x4947 0x00>;

			csi-bridge@4504000 {
				phy-names = "dphy";
				clock-names = "sys_clk\0p_clk\0pixel_if0_clk\0pixel_if1_clk\0pixel_if2_clk\0pixel_if3_clk";
				interrupts = <0x00 0x99 0x04 0x00 0x98 0x04>;
				clocks = <0x06 0x48 0x02 0x06 0x48 0x00 0x06 0x48 0x02 0x06 0x48 0x02 0x06 0x48 0x03 0x06 0x48 0x03>;
				compatible = "ti,j721e-csi2rx\0cdns,csi2rx";
				interrupt-names = "error_irq\0irq";
				phys = <0x3d>;
				reg = <0x00 0x4504000 0x00 0x1000>;
				phandle = <0x124>;

				ports {
					#address-cells = <0x01>;
					#size-cells = <0x00>;

					port@0 {
						status = "disabled";
						reg = <0x00>;
						phandle = <0x125>;
					};

					port@3 {
						status = "disabled";
						reg = <0x03>;
						phandle = <0x128>;
					};

					port@1 {
						status = "disabled";
						reg = <0x01>;
						phandle = <0x126>;
					};

					port@4 {
						status = "disabled";
						reg = <0x04>;
						phandle = <0x129>;
					};

					port@2 {
						status = "disabled";
						reg = <0x02>;
						phandle = <0x127>;
					};
				};
			};
		};

		serial@2880000 {
			power-domains = <0x07 0x18b 0x01>;
			pinctrl-names = "default";
			pinctrl-0 = <0x2b>;
			clock-names = "fclk";
			bootph-all;
			interrupts = <0x00 0xf8 0x04>;
			clocks = <0x06 0x18b 0x00>;
			compatible = "ti,j721e-uart\0ti,am654-uart";
			status = "okay";
			reg = <0x00 0x2880000 0x00 0x200>;
			phandle = <0x112>;
		};

		dsi@4800000 {
			power-domains = <0x07 0xd7 0x01>;
			phy-names = "dphy";
			clock-names = "dsi_p_clk\0dsi_sys_clk";
			interrupts = <0x00 0x258 0x04>;
			clocks = <0x06 0xd7 0x02 0x06 0xd7 0x05>;
			interrupt-parent = <0x01>;
			compatible = "ti,j721e-dsi";
			status = "okay";
			phys = <0x7a>;
			reg = <0x00 0x4800000 0x00 0x100000 0x00 0x4710000 0x00 0x100>;
			phandle = <0x198>;

			ports {
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				phandle = <0x199>;

				port@0 {
					reg = <0x00>;

					endpoint {
						remote-endpoint = <0x7b>;
						phandle = <0x39>;
					};
				};

				port@1 {
					reg = <0x01>;

					endpoint {
						remote-endpoint = <0x7c>;
						phandle = <0x82>;
					};
				};
			};
		};

		can@26b1000 {
			power-domains = <0x07 0x106 0x01>;
			clock-names = "hclk\0cclk";
			reg-names = "m_can\0message_ram";
			interrupts = <0x00 0x313 0x04 0x00 0x314 0x04>;
			clocks = <0x06 0x106 0x06 0x06 0x106 0x01>;
			compatible = "bosch,m_can";
			status = "disabled";
			interrupt-names = "int0\0int1";
			reg = <0x00 0x26b1000 0x00 0x200 0x00 0x26b8000 0x00 0x8000>;
			phandle = <0x172>;
			bosch,mram-cfg = <0x00 0x80 0x40 0x40 0x40 0x40 0x20 0x20>;
		};

		watchdog@2220000 {
			power-domains = <0x07 0x15e 0x01>;
			assigned-clocks = <0x06 0x15e 0x00>;
			assigned-clock-parents = <0x06 0x15e 0x04>;
			clocks = <0x06 0x15e 0x00>;
			compatible = "ti,j7-rti-wdt";
			reg = <0x00 0x2220000 0x00 0x100>;
			phandle = <0x18b>;
		};

		timer@24c0000 {
			power-domains = <0x07 0x6d 0x01>;
			clock-names = "fck";
			assigned-clocks = <0x06 0x6d 0x02>;
			assigned-clock-parents = <0x06 0x6d 0x03>;
			interrupts = <0x00 0xec 0x04>;
			clocks = <0x06 0x6d 0x02>;
			compatible = "ti,am654-timer";
			status = "reserved";
			ti,timer-pwm;
			reg = <0x00 0x24c0000 0x00 0x400>;
			phandle = <0x102>;
		};
	};

	regulator-vsys3v3 {
		regulator-max-microvolt = <0x325aa0>;
		regulator-boot-on;
		regulator-always-on;
		regulator-min-microvolt = <0x325aa0>;
		regulator-name = "vsys_3v3";
		compatible = "regulator-fixed";
		phandle = <0x0f>;
		vin-supply = <0x95>;
	};

	can-phy1 {
		pinctrl-names = "default";
		standby-gpios = <0x0e 0x02 0x00>;
		pinctrl-0 = <0x9c>;
		#phy-cells = <0x00>;
		compatible = "ti,tcan1042";
		phandle = <0x13>;
		max-bitrate = <0x4c4b40>;
	};

	l2-cache1 {
		cache-size = <0x200000>;
		cache-level = <0x02>;
		cache-sets = <0x400>;
		cache-unified;
		compatible = "cache";
		cache-line-size = <0x40>;
		next-level-cache = <0x02>;
		phandle = <0x94>;
	};

	regulator-vsys5v0 {
		regulator-max-microvolt = <0x4c4b40>;
		regulator-boot-on;
		regulator-always-on;
		regulator-min-microvolt = <0x4c4b40>;
		regulator-name = "vsys_5v0";
		compatible = "regulator-fixed";
		phandle = <0x33>;
		vin-supply = <0x95>;
	};

	regulator-dp1-prw {
		regulator-max-microvolt = <0x325aa0>;
		gpio = <0x36 0x01 0x00>;
		enable-active-high;
		regulator-min-microvolt = <0x325aa0>;
		regulator-name = "dp1-pwr";
		compatible = "regulator-fixed";
		phandle = <0xa0>;
	};

	regulator-TLV71033 {
		regulator-max-microvolt = <0x325aa0>;
		pinctrl-names = "default";
		regulator-boot-on;
		pinctrl-0 = <0x97>;
		regulator-min-microvolt = <0x1b7740>;
		regulator-name = "tlv71033";
		compatible = "regulator-gpio";
		states = <0x1b7740 0x00 0x325aa0 0x01>;
		phandle = <0x43>;
		vin-supply = <0x33>;
		gpios = <0x98 0x08 0x00>;
	};

	aliases {
		i2c3 = "/bus@100000/i2c@2000000";
		ethernet0 = "/bus@100000/bus@28380000/ethernet@46000000/ethernet-ports/port@1";
		mmc1 = "/bus@100000/mmc@4fb0000";
		serial1 = "/bus@100000/bus@28380000/serial@40a00000";
		ethernet1 = "/bus@100000/ethernet@c200000/ethernet-ports/port@1";
		i2c0 = "/bus@100000/bus@28380000/i2c@42120000";
		mmc0 = "/bus@100000/mmc@4f80000";
		serial2 = "/bus@100000/serial@2880000";
		serial0 = "/bus@100000/bus@28380000/serial@42300000";
	};

	sound {
		clock-names = "cpb-mcasp-auxclk\0cpb-mcasp-auxclk-48000\0cpb-codec-scki\0cpb-codec-scki-48000";
		ti,cpb-mcasp = <0x9e>;
		model = "j784s4-cpb";
		clocks = <0x06 0x109 0x00 0x06 0x109 0x01 0x06 0x9d 0x22 0x06 0x9d 0x3f>;
		ti,cpb-codec = <0x9f>;
		compatible = "ti,j7200-cpb-audio";
		phandle = <0x1c0>;
	};

	firmware {

		optee {
			method = "smc";
			compatible = "linaro,optee-tz";
		};

		psci {
			method = "smc";
			compatible = "arm,psci-1.0";
			phandle = <0xa2>;
		};
	};

	regulator-evm12v0 {
		regulator-max-microvolt = <0xb71b00>;
		regulator-boot-on;
		regulator-always-on;
		regulator-min-microvolt = <0xb71b00>;
		regulator-name = "evm_12v0";
		compatible = "regulator-fixed";
		phandle = <0x95>;
	};

	chosen {
		u-boot,version = "2025.01-00773-gdf1fe2382304";
		bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02880000 mtdparts=47040000.spi.0:512k(ospi.tiboot3),2m(ospi.tispl),4m(ospi.u-boot),256k(ospi.env),256k(ospi.env.backup),57088k@8m(ospi.rootfs),256k(ospi.phypattern);spi-nand0:512k(ospi_nand.tiboot3),2m(ospi_nand.tispl),4m(ospi_nand.u-boot),256k(ospi_nand.env),256k(ospi_nand.env.backup),98048k@32m(ospi_nand.rootfs),256k@130816k(ospi_nand.phypattern) root=PARTUUID=a327ae3d-02 rw rootfstype=ext4 rootwait";
		stdout-path = "serial2:115200n8";
	};

	regulator-sd {
		regulator-max-microvolt = <0x325aa0>;
		regulator-boot-on;
		gpio = <0x96 0x02 0x00>;
		enable-active-high;
		regulator-min-microvolt = <0x325aa0>;
		regulator-name = "vdd_mmc1";
		compatible = "regulator-fixed";
		phandle = <0x42>;
		vin-supply = <0x0f>;
	};

	clock-serdes {
		bootph-all;
		#clock-cells = <0x00>;
		clock-frequency = <0x5f5e100>;
		compatible = "fixed-clock";
		status = "okay";
		phandle = <0x4c>;
	};

	pmu {
		interrupts = <0x01 0x07 0x04>;
		compatible = "arm,cortex-a72-pmu";
		phandle = <0xa4>;
	};

	cpus {
		#address-cells = <0x01>;
		#size-cells = <0x00>;

		cpu@1 {
			d-cache-line-size = <0x40>;
			i-cache-line-size = <0x40>;
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			d-cache-size = <0x8000>;
			next-level-cache = <0x93>;
			i-cache-size = <0xc000>;
			reg = <0x01>;
			enable-method = "psci";
			phandle = <0x8c>;
			d-cache-sets = <0x100>;
			i-cache-sets = <0x100>;
		};

		cpu@103 {
			d-cache-line-size = <0x40>;
			i-cache-line-size = <0x40>;
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			d-cache-size = <0x8000>;
			next-level-cache = <0x94>;
			i-cache-size = <0xc000>;
			reg = <0x103>;
			enable-method = "psci";
			phandle = <0x92>;
			d-cache-sets = <0x100>;
			i-cache-sets = <0x100>;
		};

		cpu@101 {
			d-cache-line-size = <0x40>;
			i-cache-line-size = <0x40>;
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			d-cache-size = <0x8000>;
			next-level-cache = <0x94>;
			i-cache-size = <0xc000>;
			reg = <0x101>;
			enable-method = "psci";
			phandle = <0x90>;
			d-cache-sets = <0x100>;
			i-cache-sets = <0x100>;
		};

		cpu-map {

			cluster0 {
				phandle = <0x1bb>;

				core3 {
					cpu = <0x8e>;
				};

				core1 {
					cpu = <0x8c>;
				};

				core2 {
					cpu = <0x8d>;
				};

				core0 {
					cpu = <0x8b>;
				};
			};

			cluster1 {
				phandle = <0x1bc>;

				core3 {
					cpu = <0x92>;
				};

				core1 {
					cpu = <0x90>;
				};

				core2 {
					cpu = <0x91>;
				};

				core0 {
					cpu = <0x8f>;
				};
			};
		};

		cpu@2 {
			d-cache-line-size = <0x40>;
			i-cache-line-size = <0x40>;
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			d-cache-size = <0x8000>;
			next-level-cache = <0x93>;
			i-cache-size = <0xc000>;
			reg = <0x02>;
			enable-method = "psci";
			phandle = <0x8d>;
			d-cache-sets = <0x100>;
			i-cache-sets = <0x100>;
		};

		cpu@0 {
			d-cache-line-size = <0x40>;
			i-cache-line-size = <0x40>;
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			d-cache-size = <0x8000>;
			next-level-cache = <0x93>;
			i-cache-size = <0xc000>;
			reg = <0x00>;
			enable-method = "psci";
			phandle = <0x8b>;
			d-cache-sets = <0x100>;
			i-cache-sets = <0x100>;
		};

		cpu@102 {
			d-cache-line-size = <0x40>;
			i-cache-line-size = <0x40>;
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			d-cache-size = <0x8000>;
			next-level-cache = <0x94>;
			i-cache-size = <0xc000>;
			reg = <0x102>;
			enable-method = "psci";
			phandle = <0x91>;
			d-cache-sets = <0x100>;
			i-cache-sets = <0x100>;
		};

		cpu@100 {
			d-cache-line-size = <0x40>;
			i-cache-line-size = <0x40>;
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			d-cache-size = <0x8000>;
			next-level-cache = <0x94>;
			i-cache-size = <0xc000>;
			reg = <0x100>;
			enable-method = "psci";
			phandle = <0x8f>;
			d-cache-sets = <0x100>;
			i-cache-sets = <0x100>;
		};

		cpu@3 {
			d-cache-line-size = <0x40>;
			i-cache-line-size = <0x40>;
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			d-cache-size = <0x8000>;
			next-level-cache = <0x93>;
			i-cache-size = <0xc000>;
			reg = <0x03>;
			enable-method = "psci";
			phandle = <0x8e>;
			d-cache-sets = <0x100>;
			i-cache-sets = <0x100>;
		};
	};

	__symbols__ {
		vision_apps_shared_region = "/reserved-memory/vision_apps_shared-memories";
		main_cpsw0_port1 = "/bus@100000/ethernet@c000000/ethernet-ports/port@1";
		pcie1_rc = "/bus@100000/pcie@2910000";
		mcu_cpsw_pins_default = "/bus@100000/bus@28380000/pinctrl@4301c068/mcu-cpsw-default-pins";
		mcasp1 = "/bus@100000/mcasp@2b10000";
		mcu_i2c0 = "/bus@100000/bus@28380000/i2c@40b00000";
		cpsw0_phy_gmii_sel = "/bus@100000/bus@100000/phy@4044";
		mbox_c71_1 = "/bus@100000/bus@30000000/mailbox@31f84000/mbox-c71-1";
		wkup_esm = "/bus@100000/bus@28380000/esm@42080000";
		main_r5fss1_core0_dma_memory_region = "/reserved-memory/r5f-dma-memory@a4000000";
		mcu_r5fss0_core0_memory_region = "/reserved-memory/r5f-memory@a0100000";
		csi0_port3 = "/bus@100000/ticsi2rx@4500000/csi-bridge@4504000/ports/port@3";
		thermal_zones = "/thermal-zones";
		main_spi6 = "/bus@100000/spi@2160000";
		main_gpio_intr = "/bus@100000/interrupt-controller@a00000";
		c71_2 = "/bus@100000/dsp@66800000";
		csi2_port4 = "/bus@100000/ticsi2rx@4520000/csi-bridge@4524000/ports/port@4";
		ufs_wrapper = "/bus@100000/ufs-wrapper@4e80000";
		cdns_csi2rx2 = "/bus@100000/ticsi2rx@4520000/csi-bridge@4524000";
		dss_ports = "/bus@100000/dss@4a00000/ports";
		mailbox1_cluster0 = "/bus@100000/bus@30000000/mailbox@31f90000";
		sms = "/bus@100000/bus@28380000/system-controller@44083000";
		pmic_irq_pins_default = "/bus@100000/bus@28380000/pinctrl@4301c038/pmic-irq-default-pins";
		gic500 = "/bus@100000/interrupt-controller@1800000";
		main_mcan1 = "/bus@100000/can@2711000";
		watchdog11 = "/bus@100000/watchdog@2320000";
		serdes4_dp_link = "/bus@100000/wiz@5050000/serdes@5050000/phy@0";
		main_timer13 = "/bus@100000/timer@24d0000";
		main_bcdma_csi = "/bus@100000/bus@30000000/dma-controller@311a0000";
		vision_apps_main_r5fss2_core0_memory_region = "/reserved-memory/vision-apps-r5f-memory@a7100000";
		main_timer3 = "/bus@100000/timer@2430000";
		mbox_main_r5fss2_core0 = "/bus@100000/bus@30000000/mailbox@31f83000/mbox-main-r5fss2-core0";
		main_i2c5 = "/bus@100000/i2c@2050000";
		main_uart4 = "/bus@100000/serial@2840000";
		main_r5fss1_core1 = "/bus@100000/r5fss@5e00000/r5f@5f00000";
		ospi1_nor = "/bus@100000/bus@28380000/bus@47000000/spi@47050000/flash@0";
		dss = "/bus@100000/dss@4a00000";
		k3_pds = "/bus@100000/bus@28380000/system-controller@44083000/power-controller";
		vision_apps_rtos_ipc_memory_region = "/reserved-memory/vision-apps-rtos-ipc-memory-region@ac000000";
		ldoa4 = "/bus@100000/bus@28380000/i2c@42120000/pmic@48/regulators/ldo4";
		main_ehrpwm2 = "/bus@100000/pwm@3020000";
		chipid = "/bus@100000/bus@28380000/bus@43000000/chipid@14";
		mailbox0_cluster5 = "/bus@100000/bus@30000000/mailbox@31f85000";
		main0_crit = "/thermal-zones/main0-thermal/trips/main0-crit";
		mcu_timer8 = "/bus@100000/bus@28380000/timer@40480000";
		davinci_mdio = "/bus@100000/bus@28380000/ethernet@46000000/mdio@f00";
		dsi_edp_bridge_ports = "/bus@100000/i2c@2040000/dsi-edp-bridge@2c/ports";
		mcu_r5fss0_core0 = "/bus@100000/bus@28380000/r5fss@41000000/r5f@41000000";
		dp0_out = "/bus@100000/bridge@a000000/ports/port@4/endpoint";
		serdes1 = "/bus@100000/wiz@5070000/serdes@5070000";
		cluster0 = "/cpus/cpu-map/cluster0";
		mcu_cpsw = "/bus@100000/bus@28380000/ethernet@46000000";
		usb_serdes_mux = "/bus@100000/bus@100000/mux-controller@4000";
		vision_apps_main_r5fss2_core1_dma_memory_region = "/reserved-memory/vision-apps-r5f-dma-memory@a8000000";
		mailbox1_cluster9 = "/bus@100000/bus@30000000/mailbox@31f99000";
		scm_conf = "/bus@100000/bus@100000";
		main_navss_sram = "/bus@100000/bus@30000000/navss-sram@30000000";
		csi0_port1 = "/bus@100000/ticsi2rx@4500000/csi-bridge@4504000/ports/port@1";
		c71_2_dma_memory_region = "/reserved-memory/c71-dma-memory@aa000000";
		main_spi4 = "/bus@100000/spi@2140000";
		c71_0 = "/bus@100000/dsp@64800000";
		csi2_port2 = "/bus@100000/ticsi2rx@4520000/csi-bridge@4524000/ports/port@2";
		watchdog8 = "/bus@100000/watchdog@22f0000";
		main_mcan4_pins_default = "/bus@100000/pinctrl@11c000/main-mcan4-default-pins";
		cpu7 = "/cpus/cpu@103";
		cdns_csi2rx0 = "/bus@100000/ticsi2rx@4500000/csi-bridge@4504000";
		main_r5fss2_core0_memory_region = "/reserved-memory/r5f-memory@a6100000";
		vdd_sd_dv_pins_default = "/bus@100000/pinctrl@11c000/vdd-sd-dv-default-pins";
		main_sdhci1 = "/bus@100000/mmc@4fb0000";
		bucka5 = "/bus@100000/bus@28380000/i2c@42120000/pmic@48/regulators/buck5";
		main_navss = "/bus@100000/bus@30000000";
		mcu_fss0_ospi1_pins_default = "/bus@100000/bus@28380000/pinctrl@4301c038/mcu-fss0-ospi1-default-pins";
		gpu = "/bus@100000/gpu@4e20000000";
		wkup_gpio_pins_default = "/bus@100000/bus@28380000/pinctrl@4301c068/wkup_gpio_pins_default";
		main_timer11 = "/bus@100000/timer@24b0000";
		main_uart8_pins_default = "/bus@100000/pinctrl@11c000/main-uart8-default-pins";
		main_timer1 = "/bus@100000/timer@2410000";
		main_cpsw0_port8 = "/bus@100000/ethernet@c000000/ethernet-ports/port@8";
		main_i2c3 = "/bus@100000/i2c@2030000";
		main_uart2 = "/bus@100000/serial@2820000";
		c71_3_memory_region = "/reserved-memory/c71-memory@ab100000";
		mcu_phy0 = "/bus@100000/bus@28380000/ethernet@46000000/mdio@f00/ethernet-phy@0";
		ldoa2 = "/bus@100000/bus@28380000/i2c@42120000/pmic@48/regulators/ldo2";
		main_ehrpwm0 = "/bus@100000/pwm@3000000";
		L2_1 = "/l2-cache1";
		wkup_i2c0_pins_default = "/bus@100000/bus@28380000/pinctrl@4301c068/wkup-i2c0-default-pins";
		mailbox0_cluster3 = "/bus@100000/bus@30000000/mailbox@31f83000";
		serdes_ln_ctrl = "/bus@100000/bus@100000/mux-controller@4080";
		mcu_timer6 = "/bus@100000/bus@28380000/timer@40460000";
		timesync_router = "/bus@100000/mux-controller@a40000";
		msmc_l3 = "/l3-cache0";
		main_mcan16 = "/bus@100000/can@26a1000";
		vision_apps_mcu_r5fss0_core0_dma_memory_region = "/reserved-memory/vision-apps-r5f-dma-memory@a0000000";
		mcu_timerio_output = "/bus@100000/bus@28380000/pinctrl@40f04280";
		mcu_r5fss0 = "/bus@100000/bus@28380000/r5fss@41000000";
		mbox_mcu_r5fss0_core1 = "/bus@100000/bus@30000000/mailbox@31f80000/mbox-mcu-r5fss0-core1";
		dphy1 = "/bus@100000/phy@4590000";
		vision_apps_main_r5fss0_core1_dma_memory_region = "/reserved-memory/vision-apps-r5f-dma-memory@a4000000";
		mailbox1_cluster7 = "/bus@100000/bus@30000000/mailbox@31f97000";
		codec_audio = "/sound";
		main_mcan8 = "/bus@100000/can@2781000";
		main0_thermal = "/thermal-zones/main0-thermal";
		usbss0 = "/bus@100000/usb@4104000";
		tps62873a = "/bus@100000/bus@28380000/i2c@42120000/regulator@40";
		main_i2c5_pins_default = "/bus@100000/pinctrl@11c000/main-i2c5-default-pins";
		watchdog18 = "/bus@100000/watchdog@2550000";
		vision_apps_c71_2_dma_memory_region = "/reserved-memory/vision-apps-c71_2-dma-memory@b6000000";
		main_spi2 = "/bus@100000/spi@2120000";
		main_mmc1_pins_default = "/bus@100000/pinctrl@11c000/main-mmc1-default-pins";
		csi2_port0 = "/bus@100000/ticsi2rx@4520000/csi-bridge@4524000/ports/port@0";
		mcu_conf = "/bus@100000/bus@28380000/bus@40f00000";
		watchdog6 = "/bus@100000/watchdog@2260000";
		cpu5 = "/cpus/cpu@101";
		vision_apps_c71_3_memory_region = "/reserved-memory/vision-apps-c71_3-memory@b8100000";
		wkup_pmx2 = "/bus@100000/bus@28380000/pinctrl@4301c068";
		vpu0 = "/bus@100000/video-codec@4210000";
		mbox_main_r5fss1_core1 = "/bus@100000/bus@30000000/mailbox@31f82000/mbox-main-r5fss1-core1";
		bucka3 = "/bus@100000/bus@28380000/i2c@42120000/pmic@48/regulators/buck3";
		mcu_mcan0_gpio_pins_default = "/bus@100000/bus@28380000/pinctrl@4301c068/mcu-mcan0-gpio-default-pins";
		wkup_gpio0 = "/bus@100000/bus@28380000/gpio@42110000";
		cpsw_mac_syscon = "/bus@100000/bus@28380000/bus@40f00000/ethernet-mac-syscon@200";
		exp5 = "/bus@100000/i2c@2050000/gpio@20";
		dp0 = "/connector-dp0";
		main_cpsw0_port6 = "/bus@100000/ethernet@c000000/ethernet-ports/port@6";
		main_i2c1 = "/bus@100000/i2c@2010000";
		main_uart0 = "/bus@100000/serial@2800000";
		main_crypto = "/bus@100000/crypto@4e00000";
		main_cpsw2g_mdio_default_pins = "/bus@100000/pinctrl@11c000/main-cpsw2g-mdio-default-pins";
		vision_apps_main_r5fss0_core1_memory_region = "/reserved-memory/vision-apps-r5f-memory@a4100000";
		mcu_watchdog1 = "/bus@100000/bus@28380000/watchdog@40610000";
		mailbox0_cluster1 = "/bus@100000/bus@30000000/mailbox@31f81000";
		vision_apps_mcu_r5fss0_core1_memory_region = "/reserved-memory/vision-apps-r5f-memory@a1100000";
		main_cpsw1_port1 = "/bus@100000/ethernet@c200000/ethernet-ports/port@1";
		mcu_timer4 = "/bus@100000/bus@28380000/timer@40440000";
		main_mcan14 = "/bus@100000/can@2681000";
		wkup1_crit = "/thermal-zones/wkup1-thermal/trips/wkup1-crit";
		dsi0_out = "/bus@100000/dsi@4800000/ports/port@0/endpoint";
		main_cpsw1 = "/bus@100000/ethernet@c200000";
		transceiver3 = "/can-phy3";
		main_ringacc = "/bus@100000/bus@30000000/ringacc@3c000000";
		vsys_io_1v8 = "/regulator-vsys-io-1v8";
		mcu_adc0_pins_default = "/bus@100000/bus@28380000/pinctrl@4301c068/mcu-adc0-default-pins";
		c71_1_memory_region = "/reserved-memory/c71-memory@a9100000";
		vdd_mmc1 = "/regulator-sd";
		mcu_mcan1 = "/bus@100000/bus@28380000/can@40568000";
		audio_ext_refclk1_pins_default = "/bus@100000/pinctrl@11c000/audio-ext-refclk1-default-pins";
		main_r5fss0_core0_shared_memory_bufpool_region = "/reserved-memory/r5f-virtual-eth-buffers@af200000";
		mailbox1_cluster5 = "/bus@100000/bus@30000000/mailbox@31f95000";
		mcu_cpsw_port1 = "/bus@100000/bus@28380000/ethernet@46000000/ethernet-ports/port@1";
		csi1_port3 = "/bus@100000/ticsi2rx@4510000/csi-bridge@4514000/ports/port@3";
		dp1_pwr_3v3 = "/regulator-dp1-prw";
		dp0_in = "/bus@100000/bridge@a000000/ports/port@0/endpoint";
		serdes1_pcie0_link = "/bus@100000/wiz@5070000/serdes@5070000/phy@0";
		main_mcan6 = "/bus@100000/can@2761000";
		watchdog16 = "/bus@100000/watchdog@23f0000";
		vision_apps_main_r5fss1_core0_dma_memory_region = "/reserved-memory/vision-apps-r5f-dma-memory@a5000000";
		main_spi0 = "/bus@100000/spi@2100000";
		dp0_connector_in = "/connector-dp0/port/endpoint";
		main_timer18 = "/bus@100000/timer@2520000";
		main_timer8 = "/bus@100000/timer@2480000";
		watchdog4 = "/bus@100000/watchdog@2240000";
		cpu3 = "/cpus/cpu@3";
		wkup_pmx0 = "/bus@100000/bus@28380000/pinctrl@4301c000";
		cpsw1_phy_gmii_sel = "/bus@100000/bus@100000/phy@4034";
		pcie3_rc = "/bus@100000/pcie@2930000";
		main_uart9 = "/bus@100000/serial@2890000";
		main_r5fss2 = "/bus@100000/r5fss@5900000";
		dsi_edp_bridge = "/bus@100000/i2c@2040000/dsi-edp-bridge@2c";
		main2_thermal = "/thermal-zones/main2-thermal";
		main_r5fss0_core0 = "/bus@100000/r5fss@5c00000/r5f@5c00000";
		tscadc0 = "/bus@100000/bus@28380000/tscadc@40200000";
		main_r5fss0_core1_memory_region = "/reserved-memory/r5f-memory@a3100000";
		pcie0_rc = "/bus@100000/pcie@2900000";
		dp1_out = "/bus@100000/i2c@2040000/dsi-edp-bridge@2c/ports/port@1/endpoint";
		main_r5fss2_core1 = "/bus@100000/r5fss@5900000/r5f@5a00000";
		exp3 = "/bus@100000/i2c@2030000/gpio@20";
		pcie3_ctrl = "/bus@100000/bus@100000/pcie3-ctrl@407c";
		main_cpsw0_port4 = "/bus@100000/ethernet@c000000/ethernet-ports/port@4";
		vision_apps_c71_1_memory_region = "/reserved-memory/vision-apps-c71_1-memory@b4100000";
		main_r5fss1_core1_dma_memory_region = "/reserved-memory/r5f-dma-memory@a5000000";
		mcasp4 = "/bus@100000/mcasp@2b40000";
		wkup1_thermal = "/thermal-zones/wkup1-thermal";
		main_cpsw2g_default_pins = "/bus@100000/pinctrl@11c000/main-cpsw2g-default-pins";
		mcu_timer2 = "/bus@100000/bus@28380000/timer@40420000";
		mailbox1_cluster10 = "/bus@100000/bus@30000000/mailbox@31f9a000";
		secure_proxy_mcu = "/bus@100000/bus@28380000/mailbox@2a480000";
		main_mcan12 = "/bus@100000/can@27c1000";
		ti_csi2rx1 = "/bus@100000/ticsi2rx@4510000";
		main_r5fss0_core0_shared_memory_queue_region = "/reserved-memory/r5f-virtual-eth-queues@af000000";
		transceiver1 = "/can-phy1";
		mcu_fss0_ospi0_1_pins_default = "/bus@100000/bus@28380000/pinctrl@4301c038/mcu-fss0-ospi0-1-default-pins";
		dphy_tx0 = "/bus@100000/phy@4480000";
		serdes_wiz1 = "/bus@100000/wiz@5070000";
		ospi1 = "/bus@100000/bus@28380000/bus@47000000/spi@47050000";
		mailbox1_cluster3 = "/bus@100000/bus@30000000/mailbox@31f93000";
		main_esm = "/bus@100000/esm@700000";
		secure_ddr = "/reserved-memory/optee@9e800000";
		mcu_navss = "/bus@100000/bus@28380000/bus@28380000";
		csi1_port1 = "/bus@100000/ticsi2rx@4510000/csi-bridge@4514000/ports/port@1";
		psci = "/firmware/psci";
		mcu_uart0_pins_default = "/bus@100000/bus@28380000/pinctrl@4301c068/mcu-uart0-default-pins";
		main_mcan4 = "/bus@100000/can@2741000";
		dp0_pins_default = "/bus@100000/pinctrl@11c000/dp0-default-pins";
		watchdog14 = "/bus@100000/watchdog@23d0000";
		wkup_uart0_pins_default = "/bus@100000/bus@28380000/pinctrl@4301c068/wkup-uart0-default-pins";
		main_timer16 = "/bus@100000/timer@2500000";
		mux1 = "/mux-controller";
		main_timer6 = "/bus@100000/timer@2460000";
		watchdog2 = "/bus@100000/watchdog@2220000";
		cpu1 = "/cpus/cpu@1";
		vdd_sd_dv = "/regulator-TLV71033";
		main_uart7 = "/bus@100000/serial@2870000";
		mcu_spi2 = "/bus@100000/bus@28380000/spi@40320000";
		main_r5fss0 = "/bus@100000/r5fss@5c00000";
		mailbox0_cluster11 = "/bus@100000/bus@30000000/mailbox@31f8b000";
		acspcie0_proxy_ctrl = "/bus@100000/bus@100000/clock-controller@1a090";
		main_ehrpwm5 = "/bus@100000/pwm@3050000";
		c71_0_dma_memory_region = "/reserved-memory/c71-dma-memory@a8000000";
		mailbox0_cluster8 = "/bus@100000/bus@30000000/mailbox@31f88000";
		wkup0_crit = "/thermal-zones/wkup0-thermal/trips/wkup0-crit";
		vision_apps_main_r5fss1_core0_memory_region = "/reserved-memory/vision-apps-r5f-memory@a5100000";
		exp1 = "/bus@100000/i2c@2000000/gpio@20";
		main_cpsw0_port2 = "/bus@100000/ethernet@c000000/ethernet-ports/port@2";
		dpi0_out = "/bus@100000/dss@4a00000/ports/port@0/endpoint";
		serdes4 = "/bus@100000/wiz@5050000/serdes@5050000";
		main4_crit = "/thermal-zones/main4-thermal/trips/main4-crit";
		mcasp2 = "/bus@100000/mcasp@2b20000";
		mcu_i2c1 = "/bus@100000/bus@28380000/i2c@40b10000";
		mcu_r5fss0_core1_memory_region = "/reserved-memory/r5f-memory@a1100000";
		fss = "/bus@100000/bus@28380000/bus@47000000";
		c71_3_dma_memory_region = "/reserved-memory/c71-dma-memory@ab000000";
		mbox_c71_2 = "/bus@100000/bus@30000000/mailbox@31f85000/mbox-c71-2";
		cbass_main = "/bus@100000";
		gic_its = "/bus@100000/interrupt-controller@1800000/msi-controller@1820000";
		mcu_timer0 = "/bus@100000/bus@28380000/timer@40400000";
		main_r5fss2_core0_dma_memory_region = "/reserved-memory/r5f-dma-memory@a6000000";
		main4_thermal = "/thermal-zones/main4-thermal";
		main_mcan10 = "/bus@100000/can@27a1000";
		main_pmx0 = "/bus@100000/pinctrl@11c000";
		csi0_port4 = "/bus@100000/ticsi2rx@4500000/csi-bridge@4504000/ports/port@4";
		dp0_ports = "/bus@100000/bridge@a000000/ports";
		main_spi7 = "/bus@100000/spi@2170000";
		c71_3 = "/bus@100000/dsp@67800000";
		main_udmass_inta = "/bus@100000/bus@30000000/msi-controller@33d00000";
		rng = "/bus@100000/crypto@4e00000/rng@4e10000";
		mailbox1_cluster1 = "/bus@100000/bus@30000000/mailbox@31f91000";
		vision_apps_main_r5fss2_core1_memory_region = "/reserved-memory/vision-apps-r5f-memory@a8100000";
		main_mcan2 = "/bus@100000/can@2721000";
		watchdog12 = "/bus@100000/watchdog@2330000";
		pcie2_ctrl = "/bus@100000/bus@100000/pcie2-ctrl@4078";
		mbox_main_r5fss0_core0 = "/bus@100000/bus@30000000/mailbox@31f81000/mbox-main-r5fss0-core0";
		main_timer14 = "/bus@100000/timer@24e0000";
		mcu_uart0 = "/bus@100000/bus@28380000/serial@40a00000";
		main_timer4 = "/bus@100000/timer@2440000";
		watchdog0 = "/bus@100000/watchdog@2200000";
		main_mcasp0_pins_default = "/bus@100000/pinctrl@11c000/main-mcasp0-default-pins";
		mbox_main_r5fss2_core1 = "/bus@100000/bus@30000000/mailbox@31f83000/mbox-main-r5fss2-core1";
		main_i2c6 = "/bus@100000/i2c@2060000";
		main_uart5 = "/bus@100000/serial@2850000";
		mcu_spi0 = "/bus@100000/bus@28380000/spi@40300000";
		main_r5fss1_core0_memory_region = "/reserved-memory/r5f-memory@a4100000";
		mcu_r5fss0_core0_dma_memory_region = "/reserved-memory/r5f-dma-memory@a0000000";
		main_ehrpwm3 = "/bus@100000/pwm@3030000";
		serdes0_usb_link = "/bus@100000/wiz@5060000/serdes@5060000/phy@3";
		vision_apps_c71_0_dma_memory_region = "/reserved-memory/vision-apps-c71-dma-memory@b2000000";
		vision_apps_mcu_r5fss0_core1_dma_memory_region = "/reserved-memory/vision-apps-r5f-dma-memory@a1000000";
		mailbox0_cluster6 = "/bus@100000/bus@30000000/mailbox@31f86000";
		mcu_timer9 = "/bus@100000/bus@28380000/timer@40490000";
		mcu_r5fss0_core1 = "/bus@100000/bus@28380000/r5fss@41000000/r5f@41400000";
		serdes2 = "/bus@100000/wiz@5020000/serdes@5020000";
		cluster1 = "/cpus/cpu-map/cluster1";
		wkup_gpio_intr = "/bus@100000/bus@28380000/interrupt-controller@42200000";
		mcasp0 = "/bus@100000/mcasp@2b00000";
		ospi0_nand = "/bus@100000/bus@28380000/bus@47000000/spi@47040000/nand@0";
		vision_apps_c71_3_dma_memory_region = "/reserved-memory/vision-apps-c71_3-dma-memory@b8000000";
		mbox_c71_0 = "/bus@100000/bus@30000000/mailbox@31f84000/mbox-c71-0";
		main_cpsw1_phy0 = "/bus@100000/ethernet@c200000/mdio@f00/ethernet-phy@0";
		bucka12 = "/bus@100000/bus@28380000/i2c@42120000/pmic@48/regulators/buck12";
		main_r5fss0_core0_dma_memory_region = "/reserved-memory/r5f-dma-memory@a2000000";
		main_r5fss2_core1_memory_region = "/reserved-memory/r5f-memory@a7100000";
		csi0_port2 = "/bus@100000/ticsi2rx@4500000/csi-bridge@4504000/ports/port@2";
		vsys_io_1v2 = "/regulator-vsys-io-1v2";
		main_spi5 = "/bus@100000/spi@2150000";
		c71_1 = "/bus@100000/dsp@65800000";
		csi2_port3 = "/bus@100000/ticsi2rx@4520000/csi-bridge@4524000/ports/port@3";
		vsys_3v3 = "/regulator-vsys3v3";
		watchdog9 = "/bus@100000/watchdog@2300000";
		cdns_csi2rx1 = "/bus@100000/ticsi2rx@4510000/csi-bridge@4514000";
		mcu_mcan1_gpio_pins_default = "/bus@100000/bus@28380000/pinctrl@4301c068/mcu-mcan1-gpio-default-pins";
		main_i2c3_pins_default = "/bus@100000/pinctrl@11c000/main-i2c3-default-pins";
		main_mcan0 = "/bus@100000/can@2701000";
		main_udmap = "/bus@100000/bus@30000000/dma-controller@31150000";
		watchdog10 = "/bus@100000/watchdog@2310000";
		linux_cma_region = "/reserved-memory/linux-cma-buffers@a80000000";
		mcu_adc1_pins_default = "/bus@100000/bus@28380000/pinctrl@4301c068/mcu-adc1-default-pins";
		main_gpio6 = "/bus@100000/gpio@630000";
		main_timer12 = "/bus@100000/timer@24c0000";
		main_timer2 = "/bus@100000/timer@2420000";
		tps659413 = "/bus@100000/bus@28380000/i2c@42120000/pmic@48";
		dsi0 = "/bus@100000/dsi@4800000";
		wkup_uart0 = "/bus@100000/bus@28380000/serial@42300000";
		main_i2c4 = "/bus@100000/i2c@2040000";
		main3_crit = "/thermal-zones/main3-thermal/trips/main3-crit";
		main_uart3 = "/bus@100000/serial@2830000";
		vsys_5v0 = "/regulator-vsys5v0";
		main_r5fss1_core0 = "/bus@100000/r5fss@5e00000/r5f@5e00000";
		ldoa3 = "/bus@100000/bus@28380000/i2c@42120000/pmic@48/regulators/ldo3";
		main_ehrpwm1 = "/bus@100000/pwm@3010000";
		reserved_memory = "/reserved-memory";
		mcu_mcan0_pins_default = "/bus@100000/bus@28380000/pinctrl@4301c068/mcu-mcan0-default-pins";
		mailbox0_cluster4 = "/bus@100000/bus@30000000/mailbox@31f84000";
		dp1_connector_in = "/connector-dp1/port/endpoint";
		mcu_timer7 = "/bus@100000/bus@28380000/timer@40470000";
		main_mcan17 = "/bus@100000/can@26b1000";
		serdes0 = "/bus@100000/wiz@5060000/serdes@5060000";
		dphy2 = "/bus@100000/phy@45a0000";
		main_i2c0_pins_default = "/bus@100000/pinctrl@11c000/main-i2c0-default-pins";
		vision_apps_main_r5fss1_core1_dma_memory_region = "/reserved-memory/vision-apps-r5f-dma-memory@a6000000";
		mailbox1_cluster8 = "/bus@100000/bus@30000000/mailbox@31f98000";
		wkup_i2c0 = "/bus@100000/bus@28380000/i2c@42120000";
		main_mcan9 = "/bus@100000/can@2791000";
		ehrpwm_tbclk = "/bus@100000/bus@100000/clock-controller@4140";
		tps62873b = "/bus@100000/bus@28380000/i2c@42120000/regulator@43";
		pcie1_ctrl = "/bus@100000/bus@100000/pcie1-ctrl@4074";
		pcie2_rc = "/bus@100000/pcie@2920000";
		csi0_port0 = "/bus@100000/ticsi2rx@4500000/csi-bridge@4504000/ports/port@0";
		main_spi3 = "/bus@100000/spi@2130000";
		evm_12v0 = "/regulator-evm12v0";
		csi2_port1 = "/bus@100000/ticsi2rx@4520000/csi-bridge@4524000/ports/port@1";
		watchdog7 = "/bus@100000/watchdog@2270000";
		cpu6 = "/cpus/cpu@102";
		wkup_pmx3 = "/bus@100000/bus@28380000/pinctrl@4301c190";
		vpu1 = "/bus@100000/video-codec@4220000";
		mcu_mdio_pins_default = "/bus@100000/bus@28380000/pinctrl@4301c068/mcu-mdio-default-pins";
		main_sdhci0 = "/bus@100000/mmc@4f80000";
		bucka4 = "/bus@100000/bus@28380000/i2c@42120000/pmic@48/regulators/buck4";
		pcm3168a_1 = "/bus@100000/i2c@2030000/audio-codec@44";
		wkup_gpio1 = "/bus@100000/bus@28380000/gpio@42100000";
		main_gpio4 = "/bus@100000/gpio@620000";
		mcu_ringacc = "/bus@100000/bus@28380000/bus@28380000/ringacc@2b800000";
		main_timer10 = "/bus@100000/timer@24a0000";
		main_timer0 = "/bus@100000/timer@2400000";
		dp1 = "/connector-dp1";
		main_cpsw0_port7 = "/bus@100000/ethernet@c000000/ethernet-ports/port@7";
		main_i2c2 = "/bus@100000/i2c@2020000";
		main_uart1 = "/bus@100000/serial@2810000";
		ldoa1 = "/bus@100000/bus@28380000/i2c@42120000/pmic@48/regulators/ldo1";
		L2_0 = "/l2-cache0";
		k3_clks = "/bus@100000/bus@28380000/system-controller@44083000/clock-controller";
		mailbox0_cluster2 = "/bus@100000/bus@30000000/mailbox@31f82000";
		c71_2_memory_region = "/reserved-memory/c71-memory@aa100000";
		mcu_timer5 = "/bus@100000/bus@28380000/timer@40450000";
		main_mcan15 = "/bus@100000/can@2691000";
		dp0_pwr_3v3 = "/regulator-dp0-prw";
		serdes0_pcie1_link = "/bus@100000/wiz@5060000/serdes@5060000/phy@0";
		mbox_mcu_r5fss0_core0 = "/bus@100000/bus@30000000/mailbox@31f80000/mbox-mcu-r5fss0-core0";
		serdes_wiz4 = "/bus@100000/wiz@5050000";
		hwspinlock = "/bus@100000/bus@30000000/hwlock@30e00000";
		dphy0 = "/bus@100000/phy@4580000";
		usb0 = "/bus@100000/usb@4104000/usb@6000000";
		mailbox1_cluster6 = "/bus@100000/bus@30000000/mailbox@31f96000";
		csi1_port4 = "/bus@100000/ticsi2rx@4510000/csi-bridge@4514000/ports/port@4";
		main_mcan7 = "/bus@100000/can@2771000";
		watchdog17 = "/bus@100000/watchdog@2540000";
		vision_apps_main_r5fss2_core0_dma_memory_region = "/reserved-memory/vision-apps-r5f-dma-memory@a7000000";
		main_cpsw1_mdio = "/bus@100000/ethernet@c200000/mdio@f00";
		main_spi1 = "/bus@100000/spi@2110000";
		main_timer19 = "/bus@100000/timer@2530000";
		main2_crit = "/thermal-zones/main2-thermal/trips/main2-crit";
		main_timerio_input = "/bus@100000/pinctrl@104200";
		main_timer9 = "/bus@100000/timer@2490000";
		watchdog5 = "/bus@100000/watchdog@2250000";
		cpu4 = "/cpus/cpu@100";
		dsi0_in = "/bus@100000/dsi@4800000/ports/port@1/endpoint";
		mcu_ram = "/bus@100000/bus@28380000/sram@41c00000";
		main1_thermal = "/thermal-zones/main1-thermal";
		wkup_pmx1 = "/bus@100000/bus@28380000/pinctrl@4301c038";
		mhdp = "/bus@100000/bridge@a000000";
		c71_1_dma_memory_region = "/reserved-memory/c71-dma-memory@a9000000";
		c7x_ddr_heaps_hi = "/reserved-memory/c7x-ddr-heaps-hi@880000000";
		msmc_ram = "/bus@100000/sram@70000000";
		mbox_main_r5fss1_core0 = "/bus@100000/bus@30000000/mailbox@31f82000/mbox-main-r5fss1-core0";
		dsi0_ports = "/bus@100000/dsi@4800000/ports";
		main_navss_intr = "/bus@100000/bus@30000000/interrupt-controller@310e0000";
		vision_apps_c71_2_memory_region = "/reserved-memory/vision-apps-c71_2-memory@b6100000";
		main_r5fss0_core1 = "/bus@100000/r5fss@5c00000/r5f@5d00000";
		tscadc1 = "/bus@100000/bus@28380000/tscadc@40210000";
		main_gpio2 = "/bus@100000/gpio@610000";
		exp4 = "/bus@100000/i2c@2040000/gpio@20";
		main_mcan16_pins_default = "/bus@100000/pinctrl@11c000/main-mcan16-default-pins";
		wkup0_thermal = "/thermal-zones/wkup0-thermal";
		main_cpsw0_port5 = "/bus@100000/ethernet@c000000/ethernet-ports/port@5";
		main_i2c0 = "/bus@100000/i2c@2000000";
		ospi0_nor = "/bus@100000/bus@28380000/bus@47000000/spi@47040000/flash@0";
		main_r5fss2_core1_dma_memory_region = "/reserved-memory/r5f-dma-memory@a7000000";
		phy_gmii_sel = "/bus@100000/bus@28380000/bus@40f00000/phy@4040";
		mcu_watchdog0 = "/bus@100000/bus@28380000/watchdog@40600000";
		vision_apps_main_r5fss0_core0_shared_memory_bufpool_region = "/reserved-memory/vision-apps-r5f-virtual-eth-buffers@be800000";
		wkup_vtm0 = "/bus@100000/bus@28380000/temperature-sensor@42040000";
		mailbox0_cluster0 = "/bus@100000/bus@30000000/mailbox@31f80000";
		pcie0_ctrl = "/bus@100000/bus@100000/pcie0-ctrl@4070";
		mcu_timer3 = "/bus@100000/bus@28380000/timer@40430000";
		mailbox1_cluster11 = "/bus@100000/bus@30000000/mailbox@31f9b000";
		main_usbss0_pins_default = "/bus@100000/pinctrl@11c000/main-usbss0-default-pins";
		vision_apps_memory_region = "/reserved-memory/vision-apps-dma-memory@af000000";
		main_mcan13 = "/bus@100000/can@27d1000";
		ti_csi2rx2 = "/bus@100000/ticsi2rx@4520000";
		serdes_refclk = "/clock-serdes";
		main_cpsw0 = "/bus@100000/ethernet@c000000";
		transceiver2 = "/can-phy2";
		vision_apps_main_r5fss0_core0_memory_region = "/reserved-memory/vision-apps-r5f-memory@a2100000";
		main_timerio_output = "/bus@100000/pinctrl@104280";
		mcu_fss0_ospi0_pins_default = "/bus@100000/bus@28380000/pinctrl@4301c000/mcu-fss0-ospi0-default-pins";
		vision_apps_main_r5fss0_core0_shared_memory_queue_region = "/reserved-memory/vision-apps-r5f-virtual-eth-queues@be000000";
		vision_apps_mcu_r5fss0_core0_memory_region = "/reserved-memory/vision-apps-r5f-memory@a0100000";
		serdes_wiz2 = "/bus@100000/wiz@5020000";
		mcu_mcan0 = "/bus@100000/bus@28380000/can@40528000";
		mcu_udmap = "/bus@100000/bus@28380000/bus@28380000/dma-controller@285c0000";
		mailbox1_cluster4 = "/bus@100000/bus@30000000/mailbox@31f94000";
		csi1_port2 = "/bus@100000/ticsi2rx@4510000/csi-bridge@4514000/ports/port@2";
		main_mcan5 = "/bus@100000/can@2751000";
		c71_0_memory_region = "/reserved-memory/c71-memory@a8100000";
		secure_proxy_main = "/bus@100000/bus@30000000/mailbox@32c00000";
		k3_reset = "/bus@100000/bus@28380000/system-controller@44083000/reset-controller";
		pmu = "/pmu";
		watchdog15 = "/bus@100000/watchdog@23e0000";
		vision_apps_main_r5fss0_core0_dma_memory_region = "/reserved-memory/vision-apps-r5f-dma-memory@a2000000";
		main_timer17 = "/bus@100000/timer@2510000";
		mcu_r5fss0_core1_dma_memory_region = "/reserved-memory/r5f-dma-memory@a1000000";
		mcu_esm = "/bus@100000/bus@28380000/esm@40800000";
		main_timer7 = "/bus@100000/timer@2470000";
		watchdog3 = "/bus@100000/watchdog@2230000";
		vision_apps_core_heaps_lo = "/reserved-memory/vision-apps-core-heap-memory-lo@ba000000";
		cpu2 = "/cpus/cpu@2";
		wkup_conf = "/bus@100000/bus@28380000/bus@43000000";
		vision_apps_c71_1_dma_memory_region = "/reserved-memory/vision-apps-c71_1-dma-memory@b4000000";
		main_uart8 = "/bus@100000/serial@2880000";
		main_r5fss1 = "/bus@100000/r5fss@5e00000";
		edp1_refclk = "/clock-edp1-refclk";
		vision_apps_main_r5fss1_core1_memory_region = "/reserved-memory/vision-apps-r5f-memory@a6100000";
		mailbox0_cluster9 = "/bus@100000/bus@30000000/mailbox@31f89000";
		main_gpio0 = "/bus@100000/gpio@600000";
		main_r5fss2_core0 = "/bus@100000/r5fss@5900000/r5f@5900000";
		exp2 = "/bus@100000/i2c@2000000/gpio@22";
		cbass_mcu_wakeup = "/bus@100000/bus@28380000";
		main_i2c4_pins_default = "/bus@100000/pinctrl@11c000/main-i2c4-default-pins";
		main_cpsw0_port3 = "/bus@100000/ethernet@c000000/ethernet-ports/port@3";
		main_r5fss0_core0_memory_region = "/reserved-memory/r5f-memory@a2100000";
		main3_thermal = "/thermal-zones/main3-thermal";
		audio_refclk1 = "/bus@100000/bus@100000/clock@82e4";
		main_r5fss0_core1_dma_memory_region = "/reserved-memory/r5f-dma-memory@a3000000";
		mcasp3 = "/bus@100000/mcasp@2b30000";
		a72_timer0 = "/timer-cl0-cpu0";
		vision_apps_c71_0_memory_region = "/reserved-memory/vision-apps-c71_0-memory@b2100000";
		mbox_c71_3 = "/bus@100000/bus@30000000/mailbox@31f85000/mbox-c71-3";
		mcu_timer1 = "/bus@100000/bus@28380000/timer@40410000";
		main_cpsw0_mdio = "/bus@100000/ethernet@c000000/mdio@f00";
		main_mcan11 = "/bus@100000/can@27b1000";
		ti_csi2rx0 = "/bus@100000/ticsi2rx@4500000";
		transceiver0 = "/can-phy0";
		main1_crit = "/thermal-zones/main1-thermal/trips/main1-crit";
		serdes_wiz0 = "/bus@100000/wiz@5060000";
		mcu_mcan1_pins_default = "/bus@100000/bus@28380000/pinctrl@4301c068/mcu-mcan1-default-pins";
		ospi0 = "/bus@100000/bus@28380000/bus@47000000/spi@47040000";
		mailbox1_cluster2 = "/bus@100000/bus@30000000/mailbox@31f92000";
		csi1_port0 = "/bus@100000/ticsi2rx@4510000/csi-bridge@4514000/ports/port@0";
		main_mcan3 = "/bus@100000/can@2731000";
		watchdog13 = "/bus@100000/watchdog@23c0000";
		secure_proxy_sa3 = "/bus@100000/bus@28380000/mailbox@43600000";
		main_r5fss1_core1_memory_region = "/reserved-memory/r5f-memory@a5100000";
		mbox_main_r5fss0_core1 = "/bus@100000/bus@30000000/mailbox@31f81000/mbox-main-r5fss0-core1";
		main_timer15 = "/bus@100000/timer@24f0000";
		dp1_in = "/bus@100000/i2c@2040000/dsi-edp-bridge@2c/ports/port@0/endpoint";
		main_timer5 = "/bus@100000/timer@2450000";
		watchdog1 = "/bus@100000/watchdog@2210000";
		cpu0 = "/cpus/cpu@0";
		dpi2_out = "/bus@100000/dss@4a00000/ports/port@2/endpoint";
		main_uart6 = "/bus@100000/serial@2860000";
		mcu_spi1 = "/bus@100000/bus@28380000/spi@40310000";
		mailbox0_cluster10 = "/bus@100000/bus@30000000/mailbox@31f8a000";
		main_ehrpwm4 = "/bus@100000/pwm@3040000";
		mailbox0_cluster7 = "/bus@100000/bus@30000000/mailbox@31f87000";
		mcu_timerio_input = "/bus@100000/bus@28380000/pinctrl@40f04200";
	};

	reserved-memory {
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		ranges;
		phandle = <0x1bd>;

		c71-dma-memory@a8000000 {
			compatible = "shared-dma-pool";
			status = "disabled";
			reg = <0x00 0xa8000000 0x00 0x100000>;
			phandle = <0x71>;
			no-map;
		};

		vision-apps-c71_2-memory@b6100000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xb6100000 0x00 0x1f00000>;
			phandle = <0x1db>;
			no-map;
		};

		vision-apps-core-heap-memory-lo@ba000000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xba000000 0x00 0x4000000>;
			phandle = <0x1e0>;
			no-map;
		};

		r5f-dma-memory@a2000000 {
			compatible = "shared-dma-pool";
			status = "disabled";
			reg = <0x00 0xa2000000 0x00 0x100000>;
			phandle = <0x5c>;
			no-map;
		};

		vision-apps-r5f-dma-memory@a4000000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa4000000 0x00 0x100000>;
			phandle = <0x1cc>;
			no-map;
		};

		linux,cma {
			linux,cma-default;
			compatible = "shared-dma-pool";
			size = <0x00 0x70000000>;
			status = "disabled";
			reusable;
		};

		vision-apps-r5f-memory@a4100000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa4100000 0x00 0xf00000>;
			phandle = <0x1cd>;
			no-map;
		};

		c71-memory@ab100000 {
			compatible = "shared-dma-pool";
			status = "disabled";
			reg = <0x00 0xab100000 0x00 0xf00000>;
			phandle = <0x86>;
			no-map;
		};

		r5f-memory@a6100000 {
			compatible = "shared-dma-pool";
			status = "disabled";
			reg = <0x00 0xa6100000 0x00 0xf00000>;
			phandle = <0x6b>;
			no-map;
		};

		vision-apps-r5f-virtual-eth-queues@be000000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xbe000000 0x00 0x800000>;
			phandle = <0x1ca>;
			no-map;
		};

		r5f-dma-memory@a6000000 {
			compatible = "shared-dma-pool";
			status = "disabled";
			reg = <0x00 0xa6000000 0x00 0x100000>;
			phandle = <0x6a>;
			no-map;
		};

		vision-apps-r5f-dma-memory@a8000000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa8000000 0x00 0x100000>;
			phandle = <0x1d4>;
			no-map;
		};

		vision-apps-c71_0-memory@b2100000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xb2100000 0x00 0x1f00000>;
			phandle = <0x1d7>;
			no-map;
		};

		vision-apps-r5f-memory@a8100000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa8100000 0x00 0xf00000>;
			phandle = <0x1d5>;
			no-map;
		};

		vision-apps-rtos-ipc-memory-region@ac000000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xac000000 0x00 0x3000000>;
			phandle = <0x1de>;
			no-map;
		};

		vision-apps-r5f-dma-memory@a1000000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa1000000 0x00 0x100000>;
			phandle = <0x1c6>;
			no-map;
		};

		c7x-ddr-heaps-hi@880000000 {
			compatible = "shared-dma-pool";
			reg = <0x08 0x80000000 0x01 0x00>;
			phandle = <0x1e1>;
			no-map;
		};

		c71-dma-memory@aa000000 {
			compatible = "shared-dma-pool";
			status = "disabled";
			reg = <0x00 0xaa000000 0x00 0x100000>;
			phandle = <0x78>;
			no-map;
		};

		vision-apps-r5f-memory@a1100000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa1100000 0x00 0xf00000>;
			phandle = <0x1c7>;
			no-map;
		};

		r5f-memory@a3100000 {
			compatible = "shared-dma-pool";
			status = "disabled";
			reg = <0x00 0xa3100000 0x00 0xf00000>;
			phandle = <0x60>;
			no-map;
		};

		c71-dma-memory@a9000000 {
			compatible = "shared-dma-pool";
			status = "disabled";
			reg = <0x00 0xa9000000 0x00 0x100000>;
			phandle = <0x74>;
			no-map;
		};

		vision-apps-dma-memory@af000000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xaf000000 0x00 0x3000000>;
			phandle = <0x1df>;
			no-map;
		};

		r5f-virtual-eth-queues@af000000 {
			compatible = "shared-dma-pool";
			status = "disabled";
			reg = <0x00 0xaf000000 0x00 0x200000>;
			phandle = <0x1c2>;
			no-map;
		};

		r5f-dma-memory@a3000000 {
			compatible = "shared-dma-pool";
			status = "disabled";
			reg = <0x00 0xa3000000 0x00 0x100000>;
			phandle = <0x5f>;
			no-map;
		};

		vision-apps-r5f-dma-memory@a5000000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa5000000 0x00 0x100000>;
			phandle = <0x1ce>;
			no-map;
		};

		vision_apps_shared-memories {
			compatible = "dma-heap-carveout";
			reg = <0x0a 0x00 0x00 0x3c000000>;
			phandle = <0x1e2>;
		};

		vision-apps-r5f-memory@a5100000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa5100000 0x00 0xf00000>;
			phandle = <0x1cf>;
			no-map;
		};

		r5f-memory@a7100000 {
			compatible = "shared-dma-pool";
			status = "disabled";
			reg = <0x00 0xa7100000 0x00 0xf00000>;
			phandle = <0x6e>;
			no-map;
		};

		linux-cma-buffers@a80000000 {
			linux,cma-default;
			compatible = "shared-dma-pool";
			reg = <0x0a 0x80000000 0x00 0x70000000>;
			phandle = <0x1e3>;
			reusable;
		};

		r5f-dma-memory@a7000000 {
			compatible = "shared-dma-pool";
			status = "disabled";
			reg = <0x00 0xa7000000 0x00 0x100000>;
			phandle = <0x6d>;
			no-map;
		};

		vision-apps-c71_3-memory@b8100000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xb8100000 0x00 0x1f00000>;
			phandle = <0x1dd>;
			no-map;
		};

		r5f-memory@a0100000 {
			compatible = "shared-dma-pool";
			status = "disabled";
			reg = <0x00 0xa0100000 0x00 0xf00000>;
			phandle = <0x20>;
			no-map;
		};

		vision-apps-r5f-virtual-eth-buffers@be800000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xbe800000 0x00 0x1800000>;
			phandle = <0x1cb>;
			no-map;
		};

		optee@9e800000 {
			reg = <0x00 0x9e800000 0x00 0x1800000>;
			phandle = <0x1be>;
			no-map;
		};

		r5f-dma-memory@a0000000 {
			compatible = "shared-dma-pool";
			status = "disabled";
			reg = <0x00 0xa0000000 0x00 0x100000>;
			phandle = <0x1f>;
			no-map;
		};

		vision-apps-r5f-dma-memory@a2000000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa2000000 0x00 0x100000>;
			phandle = <0x1c8>;
			no-map;
		};

		vision-apps-c71_1-dma-memory@b4000000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xb4000000 0x00 0x100000>;
			phandle = <0x1d8>;
			no-map;
		};

		c71-dma-memory@ab000000 {
			compatible = "shared-dma-pool";
			status = "disabled";
			reg = <0x00 0xab000000 0x00 0x100000>;
			phandle = <0x85>;
			no-map;
		};

		vision-apps-r5f-memory@a2100000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa2100000 0x00 0x1f00000>;
			phandle = <0x1c9>;
			no-map;
		};

		r5f-memory@a4100000 {
			compatible = "shared-dma-pool";
			status = "disabled";
			reg = <0x00 0xa4100000 0x00 0xf00000>;
			phandle = <0x64>;
			no-map;
		};

		c71-memory@a8100000 {
			compatible = "shared-dma-pool";
			status = "disabled";
			reg = <0x00 0xa8100000 0x00 0xf00000>;
			phandle = <0x72>;
			no-map;
		};

		r5f-dma-memory@a4000000 {
			compatible = "shared-dma-pool";
			status = "disabled";
			reg = <0x00 0xa4000000 0x00 0x100000>;
			phandle = <0x63>;
			no-map;
		};

		vision-apps-c71_1-memory@b4100000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xb4100000 0x00 0x1f00000>;
			phandle = <0x1d9>;
			no-map;
		};

		vision-apps-r5f-dma-memory@a6000000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa6000000 0x00 0x100000>;
			phandle = <0x1d0>;
			no-map;
		};

		vision-apps-r5f-memory@a6100000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa6100000 0x00 0xf00000>;
			phandle = <0x1d1>;
			no-map;
		};

		vision-apps-c71_2-dma-memory@b6000000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xb6000000 0x00 0x100000>;
			phandle = <0x1da>;
			no-map;
		};

		r5f-memory@a1100000 {
			compatible = "shared-dma-pool";
			status = "disabled";
			reg = <0x00 0xa1100000 0x00 0xf00000>;
			phandle = <0x23>;
			no-map;
		};

		r5f-dma-memory@a1000000 {
			compatible = "shared-dma-pool";
			status = "disabled";
			reg = <0x00 0xa1000000 0x00 0x100000>;
			phandle = <0x22>;
			no-map;
		};

		c71-memory@aa100000 {
			compatible = "shared-dma-pool";
			status = "disabled";
			reg = <0x00 0xaa100000 0x00 0xf00000>;
			phandle = <0x79>;
			no-map;
		};

		r5f-memory@a5100000 {
			compatible = "shared-dma-pool";
			status = "disabled";
			reg = <0x00 0xa5100000 0x00 0xf00000>;
			phandle = <0x67>;
			no-map;
		};

		vision-apps-c71-dma-memory@b2000000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xb2000000 0x00 0x100000>;
			phandle = <0x1d6>;
			no-map;
		};

		c71-memory@a9100000 {
			compatible = "shared-dma-pool";
			status = "disabled";
			reg = <0x00 0xa9100000 0x00 0xf00000>;
			phandle = <0x75>;
			no-map;
		};

		vision-apps-c71_3-dma-memory@b8000000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xb8000000 0x00 0x100000>;
			phandle = <0x1dc>;
			no-map;
		};

		r5f-dma-memory@a5000000 {
			compatible = "shared-dma-pool";
			status = "disabled";
			reg = <0x00 0xa5000000 0x00 0x100000>;
			phandle = <0x66>;
			no-map;
		};

		vision-apps-r5f-dma-memory@a7000000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa7000000 0x00 0x100000>;
			phandle = <0x1d2>;
			no-map;
		};

		vision-apps-r5f-memory@a7100000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa7100000 0x00 0xf00000>;
			phandle = <0x1d3>;
			no-map;
		};

		vision-apps-r5f-dma-memory@a0000000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa0000000 0x00 0x100000>;
			phandle = <0x1c4>;
			no-map;
		};

		r5f-virtual-eth-buffers@af200000 {
			compatible = "shared-dma-pool";
			status = "disabled";
			reg = <0x00 0xaf200000 0x00 0x1e00000>;
			phandle = <0x1c3>;
			no-map;
		};

		vision-apps-r5f-memory@a0100000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa0100000 0x00 0xf00000>;
			phandle = <0x1c5>;
			no-map;
		};

		r5f-memory@a2100000 {
			compatible = "shared-dma-pool";
			status = "disabled";
			reg = <0x00 0xa2100000 0x00 0xf00000>;
			phandle = <0x5d>;
			no-map;
		};
	};

	connector-dp0 {
		label = "DP0";
		type = "full-size";
		compatible = "dp-connector";
		dp-pwr-supply = <0x99>;
		phandle = <0x1bf>;

		port {

			endpoint {
				remote-endpoint = <0x9a>;
				phandle = <0x80>;
			};
		};
	};

	can-phy2 {
		#phy-cells = <0x00>;
		compatible = "ti,tcan1042";
		phandle = <0x59>;
		max-bitrate = <0x4c4b40>;
	};
};