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This file contains the type definitions and helper macros for the Ethernet PHY interface. More...
#include <stdint.h>
#include <ti/csl/csl_types.h>
Data Structures | |
struct | EnetPhy_MacCfg_s |
MAC port parameters: MII interface, capabilities. More... | |
struct | EnetPhy_Version_s |
PHY version (ID). More... | |
struct | EnetPhy_LinkCfg_s |
Link speed and duplexity configuration. More... | |
struct | EnetPhy_FsmTimeoutCfg_s |
PHY State-Machine time-out values. More... | |
struct | EnetPhy_Cfg_s |
PHY configuration parameters. More... | |
struct | EnetPhy_Mdio_s |
MDIO driver. More... | |
Macros | |
#define | ENETPHY_EXTENDED_CFG_SIZE_MAX (128U) |
Max extended configuration size, arbitrarily chosen. | |
#define | ENETPHY_FSM_TICK_PERIOD_MS (100U) |
Enet PHY State Machine tick period. | |
#define | ENETPHY_INVALID_PHYADDR (~0U) |
Invalid PHY address indicator. | |
Ethernet PHY driver error codes | |
#define | ENETPHY_SOK (CSL_PASS) |
Success. | |
#define | ENETPHY_EFAIL (CSL_EFAIL) |
Generic failure error condition (typically caused by hardware). | |
#define | ENETPHY_EBADARGS (CSL_EBADARGS) |
Bad arguments (i.e. NULL pointer). | |
#define | ENETPHY_EINVALIDPARAMS (CSL_EINVALID_PARAMS) |
Invalid parameters (i.e. value out-of-range). | |
#define | ENETPHY_ETIMEOUT (CSL_ETIMEOUT) |
Time out while waiting for a given condition to happen. | |
#define | ENETPHY_EALLOC (CSL_EALLOC) |
Allocation failure. | |
#define | ENETPHY_EPERM (CSL_EALLOC - 4) |
Operation not permitted. | |
#define | ENETPHY_ENOTSUPPORTED (CSL_EALLOC - 5) |
Operation not supported. | |
Ethernet PHY link capability masks | |
#define | ENETPHY_LINK_CAP_HD10 ENETPHY_BIT(1) |
10-Mbps, half-duplex capability mask. | |
#define | ENETPHY_LINK_CAP_FD10 ENETPHY_BIT(2) |
10-Mbps, full-duplex capability mask. | |
#define | ENETPHY_LINK_CAP_HD100 ENETPHY_BIT(3) |
100-Mbps, half-duplex capability mask. | |
#define | ENETPHY_LINK_CAP_FD100 ENETPHY_BIT(4) |
100-Mbps, full-duplex capability mask. | |
#define | ENETPHY_LINK_CAP_HD1000 ENETPHY_BIT(5) |
1-Gbps, half-duplex capability mask. | |
#define | ENETPHY_LINK_CAP_FD1000 ENETPHY_BIT(6) |
1-Gbps, full-duplex capability mask. | |
#define | ENETPHY_LINK_CAP_10 |
10-Mbps, full and half-duplex capability mask. More... | |
#define | ENETPHY_LINK_CAP_100 |
100-Mbps, full and half-duplex capability mask. More... | |
#define | ENETPHY_LINK_CAP_1000 |
1-Gbps, full and half-duplex capability mask. More... | |
#define | ENETPHY_LINK_CAP_ALL |
Auto-negotiation mask with all duplexity and speed values set. More... | |
Typedefs | |
typedef enum EnetPhy_Mii_e | EnetPhy_Mii |
MAC Media-Independent Interface (MII). | |
typedef struct EnetPhy_MacCfg_s | EnetPhy_MacCfg |
MAC port parameters: MII interface, capabilities. | |
typedef enum EnetPhy_Speed_e | EnetPhy_Speed |
MAC interface speed. | |
typedef enum EnetPhy_Duplexity_e | EnetPhy_Duplexity |
MAC interface duplexity. | |
typedef struct EnetPhy_Version_s | EnetPhy_Version |
PHY version (ID). | |
typedef enum EnetPhy_LinkStatus_e | EnetPhy_LinkStatus |
PHY link status. | |
typedef struct EnetPhy_LinkCfg_s | EnetPhy_LinkCfg |
Link speed and duplexity configuration. | |
typedef struct EnetPhy_FsmTimeoutCfg_s | EnetPhy_FsmTimeoutCfg |
PHY State-Machine time-out values. | |
typedef struct EnetPhy_Cfg_s | EnetPhy_Cfg |
PHY configuration parameters. | |
typedef struct EnetPhy_Mdio_s | EnetPhy_Mdio |
MDIO driver. | |
typedef EnetPhy_Mdio * | EnetPhy_MdioHandle |
MDIO driver handle. | |
typedef struct EnetPhy_Obj_s * | EnetPhy_Handle |
PHY driver object handle. More... | |
Enumerations | |
enum | EnetPhy_Mii_e { ENETPHY_MAC_MII_MII = 0U, ENETPHY_MAC_MII_RMII, ENETPHY_MAC_MII_GMII, ENETPHY_MAC_MII_RGMII, ENETPHY_MAC_MII_SGMII, ENETPHY_MAC_MII_QSGMII } |
MAC Media-Independent Interface (MII). More... | |
enum | EnetPhy_Speed_e { ENETPHY_SPEED_10MBIT = 0U, ENETPHY_SPEED_100MBIT, ENETPHY_SPEED_1GBIT, ENETPHY_SPEED_AUTO } |
MAC interface speed. More... | |
enum | EnetPhy_Duplexity_e { ENETPHY_DUPLEX_HALF = 0U, ENETPHY_DUPLEX_FULL, ENETPHY_DUPLEX_AUTO } |
MAC interface duplexity. More... | |
enum | EnetPhy_LinkStatus_e { ENETPHY_GOT_LINK = 0U, ENETPHY_LINK_UP, ENETPHY_LOST_LINK, ENETPHY_LINK_DOWN } |
PHY link status. More... | |
Functions | |
void | EnetPhy_initParams (EnetPhy_Cfg *phyCfg) |
Initialize PHY config params. More... | |
void | EnetPhy_setExtendedParams (EnetPhy_Cfg *phyCfg, const void *extendedCfg, uint32_t extendedCfgSize) |
Set PHY extended parameters. More... | |
EnetPhy_Handle | EnetPhy_open (EnetPhy_MdioHandle hMdio, const EnetPhy_MacCfg *macCfg, const EnetPhy_Cfg *phyCfg, const EnetPhy_LinkCfg *linkCfg) |
Open the PHY driver. More... | |
void | EnetPhy_close (EnetPhy_Handle hPhy) |
Close the PHY driver. More... | |
EnetPhy_LinkStatus | EnetPhy_tick (EnetPhy_Handle hPhy) |
Run PHY state machine. More... | |
bool | EnetPhy_isLinked (EnetPhy_Handle hPhy) |
Get link status. More... | |
int32_t | EnetPhy_getLinkCfg (EnetPhy_Handle hPhy, EnetPhy_LinkCfg *linkCfg) |
Get link configuration. More... | |
int32_t | EnetPhy_readReg (EnetPhy_Handle hPhy, uint32_t reg, uint16_t *val) |
Read PHY register. More... | |
int32_t | EnetPhy_writeReg (EnetPhy_Handle hPhy, uint32_t reg, uint16_t val) |
Write PHY register. More... | |
int32_t | EnetPhy_rmwReg (EnetPhy_Handle hPhy, uint32_t reg, uint16_t mask, uint16_t val) |
Read-modify-write PHY register. More... | |
int32_t | EnetPhy_readExtReg (EnetPhy_Handle hPhy, uint32_t reg, uint16_t *val) |
Read PHY extended register. More... | |
int32_t | EnetPhy_writeExtReg (EnetPhy_Handle hPhy, uint32_t reg, uint16_t val) |
Write PHY extended register. More... | |
int32_t | EnetPhy_rmwExtReg (EnetPhy_Handle hPhy, uint32_t reg, uint16_t mask, uint16_t val) |
Read-modify-write PHY extended register. More... | |
int32_t | EnetPhy_readC45Reg (EnetPhy_Handle hPhy, uint8_t mmd, uint32_t reg, uint16_t *val) |
Read PHY register using Clause-45 frame. More... | |
int32_t | EnetPhy_writeC45Reg (EnetPhy_Handle hPhy, uint8_t mmd, uint32_t reg, uint16_t val) |
Write PHY register using Clause-45 frame. More... | |
int32_t | EnetPhy_rmwC45Reg (EnetPhy_Handle hPhy, uint8_t mmd, uint32_t reg, uint16_t mask, uint16_t val) |
Read-modify-write PHY register using Clause-45 frame. More... | |
void | EnetPhy_printRegs (EnetPhy_Handle hPhy) |
Print all PHY registers. More... | |
This file contains the type definitions and helper macros for the Ethernet PHY interface.