Data Fields
EnetUdma_UdmaChTxPrms_s Struct Reference

Enet UDMA TX channel parameters. More...

#include <enet_udma.h>

Data Fields

uint8_t filterEinfo
 
uint8_t filterPsWords
 
uint8_t addrType
 
uint8_t chanType
 
uint8_t busPriority
 
uint8_t busQos
 
uint8_t busOrderId
 
uint8_t dmaPriority
 
uint8_t txCredit
 
uint16_t fifoDepth
 

Detailed Description

Enet UDMA TX channel parameters.

The structure is stripped down version of #Udma_ChTxPrms

Field Documentation

uint8_t EnetUdma_UdmaChTxPrms_s::addrType

[IN] Address type for this channel. Refer #tisci_msg_rm_udmap_tx_ch_cfg_req::tx_atype

uint8_t EnetUdma_UdmaChTxPrms_s::busOrderId

[IN] 4-bit orderid value

uint8_t EnetUdma_UdmaChTxPrms_s::busPriority

[IN] 3-bit priority value (0=highest, 7=lowest)

uint8_t EnetUdma_UdmaChTxPrms_s::busQos

[IN] 3-bit qos value (0=highest, 7=lowest)

uint8_t EnetUdma_UdmaChTxPrms_s::chanType

[IN] Channel type. Refer #tisci_msg_rm_udmap_tx_ch_cfg_req::tx_chan_type

uint8_t EnetUdma_UdmaChTxPrms_s::dmaPriority

[IN] This field selects which scheduling bin the channel will be placed in for bandwidth allocation of the TX DMA units. Refer #tisci_msg_rm_udmap_tx_ch_cfg_req::tx_sched_priority

uint16_t EnetUdma_UdmaChTxPrms_s::fifoDepth

[IN] The fifo depth is used to specify how many FIFO data phases deep the TX per channel FIFO will be for the channel. While the maximum depth of the TX FIFO is set at design time, the FIFO depth can be artificially reduced in order to control the maximum latency which can be introduced due to buffering effects

uint8_t EnetUdma_UdmaChTxPrms_s::filterEinfo

[IN] Bool: When set (TRUE), filter out extended info

uint8_t EnetUdma_UdmaChTxPrms_s::filterPsWords

[IN] Bool: When set (TRUE), filter out protocl specific words

uint8_t EnetUdma_UdmaChTxPrms_s::txCredit

[IN] TX credit for external channels


The documentation for this struct was generated from the following file:

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