; Basic Setup RESet SYStem.RESet SYSTEM.JTAGCLOCK 8MHz ; J7ES Decoder ring: CORE: Name (#Clusters x #Cores) or (#slices x #subcores x #pru) ; A72: DRA829 (1x2) ; M3: DRA829-CM3 (1x1) ; R5: DRA829-CR5-MCU DRA829-CR5-MAIN0 DRA829-CR5-MAIN1 (3x2) ; C6: DRA829-C66X (2x1) ; ICSS0/PRU: DRA829-ICSS0 DRA829-ICSS0-RTU DRA829-ICSS0-TX (2x3x2) ; ICSS1/PRU: DRA829-ICSS1 DRA829-ICSS1-RTU DRA829-ICSS1-TX (2x3x2) System.CPU DRA829 ; Single Core: CPU0 core.assign 1. ; Single Core: CPU1 ; core.assign 2. ; Dual core: CPU0, CPU1 ; core.assign 1. 2. core.showactive system.option DUALPORT on ; Use ITM/ETM/ETB directly instead of analyzer trace.method.onchip break.select program onchip break.select read onchip break.select write onchip ; Show command output area AREA ; Show data log data.log ; Connect SYStem.Mode Attach Break ; Show listing with trace d.l /markPC ; Show registers with spotlighting register.view /sl ; To reset CPU.. ; GOSUB RESET_A72 0 GOSUB WINDOW_SETUP ENDDO WINDOW_SETUP: ( ; Redo the screen: B:: TOOLBAR ON STATUSBAR ON WinPAGE.RESet WinPAGE.Create P000 WinCLEAR WinPOS 100.83 0.0 74. 20. 0. 0. W000 ws.REGISTER.View /sl WinPOS 0.0 0.0 97. 18. 24. 1. W001 WinTABS 10. 10. 25. ws.LIST /markPC WinPOS 78.5 42.077 95. 11. 0. 1. W003 WinTABS 42. 6. 26. 0. ws.data.log WinPAN 0. -7. WinPOS 0.0 23.846 75. 29. 5. 0. W002 ws.Frame /Locals /Caller WinPOS 78.0 24.615 95. 13. 0. 0. W004 ws.area WinPAGE.select P000 RETURN ) RESET_A72: ( ENTRY &core ; Where do we want the CPUs to loop when reset? &loop_addr=AD:0x7017FFF0 ; reset all the registers to defaults core.select &core ; Disable MMU if already enabled print "A72_CPU&core Disabling MMU..." PER.Set.simple SPR:0x36100 %Long 0xC50838 ; Reset all registers for CPU print "A72_CPU&core Resetting registers.." register.reset ; Setup our parking space. register.set PC &loop_addr register.set CPSR 0x3CD RETURN )