/dts-v1/;

/ {
	model = "Texas Instruments J784S4 EVM";
	compatible = "ti,j784s4-evm\0ti,j784s4";
	interrupt-parent = <0x01>;
	#address-cells = <0x02>;
	#size-cells = <0x02>;

	cpus {
		#address-cells = <0x01>;
		#size-cells = <0x00>;

		cpu-map {

			cluster0 {
				phandle = <0x5c>;

				core0 {
					cpu = <0x02>;
				};

				core1 {
					cpu = <0x03>;
				};

				core2 {
					cpu = <0x04>;
				};

				core3 {
					cpu = <0x05>;
				};
			};

			cluster1 {
				phandle = <0x5d>;

				core0 {
					cpu = <0x06>;
				};

				core1 {
					cpu = <0x07>;
				};

				core2 {
					cpu = <0x08>;
				};

				core3 {
					cpu = <0x09>;
				};
			};
		};

		cpu@0 {
			compatible = "arm,cortex-a72";
			reg = <0x00>;
			device_type = "cpu";
			enable-method = "psci";
			i-cache-size = <0xc000>;
			i-cache-line-size = <0x40>;
			i-cache-sets = <0x100>;
			d-cache-size = <0x8000>;
			d-cache-line-size = <0x40>;
			d-cache-sets = <0x100>;
			next-level-cache = <0x0a>;
			phandle = <0x02>;
		};

		cpu@1 {
			compatible = "arm,cortex-a72";
			reg = <0x01>;
			device_type = "cpu";
			enable-method = "psci";
			i-cache-size = <0xc000>;
			i-cache-line-size = <0x40>;
			i-cache-sets = <0x100>;
			d-cache-size = <0x8000>;
			d-cache-line-size = <0x40>;
			d-cache-sets = <0x100>;
			next-level-cache = <0x0a>;
			phandle = <0x03>;
		};

		cpu@2 {
			compatible = "arm,cortex-a72";
			reg = <0x02>;
			device_type = "cpu";
			enable-method = "psci";
			i-cache-size = <0xc000>;
			i-cache-line-size = <0x40>;
			i-cache-sets = <0x100>;
			d-cache-size = <0x8000>;
			d-cache-line-size = <0x40>;
			d-cache-sets = <0x100>;
			next-level-cache = <0x0a>;
			phandle = <0x04>;
		};

		cpu@3 {
			compatible = "arm,cortex-a72";
			reg = <0x03>;
			device_type = "cpu";
			enable-method = "psci";
			i-cache-size = <0xc000>;
			i-cache-line-size = <0x40>;
			i-cache-sets = <0x100>;
			d-cache-size = <0x8000>;
			d-cache-line-size = <0x40>;
			d-cache-sets = <0x100>;
			next-level-cache = <0x0a>;
			phandle = <0x05>;
		};

		cpu@100 {
			compatible = "arm,cortex-a72";
			reg = <0x100>;
			device_type = "cpu";
			enable-method = "psci";
			i-cache-size = <0xc000>;
			i-cache-line-size = <0x40>;
			i-cache-sets = <0x100>;
			d-cache-size = <0x8000>;
			d-cache-line-size = <0x40>;
			d-cache-sets = <0x100>;
			next-level-cache = <0x0b>;
			phandle = <0x06>;
		};

		cpu@101 {
			compatible = "arm,cortex-a72";
			reg = <0x101>;
			device_type = "cpu";
			enable-method = "psci";
			i-cache-size = <0xc000>;
			i-cache-line-size = <0x40>;
			i-cache-sets = <0x100>;
			d-cache-size = <0x8000>;
			d-cache-line-size = <0x40>;
			d-cache-sets = <0x100>;
			next-level-cache = <0x0b>;
			phandle = <0x07>;
		};

		cpu@102 {
			compatible = "arm,cortex-a72";
			reg = <0x102>;
			device_type = "cpu";
			enable-method = "psci";
			i-cache-size = <0xc000>;
			i-cache-line-size = <0x40>;
			i-cache-sets = <0x100>;
			d-cache-size = <0x8000>;
			d-cache-line-size = <0x40>;
			d-cache-sets = <0x100>;
			next-level-cache = <0x0b>;
			phandle = <0x08>;
		};

		cpu@103 {
			compatible = "arm,cortex-a72";
			reg = <0x103>;
			device_type = "cpu";
			enable-method = "psci";
			i-cache-size = <0xc000>;
			i-cache-line-size = <0x40>;
			i-cache-sets = <0x100>;
			d-cache-size = <0x8000>;
			d-cache-line-size = <0x40>;
			d-cache-sets = <0x100>;
			next-level-cache = <0x0b>;
			phandle = <0x09>;
		};
	};

	l2-cache0 {
		compatible = "cache";
		cache-level = <0x02>;
		cache-unified;
		cache-size = <0x200000>;
		cache-line-size = <0x40>;
		cache-sets = <0x400>;
		next-level-cache = <0x0c>;
		phandle = <0x0a>;
	};

	l2-cache1 {
		compatible = "cache";
		cache-level = <0x02>;
		cache-unified;
		cache-size = <0x200000>;
		cache-line-size = <0x40>;
		cache-sets = <0x400>;
		next-level-cache = <0x0c>;
		phandle = <0x0b>;
	};

	l3-cache0 {
		compatible = "cache";
		cache-level = <0x03>;
		cache-unified;
		phandle = <0x0c>;
	};

	firmware {

		optee {
			compatible = "linaro,optee-tz";
			method = "smc";
		};

		psci {
			compatible = "arm,psci-1.0";
			method = "smc";
			phandle = <0x5e>;
		};
	};

	timer-cl0-cpu0 {
		compatible = "arm,armv8-timer";
		interrupts = <0x01 0x0d 0x08 0x01 0x0e 0x08 0x01 0x0b 0x08 0x01 0x0a 0x08>;
		phandle = <0x5f>;
	};

	pmu {
		compatible = "arm,cortex-a72-pmu";
		interrupts = <0x01 0x07 0x04>;
		phandle = <0x60>;
	};

	bus@100000 {
		compatible = "simple-bus";
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		ranges = <0x00 0x100000 0x00 0x100000 0x00 0x20000 0x00 0x600000 0x00 0x600000 0x00 0x31100 0x00 0xa40000 0x00 0xa40000 0x00 0x800 0x00 0x1000000 0x00 0x1000000 0x00 0xd000000 0x00 0xd000000 0x00 0xd000000 0x00 0x1000000 0x00 0xe800000 0x00 0xe800000 0x00 0x1000000 0x00 0x10000000 0x00 0x10000000 0x00 0x8000000 0x00 0x18000000 0x00 0x18000000 0x00 0x8000000 0x44 0x00 0x44 0x00 0x00 0x8000000 0x44 0x10000000 0x44 0x10000000 0x00 0x8000000 0x00 0x64800000 0x00 0x64800000 0x00 0x70c000 0x00 0x65800000 0x00 0x65800000 0x00 0x70c000 0x00 0x66800000 0x00 0x66800000 0x00 0x70c000 0x00 0x67800000 0x00 0x67800000 0x00 0x70c000 0x00 0x6f000000 0x00 0x6f000000 0x00 0x310000 0x00 0x70000000 0x00 0x70000000 0x00 0x400000 0x00 0x30000000 0x00 0x30000000 0x00 0xc400000 0x41 0x00 0x41 0x00 0x01 0x00 0x43 0x00 0x43 0x00 0x01 0x00 0x4e 0x20000000 0x4e 0x20000000 0x00 0x80000 0x00 0x28380000 0x00 0x28380000 0x00 0x3880000 0x00 0x40200000 0x00 0x40200000 0x00 0x998400 0x00 0x40f00000 0x00 0x40f00000 0x00 0x20000 0x00 0x41000000 0x00 0x41000000 0x00 0x20000 0x00 0x41400000 0x00 0x41400000 0x00 0x20000 0x00 0x41c00000 0x00 0x41c00000 0x00 0x100000 0x00 0x42040000 0x00 0x42040000 0x00 0x3ac2400 0x00 0x45100000 0x00 0x45100000 0x00 0xc24000 0x00 0x46000000 0x00 0x46000000 0x00 0x200000 0x00 0x47000000 0x00 0x47000000 0x00 0x68400 0x00 0x50000000 0x00 0x50000000 0x00 0x10000000 0x05 0x00 0x05 0x00 0x01 0x00 0x07 0x00 0x07 0x00 0x01 0x00>;
		phandle = <0x61>;

		bus@28380000 {
			compatible = "simple-bus";
			#address-cells = <0x02>;
			#size-cells = <0x02>;
			ranges = <0x00 0x28380000 0x00 0x28380000 0x00 0x3880000 0x00 0x40200000 0x00 0x40200000 0x00 0x998400 0x00 0x40f00000 0x00 0x40f00000 0x00 0x20000 0x00 0x41000000 0x00 0x41000000 0x00 0x20000 0x00 0x41400000 0x00 0x41400000 0x00 0x20000 0x00 0x41c00000 0x00 0x41c00000 0x00 0x100000 0x00 0x42040000 0x00 0x42040000 0x00 0x3ac2400 0x00 0x45100000 0x00 0x45100000 0x00 0xc24000 0x00 0x46000000 0x00 0x46000000 0x00 0x200000 0x00 0x47000000 0x00 0x47000000 0x00 0x68400 0x00 0x50000000 0x00 0x50000000 0x00 0x10000000 0x05 0x00 0x05 0x00 0x01 0x00 0x07 0x00 0x07 0x00 0x01 0x00>;
			phandle = <0x62>;

			system-controller@44083000 {
				compatible = "ti,k2g-sci";
				ti,host-id = <0x0c>;
				mbox-names = "rx\0tx";
				mboxes = <0x0d 0x0b 0x0d 0x0d>;
				reg-names = "debug_messages";
				reg = <0x00 0x44083000 0x00 0x1000>;
				phandle = <0x0e>;

				power-controller {
					compatible = "ti,sci-pm-domain";
					#power-domain-cells = <0x02>;
					phandle = <0x10>;
				};

				clock-controller {
					compatible = "ti,k2g-sci-clk";
					#clock-cells = <0x02>;
					phandle = <0x0f>;
				};

				reset-controller {
					compatible = "ti,sci-reset";
					#reset-cells = <0x02>;
					phandle = <0x32>;
				};
			};

			chipid@43000014 {
				compatible = "ti,am654-chipid";
				reg = <0x00 0x43000014 0x00 0x04>;
			};

			sram@41c00000 {
				compatible = "mmio-sram";
				reg = <0x00 0x41c00000 0x00 0x100000>;
				ranges = <0x00 0x00 0x41c00000 0x100000>;
				#address-cells = <0x01>;
				#size-cells = <0x01>;
				phandle = <0x63>;
			};

			pinctrl@4301c000 {
				compatible = "pinctrl-single";
				reg = <0x00 0x4301c000 0x00 0x34>;
				#pinctrl-cells = <0x01>;
				pinctrl-single,register-width = <0x20>;
				pinctrl-single,function-mask = <0xffffffff>;
				phandle = <0x64>;
			};

			pinctrl@4301c038 {
				compatible = "pinctrl-single";
				reg = <0x00 0x4301c038 0x00 0x2c>;
				#pinctrl-cells = <0x01>;
				pinctrl-single,register-width = <0x20>;
				pinctrl-single,function-mask = <0xffffffff>;
				phandle = <0x65>;

				mcu-fss0-ospi1-pins-default {
					pinctrl-single,pins = <0x08 0x10000 0x24 0x10000 0x14 0x50000 0x18 0x50000 0x1c 0x50000 0x20 0x50000 0x10 0x50000 0x0c 0x50000>;
					phandle = <0x15>;
				};
			};

			pinctrl@4301c068 {
				compatible = "pinctrl-single";
				reg = <0x00 0x4301c068 0x00 0x120>;
				#pinctrl-cells = <0x01>;
				pinctrl-single,register-width = <0x20>;
				pinctrl-single,function-mask = <0xffffffff>;
				status = "okay";
				phandle = <0x66>;

				wkup_i2c0_pins_default {
					pinctrl-single,pins = <0x98 0x50000 0x9c 0x50000>;
					phandle = <0x67>;
				};

				wkup-uart0-pins-default {
					pinctrl-single,pins = <0x70 0x50000 0x74 0x10000 0x48 0x50000 0x4c 0x10000>;
					phandle = <0x11>;
				};

				mcu-adc0-pins-default {
					pinctrl-single,pins = <0xcc 0x50000 0xd0 0x50000 0xd4 0x50000 0xd8 0x50000 0xdc 0x50000 0xe0 0x50000 0xe4 0x50000 0xe8 0x50000>;
					phandle = <0x68>;
				};

				mcu-adc1-pins-default {
					pinctrl-single,pins = <0xec 0x50000 0xf0 0x50000 0xf4 0x50000 0xf8 0x50000 0xfc 0x50000 0x100 0x50000 0x104 0x50000 0x108 0x50000>;
					phandle = <0x69>;
				};

				soc-fpga0-jtag-pins-default {
					pinctrl-single,pins = <0xcc 0x10007 0xd0 0x10007 0xd4 0x10007 0xd8 0x50007 0xe0 0x50007>;
					phandle = <0x6a>;
				};

				soc-pre1-jtag-pins-default {
					pinctrl-single,pins = <0x94 0x10007 0x90 0x10007 0x8c 0x10007 0x88 0x50007 0x6c 0x10007>;
					phandle = <0x6b>;
				};

				soc-pre2-jtag-pins-default {
					pinctrl-single,pins = <0x7c 0x10007 0x78 0x10007 0x74 0x10007 0x70 0x50007 0x68 0x10007>;
					phandle = <0x6c>;
				};

				soc-clk-reset-pins-default {
					pinctrl-single,pins = <0x190 0x50007>;
					phandle = <0x6d>;
				};

				mcu-i2c0-pins-default {
					pinctrl-single,pins = <0x108 0x50000 0x10c 0x50000>;
					phandle = <0x6e>;
				};
			};

			pinctrl@4301c190 {
				compatible = "pinctrl-single";
				reg = <0x00 0x4301c190 0x00 0x04>;
				#pinctrl-cells = <0x01>;
				pinctrl-single,register-width = <0x20>;
				pinctrl-single,function-mask = <0xffffffff>;
				phandle = <0x6f>;
			};

			interrupt-controller@42200000 {
				compatible = "ti,sci-intr";
				reg = <0x00 0x42200000 0x00 0x400>;
				ti,intr-trigger-type = <0x01>;
				interrupt-controller;
				interrupt-parent = <0x01>;
				#interrupt-cells = <0x01>;
				ti,sci = <0x0e>;
				ti,sci-dev-id = <0xb1>;
				ti,interrupt-ranges = <0x10 0x3c0 0x10>;
				status = "okay";
				phandle = <0x12>;
			};

			syscon@40f00000 {
				compatible = "ti,j721e-system-controller\0syscon\0simple-mfd";
				reg = <0x00 0x40f00000 0x00 0x20000>;
				#address-cells = <0x01>;
				#size-cells = <0x01>;
				ranges = <0x00 0x00 0x40f00000 0x20000>;
				phandle = <0x70>;

				phy@4040 {
					compatible = "ti,am654-phy-gmii-sel";
					reg = <0x4040 0x04>;
					#phy-cells = <0x01>;
					phandle = <0x71>;
				};
			};

			serial@42300000 {
				compatible = "ti,j721e-uart\0ti,am654-uart";
				reg = <0x00 0x42300000 0x00 0x200>;
				interrupts = <0x00 0x381 0x04>;
				current-speed = <0x1c200>;
				clocks = <0x0f 0x18d 0x00>;
				clock-names = "fclk";
				power-domains = <0x10 0x18d 0x01>;
				status = "reserved";
				pinctrl-names = "default";
				pinctrl-0 = <0x11>;
				phandle = <0x72>;
			};

			serial@40a00000 {
				compatible = "ti,j721e-uart\0ti,am654-uart";
				reg = <0x00 0x40a00000 0x00 0x200>;
				interrupts = <0x00 0x34e 0x04>;
				current-speed = <0x1c200>;
				clocks = <0x0f 0x95 0x00>;
				clock-names = "fclk";
				power-domains = <0x10 0x95 0x01>;
				status = "disabled";
				phandle = <0x73>;
			};

			gpio@42110000 {
				compatible = "ti,j721e-gpio\0ti,keystone-gpio";
				reg = <0x00 0x42110000 0x00 0x100>;
				gpio-controller;
				#gpio-cells = <0x02>;
				interrupt-parent = <0x12>;
				interrupts = <0x67 0x68 0x69 0x6a 0x6b 0x6c>;
				interrupt-controller;
				#interrupt-cells = <0x02>;
				ti,ngpio = <0x59>;
				ti,davinci-gpio-unbanked = <0x00>;
				power-domains = <0x10 0xa7 0x01>;
				clocks = <0x0f 0xa7 0x00>;
				clock-names = "gpio";
				status = "okay";
				gpio-line-names = "\0\0\0soc_fpga_tck\0soc_fpga_tms\0soc_fpga_tdi\0soc_fpga_tdo\0\0fpga_done\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0SOC_FPGA_CLK_RST";
				phandle = <0x1e>;
			};

			gpio@42100000 {
				compatible = "ti,j721e-gpio\0ti,keystone-gpio";
				reg = <0x00 0x42100000 0x00 0x100>;
				gpio-controller;
				#gpio-cells = <0x02>;
				interrupt-parent = <0x12>;
				interrupts = <0x70 0x71 0x72 0x73 0x74 0x75>;
				interrupt-controller;
				#interrupt-cells = <0x02>;
				ti,ngpio = <0x59>;
				ti,davinci-gpio-unbanked = <0x00>;
				power-domains = <0x10 0xa8 0x01>;
				clocks = <0x0f 0xa8 0x00>;
				clock-names = "gpio";
				status = "disabled";
				phandle = <0x74>;
			};

			i2c@42120000 {
				compatible = "ti,j721e-i2c\0ti,omap4-i2c";
				reg = <0x00 0x42120000 0x00 0x100>;
				interrupts = <0x00 0x380 0x04>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				clocks = <0x0f 0x117 0x02>;
				clock-names = "fck";
				power-domains = <0x10 0x117 0x01>;
				status = "disabled";
				phandle = <0x75>;
			};

			i2c@40b00000 {
				compatible = "ti,j721e-i2c\0ti,omap4-i2c";
				reg = <0x00 0x40b00000 0x00 0x100>;
				interrupts = <0x00 0x354 0x04>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				clocks = <0x0f 0x115 0x02>;
				clock-names = "fck";
				power-domains = <0x10 0x115 0x01>;
				status = "disabled";
				phandle = <0x76>;
			};

			i2c@40b10000 {
				compatible = "ti,j721e-i2c\0ti,omap4-i2c";
				reg = <0x00 0x40b10000 0x00 0x100>;
				interrupts = <0x00 0x355 0x04>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				clocks = <0x0f 0x116 0x02>;
				clock-names = "fck";
				power-domains = <0x10 0x116 0x01>;
				status = "disabled";
				phandle = <0x77>;
			};

			spi@40300000 {
				compatible = "ti,am654-mcspi\0ti,omap4-mcspi";
				reg = <0x00 0x40300000 0x00 0x400>;
				interrupts = <0x00 0x350 0x04>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				power-domains = <0x10 0x180 0x01>;
				clocks = <0x0f 0x180 0x00>;
				status = "disabled";
				phandle = <0x78>;
			};

			spi@40310000 {
				compatible = "ti,am654-mcspi\0ti,omap4-mcspi";
				reg = <0x00 0x40310000 0x00 0x400>;
				interrupts = <0x00 0x351 0x04>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				power-domains = <0x10 0x181 0x01>;
				clocks = <0x0f 0x181 0x00>;
				status = "disabled";
				phandle = <0x79>;
			};

			spi@40320000 {
				compatible = "ti,am654-mcspi\0ti,omap4-mcspi";
				reg = <0x00 0x40320000 0x00 0x400>;
				interrupts = <0x00 0x352 0x04>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				power-domains = <0x10 0x182 0x01>;
				clocks = <0x0f 0x182 0x00>;
				status = "disabled";
				phandle = <0x7a>;
			};

			bus@28380000 {
				compatible = "simple-bus";
				#address-cells = <0x02>;
				#size-cells = <0x02>;
				ranges = <0x00 0x28380000 0x00 0x28380000 0x00 0x3880000>;
				ti,sci-dev-id = <0x143>;
				dma-coherent;
				dma-ranges;
				phandle = <0x7b>;

				ringacc@2b800000 {
					compatible = "ti,am654-navss-ringacc";
					reg = <0x00 0x2b800000 0x00 0x400000 0x00 0x2b000000 0x00 0x400000 0x00 0x28590000 0x00 0x100 0x00 0x2a500000 0x00 0x40000>;
					reg-names = "rt\0fifos\0proxy_gcfg\0proxy_target";
					ti,num-rings = <0x11e>;
					ti,sci-rm-range-gp-rings = <0x01>;
					ti,sci = <0x0e>;
					ti,sci-dev-id = <0x148>;
					msi-parent = <0x13>;
					phandle = <0x14>;
				};

				dma-controller@285c0000 {
					compatible = "ti,j721e-navss-mcu-udmap";
					reg = <0x00 0x285c0000 0x00 0x100 0x00 0x2a800000 0x00 0x40000 0x00 0x2aa00000 0x00 0x40000>;
					reg-names = "gcfg\0rchanrt\0tchanrt";
					msi-parent = <0x13>;
					#dma-cells = <0x01>;
					ti,sci = <0x0e>;
					ti,sci-dev-id = <0x149>;
					ti,ringacc = <0x14>;
					ti,sci-rm-range-tchan = <0x0d 0x0f>;
					ti,sci-rm-range-rchan = <0x0a 0x0b>;
					ti,sci-rm-range-rflow = <0x00>;
					phandle = <0x7c>;
				};
			};

			bus@47000000 {
				compatible = "simple-bus";
				reg = <0x00 0x47000000 0x00 0x100>;
				#address-cells = <0x02>;
				#size-cells = <0x02>;
				ranges;
				status = "okay";
				phandle = <0x7d>;

				spi@47050000 {
					compatible = "ti,am654-ospi\0cdns,qspi-nor";
					reg = <0x00 0x47050000 0x00 0x100 0x07 0x00 0x01 0x00>;
					interrupts = <0x00 0x349 0x04>;
					cdns,fifo-depth = <0x100>;
					cdns,fifo-width = <0x04>;
					cdns,trigger-address = <0x00>;
					clocks = <0x0f 0xa2 0x07>;
					power-domains = <0x10 0xa2 0x01>;
					#address-cells = <0x01>;
					#size-cells = <0x00>;
					status = "okay";
					pinctrl-names = "default";
					pinctrl-0 = <0x15>;
					phandle = <0x7e>;

					flash@0 {
						compatible = "jedec,spi-nor";
						reg = <0x00>;
						spi-tx-bus-width = <0x01>;
						spi-rx-bus-width = <0x04>;
						spi-max-frequency = <0x2625a00>;
						cdns,tshsl-ns = <0x3c>;
						cdns,tsd2d-ns = <0x3c>;
						cdns,tchsh-ns = <0x3c>;
						cdns,tslch-ns = <0x3c>;
						cdns,read-delay = <0x02>;

						partitions {
							compatible = "fixed-partitions";
							#address-cells = <0x01>;
							#size-cells = <0x01>;

							partition@0 {
								label = "qspi.tiboot3";
								reg = <0x00 0x80000>;
							};

							partition@80000 {
								label = "qspi.tispl";
								reg = <0x80000 0x200000>;
							};

							partition@280000 {
								label = "qspi.u-boot";
								reg = <0x280000 0x400000>;
							};

							partition@680000 {
								label = "qspi.env";
								reg = <0x680000 0x40000>;
							};

							partition@6c0000 {
								label = "qspi.env.backup";
								reg = <0x6c0000 0x40000>;
							};

							partition@800000 {
								label = "qspi.rootfs";
								reg = <0x800000 0x37c0000>;
							};

							partition@3fc0000 {
								label = "qspi.phypattern";
								reg = <0x3fc0000 0x40000>;
							};
						};
					};
				};
			};

			temperature-sensor@42040000 {
				compatible = "ti,j7200-vtm";
				reg = <0x00 0x42040000 0x00 0x350 0x00 0x42050000 0x00 0x350 0x00 0x43000300 0x00 0x10>;
				power-domains = <0x10 0x9a 0x00>;
				#thermal-sensor-cells = <0x01>;
				phandle = <0x56>;
			};

			esm@40800000 {
				compatible = "ti,j721e-esm";
				reg = <0x00 0x40800000 0x00 0x1000>;
				ti,esm-pins = <0x5f>;
				bootph-pre-ram;
				phandle = <0x7f>;
			};

			esm@42080000 {
				compatible = "ti,j721e-esm";
				reg = <0x00 0x42080000 0x00 0x1000>;
				ti,esm-pins = <0x3f>;
				bootph-pre-ram;
				phandle = <0x80>;
			};

			watchdog@40600000 {
				compatible = "ti,j7-rti-wdt";
				reg = <0x00 0x40600000 0x00 0x100>;
				clocks = <0x0f 0x16f 0x01>;
				power-domains = <0x10 0x16f 0x01>;
				assigned-clocks = <0x0f 0x16f 0x00>;
				assigned-clock-parents = <0x0f 0x16f 0x04>;
				status = "reserved";
				phandle = <0x81>;
			};

			watchdog@40610000 {
				compatible = "ti,j7-rti-wdt";
				reg = <0x00 0x40610000 0x00 0x100>;
				clocks = <0x0f 0x170 0x01>;
				power-domains = <0x10 0x170 0x01>;
				assigned-clocks = <0x0f 0x170 0x00>;
				assigned-clock-parents = <0x0f 0x170 0x04>;
				status = "reserved";
				phandle = <0x82>;
			};
		};

		sram@70000000 {
			compatible = "mmio-sram";
			reg = <0x00 0x70000000 0x00 0x800000>;
			#address-cells = <0x01>;
			#size-cells = <0x01>;
			ranges = <0x00 0x00 0x70000000 0x800000>;
			phandle = <0x83>;

			atf-sram@0 {
				reg = <0x00 0x20000>;
			};

			tifs-sram@1f0000 {
				reg = <0x1f0000 0x10000>;
			};

			l3cache-sram@200000 {
				reg = <0x200000 0x200000>;
			};
		};

		syscon@100000 {
			compatible = "ti,j721e-system-controller\0syscon\0simple-mfd";
			reg = <0x00 0x100000 0x00 0x1c000>;
			#address-cells = <0x01>;
			#size-cells = <0x01>;
			ranges = <0x00 0x00 0x100000 0x1c000>;
			phandle = <0x2a>;

			phy@4044 {
				compatible = "ti,j784s4-cpsw9g-phy-gmii-sel";
				ti,qsgmii-main-ports = <0x07 0x07>;
				reg = <0x4044 0x20>;
				#phy-cells = <0x01>;
				phandle = <0x84>;
			};

			mux-controller@4080 {
				compatible = "mmio-mux";
				reg = <0x4080 0x30>;
				#mux-control-cells = <0x01>;
				mux-reg-masks = <0x4080 0x03 0x4084 0x03 0x4088 0x03 0x408c 0x03 0x4090 0x03 0x4094 0x03 0x4098 0x03 0x409c 0x03 0x40a0 0x03 0x40a4 0x03 0x40a8 0x03 0x40ac 0x03>;
				idle-states = <0x00 0x00 0x02 0x02 0x01 0x01 0x01 0x01 0x00 0x00 0x02 0x02>;
				phandle = <0x85>;
			};

			mux-controller@4000 {
				compatible = "mmio-mux";
				reg = <0x4000 0x04>;
				#mux-control-cells = <0x01>;
				mux-reg-masks = <0x4000 0x8000000>;
				idle-states = <0x00>;
				phandle = <0x86>;
			};

			clock-controller@4140 {
				compatible = "ti,am654-ehrpwm-tbclk\0syscon";
				reg = <0x4140 0x18>;
				#clock-cells = <0x01>;
				phandle = <0x16>;
			};
		};

		pwm@3000000 {
			compatible = "ti,am654-ehrpwm\0ti,am3352-ehrpwm";
			#pwm-cells = <0x03>;
			reg = <0x00 0x3000000 0x00 0x100>;
			power-domains = <0x10 0xdb 0x01>;
			clocks = <0x16 0x00 0x0f 0xdb 0x00>;
			clock-names = "tbclk\0fck";
			status = "disabled";
			phandle = <0x87>;
		};

		pwm@3010000 {
			compatible = "ti,am654-ehrpwm\0ti,am3352-ehrpwm";
			#pwm-cells = <0x03>;
			reg = <0x00 0x3010000 0x00 0x100>;
			power-domains = <0x10 0xdc 0x01>;
			clocks = <0x16 0x01 0x0f 0xdc 0x00>;
			clock-names = "tbclk\0fck";
			status = "disabled";
			phandle = <0x88>;
		};

		pwm@3020000 {
			compatible = "ti,am654-ehrpwm\0ti,am3352-ehrpwm";
			#pwm-cells = <0x03>;
			reg = <0x00 0x3020000 0x00 0x100>;
			power-domains = <0x10 0xdd 0x01>;
			clocks = <0x16 0x02 0x0f 0xdd 0x00>;
			clock-names = "tbclk\0fck";
			status = "disabled";
			phandle = <0x89>;
		};

		pwm@3030000 {
			compatible = "ti,am654-ehrpwm\0ti,am3352-ehrpwm";
			#pwm-cells = <0x03>;
			reg = <0x00 0x3030000 0x00 0x100>;
			power-domains = <0x10 0xde 0x01>;
			clocks = <0x16 0x03 0x0f 0xde 0x00>;
			clock-names = "tbclk\0fck";
			status = "disabled";
			phandle = <0x8a>;
		};

		pwm@3040000 {
			compatible = "ti,am654-ehrpwm\0ti,am3352-ehrpwm";
			#pwm-cells = <0x03>;
			reg = <0x00 0x3040000 0x00 0x100>;
			power-domains = <0x10 0xdf 0x01>;
			clocks = <0x16 0x04 0x0f 0xdf 0x00>;
			clock-names = "tbclk\0fck";
			status = "disabled";
			phandle = <0x8b>;
		};

		pwm@3050000 {
			compatible = "ti,am654-ehrpwm\0ti,am3352-ehrpwm";
			#pwm-cells = <0x03>;
			reg = <0x00 0x3050000 0x00 0x100>;
			power-domains = <0x10 0xe0 0x01>;
			clocks = <0x16 0x05 0x0f 0xe0 0x00>;
			clock-names = "tbclk\0fck";
			status = "disabled";
			phandle = <0x8c>;
		};

		interrupt-controller@1800000 {
			compatible = "arm,gic-v3";
			#address-cells = <0x02>;
			#size-cells = <0x02>;
			ranges;
			#interrupt-cells = <0x03>;
			interrupt-controller;
			reg = <0x00 0x1800000 0x00 0x200000 0x00 0x1900000 0x00 0x100000 0x00 0x6f000000 0x00 0x2000 0x00 0x6f010000 0x00 0x1000 0x00 0x6f020000 0x00 0x2000>;
			interrupts = <0x01 0x09 0x04>;
			phandle = <0x01>;

			msi-controller@1820000 {
				compatible = "arm,gic-v3-its";
				reg = <0x00 0x1820000 0x00 0x10000>;
				socionext,synquacer-pre-its = <0x1000000 0x400000>;
				msi-controller;
				#msi-cells = <0x01>;
				phandle = <0x2b>;
			};
		};

		interrupt-controller@a00000 {
			compatible = "ti,sci-intr";
			reg = <0x00 0xa00000 0x00 0x800>;
			ti,intr-trigger-type = <0x01>;
			interrupt-controller;
			interrupt-parent = <0x01>;
			#interrupt-cells = <0x01>;
			ti,sci = <0x0e>;
			ti,sci-dev-id = <0x0a>;
			ti,interrupt-ranges = <0x08 0x188 0x38>;
			phandle = <0x19>;
		};

		pinctrl@11c000 {
			compatible = "pinctrl-single";
			reg = <0x00 0x11c000 0x00 0x120>;
			#pinctrl-cells = <0x01>;
			pinctrl-single,register-width = <0x20>;
			pinctrl-single,function-mask = <0xffffffff>;
			phandle = <0x8d>;

			main-uart3-pins-default {
				pinctrl-single,pins = <0xc8 0x1000e 0xc4 0x5000e>;
				phandle = <0x18>;
			};

			main-i2c0-pins-default {
				pinctrl-single,pins = <0xe0 0x60000 0xe4 0x60000>;
				phandle = <0x1c>;
			};

			main-i2c1-pins-default {
				pinctrl-single,pins = <0x24 0x6000c 0x20 0x6000c>;
				phandle = <0x1f>;
			};

			main-i2c2-pins-default {
				pinctrl-single,pins = <0x50 0x6000d 0x4c 0x6000d>;
				phandle = <0x20>;
			};

			main-mmc1-pins-default {
				pinctrl-single,pins = <0x104 0x50000 0x108 0x50000 0x100 0x50000 0xfc 0x50000 0xf8 0x50000 0xf4 0x50000 0xf0 0x50000>;
				phandle = <0x21>;
			};

			main-usbss0-pins-default {
				pinctrl-single,pins = <0x8c 0x1000e>;
				phandle = <0x1a>;
			};

			main-sfp0-pins-default {
				pinctrl-single,pins = <0x40 0x50007 0x44 0x10007 0x48 0x50007 0x54 0x50007>;
				phandle = <0x59>;
			};

			main-sfp1-pins-default {
				pinctrl-single,pins = <0x08 0x50007 0x0c 0x10007 0x10 0x50007 0x14 0x50007>;
				phandle = <0x5b>;
			};

			rtc-int-pins-default {
				pinctrl-single,pins = <0x78 0x50007>;
				phandle = <0x8e>;
			};

			ec-soc-int-pins-default {
				pinctrl-single,pins = <0x7c 0x50007>;
				phandle = <0x8f>;
			};

			main-spi0-pins-default {
				pinctrl-single,pins = <0xd4 0x60000 0xcc 0x60000 0xd8 0x60000 0xdc 0x60000>;
				phandle = <0x2f>;
			};

			main-spi2-pins-default {
				pinctrl-single,pins = <0xa0 0x6000a 0xa4 0x6000a 0x9c 0x6000a 0xa8 0x6000a 0xac 0x6000a>;
				phandle = <0x30>;
			};

			pcie0-perst {
				pinctrl-single,pins = <0xd0 0x10007>;
				phandle = <0x90>;
			};
		};

		crypto@4e00000 {
			compatible = "ti,j721e-sa2ul";
			reg = <0x00 0x4e00000 0x00 0x1200>;
			power-domains = <0x10 0x171 0x01>;
			#address-cells = <0x02>;
			#size-cells = <0x02>;
			ranges = <0x00 0x4e00000 0x00 0x4e00000 0x00 0x30000>;
			dmas = <0x17 0xca40 0x17 0x4a40 0x17 0x4a41>;
			dma-names = "tx\0rx1\0rx2";
			phandle = <0x91>;

			rng@4e10000 {
				compatible = "inside-secure,safexcel-eip76";
				reg = <0x00 0x4e10000 0x00 0x7d>;
				interrupts = <0x00 0x0b 0x04>;
				phandle = <0x92>;
			};
		};

		serial@2800000 {
			compatible = "ti,j721e-uart\0ti,am654-uart";
			reg = <0x00 0x2800000 0x00 0x200>;
			interrupts = <0x00 0xc0 0x04>;
			current-speed = <0x1c200>;
			clocks = <0x0f 0x92 0x00>;
			clock-names = "fclk";
			power-domains = <0x10 0x92 0x01>;
			status = "disabled";
			phandle = <0x93>;
		};

		serial@2830000 {
			compatible = "ti,j721e-uart\0ti,am654-uart";
			reg = <0x00 0x2830000 0x00 0x200>;
			interrupts = <0x00 0xc3 0x04>;
			current-speed = <0x1c200>;
			clocks = <0x0f 0x186 0x00>;
			clock-names = "fclk";
			power-domains = <0x10 0x186 0x01>;
			status = "okay";
			pinctrl-names = "default";
			pinctrl-0 = <0x18>;
			phandle = <0x94>;
		};

		gpu@4e20000000 {
			compatible = "ti,j721s2-pvr\0img,pvr-bxs64";
			reg = <0x4e 0x20000000 0x00 0x80000>;
			interrupts = <0x00 0x18 0x04>;
			power-domains = <0x10 0xb6 0x01>;
			clocks = <0x0f 0xb5 0x01>;
			phandle = <0x95>;
		};

		gpio@600000 {
			compatible = "ti,j721e-gpio\0ti,keystone-gpio";
			reg = <0x00 0x600000 0x00 0x100>;
			gpio-controller;
			#gpio-cells = <0x02>;
			interrupt-parent = <0x19>;
			interrupts = <0x91 0x92 0x93 0x94 0x95>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			ti,ngpio = <0x42>;
			ti,davinci-gpio-unbanked = <0x00>;
			power-domains = <0x10 0xa3 0x01>;
			clocks = <0x0f 0xa3 0x00>;
			clock-names = "gpio";
			status = "okay";
			phandle = <0x22>;
		};

		gpio@610000 {
			compatible = "ti,j721e-gpio\0ti,keystone-gpio";
			reg = <0x00 0x610000 0x00 0x100>;
			gpio-controller;
			#gpio-cells = <0x02>;
			interrupt-parent = <0x19>;
			interrupts = <0x9a 0x9b 0x9c 0x9d 0x9e>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			ti,ngpio = <0x42>;
			ti,davinci-gpio-unbanked = <0x00>;
			power-domains = <0x10 0xa4 0x01>;
			clocks = <0x0f 0xa4 0x00>;
			clock-names = "gpio";
			status = "disabled";
			phandle = <0x96>;
		};

		gpio@620000 {
			compatible = "ti,j721e-gpio\0ti,keystone-gpio";
			reg = <0x00 0x620000 0x00 0x100>;
			gpio-controller;
			#gpio-cells = <0x02>;
			interrupt-parent = <0x19>;
			interrupts = <0xa3 0xa4 0xa5 0xa6 0xa7>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			ti,ngpio = <0x42>;
			ti,davinci-gpio-unbanked = <0x00>;
			power-domains = <0x10 0xa5 0x01>;
			clocks = <0x0f 0xa5 0x00>;
			clock-names = "gpio";
			status = "disabled";
			phandle = <0x97>;
		};

		gpio@630000 {
			compatible = "ti,j721e-gpio\0ti,keystone-gpio";
			reg = <0x00 0x630000 0x00 0x100>;
			gpio-controller;
			#gpio-cells = <0x02>;
			interrupt-parent = <0x19>;
			interrupts = <0xac 0xad 0xae 0xaf 0xb0>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			ti,ngpio = <0x42>;
			ti,davinci-gpio-unbanked = <0x00>;
			power-domains = <0x10 0xa6 0x01>;
			clocks = <0x0f 0xa6 0x00>;
			clock-names = "gpio";
			status = "disabled";
			phandle = <0x98>;
		};

		cdns-usb@4104000 {
			compatible = "ti,j721e-usb";
			reg = <0x00 0x4104000 0x00 0x100>;
			dma-coherent;
			power-domains = <0x10 0x18e 0x01>;
			clocks = <0x0f 0x18e 0x15 0x0f 0x18e 0x02>;
			clock-names = "ref\0lpm";
			assigned-clocks = <0x0f 0x18e 0x15>;
			assigned-clock-parents = <0x0f 0x18e 0x16>;
			#address-cells = <0x02>;
			#size-cells = <0x02>;
			ranges;
			status = "okay";
			pinctrl-0 = <0x1a>;
			pinctrl-names = "default";
			ti,vbus-divider;
			phandle = <0x99>;

			usb@6000000 {
				compatible = "cdns,usb3";
				reg = <0x00 0x6000000 0x00 0x10000 0x00 0x6010000 0x00 0x10000 0x00 0x6020000 0x00 0x10000>;
				reg-names = "otg\0xhci\0dev";
				interrupts = <0x00 0x60 0x04 0x00 0x66 0x04 0x00 0x78 0x04>;
				interrupt-names = "host\0peripheral\0otg";
				dr_mode = "otg";
				maximum-speed = "super-speed";
				phys = <0x1b>;
				phy-names = "cdns3,usb3-phy";
				phandle = <0x9a>;
			};
		};

		i2c@2000000 {
			compatible = "ti,j721e-i2c\0ti,omap4-i2c";
			reg = <0x00 0x2000000 0x00 0x100>;
			interrupts = <0x00 0xc8 0x04>;
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			clocks = <0x0f 0x10e 0x02>;
			clock-names = "fck";
			power-domains = <0x10 0x10e 0x01>;
			status = "okay";
			pinctrl-names = "default";
			pinctrl-0 = <0x1c>;
			clock-frequency = <0x186a0>;
			phandle = <0x9b>;

			ecs-250 {
				compatible = "fixed-clock";
				#clock-cells = <0x00>;
				clock-frequency = <0x17d7840>;
				clock-accuracy = <0xc350>;
				phandle = <0x1d>;
			};

			clock-generator@67 {
				compatible = "ti,cdce6214";
				reg = <0x67>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				#clock-cells = <0x01>;
				clocks = <0x1d>;
				clock-names = "secref";
				reset-gpios = <0x1e 0x31 0x01>;
				gpio-reset-padcfg = <0x4301c190>;

				clk@1 {
					reg = <0x01>;
					ti,clkin-fmt = "xtal";
					ti,xo-cload-femtofarads = <0x1130>;
					ti,xo-bias-current-microamp = <0x127>;
				};

				clk@3 {
					reg = <0x03>;
					ti,clkout-fmt = "cmos";
					ti,cmosp-mode = "high";
					ti,cmosn-mode = "low";
				};

				clk@4 {
					reg = <0x04>;
					ti,clkout-fmt = "lvds";
				};

				clk@6 {
					reg = <0x06>;
					ti,clkout-fmt = "lp-hcsl";
				};
			};
		};

		i2c@2010000 {
			compatible = "ti,j721e-i2c\0ti,omap4-i2c";
			reg = <0x00 0x2010000 0x00 0x100>;
			interrupts = <0x00 0xc9 0x04>;
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			clocks = <0x0f 0x10f 0x02>;
			clock-names = "fck";
			power-domains = <0x10 0x10f 0x01>;
			status = "okay";
			pinctrl-names = "default";
			pinctrl-0 = <0x1f>;
			clock-frequency = <0x186a0>;
			phandle = <0x5a>;
		};

		i2c@2020000 {
			compatible = "ti,j721e-i2c\0ti,omap4-i2c";
			reg = <0x00 0x2020000 0x00 0x100>;
			interrupts = <0x00 0xca 0x04>;
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			clocks = <0x0f 0x110 0x02>;
			clock-names = "fck";
			power-domains = <0x10 0x110 0x01>;
			status = "okay";
			pinctrl-names = "default";
			pinctrl-0 = <0x20>;
			clock-frequency = <0x186a0>;
			phandle = <0x58>;
		};

		i2c@2030000 {
			compatible = "ti,j721e-i2c\0ti,omap4-i2c";
			reg = <0x00 0x2030000 0x00 0x100>;
			interrupts = <0x00 0xcb 0x04>;
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			clocks = <0x0f 0x111 0x02>;
			clock-names = "fck";
			power-domains = <0x10 0x111 0x01>;
			status = "disabled";
			phandle = <0x9c>;
		};

		i2c@2040000 {
			compatible = "ti,j721e-i2c\0ti,omap4-i2c";
			reg = <0x00 0x2040000 0x00 0x100>;
			interrupts = <0x00 0xcc 0x04>;
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			clocks = <0x0f 0x112 0x02>;
			clock-names = "fck";
			power-domains = <0x10 0x112 0x01>;
			status = "disabled";
			phandle = <0x9d>;
		};

		i2c@2050000 {
			compatible = "ti,j721e-i2c\0ti,omap4-i2c";
			reg = <0x00 0x2050000 0x00 0x100>;
			interrupts = <0x00 0xcd 0x04>;
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			clocks = <0x0f 0x113 0x02>;
			clock-names = "fck";
			power-domains = <0x10 0x113 0x01>;
			status = "disabled";
			phandle = <0x9e>;
		};

		i2c@2060000 {
			compatible = "ti,j721e-i2c\0ti,omap4-i2c";
			reg = <0x00 0x2060000 0x00 0x100>;
			interrupts = <0x00 0xce 0x04>;
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			clocks = <0x0f 0x114 0x02>;
			clock-names = "fck";
			power-domains = <0x10 0x114 0x01>;
			status = "disabled";
			phandle = <0x9f>;
		};

		mmc@4fb0000 {
			compatible = "ti,j721e-sdhci-4bit";
			reg = <0x00 0x4fb0000 0x00 0x1000 0x00 0x4fb8000 0x00 0x400>;
			interrupts = <0x00 0x04 0x04>;
			power-domains = <0x10 0x8d 0x01>;
			clocks = <0x0f 0x8d 0x03 0x0f 0x8d 0x04>;
			clock-names = "clk_ahb\0clk_xin";
			assigned-clocks = <0x0f 0x8d 0x04>;
			assigned-clock-parents = <0x0f 0x8d 0x05>;
			bus-width = <0x04>;
			ti,otap-del-sel-legacy = <0x00>;
			ti,otap-del-sel-sd-hs = <0x00>;
			ti,otap-del-sel-sdr12 = <0x0f>;
			ti,otap-del-sel-sdr25 = <0x0f>;
			ti,otap-del-sel-sdr50 = <0x0c>;
			ti,otap-del-sel-sdr104 = <0x05>;
			ti,otap-del-sel-ddr50 = <0x0c>;
			ti,itap-del-sel-legacy = <0x00>;
			ti,itap-del-sel-sd-hs = <0x00>;
			ti,itap-del-sel-sdr12 = <0x00>;
			ti,itap-del-sel-sdr25 = <0x00>;
			ti,clkbuf-sel = <0x07>;
			ti,trm-icp = <0x08>;
			dma-coherent;
			status = "okay";
			pinctrl-0 = <0x21>;
			pinctrl-names = "default";
			cd-gpios = <0x22 0x0e 0x01>;
			disable-wp;
			phandle = <0xa0>;
		};

		wiz@5060000 {
			compatible = "ti,j784s4-wiz-10g";
			#address-cells = <0x01>;
			#size-cells = <0x01>;
			power-domains = <0x10 0x194 0x01>;
			clocks = <0x0f 0x194 0x02 0x0f 0x194 0x06 0x23 0x0f 0x194 0x05>;
			clock-names = "fck\0core_ref_clk\0ext_ref_clk\0core_ref1_clk";
			assigned-clocks = <0x0f 0x194 0x06>;
			assigned-clock-parents = <0x0f 0x194 0x0a>;
			num-lanes = <0x04>;
			#reset-cells = <0x01>;
			#clock-cells = <0x01>;
			ranges = <0x5060000 0x00 0x5060000 0x10000>;
			status = "okay";
			phandle = <0x24>;

			serdes@5060000 {
				compatible = "ti,j721e-serdes-10g";
				reg = <0x5060000 0x10000>;
				reg-names = "torrent_phy";
				resets = <0x24 0x00>;
				reset-names = "torrent_reset";
				clocks = <0x24 0x00 0x24 0x10>;
				clock-names = "refclk\0phy_en_refclk";
				assigned-clocks = <0x24 0x00 0x24 0x01 0x24 0x02>;
				assigned-clock-parents = <0x0f 0x194 0x06 0x0f 0x194 0x06 0x0f 0x194 0x06>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				#clock-cells = <0x01>;
				status = "okay";
				phandle = <0xa1>;

				phy@0 {
					reg = <0x00>;
					cdns,num-lanes = <0x02>;
					#phy-cells = <0x00>;
					cdns,phy-type = <0x02>;
					resets = <0x24 0x01 0x24 0x02>;
					phandle = <0xa2>;
				};

				phy@3 {
					reg = <0x03>;
					cdns,num-lanes = <0x01>;
					#phy-cells = <0x00>;
					cdns,phy-type = <0x04>;
					resets = <0x24 0x04>;
					phandle = <0x1b>;
				};
			};
		};

		wiz@5070000 {
			compatible = "ti,j784s4-wiz-10g";
			#address-cells = <0x01>;
			#size-cells = <0x01>;
			power-domains = <0x10 0x195 0x01>;
			clocks = <0x0f 0x195 0x02 0x0f 0x195 0x06 0x23 0x0f 0x195 0x05>;
			clock-names = "fck\0core_ref_clk\0ext_ref_clk\0core_ref1_clk";
			assigned-clocks = <0x0f 0x195 0x06>;
			assigned-clock-parents = <0x0f 0x195 0x0a>;
			num-lanes = <0x04>;
			#reset-cells = <0x01>;
			#clock-cells = <0x01>;
			ranges = <0x5070000 0x00 0x5070000 0x10000>;
			status = "okay";
			phandle = <0x25>;

			serdes@5070000 {
				compatible = "ti,j721e-serdes-10g";
				reg = <0x5070000 0x10000>;
				reg-names = "torrent_phy";
				resets = <0x25 0x00>;
				reset-names = "torrent_reset";
				clocks = <0x25 0x00 0x25 0x10>;
				clock-names = "refclk\0phy_en_refclk";
				assigned-clocks = <0x25 0x00 0x25 0x01 0x25 0x02>;
				assigned-clock-parents = <0x23 0x23 0x23>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				#clock-cells = <0x01>;
				status = "okay";
				phandle = <0xa3>;

				phy@0 {
					reg = <0x00>;
					cdns,num-lanes = <0x04>;
					#phy-cells = <0x00>;
					cdns,phy-type = <0x02>;
					resets = <0x25 0x01 0x25 0x02>;
					phandle = <0x2d>;
				};
			};
		};

		wiz@5020000 {
			compatible = "ti,j784s4-wiz-10g";
			#address-cells = <0x01>;
			#size-cells = <0x01>;
			power-domains = <0x10 0x196 0x01>;
			clocks = <0x0f 0x196 0x02 0x0f 0x196 0x06 0x23 0x0f 0x196 0x05>;
			clock-names = "fck\0core_ref_clk\0ext_ref_clk\0core_ref1_clk";
			assigned-clocks = <0x0f 0x196 0x06>;
			assigned-clock-parents = <0x0f 0x196 0x0a>;
			num-lanes = <0x04>;
			#reset-cells = <0x01>;
			#clock-cells = <0x01>;
			ranges = <0x5020000 0x00 0x5020000 0x10000>;
			status = "disabled";
			phandle = <0x26>;

			serdes@5020000 {
				compatible = "ti,j721e-serdes-10g";
				reg = <0x5020000 0x10000>;
				reg-names = "torrent_phy";
				resets = <0x26 0x00>;
				reset-names = "torrent_reset";
				clocks = <0x26 0x00 0x26 0x10>;
				clock-names = "refclk\0phy_en_refclk";
				assigned-clocks = <0x26 0x00 0x26 0x01 0x26 0x02>;
				assigned-clock-parents = <0x0f 0x196 0x06 0x0f 0x196 0x06 0x0f 0x196 0x06>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				#clock-cells = <0x01>;
				status = "disabled";
				phandle = <0xa4>;
			};
		};

		bus@30000000 {
			compatible = "simple-bus";
			#address-cells = <0x02>;
			#size-cells = <0x02>;
			ranges = <0x00 0x30000000 0x00 0x30000000 0x00 0xc400000>;
			ti,sci-dev-id = <0x118>;
			dma-coherent;
			dma-ranges;
			phandle = <0xa5>;

			navss-sram@30000000 {
				compatible = "mmio-sram";
				reg = <0x00 0x30000000 0x00 0x10000>;
				#address-cells = <0x01>;
				#size-cells = <0x01>;
				ranges = <0x00 0x00 0x30000000 0x10000>;
				phandle = <0xa6>;
			};

			interrupt-controller@310e0000 {
				compatible = "ti,sci-intr";
				reg = <0x00 0x310e0000 0x00 0x4000>;
				ti,intr-trigger-type = <0x04>;
				interrupt-controller;
				interrupt-parent = <0x01>;
				#interrupt-cells = <0x01>;
				ti,sci = <0x0e>;
				ti,sci-dev-id = <0x11b>;
				ti,interrupt-ranges = <0x00 0x40 0x40 0x40 0x1c0 0x40 0x80 0x2a0 0x40>;
				phandle = <0x27>;
			};

			msi-controller@33d00000 {
				compatible = "ti,sci-inta";
				reg = <0x00 0x33d00000 0x00 0x100000>;
				interrupt-controller;
				#interrupt-cells = <0x00>;
				interrupt-parent = <0x27>;
				msi-controller;
				ti,sci = <0x0e>;
				ti,sci-dev-id = <0x141>;
				ti,interrupt-ranges = <0x00 0x00 0x100>;
				ti,unmapped-event-sources = <0x28>;
				phandle = <0x13>;
			};

			mailbox@32c00000 {
				compatible = "ti,am654-secure-proxy";
				#mbox-cells = <0x01>;
				reg-names = "target_data\0rt\0scfg";
				reg = <0x00 0x32c00000 0x00 0x100000 0x00 0x32400000 0x00 0x100000 0x00 0x32800000 0x00 0x100000>;
				interrupt-names = "rx_011";
				interrupts = <0x00 0x25 0x04>;
				phandle = <0x0d>;
			};

			hwlock@30e00000 {
				compatible = "ti,am654-hwspinlock";
				reg = <0x00 0x30e00000 0x00 0x1000>;
				#hwlock-cells = <0x01>;
				phandle = <0xa7>;
			};

			mailbox@31f80000 {
				compatible = "ti,am654-mailbox";
				reg = <0x00 0x31f80000 0x00 0x200>;
				#mbox-cells = <0x01>;
				ti,mbox-num-users = <0x04>;
				ti,mbox-num-fifos = <0x10>;
				interrupt-parent = <0x27>;
				status = "okay";
				interrupts = <0x1b4>;
				phandle = <0xa8>;

				mbox-mcu-r5fss0-core0 {
					ti,mbox-rx = <0x00 0x00 0x00>;
					ti,mbox-tx = <0x01 0x00 0x00>;
					phandle = <0xa9>;
				};

				mbox-mcu-r5fss0-core1 {
					ti,mbox-rx = <0x02 0x00 0x00>;
					ti,mbox-tx = <0x03 0x00 0x00>;
					phandle = <0xaa>;
				};
			};

			mailbox@31f81000 {
				compatible = "ti,am654-mailbox";
				reg = <0x00 0x31f81000 0x00 0x200>;
				#mbox-cells = <0x01>;
				ti,mbox-num-users = <0x04>;
				ti,mbox-num-fifos = <0x10>;
				interrupt-parent = <0x27>;
				status = "okay";
				interrupts = <0x1b0>;
				phandle = <0x33>;

				mbox-main-r5fss0-core0 {
					ti,mbox-rx = <0x00 0x00 0x00>;
					ti,mbox-tx = <0x01 0x00 0x00>;
					phandle = <0x34>;
				};

				mbox-main-r5fss0-core1 {
					ti,mbox-rx = <0x02 0x00 0x00>;
					ti,mbox-tx = <0x03 0x00 0x00>;
					phandle = <0x37>;
				};
			};

			mailbox@31f82000 {
				compatible = "ti,am654-mailbox";
				reg = <0x00 0x31f82000 0x00 0x200>;
				#mbox-cells = <0x01>;
				ti,mbox-num-users = <0x04>;
				ti,mbox-num-fifos = <0x10>;
				interrupt-parent = <0x27>;
				status = "okay";
				interrupts = <0x1ac>;
				phandle = <0x3a>;

				mbox-main-r5fss1-core0 {
					ti,mbox-rx = <0x00 0x00 0x00>;
					ti,mbox-tx = <0x01 0x00 0x00>;
					phandle = <0x3b>;
				};

				mbox-main-r5fss1-core1 {
					ti,mbox-rx = <0x02 0x00 0x00>;
					ti,mbox-tx = <0x03 0x00 0x00>;
					phandle = <0x3e>;
				};
			};

			mailbox@31f83000 {
				compatible = "ti,am654-mailbox";
				reg = <0x00 0x31f83000 0x00 0x200>;
				#mbox-cells = <0x01>;
				ti,mbox-num-users = <0x04>;
				ti,mbox-num-fifos = <0x10>;
				interrupt-parent = <0x27>;
				status = "okay";
				interrupts = <0x1a8>;
				phandle = <0x41>;

				mbox-main-r5fss2-core0 {
					ti,mbox-rx = <0x00 0x00 0x00>;
					ti,mbox-tx = <0x01 0x00 0x00>;
					phandle = <0x42>;
				};

				mbox-main-r5fss2-core1 {
					ti,mbox-rx = <0x02 0x00 0x00>;
					ti,mbox-tx = <0x03 0x00 0x00>;
					phandle = <0x45>;
				};
			};

			mailbox@31f84000 {
				compatible = "ti,am654-mailbox";
				reg = <0x00 0x31f84000 0x00 0x200>;
				#mbox-cells = <0x01>;
				ti,mbox-num-users = <0x04>;
				ti,mbox-num-fifos = <0x10>;
				interrupt-parent = <0x27>;
				status = "okay";
				interrupts = <0x1a4>;
				phandle = <0x48>;

				mbox-c71-0 {
					ti,mbox-rx = <0x00 0x00 0x00>;
					ti,mbox-tx = <0x01 0x00 0x00>;
					phandle = <0x49>;
				};

				mbox-c71-1 {
					ti,mbox-rx = <0x02 0x00 0x00>;
					ti,mbox-tx = <0x03 0x00 0x00>;
					phandle = <0x4c>;
				};
			};

			mailbox@31f85000 {
				compatible = "ti,am654-mailbox";
				reg = <0x00 0x31f85000 0x00 0x200>;
				#mbox-cells = <0x01>;
				ti,mbox-num-users = <0x04>;
				ti,mbox-num-fifos = <0x10>;
				interrupt-parent = <0x27>;
				status = "okay";
				interrupts = <0x1a0>;
				phandle = <0x4f>;

				mbox-c71-2 {
					ti,mbox-rx = <0x00 0x00 0x00>;
					ti,mbox-tx = <0x01 0x00 0x00>;
					phandle = <0x50>;
				};

				mbox-c71-3 {
					ti,mbox-rx = <0x02 0x00 0x00>;
					ti,mbox-tx = <0x03 0x00 0x00>;
					phandle = <0x53>;
				};
			};

			mailbox@31f86000 {
				compatible = "ti,am654-mailbox";
				reg = <0x00 0x31f86000 0x00 0x200>;
				#mbox-cells = <0x01>;
				ti,mbox-num-users = <0x04>;
				ti,mbox-num-fifos = <0x10>;
				interrupt-parent = <0x27>;
				status = "disabled";
				phandle = <0xab>;
			};

			mailbox@31f87000 {
				compatible = "ti,am654-mailbox";
				reg = <0x00 0x31f87000 0x00 0x200>;
				#mbox-cells = <0x01>;
				ti,mbox-num-users = <0x04>;
				ti,mbox-num-fifos = <0x10>;
				interrupt-parent = <0x27>;
				status = "disabled";
				phandle = <0xac>;
			};

			mailbox@31f88000 {
				compatible = "ti,am654-mailbox";
				reg = <0x00 0x31f88000 0x00 0x200>;
				#mbox-cells = <0x01>;
				ti,mbox-num-users = <0x04>;
				ti,mbox-num-fifos = <0x10>;
				interrupt-parent = <0x27>;
				status = "disabled";
				phandle = <0xad>;
			};

			mailbox@31f89000 {
				compatible = "ti,am654-mailbox";
				reg = <0x00 0x31f89000 0x00 0x200>;
				#mbox-cells = <0x01>;
				ti,mbox-num-users = <0x04>;
				ti,mbox-num-fifos = <0x10>;
				interrupt-parent = <0x27>;
				status = "disabled";
				phandle = <0xae>;
			};

			mailbox@31f8a000 {
				compatible = "ti,am654-mailbox";
				reg = <0x00 0x31f8a000 0x00 0x200>;
				#mbox-cells = <0x01>;
				ti,mbox-num-users = <0x04>;
				ti,mbox-num-fifos = <0x10>;
				interrupt-parent = <0x27>;
				status = "disabled";
				phandle = <0xaf>;
			};

			mailbox@31f8b000 {
				compatible = "ti,am654-mailbox";
				reg = <0x00 0x31f8b000 0x00 0x200>;
				#mbox-cells = <0x01>;
				ti,mbox-num-users = <0x04>;
				ti,mbox-num-fifos = <0x10>;
				interrupt-parent = <0x27>;
				status = "disabled";
				phandle = <0xb0>;
			};

			mailbox@31f90000 {
				compatible = "ti,am654-mailbox";
				reg = <0x00 0x31f90000 0x00 0x200>;
				#mbox-cells = <0x01>;
				ti,mbox-num-users = <0x04>;
				ti,mbox-num-fifos = <0x10>;
				interrupt-parent = <0x27>;
				status = "disabled";
				phandle = <0xb1>;
			};

			mailbox@31f91000 {
				compatible = "ti,am654-mailbox";
				reg = <0x00 0x31f91000 0x00 0x200>;
				#mbox-cells = <0x01>;
				ti,mbox-num-users = <0x04>;
				ti,mbox-num-fifos = <0x10>;
				interrupt-parent = <0x27>;
				status = "disabled";
				phandle = <0xb2>;
			};

			mailbox@31f92000 {
				compatible = "ti,am654-mailbox";
				reg = <0x00 0x31f92000 0x00 0x200>;
				#mbox-cells = <0x01>;
				ti,mbox-num-users = <0x04>;
				ti,mbox-num-fifos = <0x10>;
				interrupt-parent = <0x27>;
				status = "disabled";
				phandle = <0xb3>;
			};

			mailbox@31f93000 {
				compatible = "ti,am654-mailbox";
				reg = <0x00 0x31f93000 0x00 0x200>;
				#mbox-cells = <0x01>;
				ti,mbox-num-users = <0x04>;
				ti,mbox-num-fifos = <0x10>;
				interrupt-parent = <0x27>;
				status = "disabled";
				phandle = <0xb4>;
			};

			mailbox@31f94000 {
				compatible = "ti,am654-mailbox";
				reg = <0x00 0x31f94000 0x00 0x200>;
				#mbox-cells = <0x01>;
				ti,mbox-num-users = <0x04>;
				ti,mbox-num-fifos = <0x10>;
				interrupt-parent = <0x27>;
				status = "disabled";
				phandle = <0xb5>;
			};

			mailbox@31f95000 {
				compatible = "ti,am654-mailbox";
				reg = <0x00 0x31f95000 0x00 0x200>;
				#mbox-cells = <0x01>;
				ti,mbox-num-users = <0x04>;
				ti,mbox-num-fifos = <0x10>;
				interrupt-parent = <0x27>;
				status = "disabled";
				phandle = <0xb6>;
			};

			mailbox@31f96000 {
				compatible = "ti,am654-mailbox";
				reg = <0x00 0x31f96000 0x00 0x200>;
				#mbox-cells = <0x01>;
				ti,mbox-num-users = <0x04>;
				ti,mbox-num-fifos = <0x10>;
				interrupt-parent = <0x27>;
				status = "disabled";
				phandle = <0xb7>;
			};

			mailbox@31f97000 {
				compatible = "ti,am654-mailbox";
				reg = <0x00 0x31f97000 0x00 0x200>;
				#mbox-cells = <0x01>;
				ti,mbox-num-users = <0x04>;
				ti,mbox-num-fifos = <0x10>;
				interrupt-parent = <0x27>;
				status = "disabled";
				phandle = <0xb8>;
			};

			mailbox@31f98000 {
				compatible = "ti,am654-mailbox";
				reg = <0x00 0x31f98000 0x00 0x200>;
				#mbox-cells = <0x01>;
				ti,mbox-num-users = <0x04>;
				ti,mbox-num-fifos = <0x10>;
				interrupt-parent = <0x27>;
				status = "disabled";
				phandle = <0xb9>;
			};

			mailbox@31f99000 {
				compatible = "ti,am654-mailbox";
				reg = <0x00 0x31f99000 0x00 0x200>;
				#mbox-cells = <0x01>;
				ti,mbox-num-users = <0x04>;
				ti,mbox-num-fifos = <0x10>;
				interrupt-parent = <0x27>;
				status = "disabled";
				phandle = <0xba>;
			};

			mailbox@31f9a000 {
				compatible = "ti,am654-mailbox";
				reg = <0x00 0x31f9a000 0x00 0x200>;
				#mbox-cells = <0x01>;
				ti,mbox-num-users = <0x04>;
				ti,mbox-num-fifos = <0x10>;
				interrupt-parent = <0x27>;
				status = "disabled";
				phandle = <0xbb>;
			};

			mailbox@31f9b000 {
				compatible = "ti,am654-mailbox";
				reg = <0x00 0x31f9b000 0x00 0x200>;
				#mbox-cells = <0x01>;
				ti,mbox-num-users = <0x04>;
				ti,mbox-num-fifos = <0x10>;
				interrupt-parent = <0x27>;
				status = "disabled";
				phandle = <0xbc>;
			};

			ringacc@3c000000 {
				compatible = "ti,am654-navss-ringacc";
				reg = <0x00 0x3c000000 0x00 0x400000 0x00 0x38000000 0x00 0x400000 0x00 0x31120000 0x00 0x100 0x00 0x33000000 0x00 0x40000>;
				reg-names = "rt\0fifos\0proxy_gcfg\0proxy_target";
				ti,num-rings = <0x400>;
				ti,sci-rm-range-gp-rings = <0x01>;
				ti,sci = <0x0e>;
				ti,sci-dev-id = <0x13b>;
				msi-parent = <0x13>;
				phandle = <0x29>;
			};

			dma-controller@31150000 {
				compatible = "ti,j721e-navss-main-udmap";
				reg = <0x00 0x31150000 0x00 0x100 0x00 0x34000000 0x00 0x80000 0x00 0x35000000 0x00 0x200000>;
				reg-names = "gcfg\0rchanrt\0tchanrt";
				msi-parent = <0x13>;
				#dma-cells = <0x01>;
				ti,sci = <0x0e>;
				ti,sci-dev-id = <0x13f>;
				ti,ringacc = <0x29>;
				ti,sci-rm-range-tchan = <0x0d 0x0f 0x10>;
				ti,sci-rm-range-rchan = <0x0a 0x0b 0x0c>;
				ti,sci-rm-range-rflow = <0x00>;
				phandle = <0x17>;
			};

			dma-controller@311a0000 {
				compatible = "ti,j721s2-dmss-bcdma-csi";
				reg = <0x00 0x311a0000 0x00 0x100 0x00 0x35d00000 0x00 0x20000 0x00 0x35c00000 0x00 0x10000 0x00 0x35e00000 0x00 0x80000>;
				reg-names = "gcfg\0rchanrt\0tchanrt\0ringrt";
				msi-parent = <0x13>;
				#dma-cells = <0x03>;
				ti,sci = <0x0e>;
				ti,sci-dev-id = <0x119>;
				ti,sci-rm-range-rchan = <0x21>;
				ti,sci-rm-range-tchan = <0x22>;
				phandle = <0x28>;
			};

			cpts@310d0000 {
				compatible = "ti,j721e-cpts";
				reg = <0x00 0x310d0000 0x00 0x400>;
				reg-names = "cpts";
				clocks = <0x0f 0x11a 0x00>;
				clock-names = "cpts";
				assigned-clocks = <0x0f 0x3e 0x03>;
				assigned-clock-parents = <0x0f 0x3e 0x05>;
				interrupts-extended = <0x27 0x187>;
				interrupt-names = "cpts";
				ti,cpts-periodic-outputs = <0x06>;
				ti,cpts-ext-ts-inputs = <0x08>;
			};
		};

		ethernet@c000000 {
			compatible = "ti,j784s4-cpswxg-nuss";
			reg = <0x00 0xc000000 0x00 0x200000>;
			reg-names = "cpsw_nuss";
			#address-cells = <0x02>;
			#size-cells = <0x02>;
			ranges = <0x00 0x00 0x00 0xc000000 0x00 0x200000>;
			dma-coherent;
			clocks = <0x0f 0x40 0x00>;
			clock-names = "fck";
			power-domains = <0x10 0x40 0x01>;
			dmas = <0x17 0xca00 0x17 0xca01 0x17 0xca02 0x17 0xca03 0x17 0xca04 0x17 0xca05 0x17 0xca06 0x17 0xca07 0x17 0x4a00>;
			dma-names = "tx0\0tx1\0tx2\0tx3\0tx4\0tx5\0tx6\0tx7\0rx";
			status = "disabled";
			phandle = <0xbd>;

			ethernet-ports {
				#address-cells = <0x01>;
				#size-cells = <0x00>;

				port@1 {
					reg = <0x01>;
					label = "port1";
					ti,mac-only;
					status = "disabled";
					phandle = <0xbe>;
				};

				port@2 {
					reg = <0x02>;
					label = "port2";
					ti,mac-only;
					status = "disabled";
					phandle = <0xbf>;
				};

				port@3 {
					reg = <0x03>;
					label = "port3";
					ti,mac-only;
					status = "disabled";
					phandle = <0xc0>;
				};

				port@4 {
					reg = <0x04>;
					label = "port4";
					ti,mac-only;
					status = "disabled";
					phandle = <0xc1>;
				};

				port@5 {
					reg = <0x05>;
					label = "port5";
					status = "disabled";
					phandle = <0xc2>;
				};

				port@6 {
					reg = <0x06>;
					label = "port6";
					status = "disabled";
					phandle = <0xc3>;
				};

				port@7 {
					reg = <0x07>;
					label = "port7";
					status = "disabled";
					phandle = <0xc4>;
				};

				port@8 {
					reg = <0x08>;
					label = "port8";
					status = "disabled";
					phandle = <0xc5>;
				};
			};

			mdio@f00 {
				compatible = "ti,cpsw-mdio\0ti,davinci_mdio";
				reg = <0x00 0xf00 0x00 0x100>;
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				clocks = <0x0f 0x40 0x00>;
				clock-names = "fck";
				bus_freq = <0xf4240>;
				status = "disabled";
				phandle = <0xc6>;
			};

			cpts@3d000 {
				compatible = "ti,am65-cpts";
				reg = <0x00 0x3d000 0x00 0x400>;
				clocks = <0x0f 0x40 0x03>;
				clock-names = "cpts";
				interrupts-extended = <0x01 0x00 0x10 0x04>;
				interrupt-names = "cpts";
				ti,cpts-ext-ts-inputs = <0x04>;
				ti,cpts-periodic-outputs = <0x02>;
			};
		};

		pcie@2900000 {
			compatible = "ti,j784s4-pcie-host";
			reg = <0x00 0x2900000 0x00 0x1000 0x00 0x2907000 0x00 0x400 0x00 0xd000000 0x00 0x800000 0x00 0x10000000 0x00 0x1000>;
			reg-names = "intd_cfg\0user_cfg\0reg\0cfg";
			interrupt-names = "link_state";
			interrupts = <0x00 0x13e 0x01>;
			device_type = "pci";
			ti,syscon-pcie-ctrl = <0x2a 0x4070>;
			max-link-speed = <0x03>;
			num-lanes = <0x04>;
			power-domains = <0x10 0x14c 0x01>;
			clocks = <0x0f 0x14c 0x00>;
			clock-names = "fck";
			#address-cells = <0x03>;
			#size-cells = <0x02>;
			bus-range = <0x00 0xff>;
			vendor-id = <0x104c>;
			device-id = <0xb00d>;
			msi-map = <0x00 0x2b 0x00 0x10000>;
			dma-coherent;
			ranges = <0x1000000 0x00 0x10001000 0x00 0x10001000 0x00 0x10000 0x2000000 0x00 0x10011000 0x00 0x10011000 0x00 0x7fef000>;
			dma-ranges = <0x2000000 0x00 0x00 0x00 0x00 0x10000 0x00>;
			#interrupt-cells = <0x01>;
			interrupt-map-mask = <0x00 0x00 0x00 0x07>;
			interrupt-map = <0x00 0x00 0x00 0x01 0x2c 0x00 0x00 0x00 0x00 0x02 0x2c 0x00 0x00 0x00 0x00 0x03 0x2c 0x00 0x00 0x00 0x00 0x04 0x2c 0x00>;
			status = "okay";
			reset-gpios = <0x22 0x34 0x00>;
			gpio-reset-padcfg = <0x11c0d0>;
			phys = <0x2d>;
			phy-names = "pcie-phy";
			phandle = <0xc7>;

			interrupt-controller {
				interrupt-controller;
				#interrupt-cells = <0x01>;
				interrupt-parent = <0x01>;
				interrupts = <0x00 0x138 0x01>;
				phandle = <0x2c>;
			};
		};

		pcie@2910000 {
			compatible = "ti,j784s4-pcie-host";
			reg = <0x00 0x2910000 0x00 0x1000 0x00 0x2917000 0x00 0x400 0x00 0xd800000 0x00 0x800000 0x00 0x18000000 0x00 0x1000>;
			reg-names = "intd_cfg\0user_cfg\0reg\0cfg";
			interrupt-names = "link_state";
			interrupts = <0x00 0x14a 0x01>;
			device_type = "pci";
			ti,syscon-pcie-ctrl = <0x2a 0x4074>;
			ti,syscon-pcie-refclk-out = <0x2a 0x9008 0x900c 0x18090 0x8074 0x01>;
			max-link-speed = <0x03>;
			num-lanes = <0x04>;
			power-domains = <0x10 0x14d 0x01>;
			clocks = <0x0f 0x14d 0x00>;
			clock-names = "fck";
			#address-cells = <0x03>;
			#size-cells = <0x02>;
			bus-range = <0x00 0xff>;
			vendor-id = <0x104c>;
			device-id = <0xb013>;
			msi-map = <0x00 0x2b 0x10000 0x10000>;
			dma-coherent;
			ranges = <0x1000000 0x00 0x18001000 0x00 0x18001000 0x00 0x10000 0x2000000 0x00 0x18011000 0x00 0x18011000 0x00 0x7fef000>;
			dma-ranges = <0x2000000 0x00 0x00 0x00 0x00 0x10000 0x00>;
			#interrupt-cells = <0x01>;
			interrupt-map-mask = <0x00 0x00 0x00 0x07>;
			interrupt-map = <0x00 0x00 0x00 0x01 0x2e 0x00 0x00 0x00 0x00 0x02 0x2e 0x00 0x00 0x00 0x00 0x03 0x2e 0x00 0x00 0x00 0x00 0x04 0x2e 0x00>;
			status = "disabled";
			phandle = <0xc8>;

			interrupt-controller {
				interrupt-controller;
				#interrupt-cells = <0x01>;
				interrupt-parent = <0x01>;
				interrupts = <0x00 0x144 0x01>;
				phandle = <0x2e>;
			};
		};

		spi@2100000 {
			compatible = "ti,am654-mcspi\0ti,omap4-mcspi";
			reg = <0x00 0x2100000 0x00 0x400>;
			interrupts = <0x00 0xb8 0x04>;
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			power-domains = <0x10 0x178 0x01>;
			clocks = <0x0f 0x178 0x01>;
			status = "okay";
			pinctrl-0 = <0x2f>;
			pinctrl-names = "default";
			phandle = <0xc9>;
		};

		spi@2110000 {
			compatible = "ti,am654-mcspi\0ti,omap4-mcspi";
			reg = <0x00 0x2110000 0x00 0x400>;
			interrupts = <0x00 0xb9 0x04>;
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			power-domains = <0x10 0x179 0x01>;
			clocks = <0x0f 0x179 0x01>;
			status = "disabled";
			phandle = <0xca>;
		};

		spi@2120000 {
			compatible = "ti,am654-mcspi\0ti,omap4-mcspi";
			reg = <0x00 0x2120000 0x00 0x400>;
			interrupts = <0x00 0xba 0x04>;
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			power-domains = <0x10 0x17a 0x01>;
			clocks = <0x0f 0x17a 0x01>;
			status = "okay";
			pinctrl-0 = <0x30>;
			pinctrl-names = "default";
			phandle = <0xcb>;
		};

		spi@2130000 {
			compatible = "ti,am654-mcspi\0ti,omap4-mcspi";
			reg = <0x00 0x2130000 0x00 0x400>;
			interrupts = <0x00 0xbb 0x04>;
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			power-domains = <0x10 0x17b 0x01>;
			clocks = <0x0f 0x17b 0x01>;
			status = "disabled";
			phandle = <0xcc>;
		};

		spi@2140000 {
			compatible = "ti,am654-mcspi\0ti,omap4-mcspi";
			reg = <0x00 0x2140000 0x00 0x400>;
			interrupts = <0x00 0xbc 0x04>;
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			power-domains = <0x10 0x17c 0x01>;
			clocks = <0x0f 0x17c 0x01>;
			status = "disabled";
			phandle = <0xcd>;
		};

		spi@2150000 {
			compatible = "ti,am654-mcspi\0ti,omap4-mcspi";
			reg = <0x00 0x2150000 0x00 0x400>;
			interrupts = <0x00 0xbd 0x04>;
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			power-domains = <0x10 0x17d 0x01>;
			clocks = <0x0f 0x17d 0x01>;
			status = "disabled";
			phandle = <0xce>;
		};

		spi@2160000 {
			compatible = "ti,am654-mcspi\0ti,omap4-mcspi";
			reg = <0x00 0x2160000 0x00 0x400>;
			interrupts = <0x00 0xbe 0x04>;
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			power-domains = <0x10 0x17e 0x01>;
			clocks = <0x0f 0x17e 0x01>;
			status = "disabled";
			phandle = <0xcf>;
		};

		spi@2170000 {
			compatible = "ti,am654-mcspi\0ti,omap4-mcspi";
			reg = <0x00 0x2170000 0x00 0x400>;
			interrupts = <0x00 0xbf 0x04>;
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			power-domains = <0x10 0x17f 0x01>;
			clocks = <0x0f 0x17f 0x01>;
			status = "disabled";
			phandle = <0xd0>;
		};

		pinctrl@a40000 {
			compatible = "pinctrl-single";
			reg = <0x00 0xa40000 0x00 0x800>;
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			#pinctrl-cells = <0x01>;
			pinctrl-single,register-width = <0x20>;
			pinctrl-single,function-mask = <0x107ff>;
			status = "disabled";
			pinctrl-names = "default";
			pinctrl-0 = <0x31>;
			phandle = <0xd1>;

			mcu-cpsw-cpts {
				pinctrl-single,pins = <0x68 0x10011>;
				phandle = <0x31>;
			};
		};

		r5fss@5c00000 {
			compatible = "ti,j721s2-r5fss";
			ti,cluster-mode = <0x00>;
			#address-cells = <0x01>;
			#size-cells = <0x01>;
			ranges = <0x5c00000 0x00 0x5c00000 0x20000 0x5d00000 0x00 0x5d00000 0x20000>;
			power-domains = <0x10 0x150 0x01>;
			phandle = <0xd2>;

			r5f@5c00000 {
				compatible = "ti,j721s2-r5f";
				reg = <0x5c00000 0x10000 0x5c10000 0x10000>;
				reg-names = "atcm\0btcm";
				ti,sci = <0x0e>;
				ti,sci-dev-id = <0x153>;
				ti,sci-proc-ids = <0x06 0xff>;
				resets = <0x32 0x153 0x01>;
				firmware-name = "j784s4-main-r5f0_0-fw";
				ti,atcm-enable = <0x01>;
				ti,btcm-enable = <0x01>;
				ti,loczrama = <0x01>;
				status = "okay";
				mboxes = <0x33 0x34>;
				memory-region = <0x35 0x36>;
				phandle = <0xd3>;
			};

			r5f@5d00000 {
				compatible = "ti,j721s2-r5f";
				reg = <0x5d00000 0x10000 0x5d10000 0x10000>;
				reg-names = "atcm\0btcm";
				ti,sci = <0x0e>;
				ti,sci-dev-id = <0x154>;
				ti,sci-proc-ids = <0x07 0xff>;
				resets = <0x32 0x154 0x01>;
				firmware-name = "j784s4-main-r5f0_1-fw";
				ti,atcm-enable = <0x01>;
				ti,btcm-enable = <0x01>;
				ti,loczrama = <0x01>;
				status = "okay";
				mboxes = <0x33 0x37>;
				memory-region = <0x38 0x39>;
				phandle = <0xd4>;
			};
		};

		r5fss@5e00000 {
			compatible = "ti,j721s2-r5fss";
			ti,cluster-mode = <0x00>;
			#address-cells = <0x01>;
			#size-cells = <0x01>;
			ranges = <0x5e00000 0x00 0x5e00000 0x20000 0x5f00000 0x00 0x5f00000 0x20000>;
			power-domains = <0x10 0x151 0x01>;
			phandle = <0xd5>;

			r5f@5e00000 {
				compatible = "ti,j721s2-r5f";
				reg = <0x5e00000 0x10000 0x5e10000 0x10000>;
				reg-names = "atcm\0btcm";
				ti,sci = <0x0e>;
				ti,sci-dev-id = <0x155>;
				ti,sci-proc-ids = <0x08 0xff>;
				resets = <0x32 0x155 0x01>;
				firmware-name = "j784s4-main-r5f1_0-fw";
				ti,atcm-enable = <0x01>;
				ti,btcm-enable = <0x01>;
				ti,loczrama = <0x01>;
				status = "okay";
				mboxes = <0x3a 0x3b>;
				memory-region = <0x3c 0x3d>;
				phandle = <0xd6>;
			};

			r5f@5f00000 {
				compatible = "ti,j721s2-r5f";
				reg = <0x5f00000 0x10000 0x5f10000 0x10000>;
				reg-names = "atcm\0btcm";
				ti,sci = <0x0e>;
				ti,sci-dev-id = <0x156>;
				ti,sci-proc-ids = <0x09 0xff>;
				resets = <0x32 0x156 0x01>;
				firmware-name = "j784s4-main-r5f1_1-fw";
				ti,atcm-enable = <0x01>;
				ti,btcm-enable = <0x01>;
				ti,loczrama = <0x01>;
				status = "okay";
				mboxes = <0x3a 0x3e>;
				memory-region = <0x3f 0x40>;
				phandle = <0xd7>;
			};
		};

		r5fss@5900000 {
			compatible = "ti,j721s2-r5fss";
			ti,cluster-mode = <0x00>;
			#address-cells = <0x01>;
			#size-cells = <0x01>;
			ranges = <0x5900000 0x00 0x5900000 0x20000 0x5a00000 0x00 0x5a00000 0x20000>;
			power-domains = <0x10 0x152 0x01>;
			phandle = <0xd8>;

			r5f@5900000 {
				compatible = "ti,j721s2-r5f";
				reg = <0x5900000 0x10000 0x5910000 0x10000>;
				reg-names = "atcm\0btcm";
				ti,sci = <0x0e>;
				ti,sci-dev-id = <0x157>;
				ti,sci-proc-ids = <0x0a 0xff>;
				resets = <0x32 0x157 0x01>;
				firmware-name = "j784s4-main-r5f2_0-fw";
				ti,atcm-enable = <0x01>;
				ti,btcm-enable = <0x01>;
				ti,loczrama = <0x01>;
				status = "okay";
				mboxes = <0x41 0x42>;
				memory-region = <0x43 0x44>;
				phandle = <0xd9>;
			};

			r5f@5a00000 {
				compatible = "ti,j721s2-r5f";
				reg = <0x5a00000 0x10000 0x5a10000 0x10000>;
				reg-names = "atcm\0btcm";
				ti,sci = <0x0e>;
				ti,sci-dev-id = <0x158>;
				ti,sci-proc-ids = <0x0b 0xff>;
				resets = <0x32 0x158 0x01>;
				firmware-name = "j784s4-main-r5f2_1-fw";
				ti,atcm-enable = <0x01>;
				ti,btcm-enable = <0x01>;
				ti,loczrama = <0x01>;
				status = "okay";
				mboxes = <0x41 0x45>;
				memory-region = <0x46 0x47>;
				phandle = <0xda>;
			};
		};

		dsp@64800000 {
			compatible = "ti,j721s2-c71-dsp";
			reg = <0x00 0x64800000 0x00 0x80000 0x00 0x64e00000 0x00 0xc000>;
			reg-names = "l2sram\0l1dram";
			ti,sci = <0x0e>;
			ti,sci-dev-id = <0x1e>;
			ti,sci-proc-ids = <0x30 0xff>;
			resets = <0x32 0x1e 0x01>;
			firmware-name = "j784s4-c71_0-fw";
			status = "disabled";
			mboxes = <0x48 0x49>;
			memory-region = <0x4a 0x4b>;
			phandle = <0xdb>;
		};

		dsp@65800000 {
			compatible = "ti,j721s2-c71-dsp";
			reg = <0x00 0x65800000 0x00 0x80000 0x00 0x65e00000 0x00 0xc000>;
			reg-names = "l2sram\0l1dram";
			ti,sci = <0x0e>;
			ti,sci-dev-id = <0x21>;
			ti,sci-proc-ids = <0x31 0xff>;
			resets = <0x32 0x21 0x01>;
			firmware-name = "j784s4-c71_1-fw";
			status = "disabled";
			mboxes = <0x48 0x4c>;
			memory-region = <0x4d 0x4e>;
			phandle = <0xdc>;
		};

		dsp@66800000 {
			compatible = "ti,j721s2-c71-dsp";
			reg = <0x00 0x66800000 0x00 0x80000 0x00 0x66e00000 0x00 0xc000>;
			reg-names = "l2sram\0l1dram";
			ti,sci = <0x0e>;
			ti,sci-dev-id = <0x25>;
			ti,sci-proc-ids = <0x32 0xff>;
			resets = <0x32 0x25 0x01>;
			firmware-name = "j784s4-c71_2-fw";
			status = "disabled";
			mboxes = <0x4f 0x50>;
			memory-region = <0x51 0x52>;
			phandle = <0xdd>;
		};

		dsp@67800000 {
			compatible = "ti,j721s2-c71-dsp";
			reg = <0x00 0x67800000 0x00 0x80000 0x00 0x67e00000 0x00 0xc000>;
			reg-names = "l2sram\0l1dram";
			ti,sci = <0x0e>;
			ti,sci-dev-id = <0x28>;
			ti,sci-proc-ids = <0x33 0xff>;
			resets = <0x32 0x28 0x01>;
			firmware-name = "j784s4-c71_3-fw";
			status = "disabled";
			mboxes = <0x4f 0x53>;
			memory-region = <0x54 0x55>;
			phandle = <0xde>;
		};

		esm@700000 {
			compatible = "ti,j721e-esm";
			reg = <0x00 0x700000 0x00 0x1000>;
			ti,esm-pins = <0x2b0 0x2b1 0x2b2 0x2b3 0x2b4 0x2b5 0x2b6 0x2b7>;
			bootph-pre-ram;
			phandle = <0xdf>;
		};

		watchdog@2200000 {
			compatible = "ti,j7-rti-wdt";
			reg = <0x00 0x2200000 0x00 0x100>;
			clocks = <0x0f 0x15c 0x01>;
			power-domains = <0x10 0x15c 0x01>;
			assigned-clocks = <0x0f 0x15c 0x00>;
			assigned-clock-parents = <0x0f 0x15c 0x04>;
			phandle = <0xe0>;
		};

		watchdog@2210000 {
			compatible = "ti,j7-rti-wdt";
			reg = <0x00 0x2210000 0x00 0x100>;
			clocks = <0x0f 0x15d 0x01>;
			power-domains = <0x10 0x15d 0x01>;
			assigned-clocks = <0x0f 0x15d 0x00>;
			assigned-clock-parents = <0x0f 0x15d 0x04>;
			phandle = <0xe1>;
		};

		watchdog@2220000 {
			compatible = "ti,j7-rti-wdt";
			reg = <0x00 0x2220000 0x00 0x100>;
			clocks = <0x0f 0x15e 0x01>;
			power-domains = <0x10 0x15e 0x01>;
			assigned-clocks = <0x0f 0x15e 0x00>;
			assigned-clock-parents = <0x0f 0x15e 0x04>;
			phandle = <0xe2>;
		};

		watchdog@2230000 {
			compatible = "ti,j7-rti-wdt";
			reg = <0x00 0x2230000 0x00 0x100>;
			clocks = <0x0f 0x15f 0x01>;
			power-domains = <0x10 0x15f 0x01>;
			assigned-clocks = <0x0f 0x15f 0x00>;
			assigned-clock-parents = <0x0f 0x15f 0x04>;
			phandle = <0xe3>;
		};

		watchdog@2240000 {
			compatible = "ti,j7-rti-wdt";
			reg = <0x00 0x2240000 0x00 0x100>;
			clocks = <0x0f 0x160 0x01>;
			power-domains = <0x10 0x160 0x01>;
			assigned-clocks = <0x0f 0x160 0x00>;
			assigned-clock-parents = <0x0f 0x160 0x04>;
			phandle = <0xe4>;
		};

		watchdog@2250000 {
			compatible = "ti,j7-rti-wdt";
			reg = <0x00 0x2250000 0x00 0x100>;
			clocks = <0x0f 0x161 0x01>;
			power-domains = <0x10 0x161 0x01>;
			assigned-clocks = <0x0f 0x161 0x00>;
			assigned-clock-parents = <0x0f 0x161 0x04>;
			phandle = <0xe5>;
		};

		watchdog@2260000 {
			compatible = "ti,j7-rti-wdt";
			reg = <0x00 0x2260000 0x00 0x100>;
			clocks = <0x0f 0x162 0x01>;
			power-domains = <0x10 0x162 0x01>;
			assigned-clocks = <0x0f 0x162 0x00>;
			assigned-clock-parents = <0x0f 0x162 0x04>;
			phandle = <0xe6>;
		};

		watchdog@2270000 {
			compatible = "ti,j7-rti-wdt";
			reg = <0x00 0x2270000 0x00 0x100>;
			clocks = <0x0f 0x163 0x01>;
			power-domains = <0x10 0x163 0x01>;
			assigned-clocks = <0x0f 0x163 0x00>;
			assigned-clock-parents = <0x0f 0x163 0x04>;
			phandle = <0xe7>;
		};

		watchdog@22f0000 {
			compatible = "ti,j7-rti-wdt";
			reg = <0x00 0x22f0000 0x00 0x100>;
			clocks = <0x0f 0x168 0x01>;
			power-domains = <0x10 0x168 0x01>;
			assigned-clocks = <0x0f 0x168 0x00>;
			assigned-clock-parents = <0x0f 0x168 0x04>;
			status = "reserved";
			phandle = <0xe8>;
		};

		watchdog@2300000 {
			compatible = "ti,j7-rti-wdt";
			reg = <0x00 0x2300000 0x00 0x100>;
			clocks = <0x0f 0x164 0x01>;
			power-domains = <0x10 0x164 0x01>;
			assigned-clocks = <0x0f 0x164 0x00>;
			assigned-clock-parents = <0x0f 0x164 0x04>;
			status = "reserved";
			phandle = <0xe9>;
		};

		watchdog@2310000 {
			compatible = "ti,j7-rti-wdt";
			reg = <0x00 0x2310000 0x00 0x100>;
			clocks = <0x0f 0x165 0x01>;
			power-domains = <0x10 0x165 0x01>;
			assigned-clocks = <0x0f 0x165 0x00>;
			assigned-clock-parents = <0x0f 0x165 0x04>;
			status = "reserved";
			phandle = <0xea>;
		};

		watchdog@2320000 {
			compatible = "ti,j7-rti-wdt";
			reg = <0x00 0x2320000 0x00 0x100>;
			clocks = <0x0f 0x166 0x01>;
			power-domains = <0x10 0x166 0x01>;
			assigned-clocks = <0x0f 0x166 0x00>;
			assigned-clock-parents = <0x0f 0x166 0x04>;
			status = "reserved";
			phandle = <0xeb>;
		};

		watchdog@2330000 {
			compatible = "ti,j7-rti-wdt";
			reg = <0x00 0x2330000 0x00 0x100>;
			clocks = <0x0f 0x167 0x01>;
			power-domains = <0x10 0x167 0x01>;
			assigned-clocks = <0x0f 0x167 0x00>;
			assigned-clock-parents = <0x0f 0x167 0x04>;
			status = "reserved";
			phandle = <0xec>;
		};

		watchdog@23c0000 {
			compatible = "ti,j7-rti-wdt";
			reg = <0x00 0x23c0000 0x00 0x100>;
			clocks = <0x0f 0x169 0x01>;
			power-domains = <0x10 0x169 0x01>;
			assigned-clocks = <0x0f 0x169 0x00>;
			assigned-clock-parents = <0x0f 0x169 0x04>;
			status = "reserved";
			phandle = <0xed>;
		};

		watchdog@23d0000 {
			compatible = "ti,j7-rti-wdt";
			reg = <0x00 0x23d0000 0x00 0x100>;
			clocks = <0x0f 0x16a 0x01>;
			power-domains = <0x10 0x16a 0x01>;
			assigned-clocks = <0x0f 0x16a 0x00>;
			assigned-clock-parents = <0x0f 0x16a 0x04>;
			status = "reserved";
			phandle = <0xee>;
		};

		watchdog@23e0000 {
			compatible = "ti,j7-rti-wdt";
			reg = <0x00 0x23e0000 0x00 0x100>;
			clocks = <0x0f 0x16b 0x01>;
			power-domains = <0x10 0x16b 0x01>;
			assigned-clocks = <0x0f 0x16b 0x00>;
			assigned-clock-parents = <0x0f 0x16b 0x04>;
			status = "reserved";
			phandle = <0xef>;
		};

		watchdog@23f0000 {
			compatible = "ti,j7-rti-wdt";
			reg = <0x00 0x23f0000 0x00 0x100>;
			clocks = <0x0f 0x16c 0x01>;
			power-domains = <0x10 0x16c 0x01>;
			assigned-clocks = <0x0f 0x16c 0x00>;
			assigned-clock-parents = <0x0f 0x16c 0x04>;
			status = "reserved";
			phandle = <0xf0>;
		};

		watchdog@2540000 {
			compatible = "ti,j7-rti-wdt";
			reg = <0x00 0x2540000 0x00 0x100>;
			clocks = <0x0f 0x16d 0x01>;
			power-domains = <0x10 0x16d 0x01>;
			assigned-clocks = <0x0f 0x16d 0x00>;
			assigned-clock-parents = <0x0f 0x16e 0x04>;
			status = "reserved";
			phandle = <0xf1>;
		};

		watchdog@2550000 {
			compatible = "ti,j7-rti-wdt";
			reg = <0x00 0x2550000 0x00 0x100>;
			clocks = <0x0f 0x16e 0x01>;
			power-domains = <0x10 0x16e 0x01>;
			assigned-clocks = <0x0f 0x16e 0x00>;
			assigned-clock-parents = <0x0f 0x16e 0x04>;
			status = "reserved";
			phandle = <0xf2>;
		};
	};

	thermal-zones {
		phandle = <0xf3>;

		wkup0-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x1f4>;
			thermal-sensors = <0x56 0x00>;
			phandle = <0xf4>;

			trips {

				wkup0-crit {
					temperature = <0x1e848>;
					hysteresis = <0x7d0>;
					type = "critical";
					phandle = <0xf5>;
				};
			};
		};

		wkup1-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x1f4>;
			thermal-sensors = <0x56 0x01>;
			phandle = <0xf6>;

			trips {

				wkup1-crit {
					temperature = <0x1e848>;
					hysteresis = <0x7d0>;
					type = "critical";
					phandle = <0xf7>;
				};
			};
		};

		main0-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x1f4>;
			thermal-sensors = <0x56 0x02>;
			phandle = <0xf8>;

			trips {

				main0-crit {
					temperature = <0x1e848>;
					hysteresis = <0x7d0>;
					type = "critical";
					phandle = <0xf9>;
				};
			};
		};

		main1-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x1f4>;
			thermal-sensors = <0x56 0x03>;
			phandle = <0xfa>;

			trips {

				main1-crit {
					temperature = <0x1e848>;
					hysteresis = <0x7d0>;
					type = "critical";
					phandle = <0xfb>;
				};
			};
		};

		main2-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x1f4>;
			thermal-sensors = <0x56 0x04>;
			phandle = <0xfc>;

			trips {

				main2-crit {
					temperature = <0x1e848>;
					hysteresis = <0x7d0>;
					type = "critical";
					phandle = <0xfd>;
				};
			};
		};

		main3-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x1f4>;
			thermal-sensors = <0x56 0x05>;
			phandle = <0xfe>;

			trips {

				main3-crit {
					temperature = <0x1e848>;
					hysteresis = <0x7d0>;
					type = "critical";
					phandle = <0xff>;
				};
			};
		};

		main4-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x1f4>;
			thermal-sensors = <0x56 0x06>;
			phandle = <0x100>;

			trips {

				main4-crit {
					temperature = <0x1e848>;
					hysteresis = <0x7d0>;
					type = "critical";
					phandle = <0x101>;
				};
			};
		};
	};

	serdes-refclk {
		#clock-cells = <0x00>;
		compatible = "fixed-clock";
		clock-frequency = <0x5f5e100>;
		phandle = <0x23>;
	};

	chosen {
		stdout-path = "serial2:115200n8";
	};

	aliases {
		serial1 = "/bus@100000/bus@28380000/serial@40a00000";
		serial2 = "/bus@100000/serial@2830000";
		mmc1 = "/bus@100000/mmc@4fb0000";
		i2c0 = "/bus@100000/i2c@2000000";
	};

	memory@80000000 {
		device_type = "memory";
		reg = <0x00 0x80000000 0x00 0x80000000 0x08 0x80000000 0x03 0x80000000>;
	};

	reserved-memory {
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		ranges;
		phandle = <0x102>;

		linux,cma {
			compatible = "shared-dma-pool";
			reusable;
			size = <0x00 0x70000000>;
			linux,cma-default;
		};

		optee@9e800000 {
			reg = <0x00 0x9e800000 0x00 0x1800000>;
			no-map;
			phandle = <0x103>;
		};

		bulk0@a0000000 {
			reg = <0x00 0xa0000000 0x00 0x2000000>;
			no-map;
			phandle = <0x104>;
		};

		bulk1@b0000000 {
			reg = <0x00 0xb0000000 0x00 0x4000000>;
			no-map;
			phandle = <0x105>;
		};

		r5f-dma-memory@a2000000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa2000000 0x00 0x100000>;
			no-map;
			phandle = <0x35>;
		};

		r5f-memory@a2100000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa2100000 0x00 0xf00000>;
			no-map;
			phandle = <0x36>;
		};

		r5f-dma-memory@a3000000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa3000000 0x00 0x100000>;
			no-map;
			phandle = <0x38>;
		};

		r5f-memory@a3100000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa3100000 0x00 0xf00000>;
			no-map;
			phandle = <0x39>;
		};

		r5f-dma-memory@a4000000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa4000000 0x00 0x100000>;
			no-map;
			phandle = <0x3c>;
		};

		r5f-memory@a4100000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa4100000 0x00 0xf00000>;
			no-map;
			phandle = <0x3d>;
		};

		r5f-dma-memory@a5000000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa5000000 0x00 0x100000>;
			no-map;
			phandle = <0x3f>;
		};

		r5f-memory@a5100000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa5100000 0x00 0xf00000>;
			no-map;
			phandle = <0x40>;
		};

		r5f-dma-memory@a6000000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa6000000 0x00 0x100000>;
			no-map;
			phandle = <0x43>;
		};

		r5f-memory@a6100000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa6100000 0x00 0xf00000>;
			no-map;
			phandle = <0x44>;
		};

		r5f-dma-memory@a7000000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa7000000 0x00 0x100000>;
			no-map;
			phandle = <0x46>;
		};

		r5f-memory@a7100000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa7100000 0x00 0xf00000>;
			no-map;
			phandle = <0x47>;
		};

		c71-dma-memory@a8000000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa8000000 0x00 0x100000>;
			no-map;
			phandle = <0x4a>;
		};

		c71-memory@a8100000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa8100000 0x00 0xf00000>;
			no-map;
			phandle = <0x4b>;
		};

		c71-dma-memory@a9000000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa9000000 0x00 0x100000>;
			no-map;
			phandle = <0x4d>;
		};

		c71-memory@a9100000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa9100000 0x00 0xf00000>;
			no-map;
			phandle = <0x4e>;
		};

		c71-dma-memory@aa000000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xaa000000 0x00 0x100000>;
			no-map;
			phandle = <0x51>;
		};

		c71-memory@aa100000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xaa100000 0x00 0xf00000>;
			no-map;
			phandle = <0x52>;
		};

		c71-dma-memory@ab000000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xab000000 0x00 0x100000>;
			no-map;
			phandle = <0x54>;
		};

		c71-memory@ab100000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xab100000 0x00 0xf00000>;
			no-map;
			phandle = <0x55>;
		};
	};

	regulator-evm12v0 {
		compatible = "regulator-fixed";
		regulator-name = "evm_12v0";
		regulator-min-microvolt = <0xb71b00>;
		regulator-max-microvolt = <0xb71b00>;
		regulator-always-on;
		regulator-boot-on;
		phandle = <0x106>;
	};

	regulator-vsys3v3 {
		compatible = "regulator-fixed";
		regulator-name = "vsys_3v3";
		regulator-min-microvolt = <0x325aa0>;
		regulator-max-microvolt = <0x325aa0>;
		regulator-always-on;
		regulator-boot-on;
		phandle = <0x57>;
	};

	regulator-vsys5v0 {
		compatible = "regulator-fixed";
		regulator-name = "vsys_5v0";
		regulator-min-microvolt = <0x4c4b40>;
		regulator-max-microvolt = <0x4c4b40>;
		regulator-always-on;
		regulator-boot-on;
		phandle = <0x107>;
	};

	regulator-sd {
		compatible = "regulator-fixed";
		regulator-name = "vdd_mmc1";
		regulator-min-microvolt = <0x325aa0>;
		regulator-max-microvolt = <0x325aa0>;
		regulator-boot-on;
		vin-supply = <0x57>;
		regulator-always-on;
		phandle = <0x108>;
	};

	regulator-sd-dv {
		compatible = "regulator-fixed";
		regulator-name = "vdd_sd_dv";
		regulator-min-microvolt = <0x325aa0>;
		regulator-max-microvolt = <0x325aa0>;
		regulator-always-on;
		regulator-boot-on;
		phandle = <0x109>;
	};

	sfp-eth0 {
		compatible = "sff,sfp";
		i2c-bus = <0x58>;
		pinctrl-names = "default";
		pinctrl-0 = <0x59>;
		los-gpios = <0x22 0x15 0x00>;
		mod-def0-gpios = <0x22 0x12 0x01>;
		tx-disable-gpios = <0x22 0x11 0x00>;
		tx-fault-gpios = <0x22 0x10 0x00>;
		phandle = <0x10a>;
	};

	sfp-eth1 {
		compatible = "sff,sfp";
		i2c-bus = <0x5a>;
		pinctrl-names = "default";
		pinctrl-0 = <0x5b>;
		los-gpios = <0x22 0x05 0x00>;
		mod-def0-gpios = <0x22 0x04 0x01>;
		tx-disable-gpios = <0x22 0x03 0x00>;
		tx-fault-gpios = <0x22 0x02 0x00>;
		phandle = <0x10b>;
	};

	__symbols__ {
		cluster0 = "/cpus/cpu-map/cluster0";
		cluster1 = "/cpus/cpu-map/cluster1";
		cpu0 = "/cpus/cpu@0";
		cpu1 = "/cpus/cpu@1";
		cpu2 = "/cpus/cpu@2";
		cpu3 = "/cpus/cpu@3";
		cpu4 = "/cpus/cpu@100";
		cpu5 = "/cpus/cpu@101";
		cpu6 = "/cpus/cpu@102";
		cpu7 = "/cpus/cpu@103";
		L2_0 = "/l2-cache0";
		L2_1 = "/l2-cache1";
		msmc_l3 = "/l3-cache0";
		psci = "/firmware/psci";
		a72_timer0 = "/timer-cl0-cpu0";
		pmu = "/pmu";
		cbass_main = "/bus@100000";
		cbass_mcu_wakeup = "/bus@100000/bus@28380000";
		sms = "/bus@100000/bus@28380000/system-controller@44083000";
		k3_pds = "/bus@100000/bus@28380000/system-controller@44083000/power-controller";
		k3_clks = "/bus@100000/bus@28380000/system-controller@44083000/clock-controller";
		k3_reset = "/bus@100000/bus@28380000/system-controller@44083000/reset-controller";
		mcu_ram = "/bus@100000/bus@28380000/sram@41c00000";
		wkup_pmx0 = "/bus@100000/bus@28380000/pinctrl@4301c000";
		wkup_pmx1 = "/bus@100000/bus@28380000/pinctrl@4301c038";
		mcu_fss0_ospi1_pins_default = "/bus@100000/bus@28380000/pinctrl@4301c038/mcu-fss0-ospi1-pins-default";
		wkup_pmx2 = "/bus@100000/bus@28380000/pinctrl@4301c068";
		wkup_i2c0_pins_default = "/bus@100000/bus@28380000/pinctrl@4301c068/wkup_i2c0_pins_default";
		wkup_uart0_pins_default = "/bus@100000/bus@28380000/pinctrl@4301c068/wkup-uart0-pins-default";
		mcu_adc0_pins_default = "/bus@100000/bus@28380000/pinctrl@4301c068/mcu-adc0-pins-default";
		mcu_adc1_pins_default = "/bus@100000/bus@28380000/pinctrl@4301c068/mcu-adc1-pins-default";
		soc_fpga0_jtag_pins_default = "/bus@100000/bus@28380000/pinctrl@4301c068/soc-fpga0-jtag-pins-default";
		soc_pre1_jtag_pins_default = "/bus@100000/bus@28380000/pinctrl@4301c068/soc-pre1-jtag-pins-default";
		soc_pre2_jtag_pins_default = "/bus@100000/bus@28380000/pinctrl@4301c068/soc-pre2-jtag-pins-default";
		soc_clk_reset_pins_default = "/bus@100000/bus@28380000/pinctrl@4301c068/soc-clk-reset-pins-default";
		mcu_i2c0_pins_default = "/bus@100000/bus@28380000/pinctrl@4301c068/mcu-i2c0-pins-default";
		wkup_pmx3 = "/bus@100000/bus@28380000/pinctrl@4301c190";
		wkup_gpio_intr = "/bus@100000/bus@28380000/interrupt-controller@42200000";
		mcu_conf = "/bus@100000/bus@28380000/syscon@40f00000";
		phy_gmii_sel = "/bus@100000/bus@28380000/syscon@40f00000/phy@4040";
		wkup_uart0 = "/bus@100000/bus@28380000/serial@42300000";
		mcu_uart0 = "/bus@100000/bus@28380000/serial@40a00000";
		wkup_gpio0 = "/bus@100000/bus@28380000/gpio@42110000";
		wkup_gpio1 = "/bus@100000/bus@28380000/gpio@42100000";
		wkup_i2c0 = "/bus@100000/bus@28380000/i2c@42120000";
		mcu_i2c0 = "/bus@100000/bus@28380000/i2c@40b00000";
		mcu_i2c1 = "/bus@100000/bus@28380000/i2c@40b10000";
		mcu_spi0 = "/bus@100000/bus@28380000/spi@40300000";
		mcu_spi1 = "/bus@100000/bus@28380000/spi@40310000";
		mcu_spi2 = "/bus@100000/bus@28380000/spi@40320000";
		mcu_navss = "/bus@100000/bus@28380000/bus@28380000";
		mcu_ringacc = "/bus@100000/bus@28380000/bus@28380000/ringacc@2b800000";
		mcu_udmap = "/bus@100000/bus@28380000/bus@28380000/dma-controller@285c0000";
		fss = "/bus@100000/bus@28380000/bus@47000000";
		ospi1 = "/bus@100000/bus@28380000/bus@47000000/spi@47050000";
		wkup_vtm0 = "/bus@100000/bus@28380000/temperature-sensor@42040000";
		mcu_esm = "/bus@100000/bus@28380000/esm@40800000";
		wkup_esm = "/bus@100000/bus@28380000/esm@42080000";
		mcu_watchdog0 = "/bus@100000/bus@28380000/watchdog@40600000";
		mcu_watchdog1 = "/bus@100000/bus@28380000/watchdog@40610000";
		msmc_ram = "/bus@100000/sram@70000000";
		scm_conf = "/bus@100000/syscon@100000";
		cpsw0_phy_gmii_sel = "/bus@100000/syscon@100000/phy@4044";
		serdes_ln_ctrl = "/bus@100000/syscon@100000/mux-controller@4080";
		usb_serdes_mux = "/bus@100000/syscon@100000/mux-controller@4000";
		ehrpwm_tbclk = "/bus@100000/syscon@100000/clock-controller@4140";
		main_ehrpwm0 = "/bus@100000/pwm@3000000";
		main_ehrpwm1 = "/bus@100000/pwm@3010000";
		main_ehrpwm2 = "/bus@100000/pwm@3020000";
		main_ehrpwm3 = "/bus@100000/pwm@3030000";
		main_ehrpwm4 = "/bus@100000/pwm@3040000";
		main_ehrpwm5 = "/bus@100000/pwm@3050000";
		gic500 = "/bus@100000/interrupt-controller@1800000";
		gic_its = "/bus@100000/interrupt-controller@1800000/msi-controller@1820000";
		main_gpio_intr = "/bus@100000/interrupt-controller@a00000";
		main_pmx0 = "/bus@100000/pinctrl@11c000";
		main_uart3_pins_default = "/bus@100000/pinctrl@11c000/main-uart3-pins-default";
		main_i2c0_pins_default = "/bus@100000/pinctrl@11c000/main-i2c0-pins-default";
		main_i2c1_pins_default = "/bus@100000/pinctrl@11c000/main-i2c1-pins-default";
		main_i2c2_pins_default = "/bus@100000/pinctrl@11c000/main-i2c2-pins-default";
		main_mmc1_pins_default = "/bus@100000/pinctrl@11c000/main-mmc1-pins-default";
		main_usbss0_pins_default = "/bus@100000/pinctrl@11c000/main-usbss0-pins-default";
		main_sfp0_pins_default = "/bus@100000/pinctrl@11c000/main-sfp0-pins-default";
		main_sfp1_pins_default = "/bus@100000/pinctrl@11c000/main-sfp1-pins-default";
		rtc_int_soc_pins_default = "/bus@100000/pinctrl@11c000/rtc-int-pins-default";
		ec_soc_int_pins_default = "/bus@100000/pinctrl@11c000/ec-soc-int-pins-default";
		main_spi0_pins_default = "/bus@100000/pinctrl@11c000/main-spi0-pins-default";
		main_spi2_pins_default = "/bus@100000/pinctrl@11c000/main-spi2-pins-default";
		pcie0_perst = "/bus@100000/pinctrl@11c000/pcie0-perst";
		main_crypto = "/bus@100000/crypto@4e00000";
		rng = "/bus@100000/crypto@4e00000/rng@4e10000";
		main_uart0 = "/bus@100000/serial@2800000";
		main_uart3 = "/bus@100000/serial@2830000";
		gpu = "/bus@100000/gpu@4e20000000";
		main_gpio0 = "/bus@100000/gpio@600000";
		main_gpio2 = "/bus@100000/gpio@610000";
		main_gpio4 = "/bus@100000/gpio@620000";
		main_gpio6 = "/bus@100000/gpio@630000";
		usbss0 = "/bus@100000/cdns-usb@4104000";
		usb0 = "/bus@100000/cdns-usb@4104000/usb@6000000";
		main_i2c0 = "/bus@100000/i2c@2000000";
		clock_ref25m = "/bus@100000/i2c@2000000/ecs-250";
		main_i2c1 = "/bus@100000/i2c@2010000";
		main_i2c2 = "/bus@100000/i2c@2020000";
		main_i2c3 = "/bus@100000/i2c@2030000";
		main_i2c4 = "/bus@100000/i2c@2040000";
		main_i2c5 = "/bus@100000/i2c@2050000";
		main_i2c6 = "/bus@100000/i2c@2060000";
		main_sdhci1 = "/bus@100000/mmc@4fb0000";
		serdes_wiz0 = "/bus@100000/wiz@5060000";
		serdes0 = "/bus@100000/wiz@5060000/serdes@5060000";
		serdes0_pcie_link = "/bus@100000/wiz@5060000/serdes@5060000/phy@0";
		serdes0_usb_link = "/bus@100000/wiz@5060000/serdes@5060000/phy@3";
		serdes_wiz1 = "/bus@100000/wiz@5070000";
		serdes1 = "/bus@100000/wiz@5070000/serdes@5070000";
		serdes1_pcie_link = "/bus@100000/wiz@5070000/serdes@5070000/phy@0";
		serdes_wiz2 = "/bus@100000/wiz@5020000";
		serdes2 = "/bus@100000/wiz@5020000/serdes@5020000";
		main_navss = "/bus@100000/bus@30000000";
		main_navss_sram = "/bus@100000/bus@30000000/navss-sram@30000000";
		main_navss_intr = "/bus@100000/bus@30000000/interrupt-controller@310e0000";
		main_udmass_inta = "/bus@100000/bus@30000000/msi-controller@33d00000";
		secure_proxy_main = "/bus@100000/bus@30000000/mailbox@32c00000";
		hwspinlock = "/bus@100000/bus@30000000/hwlock@30e00000";
		mailbox0_cluster0 = "/bus@100000/bus@30000000/mailbox@31f80000";
		mbox_mcu_r5fss0_core0 = "/bus@100000/bus@30000000/mailbox@31f80000/mbox-mcu-r5fss0-core0";
		mbox_mcu_r5fss0_core1 = "/bus@100000/bus@30000000/mailbox@31f80000/mbox-mcu-r5fss0-core1";
		mailbox0_cluster1 = "/bus@100000/bus@30000000/mailbox@31f81000";
		mbox_main_r5fss0_core0 = "/bus@100000/bus@30000000/mailbox@31f81000/mbox-main-r5fss0-core0";
		mbox_main_r5fss0_core1 = "/bus@100000/bus@30000000/mailbox@31f81000/mbox-main-r5fss0-core1";
		mailbox0_cluster2 = "/bus@100000/bus@30000000/mailbox@31f82000";
		mbox_main_r5fss1_core0 = "/bus@100000/bus@30000000/mailbox@31f82000/mbox-main-r5fss1-core0";
		mbox_main_r5fss1_core1 = "/bus@100000/bus@30000000/mailbox@31f82000/mbox-main-r5fss1-core1";
		mailbox0_cluster3 = "/bus@100000/bus@30000000/mailbox@31f83000";
		mbox_main_r5fss2_core0 = "/bus@100000/bus@30000000/mailbox@31f83000/mbox-main-r5fss2-core0";
		mbox_main_r5fss2_core1 = "/bus@100000/bus@30000000/mailbox@31f83000/mbox-main-r5fss2-core1";
		mailbox0_cluster4 = "/bus@100000/bus@30000000/mailbox@31f84000";
		mbox_c71_0 = "/bus@100000/bus@30000000/mailbox@31f84000/mbox-c71-0";
		mbox_c71_1 = "/bus@100000/bus@30000000/mailbox@31f84000/mbox-c71-1";
		mailbox0_cluster5 = "/bus@100000/bus@30000000/mailbox@31f85000";
		mbox_c71_2 = "/bus@100000/bus@30000000/mailbox@31f85000/mbox-c71-2";
		mbox_c71_3 = "/bus@100000/bus@30000000/mailbox@31f85000/mbox-c71-3";
		mailbox0_cluster6 = "/bus@100000/bus@30000000/mailbox@31f86000";
		mailbox0_cluster7 = "/bus@100000/bus@30000000/mailbox@31f87000";
		mailbox0_cluster8 = "/bus@100000/bus@30000000/mailbox@31f88000";
		mailbox0_cluster9 = "/bus@100000/bus@30000000/mailbox@31f89000";
		mailbox0_cluster10 = "/bus@100000/bus@30000000/mailbox@31f8a000";
		mailbox0_cluster11 = "/bus@100000/bus@30000000/mailbox@31f8b000";
		mailbox1_cluster0 = "/bus@100000/bus@30000000/mailbox@31f90000";
		mailbox1_cluster1 = "/bus@100000/bus@30000000/mailbox@31f91000";
		mailbox1_cluster2 = "/bus@100000/bus@30000000/mailbox@31f92000";
		mailbox1_cluster3 = "/bus@100000/bus@30000000/mailbox@31f93000";
		mailbox1_cluster4 = "/bus@100000/bus@30000000/mailbox@31f94000";
		mailbox1_cluster5 = "/bus@100000/bus@30000000/mailbox@31f95000";
		mailbox1_cluster6 = "/bus@100000/bus@30000000/mailbox@31f96000";
		mailbox1_cluster7 = "/bus@100000/bus@30000000/mailbox@31f97000";
		mailbox1_cluster8 = "/bus@100000/bus@30000000/mailbox@31f98000";
		mailbox1_cluster9 = "/bus@100000/bus@30000000/mailbox@31f99000";
		mailbox1_cluster10 = "/bus@100000/bus@30000000/mailbox@31f9a000";
		mailbox1_cluster11 = "/bus@100000/bus@30000000/mailbox@31f9b000";
		main_ringacc = "/bus@100000/bus@30000000/ringacc@3c000000";
		main_udmap = "/bus@100000/bus@30000000/dma-controller@31150000";
		main_bcdma_csi = "/bus@100000/bus@30000000/dma-controller@311a0000";
		main_cpsw0 = "/bus@100000/ethernet@c000000";
		main_cpsw0_port1 = "/bus@100000/ethernet@c000000/ethernet-ports/port@1";
		main_cpsw0_port2 = "/bus@100000/ethernet@c000000/ethernet-ports/port@2";
		main_cpsw0_port3 = "/bus@100000/ethernet@c000000/ethernet-ports/port@3";
		main_cpsw0_port4 = "/bus@100000/ethernet@c000000/ethernet-ports/port@4";
		main_cpsw0_port5 = "/bus@100000/ethernet@c000000/ethernet-ports/port@5";
		main_cpsw0_port6 = "/bus@100000/ethernet@c000000/ethernet-ports/port@6";
		main_cpsw0_port7 = "/bus@100000/ethernet@c000000/ethernet-ports/port@7";
		main_cpsw0_port8 = "/bus@100000/ethernet@c000000/ethernet-ports/port@8";
		main_cpsw0_mdio = "/bus@100000/ethernet@c000000/mdio@f00";
		pcie0_rc = "/bus@100000/pcie@2900000";
		pcie0_intc = "/bus@100000/pcie@2900000/interrupt-controller";
		pcie1_rc = "/bus@100000/pcie@2910000";
		pcie1_intc = "/bus@100000/pcie@2910000/interrupt-controller";
		main_spi0 = "/bus@100000/spi@2100000";
		main_spi1 = "/bus@100000/spi@2110000";
		main_spi2 = "/bus@100000/spi@2120000";
		main_spi3 = "/bus@100000/spi@2130000";
		main_spi4 = "/bus@100000/spi@2140000";
		main_spi5 = "/bus@100000/spi@2150000";
		main_spi6 = "/bus@100000/spi@2160000";
		main_spi7 = "/bus@100000/spi@2170000";
		timesync_router = "/bus@100000/pinctrl@a40000";
		mcu_cpsw_cpts = "/bus@100000/pinctrl@a40000/mcu-cpsw-cpts";
		main_r5fss0 = "/bus@100000/r5fss@5c00000";
		main_r5fss0_core0 = "/bus@100000/r5fss@5c00000/r5f@5c00000";
		main_r5fss0_core1 = "/bus@100000/r5fss@5c00000/r5f@5d00000";
		main_r5fss1 = "/bus@100000/r5fss@5e00000";
		main_r5fss1_core0 = "/bus@100000/r5fss@5e00000/r5f@5e00000";
		main_r5fss1_core1 = "/bus@100000/r5fss@5e00000/r5f@5f00000";
		main_r5fss2 = "/bus@100000/r5fss@5900000";
		main_r5fss2_core0 = "/bus@100000/r5fss@5900000/r5f@5900000";
		main_r5fss2_core1 = "/bus@100000/r5fss@5900000/r5f@5a00000";
		c71_0 = "/bus@100000/dsp@64800000";
		c71_1 = "/bus@100000/dsp@65800000";
		c71_2 = "/bus@100000/dsp@66800000";
		c71_3 = "/bus@100000/dsp@67800000";
		main_esm = "/bus@100000/esm@700000";
		watchdog0 = "/bus@100000/watchdog@2200000";
		watchdog1 = "/bus@100000/watchdog@2210000";
		watchdog2 = "/bus@100000/watchdog@2220000";
		watchdog3 = "/bus@100000/watchdog@2230000";
		watchdog4 = "/bus@100000/watchdog@2240000";
		watchdog5 = "/bus@100000/watchdog@2250000";
		watchdog6 = "/bus@100000/watchdog@2260000";
		watchdog7 = "/bus@100000/watchdog@2270000";
		watchdog8 = "/bus@100000/watchdog@22f0000";
		watchdog9 = "/bus@100000/watchdog@2300000";
		watchdog10 = "/bus@100000/watchdog@2310000";
		watchdog11 = "/bus@100000/watchdog@2320000";
		watchdog12 = "/bus@100000/watchdog@2330000";
		watchdog13 = "/bus@100000/watchdog@23c0000";
		watchdog14 = "/bus@100000/watchdog@23d0000";
		watchdog15 = "/bus@100000/watchdog@23e0000";
		watchdog16 = "/bus@100000/watchdog@23f0000";
		watchdog17 = "/bus@100000/watchdog@2540000";
		watchdog18 = "/bus@100000/watchdog@2550000";
		thermal_zones = "/thermal-zones";
		wkup0_thermal = "/thermal-zones/wkup0-thermal";
		wkup0_crit = "/thermal-zones/wkup0-thermal/trips/wkup0-crit";
		wkup1_thermal = "/thermal-zones/wkup1-thermal";
		wkup1_crit = "/thermal-zones/wkup1-thermal/trips/wkup1-crit";
		main0_thermal = "/thermal-zones/main0-thermal";
		main0_crit = "/thermal-zones/main0-thermal/trips/main0-crit";
		main1_thermal = "/thermal-zones/main1-thermal";
		main1_crit = "/thermal-zones/main1-thermal/trips/main1-crit";
		main2_thermal = "/thermal-zones/main2-thermal";
		main2_crit = "/thermal-zones/main2-thermal/trips/main2-crit";
		main3_thermal = "/thermal-zones/main3-thermal";
		main3_crit = "/thermal-zones/main3-thermal/trips/main3-crit";
		main4_thermal = "/thermal-zones/main4-thermal";
		main4_crit = "/thermal-zones/main4-thermal/trips/main4-crit";
		serdes_refclk = "/serdes-refclk";
		reserved_memory = "/reserved-memory";
		secure_ddr = "/reserved-memory/optee@9e800000";
		fpga_bulk0 = "/reserved-memory/bulk0@a0000000";
		fpga_bulk1 = "/reserved-memory/bulk1@b0000000";
		main_r5fss0_core0_dma_memory_region = "/reserved-memory/r5f-dma-memory@a2000000";
		main_r5fss0_core0_memory_region = "/reserved-memory/r5f-memory@a2100000";
		main_r5fss0_core1_dma_memory_region = "/reserved-memory/r5f-dma-memory@a3000000";
		main_r5fss0_core1_memory_region = "/reserved-memory/r5f-memory@a3100000";
		main_r5fss1_core0_dma_memory_region = "/reserved-memory/r5f-dma-memory@a4000000";
		main_r5fss1_core0_memory_region = "/reserved-memory/r5f-memory@a4100000";
		main_r5fss1_core1_dma_memory_region = "/reserved-memory/r5f-dma-memory@a5000000";
		main_r5fss1_core1_memory_region = "/reserved-memory/r5f-memory@a5100000";
		main_r5fss2_core0_dma_memory_region = "/reserved-memory/r5f-dma-memory@a6000000";
		main_r5fss2_core0_memory_region = "/reserved-memory/r5f-memory@a6100000";
		main_r5fss2_core1_dma_memory_region = "/reserved-memory/r5f-dma-memory@a7000000";
		main_r5fss2_core1_memory_region = "/reserved-memory/r5f-memory@a7100000";
		c71_0_dma_memory_region = "/reserved-memory/c71-dma-memory@a8000000";
		c71_0_memory_region = "/reserved-memory/c71-memory@a8100000";
		c71_1_dma_memory_region = "/reserved-memory/c71-dma-memory@a9000000";
		c71_1_memory_region = "/reserved-memory/c71-memory@a9100000";
		c71_2_dma_memory_region = "/reserved-memory/c71-dma-memory@aa000000";
		c71_2_memory_region = "/reserved-memory/c71-memory@aa100000";
		c71_3_dma_memory_region = "/reserved-memory/c71-dma-memory@ab000000";
		c71_3_memory_region = "/reserved-memory/c71-memory@ab100000";
		evm_12v0 = "/regulator-evm12v0";
		vsys_3v3 = "/regulator-vsys3v3";
		vsys_5v0 = "/regulator-vsys5v0";
		vdd_mmc1 = "/regulator-sd";
		vdd_sd_dv = "/regulator-sd-dv";
		sfp_eth0 = "/sfp-eth0";
		sfp_eth1 = "/sfp-eth1";
	};
};