// SPDX-License-Identifier: GPL-2.0 /* * APTIV OSPAS kernel device-tree based on EVM TDA4 board * EVM Board Schematics: https://www.ti.com/lit/zip/sprr458 */ /dts-v1/; #include #include #include "k3-j784s4.dtsi" / { compatible = "ti,j784s4-evm", "ti,j784s4"; model = "Aptiv OSPAS-120 TDA4VP"; chosen { stdout-path = "serial2:115200n8"; }; aliases { serial0 = &main_uart0; serial2 = &main_uart4; mmc0 = &main_sdhci0; }; memory@80000000 { device_type = "memory"; /* 24GB RAM OSPAS */ reg = <0x00 0x80000000 0x00 0x80000000>, <0x08 0x80000000 0x02 0x80000000>; }; reserved_memory: reserved-memory { #address-cells = <2>; #size-cells = <2>; ranges; /* global cma region */ linux,cma { compatible = "shared-dma-pool"; reusable; size = <0x00 0x70000000>; linux,cma-default; }; secure_ddr: optee@9e800000 { reg = <0x00 0x9e800000 0x00 0x01800000>; no-map; }; mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa0000000 0x00 0x100000>; no-map; }; mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa0100000 0x00 0xf00000>; no-map; }; mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa1000000 0x00 0x100000>; no-map; }; mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa1100000 0x00 0xf00000>; no-map; }; apps-shared-memory-uds-request { compatible = "dma-heap-carveout"; reg = <0x00 0xC0000000 0x00 0x1000>; no-map; }; apps-shared-memory-uds-response { compatible = "dma-heap-carveout"; reg = <0x00 0xC0001000 0x00 0x1000>; no-map; }; apps-shared-memory-uds-request-mcu3_0 { compatible = "dma-heap-carveout"; reg = <0x00 0xC0002000 0x00 0x1000>; no-map; }; apps-shared-memory-uds-response-mcu3_0 { compatible = "dma-heap-carveout"; reg = <0x00 0xC0003000 0x00 0x1000>; no-map; }; apps-shared-memory-uds-request-mcu3_1 { compatible = "dma-heap-carveout"; reg = <0x00 0xC0004000 0x00 0x1000>; no-map; }; apps-shared-memory-uds-response-mcu3_1 { compatible = "dma-heap-carveout"; reg = <0x00 0xC0005000 0x00 0x1000>; no-map; }; apps-shared-memory-uds-request-mcu4_0 { compatible = "dma-heap-carveout"; reg = <0x00 0xC0006000 0x00 0x1000>; no-map; }; apps-shared-memory-uds-response-mcu4_0 { compatible = "dma-heap-carveout"; reg = <0x00 0xC0007000 0x00 0x1000>; no-map; }; apps-shared-memory-uds-request-mcu4_1 { compatible = "dma-heap-carveout"; reg = <0x00 0xC0008000 0x00 0x1000>; no-map; }; apps-shared-memory-uds-response-mcu4_1 { compatible = "dma-heap-carveout"; reg = <0x00 0xC0009000 0x00 0x1000>; no-map; }; main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a2000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa2000000 0x00 0x100000>; no-map; }; main_r5fss0_core0_memory_region: r5f-memory@a2100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa2100000 0x00 0xf00000>; no-map; }; main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a3000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa3000000 0x00 0x100000>; no-map; }; main_r5fss0_core1_memory_region: r5f-memory@a3100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa3100000 0x00 0xf00000>; no-map; }; main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a4000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa4000000 0x00 0x100000>; no-map; }; main_r5fss1_core0_memory_region: r5f-memory@a4100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa4100000 0x00 0xf00000>; no-map; }; main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a5000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa5000000 0x00 0x100000>; no-map; }; main_r5fss1_core1_memory_region: r5f-memory@a5100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa5100000 0x00 0xf00000>; no-map; }; main_r5fss2_core0_dma_memory_region: r5f-dma-memory@a6000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa6000000 0x00 0x100000>; no-map; }; main_r5fss2_core0_memory_region: r5f-memory@a6100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa6100000 0x00 0xf00000>; no-map; }; main_r5fss2_core1_dma_memory_region: r5f-dma-memory@a7000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa7000000 0x00 0x100000>; no-map; }; main_r5fss2_core1_memory_region: r5f-memory@a7100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa7100000 0x00 0xf00000>; no-map; }; c71_0_dma_memory_region: c71-dma-memory@a8000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa8000000 0x00 0x100000>; no-map; }; c71_0_memory_region: c71-memory@a8100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa8100000 0x00 0xf00000>; no-map; }; c71_1_dma_memory_region: c71-dma-memory@a9000000 { compatible = "shared-dma-pool"; reg = <0x00 0xa9000000 0x00 0x100000>; no-map; }; c71_1_memory_region: c71-memory@a9100000 { compatible = "shared-dma-pool"; reg = <0x00 0xa9100000 0x00 0xf00000>; no-map; }; c71_2_dma_memory_region: c71-dma-memory@aa000000 { compatible = "shared-dma-pool"; reg = <0x00 0xaa000000 0x00 0x100000>; no-map; }; c71_2_memory_region: c71-memory@aa100000 { compatible = "shared-dma-pool"; reg = <0x00 0xaa100000 0x00 0xf00000>; no-map; }; c71_3_dma_memory_region: c71-dma-memory@ab000000 { compatible = "shared-dma-pool"; reg = <0x00 0xab000000 0x00 0x100000>; no-map; }; c71_3_memory_region: c71-memory@ab100000 { compatible = "shared-dma-pool"; reg = <0x00 0xab100000 0x00 0xf00000>; no-map; }; }; evm_12v0: regulator-evm12v0 { /* main supply */ compatible = "regulator-fixed"; regulator-name = "evm_12v0"; regulator-min-microvolt = <12000000>; regulator-max-microvolt = <12000000>; regulator-always-on; regulator-boot-on; }; vsys_3v3: regulator-vsys3v3 { /* Output of LM5140 */ compatible = "regulator-fixed"; regulator-name = "vsys_3v3"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; vin-supply = <&evm_12v0>; regulator-always-on; regulator-boot-on; }; vsys_5v0: regulator-vsys5v0 { /* Output of LM5140 */ compatible = "regulator-fixed"; regulator-name = "vsys_5v0"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; vin-supply = <&evm_12v0>; regulator-always-on; regulator-boot-on; }; dp0_pwr_3v3: regulator-dp0-prw { compatible = "regulator-fixed"; regulator-name = "dp0-pwr"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; }; dp0: dp0-connector { compatible = "dp-connector"; label = "DP0"; type = "full-size"; dp-pwr-supply = <&dp0_pwr_3v3>; port { dp0_connector_in: endpoint { remote-endpoint = <&dp0_out>; }; }; }; vsys_io_1v8: regulator-vsys-io-1v8 { compatible = "regulator-fixed"; regulator-name = "vsys_io_1v8"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; regulator-boot-on; }; vsys_io_1v2: regulator-vsys-io-1v2 { compatible = "regulator-fixed"; regulator-name = "vsys_io_1v2"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; regulator-always-on; regulator-boot-on; }; edp1_refclk: clock-edp1-refclk { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <19200000>; }; dp1_pwr_3v3: regulator-dp1-prw { compatible = "regulator-fixed"; regulator-name = "dp1-pwr"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-always-on; }; }; &wkup_pmx1 { pmic_irq_pins_default: pmic-irq-pins-default { pinctrl-single,pins = < J784S4_WKUP_IOPAD(0x028, PIN_INPUT, 7) /* (G33) MCU_OSPI1_CSn1.WKUP_GPIO0_39 */ /* C0 - ~LEO_INT */ >; }; }; &wkup_pmx2 { status = "okay"; wkup_gpio_ospas_pins_default: wkup_gpio_ospas-default-pins { pinctrl-single,pins = < J784S4_WKUP_IOPAD(0x068, PIN_OUTPUT, 7) /* (H35) WKUP_GPIO0_4 */ /* C0 - PC_HSD_SEL */ J784S4_WKUP_IOPAD(0x06c, PIN_OUTPUT, 7) /* (K36) WKUP_GPIO0_5 */ /* C0 - PC_HSD_IN1 */ J784S4_WKUP_IOPAD(0x070, PIN_OUTPUT, 7) /* (L37) WKUP_GPIO0_6 */ /* C0 - PC_HSD_IN2 */ J784S4_WKUP_IOPAD(0x074, PIN_OUTPUT, 7) /* (L36) WKUP_GPIO0_7 */ /* C0 - PC_HSD_IN3 */ J784S4_WKUP_IOPAD(0x080, PIN_OUTPUT, 7) /* (L33) WKUP_GPIO0_10 */ /* C0 - PC_HSD_DIAG_EN */ J784S4_WKUP_IOPAD(0x084, PIN_OUTPUT, 7) /* (M38) WKUP_GPIO0_11 */ /* C0 - PC_HSD_THER */ J784S4_WKUP_IOPAD(0x088, PIN_INPUT, 7) /* (J37) WKUP_GPIO0_12 */ /* C0 - ~PC_HSD_FAULT */ J784S4_WKUP_IOPAD(0x08c, PIN_INPUT, 7) /* (K38) WKUP_GPIO0_13 */ /* C0 - MCU_BOOTMODE08 */ J784S4_WKUP_IOPAD(0x090, PIN_INPUT, 7) /* (H37) WKUP_GPIO0_14 */ /* C0 - MCU_BOOTMODE09 */ J784S4_WKUP_IOPAD(0x094, PIN_INPUT, 7) /* (K37) WKUP_GPIO0_15 */ /* C0 - MCU_BOOTMODE06 */ J784S4_WKUP_IOPAD(0x0b8, PIN_INPUT, 7) /* (M37) WKUP_GPIO0_56 */ /* C0 - BOOTMODE04 */ J784S4_WKUP_IOPAD(0x114, PIN_INPUT, 7) /* (M36) WKUP_GPIO0_57 */ /* C0 - BOOTMODE05 */ J784S4_WKUP_IOPAD(0x048, PIN_INPUT, 7) /* (K35) WKUP_UART0_RXD.WKUP_GPIO0_58 */ /* C0 - NOR_OSPI_ERR */ J784S4_WKUP_IOPAD(0x04c, PIN_INPUT, 7) /* (K34) WKUP_UART0_TXD.WKUP_GPIO0_59 */ /* C0 - SC_RESET_OUT */ J784S4_WKUP_IOPAD(0x050, PIN_OUTPUT, 7) /* (K33) MCU_MCAN0_TX.WKUP_GPIO0_60 */ /* C0 - SC_WDI */ J784S4_WKUP_IOPAD(0x054, PIN_INPUT_PULLDOWN, 7) /* (F38) MCU_MCAN0_RX.WKUP_GPIO0_61 */ /* C0 - SC_WDO */ J784S4_WKUP_IOPAD(0x118, PIN_INPUT, 7) /* (N34) WKUP_GPIO0_66 */ /* C0 - BOOTMODE06 */ J784S4_WKUP_IOPAD(0x11c, PIN_OUTPUT, 7) /* (M34) WKUP_GPIO0_67 */ /* C0 - SC_RESET_IN */ /* Power Control Lines */ J784S4_WKUP_IOPAD(0x000, PIN_INPUT, 7) /* (C38) MCU_RGMII1_TX_CTL.WKUP_GPIO0_40 */ /* C0 - SERDES_PG_1V8 */ J784S4_WKUP_IOPAD(0x004, PIN_OUTPUT, 7) /* (C37) MCU_RGMII1_RX_CTL.WKUP_GPIO0_41 */ /* C0 - POCSW_TDA4_FVC_EN */ J784S4_WKUP_IOPAD(0x008, PIN_INPUT, 7) /* (E38) MCU_RGMII1_TD3.WKUP_GPIO0_42 */ /* C0 - SERDES_PG_1V2 */ J784S4_WKUP_IOPAD(0x00c, PIN_OUTPUT, 7) /* (E37) MCU_RGMII1_TD2.WKUP_GPIO0_43 */ /* C0 - SERDES_EN_1V8 */ J784S4_WKUP_IOPAD(0x010, PIN_OUTPUT, 7) /* (D38) MCU_RGMII1_TD1.WKUP_GPIO0_44 */ /* C0 - SERDES_EN_1V2 */ J784S4_WKUP_IOPAD(0x014, PIN_INPUT, 7) /* (D37) MCU_RGMII1_TD0.WKUP_GPIO0_45 */ /* C0 - SERDES_POC_CC */ J784S4_WKUP_IOPAD(0x018, PIN_OUTPUT, 7) /* (E36) MCU_RGMII1_TXC.WKUP_GPIO0_46 */ /* C0 - EN_IR_LED */ J784S4_WKUP_IOPAD(0x01c, PIN_INPUT, 7) /* (B37) MCU_RGMII1_RXC.WKUP_GPIO0_47 */ /* C0 - SERDES_POC_PG */ J784S4_WKUP_IOPAD(0x020, PIN_OUTPUT, 7) /* (D36) MCU_RGMII1_RD3.WKUP_GPIO0_48 */ /* C0 - POCSW_TDA4_SV_1_EN */ J784S4_WKUP_IOPAD(0x028, PIN_INPUT, 7) /* (B36) MCU_RGMII1_RD1.WKUP_GPIO0_50 */ /* C0 - POCSW_TDA4_SV_FAULT */ J784S4_WKUP_IOPAD(0x02c, PIN_OUTPUT, 7) /* (A35) MCU_RGMII1_RD0.WKUP_GPIO0_51 */ /* C0 - EN_SERDES_POC */ J784S4_WKUP_IOPAD(0x030, PIN_OUTPUT, 7) /* (B35) MCU_MDIO0_MDIO.WKUP_GPIO0_52 */ /* C0 - POCSW_TDA4_SV_3_EN */ J784S4_WKUP_IOPAD(0x034, PIN_OUTPUT, 7) /* (A36) MCU_MDIO0_MDC.WKUP_GPIO0_53 */ /* C0 - POCSW_TDA4_SV_4_EN */ J784S4_WKUP_IOPAD(0x024, PIN_OUTPUT, 7) /* (C36) MCU_RGMII1_RD2.WKUP_GPIO0_62 */ /* C0 - POCSW_TDA4_SV_2_EN */ >; }; wkup_i2c0_pins_default: wkup-i2c0-pins-default { pinctrl-single,pins = < J784S4_WKUP_IOPAD(0x098, PIN_INPUT, 0) /* (N33) WKUP_I2C0_SCL */ /* C0 - I2C0_TDA4_WKUP_PS_SCL */ J784S4_WKUP_IOPAD(0x09C, PIN_INPUT, 0) /* (N35) WKUP_I2C0_SDA */ /* C0 - I2C0_TDA4_WKUP_PS_SDA */ >; }; mcu_i2c1_pins_default: wkup-i2c1-pins-default { pinctrl-single,pins = < J784S4_WKUP_IOPAD(0x078, PIN_INPUT, 0) /* (L35) WKUP_GPIO0_8.MCU_I2C1_SCL */ /* C0 - TDA4_POCSW_I2C_SCL */ J784S4_WKUP_IOPAD(0x07c, PIN_INPUT, 0) /* (L34) WKUP_GPIO0_9.MCU_I2C1_SDA */ /* C0 - TDA4_POCSW_I2C_SDA */ >; }; mcu_i2c0_pins_default: mcu_i2c0-default-pins { pinctrl-single,pins = < J784S4_WKUP_IOPAD(0x0a0, PIN_INPUT, 0) /* (M35) MCU_I2C0_SCL */ /* C0 - TDA4_I2C_MCU_PMIC_SCL */ J784S4_WKUP_IOPAD(0x0a4, PIN_INPUT, 0) /* (G34) MCU_I2C0_SDA */ /* C0 - TDA4_I2C_MCU_PMIC_SDA */ >; }; mcu_adc0_pins_default: mcu-adc0-pins-default { pinctrl-single,pins = < J784S4_WKUP_IOPAD(0x0cc, PIN_INPUT, 0) /* (P36) MCU_ADC0_AIN0 */ /* C0 - GND */ J784S4_WKUP_IOPAD(0x0d0, PIN_INPUT, 0) /* (V36) MCU_ADC0_AIN1 */ /* C0 - GND */ J784S4_WKUP_IOPAD(0x0d4, PIN_INPUT, 0) /* (T34) MCU_ADC0_AIN2 */ /* C0 - 1V8_DES_MON */ J784S4_WKUP_IOPAD(0x0d8, PIN_INPUT, 0) /* (T36) MCU_ADC0_AIN3 */ /* C0 - 1V2_DES_MON */ J784S4_WKUP_IOPAD(0x0dc, PIN_INPUT, 0) /* (P34) MCU_ADC0_AIN4 */ /* C0 - POCSW_TDA4_FVC_SENSE */ J784S4_WKUP_IOPAD(0x0e0, PIN_INPUT, 0) /* (R37) MCU_ADC0_AIN5 */ /* C0 - POCSW_TDA4_DMS_SENSE */ J784S4_WKUP_IOPAD(0x0e4, PIN_INPUT, 0) /* (R33) MCU_ADC0_AIN6 */ /* C0 - POCSW_TDA4_SV_SENSE */ J784S4_WKUP_IOPAD(0x0e8, PIN_INPUT, 0) /* (V38) MCU_ADC0_AIN7 */ /* C0 - VDA_MCU_1V8 */ >; }; mcu_adc1_pins_default: mcu-adc1-pins-default { pinctrl-single,pins = < J784S4_WKUP_IOPAD(0x0ec, PIN_INPUT, 0) /* (Y38) MCU_ADC1_AIN0 */ /* C0 - PC_HSD_CS12 */ J784S4_WKUP_IOPAD(0x0f0, PIN_INPUT, 0) /* (Y34) MCU_ADC1_AIN1 */ /* C0 - PC_HSD_CS3 */ J784S4_WKUP_IOPAD(0x0f4, PIN_INPUT, 0) /* (V34) MCU_ADC1_AIN2 */ /* C0 - EMMC_NTC */ J784S4_WKUP_IOPAD(0x0f8, PIN_INPUT, 0) /* (W37) MCU_ADC1_AIN3 */ /* C0 - SERDES_NTC */ J784S4_WKUP_IOPAD(0x0fc, PIN_INPUT, 0) /* (AA37) MCU_ADC1_AIN4 */ /* C0 - AI_IR_LED_CURRENT */ J784S4_WKUP_IOPAD(0x100, PIN_INPUT, 0) /* (W33) MCU_ADC1_AIN5 */ /* C0 - AI_TDA4_POC_PWR_SV */ J784S4_WKUP_IOPAD(0x104, PIN_INPUT, 0) /* (U33) MCU_ADC1_AIN6 */ /* C0 - AI_TDA4_5V0_PRE */ J784S4_WKUP_IOPAD(0x108, PIN_INPUT, 0) /* (Y36) MCU_ADC1_AIN7 */ /* C0 - GND */ >; }; }; &wkup_gpio0 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&wkup_gpio_ospas_pins_default>; }; &wkup_gpio_intr { status = "okay"; }; &wkup_i2c0 { status = "disabled"; pinctrl-names = "default"; pinctrl-0 = <&wkup_i2c0_pins_default>; clock-frequency = <400000>; tps659413: pmic@48 { compatible = "ti,tps6594-q1"; reg = <0x48>; system-power-controller; pinctrl-names = "default"; pinctrl-0 = <&pmic_irq_pins_default>; interrupt-parent = <&wkup_gpio0>; interrupts = <39 IRQ_TYPE_EDGE_FALLING>; ti,primary-pmic; gpio-controller; #gpio-cells = <2>; buck12-supply = <&vsys_3v3>; buck3-supply = <&vsys_3v3>; buck4-supply = <&vsys_3v3>; buck5-supply = <&vsys_3v3>; ldo1-supply = <&vsys_3v3>; ldo2-supply = <&vsys_3v3>; ldo3-supply = <&vsys_3v3>; ldo4-supply = <&vsys_3v3>; regulators { bucka12: buck12 { regulator-name = "vdd_ddr_1v1"; regulator-min-microvolt = <1100000>; regulator-max-microvolt = <1100000>; regulator-boot-on; regulator-always-on; }; bucka3: buck3 { regulator-name = "vdd_ram_0v85"; regulator-min-microvolt = <850000>; regulator-max-microvolt = <850000>; regulator-boot-on; regulator-always-on; }; bucka4: buck4 { regulator-name = "vdd_io_1v8"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-boot-on; regulator-always-on; }; bucka5: buck5 { regulator-name = "vdd_mcu_0v85"; regulator-min-microvolt = <850000>; regulator-max-microvolt = <850000>; regulator-boot-on; regulator-always-on; }; ldoa1: ldo1 { regulator-name = "vdd_mcuio_1v8"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-boot-on; regulator-always-on; }; ldoa2: ldo2 { regulator-name = "vdd_mcuio_3v3"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-boot-on; regulator-always-on; }; ldoa3: ldo3 { regulator-name = "vds_dll_0v8"; regulator-min-microvolt = <800000>; regulator-max-microvolt = <800000>; regulator-boot-on; regulator-always-on; }; ldoa4: ldo4 { regulator-name = "vda_mcu_1v8"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-boot-on; regulator-always-on; }; }; }; }; &mcu_i2c0 { status = "disabled"; pinctrl-names = "default"; pinctrl-0 = <&mcu_i2c0_pins_default>; clock-frequency = <400000>; tps6594_watchdog: dummy-watchdog-disabler@12 { compatible = "ti,tps6594-q1-watchdog"; reg = <0x12>; }; }; &mcu_i2c1 { status = "disabled"; pinctrl-names = "default"; pinctrl-0 = <&mcu_i2c1_pins_default>; clock-frequency = <400000>; }; &main_pmx0 { main_gpios0_ospas_pins_default: main_gpios0_ospas-default-pins { pinctrl-single,pins = < J784S4_IOPAD(0x000, PIN_INPUT, 7) /* (AN35) EXTINTn.GPIO0_0 */ /* C0 - VDD_IO_3V3 */ J784S4_IOPAD(0x004, PIN_OUTPUT, 7) /* (AG36) MCAN12_TX.GPIO0_1 */ /* C0 - TDA4_DES724_EN */ J784S4_IOPAD(0x008, PIN_INPUT, 7) /* (AJ33) MCAN12_RX.GPIO0_2 */ /* C0 - SER717_TDA4_GPIO4 */ J784S4_IOPAD(0x00c, PIN_INPUT, 7) /* (AF33) MCAN13_TX.GPIO0_3 */ /* C0 - ~SER717_TDA4_ERR */ J784S4_IOPAD(0x020, PIN_INPUT, 7) /* (AJ35) MCAN15_RX.GPIO0_8 */ /* C0 - DES724_TDA4_GPIO1 */ J784S4_IOPAD(0x024, PIN_INPUT, 7) /* (AH34) MCAN16_TX.GPIO0_9 */ /* C0 - DES724_TDA4_GPIO2 */ J784S4_IOPAD(0x028, PIN_INPUT, 7) /* (AE33) MCAN16_RX.GPIO0_10 */ /* C0 - DESFVC_TDA4_GPIO7 */ J784S4_IOPAD(0x02c, PIN_OUTPUT, 7) /* (AL32) GPIO0_11 */ /* C0 - TDA4_DESDMS_EN */ J784S4_IOPAD(0x030, PIN_INPUT, 7) /* (AK37) GPIO0_12 */ /* C0 - DESDMS_TDA4_GPIO7 */ J784S4_IOPAD(0x038, PIN_INPUT, 7) /* (AK35) MCASP0_ACLKX.GPIO0_14 */ /* C0 - DES724_TDA4_GPIO3 */ J784S4_IOPAD(0x03c, PIN_INPUT, 7) /* (AK38) MCASP0_AFSX.GPIO0_15 */ /* C0 - DES724_TDA4_GPIO6 */ J784S4_IOPAD(0x040, PIN_OUTPUT, 7) /* (AF37) MCASP0_AXR0.GPIO0_16 */ /* C0 - ~GPIO_EXPANDER_RESET */ J784S4_IOPAD(0x044, PIN_OUTPUT, 7) /* (AG37) MCASP0_AXR1.GPIO0_17 */ /* C0 - TDA4_DESFVC_EN */ J784S4_IOPAD(0x048, PIN_INPUT_PULLUP, 7) /* (AK33) MCASP0_AXR2.GPIO0_18 */ /* C0 - ~GPIO_EXPANDER2_INT */ J784S4_IOPAD(0x054, PIN_INPUT, 7) /* (AD37) MCASP2_ACLKX.GPIO0_21 */ /* C0 - SER717_TDA4_GPI5 */ J784S4_IOPAD(0x058, PIN_INPUT, 7) /* (AE37) MCASP2_AFSX.GPIO0_22 */ /* C0 - SER717_TDA4_GPI6 */ J784S4_IOPAD(0x05c, PIN_OUTPUT, 7) /* (AC36) MCASP2_AXR0.GPIO0_23 */ /* C0 - TDA4_DES717_EN */ J784S4_IOPAD(0x060, PIN_INPUT, 7) /* (AE36) MCASP2_AXR1.GPIO0_24 */ /* C0 - POCSW_TDA4_SV_SEL */ J784S4_IOPAD(0x064, PIN_INPUT, 7) /* (AF38) MCAN0_TX.GPIO0_25 */ /* C0 - ~DES724_TDA4_ERR */ J784S4_IOPAD(0x068, PIN_INPUT, 7) /* (AE38) MCAN0_RX.GPIO0_26 */ /* C0 - ~DES724_TDA4_LOCK */ J784S4_IOPAD(0x06c, PIN_INPUT_PULLDOWN, 7) /* (AJ37) MCAN1_TX.GPIO0_27 */ /* C0 - DESDMS_TDA4_GPIO0 */ J784S4_IOPAD(0x070, PIN_INPUT, 7) /* (AH38) MCAN1_RX.GPIO0_28 */ /* C0 - ~DESDMS_TDA4_ERR */ J784S4_IOPAD(0x074, PIN_INPUT, 7) /* (AC33) MCAN2_TX.GPIO0_29 */ /* C0 - ~DESDMS_TDA4_LOCK */ J784S4_IOPAD(0x078, PIN_INPUT, 7) /* (AH37) MCAN2_RX.GPIO0_30 */ /* C0 - ~DESFVC_TDA4_ERR */ J784S4_IOPAD(0x07c, PIN_INPUT, 7) /* (AJ38) MCASP0_AXR3.GPIO0_31 */ /* C0 - DESFVC_TDA4_LOCK */ J784S4_IOPAD(0x080, PIN_INPUT_PULLDOWN, 7) /* (AK34) MCASP0_AXR4.GPIO0_32 */ /* C0 - SC_ETH_PPS */ J784S4_IOPAD(0x084, PIN_INPUT_PULLUP, 7) /* (AG38) MCASP0_AXR5.GPIO0_33 */ /* C0 - ~PC_USS1_INT */ J784S4_IOPAD(0x088, PIN_INPUT_PULLUP, 7) /* (AF36) MCASP0_AXR6.GPIO0_34 */ /* C0 - ~PC_USS2_INT */ J784S4_IOPAD(0x08c, PIN_INPUT, 7) /* (AE35) MCASP0_AXR7.GPIO0_35 */ /* C0 - ~MAX_IR_FAULT */ J784S4_IOPAD(0x094, PIN_INPUT_PULLDOWN, 7) /* (AG35) MCASP0_AXR9.GPIO0_37 */ /* C0 - DES724_TDA4_GPIO0 */ J784S4_IOPAD(0x098, PIN_INPUT_PULLDOWN, 7) /* (AH36) MCASP0_AXR10.GPIO0_38 */ /* C0 - DESFVC_TDA4_GPIO0 */ J784S4_IOPAD(0x09c, PIN_INPUT_PULLDOWN, 7) /* (AF35) MCASP0_AXR11.GPIO0_39 */ /* C0 - SER717_TDA4_GPIO0 */ /* B0 configuration */ J784S4_IOPAD(0x0b0, PIN_OUTPUT, 7) /* (AL33) MCASP1_AXR3.GPIO0_44 */ /* C0 - IR2_DIS */ J784S4_IOPAD(0x0d0, PIN_OUTPUT, 7) /* (AP38) SPI0_CS1.GPIO0_52 */ /* C0 - IR1_DIS */ J784S4_IOPAD(0x0e8, PIN_INPUT, 0) /* (AR38) TIMER_IO0.ECAP1_IN_APWM_OUT */ /* C0- ECAP */ J784S4_IOPAD(0x0f8, PIN_OUTPUT, 7) /* (AB34) MMC1_DAT1.GPIO0_62 */ /* C0 - POCSW_TDA4_SV_SEH */ J784S4_IOPAD(0x0fc, PIN_OUTPUT, 7) /* (AA33) MMC1_DAT0.GPIO0_63 */ /* C0 - POCSW_TDA4_DMS_EN */ >; }; main_ecap2_pins_default: main-ecap2-default-pins { pinctrl-single,pins = < J784S4_IOPAD(0x0ec, PIN_OUTPUT, 1) /* (AN37) TIMER_IO1.ECAP2_IN_APWM_OUT */ /* C0 - PC_USS_CLK_500K_R_REF_50R */ >; }; main_uart0_pins_default: main-uart0-pins-default { pinctrl-single,pins = < J784S4_IOPAD(0x0bc, PIN_INPUT_PULLUP, 11) /* (AD33) MCASP1_AFSX.UART0_RXD */ /* C0 - SC_TX_PC_RX_UART */ J784S4_IOPAD(0x0c0, PIN_OUTPUT, 11) /* (AD38) MCASP1_AXR0.UART0_TXD */ /* C0 - SC_RX_PC_TX_UART */ >; }; main_uart4_pins_default: main-uart4-pins-default { pinctrl-single,pins = < J784S4_IOPAD(0x0b4, PIN_INPUT_PULLUP, 11) /* (AL34) MCASP1_AXR4.UART4_RXD */ /* C0 - DEBUG_UART_RX */ J784S4_IOPAD(0x090, PIN_OUTPUT, 11) /* (AC35) MCASP0_AXR8.UART4_TXD */ /* C0 - DEBUG_UART_TX */ >; }; main_i2c0_pins_default: main-i2c0-pins-default { pinctrl-single,pins = < J784S4_IOPAD(0x0e0, PIN_INPUT, 0) /* (AN36) I2C0_SCL */ /* C0 - DES724_TDA4_I2CCFG_SCL */ J784S4_IOPAD(0x0e4, PIN_INPUT, 0) /* (AP37) I2C0_SDA */ /* C0 - DES724_TDA4_I2CCFG_SDA */ >; }; main_i2c1_pins_default: main-i2c1-pins-default { pinctrl-single,pins = < J784S4_IOPAD(0x0c4, PIN_INPUT, 13) /* (AD36) ECAP0_IN_APWM_OUT.I2C1_SCL */ /* C0 - SER717_TDA4_I2CPT_SCL */ J784S4_IOPAD(0x0c8, PIN_INPUT, 13) /* (AJ32) EXT_REFCLK1.I2C1_SDA */ /* C0 - SER717_TDA4_I2CPT_SDA */ >; }; main_i2c2_pins_default: main-i2c2-pins-default { pinctrl-single,pins = < J784S4_IOPAD(0x04c, PIN_INPUT, 13) /* (AC32) MCASP1_AXR1.I2C2_SCL */ /* C0 - SER717_TDA4_R_I2CCFG_FM_SCL */ J784S4_IOPAD(0x050, PIN_INPUT, 13) /* (AC37) MCASP1_AXR2.I2C2_SDA */ /* C0 - SER717_TDA4_I2CCFG_SDA */ >; }; main_i2c3_pins_default: main-i2c3-pins-default { pinctrl-single,pins = < J784S4_IOPAD(0x0f0, PIN_INPUT, 10) /* (AC38) MMC1_DAT3.I2C3_SCL */ /* C0 - DES716_TDA4_I2CPT_SCL, I2C_CSIDBG_SCL */ J784S4_IOPAD(0x0f4, PIN_INPUT, 10) /* (AA32) MMC1_DAT2.I2C3_SDA */ /* C0 - DESFVC_TDA4_I2CCFG_SDA, I2C_CSIDBG_SDA */ >; }; main_i2c4_pins_default: main-i2c4-pins-default { pinctrl-single,pins = < J784S4_IOPAD(0x014, PIN_INPUT, 8) /* (AG33) MCAN14_TX.I2C4_SCL */ /* C0 - GPIO_EXP_I2C_SCL */ J784S4_IOPAD(0x010, PIN_INPUT, 8) /* (AH33) MCAN13_RX.I2C4_SDA */ /* C0 - GPIO_EXP_I2C_SDA */ >; }; main_i2c5_pins_default: main-i2c5-pins-default { pinctrl-single,pins = < J784S4_IOPAD(0x01c, PIN_INPUT, 8) /* (AG34) MCAN15_TX.I2C5_SCL */ /* C0 - DESDMS_I2CCFG_SCL */ J784S4_IOPAD(0x018, PIN_INPUT, 8) /* (AK36) MCAN14_RX.I2C5_SDA */ /* C0 - DESDMS_I2CCFG_SDA */ >; }; main_i2c6_pins_default: main-i2c6-pins-default { pinctrl-single,pins = < J784S4_IOPAD(0x108, PIN_INPUT, 10) /* (AB36) MMC1_CMD.I2C6_SCL */ /* C0 - DES724_TDA4_I2CPT_SCL */ J784S4_IOPAD(0x104, PIN_INPUT, 10) /* (AB38) MMC1_CLK.I2C6_SDA */ /* C0 - DES724_TDA4_I2CPT_SDA */ >; }; main_spi0_pins_default: main-spi0-pins-default { pinctrl-single,pins = < J784S4_IOPAD(0x0d4, PIN_INPUT, 0) /* (AN38) SPI0_CLK */ /* C0 - PC_USS1_SPI_CLK_2M */ J784S4_IOPAD(0x0cc, PIN_INPUT, 0) /* (AM37) SPI0_CS0 */ /* C0 - ~PC_USS1_SPI_CS_R */ J784S4_IOPAD(0x0d8, PIN_INPUT, 0) /* (AM35) SPI0_D0 */ /* C0 - PC_USS1_SPI_MOSI_R */ J784S4_IOPAD(0x0dc, PIN_INPUT_PULLDOWN, 0) /* (AM36) SPI0_D1 */ /* C0 - PC_USS1_SPI_MISO */ >; }; main_spi2_pins_default: main-spi2-pins-default { pinctrl-single,pins = < J784S4_IOPAD(0x0a0, PIN_INPUT, 10) /* (AD34) MCASP0_AXR12.SPI2_CLK */ /* C0 - PC_USS2_SPI_CLK_2M */ J784S4_IOPAD(0x0a4, PIN_INPUT, 10) /* (AJ36) MCASP0_AXR13.SPI2_CS0 */ /* C0 - ~PC_USS2_SPI_CS_R */ J784S4_IOPAD(0x0a8, PIN_INPUT, 10) /* (AF34) MCASP0_AXR14.SPI2_D0 */ /* C0 - PC_USS2_SPI_MOSI_R */ J784S4_IOPAD(0x0ac, PIN_INPUT_PULLDOWN, 10) /* (AE34) MCASP0_AXR15.SPI2_D1 */ /* C0 - PC_USS2_SPI_MISO */ >; }; dp0_pins_default: dp0-pins-default { pinctrl-single,pins = < J784S4_IOPAD(0x0b8, PIN_INPUT_PULLDOWN, 3) /* (AC34) MCASP1_ACLKX.DP0_HPD */ /* C0 - DP0_HPD */ >; }; mysystem_vddshv01_pins_default: mysystem_vddshv01-default-pins { pinctrl-single,pins = < J784S4_IOPAD(0x10c, PIN_OUTPUT, 0) /* (AL38) RESETSTATz */ /* C0 - SIP_TDA4_RESETSTATZ */ J784S4_IOPAD(0x110, PIN_OUTPUT, 0) /* (AM34) SOC_SAFETY_ERRORn */ /* C0 - SOC_SAFETY_ERRZ_SC */ >; }; }; &wkup_pmx0 { mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins-default { pinctrl-single,pins = < J784S4_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (E32) MCU_OSPI0_CLK */ /* C0 - NOR_OSPI_50RS_133M_CLK */ J784S4_WKUP_IOPAD(0x02c, PIN_OUTPUT, 0) /* (A32) MCU_OSPI0_CSn0 */ /* C0 - NOR_OSPI_50RS_CS */ J784S4_WKUP_IOPAD(0x00c, PIN_INPUT, 0) /* (B33) MCU_OSPI0_D0 */ /* C0 - NOR_OSPI_50RS_D0 */ J784S4_WKUP_IOPAD(0x010, PIN_INPUT, 0) /* (B32) MCU_OSPI0_D1 */ /* C0 - NOR_OSPI_50RS_D1 */ J784S4_WKUP_IOPAD(0x014, PIN_INPUT, 0) /* (C33) MCU_OSPI0_D2 */ /* C0 - NOR_OSPI_50RS_D2 */ J784S4_WKUP_IOPAD(0x018, PIN_INPUT, 0) /* (C35) MCU_OSPI0_D3 */ /* C0 - NOR_OSPI_50RS_D3 */ J784S4_WKUP_IOPAD(0x01c, PIN_INPUT, 0) /* (D33) MCU_OSPI0_D4 */ /* C0 - NOR_OSPI_50RS_D4 */ J784S4_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (D34) MCU_OSPI0_D5 */ /* C0 - NOR_OSPI_50RS_D5 */ J784S4_WKUP_IOPAD(0x024, PIN_INPUT, 0) /* (E34) MCU_OSPI0_D6 */ /* C0 - NOR_OSPI_50RS_D6 */ J784S4_WKUP_IOPAD(0x028, PIN_INPUT, 0) /* (E33) MCU_OSPI0_D7 */ /* C0 - NOR_OSPI_50RS_D7 */ J784S4_WKUP_IOPAD(0x008, PIN_INPUT, 0) /* (C34) MCU_OSPI0_DQS */ /* C0 - NOR_OSPI_50RS_DQS */ >; }; mcuwkup_system_vdda_wkup1_pins_default: mcuwkup_system_vdda_wkup1-default-pins { pinctrl-single,pins = < J784S4_WKUP_IOPAD(0x0ac, PIN_OUTPUT, 0) /* (N36) MCU_SAFETY_ERRORn */ /* C0 - MCU_SAFETY_ERRZ_SC */ J784S4_WKUP_IOPAD(0x110, PIN_INPUT, 0) /* (P33) PORz */ J784S4_WKUP_IOPAD(0x0b4, PIN_OUTPUT, 0) /* (F36) MCU_RESETSTATz */ /* C0 - TDA4_MCU_RESET_OUT */ J784S4_WKUP_IOPAD(0x0b0, PIN_INPUT, 0) /* (G36) MCU_RESETz */ /* C0 - SC_PC_MCU_RST */ J784S4_WKUP_IOPAD(0x10c, PIN_INPUT, 0) /* (F34) RESET_REQz */ /* C0 - SC_PC_MAIN_RST */ >; }; }; /* SPI between Safety Controller and Performance SoC, Performance SoC is master. Moved to R5 core */ &mcu_spi0 { status = "disabled"; }; /* SPI between Safety Controller and Performance SoC, Performance SoC is slave. Moved to R5 core */ &mcu_spi1 { status = "disabled"; }; /* UART between Safety Controller and Performance SoC */ /* Since R5F CoreIO is not yet ready */ &main_uart0 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&main_uart0_pins_default>; }; /* DEBUG UART */ &main_uart4 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&main_uart4_pins_default>; }; /* GNSS UART */ &main_uart5 { status = "disabled"; }; /* UART GNSS Correct */ &main_uart8 { status = "disabled"; }; &fss { status = "okay"; }; &ospi0 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&mcu_fss0_ospi0_pins_default>; ospi0_nor: flash@0 { compatible = "jedec,spi-nor"; reg = <0x0>; spi-tx-bus-width = <8>; spi-rx-bus-width = <8>; spi-max-frequency = <25000000>; cdns,tshsl-ns = <60>; cdns,tsd2d-ns = <60>; cdns,tchsh-ns = <60>; cdns,tslch-ns = <60>; cdns,read-delay = <0>; partitions { compatible = "fixed-partitions"; #address-cells = <1>; #size-cells = <1>; partition@0 { label = "ospi.tiboot3"; reg = <0x0 0x100000>; }; partition@100000 { label = "ospi.tispl"; reg = <0x100000 0x200000>; }; partition@300000 { label = "ospi.u-boot"; reg = <0x300000 0x400000>; }; partition@700000 { label = "ospi.env"; reg = <0x700000 0x40000>; }; partition@740000 { label = "ospi.env.backup"; reg = <0x740000 0x40000>; }; partition@800000 { label = "ospi.rootfs"; reg = <0x800000 0x200000>; }; partition@a00000 { label = "ospi.phypattern"; reg = <0xa00000 0x40000>; }; }; }; }; &main_sdhci0 { /* eMMC */ status = "okay"; non-removable; ti,driver-strength-ohm = <50>; disable-wp; no-mmc-hs400; }; &serdes0 { status = "okay"; serdes0_pcie_link: phy@0 { reg = <0>; cdns,num-lanes = <2>; #phy-cells = <0>; cdns,phy-type = ; resets = <&serdes_wiz0 1>, <&serdes_wiz0 2>; }; serdes0_usb_link: phy@3 { reg = <3>; cdns,num-lanes = <1>; #phy-cells = <0>; cdns,phy-type = ; resets = <&serdes_wiz0 4>; }; }; &serdes_wiz0 { status = "okay"; }; &usb_serdes_mux { idle-states = <0>; /* USB0 to SERDES lane 3 */ }; &usbss0 { status = "okay"; pinctrl-names = "default"; ti,vbus-divider; }; &usb0 { dr_mode = "otg"; maximum-speed = "super-speed"; phys = <&serdes0_usb_link>; phy-names = "cdns3,usb3-phy"; }; &serdes1 { status = "disabled"; serdes1_pcie_link: phy@0 { reg = <0>; cdns,num-lanes = <2>; #phy-cells = <0>; cdns,phy-type = ; resets = <&serdes_wiz1 1>, <&serdes_wiz1 2>; }; }; &serdes_wiz1 { status = "disabled"; }; &pcie0_rc { status = "disabled"; phys = <&serdes1_pcie_link>; phy-names = "pcie-phy"; }; /*&pcie0_ep { status = "disabled"; phys = <&serdes1_pcie_link>; phy-names = "pcie-phy"; };*/ &pcie1_rc { status = "disabled"; num-lanes = <2>; reset-gpios = <&main_gpio0 57 GPIO_ACTIVE_HIGH>; phys = <&serdes0_pcie_link>; phy-names = "pcie-phy"; }; /*&pcie1_ep { status = "disabled"; num-lanes = <2>; phys = <&serdes0_pcie_link>; phy-names = "pcie-phy"; };*/ &serdes_ln_ctrl { idle-states = , , , , , ; }; &main_gpio0 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&main_gpios0_ospas_pins_default>; /* OSPAS120 - ~GPIO_EXPANDER_RESET */ gpio_hog_gpio0_16 { gpio-hog; gpios = <16 0>; output-high; }; }; &mcu_cpsw_port1 { status = "okay"; phy-mode = "rgmii-rxid"; fixed-link { speed = <1000>; full-duplex; }; }; &serdes_refclk { clock-frequency = <100000000>; }; &dss { status = "disable"; assigned-clocks = <&k3_clks 218 2>, <&k3_clks 218 5>, <&k3_clks 218 14>, <&k3_clks 218 18>; assigned-clock-parents = <&k3_clks 218 3>, <&k3_clks 218 7>, <&k3_clks 218 16>, <&k3_clks 218 22>; }; &serdes_wiz4 { status = "disable"; }; &serdes4 { status = "okay"; serdes4_dp_link: phy@0 { reg = <0>; cdns,num-lanes = <4>; #phy-cells = <0>; cdns,phy-type = ; cdns,max-bit-rate = <2700>; resets = <&serdes_wiz4 1>, <&serdes_wiz4 2>, <&serdes_wiz4 3>, <&serdes_wiz4 4>; }; }; &mhdp { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&dp0_pins_default>; phys = <&serdes4_dp_link>; phy-names = "dpphy"; }; &dss_ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; dpi0_out: endpoint { remote-endpoint = <&dp0_in>; }; }; }; /* MAX96724 config */ &main_i2c0 { status = "disabled"; pinctrl-names = "default"; pinctrl-0 = <&main_i2c0_pins_default>; clock-frequency = <400000>; gmsl96724: gmsl-deserializer@2e { compatible = "maxim,max96724"; reg = <0x2e>; enable-gpios = <&main_gpio0 1 GPIO_ACTIVE_HIGH>; ports { #address-cells = <1>; #size-cells = <0>; port@4 { reg = <4>; max96712_out0: endpoint { clock-lanes = <0>; data-lanes = <1 2 3 4>; remote-endpoint = <&ti_csi2rx0>; }; }; }; }; }; /* MAX96717 passthrough */ &main_i2c1 { status = "disabled"; pinctrl-names = "default"; pinctrl-0 = <&main_i2c1_pins_default>; clock-frequency = <400000>; }; /* MAX96717 config */ &main_i2c2 { status = "disabled"; pinctrl-names = "default"; pinctrl-0 = <&main_i2c2_pins_default>; clock-frequency = <400000>; /* gmsl96717: gmsl-deserializer@2d { compatible = "maxim,max96717"; reg = <0x2d>; enable-gpios = <&main_gpio0 1 GPIO_ACTIVE_HIGH>; ports { #address-cells = <1>; #size-cells = <0>; port@4 { reg = <4>; max96717_out0: endpoint { clock-lanes = <0>; data-lanes = <1 2 3 4>; remote-endpoint = <&ti_csi2rx2>; }; }; }; }; */ }; /* MAX96714 (FVC-Desierializer) config */ &main_i2c3 { status = "disabled"; pinctrl-names = "default"; pinctrl-0 = <&main_i2c3_pins_default>; clock-frequency = <400000>; gmsl96714_FVC: gmsl-deserializer@28 { compatible = "maxim,max96714"; reg = <0x28>; enable-gpios = <&main_gpio0 17 GPIO_ACTIVE_HIGH>; ports { #address-cells = <1>; #size-cells = <0>; port@4 { reg = <4>; gmsl96714_FVC_out0: endpoint { clock-lanes = <0>; data-lanes = <1 2 3 4>; remote-endpoint = <&ti_csi2rx1>; }; }; }; }; }; /* MAX96714 config */ &main_i2c5 { status = "disabled"; pinctrl-names = "default"; pinctrl-0 = <&main_i2c5_pins_default>; clock-frequency = <400000>; gmsl96714_DMS: gmsl-deserializer@2a { compatible = "maxim,max96714"; reg = <0x2a>; enable-gpios = <&main_gpio0 11 GPIO_ACTIVE_HIGH>; ports { #address-cells = <1>; #size-cells = <0>; port@4 { reg = <4>; gmsl96714_DMS_out0: endpoint { clock-lanes = <0>; data-lanes = <1 2 3 4>; remote-endpoint = <&ti_csi2rx2>; }; }; }; }; }; /* GPIO Expanders */ &main_i2c4 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&main_i2c4_pins_default>; clock-frequency = <400000>; exp2: gpio@75 { compatible = "ti,tca9539"; reg = <0x75>; gpio-controller; #gpio-cells = <2>; enable-gpios = <&main_gpio0 16 GPIO_ACTIVE_HIGH>; }; }; /* MAX96724 passthrough */ &main_i2c6 { status = "disabled"; pinctrl-names = "default"; pinctrl-0 = <&main_i2c6_pins_default>; clock-frequency = <400000>; }; /* USS HSD CTRL config */ &main_spi0 { status = "okay"; pinctrl-names = "default"; ti,pindir-d0-out-d1-in; pinctrl-0 = <&main_spi0_pins_default>; spidev@0 { status = "okay"; compatible = "rohm,dh2228fv"; spi-max-frequency = <1000000>; reg = <0>; }; }; /* USS HSD CTRL Config */ &main_spi2 { status = "okay"; pinctrl-names = "default"; ti,pindir-d0-out-d1-in; pinctrl-0 = <&main_spi2_pins_default>; spidev@0 { status = "okay"; compatible = "rohm,dh2228fv"; spi-max-frequency = <1000000>; reg = <0>; }; }; &mailbox0_cluster0 { status = "okay"; interrupts = <436>; mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 { ti,mbox-rx = <0 0 0>; ti,mbox-tx = <1 0 0>; }; mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 { ti,mbox-rx = <2 0 0>; ti,mbox-tx = <3 0 0>; }; }; &mailbox0_cluster1 { status = "okay"; interrupts = <432>; mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 { ti,mbox-rx = <0 0 0>; ti,mbox-tx = <1 0 0>; }; mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 { ti,mbox-rx = <2 0 0>; ti,mbox-tx = <3 0 0>; }; }; &mailbox0_cluster2 { status = "okay"; interrupts = <428>; mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 { ti,mbox-rx = <0 0 0>; ti,mbox-tx = <1 0 0>; }; mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 { ti,mbox-rx = <2 0 0>; ti,mbox-tx = <3 0 0>; }; }; &mailbox0_cluster3 { status = "okay"; interrupts = <424>; mbox_main_r5fss2_core0: mbox-main-r5fss2-core0 { ti,mbox-rx = <0 0 0>; ti,mbox-tx = <1 0 0>; }; mbox_main_r5fss2_core1: mbox-main-r5fss2-core1 { ti,mbox-rx = <2 0 0>; ti,mbox-tx = <3 0 0>; }; }; &mailbox0_cluster4 { status = "okay"; interrupts = <420>; mbox_c71_0: mbox-c71-0 { ti,mbox-rx = <0 0 0>; ti,mbox-tx = <1 0 0>; }; mbox_c71_1: mbox-c71-1 { ti,mbox-rx = <2 0 0>; ti,mbox-tx = <3 0 0>; }; }; &mailbox0_cluster5 { status = "okay"; interrupts = <416>; mbox_c71_2: mbox-c71-2 { ti,mbox-rx = <0 0 0>; ti,mbox-tx = <1 0 0>; }; mbox_c71_3: mbox-c71-3 { ti,mbox-rx = <2 0 0>; ti,mbox-tx = <3 0 0>; }; }; #include #include "k3-j784s4-rtos-memory-map.dtsi" &mcu_r5fss0_core0 { status = "okay"; mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>; memory-region = <&vision_apps_mcu_r5fss0_core0_dma_memory_region>, <&vision_apps_mcu_r5fss0_core0_memory_region>; }; &mcu_r5fss0_core1 { status = "okay"; mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>; memory-region = <&vision_apps_mcu_r5fss0_core1_dma_memory_region>, <&vision_apps_mcu_r5fss0_core1_memory_region>; }; &main_r5fss0_core0 { status = "okay"; mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>; memory-region = <&vision_apps_main_r5fss0_core0_dma_memory_region>, <&vision_apps_main_r5fss0_core0_memory_region>, <&vision_apps_main_r5fss0_core0_shared_memory_queue_region>, <&vision_apps_main_r5fss0_core0_shared_memory_bufpool_region>; }; &main_r5fss0_core1 { status = "okay"; mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>; memory-region = <&vision_apps_main_r5fss0_core1_dma_memory_region>, <&vision_apps_main_r5fss0_core1_memory_region>; }; &main_r5fss1_core0 { status = "okay"; mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core0>; memory-region = <&vision_apps_main_r5fss1_core0_dma_memory_region>, <&vision_apps_main_r5fss1_core0_memory_region>; }; &main_r5fss1_core1 { status = "okay"; mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core1>; memory-region = <&vision_apps_main_r5fss1_core1_dma_memory_region>, <&vision_apps_main_r5fss1_core1_memory_region>; }; &main_r5fss2_core0 { status = "okay"; mboxes = <&mailbox0_cluster3 &mbox_main_r5fss2_core0>; memory-region = <&vision_apps_main_r5fss2_core0_dma_memory_region>, <&vision_apps_main_r5fss2_core0_memory_region>; }; &main_r5fss2_core1 { status = "okay"; mboxes = <&mailbox0_cluster3 &mbox_main_r5fss2_core1>; memory-region = <&vision_apps_main_r5fss2_core1_dma_memory_region>, <&vision_apps_main_r5fss2_core1_memory_region>; }; &c71_0 { status = "okay"; mboxes = <&mailbox0_cluster4 &mbox_c71_0>; memory-region = <&vision_apps_c71_0_dma_memory_region>, <&vision_apps_c71_0_memory_region>; }; &c71_1 { status = "okay"; mboxes = <&mailbox0_cluster4 &mbox_c71_1>; memory-region = <&vision_apps_c71_1_dma_memory_region>, <&vision_apps_c71_1_memory_region>; }; &c71_2 { status = "okay"; mboxes = <&mailbox0_cluster5 &mbox_c71_2>; memory-region = <&c71_2_dma_memory_region>, <&c71_2_memory_region>, <&vision_apps_c71_2_dma_memory_region>, <&vision_apps_c71_2_memory_region>; }; &c71_3 { status = "okay"; mboxes = <&mailbox0_cluster5 &mbox_c71_3>; memory-region = <&vision_apps_c71_3_dma_memory_region>, <&vision_apps_c71_3_memory_region>; }; &dp0_ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; dp0_in: endpoint { remote-endpoint = <&dpi0_out>; }; }; port@4 { reg = <4>; dp0_out: endpoint { remote-endpoint = <&dp0_connector_in>; }; }; }; &ti_csi2rx0 { status = "okay"; /* MIPI-CSI Connector 0 */ }; &ti_csi2rx1 { status = "okay"; /* MIPI-CSI Connector 0 */ }; &ti_csi2rx2 { status = "okay"; /* MIPI-CSI Connector 1 */ }; /*&dphy_rx0 { status = "okay"; }; &dphy_rx1 { status = "okay"; }; &dphy_rx2 { status = "okay"; };*/ &tscadc0 { pinctrl-0 = <&mcu_adc0_pins_default>; pinctrl-names = "default"; status = "okay"; adc { ti,adc-channels = <0 1 2 3 4 5 6 7>; }; }; &tscadc1 { pinctrl-0 = <&mcu_adc1_pins_default>; pinctrl-names = "default"; status = "okay"; adc { ti,adc-channels = <0 1 2 3 4 5 6 7>; }; }; &dphy_tx0 { status = "okay"; }; &dsi0 { status = "okay"; }; #define K3_TS_OFFSET(pa, val) (0x4+(pa)*4) (0x10000 | val) ×ync_router { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&mcu_cpsw_cpts>; /* Use Time Sync Router to map GENF1 input to HW4_TS_PUSH output */ mcu_cpsw_cpts: mcu-cpsw-cpts { pinctrl-single,pins = < /* pps [mcu cpsw cpts genf1] in17 -> out25 [mcu cpsw cpts hw4_push] */ K3_TS_OFFSET(25, 17) >; }; }; &csi0_port0 { status = "disabled"; csi2rx0_in_sensor: endpoint { remote-endpoint = <&gmsl96724>; bus-type = <4>; /* CSI2 DPHY */ clock-lanes = <0>; data-lanes = <1 2 3 4>; }; }; &csi1_port0 { status = "disabled"; csi2rx1_in_sensor: endpoint { remote-endpoint = <&gmsl96714_FVC>; bus-type = <4>;/* CSI2 DPHY */ clock-lanes = <0>; data-lanes = <1 2 3 4>; }; }; &csi2_port0 { status = "disabled"; csi2rx2_in_sensor: endpoint { remote-endpoint = <&gmsl96714_DMS>; bus-type = <4>;/* CSI2 DPHY */ clock-lanes = <0>; data-lanes = <1 2 3 4>; }; }; &ecap0 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&main_ecap2_pins_default>; };