root@773fe789ebee:/home/root/edgeai-tidl-tools_91# source scripts/run_python_examples.sh X64 Architecture Running 4 Models - ['cl-tfl-mobilenet_v1_1.0_224', 'ss-tfl-deeplabv3_mnv2_ade20k_float', 'od-tfl-ssd_mobilenet_v2_300_float', 'od-tfl-ssdlite_mobiledet_dsp_320x320_coco'] Running_Model : cl-tfl-mobilenet_v1_1.0_224 Downloading ../../../models/public/mobilenet_v1_1.0_224.tflite Running_Model : ss-tfl-deeplabv3_mnv2_ade20k_float Downloading ../../../models/public/deeplabv3_mnv2_ade20k_float.tflite Running_Model : od-tfl-ssd_mobilenet_v2_300_float Downloading ../../../models/public/ssd_mobilenet_v2_300_float.tflite Running_Model : od-tfl-ssdlite_mobiledet_dsp_320x320_coco Downloading ../../../models/public/ssdlite_mobiledet_dsp_320x320_coco_20200519.tflite /home/root/edgeai-tidl-tools_91/models/public/deeplabv3_mnv2_ade20k_float.tflite Preliminary number of subgraphs:1 , 81 nodes delegated out of 81 nodes Warning : Requested Output Data Convert Layer is not Added to the network, It is currently not Optimal /home/root/edgeai-tidl-tools_91/models/public/ssdlite_mobiledet_dsp_320x320_coco_20200519.tflite ************** Frame index 1 : Running float import ************* INFORMATION: [TIDL_ResizeLayer] ResizeBilinear_TIDL_0 Any resize ratio which is power of 2 and greater than 4 will be placed by combination of 4x4 resize layer and 2x2 resize layer. For example a 8x8 resize will be replaced by 4x4 resize followed by 2x2 resize. INFORMATION: [TIDL_ResizeLayer] ResizeBilinear_TIDL_1 Any resize ratio which is power of 2 and greater than 4 will be placed by combination of 4x4 resize layer and 2x2 resize layer. For example a 8x8 resize will be replaced by 4x4 resize followed by 2x2 resize. INFORMATION: [TIDL_ResizeLayer] ResizeBilinear Any resize ratio which is power of 2 and greater than 4 will be placed by combination of 4x4 resize layer and 2x2 resize layer. For example a 8x8 resize will be replaced by 4x4 resize followed by 2x2 resize. INFORMATION: [TIDL_ResizeLayer] decoder/ResizeBilinear Any resize ratio which is power of 2 and greater than 4 will be placed by combination of 4x4 resize layer and 2x2 resize layer. For example a 8x8 resize will be replaced by 4x4 resize followed by 2x2 resize. INFORMATION: [TIDL_ResizeLayer] ResizeBilinear_1 Any resize ratio which is power of 2 and greater than 4 will be placed by combination of 4x4 resize layer and 2x2 resize layer. For example a 8x8 resize will be replaced by 4x4 resize followed by 2x2 resize. **************************************************** ** 5 WARNINGS 0 ERRORS ** **************************************************** The soft limit is 2048 The hard limit is 2048 MEM: Init ... !!! MEM: Init ... Done !!! 0.0s: VX_ZONE_INIT:Enabled 0.8s: VX_ZONE_ERROR:Enabled 0.9s: VX_ZONE_WARNING:Enabled 0.2926s: VX_ZONE_INIT:[tivxInit:185] Initialization Done !!! Downloading ../../../models/public/ssdlite_mobiledet_dsp_320x320_coco_20200519.prototxt /home/root/edgeai-tidl-tools_91/models/public/ssd_mobilenet_v2_300_float.tflite Number of OD backbone nodes = 89 Size of odBackboneNodeIds = 89 Preliminary number of subgraphs:1 , 107 nodes delegated out of 107 nodes Warning : Requested Output Data Convert Layer is not Added to the network, It is currently not Optimal Warning : Requested Output Data Convert Layer is not Added to the network, It is currently not Optimal Warning : Requested Output Data Convert Layer is not Added to the network, It is currently not Optimal Warning : Requested Output Data Convert Layer is not Added to the network, It is currently not Optimal ************** Frame index 1 : Running float import ************* **************************************************** ** ALL MODEL CHECK PASSED ** **************************************************** The soft limit is 2048 The hard limit is 2048 MEM: Init ... !!! MEM: Init ... Done !!! 0.0s: VX_ZONE_INIT:Enabled 0.7s: VX_ZONE_ERROR:Enabled 0.9s: VX_ZONE_WARNING:Enabled 0.1995s: VX_ZONE_INIT:[tivxInit:185] Initialization Done !!! TIDL Meta PipeLine (Proto) File : ../../../models/public/ssdlite_mobiledet_dsp_320x320_coco_20200519.prototxt Number of OD backbone nodes = 112 Size of odBackboneNodeIds = 112 Preliminary number of subgraphs:1 , 129 nodes delegated out of 129 nodes TF Meta PipeLine (Proto) File : ../../../models/public/ssdlite_mobiledet_dsp_320x320_coco_20200519.prototxt num_classes : 91 y_scale : 10.000000 x_scale : 10.000000 w_scale : 5.000000 h_scale : 5.000000 num_keypoints : 5.000000 score_threshold : 0.600000 iou_threshold : 0.450000 max_detections_per_class : 200 max_total_detections : 100 scales, height_stride, width_stride, height_offset, width_offset 0.2000000, -1.0000000, -1.0000000, -1.0000000, -1.0000000 0.3500000, -1.0000000, -1.0000000, -1.0000000, -1.0000000 0.5000000, -1.0000000, -1.0000000, -1.0000000, -1.0000000 0.6500000, -1.0000000, -1.0000000, -1.0000000, -1.0000000 0.8000000, -1.0000000, -1.0000000, -1.0000000, -1.0000000 0.9500000, -1.0000000, -1.0000000, -1.0000000, -1.0000000 aspect_ratios 1.0000000 2.0000000 0.5000000 3.0000000 0.3333000 /home/root/edgeai-tidl-tools_91/models/public/mobilenet_v1_1.0_224.tflite Preliminary number of subgraphs:1 , 34 nodes delegated out of 34 nodes Warning : Requested Output Data Convert Layer is not Added to the network, It is currently not Optimal Warning : Requested Output Data Convert Layer is not Added to the network, It is currently not Optimal Warning : Requested Output Data Convert Layer is not Added to the network, It is currently not Optimal Warning : Requested Output Data Convert Layer is not Added to the network, It is currently not Optimal ************** Frame index 1 : Running float import ************* **************************************************** ** ALL MODEL CHECK PASSED ** **************************************************** The soft limit is 2048 The hard limit is 2048 MEM: Init ... !!! MEM: Init ... Done !!! 0.0s: VX_ZONE_INIT:Enabled 0.9s: VX_ZONE_ERROR:Enabled 0.11s: VX_ZONE_WARNING:Enabled 0.4263s: VX_ZONE_INIT:[tivxInit:185] Initialization Done !!! Warning : Requested Output Data Convert Layer is not Added to the network, It is currently not Optimal ************** Frame index 1 : Running float import ************* **************************************************** ** ALL MODEL CHECK PASSED ** **************************************************** The soft limit is 2048 The hard limit is 2048 MEM: Init ... !!! MEM: Init ... Done !!! 0.0s: VX_ZONE_INIT:Enabled 0.7s: VX_ZONE_ERROR:Enabled 0.9s: VX_ZONE_WARNING:Enabled 0.2113s: VX_ZONE_INIT:[tivxInit:185] Initialization Done !!! ************ Frame index 1 : Running float inference **************** ************ Frame index 2 : Running fixed point mode for calibration **************** Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-tfl-mobilenet_v1_1.0_224/tempDir/86_tidl_io_.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. ************ Frame index 1 : Running float inference **************** T 1623.81 .... ..... ... .... ..... # 1 . .. T 1608.79 .... ..... ... .... ..... ***************** Calibration iteration number 0 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-tfl-mobilenet_v1_1.0_224/tempDir/86_tidl_io_.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 1053.76 .... ..... ... .... ..... # 1 . .. ************ Frame index 1 : Running float inference **************** T 1051.52 .... ..... ... .... ..... ***************** Calibration iteration number 0 completed ************************ ***************** Calibration iteration number 1 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-tfl-mobilenet_v1_1.0_224/tempDir/86_tidl_io_.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. ************ Frame index 2 : Running fixed point mode for calibration **************** Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/od-tfl-ssd_mobilenet_v2_300_float/tempDir/264_tidl_io_.qunat_stats_config.txt T 1044.57 .... ..... ... .... ..... # 1 . .. Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 1029.24 .... ..... ... .... ..... ***************** Calibration iteration number 1 completed ************************ ***************** Calibration iteration number 2 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-tfl-mobilenet_v1_1.0_224/tempDir/86_tidl_io_.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 1061.33 .... ..... ... .... ..... # 1 . .. T 1052.41 .... ..... ... .... ..... ***************** Calibration iteration number 2 completed ************************ ***************** Calibration iteration number 3 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-tfl-mobilenet_v1_1.0_224/tempDir/86_tidl_io_.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. ************ Frame index 1 : Running float inference **************** T 1064.21 .... ..... ... .... ..... # 1 . .. T 5389.09 .... ..... ... .... ..... # 1 . .. T 1056.64 .... ..... ... .... ..... ***************** Calibration iteration number 3 completed ************************ ***************** Calibration iteration number 4 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-tfl-mobilenet_v1_1.0_224/tempDir/86_tidl_io_.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. ************ Frame index 2 : Running fixed point mode for calibration **************** Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/od-tfl-ssdlite_mobiledet_dsp_320x320_coco/tempDir/321_tidl_io_.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 1046.08 .... ..... ... .... ..... # 1 . .. T 1050.66 .... ..... ... .... ..... ***************** Calibration iteration number 4 completed ************************ Empty prototxt path, running calibration ------------------ Network Compiler Traces ----------------------------- NC running for device: 1 Running with OTF buffer optimizations successful Memory allocation **************************************************** ** ALL MODEL CHECK PASSED ** **************************************************** Final number of subgraphs:1 , 34 nodes delegated to accelerator Completed_Model : 1, Name : cl-tfl-mobilenet_v1_1.0_224 , Total time : 9250.10, Offload Time : 0.00 , DDR RW MBs : 18446744073709.55, Output File : py_out_cl-tfl-mobilenet_v1_1.0_224_ADE_val_00001801.jpg MEM: Deinit ... !!! MEM: Alloc's: 25 alloc's of 69204572 bytes MEM: Free's : 25 free's of 69204572 bytes MEM: Open's : 0 allocs of 0 bytes MEM: Deinit ... Done !!! T 5400.82 .... ..... ... .... ..... ***************** Calibration iteration number 0 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/od-tfl-ssd_mobilenet_v2_300_float/tempDir/264_tidl_io_.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 8005.51 .... ..... ... .... ..... # 1 . .. T 3657.89 .... ..... ... .... ..... # 1 . .. T 3614.43 .... ..... ... .... ..... ***************** Calibration iteration number 0 completed ************************ ***************** Calibration iteration number 1 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/od-tfl-ssd_mobilenet_v2_300_float/tempDir/264_tidl_io_.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 7973.97 .... ..... ... .... ..... ***************** Calibration iteration number 0 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/od-tfl-ssdlite_mobiledet_dsp_320x320_coco/tempDir/321_tidl_io_.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. ************ Frame index 2 : Running fixed point mode for calibration **************** Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/ss-tfl-deeplabv3_mnv2_ade20k_float/tempDir/201_tidl_io_.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 3706.42 .... ..... ... .... ..... # 1 . .. T 3765.60 .... ..... ... .... ..... ***************** Calibration iteration number 1 completed ************************ ***************** Calibration iteration number 2 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ T 4620.13 .... ..... ... .... ..... # 1 . .. Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/od-tfl-ssd_mobilenet_v2_300_float/tempDir/264_tidl_io_.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 3658.33 .... ..... ... .... ..... # 1 . .. T 4770.17 .... ..... ... .... ..... ***************** Calibration iteration number 0 completed ************************ ***************** Calibration iteration number 1 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/od-tfl-ssdlite_mobiledet_dsp_320x320_coco/tempDir/321_tidl_io_.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 3625.67 .... ..... ... .... ..... ***************** Calibration iteration number 2 completed ************************ ***************** Calibration iteration number 3 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/od-tfl-ssd_mobilenet_v2_300_float/tempDir/264_tidl_io_.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 4723.47 .... ..... ... .... ..... # 1 . .. T 3743.80 .... ..... ... .... ..... # 1 . .. T 17503.64 .... ..... ... .... ..... # 1 . .. T 4588.59 .... ..... ... .... ..... ***************** Calibration iteration number 1 completed ************************ ***************** Calibration iteration number 2 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/od-tfl-ssdlite_mobiledet_dsp_320x320_coco/tempDir/321_tidl_io_.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 3756.38 .... ..... ... .... ..... ***************** Calibration iteration number 3 completed ************************ ***************** Calibration iteration number 4 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/od-tfl-ssd_mobilenet_v2_300_float/tempDir/264_tidl_io_.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 4811.49 .... ..... ... .... ..... # 1 . .. T 3660.05 .... ..... ... .... ..... # 1 . .. T 3727.42 .... ..... ... .... ..... ***************** Calibration iteration number 4 completed ************************ Empty prototxt path, running calibration ------------------ Network Compiler Traces ----------------------------- NC running for device: 1 Running with OTF buffer optimizations successful Memory allocation **************************************************** ** ALL MODEL CHECK PASSED ** **************************************************** Final number of subgraphs:1 , 107 nodes delegated to accelerator Completed_Model : 3, Name : od-tfl-ssd_mobilenet_v2_300_float , Total time : 31508.79, Offload Time : 0.00 , DDR RW MBs : 18446744073709.55, Output File : py_out_od-tfl-ssd_mobilenet_v2_300_float_ADE_val_00001801.jpg MEM: Deinit ... !!! MEM: Alloc's: 28 alloc's of 212521142 bytes MEM: Free's : 28 free's of 212521142 bytes MEM: Open's : 0 allocs of 0 bytes MEM: Deinit ... Done !!! T 4895.76 .... ..... ... .... ..... ***************** Calibration iteration number 2 completed ************************ ***************** Calibration iteration number 3 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/od-tfl-ssdlite_mobiledet_dsp_320x320_coco/tempDir/321_tidl_io_.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 4753.96 .... ..... ... .... ..... # 1 . .. T 17429.29 .... ..... ... .... ..... ***************** Calibration iteration number 0 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/ss-tfl-deeplabv3_mnv2_ade20k_float/tempDir/201_tidl_io_.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 4504.51 .... ..... ... .... ..... ***************** Calibration iteration number 3 completed ************************ ***************** Calibration iteration number 4 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/od-tfl-ssdlite_mobiledet_dsp_320x320_coco/tempDir/321_tidl_io_.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 7521.89 .... ..... ... .... ..... # 1 . .. T 4712.71 .... ..... ... .... ..... # 1 . .. T 4786.18 .... ..... ... .... ..... ***************** Calibration iteration number 4 completed ************************ Empty prototxt path, running calibration ------------------ Network Compiler Traces ----------------------------- NC running for device: 1 Running with OTF buffer optimizations successful Memory allocation **************************************************** ** ALL MODEL CHECK PASSED ** **************************************************** Final number of subgraphs:1 , 129 nodes delegated to accelerator Completed_Model : 4, Name : od-tfl-ssdlite_mobiledet_dsp_320x320_coco , Total time : 41127.32, Offload Time : 0.00 , DDR RW MBs : 18446744073709.55, Output File : py_out_od-tfl-ssdlite_mobiledet_dsp_320x320_coco_ADE_val_00001801.jpg MEM: Deinit ... !!! MEM: Alloc's: 28 alloc's of 118226653 bytes MEM: Free's : 28 free's of 118226653 bytes MEM: Open's : 0 allocs of 0 bytes MEM: Deinit ... Done !!! T 7493.44 .... ..... ... .... ..... ***************** Calibration iteration number 0 completed ************************ ***************** Calibration iteration number 1 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/ss-tfl-deeplabv3_mnv2_ade20k_float/tempDir/201_tidl_io_.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 7469.15 .... ..... ... .... ..... # 1 . .. T 7487.81 .... ..... ... .... ..... ***************** Calibration iteration number 1 completed ************************ ***************** Calibration iteration number 2 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/ss-tfl-deeplabv3_mnv2_ade20k_float/tempDir/201_tidl_io_.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 7298.48 .... ..... ... .... ..... # 1 . .. T 7368.37 .... ..... ... .... ..... ***************** Calibration iteration number 2 completed ************************ ***************** Calibration iteration number 3 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/ss-tfl-deeplabv3_mnv2_ade20k_float/tempDir/201_tidl_io_.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 7370.09 .... ..... ... .... ..... # 1 . .. T 7336.00 .... ..... ... .... ..... ***************** Calibration iteration number 3 completed ************************ ***************** Calibration iteration number 4 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/ss-tfl-deeplabv3_mnv2_ade20k_float/tempDir/201_tidl_io_.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 7465.78 .... ..... ... .... ..... # 1 . .. T 7559.34 .... ..... ... .... ..... ***************** Calibration iteration number 4 completed ************************ Empty prototxt path, running calibration ------------------ Network Compiler Traces ----------------------------- NC running for device: 1 Running with OTF buffer optimizations successful Memory allocation INFORMATION: [TIDL_ResizeLayer] ResizeBilinear_TIDL_0 Any resize ratio which is power of 2 and greater than 4 will be placed by combination of 4x4 resize layer and 2x2 resize layer. For example a 8x8 resize will be replaced by 4x4 resize followed by 2x2 resize. INFORMATION: [TIDL_ResizeLayer] ResizeBilinear_TIDL_1 Any resize ratio which is power of 2 and greater than 4 will be placed by combination of 4x4 resize layer and 2x2 resize layer. For example a 8x8 resize will be replaced by 4x4 resize followed by 2x2 resize. INFORMATION: [TIDL_ResizeLayer] ResizeBilinear Any resize ratio which is power of 2 and greater than 4 will be placed by combination of 4x4 resize layer and 2x2 resize layer. For example a 8x8 resize will be replaced by 4x4 resize followed by 2x2 resize. INFORMATION: [TIDL_ResizeLayer] decoder/ResizeBilinear Any resize ratio which is power of 2 and greater than 4 will be placed by combination of 4x4 resize layer and 2x2 resize layer. For example a 8x8 resize will be replaced by 4x4 resize followed by 2x2 resize. INFORMATION: [TIDL_ResizeLayer] ResizeBilinear_1 Any resize ratio which is power of 2 and greater than 4 will be placed by combination of 4x4 resize layer and 2x2 resize layer. For example a 8x8 resize will be replaced by 4x4 resize followed by 2x2 resize. **************************************************** ** 5 WARNINGS 0 ERRORS ** **************************************************** Final number of subgraphs:1 , 81 nodes delegated to accelerator Completed_Model : 2, Name : ss-tfl-deeplabv3_mnv2_ade20k_float , Total time : 73525.66, Offload Time : 0.00 , DDR RW MBs : 18446744073709.55, Output File : py_out_ss-tfl-deeplabv3_mnv2_ade20k_float_ADE_val_00001801.jpg MEM: Deinit ... !!! MEM: Alloc's: 25 alloc's of 419133339 bytes MEM: Free's : 25 free's of 419133339 bytes MEM: Open's : 0 allocs of 0 bytes MEM: Deinit ... Done !!! run python3 tflrt_delegate.py Running 4 Models - ['cl-tfl-mobilenet_v1_1.0_224', 'ss-tfl-deeplabv3_mnv2_ade20k_float', 'od-tfl-ssd_mobilenet_v2_300_float', 'od-tfl-ssdlite_mobiledet_dsp_320x320_coco'] Running_Model : cl-tfl-mobilenet_v1_1.0_224 Running_Model : ss-tfl-deeplabv3_mnv2_ade20k_float Running_Model : od-tfl-ssd_mobilenet_v2_300_float Running_Model : od-tfl-ssdlite_mobiledet_dsp_320x320_coco Number of subgraphs:1 , 34 nodes delegated out of 34 nodes Number of subgraphs:1 , 81 nodes delegated out of 81 nodes Number of subgraphs:1 , 107 nodes delegated out of 107 nodes Number of subgraphs:1 , 129 nodes delegated out of 129 nodes The soft limit is 2048 The hard limit is 2048 MEM: Init ... !!! MEM: Init ... Done !!! 0.0s: VX_ZONE_INIT:Enabled 0.12s: VX_ZONE_ERROR:Enabled 0.14s: VX_ZONE_WARNING:Enabled The soft limit is 2048 The hard limit is 2048 MEM: Init ... !!! MEM: Init ... Done !!! 0.0s: VX_ZONE_INIT:Enabled 0.13s: VX_ZONE_ERROR:Enabled 0.19s: VX_ZONE_WARNING:Enabled 0.2981s: VX_ZONE_INIT:[tivxInit:185] Initialization Done !!! 0.2582s: VX_ZONE_INIT:[tivxInit:185] Initialization Done !!! The soft limit is 2048 The hard limit is 2048 MEM: Init ... !!! MEM: Init ... Done !!! 0.0s: VX_ZONE_INIT:Enabled 0.10s: VX_ZONE_ERROR:Enabled 0.11s: VX_ZONE_WARNING:Enabled 0.2521s: VX_ZONE_INIT:[tivxInit:185] Initialization Done !!! The soft limit is 2048 The hard limit is 2048 MEM: Init ... !!! MEM: Init ... Done !!! 0.0s: VX_ZONE_INIT:Enabled 0.10s: VX_ZONE_ERROR:Enabled 0.12s: VX_ZONE_WARNING:Enabled 0.2644s: VX_ZONE_INIT:[tivxInit:185] Initialization Done !!! , 0 0.691726 warplane, military plane ,, 1 0.181373 missile ,, 2 0.109571 projectile, missile ,, 3 0.006352 cannon ,, 4 0.005370 aircraft carrier, carrier, flattop, attack aircraft carrier , Saving image to ../../../output_images/ Completed_Model : 1, Name : cl-tfl-mobilenet_v1_1.0_224 , Total time : 1350.52, Offload Time : 1350.52 , DDR RW MBs : 18446744073709.55, Output File : py_out_cl-tfl-mobilenet_v1_1.0_224_airshow.jpg MEM: Deinit ... !!! MEM: Alloc's: 25 alloc's of 30955842 bytes MEM: Free's : 25 free's of 30955842 bytes MEM: Open's : 0 allocs of 0 bytes MEM: Deinit ... Done !!! Saving image to ../../../output_images/ Completed_Model : 3, Name : od-tfl-ssd_mobilenet_v2_300_float , Total time : 4525.98, Offload Time : 4525.97 , DDR RW MBs : 18446744073709.55, Output File : py_out_od-tfl-ssd_mobilenet_v2_300_float_ADE_val_00001801.jpg MEM: Deinit ... !!! MEM: Alloc's: 28 alloc's of 87099812 bytes MEM: Free's : 28 free's of 87099812 bytes MEM: Open's : 0 allocs of 0 bytes MEM: Deinit ... Done !!! Saving image to ../../../output_images/ Completed_Model : 4, Name : od-tfl-ssdlite_mobiledet_dsp_320x320_coco , Total time : 6736.06, Offload Time : 6736.04 , DDR RW MBs : 18446744073709.55, Output File : py_out_od-tfl-ssdlite_mobiledet_dsp_320x320_coco_ADE_val_00001801.jpg MEM: Deinit ... !!! MEM: Alloc's: 28 alloc's of 41917955 bytes MEM: Free's : 28 free's of 41917955 bytes MEM: Open's : 0 allocs of 0 bytes MEM: Deinit ... Done !!! Saving image to ../../../output_images/ Completed_Model : 2, Name : ss-tfl-deeplabv3_mnv2_ade20k_float , Total time : 12592.01, Offload Time : 12592.00 , DDR RW MBs : 18446744073709.55, Output File : py_out_ss-tfl-deeplabv3_mnv2_ade20k_float_ADE_val_00001801.jpg MEM: Deinit ... !!! MEM: Alloc's: 25 alloc's of 110387255 bytes MEM: Free's : 25 free's of 110387255 bytes MEM: Open's : 0 allocs of 0 bytes MEM: Deinit ... Done !!! Available execution providers : ['TIDLExecutionProvider', 'TIDLCompilationProvider', 'CPUExecutionProvider'] Running 4 Models - ['cl-ort-resnet18-v1', 'cl-ort-caffe_squeezenet_v1_1', 'ss-ort-deeplabv3lite_mobilenetv2', 'od-ort-ssd-lite_mobilenetv2_fpn'] Running_Model : cl-ort-resnet18-v1 Downloading ../../../models/public/resnet18_opset9.onnx Running_Model : cl-ort-caffe_squeezenet_v1_1 Downloading ../../../models/public/caffe_squeezenet_v1_1.prototxt Running_Model : ss-ort-deeplabv3lite_mobilenetv2 Downloading ../../../models/public/deeplabv3lite_mobilenetv2.onnx Running_Model : od-ort-ssd-lite_mobilenetv2_fpn Downloading ../../../models/public/ssd-lite_mobilenetv2_fpn.onnx Downloading ../../../models/public/caffe_squeezenet_v1_1.caffemodel Converted model is valid! Running shape inference on model ../../../models/public/deeplabv3lite_mobilenetv2.onnx Preliminary subgraphs created = 1 Final number of subgraphs created are : 1, - Offloaded Nodes - 124, Total Nodes - 124 caffemodel was successfully loaded add model input information add model output information and model intermediate output information *.onnx model conversion completed removing not constant initializers from model frozen graph has been created the model has been successfully saved to ../../../models/public/caffe_squeezenet_v1_1.onnx Converted model is valid! Running shape inference on model ../../../models/public/caffe_squeezenet_v1_1.onnx Preliminary subgraphs created = 1 Final number of subgraphs created are : 1, - Offloaded Nodes - 68, Total Nodes - 68 Graph Domain TO version : 11Warning : Requested Output Data Convert Layer is not Added to the network, It is currently not Optimal ************** Frame index 1 : Running float import ************* INFORMATION: [TIDL_ResizeLayer] 571 Any resize ratio which is power of 2 and greater than 4 will be placed by combination of 4x4 resize layer and 2x2 resize layer. For example a 8x8 resize will be replaced by 4x4 resize followed by 2x2 resize. INFORMATION: [TIDL_ResizeLayer] 576 Any resize ratio which is power of 2 and greater than 4 will be placed by combination of 4x4 resize layer and 2x2 resize layer. For example a 8x8 resize will be replaced by 4x4 resize followed by 2x2 resize. **************************************************** ** 2 WARNINGS 0 ERRORS ** **************************************************** The soft limit is 2048 The hard limit is 2048 MEM: Init ... !!! MEM: Init ... Done !!! 0.0s: VX_ZONE_INIT:Enabled 0.7s: VX_ZONE_ERROR:Enabled 0.9s: VX_ZONE_WARNING:Enabled 0.2155s: VX_ZONE_INIT:[tivxInit:185] Initialization Done !!! Graph Domain TO version : 11Warning : Requested Output Data Convert Layer is not Added to the network, It is currently not Optimal ************** Frame index 1 : Running float import ************* **************************************************** ** ALL MODEL CHECK PASSED ** **************************************************** The soft limit is 2048 The hard limit is 2048 MEM: Init ... !!! MEM: Init ... Done !!! 0.0s: VX_ZONE_INIT:Enabled 0.6s: VX_ZONE_ERROR:Enabled 0.8s: VX_ZONE_WARNING:Enabled 0.1964s: VX_ZONE_INIT:[tivxInit:185] Initialization Done !!! ********** Frame Index 1 : Running float inference ********** Graph Domain TO version : 11 ********** Frame Index 2 : Running fixed point mode for calibration ********** Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-ort-caffe_squeezenet_v1_1/tempDir/prob_Y_tidl_io_.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 1107.93 .... ..... ... .... ..... # 1 . ..Converted model is valid! Downloading ../../../models/public/ssd-lite_mobilenetv2_fpn.prototxt T 1095.78 .... ..... ... .... ..... ***************** Calibration iteration number 0 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-ort-caffe_squeezenet_v1_1/tempDir/prob_Y_tidl_io_.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 657.19 .... ..... ... .... ..... # 1 . .. T 652.02 .... ..... ... .... ..... ***************** Calibration iteration number 0 completed ************************ ***************** Calibration iteration number 1 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-ort-caffe_squeezenet_v1_1/tempDir/prob_Y_tidl_io_.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 649.08 .... ..... ... .... ..... # 1 . .. T 646.95 .... ..... ... .... ..... ***************** Calibration iteration number 1 completed ************************ ***************** Calibration iteration number 2 started ************************ Empty prototxt path, running calibration Running shape inference on model ../../../models/public/ssd-lite_mobilenetv2_fpn.onnx ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-ort-caffe_squeezenet_v1_1/tempDir/prob_Y_tidl_io_.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . ..ssd is meta arch name Number of OD backbone nodes = 159 Size of odBackboneNodeIds = 159 Preliminary subgraphs created = 1 Final number of subgraphs created are : 1, - Offloaded Nodes - 482, Total Nodes - 482 T 655.61 .... ..... ... .... ..... # 1 . .. T 645.31 .... ..... ... .... ..... ***************** Calibration iteration number 2 completed ************************ ***************** Calibration iteration number 3 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-ort-caffe_squeezenet_v1_1/tempDir/prob_Y_tidl_io_.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 659.74 .... ..... ... .... ..... # 1 . .. Graph Domain TO version : 11TIDL Meta PipeLine (Proto) File : ../../../models/public/ssd-lite_mobilenetv2_fpn.prototxt ssd Warning :: img_w & img_h or img_size is not provided as part of prior_box_param, hence using img_w = 512 and img_h = 512 in prior box decoding Warning :: img_w & img_h or img_size is not provided as part of prior_box_param, hence using img_w = 512 and img_h = 512 in prior box decoding Warning :: img_w & img_h or img_size is not provided as part of prior_box_param, hence using img_w = 512 and img_h = 512 in prior box decoding Warning :: img_w & img_h or img_size is not provided as part of prior_box_param, hence using img_w = 512 and img_h = 512 in prior box decoding Warning :: img_w & img_h or img_size is not provided as part of prior_box_param, hence using img_w = 512 and img_h = 512 in prior box decoding Warning :: img_w & img_h or img_size is not provided as part of prior_box_param, hence using img_w = 512 and img_h = 512 in prior box decoding T 657.32 .... ..... ... .... ..... ***************** Calibration iteration number 3 completed ************************ ***************** Calibration iteration number 4 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ ********** Frame Index 1 : Running float inference ********** Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-ort-caffe_squeezenet_v1_1/tempDir/prob_Y_tidl_io_.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . ..Warning : Requested Output Data Convert Layer is not Added to the network, It is currently not Optimal Warning : Requested Output Data Convert Layer is not Added to the network, It is currently not Optimal ************** Frame index 1 : Running float import ************* INFORMATION: [TIDL_ResizeLayer] Resize_153 Any resize ratio which is power of 2 and greater than 4 will be placed by combination of 4x4 resize layer and 2x2 resize layer. For example a 8x8 resize will be replaced by 4x4 resize followed by 2x2 resize. INFORMATION: [TIDL_ResizeLayer] Resize_156 Any resize ratio which is power of 2 and greater than 4 will be placed by combination of 4x4 resize layer and 2x2 resize layer. For example a 8x8 resize will be replaced by 4x4 resize followed by 2x2 resize. **************************************************** ** 2 WARNINGS 0 ERRORS ** **************************************************** The soft limit is 2048 The hard limit is 2048 MEM: Init ... !!! MEM: Init ... Done !!! 0.0s: VX_ZONE_INIT:Enabled 0.7s: VX_ZONE_ERROR:Enabled 0.9s: VX_ZONE_WARNING:Enabled 0.2114s: VX_ZONE_INIT:[tivxInit:185] Initialization Done !!! T 699.39 .... ..... ... .... ..... # 1 . ..Converted model is valid! T 686.58 .... ..... ... .... ..... ***************** Calibration iteration number 4 completed ************************ Empty prototxt path, running calibration ------------------ Network Compiler Traces ----------------------------- NC running for device: 1 Running with OTF buffer optimizations successful Memory allocation Running shape inference on model ../../../models/public/resnet18_opset9.onnx **************************************************** ** ALL MODEL CHECK PASSED ** **************************************************** Completed_Model : 2, Name : cl-ort-caffe_squeezenet_v1_1 , Total time : 6203.90, Offload Time : 1126.64 , DDR RW MBs : 0, Output File : py_out_cl-ort-caffe_squeezenet_v1_1_ADE_val_00001801.jpg MEM: Deinit ... !!! MEM: Alloc's: 25 alloc's of 47468871 bytes MEM: Free's : 25 free's of 47468871 bytes MEM: Open's : 0 allocs of 0 bytes MEM: Deinit ... Done !!! Preliminary subgraphs created = 1 Final number of subgraphs created are : 1, - Offloaded Nodes - 52, Total Nodes - 52 Graph Domain TO version : 11 ************** Frame index 1 : Running float import ************* **************************************************** ** ALL MODEL CHECK PASSED ** **************************************************** The soft limit is 2048 The hard limit is 2048 MEM: Init ... !!! MEM: Init ... Done !!! 0.0s: VX_ZONE_INIT:Enabled 0.8s: VX_ZONE_ERROR:Enabled 0.10s: VX_ZONE_WARNING:Enabled 0.2174s: VX_ZONE_INIT:[tivxInit:185] Initialization Done !!! ********** Frame Index 1 : Running float inference ********** Graph Domain TO version : 11 ********** Frame Index 2 : Running fixed point mode for calibration ********** Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/ss-ort-deeplabv3lite_mobilenetv2/tempDir/566TIDL_cast_out_tidl_io_.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. ********** Frame Index 1 : Running float inference ********** Graph Domain TO version : 11 ********** Frame Index 2 : Running fixed point mode for calibration ********** Empty prototxt path, running calibration Graph Domain TO version : 11 ********** Frame Index 2 : Running fixed point mode for calibration ********** Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-ort-resnet18-v1/tempDir/191_tidl_io_.qunat_stats_config.txt Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/od-ort-ssd-lite_mobilenetv2_fpn/tempDir/boxeslabels_tidl_io_.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 10363.27 .... ..... ... .... ..... # 1 . .. T 5157.81 .... ..... ... .... ..... # 1 . .. T 7831.49 .... ..... ... .... ..... # 1 . .. T 5086.95 .... ..... ... .... ..... ***************** Calibration iteration number 0 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-ort-resnet18-v1/tempDir/191_tidl_io_.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 2680.96 .... ..... ... .... ..... # 1 . .. T 10182.13 .... ..... ... .... ..... ***************** Calibration iteration number 0 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/ss-ort-deeplabv3lite_mobilenetv2/tempDir/566TIDL_cast_out_tidl_io_.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 7712.55 .... ..... ... .... ..... ***************** Calibration iteration number 0 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/od-ort-ssd-lite_mobilenetv2_fpn/tempDir/boxeslabels_tidl_io_.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 2808.76 .... ..... ... .... ..... ***************** Calibration iteration number 0 completed ************************ ***************** Calibration iteration number 1 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-ort-resnet18-v1/tempDir/191_tidl_io_.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 3563.57 .... ..... ... .... ..... # 1 . .. T 2807.40 .... ..... ... .... ..... # 1 . .. T 5273.24 .... ..... ... .... ..... # 1 . .. T 2772.06 .... ..... ... .... ..... ***************** Calibration iteration number 1 completed ************************ ***************** Calibration iteration number 2 started ************************ Empty prototxt path, running calibration T 3512.93 .... ..... ... .... ..... ***************** Calibration iteration number 0 completed ************************ ***************** Calibration iteration number 1 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/od-ort-ssd-lite_mobilenetv2_fpn/tempDir/boxeslabels_tidl_io_.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-ort-resnet18-v1/tempDir/191_tidl_io_.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 5272.51 .... ..... ... .... ..... ***************** Calibration iteration number 0 completed ************************ ***************** Calibration iteration number 1 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/ss-ort-deeplabv3lite_mobilenetv2/tempDir/566TIDL_cast_out_tidl_io_.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 2729.54 .... ..... ... .... ..... # 1 . .. T 3476.73 .... ..... ... .... ..... # 1 . .. T 2703.87 .... ..... ... .... ..... ***************** Calibration iteration number 2 completed ************************ ***************** Calibration iteration number 3 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-ort-resnet18-v1/tempDir/191_tidl_io_.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 3440.18 .... ..... ... .... ..... ***************** Calibration iteration number 1 completed ************************ ***************** Calibration iteration number 2 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/od-ort-ssd-lite_mobilenetv2_fpn/tempDir/boxeslabels_tidl_io_.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 5224.38 .... ..... ... .... ..... # 1 . .. T 2801.65 .... ..... ... .... ..... # 1 . .. T 3457.18 .... ..... ... .... ..... # 1 . .. T 2786.34 .... ..... ... .... ..... ***************** Calibration iteration number 3 completed ************************ ***************** Calibration iteration number 4 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-ort-resnet18-v1/tempDir/191_tidl_io_.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 5241.85 .... ..... ... .... ..... ***************** Calibration iteration number 1 completed ************************ ***************** Calibration iteration number 2 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/ss-ort-deeplabv3lite_mobilenetv2/tempDir/566TIDL_cast_out_tidl_io_.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 3454.19 .... ..... ... .... ..... ***************** Calibration iteration number 2 completed ************************ ***************** Calibration iteration number 3 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/od-ort-ssd-lite_mobilenetv2_fpn/tempDir/boxeslabels_tidl_io_.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 2757.08 .... ..... ... .... ..... # 1 . .. T 2667.68 .... ..... ... .... ..... T 3477.02 .... ..... ... .... ..... # 1 . .. ***************** Calibration iteration number 4 completed ************************ Empty prototxt path, running calibration ------------------ Network Compiler Traces ----------------------------- NC running for device: 1 Running with OTF buffer optimizations successful Memory allocation **************************************************** ** ALL MODEL CHECK PASSED ** **************************************************** T 5246.92 .... ..... ... .... ..... # 1 . .. Completed_Model : 1, Name : cl-ort-resnet18-v1 , Total time : 26543.77, Offload Time : 5251.80 , DDR RW MBs : 0, Output File : py_out_cl-ort-resnet18-v1_ADE_val_00001801.jpg MEM: Deinit ... !!! MEM: Alloc's: 25 alloc's of 131821285 bytes MEM: Free's : 25 free's of 131821285 bytes MEM: Open's : 0 allocs of 0 bytes MEM: Deinit ... Done !!! T 3471.11 .... ..... ... .... ..... ***************** Calibration iteration number 3 completed ************************ ***************** Calibration iteration number 4 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/od-ort-ssd-lite_mobilenetv2_fpn/tempDir/boxeslabels_tidl_io_.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 5232.05 .... ..... ... .... ..... ***************** Calibration iteration number 2 completed ************************ ***************** Calibration iteration number 3 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/ss-ort-deeplabv3lite_mobilenetv2/tempDir/566TIDL_cast_out_tidl_io_.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 3473.64 .... ..... ... .... ..... # 1 . .. T 3494.36 .... ..... ... .... ..... ***************** Calibration iteration number 4 completed ************************ Empty prototxt path, running calibration ------------------ Network Compiler Traces ----------------------------- NC running for device: 1 Running with OTF buffer optimizations successful Memory allocation INFORMATION: [TIDL_ResizeLayer] Resize_153 Any resize ratio which is power of 2 and greater than 4 will be placed by combination of 4x4 resize layer and 2x2 resize layer. For example a 8x8 resize will be replaced by 4x4 resize followed by 2x2 resize. INFORMATION: [TIDL_ResizeLayer] Resize_156 Any resize ratio which is power of 2 and greater than 4 will be placed by combination of 4x4 resize layer and 2x2 resize layer. For example a 8x8 resize will be replaced by 4x4 resize followed by 2x2 resize. **************************************************** ** 2 WARNINGS 0 ERRORS ** **************************************************** Completed_Model : 4, Name : od-ort-ssd-lite_mobilenetv2_fpn , Total time : 34215.29, Offload Time : 7915.94 , DDR RW MBs : 0, Output File : py_out_od-ort-ssd-lite_mobilenetv2_fpn_ADE_val_00001801.jpg MEM: Deinit ... !!! MEM: Alloc's: 26 alloc's of 260819807 bytes MEM: Free's : 26 free's of 260819807 bytes MEM: Open's : 0 allocs of 0 bytes MEM: Deinit ... Done !!! T 5204.35 .... ..... ... .... ..... # 1 . .. T 5193.03 .... ..... ... .... ..... ***************** Calibration iteration number 3 completed ************************ ***************** Calibration iteration number 4 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/ss-ort-deeplabv3lite_mobilenetv2/tempDir/566TIDL_cast_out_tidl_io_.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 5170.29 .... ..... ... .... ..... # 1 . .. T 5151.52 .... ..... ... .... ..... ***************** Calibration iteration number 4 completed ************************ Empty prototxt path, running calibration ------------------ Network Compiler Traces ----------------------------- NC running for device: 1 Running with OTF buffer optimizations successful Memory allocation INFORMATION: [TIDL_ResizeLayer] 571 Any resize ratio which is power of 2 and greater than 4 will be placed by combination of 4x4 resize layer and 2x2 resize layer. For example a 8x8 resize will be replaced by 4x4 resize followed by 2x2 resize. INFORMATION: [TIDL_ResizeLayer] 576 Any resize ratio which is power of 2 and greater than 4 will be placed by combination of 4x4 resize layer and 2x2 resize layer. For example a 8x8 resize will be replaced by 4x4 resize followed by 2x2 resize. **************************************************** ** 2 WARNINGS 0 ERRORS ** **************************************************** Completed_Model : 3, Name : ss-ort-deeplabv3lite_mobilenetv2 , Total time : 47845.08, Offload Time : 10569.44 , DDR RW MBs : 0, Output File : py_out_ss-ort-deeplabv3lite_mobilenetv2_ADE_val_00001801.jpg MEM: Deinit ... !!! MEM: Alloc's: 25 alloc's of 393054601 bytes MEM: Free's : 25 free's of 393054601 bytes MEM: Open's : 0 allocs of 0 bytes MEM: Deinit ... Done !!! run python3 onnxrt_ep.py Available execution providers : ['TIDLExecutionProvider', 'TIDLCompilationProvider', 'CPUExecutionProvider'] Running 4 Models - ['cl-ort-resnet18-v1', 'cl-ort-caffe_squeezenet_v1_1', 'ss-ort-deeplabv3lite_mobilenetv2', 'od-ort-ssd-lite_mobilenetv2_fpn'] Running_Model : cl-ort-resnet18-v1 Running_Model : cl-ort-caffe_squeezenet_v1_1 Running_Model : ss-ort-deeplabv3lite_mobilenetv2 Running_Model : od-ort-ssd-lite_mobilenetv2_fpn libtidl_onnxrt_EP loaded 0x55bcf4673640 libtidl_onnxrt_EP loaded 0x55bcf4873810 Final number of subgraphs created are : 1, - Offloaded Nodes - 68, Total Nodes - 68 libtidl_onnxrt_EP loaded 0x55bcf4f96af0 The soft limit is 2048 The hard limit is 2048 MEM: Init ... !!! MEM: Init ... Done !!! 0.0s: VX_ZONE_INIT:Enabled 0.13s: VX_ZONE_ERROR:Enabled 0.15s: VX_ZONE_WARNING:Enabled 0.2868s: VX_ZONE_INIT:[tivxInit:185] Initialization Done !!! libtidl_onnxrt_EP loaded 0x55bcf470f5b0 Final number of subgraphs created are : 1, - Offloaded Nodes - 124, Total Nodes - 124 The soft limit is 2048 The hard limit is 2048 MEM: Init ... !!! MEM: Init ... Done !!! 0.0s: VX_ZONE_INIT:Enabled 0.12s: VX_ZONE_ERROR:Enabled 0.14s: VX_ZONE_WARNING:Enabled 0.2457s: VX_ZONE_INIT:[tivxInit:185] Initialization Done !!! Final number of subgraphs created are : 1, - Offloaded Nodes - 482, Total Nodes - 482 The soft limit is 2048 The hard limit is 2048 MEM: Init ... !!! MEM: Init ... Done !!! 0.0s: VX_ZONE_INIT:Enabled 0.11s: VX_ZONE_ERROR:Enabled 0.13s: VX_ZONE_WARNING:Enabled 0.2152s: VX_ZONE_INIT:[tivxInit:185] Initialization Done !!! Final number of subgraphs created are : 1, - Offloaded Nodes - 52, Total Nodes - 52 The soft limit is 2048 The hard limit is 2048 MEM: Init ... !!! MEM: Init ... Done !!! 0.0s: VX_ZONE_INIT:Enabled 0.12s: VX_ZONE_ERROR:Enabled 0.16s: VX_ZONE_WARNING:Enabled 0.2216s: VX_ZONE_INIT:[tivxInit:185] Initialization Done !!! , 0 0.573572 warplane, military plane ,, 1 0.219571 aircraft carrier, carrier, flattop, attack aircraft carrier ,, 2 0.120485 airliner ,, 3 0.040936 projectile, missile ,, 4 0.028537 missile , Saving image to ../../../output_images/ Completed_Model : 2, Name : cl-ort-caffe_squeezenet_v1_1 , Total time : 967.07, Offload Time : 966.96 , DDR RW MBs : 0, Output File : py_out_cl-ort-caffe_squeezenet_v1_1_airshow.jpg MEM: Deinit ... !!! MEM: Alloc's: 25 alloc's of 21882394 bytes MEM: Free's : 25 free's of 21882394 bytes MEM: Open's : 0 allocs of 0 bytes MEM: Deinit ... Done !!! , 0 23.847309 warplane, military plane ,, 1 22.507572 aircraft carrier, carrier, flattop, attack aircraft carrier ,, 2 19.024258 projectile, missile ,, 3 18.756310 missile ,, 4 15.808890 airliner , Saving image to ../../../output_images/ Completed_Model : 1, Name : cl-ort-resnet18-v1 , Total time : 4553.37, Offload Time : 4553.31 , DDR RW MBs : 0, Output File : py_out_cl-ort-resnet18-v1_airshow.jpg MEM: Deinit ... !!! MEM: Alloc's: 25 alloc's of 54570233 bytes MEM: Free's : 25 free's of 54570233 bytes MEM: Open's : 0 allocs of 0 bytes MEM: Deinit ... Done !!! 2 Saving image to ../../../output_images/ Completed_Model : 4, Name : od-ort-ssd-lite_mobilenetv2_fpn , Total time : 5836.29, Offload Time : 5836.18 , DDR RW MBs : 0, Output File : py_out_od-ort-ssd-lite_mobilenetv2_fpn_ADE_val_00001801.jpg MEM: Deinit ... !!! MEM: Alloc's: 26 alloc's of 106091655 bytes MEM: Free's : 26 free's of 106091655 bytes MEM: Open's : 0 allocs of 0 bytes MEM: Deinit ... Done !!! Saving image to ../../../output_images/ Completed_Model : 3, Name : ss-ort-deeplabv3lite_mobilenetv2 , Total time : 7490.21, Offload Time : 7490.09 , DDR RW MBs : 0, Output File : py_out_ss-ort-deeplabv3lite_mobilenetv2_ADE_val_00001801.jpg MEM: Deinit ... !!! MEM: Alloc's: 25 alloc's of 110729253 bytes MEM: Free's : 25 free's of 110729253 bytes MEM: Open's : 0 allocs of 0 bytes MEM: Deinit ... Done !!! Downloading ../../../models/public/mobilenetv2-1.0.onnx Converted model is valid! ../../../models/public/mobilenetv2-1.0.onnx Generating subgraph boundary tensors for calibration... Building graph on host for tensor data collection... Running graph on host for tensor data collection... Importing subgraph into TIDL... Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-onnx_mobilenetv2/tempDir/tidl_import_subgraph0.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 865.52 .... ..... ... .... ..... # 1 . .. T 860.51 .... ..... ... .... ..... ***************** Calibration iteration number 0 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-onnx_mobilenetv2/tempDir/tidl_import_subgraph0.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 391.33 .... ..... ... .... ..... # 1 . .. T 391.04 .... ..... ... .... ..... ***************** Calibration iteration number 0 completed ************************ ***************** Calibration iteration number 1 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-onnx_mobilenetv2/tempDir/tidl_import_subgraph0.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 402.90 .... ..... ... .... ..... # 1 . .. T 384.91 .... ..... ... .... ..... ***************** Calibration iteration number 1 completed ************************ ***************** Calibration iteration number 2 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-onnx_mobilenetv2/tempDir/tidl_import_subgraph0.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 383.92 .... ..... ... .... ..... # 1 . .. T 383.06 .... ..... ... .... ..... ***************** Calibration iteration number 2 completed ************************ ***************** Calibration iteration number 3 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-onnx_mobilenetv2/tempDir/tidl_import_subgraph0.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 396.79 .... ..... ... .... ..... # 1 . .. T 395.27 .... ..... ... .... ..... ***************** Calibration iteration number 3 completed ************************ ***************** Calibration iteration number 4 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-onnx_mobilenetv2/tempDir/tidl_import_subgraph0.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 386.59 .... ..... ... .... ..... # 1 . .. T 383.18 .... ..... ... .... ..... ***************** Calibration iteration number 4 completed ************************ ***************** Calibration iteration number 5 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-onnx_mobilenetv2/tempDir/tidl_import_subgraph0.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 391.49 .... ..... ... .... ..... # 1 . .. T 390.23 .... ..... ... .... ..... ***************** Calibration iteration number 5 completed ************************ ***************** Calibration iteration number 6 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-onnx_mobilenetv2/tempDir/tidl_import_subgraph0.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 388.11 .... ..... ... .... ..... # 1 . .. T 387.63 .... ..... ... .... ..... ***************** Calibration iteration number 6 completed ************************ ***************** Calibration iteration number 7 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-onnx_mobilenetv2/tempDir/tidl_import_subgraph0.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 391.80 .... ..... ... .... ..... # 1 . .. T 400.18 .... ..... ... .... ..... ***************** Calibration iteration number 7 completed ************************ ***************** Calibration iteration number 8 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-onnx_mobilenetv2/tempDir/tidl_import_subgraph0.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 397.04 .... ..... ... .... ..... # 1 . .. T 392.34 .... ..... ... .... ..... ***************** Calibration iteration number 8 completed ************************ ***************** Calibration iteration number 9 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-onnx_mobilenetv2/tempDir/tidl_import_subgraph0.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 403.46 .... ..... ... .... ..... # 1 . .. T 391.03 .... ..... ... .... ..... ***************** Calibration iteration number 9 completed ************************ Empty prototxt path, running calibration ------------------ Network Compiler Traces ----------------------------- NC running for device: 1 Running with OTF buffer optimizations successful Memory allocation **************************************************** ** ALL MODEL CHECK PASSED ** **************************************************** TIDL import of 1 Relay IR subgraphs succeeded. TIDL artifacts are stored at ../../../model-artifacts/cl-dlr-onnx_mobilenetv2 /home/root/edgeai-tidl-tools_91/examples/osrt_python/tvm_dlr/tvm_compilation_onnx_example.py:167: DeprecationWarning: legacy graph executor behavior of producing json / lib / params will be removed in the next release. Please see documents of tvm.contrib.graph_executor.GraphModule for the new recommended usage. graph, lib, params = relay.build_module.build(mod, target=build_target, params=params) Downloading ../../../models/public/inception_v3.tflite Traceback (most recent call last): File "/usr/local/lib/python3.10/dist-packages/urllib3/connectionpool.py", line 467, in _make_request self._validate_conn(conn) File "/usr/local/lib/python3.10/dist-packages/urllib3/connectionpool.py", line 1096, in _validate_conn conn.connect() File "/usr/local/lib/python3.10/dist-packages/urllib3/connection.py", line 642, in connect sock_and_verified = _ssl_wrap_socket_and_match_hostname( File "/usr/local/lib/python3.10/dist-packages/urllib3/connection.py", line 782, in _ssl_wrap_socket_and_match_hostname ssl_sock = ssl_wrap_socket( File "/usr/local/lib/python3.10/dist-packages/urllib3/util/ssl_.py", line 470, in ssl_wrap_socket ssl_sock = _ssl_wrap_socket_impl(sock, context, tls_in_tls, server_hostname) File "/usr/local/lib/python3.10/dist-packages/urllib3/util/ssl_.py", line 514, in _ssl_wrap_socket_impl return ssl_context.wrap_socket(sock, server_hostname=server_hostname) File "/usr/lib/python3.10/ssl.py", line 513, in wrap_socket return self.sslsocket_class._create( File "/usr/lib/python3.10/ssl.py", line 1071, in _create self.do_handshake() File "/usr/lib/python3.10/ssl.py", line 1342, in do_handshake self._sslobj.do_handshake() ssl.SSLError: [SSL: WRONG_VERSION_NUMBER] wrong version number (_ssl.c:1007) During handling of the above exception, another exception occurred: Traceback (most recent call last): File "/usr/local/lib/python3.10/dist-packages/urllib3/connectionpool.py", line 790, in urlopen response = self._make_request( File "/usr/local/lib/python3.10/dist-packages/urllib3/connectionpool.py", line 491, in _make_request raise new_e urllib3.exceptions.SSLError: [SSL: WRONG_VERSION_NUMBER] wrong version number (_ssl.c:1007) The above exception was the direct cause of the following exception: Traceback (most recent call last): File "/usr/local/lib/python3.10/dist-packages/requests/adapters.py", line 486, in send resp = conn.urlopen( File "/usr/local/lib/python3.10/dist-packages/urllib3/connectionpool.py", line 844, in urlopen retries = retries.increment( File "/usr/local/lib/python3.10/dist-packages/urllib3/util/retry.py", line 515, in increment raise MaxRetryError(_pool, url, reason) from reason # type: ignore[arg-type] urllib3.exceptions.MaxRetryError: HTTPSConnectionPool(host='tfhub.dev', port=443): Max retries exceeded with url: /tensorflow/lite-model/inception_v3/1/default/1?lite-format=tflite (Caused by SSLError(SSLError(1, '[SSL: WRONG_VERSION_NUMBER] wrong version number (_ssl.c:1007)'))) During handling of the above exception, another exception occurred: Traceback (most recent call last): File "/home/root/edgeai-tidl-tools_91/examples/osrt_python/tvm_dlr/tvm_compilation_tflite_example.py", line 21, in download_model(models_configs, model_id) File "/home/root/edgeai-tidl-tools_91/examples/osrt_python/common_utils.py", line 193, in download_model r = requests.get(get_url_from_link_file(model_source['model_url']), allow_redirects=True, headers=headers) File "/usr/local/lib/python3.10/dist-packages/requests/api.py", line 73, in get return request("get", url, params=params, **kwargs) File "/usr/local/lib/python3.10/dist-packages/requests/api.py", line 59, in request return session.request(method=method, url=url, **kwargs) File "/usr/local/lib/python3.10/dist-packages/requests/sessions.py", line 589, in request resp = self.send(prep, **send_kwargs) File "/usr/local/lib/python3.10/dist-packages/requests/sessions.py", line 703, in send r = adapter.send(request, **kwargs) File "/usr/local/lib/python3.10/dist-packages/requests/adapters.py", line 517, in send raise SSLError(e, request=request) requests.exceptions.SSLError: HTTPSConnectionPool(host='tfhub.dev', port=443): Max retries exceeded with url: /tensorflow/lite-model/inception_v3/1/default/1?lite-format=tflite (Caused by SSLError(SSLError(1, '[SSL: WRONG_VERSION_NUMBER] wrong version number (_ssl.c:1007)'))) ../../../models/public/mobilenetv2-1.0.onnx Generating subgraph boundary tensors for calibration... Building graph on host for tensor data collection... Running graph on host for tensor data collection... Importing subgraph into TIDL... Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-onnx_mobilenetv2_device/tempDir/tidl_import_subgraph0.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 866.68 .... ..... ... .... ..... # 1 . .. T 868.38 .... ..... ... .... ..... ***************** Calibration iteration number 0 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-onnx_mobilenetv2_device/tempDir/tidl_import_subgraph0.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 400.09 .... ..... ... .... ..... # 1 . .. T 394.77 .... ..... ... .... ..... ***************** Calibration iteration number 0 completed ************************ ***************** Calibration iteration number 1 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-onnx_mobilenetv2_device/tempDir/tidl_import_subgraph0.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 391.95 .... ..... ... .... ..... # 1 . .. T 382.87 .... ..... ... .... ..... ***************** Calibration iteration number 1 completed ************************ ***************** Calibration iteration number 2 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-onnx_mobilenetv2_device/tempDir/tidl_import_subgraph0.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 404.82 .... ..... ... .... ..... # 1 . .. T 393.60 .... ..... ... .... ..... ***************** Calibration iteration number 2 completed ************************ ***************** Calibration iteration number 3 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-onnx_mobilenetv2_device/tempDir/tidl_import_subgraph0.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 410.85 .... ..... ... .... ..... # 1 . .. T 393.78 .... ..... ... .... ..... ***************** Calibration iteration number 3 completed ************************ ***************** Calibration iteration number 4 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-onnx_mobilenetv2_device/tempDir/tidl_import_subgraph0.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 414.47 .... ..... ... .... ..... # 1 . .. T 389.25 .... ..... ... .... ..... ***************** Calibration iteration number 4 completed ************************ ***************** Calibration iteration number 5 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-onnx_mobilenetv2_device/tempDir/tidl_import_subgraph0.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 401.40 .... ..... ... .... ..... # 1 . .. T 393.39 .... ..... ... .... ..... ***************** Calibration iteration number 5 completed ************************ ***************** Calibration iteration number 6 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-onnx_mobilenetv2_device/tempDir/tidl_import_subgraph0.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 398.34 .... ..... ... .... ..... # 1 . .. T 391.23 .... ..... ... .... ..... ***************** Calibration iteration number 6 completed ************************ ***************** Calibration iteration number 7 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-onnx_mobilenetv2_device/tempDir/tidl_import_subgraph0.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 407.85 .... ..... ... .... ..... # 1 . .. T 403.19 .... ..... ... .... ..... ***************** Calibration iteration number 7 completed ************************ ***************** Calibration iteration number 8 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-onnx_mobilenetv2_device/tempDir/tidl_import_subgraph0.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 401.09 .... ..... ... .... ..... # 1 . .. T 398.38 .... ..... ... .... ..... ***************** Calibration iteration number 8 completed ************************ ***************** Calibration iteration number 9 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-onnx_mobilenetv2_device/tempDir/tidl_import_subgraph0.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 389.64 .... ..... ... .... ..... # 1 . .. T 391.79 .... ..... ... .... ..... ***************** Calibration iteration number 9 completed ************************ Empty prototxt path, running calibration ------------------ Network Compiler Traces ----------------------------- NC running for device: 1 Running with OTF buffer optimizations successful Memory allocation **************************************************** ** ALL MODEL CHECK PASSED ** **************************************************** TIDL import of 1 Relay IR subgraphs succeeded. TIDL artifacts are stored at ../../../model-artifacts/cl-dlr-onnx_mobilenetv2_device /home/root/edgeai-tidl-tools_91/examples/osrt_python/tvm_dlr/tvm_compilation_onnx_example.py:167: DeprecationWarning: legacy graph executor behavior of producing json / lib / params will be removed in the next release. Please see documents of tvm.contrib.graph_executor.GraphModule for the new recommended usage. graph, lib, params = relay.build_module.build(mod, target=build_target, params=params) Downloading ../../../models/public/inception_v3.tflite Traceback (most recent call last): File "/usr/local/lib/python3.10/dist-packages/urllib3/connectionpool.py", line 467, in _make_request self._validate_conn(conn) File "/usr/local/lib/python3.10/dist-packages/urllib3/connectionpool.py", line 1096, in _validate_conn conn.connect() File "/usr/local/lib/python3.10/dist-packages/urllib3/connection.py", line 642, in connect sock_and_verified = _ssl_wrap_socket_and_match_hostname( File "/usr/local/lib/python3.10/dist-packages/urllib3/connection.py", line 782, in _ssl_wrap_socket_and_match_hostname ssl_sock = ssl_wrap_socket( File "/usr/local/lib/python3.10/dist-packages/urllib3/util/ssl_.py", line 470, in ssl_wrap_socket ssl_sock = _ssl_wrap_socket_impl(sock, context, tls_in_tls, server_hostname) File "/usr/local/lib/python3.10/dist-packages/urllib3/util/ssl_.py", line 514, in _ssl_wrap_socket_impl return ssl_context.wrap_socket(sock, server_hostname=server_hostname) File "/usr/lib/python3.10/ssl.py", line 513, in wrap_socket return self.sslsocket_class._create( File "/usr/lib/python3.10/ssl.py", line 1071, in _create self.do_handshake() File "/usr/lib/python3.10/ssl.py", line 1342, in do_handshake self._sslobj.do_handshake() ssl.SSLError: [SSL: WRONG_VERSION_NUMBER] wrong version number (_ssl.c:1007) During handling of the above exception, another exception occurred: Traceback (most recent call last): File "/usr/local/lib/python3.10/dist-packages/urllib3/connectionpool.py", line 790, in urlopen response = self._make_request( File "/usr/local/lib/python3.10/dist-packages/urllib3/connectionpool.py", line 491, in _make_request raise new_e urllib3.exceptions.SSLError: [SSL: WRONG_VERSION_NUMBER] wrong version number (_ssl.c:1007) The above exception was the direct cause of the following exception: Traceback (most recent call last): File "/usr/local/lib/python3.10/dist-packages/requests/adapters.py", line 486, in send resp = conn.urlopen( File "/usr/local/lib/python3.10/dist-packages/urllib3/connectionpool.py", line 844, in urlopen retries = retries.increment( File "/usr/local/lib/python3.10/dist-packages/urllib3/util/retry.py", line 515, in increment raise MaxRetryError(_pool, url, reason) from reason # type: ignore[arg-type] urllib3.exceptions.MaxRetryError: HTTPSConnectionPool(host='tfhub.dev', port=443): Max retries exceeded with url: /tensorflow/lite-model/inception_v3/1/default/1?lite-format=tflite (Caused by SSLError(SSLError(1, '[SSL: WRONG_VERSION_NUMBER] wrong version number (_ssl.c:1007)'))) During handling of the above exception, another exception occurred: Traceback (most recent call last): File "/home/root/edgeai-tidl-tools_91/examples/osrt_python/tvm_dlr/tvm_compilation_tflite_example.py", line 21, in download_model(models_configs, model_id) File "/home/root/edgeai-tidl-tools_91/examples/osrt_python/common_utils.py", line 193, in download_model r = requests.get(get_url_from_link_file(model_source['model_url']), allow_redirects=True, headers=headers) File "/usr/local/lib/python3.10/dist-packages/requests/api.py", line 73, in get return request("get", url, params=params, **kwargs) File "/usr/local/lib/python3.10/dist-packages/requests/api.py", line 59, in request return session.request(method=method, url=url, **kwargs) File "/usr/local/lib/python3.10/dist-packages/requests/sessions.py", line 589, in request resp = self.send(prep, **send_kwargs) File "/usr/local/lib/python3.10/dist-packages/requests/sessions.py", line 703, in send r = adapter.send(request, **kwargs) File "/usr/local/lib/python3.10/dist-packages/requests/adapters.py", line 517, in send raise SSLError(e, request=request) requests.exceptions.SSLError: HTTPSConnectionPool(host='tfhub.dev', port=443): Max retries exceeded with url: /tensorflow/lite-model/inception_v3/1/default/1?lite-format=tflite (Caused by SSLError(SSLError(1, '[SSL: WRONG_VERSION_NUMBER] wrong version number (_ssl.c:1007)'))) ../../../models/public/mobilenetv3_large_100.onnx /usr/local/lib/python3.10/dist-packages/torchvision/models/_utils.py:208: UserWarning: The parameter 'pretrained' is deprecated since 0.13 and may be removed in the future, please use 'weights' instead. warnings.warn( /usr/local/lib/python3.10/dist-packages/torchvision/models/_utils.py:223: UserWarning: Arguments other than a weight enum or `None` for 'weights' are deprecated since 0.13 and may be removed in the future. The current behavior is equivalent to passing `weights=MobileNet_V3_Large_Weights.IMAGENET1K_V1`. You can also use `weights=MobileNet_V3_Large_Weights.DEFAULT` to get the most up-to-date weights. warnings.warn(msg) Downloading: "https://download.pytorch.org/models/mobilenet_v3_large-8738ca79.pth" to /root/.cache/torch/hub/checkpoints/mobilenet_v3_large-8738ca79.pth 100%|█████████████████████████████████████████████████████████████████████████████████████████████████████████████████████████████████████| 21.1M/21.1M [00:00<00:00, 42.4MB/s] Generating subgraph boundary tensors for calibration... Building graph on host for tensor data collection... Running graph on host for tensor data collection... Importing subgraph into TIDL... Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-timm_mobilenetv3_large_100_device/tempDir/tidl_import_subgraph0.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 1.29 .... ..... ... .... ..... # 1 . .. T 1.18 .... ..... ... .... ..... ***************** Calibration iteration number 0 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-timm_mobilenetv3_large_100_device/tempDir/tidl_import_subgraph0.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 1.54 .... ..... ... .... ..... # 1 . .. T 1.45 .... ..... ... .... ..... ***************** Calibration iteration number 0 completed ************************ Empty prototxt path, running calibration ------------------ Network Compiler Traces ----------------------------- NC running for device: 1 Running with OTF buffer optimizations successful Memory allocation SUGGESTION: [TIDL_BatchNormLayer] tidl_0_2 16 bits is not optimal in this release. **************************************************** ** 1 WARNINGS 0 ERRORS ** **************************************************** Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-timm_mobilenetv3_large_100_device/tempDir/tidl_import_subgraph1.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 43.10 .... ..... ... .... ..... # 1 . .. T 42.60 .... ..... ... .... ..... ***************** Calibration iteration number 0 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-timm_mobilenetv3_large_100_device/tempDir/tidl_import_subgraph1.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 30.20 .... ..... ... .... ..... # 1 . .. T 30.01 .... ..... ... .... ..... ***************** Calibration iteration number 0 completed ************************ Empty prototxt path, running calibration ------------------ Network Compiler Traces ----------------------------- NC running for device: 1 Running with OTF buffer optimizations successful Memory allocation SUGGESTION: [TIDL_BatchNormLayer] tidl_1_14 16 bits is not optimal in this release. **************************************************** ** 1 WARNINGS 0 ERRORS ** **************************************************** Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-timm_mobilenetv3_large_100_device/tempDir/tidl_import_subgraph2.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 47.32 .... ..... ... .... ..... # 1 . .. T 46.99 .... ..... ... .... ..... ***************** Calibration iteration number 0 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-timm_mobilenetv3_large_100_device/tempDir/tidl_import_subgraph2.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 33.40 .... ..... ... .... ..... # 1 . .. T 32.80 .... ..... ... .... ..... ***************** Calibration iteration number 0 completed ************************ Empty prototxt path, running calibration ------------------ Network Compiler Traces ----------------------------- NC running for device: 1 Running with OTF buffer optimizations successful Memory allocation SUGGESTION: [TIDL_BatchNormLayer] tidl_2_14 16 bits is not optimal in this release. SUGGESTION: [TIDL_BatchNormLayer] tidl_2_24 16 bits is not optimal in this release. **************************************************** ** 2 WARNINGS 0 ERRORS ** **************************************************** Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-timm_mobilenetv3_large_100_device/tempDir/tidl_import_subgraph3.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 41.44 .... ..... ... .... ..... # 1 . .. T 40.91 .... ..... ... .... ..... ***************** Calibration iteration number 0 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-timm_mobilenetv3_large_100_device/tempDir/tidl_import_subgraph3.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 28.59 .... ..... ... .... ..... # 1 . .. T 28.37 .... ..... ... .... ..... ***************** Calibration iteration number 0 completed ************************ Empty prototxt path, running calibration ------------------ Network Compiler Traces ----------------------------- NC running for device: 1 Running with OTF buffer optimizations successful Memory allocation SUGGESTION: [TIDL_BatchNormLayer] tidl_3_12 16 bits is not optimal in this release. SUGGESTION: [TIDL_BatchNormLayer] tidl_3_22 16 bits is not optimal in this release. **************************************************** ** 2 WARNINGS 0 ERRORS ** **************************************************** Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-timm_mobilenetv3_large_100_device/tempDir/tidl_import_subgraph4.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 88.50 .... ..... ... .... ..... # 1 . .. T 86.83 .... ..... ... .... ..... ***************** Calibration iteration number 0 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-timm_mobilenetv3_large_100_device/tempDir/tidl_import_subgraph4.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 60.40 .... ..... ... .... ..... # 1 . .. T 59.65 .... ..... ... .... ..... ***************** Calibration iteration number 0 completed ************************ Empty prototxt path, running calibration ------------------ Network Compiler Traces ----------------------------- NC running for device: 1 Running with OTF buffer optimizations successful Memory allocation SUGGESTION: [TIDL_BatchNormLayer] tidl_4_14 16 bits is not optimal in this release. SUGGESTION: [TIDL_BatchNormLayer] tidl_4_24 16 bits is not optimal in this release. **************************************************** ** 2 WARNINGS 0 ERRORS ** **************************************************** Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-timm_mobilenetv3_large_100_device/tempDir/tidl_import_subgraph5.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 78.66 .... ..... ... .... ..... # 1 . .. T 78.47 .... ..... ... .... ..... ***************** Calibration iteration number 0 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-timm_mobilenetv3_large_100_device/tempDir/tidl_import_subgraph5.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 49.65 .... ..... ... .... ..... # 1 . .. T 49.18 .... ..... ... .... ..... ***************** Calibration iteration number 0 completed ************************ Empty prototxt path, running calibration ------------------ Network Compiler Traces ----------------------------- NC running for device: 1 Running with OTF buffer optimizations successful Memory allocation SUGGESTION: [TIDL_BatchNormLayer] tidl_5_12 16 bits is not optimal in this release. SUGGESTION: [TIDL_BatchNormLayer] tidl_5_22 16 bits is not optimal in this release. **************************************************** ** 2 WARNINGS 0 ERRORS ** **************************************************** Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-timm_mobilenetv3_large_100_device/tempDir/tidl_import_subgraph6.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 130.06 .... ..... ... .... ..... # 1 . .. T 125.81 .... ..... ... .... ..... ***************** Calibration iteration number 0 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-timm_mobilenetv3_large_100_device/tempDir/tidl_import_subgraph6.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 91.09 .... ..... ... .... ..... # 1 . .. T 89.70 .... ..... ... .... ..... ***************** Calibration iteration number 0 completed ************************ Empty prototxt path, running calibration ------------------ Network Compiler Traces ----------------------------- NC running for device: 1 Running with OTF buffer optimizations successful Memory allocation SUGGESTION: [TIDL_BatchNormLayer] tidl_6_14 16 bits is not optimal in this release. SUGGESTION: [TIDL_BatchNormLayer] tidl_6_24 16 bits is not optimal in this release. SUGGESTION: [TIDL_BatchNormLayer] tidl_6_38 16 bits is not optimal in this release. SUGGESTION: [TIDL_BatchNormLayer] tidl_6_48 16 bits is not optimal in this release. SUGGESTION: [TIDL_BatchNormLayer] tidl_6_63 16 bits is not optimal in this release. SUGGESTION: [TIDL_BatchNormLayer] tidl_6_73 16 bits is not optimal in this release. SUGGESTION: [TIDL_BatchNormLayer] tidl_6_88 16 bits is not optimal in this release. SUGGESTION: [TIDL_BatchNormLayer] tidl_6_98 16 bits is not optimal in this release. SUGGESTION: [TIDL_BatchNormLayer] tidl_6_113 16 bits is not optimal in this release. SUGGESTION: [TIDL_BatchNormLayer] tidl_6_123 16 bits is not optimal in this release. **************************************************** ** 10 WARNINGS 0 ERRORS ** **************************************************** Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-timm_mobilenetv3_large_100_device/tempDir/tidl_import_subgraph7.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 28.97 .... ..... ... .... ..... # 1 . .. T 28.37 .... ..... ... .... ..... ***************** Calibration iteration number 0 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-timm_mobilenetv3_large_100_device/tempDir/tidl_import_subgraph7.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 20.99 .... ..... ... .... ..... # 1 . .. T 20.31 .... ..... ... .... ..... ***************** Calibration iteration number 0 completed ************************ Empty prototxt path, running calibration ------------------ Network Compiler Traces ----------------------------- NC running for device: 1 Running with OTF buffer optimizations successful Memory allocation **************************************************** ** ALL MODEL CHECK PASSED ** **************************************************** Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-timm_mobilenetv3_large_100_device/tempDir/tidl_import_subgraph8.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 24.98 .... ..... ... .... ..... # 1 . .. T 24.39 .... ..... ... .... ..... ***************** Calibration iteration number 0 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-timm_mobilenetv3_large_100_device/tempDir/tidl_import_subgraph8.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 16.39 .... ..... ... .... ..... # 1 . .. T 15.84 .... ..... ... .... ..... ***************** Calibration iteration number 0 completed ************************ Empty prototxt path, running calibration ------------------ Network Compiler Traces ----------------------------- NC running for device: 1 Running with OTF buffer optimizations successful Memory allocation **************************************************** ** ALL MODEL CHECK PASSED ** **************************************************** Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-timm_mobilenetv3_large_100_device/tempDir/tidl_import_subgraph9.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 153.77 .... ..... ... .... ..... # 1 . .. T 147.64 .... ..... ... .... ..... ***************** Calibration iteration number 0 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-timm_mobilenetv3_large_100_device/tempDir/tidl_import_subgraph9.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 114.13 .... ..... ... .... ..... # 1 . .. T 109.58 .... ..... ... .... ..... ***************** Calibration iteration number 0 completed ************************ Empty prototxt path, running calibration ------------------ Network Compiler Traces ----------------------------- NC running for device: 1 Running with OTF buffer optimizations successful Memory allocation SUGGESTION: [TIDL_BatchNormLayer] tidl_9_8 16 bits is not optimal in this release. **************************************************** ** 1 WARNINGS 0 ERRORS ** **************************************************** TIDL import of 10 Relay IR subgraphs succeeded. TIDL artifacts are stored at ../../../model-artifacts/cl-dlr-timm_mobilenetv3_large_100_device /home/root/edgeai-tidl-tools_91/examples/osrt_python/tvm_dlr/tvm_compilation_timm_example.py:175: DeprecationWarning: legacy graph executor behavior of producing json / lib / params will be removed in the next release. Please see documents of tvm.contrib.graph_executor.GraphModule for the new recommended usage. graph, lib, params = relay.build_module.build(mod, target=build_target, params=params) Generating subgraph boundary tensors for calibration... Building graph on host for tensor data collection... Running graph on host for tensor data collection... Importing subgraph into TIDL... Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-timm_mobilenetv3_large_100_device_c7x/tempDir/tidl_import_subgraph0.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 1.56 .... ..... ... .... ..... # 1 . .. T 1.24 .... ..... ... .... ..... ***************** Calibration iteration number 0 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-timm_mobilenetv3_large_100_device_c7x/tempDir/tidl_import_subgraph0.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 1.57 .... ..... ... .... ..... # 1 . .. T 1.46 .... ..... ... .... ..... ***************** Calibration iteration number 0 completed ************************ Empty prototxt path, running calibration ------------------ Network Compiler Traces ----------------------------- NC running for device: 1 Running with OTF buffer optimizations successful Memory allocation SUGGESTION: [TIDL_BatchNormLayer] tidl_0_2 16 bits is not optimal in this release. **************************************************** ** 1 WARNINGS 0 ERRORS ** **************************************************** Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-timm_mobilenetv3_large_100_device_c7x/tempDir/tidl_import_subgraph1.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 43.71 .... ..... ... .... ..... # 1 . .. T 43.30 .... ..... ... .... ..... ***************** Calibration iteration number 0 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-timm_mobilenetv3_large_100_device_c7x/tempDir/tidl_import_subgraph1.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 30.19 .... ..... ... .... ..... # 1 . .. T 29.88 .... ..... ... .... ..... ***************** Calibration iteration number 0 completed ************************ Empty prototxt path, running calibration ------------------ Network Compiler Traces ----------------------------- NC running for device: 1 Running with OTF buffer optimizations successful Memory allocation SUGGESTION: [TIDL_BatchNormLayer] tidl_1_14 16 bits is not optimal in this release. **************************************************** ** 1 WARNINGS 0 ERRORS ** **************************************************** Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-timm_mobilenetv3_large_100_device_c7x/tempDir/tidl_import_subgraph2.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 48.09 .... ..... ... .... ..... # 1 . .. T 47.48 .... ..... ... .... ..... ***************** Calibration iteration number 0 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-timm_mobilenetv3_large_100_device_c7x/tempDir/tidl_import_subgraph2.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 32.83 .... ..... ... .... ..... # 1 . .. T 32.64 .... ..... ... .... ..... ***************** Calibration iteration number 0 completed ************************ Empty prototxt path, running calibration ------------------ Network Compiler Traces ----------------------------- NC running for device: 1 Running with OTF buffer optimizations successful Memory allocation SUGGESTION: [TIDL_BatchNormLayer] tidl_2_14 16 bits is not optimal in this release. SUGGESTION: [TIDL_BatchNormLayer] tidl_2_24 16 bits is not optimal in this release. **************************************************** ** 2 WARNINGS 0 ERRORS ** **************************************************** Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-timm_mobilenetv3_large_100_device_c7x/tempDir/tidl_import_subgraph3.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 41.90 .... ..... ... .... ..... # 1 . .. T 41.52 .... ..... ... .... ..... ***************** Calibration iteration number 0 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-timm_mobilenetv3_large_100_device_c7x/tempDir/tidl_import_subgraph3.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 29.05 .... ..... ... .... ..... # 1 . .. T 28.91 .... ..... ... .... ..... ***************** Calibration iteration number 0 completed ************************ Empty prototxt path, running calibration ------------------ Network Compiler Traces ----------------------------- NC running for device: 1 Running with OTF buffer optimizations successful Memory allocation SUGGESTION: [TIDL_BatchNormLayer] tidl_3_12 16 bits is not optimal in this release. SUGGESTION: [TIDL_BatchNormLayer] tidl_3_22 16 bits is not optimal in this release. **************************************************** ** 2 WARNINGS 0 ERRORS ** **************************************************** Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-timm_mobilenetv3_large_100_device_c7x/tempDir/tidl_import_subgraph4.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 87.67 .... ..... ... .... ..... # 1 . .. T 86.56 .... ..... ... .... ..... ***************** Calibration iteration number 0 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-timm_mobilenetv3_large_100_device_c7x/tempDir/tidl_import_subgraph4.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 60.70 .... ..... ... .... ..... # 1 . .. T 60.09 .... ..... ... .... ..... ***************** Calibration iteration number 0 completed ************************ Empty prototxt path, running calibration ------------------ Network Compiler Traces ----------------------------- NC running for device: 1 Running with OTF buffer optimizations successful Memory allocation SUGGESTION: [TIDL_BatchNormLayer] tidl_4_14 16 bits is not optimal in this release. SUGGESTION: [TIDL_BatchNormLayer] tidl_4_24 16 bits is not optimal in this release. **************************************************** ** 2 WARNINGS 0 ERRORS ** **************************************************** Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-timm_mobilenetv3_large_100_device_c7x/tempDir/tidl_import_subgraph5.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 78.07 .... ..... ... .... ..... # 1 . .. T 76.49 .... ..... ... .... ..... ***************** Calibration iteration number 0 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-timm_mobilenetv3_large_100_device_c7x/tempDir/tidl_import_subgraph5.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 55.55 .... ..... ... .... ..... # 1 . .. T 54.82 .... ..... ... .... ..... ***************** Calibration iteration number 0 completed ************************ Empty prototxt path, running calibration ------------------ Network Compiler Traces ----------------------------- NC running for device: 1 Running with OTF buffer optimizations successful Memory allocation SUGGESTION: [TIDL_BatchNormLayer] tidl_5_12 16 bits is not optimal in this release. SUGGESTION: [TIDL_BatchNormLayer] tidl_5_22 16 bits is not optimal in this release. **************************************************** ** 2 WARNINGS 0 ERRORS ** **************************************************** Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-timm_mobilenetv3_large_100_device_c7x/tempDir/tidl_import_subgraph6.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 129.45 .... ..... ... .... ..... # 1 . .. T 127.40 .... ..... ... .... ..... ***************** Calibration iteration number 0 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-timm_mobilenetv3_large_100_device_c7x/tempDir/tidl_import_subgraph6.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 91.42 .... ..... ... .... ..... # 1 . .. T 89.50 .... ..... ... .... ..... ***************** Calibration iteration number 0 completed ************************ Empty prototxt path, running calibration ------------------ Network Compiler Traces ----------------------------- NC running for device: 1 Running with OTF buffer optimizations successful Memory allocation SUGGESTION: [TIDL_BatchNormLayer] tidl_6_14 16 bits is not optimal in this release. SUGGESTION: [TIDL_BatchNormLayer] tidl_6_24 16 bits is not optimal in this release. SUGGESTION: [TIDL_BatchNormLayer] tidl_6_38 16 bits is not optimal in this release. SUGGESTION: [TIDL_BatchNormLayer] tidl_6_48 16 bits is not optimal in this release. SUGGESTION: [TIDL_BatchNormLayer] tidl_6_63 16 bits is not optimal in this release. SUGGESTION: [TIDL_BatchNormLayer] tidl_6_73 16 bits is not optimal in this release. SUGGESTION: [TIDL_BatchNormLayer] tidl_6_88 16 bits is not optimal in this release. SUGGESTION: [TIDL_BatchNormLayer] tidl_6_98 16 bits is not optimal in this release. SUGGESTION: [TIDL_BatchNormLayer] tidl_6_113 16 bits is not optimal in this release. SUGGESTION: [TIDL_BatchNormLayer] tidl_6_123 16 bits is not optimal in this release. **************************************************** ** 10 WARNINGS 0 ERRORS ** **************************************************** Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-timm_mobilenetv3_large_100_device_c7x/tempDir/tidl_import_subgraph7.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 29.27 .... ..... ... .... ..... # 1 . .. T 28.48 .... ..... ... .... ..... ***************** Calibration iteration number 0 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-timm_mobilenetv3_large_100_device_c7x/tempDir/tidl_import_subgraph7.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 20.75 .... ..... ... .... ..... # 1 . .. T 20.06 .... ..... ... .... ..... ***************** Calibration iteration number 0 completed ************************ Empty prototxt path, running calibration ------------------ Network Compiler Traces ----------------------------- NC running for device: 1 Running with OTF buffer optimizations successful Memory allocation **************************************************** ** ALL MODEL CHECK PASSED ** **************************************************** Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-timm_mobilenetv3_large_100_device_c7x/tempDir/tidl_import_subgraph8.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 24.60 .... ..... ... .... ..... # 1 . .. T 23.94 .... ..... ... .... ..... ***************** Calibration iteration number 0 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-timm_mobilenetv3_large_100_device_c7x/tempDir/tidl_import_subgraph8.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 17.48 .... ..... ... .... ..... # 1 . .. T 16.75 .... ..... ... .... ..... ***************** Calibration iteration number 0 completed ************************ Empty prototxt path, running calibration ------------------ Network Compiler Traces ----------------------------- NC running for device: 1 Running with OTF buffer optimizations successful Memory allocation **************************************************** ** ALL MODEL CHECK PASSED ** **************************************************** Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-timm_mobilenetv3_large_100_device_c7x/tempDir/tidl_import_subgraph9.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 151.83 .... ..... ... .... ..... # 1 . .. T 148.08 .... ..... ... .... ..... ***************** Calibration iteration number 0 started ************************ Empty prototxt path, running calibration ~~~~~Running TIDL in PC emulation mode to collect Activations range for each layer~~~~~ Processing config file #0 : /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-timm_mobilenetv3_large_100_device_c7x/tempDir/tidl_import_subgraph9.txt.qunat_stats_config.txt Freeing memory for user provided Net ----------------------- TIDL Process with REF_ONLY FLOW ------------------------ # 0 . .. T 107.19 .... ..... ... .... ..... # 1 . .. T 103.22 .... ..... ... .... ..... ***************** Calibration iteration number 0 completed ************************ Empty prototxt path, running calibration ------------------ Network Compiler Traces ----------------------------- NC running for device: 1 Running with OTF buffer optimizations successful Memory allocation SUGGESTION: [TIDL_BatchNormLayer] tidl_9_8 16 bits is not optimal in this release. **************************************************** ** 1 WARNINGS 0 ERRORS ** **************************************************** TIDL import of 10 Relay IR subgraphs succeeded. TIDL artifacts are stored at ../../../model-artifacts/cl-dlr-timm_mobilenetv3_large_100_device_c7x Building C7x tvm deployable module: generating c files... Building C7x tvm deployable module: building... (log in c7x_deploy_mod.log) make SILICON_VERSION=7100 TVM_ROOT=/usr/local/lib/python3.10/dist-packages/tvm TVM_C7X_ROOT=/usr/local/lib/python3.10/dist-packages/tvm/src/runtime/contrib/tidl/c7x QUIET= -C /home/root/edgeai-tidl-tools_91/model-artifacts/cl-dlr-timm_mobilenetv3_large_100_device_c7x/tempDir -f /usr/local/lib/python3.10/dist-packages/tvm/src/runtime/contrib/tidl/c7x/Makefile.c7x_mod -j$(nproc) Creating Arm wrapper tvm module... /home/root/edgeai-tidl-tools_91/examples/osrt_python/tvm_dlr/tvm_compilation_timm_example.py:175: DeprecationWarning: legacy graph executor behavior of producing json / lib / params will be removed in the next release. Please see documents of tvm.contrib.graph_executor.GraphModule for the new recommended usage. graph, lib, params = relay.build_module.build(mod, target=build_target, params=params) run python3 dlr_inference_example.py Running Inference on Model - ../../../model-artifacts/cl-dlr-tflite_inceptionnetv3 2023-12-13 06:40:24,859 ERROR error in DLRModel instantiation model_path ../../../model-artifacts/cl-dlr-tflite_inceptionnetv3 doesn't exist Traceback (most recent call last): File "/usr/local/lib/python3.10/dist-packages/dlr/api.py", line 89, in __init__ self._impl = DLRModelImpl(model_path, dev_type, dev_id, error_log_file, use_default_dlr) File "/usr/local/lib/python3.10/dist-packages/dlr/dlr_model.py", line 65, in __init__ raise ValueError("model_path %s doesn't exist" % model_path) ValueError: model_path ../../../model-artifacts/cl-dlr-tflite_inceptionnetv3 doesn't exist Traceback (most recent call last): File "/home/root/edgeai-tidl-tools_91/examples/osrt_python/tvm_dlr/dlr_inference_example.py", line 199, in model_create_and_run(model_output_directory, 'input', File "/home/root/edgeai-tidl-tools_91/examples/osrt_python/tvm_dlr/dlr_inference_example.py", line 164, in model_create_and_run model = DLRModel(model_dir, 'cpu') File "/usr/local/lib/python3.10/dist-packages/dlr/api.py", line 92, in __init__ raise ex File "/usr/local/lib/python3.10/dist-packages/dlr/api.py", line 89, in __init__ self._impl = DLRModelImpl(model_path, dev_type, dev_id, error_log_file, use_default_dlr) File "/usr/local/lib/python3.10/dist-packages/dlr/dlr_model.py", line 65, in __init__ raise ValueError("model_path %s doesn't exist" % model_path) ValueError: model_path ../../../model-artifacts/cl-dlr-tflite_inceptionnetv3 doesn't exist root@773fe789ebee:/home/root/edgeai-tidl-tools_91#