#ifndef INC_PARAMETERS_H_
#define INC_PARAMETERS_H_

/* Kepler Architecture */
#define CPU_CLOCK_KHZ           1200000     // CPU frequency (kHz)
#define NB_DSP_CORE_MAX         8           // Number of DSP cores in Kepler
#define DDR_TEST_START_ADDR     0xB0000000  /* */

/* Define in DDR3 Initialization */
#define PAGE_SIZE           4096        // PAGE_SIZE
#define BANKS               8           // Number of Banks
#define ROWS                65536       // Number of rows
#define DSP_DDR_SIZE        402653184   // Size of DSP DDR3 Region: 0x18000000

/* TEST OPTIONS */
#define DDR_ACCESS          1           // DDR3 full cacheability : 1, DDR3 non-cacheable : 0

#endif /* INC_PARAMETERS_H_ */