Index: ti/board/src/j7200_evm/J7200_pinmux_data_cpsw.c
===================================================================
--- ti/board/src/j7200_evm/J7200_pinmux_data_cpsw.c	(revision 2630)
+++ ti/board/src/j7200_evm/J7200_pinmux_data_cpsw.c	(working copy)
@@ -66,34 +66,6 @@
     {PINMUX_END}
 };
 
-
-static pinmuxPerCfg_t gGpio0PinCfg[] =
-{
-    /* MyGPIO1 -> GPIO0_4 -> AA20 */
-    {
-        PIN_RMII1_CRS_DV, PIN_MODE(7) | \
-        ((PIN_PULL_DISABLE | PIN_INPUT_ENABLE) & (~PIN_PULL_DIRECTION))
-    },
-    /* MyGPIO1 -> GPIO0_27 -> T14 */
-    {
-        PIN_MCAN9_TX, PIN_MODE(7) | \
-        ((PIN_PULL_DISABLE | PIN_INPUT_ENABLE) & (~PIN_PULL_DIRECTION))
-    },
-    /* MyGPIO1 -> GPIO0_28 -> U18 */
-    {
-        PIN_MCAN9_RX, PIN_MODE(7) | \
-        ((PIN_PULL_DISABLE | PIN_INPUT_ENABLE) & (~PIN_PULL_DIRECTION))
-    },
-    {PINMUX_END}
-};
-
-static pinmuxModuleCfg_t gGpioPinCfg[] =
-{
-    {0, TRUE, gGpio0PinCfg},
-    {PINMUX_END}
-};
-
-
 static pinmuxPerCfg_t gI2c0PinCfg[] =
 {
     /* MyI2C0 -> I2C0_SCL -> V3 */
@@ -138,78 +110,143 @@
 };
 
 
-static pinmuxPerCfg_t gRgmii2PinCfg[] =
+static pinmuxPerCfg_t gRgmii1PinCfg[] =
 {
-    /* MyRGMII2 -> RGMII2_RD0 -> Y13 */
+    /* MyRGMII1 -> RGMII1_RD0 -> AA17 */
     {
-        PIN_MCAN11_RX, PIN_MODE(4) | \
+        PIN_RMII1_RXD0, PIN_MODE(4) | \
         ((PIN_PULL_DISABLE | PIN_INPUT_ENABLE) & (~PIN_PULL_DIRECTION))
     },
-    /* MyRGMII2 -> RGMII2_RD1 -> AA15 */
+    /* MyRGMII1 -> RGMII1_RD1 -> Y15 */
     {
-        PIN_MCAN12_TX, PIN_MODE(4) | \
+        PIN_RMII1_RXD1, PIN_MODE(4) | \
         ((PIN_PULL_DISABLE | PIN_INPUT_ENABLE) & (~PIN_PULL_DIRECTION))
     },
-    /* MyRGMII2 -> RGMII2_RD2 -> AA14 */
+    /* MyRGMII1 -> RGMII1_RD2 -> AA20 */
     {
-        PIN_MCAN12_RX, PIN_MODE(4) | \
+        PIN_RMII1_CRS_DV, PIN_MODE(4) | \
         ((PIN_PULL_DISABLE | PIN_INPUT_ENABLE) & (~PIN_PULL_DIRECTION))
     },
-    /* MyRGMII2 -> RGMII2_RD3 -> AA18 */
+    /* MyRGMII1 -> RGMII1_RD3 -> Y17 */
     {
-        PIN_MCAN13_TX, PIN_MODE(4) | \
+        PIN_RMII1_RX_ER, PIN_MODE(4) | \
         ((PIN_PULL_DISABLE | PIN_INPUT_ENABLE) & (~PIN_PULL_DIRECTION))
     },
-    /* MyRGMII2 -> RGMII2_RXC -> Y14 */
+    /* MyRGMII1 -> RGMII1_RXC -> AA19 */
     {
-        PIN_MCAN11_TX, PIN_MODE(4) | \
+        PIN_RMII1_TXD1, PIN_MODE(4) | \
         ((PIN_PULL_DISABLE | PIN_INPUT_ENABLE) & (~PIN_PULL_DIRECTION))
     },
-    /* MyRGMII2 -> RGMII2_RX_CTL -> AA16 */
+    /* MyRGMII1 -> RGMII1_RX_CTL -> Y16 */
     {
-        PIN_MCAN13_RX, PIN_MODE(4) | \
+        PIN_RMII1_TXD0, PIN_MODE(4) | \
         ((PIN_PULL_DISABLE | PIN_INPUT_ENABLE) & (~PIN_PULL_DIRECTION))
     },
-    /* MyRGMII2 -> RGMII2_TD0 -> W17 */
+    /* MyRGMII1 -> RGMII1_TD0 -> Y18 */
     {
-        PIN_MCAN15_TX, PIN_MODE(4) | \
+        PIN_MCAN2_TX, PIN_MODE(4) | \
         ((PIN_PULL_DISABLE) & (~PIN_PULL_DIRECTION & ~PIN_INPUT_ENABLE))
     },
-    /* MyRGMII2 -> RGMII2_TD1 -> W20 */
+    /* MyRGMII1 -> RGMII1_TD1 -> Y19 */
     {
-        PIN_MCAN15_RX, PIN_MODE(4) | \
+        PIN_MCAN2_RX, PIN_MODE(4) | \
         ((PIN_PULL_DISABLE) & (~PIN_PULL_DIRECTION & ~PIN_INPUT_ENABLE))
     },
-    /* MyRGMII2 -> RGMII2_TD2 -> V14 */
+    /* MyRGMII1 -> RGMII1_TD2 -> Y21 */
     {
-        PIN_UART2_RXD, PIN_MODE(4) | \
+        PIN_MCAN3_TX, PIN_MODE(4) | \
         ((PIN_PULL_DISABLE) & (~PIN_PULL_DIRECTION & ~PIN_INPUT_ENABLE))
     },
-    /* MyRGMII2 -> RGMII2_TD3 -> V13 */
+    /* MyRGMII1 -> RGMII1_TD3 -> W16 */
     {
-        PIN_UART2_TXD, PIN_MODE(4) | \
+        PIN_MCAN3_RX, PIN_MODE(4) | \
         ((PIN_PULL_DISABLE) & (~PIN_PULL_DIRECTION & ~PIN_INPUT_ENABLE))
     },
-    /* MyRGMII2 -> RGMII2_TXC -> W21 */
+    /* MyRGMII1 -> RGMII1_TXC -> Y20 */
     {
-        PIN_MCAN1_TX, PIN_MODE(4) | \
+        PIN_MCAN4_RX, PIN_MODE(4) | \
         ((PIN_PULL_DISABLE) & (~PIN_PULL_DIRECTION & ~PIN_INPUT_ENABLE))
     },
-    /* MyRGMII2 -> RGMII2_TX_CTL -> U12 */
+    /* MyRGMII1 -> RGMII1_TX_CTL -> W15 */
     {
-        PIN_GPIO0_41, PIN_MODE(4) | \
+        PIN_MCAN4_TX, PIN_MODE(4) | \
         ((PIN_PULL_DISABLE) & (~PIN_PULL_DIRECTION & ~PIN_INPUT_ENABLE))
     },
     {PINMUX_END}
 };
 
+static pinmuxPerCfg_t gRgmii4PinCfg[] =
+{
+    /* MyRGMII4 -> RGMII4_RD0 -> V18 */
+    {
+        PIN_MCAN0_TX, PIN_MODE(4) | \
+        ((PIN_PULL_DISABLE | PIN_INPUT_ENABLE) & (~PIN_PULL_DIRECTION))
+    },
+    /* MyRGMII4 -> RGMII4_RD1 -> V20 */
+    {
+        PIN_MCAN0_RX, PIN_MODE(4) | \
+        ((PIN_PULL_DISABLE | PIN_INPUT_ENABLE) & (~PIN_PULL_DIRECTION))
+    },
+    /* MyRGMII4 -> RGMII4_RD2 -> V16 */
+    {
+        PIN_MCAN1_RX, PIN_MODE(4) | \
+        ((PIN_PULL_DISABLE | PIN_INPUT_ENABLE) & (~PIN_PULL_DIRECTION))
+    },
+    /* MyRGMII4 -> RGMII4_RD3 -> U13 */
+    {
+        PIN_GPMC0_CLK, PIN_MODE(4) | \
+        ((PIN_PULL_DISABLE | PIN_INPUT_ENABLE) & (~PIN_PULL_DIRECTION))
+    },
+    /* MyRGMII4 -> RGMII4_RXC -> V17 */
+    {
+        PIN_RMII1_TX_EN, PIN_MODE(4) | \
+        ((PIN_PULL_DISABLE | PIN_INPUT_ENABLE) & (~PIN_PULL_DIRECTION))
+    },
+    /* MyRGMII4 -> RGMII4_RX_CTL -> V15 */
+    {
+        PIN_MCAN16_TX, PIN_MODE(4) | \
+        ((PIN_PULL_DISABLE | PIN_INPUT_ENABLE) & (~PIN_PULL_DIRECTION))
+    },
+    /* MyRGMII4 -> RGMII4_TD0 -> U21 */
+    {
+        PIN_MCAN16_RX, PIN_MODE(4) | \
+        ((PIN_PULL_DISABLE) & (~PIN_PULL_DIRECTION & ~PIN_INPUT_ENABLE))
+    },
+    /* MyRGMII4 -> RGMII4_TD1 -> T19 */
+    {
+        PIN_PMIC_WAKE0, PIN_MODE(4) | \
+        ((PIN_PULL_DISABLE) & (~PIN_PULL_DIRECTION & ~PIN_INPUT_ENABLE))
+    },
+    /* MyRGMII4 -> RGMII4_TD2 -> T17 */
+    {
+        PIN_UART0_TXD, PIN_MODE(4) | \
+        ((PIN_PULL_DISABLE) & (~PIN_PULL_DIRECTION & ~PIN_INPUT_ENABLE))
+    },
+    /* MyRGMII4 -> RGMII4_TD3 -> T18 */
+    {
+        PIN_UART1_RXD, PIN_MODE(4) | \
+        ((PIN_PULL_DISABLE) & (~PIN_PULL_DIRECTION & ~PIN_INPUT_ENABLE))
+    },
+    /* MyRGMII4 -> RGMII4_TXC -> T16 */
+    {
+        PIN_UART0_RXD, PIN_MODE(4) | \
+        ((PIN_PULL_DISABLE) & (~PIN_PULL_DIRECTION & ~PIN_INPUT_ENABLE))
+    },
+    /* MyRGMII4 -> RGMII4_TX_CTL -> T20 */
+    {
+        PIN_UART1_TXD, PIN_MODE(4) | \
+        ((PIN_PULL_DISABLE) & (~PIN_PULL_DIRECTION & ~PIN_INPUT_ENABLE))
+    },
+    {PINMUX_END}
+};
+
 static pinmuxModuleCfg_t gRgmiiPinCfg[] =
 {
-    {2, TRUE, gRgmii2PinCfg},
+    {1, TRUE, gRgmii1PinCfg},
+    {4, TRUE, gRgmii4PinCfg},
     {PINMUX_END}
 };
 
-
 static pinmuxPerCfg_t gSystem0PinCfg[] =
 {
     /* MySYSTEM1 -> EXTINTn -> U6 */
@@ -236,29 +273,6 @@
     {PINMUX_END}
 };
 
-
-static pinmuxPerCfg_t gUart3PinCfg[] =
-{
-    /* MyUART3 -> UART3_RXD -> Y18 */
-    {
-        PIN_MCAN2_TX, PIN_MODE(11) | \
-        ((PIN_PULL_DISABLE | PIN_INPUT_ENABLE) & (~PIN_PULL_DIRECTION))
-    },
-    /* MyUART3 -> UART3_TXD -> Y19 */
-    {
-        PIN_MCAN2_RX, PIN_MODE(11) | \
-        ((PIN_PULL_DISABLE) & (~PIN_PULL_DIRECTION & ~PIN_INPUT_ENABLE))
-    },
-    {PINMUX_END}
-};
-
-static pinmuxModuleCfg_t gUartPinCfg[] =
-{
-    {3, TRUE, gUart3PinCfg},
-    {PINMUX_END}
-};
-
-
 static pinmuxPerCfg_t gWkup_i2c0PinCfg[] =
 {
     /* MyWKUP_I2C0 -> WKUP_I2C0_SCL -> F20 */
@@ -284,12 +298,10 @@
 pinmuxBoardCfg_t gJ7200_MainPinmuxDataCpsw[] =
 {
     {0, gDebugssPinCfg},
-    {1, gGpioPinCfg},
-    {2, gI2cPinCfg},
-    {3, gMdioPinCfg},
-    {4, gRgmiiPinCfg},
-    {5, gSystemPinCfg},
-    {6, gUartPinCfg},
+    {1, gI2cPinCfg},
+    {2, gMdioPinCfg},
+    {3, gRgmiiPinCfg},
+    {4, gSystemPinCfg},
     {PINMUX_END}
 };

Index: ti/drv/enet/examples/utils/V1/enet_appboardutils_j721e_evm.c
===================================================================
--- ti/drv/enet/examples/utils/V1/enet_appboardutils_j721e_evm.c	(revision 2630)
+++ ti/drv/enet/examples/utils/V1/enet_appboardutils_j721e_evm.c	(working copy)
@@ -214,8 +214,7 @@
     uint32_t clkModuleId[] = { TISCI_DEV_DDR0,
                                TISCI_DEV_TIMER12,
                                TISCI_DEV_TIMER13,
-                               TISCI_DEV_UART2,
-                               TISCI_DEV_I2C0, };
+                               TISCI_DEV_UART2,};
 
     appFlags = 0U;
     moduleCnt = ENET_ARRAYSIZE(clkModuleId);
@@ -291,8 +290,13 @@
             switch (portNum)
             {
                 case ENET_MAC_PORT_1:
+#if defined(ENETAPPUTILS_BYPASS_QSGMII)
+					/* RGMII port, set correct PHY address */
+					phyAddr = 2U;
+#else
                     /* QSGMII port */
                     phyAddr = 16U;
+#endif
                     break;
 
                 case ENET_MAC_PORT_2:
@@ -312,8 +316,13 @@
                     break;
 
                 case ENET_MAC_PORT_4:
+#if defined(ENETAPPUTILS_BYPASS_QSGMII)
+					/* RGMII port, set correct PHY address */
+					phyAddr = 0U;
+#else
                     /* QSGMII port */
                     phyAddr = 19U;
+#endif
                     break;
 
                 default:
@@ -544,7 +553,7 @@
     }
     else if (enetType == ENET_CPSW_5G)
     {
-        EnetAppUtils_assert(portNum == ENET_MAC_PORT_2);
+        EnetAppUtils_assert(portNum == ENET_MAC_PORT_1 || portNum == ENET_MAC_PORT_4);
         /* Override the ENET control set by board lib */
         EnetBoard_setEnetControl(enetType, 0U/* instId */, portNum, RGMII);
     }
@@ -606,7 +615,7 @@
         case ENET_CPSW_5G:
             /* Use RGMII port in GESI board when QSGMII is disabled */
 #if defined(ENETAPPUTILS_BYPASS_QSGMII)
-            if (ENET_MAC_PORT_2 == portNum)
+            if (ENET_MAC_PORT_1 == portNum || ENET_MAC_PORT_4 == portNum)
             {
                 EnetBoard_setPhyConfigRgmii(enetType,
                                                     portNum,
Index: ti/drv/enet/examples/utils/makefile
===================================================================
--- ti/drv/enet/examples/utils/makefile	(revision 2630)
+++ ti/drv/enet/examples/utils/makefile	(working copy)
@@ -29,11 +29,12 @@
   ifeq ($(APPUTILS_TYPE),full)
     MODULE_NAME = enet_example_utils_full
     ENET_CFLAGS += -DENETAPPUTILS_UART_ALLOWED
+	ENET_CFLAGS += -DENETAPPUTILS_BYPASS_QSGMII
   else
     MODULE_NAME = enet_example_utils
     ENET_CFLAGS += -DSDK_6_2_CORE_SDK_IMAGE
     ifeq ($(CORE),$(filter $(CORE), mcu2_0))
-      #ENET_CFLAGS += -DENETAPPUTILS_BYPASS_I2C
+      ENET_CFLAGS += -DENETAPPUTILS_BYPASS_I2C
       ifeq ($(SOC),$(filter $(SOC), j721e))
         ENET_CFLAGS += -DENETAPPUTILS_BYPASS_QSGMII
       endif
@@ -40,6 +41,9 @@
       ifneq ($(SOC),$(filter $(SOC), j7200))
         ENET_CFLAGS += -DENETAPPUTILS_UART_ALLOWED
       endif
+	  ifeq ($(SOC),$(filter $(SOC), j7200))
+        ENET_CFLAGS += -DENETAPPUTILS_BYPASS_QSGMII
+      endif
     else
       ENET_CFLAGS += -DENETAPPUTILS_UART_ALLOWED
     endif