/* GESI board's DP83867 PHY configuration for port 5*/
static Dp83867_Cfg gEnetGesiBoard_dp83867PhyCfg_port5 =
{
    .txClkShiftEn         = BTRUE,
    .rxClkShiftEn         = BTRUE,
    .txDelayInPs          = 1000U,     /* 1.0 ns */
    .rxDelayInPs          = 1000U,     /* 1.0 ns */
    .txFifoDepth          = 4U,
    .idleCntThresh        = 4U,     /* Improves short cable performance */
    .impedanceInMilliOhms = 35000,  /* 35 ohms */
    .gpio0Mode            = DP83867_GPIO0_LED3,
    .gpio1Mode            = DP83867_GPIO1_COL, /* Unused */
    .ledMode              =
    {
        DP83867_LED_LINKED,         /* Unused */
        DP83867_LED_LINKED_100BTX,
        DP83867_LED_RXTXACT,
        DP83867_LED_LINKED_1000BT,
    },
};

/* GESI board's DP83867 PHY configuration for port 6*/
static Dp83867_Cfg gEnetGesiBoard_dp83867PhyCfg_port6 =
{
    .txClkShiftEn         = BTRUE,
    .rxClkShiftEn         = BTRUE,
    .txDelayInPs          = 1000U,  /* 1.0 ns */
    .rxDelayInPs          = 1000U,  /* 1.0 ns */
    .txFifoDepth          = 4U,
    .idleCntThresh        = 4U,     /* Improves short cable performance */
    .impedanceInMilliOhms = 35000,  /* 35 ohms */
    .gpio0Mode            = DP83867_GPIO0_LED3,
    .gpio1Mode            = DP83867_GPIO1_COL, /* Unused */
    .ledMode              =
    {
        DP83867_LED_LINKED,         /* Unused */
        DP83867_LED_LINKED_100BTX,
        DP83867_LED_RXTXACT,
        DP83867_LED_LINKED_1000BT,
    },
};

/* GESI board's DP83867 PHY configuration */
static Dp83867_Cfg gEnetGesiBoard_rtl9010PhyCfg_port8 =
{
    .txClkShiftEn         = BTRUE,
    .rxClkShiftEn         = BTRUE,
    .txDelayInPs          = 1000U,  /* 1.0 ns */
    .rxDelayInPs          = 1000U,  /* 1.0 ns */
    .txFifoDepth          = 4U,
    .impedanceInMilliOhms = 50000,  /* 50 ohms */
    .gpio0Mode            = DP83867_GPIO0_LED3,
    .gpio1Mode            = DP83867_GPIO1_COL, /* Unused */
    .ledMode              =
    {
        DP83867_LED_LINKED,         /* Unused */
        DP83867_LED_LINKED_100BTX,
        DP83867_LED_RXTXACT,
        DP83867_LED_LINKED_1000BT,
    },
};

static EthFwBoard_MacPortCfg gEthFw_gesiMacPortCfg[] =
{
    {   /* "PRG1_RGMII1_B" */
        .macPort   = ENET_MAC_PORT_5,                                       /* This is used for ETH2 interface in ep2000 fw2.0 */
        .mii       = { ENET_MAC_LAYER_GMII, ENET_MAC_SUBLAYER_REDUCED },
        .phyCfg    =
        {
            .phyAddr         = 1U,
            .isStrapped      = BFALSE,
            .skipExtendedCfg = BFALSE,
            .extendedCfg     = &gEnetGesiBoard_dp83867PhyCfg_port5,
            .extendedCfgSize = sizeof(gEnetGesiBoard_dp83867PhyCfg_port5),
        },
        .sgmiiMode = ENET_MAC_SGMIIMODE_INVALID,
        .linkCfg   = { ENET_SPEED_AUTO, ENET_DUPLEX_AUTO },
    },
    {   /* "PRG1_RGMII2_T" */
        .macPort   = ENET_MAC_PORT_6,                                       /* This is used for ETH1 interface in ep2000 fw2.0 */
        .mii       = { ENET_MAC_LAYER_GMII, ENET_MAC_SUBLAYER_REDUCED },
        .phyCfg    =
        {
            .phyAddr         = 2U,
            .isStrapped      = BFALSE,
            .skipExtendedCfg = BFALSE,
            .extendedCfg     = &gEnetGesiBoard_dp83867PhyCfg_port6,
            .extendedCfgSize = sizeof(gEnetGesiBoard_dp83867PhyCfg_port6),
        },
        .sgmiiMode = ENET_MAC_SGMIIMODE_INVALID,
        .linkCfg   = { ENET_SPEED_AUTO, ENET_DUPLEX_AUTO },
    },
    {   /* "PRG0_RGMII1_B" */
        .macPort   = ENET_MAC_PORT_7,                                       /* This is used for ETH3 interface in ep2000 fw2.0 */
        .mii       = { ENET_MAC_LAYER_GMII, ENET_MAC_SUBLAYER_SERIAL },
        .phyCfg    =
        {
            .phyAddr         = ENETPHY_INVALID_PHYADDR,
            .isStrapped      = BFALSE,
            .skipExtendedCfg = BFALSE,
            .extendedCfg     = NULL,
            .extendedCfgSize = 0U,
        },
        .sgmiiMode = ENET_MAC_SGMIIMODE_SGMII_FORCEDLINK,
        .linkCfg   = { ENET_SPEED_1GBIT, ENET_DUPLEX_FULL },
    },
    {   /* "PRG0_RGMII02_T" */
        .macPort   = ENET_MAC_PORT_8,                                       /* This is used for ETH0 interface in ep2000 fw2.0 */
        .mii       = { ENET_MAC_LAYER_GMII, ENET_MAC_SUBLAYER_SERIAL },
        .phyCfg    =
        {
            .phyAddr         = 3U,
            .isStrapped      = BFALSE,
            .skipExtendedCfg = BFALSE,
            .extendedCfg     = &gEnetGesiBoard_rtl9010PhyCfg_port8,
            .extendedCfgSize = sizeof(gEnetGesiBoard_rtl9010PhyCfg_port8),
        },
        .sgmiiMode = ENET_MAC_SGMIIMODE_SGMII_AUTONEG_SLAVE,
        .linkCfg   = { ENET_SPEED_1GBIT, ENET_DUPLEX_FULL },
    },
};