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; TDA4VM/H: R5MCU, R5MAIN byte by byte copy to time with ETM or CPT
; 15 Aug 24 - Richard Woodruff - Create to test xfer time to memory
; 03 Sep 24 - Richard Woodruff - Cache ops to make it work on MAIN
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local &R5MAIN_SRAM

;Step 1: run a bare metal JTAG init and choose target R5 (MCU, MAIN0, MAIN1, ...)
;   for these I run flash script with break point and use MAIN0
;DO "&path/../../x_gel_to_cmm/_J784S4_r5.cmm" R5-MAIN0 AMP1

&CPU=CPU()
&tda4vh=(STRing.SCAN("&CPU","TDA4VH",0)!=-1)
&r5main=(STRing.SCAN("&CPU","MAIN",0)!=-1)

; Step 2: write a pattern to the source memory
;data.set 0x9D1800EC++20687. %Byte 0x11 ; fill source with 1's

; Step 3:  Set up a R5 memory accesses at SCTLR and MPU then setup a RAT to access MAIN: MSRAM
PER.Set.simple C15:0x1 %Long 0x00E5187D                          ; force I+D+MPU on

cache.INVALIDATE.dc
cache.INVALIDATE.ic

; update MPU and CPU for cache to match question
PER.Set.SaveIndex C15:0x26 %Long 0x1 C15:0x16 %Long 0x0          ; code in ATCM (Local Address)
PER.Set.SaveIndex C15:0x26 %Long 0x1 C15:0x216 %Long 0x1f
;PER.Set.SaveIndex C15:0x26 %Long 0x1 C15:0x416 %Long 0x308
PER.Set.SaveIndex C15:0x26 %Long 0x1 C15:0x416 %Long 0x30b

PER.Set.SaveIndex C15:0x26 %Long 0x2 C15:0x16 %Long 0x41C00000   ; non-cached dest MCU SRAM (RAT REGION3)
PER.Set.SaveIndex C15:0x26 %Long 0x2 C15:0x216 %Long 0x2b
PER.Set.SaveIndex C15:0x26 %Long 0x2 C15:0x416 %Long 0x308

PER.Set.SaveIndex C15:0x26 %Long 0x3 C15:0x16 %Long 0x9D100000   ; cached src DDR (RAT REGION4)
PER.Set.SaveIndex C15:0x26 %Long 0x3 C15:0x216 %Long 0x27
PER.Set.SaveIndex C15:0x26 %Long 0x3 C15:0x416 %Long 0x30B

PER.Set.SaveIndex C15:0x26 %Long 0x4 C15:0x16 %Long 0x9B800000   ; non-cached dest DDR (RAT REGION4)
PER.Set.SaveIndex C15:0x26 %Long 0x4 C15:0x216 %Long 0x27
PER.Set.SaveIndex C15:0x26 %Long 0x4 C15:0x416 %Long 0x308

IF &tda4vh  ; MSRAM high on VH
(
 IF &r5main
 (
   Data.Set D:(0x0FF90000+0x44) %Long 0x10000000   ; local R5 addr : RAT REGION2 10000_0000 --> 4F_0200_0000
   Data.Set D:(0x0FF90000+0x48) %Long 0x02000000   ; out-low
   Data.Set D:(0x0FF90000+0x4C) %Long 0x0000004F   ; out-high
   Data.Set D:(0x0FF90000+0x40) %Long 0x80000019   ; sz+enable     : align size to 32MB to match low
 )
 &R5MAIN_SRAM=0x10000000
)
ELSE
 &R5MAIN_SRAM=0x03600000

PER.Set.SaveIndex C15:0x26 %Long 0x5 C15:0x16 %Long &R5MAIN_SRAM   ; non-cached dest MAIN MSRAM
PER.Set.SaveIndex C15:0x26 %Long 0x5 C15:0x216 %Long 0x31
PER.Set.SaveIndex C15:0x26 %Long 0x5 C15:0x416 %Long 0x308

; R5 to SVC mode with IRQs + async abort masked
Register.Set I 1
Register.Set F 1
Register.Set A 1
Register.Set M 0x13  ; SVC

PER.Set.simple C15:0x119 %Long 0x1d    ; ensure ACTCM enabled for use with code
PER.Set.simple C15:0x101 %Long 0x0C000020 ; shut down ECC
;data.set 0x0++(1024.*16.-1) %Byte 0x00 ; fill source with 1's
;data.set 0x41010000++(1024.*16.-1) %long 0x00 ; fill source with 1's

Register.Set PC 0x100                  ; set PC into ATCM

Register.Set R0 0x9D1800EC             ; start src cached DDR (RAT_REGION4)
Register.Set R1 (0x9D1800EC+20688.)    ; stop copy address
;Register.Set R1 (0x9D1800EC+2048.)

; Choose R2 Dest for copy
;Register.Set R2 0x41c00000            ; dest into MCU-MSRAM 1MB (RAT_REGION3)
Register.Set R2 &R5MAIN_SRAM           ; dest into MSRAM 512K x J7ES:x1 or J7AHPx3
;Register.Set R2 0x9B8B25CC            ; dest into DDR (non-cached DDR)
;Register.Set R2 0x41010000            ; TCMB

; non-optimal byte-by-byte copy loop
Data.Assemble SR:0x100 ldrb r3,[r0]!,1 ; load src to r3 and update base r0
Data.Assemble SR:0x104 strb r3,[r2]!,1 ; store dest and update r2
Data.Assemble SR:0x108 cmp r0,r1       ; check if at stop
Data.Assemble SR:0x10C bne 0x100       ; loop if not at stop
Data.Assemble SR:0x110 nop
Data.Assemble SR:0x114 b 0x114         ; self loop

cache.FLUSH.dc
cache.FLUSH.ic

sYmbol.CREATE.Function mcpy 0x100++0xC
sYmbol.CREATE.Function hang 0x114++4
Symbol.create.done

break.set 0x114 /onchip                ; breakpoint when copy done

Register /SpotLight

; setup to capture ETM for timing information
Trace.CLOCK 1ghz
ETM.DataTrace.off
;ETM.TImeMode.CycleAccurate
ETM.TImeMode.External
;ETM.TImeMode.CycleAccurate+External

Trace.list
Trace.Chart
Trace.STATistic.sYmbol /Sort ratio

;data.ComPare eaxi:0x41c00000++20688. eAXI:0x9D1800EC

