diff --git a/packages/ti/build/j784s4/linker_r5_freertos.lds b/packages/ti/build/j784s4/linker_r5_freertos.lds
index 78090347..87d89562 100644
--- a/packages/ti/build/j784s4/linker_r5_freertos.lds
+++ b/packages/ti/build/j784s4/linker_r5_freertos.lds
@@ -119,7 +119,8 @@ MEMORY
     MSMC3_DMSC_FW (RWIX)        : ORIGIN = 0x707F0000 LENGTH = 0x00010000   /* 64KB        */

     /*======================= J784S4 DDR LOCATION =======================*/
-    DDR0 (RWIX)                 : ORIGIN = 0x80000000 LENGTH = 0x80000000   /* 2GB */
+    DDR0 (RWIX)                 : ORIGIN = 0x80000000 LENGTH = 0x40000000   /* 1GB */
+    DDR_RING(RWIX)              : ORIGIN = 0xC0000000 LENGTH = 0x00001000
 }

 /*--------------------------------------------------------------*/
@@ -149,7 +150,9 @@ SECTIONS
     .bss.devgroup    : {*(.bss.devgroup*)} align(4)        > DDR0
     .const.devgroup  : {*(.const.devgroup*)} align(4)      > DDR0
     .boardcfg_data   : {} align(4)       > DDR0
-
+  .ring_mem        : {
+        *(.ring_mem*)
+    }      > DDR_RING
     /* USB or any other LLD buffer for benchmarking */
     .benchmark_buffer (NOLOAD) {} ALIGN (8) > DDR0

diff --git a/packages/ti/drv/udma/examples/udma_memcpy_test/udma_memcpy_test.c b/packages/ti/drv/udma/examples/udma_memcpy_test/udma_memcpy_test.c
index 92ecbd2d..95bdddb2 100644
--- a/packages/ti/drv/udma/examples/udma_memcpy_test/udma_memcpy_test.c
+++ b/packages/ti/drv/udma/examples/udma_memcpy_test/udma_memcpy_test.c
@@ -166,6 +166,105 @@ static uint64_t App_getPmuCycleCnt (uint32_t hiCycleCnt);
 /*
  * UDMA driver objects
  */
+struct tisci_msg_fwl_set_firewall_region_resp setResp[28] = {{0}};
+
+struct tisci_msg_fwl_set_firewall_region_req req[] =
+{
+      {
+            .fwl_id = (uint16_t) 5142,
+            .region = (uint16_t) 0,
+            .n_permission_regs = (uint32_t) 3,
+            .control = (uint32_t) 0x30A,
+            .permissions[0] = (uint32_t) 0xC3FFFF,
+            .permissions[1] = (uint32_t) 0xC3FFFF,
+            .permissions[2] = (uint32_t) 0xC3FFFF,
+          .start_address = 0x00000000,
+            .end_address = 0xFFFFFFFF
+        },
+         {
+           .fwl_id = (uint16_t) 5142,
+            .region = (uint16_t) 1,
+            .n_permission_regs = (uint32_t) 3,
+            .control = (uint32_t) 0x20A,
+            .permissions[0] = (uint32_t) 0xC50000,
+            .permissions[1] = (uint32_t) 0xC50000,
+            .permissions[2] = (uint32_t) 0xC50000,
+            .start_address = 0xC0000000,
+            .end_address =   0xC0001000,
+        },
+           {
+            .fwl_id = (uint16_t) 5143,
+            .region = (uint16_t) 0,
+            .n_permission_regs = (uint32_t) 3,
+            .control = (uint32_t) 0x30A,
+            .permissions[0] = (uint32_t) 0xC3FFFF,
+            .permissions[1] = (uint32_t) 0xC3FFFF,
+            .permissions[2] = (uint32_t) 0xC3FFFF,
+              .start_address = 0x00000000,
+            .end_address = 0xFFFFFFFF
+        },
+          {
+            .fwl_id = (uint16_t) 5143,
+            .region = (uint16_t) 1,
+            .n_permission_regs = (uint32_t) 3,
+            .control = (uint32_t) 0x20A,
+            .permissions[0] = (uint32_t) 0xC50000,
+            .permissions[1] = (uint32_t) 0xC50000,
+            .permissions[2] = (uint32_t) 0xC50000,
+            .start_address = 0xC0000000,
+            .end_address = 0xC0001000,
+        },
+           {
+            .fwl_id = (uint16_t) 5144,
+            .region = (uint16_t) 0,
+            .n_permission_regs = (uint32_t) 3,
+            .control = (uint32_t) 0x30A,
+            .permissions[0] = (uint32_t) 0xC3FFFF,
+            .permissions[1] = (uint32_t) 0xC3FFFF,
+            .permissions[2] = (uint32_t) 0xC3FFFF,
+              .start_address = 0x00000000,
+            .end_address = 0xFFFFFFFF
+        },
+
+        {
+            .fwl_id = (uint16_t) 5144,
+            .region = (uint16_t) 1,
+            .n_permission_regs = (uint32_t) 3,
+            .control = (uint32_t) 0x20A,
+            .permissions[0] = (uint32_t) 0xC50000,
+            .permissions[1] = (uint32_t) 0xC50000,
+            .permissions[2] = (uint32_t) 0xC50000,
+            .start_address = 0xC0000000,
+            .end_address = 0xC0001000,
+        }
+
+
+};
+
+
+void set_firewall(void)
+{
+
+    int i,status;
+    App_print("Setting firewall\n");
+    for (i = 0; i < sizeof(req)/sizeof(req[0]); i++)
+    {
+        status = Sciclient_firewallSetRegion(&req[i], &setResp[i],
+                                             SCICLIENT_SERVICE_WAIT_FOREVER);
+        if (status != CSL_PASS)
+        {
+            App_printNum("Firewall FAIL FOR ID= %d\n",req[i].fwl_id);
+
+        }
+        else
+        {
+            App_printNum("Firewall Pass FOR ID= %d\n",req[i].fwl_id);
+
+        }
+    }
+    App_print("Firewall Setup Done\n");
+}
+
 struct Udma_DrvObj      gUdmaDrvObj;
 struct Udma_ChObj       gUdmaChObj;
 #if defined (UDMA_TEST_INTR)
@@ -180,7 +279,7 @@ struct Udma_EventObj    gUdmaTdCqEventObj;
  */
 static uint8_t gTxRingMem[UDMA_TEST_APP_RING_MEM_SIZE_ALIGN] __attribute__((aligned(UDMA_CACHELINE_ALIGNMENT)));
 #if (UDMA_SOC_CFG_RA_NORMAL_PRESENT == 1)
-static uint8_t gTxCompRingMem[UDMA_TEST_APP_RING_MEM_SIZE_ALIGN] __attribute__((aligned(UDMA_CACHELINE_ALIGNMENT)));
+static uint8_t gTxCompRingMem[UDMA_TEST_APP_RING_MEM_SIZE_ALIGN] __attribute__((section(".ring_mem"),aligned(UDMA_CACHELINE_ALIGNMENT)));
 static uint8_t gTxTdCompRingMem[UDMA_TEST_APP_RING_MEM_SIZE_ALIGN] __attribute__((aligned(UDMA_CACHELINE_ALIGNMENT)));
 #endif
 static uint8_t gUdmaTrpdMem[UDMA_TEST_APP_TRPD_SIZE_ALIGN] __attribute__((aligned(UDMA_CACHELINE_ALIGNMENT)));
@@ -364,7 +463,8 @@ static int32_t App_memcpyTest(Udma_ChHandle chHandle)

     return (retVal);
 }
-
+uint32_t *ptr = (uint32_t *)0x31160044;
+uint32_t hold_=0;
 static int32_t App_udmaMemcpy(Udma_ChHandle chHandle,
                               void *destBuf,
                               void *srcBuf,
@@ -385,9 +485,21 @@ static int32_t App_udmaMemcpy(Udma_ChHandle chHandle,
     gUdmaTotalCycle = App_getPmuCycleCnt((uint64_t)0U>>32U);
 #endif
 #endif
-    /* Submit TRPD to channel */
-    retVal = Udma_ringQueueRaw(
-                 Udma_chGetFqRingHandle(chHandle), (uint64_t) Udma_appVirtToPhyFxn(trpdMem, 0U, NULL));
+     set_firewall();
+     /* Submit TRPD to channel */
+     retVal = Udma_ringQueueRaw(
+                  Udma_chGetFqRingHandle(chHandle), (uint64_t) Udma_appVirtToPhyFxn(trpdMem, 0U, NULL));
+
+    while(*(ptr)== 0x00) //Hold till the error injection takes place
+    {
+    CacheP_Inv(ptr,4);
+    }
+    UART_printf("Error Log = %x\n",*ptr);
+    UART_printf("Hold execution\n"); //After the test user can remove firewall permission accross the region where cring is placed
+    while(hold_ == 0)
+    {
+
+    }
     if(UDMA_SOK != retVal)
     {
         App_print("[Error] Channel queue failed!!\n");