/dts-v1/;

/ {
	#address-cells = <0x2>;
	#size-cells = <0x2>;
	compatible = "ti,dra76-evm", "ti,dra762", "ti,dra7";
	interrupt-parent = <0x1>;
	model = "TI DRA762 EVM";

	chosen {
		stdout-path = "/ocp/serial@4806a000";
	};

	aliases {
		i2c0 = "/ocp/i2c@48070000";
		i2c1 = "/ocp/i2c@48072000";
		i2c2 = "/ocp/i2c@48060000";
		i2c3 = "/ocp/i2c@4807a000";
		i2c4 = "/ocp/i2c@4807c000";
		serial0 = "/ocp/serial@4806a000";
		serial1 = "/ocp/serial@4806c000";
		serial2 = "/ocp/serial@48020000";
		serial3 = "/ocp/serial@4806e000";
		serial4 = "/ocp/serial@48066000";
		serial5 = "/ocp/serial@48068000";
		serial6 = "/ocp/serial@48420000";
		serial7 = "/ocp/serial@48422000";
		serial8 = "/ocp/serial@48424000";
		serial9 = "/ocp/serial@4ae2b000";
		ethernet0 = "/ocp/ethernet@48484000/slave@48480200";
		ethernet1 = "/ocp/ethernet@48484000/slave@48480300";
		d_can0 = "/ocp/can@481cc000";
		d_can1 = "/ocp/can@481d0000";
		rproc0 = "/ocp/ipu@58820000";
		rproc1 = "/ocp/ipu@55020000";
		rproc2 = "/ocp/dsp@40800000";
		rproc3 = "/ocp/dsp@41000000";
		display0 = "/connector@1";
		sound0 = "/sound0";
		sound1 = "/ocp/dss@58000000/encoder@58060000";
		i2c7 = "/ocp/i2c@48060000/serializer@0c";
	};

	memory {
		device_type = "memory";
		reg = <0x0 0x80000000 0x0 0x80000000>;
	};

	timer {
		compatible = "arm,armv7-timer";
		interrupts = <0x1 0xd 0x308 0x1 0xe 0x308 0x1 0xb 0x308 0x1 0xa 0x308>;
		interrupt-parent = <0x2>;
	};

	interrupt-controller@48211000 {
		compatible = "arm,cortex-a15-gic";
		interrupt-controller;
		#interrupt-cells = <0x3>;
		reg = <0x0 0x48211000 0x0 0x1000 0x0 0x48212000 0x0 0x1000 0x0 0x48214000 0x0 0x2000 0x0 0x48216000 0x0 0x2000>;
		interrupts = <0x1 0x9 0x304>;
		interrupt-parent = <0x2>;
		linux,phandle = <0x2>;
		phandle = <0x2>;
	};

	interrupt-controller@48281000 {
		compatible = "ti,omap5-wugen-mpu", "ti,omap4-wugen-mpu";
		interrupt-controller;
		#interrupt-cells = <0x3>;
		reg = <0x0 0x48281000 0x0 0x1000>;
		interrupt-parent = <0x2>;
		linux,phandle = <0x7>;
		phandle = <0x7>;
	};

	cpus {
		#address-cells = <0x1>;
		#size-cells = <0x0>;

		cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a15";
			reg = <0x0>;
			operating-points-v2 = <0x3>;
			cpu-opp-domain = <0x4>;
			ti,syscon-efuse = <0x5 0x20c 0xf80000 0x13>;
			ti,syscon-rev = <0x5 0x204>;
			clocks = <0x6>;
			clock-names = "cpu";
			clock-latency = <0x493e0>;
			cooling-min-level = <0x0>;
			cooling-max-level = <0x2>;
			#cooling-cells = <0x2>;
			linux,phandle = <0x133>;
			phandle = <0x133>;
		};

		cpu@1 {
			device_type = "cpu";
			compatible = "arm,cortex-a15";
			reg = <0x1>;
			operating-points-v2 = <0x3>;
		};
	};

	opp_table0 {
		compatible = "operating-points-v2";
		opp-shared;
		linux,phandle = <0x3>;
		phandle = <0x3>;

		opp_nom@1000000000 {
			opp-hz = <0x0 0x3b9aca00>;
			opp-microvolt = <0x102ca0 0xcf850 0x118c30>;
			opp-supported-hw = <0xff 0x1>;
			opp-suspend;
		};

		opp_od@1176000000 {
			opp-hz = <0x0 0x46185600>;
			opp-microvolt = <0x11b340 0xd8108 0x11b340>;
			opp-supported-hw = <0xff 0x2>;
		};

		opp_high@1500000000 {
			opp-hz = <0x0 0x59682f00>;
			opp-microvolt = <0x127690 0xe7ef0 0x1312d0>;
			opp-supported-hw = <0xff 0x4>;
		};

		opp_plus@1800000000 {
			opp-hz = <0x0 0x6b49d200>;
			opp-microvolt = <0x1312d0 0xe7ef0 0x1312d0>;
			opp-supported-hw = <0xff 0x8>;
		};
	};

	soc {
		compatible = "ti,omap-infra";

		mpu {
			compatible = "ti,omap5-mpu";
			ti,hwmods = "mpu";
		};
	};

	ocp {
		compatible = "ti,dra7-l3-noc", "simple-bus";
		#address-cells = <0x1>;
		#size-cells = <0x1>;
		ranges = <0x0 0x0 0x0 0xc0000000>;
		ti,hwmods = "l3_main_1", "l3_main_2";
		reg = <0x0 0x44000000 0x0 0x1000000 0x0 0x45000000 0x0 0x1000>;
		interrupts-extended = <0x1 0x0 0x4 0x4 0x7 0x0 0xa 0x4>;

		l4@4a000000 {
			compatible = "ti,dra7-l4-cfg", "simple-bus";
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			ranges = <0x0 0x4a000000 0x22c000>;

			scm@2000 {
				compatible = "ti,dra7-scm-core", "simple-bus";
				reg = <0x2000 0x2000>;
				#address-cells = <0x1>;
				#size-cells = <0x1>;
				ranges = <0x0 0x2000 0x2000>;

				scm_conf@0 {
					compatible = "syscon", "simple-bus";
					reg = <0x0 0x1400>;
					#address-cells = <0x1>;
					#size-cells = <0x1>;
					ranges = <0x0 0x0 0x1400>;
					linux,phandle = <0x8>;
					phandle = <0x8>;

					pbias_regulator {
						compatible = "ti,pbias-dra7", "ti,pbias-omap";
						reg = <0xe00 0x4>;
						syscon = <0x8>;

						pbias_mmc_omap5 {
							regulator-name = "pbias_mmc_omap5";
							regulator-min-microvolt = <0x1b7740>;
							regulator-max-microvolt = <0x325aa0>;
							linux,phandle = <0xd6>;
							phandle = <0xd6>;
						};
					};

					clocks {
						#address-cells = <0x1>;
						#size-cells = <0x0>;

						dss_deshdcp_clk {
							#clock-cells = <0x0>;
							compatible = "ti,gate-clock";
							clocks = <0x9>;
							ti,bit-shift = <0x0>;
							reg = <0x558>;
						};

						sys_32k_ck {
							#clock-cells = <0x0>;
							compatible = "ti,mux-clock";
							clocks = <0xa 0xb 0xb 0xb>;
							ti,bit-shift = <0x8>;
							reg = <0x6c4>;
							linux,phandle = <0x52>;
							phandle = <0x52>;
						};

						ehrpwm0_tbclk {
							#clock-cells = <0x0>;
							compatible = "ti,gate-clock";
							clocks = <0xc>;
							ti,bit-shift = <0x14>;
							reg = <0x558>;
							linux,phandle = <0x125>;
							phandle = <0x125>;
						};

						ehrpwm1_tbclk {
							#clock-cells = <0x0>;
							compatible = "ti,gate-clock";
							clocks = <0xc>;
							ti,bit-shift = <0x15>;
							reg = <0x558>;
							linux,phandle = <0x126>;
							phandle = <0x126>;
						};

						ehrpwm2_tbclk {
							#clock-cells = <0x0>;
							compatible = "ti,gate-clock";
							clocks = <0xc>;
							ti,bit-shift = <0x16>;
							reg = <0x558>;
							linux,phandle = <0x127>;
							phandle = <0x127>;
						};

						dpll_gmac_h14x2_ctrl_ck@3fc {
							#clock-cells = <0x0>;
							compatible = "ti,divider-clock";
							clocks = <0xd>;
							ti,max-div = <0x3f>;
							reg = <0x3fc>;
							ti,bit-shift = <0x14>;
							ti,latch-bit = <0x1a>;
							assigned-clocks = <0xe>;
							assigned-clock-rates = <0x4c4b400>;
							linux,phandle = <0xe>;
							phandle = <0xe>;
						};

						dpll_gmac_h14x2_ctrl_mux_ck@3fc {
							#clock-cells = <0x0>;
							compatible = "ti,mux-clock";
							clocks = <0xf 0xe>;
							reg = <0x3fc>;
							ti,bit-shift = <0x1d>;
							ti,latch-bit = <0x1a>;
							assigned-clocks = <0x10>;
							assigned-clock-parents = <0xe>;
							linux,phandle = <0x10>;
							phandle = <0x10>;
						};

						mcan_clk@3fc {
							#clock-cells = <0x0>;
							compatible = "ti,gate-clock";
							clocks = <0x10>;
							ti,bit-shift = <0x1b>;
							reg = <0x3fc>;
							linux,phandle = <0x130>;
							phandle = <0x130>;
						};
					};
				};

				pinmux@1400 {
					compatible = "ti,dra7-padconf", "pinctrl-single";
					reg = <0x1400 0x468>;
					#address-cells = <0x1>;
					#size-cells = <0x0>;
					#interrupt-cells = <0x1>;
					interrupt-controller;
					pinctrl-single,register-width = <0x20>;
					pinctrl-single,function-mask = <0x3fffffff>;
					linux,phandle = <0xb2>;
					phandle = <0xb2>;

					mmc1_pins_default {
						pinctrl-single,pins = <0x354 0x60000 0x358 0x60000 0x35c 0x60000 0x360 0x60000 0x364 0x60000 0x368 0x60000>;
						linux,phandle = <0xda>;
						phandle = <0xda>;
					};

					mmc1_pins_sdr12 {
						pinctrl-single,pins = <0x354 0x60000 0x358 0x60000 0x35c 0x60000 0x360 0x60000 0x364 0x60000 0x368 0x60000>;
					};

					mmc1_pins_hs {
						pinctrl-single,pins = <0x354 0x601b0 0x358 0x601b0 0x35c 0x601b0 0x360 0x601b0 0x364 0x601b0 0x368 0x601b0>;
						linux,phandle = <0xdb>;
						phandle = <0xdb>;
					};

					mmc1_pins_sdr25 {
						pinctrl-single,pins = <0x354 0x601b0 0x358 0x601b0 0x35c 0x601b0 0x360 0x601b0 0x364 0x601b0 0x368 0x601b0>;
					};

					mmc1_pins_sdr50 {
						pinctrl-single,pins = <0x354 0x601a0 0x358 0x601a0 0x35c 0x601a0 0x360 0x601a0 0x364 0x601a0 0x368 0x601a0>;
					};

					mmc1_pins_ddr50 {
						pinctrl-single,pins = <0x354 0x60100 0x358 0x60100 0x35c 0x60100 0x360 0x60100 0x364 0x60100 0x368 0x60100>;
					};

					mmc1_pins_sdr104 {
						pinctrl-single,pins = <0x354 0x60100 0x358 0x60100 0x35c 0x60100 0x360 0x60100 0x364 0x60100 0x368 0x60100>;
					};

					mmc2_pins_default {
						pinctrl-single,pins = <0x9c 0x60001 0xb0 0x60001 0xa0 0x60001 0xa4 0x60001 0xa8 0x60001 0xac 0x60001 0x8c 0x60001 0x90 0x60001 0x94 0x60001 0x98 0x60001>;
						linux,phandle = <0xdd>;
						phandle = <0xdd>;
					};

					mmc2_pins_hs {
						pinctrl-single,pins = <0x9c 0x60001 0xb0 0x60001 0xa0 0x60001 0xa4 0x60001 0xa8 0x60001 0xac 0x60001 0x8c 0x60001 0x90 0x60001 0x94 0x60001 0x98 0x60001>;
						linux,phandle = <0xde>;
						phandle = <0xde>;
					};

					mmc2_pins_ddr {
						pinctrl-single,pins = <0x9c 0x60001 0xb0 0x60001 0xa0 0x60001 0xa4 0x60001 0xa8 0x60001 0xac 0x60001 0x8c 0x60001 0x90 0x60001 0x94 0x60001 0x98 0x60001>;
						linux,phandle = <0xdf>;
						phandle = <0xdf>;
					};

					mmc2_pins_hs200 {
						pinctrl-single,pins = <0x9c 0x60101 0xb0 0x60101 0xa0 0x60101 0xa4 0x60101 0xa8 0x60101 0xac 0x60101 0x8c 0x60101 0x90 0x60101 0x94 0x60101 0x98 0x60101>;
						linux,phandle = <0xe0>;
						phandle = <0xe0>;
					};

					mmc3_pins_default {
						pinctrl-single,pins = <0x37c 0x60100 0x380 0x60100 0x384 0x60100 0x388 0x60100 0x38c 0x60100 0x390 0x60100>;
					};

					mmc3_pins_hs {
						pinctrl-single,pins = <0x37c 0x60100 0x380 0x60100 0x384 0x60100 0x388 0x60100 0x38c 0x60100 0x390 0x60100>;
					};

					mmc3_pins_sdr12 {
						pinctrl-single,pins = <0x37c 0x60100 0x380 0x60100 0x384 0x60100 0x388 0x60100 0x38c 0x60100 0x390 0x60100>;
					};

					mmc3_pins_sdr25 {
						pinctrl-single,pins = <0x37c 0x60100 0x380 0x60100 0x384 0x60100 0x388 0x60100 0x38c 0x60100 0x390 0x60100>;
					};

					mmc3_pins_sdr50 {
						pinctrl-single,pins = <0x37c 0x60100 0x380 0x60100 0x384 0x60100 0x388 0x60100 0x38c 0x60100 0x390 0x60100>;
					};

					mmc4_pins_default {
						pinctrl-single,pins = <0x3e8 0x60103 0x3ec 0x60103 0x3f0 0x60103 0x3f4 0x60103 0x3f8 0x60103 0x3fc 0x60103>;
					};

					mmc4_pins_sdr12 {
						pinctrl-single,pins = <0x3e8 0x60103 0x3ec 0x60103 0x3f0 0x60103 0x3f4 0x60103 0x3f8 0x60103 0x3fc 0x60103>;
					};

					mmc4_pins_hs {
						pinctrl-single,pins = <0x3e8 0x60103 0x3ec 0x60103 0x3f0 0x60103 0x3f4 0x60103 0x3f8 0x60103 0x3fc 0x60103>;
						linux,phandle = <0xe3>;
						phandle = <0xe3>;
					};

					mmc4_pins_sdr25 {
						pinctrl-single,pins = <0x3e8 0x60103 0x3ec 0x60103 0x3f0 0x60103 0x3f4 0x60103 0x3f8 0x60103 0x3fc 0x60103>;
					};
				};

				scm_conf@1c04 {
					compatible = "syscon";
					reg = <0x1c04 0x20>;
					linux,phandle = <0xae>;
					phandle = <0xae>;
				};

				scm_conf@1c24 {
					compatible = "syscon";
					reg = <0x1c24 0x24>;
					linux,phandle = <0xac>;
					phandle = <0xac>;
				};

				dma-router@b78 {
					compatible = "ti,dra7-dma-crossbar";
					reg = <0xb78 0xfc>;
					#dma-cells = <0x1>;
					dma-requests = <0xcd>;
					ti,dma-safe-map = <0x0>;
					dma-masters = <0x11>;
					linux,phandle = <0xd5>;
					phandle = <0xd5>;
				};

				dma-router@c78 {
					compatible = "ti,dra7-dma-crossbar";
					reg = <0xc78 0x7c>;
					#dma-cells = <0x2>;
					dma-requests = <0xcc>;
					ti,dma-safe-map = <0x0>;
					dma-masters = <0x12>;
					linux,phandle = <0xb3>;
					phandle = <0xb3>;
				};
			};

			cm_core_aon@5000 {
				compatible = "ti,dra7-cm-core-aon";
				reg = <0x5000 0x2000>;

				clocks {
					#address-cells = <0x1>;
					#size-cells = <0x0>;

					atl_clkin0_ck {
						#clock-cells = <0x0>;
						compatible = "ti,dra7-atl-clock";
						clocks = <0x13>;
						linux,phandle = <0x45>;
						phandle = <0x45>;
					};

					atl_clkin1_ck {
						#clock-cells = <0x0>;
						compatible = "ti,dra7-atl-clock";
						clocks = <0x13>;
						linux,phandle = <0x44>;
						phandle = <0x44>;
					};

					atl_clkin2_ck {
						#clock-cells = <0x0>;
						compatible = "ti,dra7-atl-clock";
						clocks = <0x13>;
						linux,phandle = <0x43>;
						phandle = <0x43>;
					};

					atl_clkin3_ck {
						#clock-cells = <0x0>;
						compatible = "ti,dra7-atl-clock";
						clocks = <0x13>;
						linux,phandle = <0x42>;
						phandle = <0x42>;
					};

					hdmi_clkin_ck {
						#clock-cells = <0x0>;
						compatible = "fixed-clock";
						clock-frequency = <0x0>;
						linux,phandle = <0x32>;
						phandle = <0x32>;
					};

					mlb_clkin_ck {
						#clock-cells = <0x0>;
						compatible = "fixed-clock";
						clock-frequency = <0x0>;
						linux,phandle = <0xa7>;
						phandle = <0xa7>;
					};

					mlbp_clkin_ck {
						#clock-cells = <0x0>;
						compatible = "fixed-clock";
						clock-frequency = <0x0>;
						linux,phandle = <0xa8>;
						phandle = <0xa8>;
					};

					pciesref_acs_clk_ck {
						#clock-cells = <0x0>;
						compatible = "fixed-clock";
						clock-frequency = <0x5f5e100>;
						linux,phandle = <0x5c>;
						phandle = <0x5c>;
					};

					ref_clkin0_ck {
						#clock-cells = <0x0>;
						compatible = "fixed-clock";
						clock-frequency = <0x0>;
						linux,phandle = <0x47>;
						phandle = <0x47>;
					};

					ref_clkin1_ck {
						#clock-cells = <0x0>;
						compatible = "fixed-clock";
						clock-frequency = <0x0>;
						linux,phandle = <0x48>;
						phandle = <0x48>;
					};

					ref_clkin2_ck {
						#clock-cells = <0x0>;
						compatible = "fixed-clock";
						clock-frequency = <0x0>;
						linux,phandle = <0x49>;
						phandle = <0x49>;
					};

					ref_clkin3_ck {
						#clock-cells = <0x0>;
						compatible = "fixed-clock";
						clock-frequency = <0x0>;
						linux,phandle = <0x4a>;
						phandle = <0x4a>;
					};

					rmii_clk_ck {
						#clock-cells = <0x0>;
						compatible = "fixed-clock";
						clock-frequency = <0x0>;
						linux,phandle = <0x73>;
						phandle = <0x73>;
					};

					sdvenc_clkin_ck {
						#clock-cells = <0x0>;
						compatible = "fixed-clock";
						clock-frequency = <0x0>;
					};

					secure_32k_clk_src_ck {
						#clock-cells = <0x0>;
						compatible = "fixed-clock";
						clock-frequency = <0x8000>;
						linux,phandle = <0x91>;
						phandle = <0x91>;
					};

					sys_clk32_crystal_ck {
						#clock-cells = <0x0>;
						compatible = "fixed-clock";
						clock-frequency = <0x8000>;
						linux,phandle = <0xa>;
						phandle = <0xa>;
					};

					sys_clk32_pseudo_ck {
						#clock-cells = <0x0>;
						compatible = "fixed-factor-clock";
						clocks = <0x14>;
						clock-mult = <0x1>;
						clock-div = <0x262>;
						linux,phandle = <0xb>;
						phandle = <0xb>;
					};

					virt_12000000_ck {
						#clock-cells = <0x0>;
						compatible = "fixed-clock";
						clock-frequency = <0xb71b00>;
						linux,phandle = <0x81>;
						phandle = <0x81>;
					};

					virt_13000000_ck {
						#clock-cells = <0x0>;
						compatible = "fixed-clock";
						clock-frequency = <0xc65d40>;
					};

					virt_16800000_ck {
						#clock-cells = <0x0>;
						compatible = "fixed-clock";
						clock-frequency = <0x1005900>;
						linux,phandle = <0x83>;
						phandle = <0x83>;
					};

					virt_19200000_ck {
						#clock-cells = <0x0>;
						compatible = "fixed-clock";
						clock-frequency = <0x124f800>;
						linux,phandle = <0x84>;
						phandle = <0x84>;
					};

					virt_20000000_ck {
						#clock-cells = <0x0>;
						compatible = "fixed-clock";
						clock-frequency = <0x1312d00>;
						linux,phandle = <0x82>;
						phandle = <0x82>;
					};

					virt_26000000_ck {
						#clock-cells = <0x0>;
						compatible = "fixed-clock";
						clock-frequency = <0x18cba80>;
						linux,phandle = <0x85>;
						phandle = <0x85>;
					};

					virt_27000000_ck {
						#clock-cells = <0x0>;
						compatible = "fixed-clock";
						clock-frequency = <0x19bfcc0>;
						linux,phandle = <0x86>;
						phandle = <0x86>;
					};

					virt_38400000_ck {
						#clock-cells = <0x0>;
						compatible = "fixed-clock";
						clock-frequency = <0x249f000>;
						linux,phandle = <0x87>;
						phandle = <0x87>;
					};

					sys_clkin2 {
						#clock-cells = <0x0>;
						compatible = "fixed-clock";
						clock-frequency = <0x1588800>;
						linux,phandle = <0x46>;
						phandle = <0x46>;
					};

					usb_otg_clkin_ck {
						#clock-cells = <0x0>;
						compatible = "fixed-clock";
						clock-frequency = <0x0>;
						linux,phandle = <0x8e>;
						phandle = <0x8e>;
					};

					video1_clkin_ck {
						#clock-cells = <0x0>;
						compatible = "fixed-clock";
						clock-frequency = <0x0>;
						linux,phandle = <0x3b>;
						phandle = <0x3b>;
					};

					video1_m2_clkin_ck {
						#clock-cells = <0x0>;
						compatible = "fixed-clock";
						clock-frequency = <0x0>;
						linux,phandle = <0x31>;
						phandle = <0x31>;
					};

					video2_clkin_ck {
						#clock-cells = <0x0>;
						compatible = "fixed-clock";
						clock-frequency = <0x0>;
						linux,phandle = <0x3c>;
						phandle = <0x3c>;
					};

					video2_m2_clkin_ck {
						#clock-cells = <0x0>;
						compatible = "fixed-clock";
						clock-frequency = <0x0>;
						linux,phandle = <0x30>;
						phandle = <0x30>;
					};

					dpll_abe_ck {
						#clock-cells = <0x0>;
						compatible = "ti,omap4-dpll-m4xen-clock";
						clocks = <0x15 0x16>;
						reg = <0x1e0 0x1e4 0x1ec 0x1e8>;
						linux,phandle = <0x17>;
						phandle = <0x17>;
					};

					dpll_abe_x2_ck {
						#clock-cells = <0x0>;
						compatible = "ti,omap4-dpll-x2-clock";
						clocks = <0x17>;
						linux,phandle = <0x18>;
						phandle = <0x18>;
					};

					dpll_abe_m2x2_ck {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x18>;
						ti,max-div = <0x1f>;
						ti,autoidle-shift = <0x8>;
						reg = <0x1f0>;
						ti,index-starts-at-one;
						ti,invert-autoidle-bit;
						linux,phandle = <0x19>;
						phandle = <0x19>;
					};

					abe_clk {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x19>;
						ti,max-div = <0x4>;
						reg = <0x108>;
						ti,index-power-of-two;
						linux,phandle = <0x89>;
						phandle = <0x89>;
					};

					dpll_abe_m2_ck {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x17>;
						ti,max-div = <0x1f>;
						ti,autoidle-shift = <0x8>;
						reg = <0x1f0>;
						ti,index-starts-at-one;
						ti,invert-autoidle-bit;
						linux,phandle = <0x71>;
						phandle = <0x71>;
					};

					dpll_abe_m3x2_ck {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x18>;
						ti,max-div = <0x1f>;
						ti,autoidle-shift = <0x8>;
						reg = <0x1f4>;
						ti,index-starts-at-one;
						ti,invert-autoidle-bit;
						linux,phandle = <0x1a>;
						phandle = <0x1a>;
					};

					dpll_core_byp_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x14 0x1a>;
						ti,bit-shift = <0x17>;
						reg = <0x12c>;
						linux,phandle = <0x1b>;
						phandle = <0x1b>;
					};

					dpll_core_ck {
						#clock-cells = <0x0>;
						compatible = "ti,omap4-dpll-core-clock";
						clocks = <0x14 0x1b>;
						reg = <0x120 0x124 0x12c 0x128>;
						linux,phandle = <0x1c>;
						phandle = <0x1c>;
					};

					dpll_core_x2_ck {
						#clock-cells = <0x0>;
						compatible = "ti,omap4-dpll-x2-clock";
						clocks = <0x1c>;
						linux,phandle = <0x1d>;
						phandle = <0x1d>;
					};

					dpll_core_h12x2_ck {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x1d>;
						ti,max-div = <0x3f>;
						ti,autoidle-shift = <0x8>;
						reg = <0x13c>;
						ti,index-starts-at-one;
						ti,invert-autoidle-bit;
						linux,phandle = <0x1e>;
						phandle = <0x1e>;
					};

					mpu_dpll_hs_clk_div {
						#clock-cells = <0x0>;
						compatible = "fixed-factor-clock";
						clocks = <0x1e>;
						clock-mult = <0x1>;
						clock-div = <0x1>;
						linux,phandle = <0x1f>;
						phandle = <0x1f>;
					};

					dpll_mpu_ck {
						#clock-cells = <0x0>;
						compatible = "ti,omap5-mpu-dpll-clock";
						clocks = <0x14 0x1f>;
						reg = <0x160 0x164 0x16c 0x168>;
						linux,phandle = <0x6>;
						phandle = <0x6>;
					};

					dpll_mpu_m2_ck {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x6>;
						ti,max-div = <0x1f>;
						ti,autoidle-shift = <0x8>;
						reg = <0x170>;
						ti,index-starts-at-one;
						ti,invert-autoidle-bit;
						linux,phandle = <0x20>;
						phandle = <0x20>;
					};

					mpu_dclk_div {
						#clock-cells = <0x0>;
						compatible = "fixed-factor-clock";
						clocks = <0x20>;
						clock-mult = <0x1>;
						clock-div = <0x1>;
						linux,phandle = <0x95>;
						phandle = <0x95>;
					};

					dsp_dpll_hs_clk_div {
						#clock-cells = <0x0>;
						compatible = "fixed-factor-clock";
						clocks = <0x1e>;
						clock-mult = <0x1>;
						clock-div = <0x1>;
						linux,phandle = <0x21>;
						phandle = <0x21>;
					};

					dpll_dsp_byp_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x14 0x21>;
						ti,bit-shift = <0x17>;
						reg = <0x240>;
						linux,phandle = <0x22>;
						phandle = <0x22>;
					};

					dpll_dsp_ck {
						#clock-cells = <0x0>;
						compatible = "ti,omap4-dpll-clock";
						clocks = <0x14 0x22>;
						reg = <0x234 0x238 0x240 0x23c>;
						assigned-clocks = <0x23>;
						assigned-clock-rates = <0x23c34600>;
						linux,phandle = <0x23>;
						phandle = <0x23>;
					};

					dpll_dsp_m2_ck {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x23>;
						ti,max-div = <0x1f>;
						ti,autoidle-shift = <0x8>;
						reg = <0x244>;
						ti,index-starts-at-one;
						ti,invert-autoidle-bit;
						assigned-clocks = <0x24>;
						assigned-clock-rates = <0x23c34600>;
						linux,phandle = <0x24>;
						phandle = <0x24>;
					};

					iva_dpll_hs_clk_div {
						#clock-cells = <0x0>;
						compatible = "fixed-factor-clock";
						clocks = <0x1e>;
						clock-mult = <0x1>;
						clock-div = <0x1>;
						linux,phandle = <0x25>;
						phandle = <0x25>;
					};

					dpll_iva_byp_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x14 0x25>;
						ti,bit-shift = <0x17>;
						reg = <0x1ac>;
						linux,phandle = <0x26>;
						phandle = <0x26>;
					};

					dpll_iva_ck {
						#clock-cells = <0x0>;
						compatible = "ti,omap4-dpll-clock";
						clocks = <0x14 0x26>;
						reg = <0x1a0 0x1a4 0x1ac 0x1a8>;
						assigned-clocks = <0x27>;
						assigned-clock-rates = <0x45707d40>;
						linux,phandle = <0x27>;
						phandle = <0x27>;
					};

					dpll_iva_m2_ck {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x27>;
						ti,max-div = <0x1f>;
						ti,autoidle-shift = <0x8>;
						reg = <0x1b0>;
						ti,index-starts-at-one;
						ti,invert-autoidle-bit;
						assigned-clocks = <0x28>;
						assigned-clock-rates = <0x17257f16>;
						linux,phandle = <0x28>;
						phandle = <0x28>;
					};

					iva_dclk {
						#clock-cells = <0x0>;
						compatible = "fixed-factor-clock";
						clocks = <0x28>;
						clock-mult = <0x1>;
						clock-div = <0x1>;
						linux,phandle = <0x97>;
						phandle = <0x97>;
					};

					dpll_gpu_byp_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x14 0x1a>;
						ti,bit-shift = <0x17>;
						reg = <0x2e4>;
						linux,phandle = <0x29>;
						phandle = <0x29>;
					};

					dpll_gpu_ck {
						#clock-cells = <0x0>;
						compatible = "ti,omap4-dpll-clock";
						clocks = <0x14 0x29>;
						reg = <0x2d8 0x2dc 0x2e4 0x2e0>;
						assigned-clocks = <0x2a>;
						assigned-clock-rates = <0x4c1d7940>;
						linux,phandle = <0x2a>;
						phandle = <0x2a>;
					};

					dpll_gpu_m2_ck {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x2a>;
						ti,max-div = <0x1f>;
						ti,autoidle-shift = <0x8>;
						reg = <0x2e8>;
						ti,index-starts-at-one;
						ti,invert-autoidle-bit;
						assigned-clocks = <0x2b>;
						assigned-clock-rates = <0x195f286b>;
						linux,phandle = <0x2b>;
						phandle = <0x2b>;
					};

					dpll_core_m2_ck {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x1c>;
						ti,max-div = <0x1f>;
						ti,autoidle-shift = <0x8>;
						reg = <0x130>;
						ti,index-starts-at-one;
						ti,invert-autoidle-bit;
						linux,phandle = <0x2c>;
						phandle = <0x2c>;
					};

					core_dpll_out_dclk_div {
						#clock-cells = <0x0>;
						compatible = "fixed-factor-clock";
						clocks = <0x2c>;
						clock-mult = <0x1>;
						clock-div = <0x1>;
						linux,phandle = <0x99>;
						phandle = <0x99>;
					};

					dpll_ddr_byp_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x14 0x1a>;
						ti,bit-shift = <0x17>;
						reg = <0x21c>;
						linux,phandle = <0x2d>;
						phandle = <0x2d>;
					};

					dpll_ddr_ck {
						#clock-cells = <0x0>;
						compatible = "ti,omap4-dpll-clock";
						clocks = <0x14 0x2d>;
						reg = <0x210 0x214 0x21c 0x218>;
						linux,phandle = <0x2e>;
						phandle = <0x2e>;
					};

					dpll_ddr_m2_ck {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x2e>;
						ti,max-div = <0x1f>;
						ti,autoidle-shift = <0x8>;
						reg = <0x220>;
						ti,index-starts-at-one;
						ti,invert-autoidle-bit;
						linux,phandle = <0x8b>;
						phandle = <0x8b>;
					};

					dpll_gmac_byp_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x14 0x1a>;
						ti,bit-shift = <0x17>;
						reg = <0x2b4>;
						linux,phandle = <0x2f>;
						phandle = <0x2f>;
					};

					dpll_gmac_ck {
						#clock-cells = <0x0>;
						compatible = "ti,omap4-dpll-clock";
						clocks = <0x14 0x2f>;
						reg = <0x2a8 0x2ac 0x2b4 0x2b0>;
						linux,phandle = <0xf>;
						phandle = <0xf>;
					};

					dpll_gmac_m2_ck {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0xf>;
						ti,max-div = <0x1f>;
						ti,autoidle-shift = <0x8>;
						reg = <0x2b8>;
						ti,index-starts-at-one;
						ti,invert-autoidle-bit;
						linux,phandle = <0x8c>;
						phandle = <0x8c>;
					};

					video2_dclk_div {
						#clock-cells = <0x0>;
						compatible = "fixed-factor-clock";
						clocks = <0x30>;
						clock-mult = <0x1>;
						clock-div = <0x1>;
						linux,phandle = <0x9b>;
						phandle = <0x9b>;
					};

					video1_dclk_div {
						#clock-cells = <0x0>;
						compatible = "fixed-factor-clock";
						clocks = <0x31>;
						clock-mult = <0x1>;
						clock-div = <0x1>;
						linux,phandle = <0x9c>;
						phandle = <0x9c>;
					};

					hdmi_dclk_div {
						#clock-cells = <0x0>;
						compatible = "fixed-factor-clock";
						clocks = <0x32>;
						clock-mult = <0x1>;
						clock-div = <0x1>;
						linux,phandle = <0x9d>;
						phandle = <0x9d>;
					};

					per_dpll_hs_clk_div {
						#clock-cells = <0x0>;
						compatible = "fixed-factor-clock";
						clocks = <0x1a>;
						clock-mult = <0x1>;
						clock-div = <0x2>;
						linux,phandle = <0x60>;
						phandle = <0x60>;
					};

					usb_dpll_hs_clk_div {
						#clock-cells = <0x0>;
						compatible = "fixed-factor-clock";
						clocks = <0x1a>;
						clock-mult = <0x1>;
						clock-div = <0x3>;
						linux,phandle = <0x64>;
						phandle = <0x64>;
					};

					eve_dpll_hs_clk_div {
						#clock-cells = <0x0>;
						compatible = "fixed-factor-clock";
						clocks = <0x1e>;
						clock-mult = <0x1>;
						clock-div = <0x1>;
						linux,phandle = <0x33>;
						phandle = <0x33>;
					};

					dpll_eve_byp_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x14 0x33>;
						ti,bit-shift = <0x17>;
						reg = <0x290>;
						linux,phandle = <0x34>;
						phandle = <0x34>;
					};

					dpll_eve_ck {
						#clock-cells = <0x0>;
						compatible = "ti,omap4-dpll-clock";
						clocks = <0x14 0x34>;
						reg = <0x284 0x288 0x290 0x28c>;
						linux,phandle = <0x35>;
						phandle = <0x35>;
					};

					dpll_eve_m2_ck {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x35>;
						ti,max-div = <0x1f>;
						ti,autoidle-shift = <0x8>;
						reg = <0x294>;
						ti,index-starts-at-one;
						ti,invert-autoidle-bit;
						linux,phandle = <0x36>;
						phandle = <0x36>;
					};

					eve_dclk_div {
						#clock-cells = <0x0>;
						compatible = "fixed-factor-clock";
						clocks = <0x36>;
						clock-mult = <0x1>;
						clock-div = <0x1>;
						linux,phandle = <0xa6>;
						phandle = <0xa6>;
					};

					dpll_core_h13x2_ck {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x1d>;
						ti,max-div = <0x3f>;
						ti,autoidle-shift = <0x8>;
						reg = <0x140>;
						ti,index-starts-at-one;
						ti,invert-autoidle-bit;
					};

					dpll_core_h14x2_ck {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x1d>;
						ti,max-div = <0x3f>;
						ti,autoidle-shift = <0x8>;
						reg = <0x144>;
						ti,index-starts-at-one;
						ti,invert-autoidle-bit;
						linux,phandle = <0x74>;
						phandle = <0x74>;
					};

					dpll_core_h22x2_ck {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x1d>;
						ti,max-div = <0x3f>;
						ti,autoidle-shift = <0x8>;
						reg = <0x154>;
						ti,index-starts-at-one;
						ti,invert-autoidle-bit;
						linux,phandle = <0x3d>;
						phandle = <0x3d>;
					};

					dpll_core_h23x2_ck {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x1d>;
						ti,max-div = <0x3f>;
						ti,autoidle-shift = <0x8>;
						reg = <0x158>;
						ti,index-starts-at-one;
						ti,invert-autoidle-bit;
						linux,phandle = <0x80>;
						phandle = <0x80>;
					};

					dpll_core_h24x2_ck {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x1d>;
						ti,max-div = <0x3f>;
						ti,autoidle-shift = <0x8>;
						reg = <0x15c>;
						ti,index-starts-at-one;
						ti,invert-autoidle-bit;
						linux,phandle = <0xc8>;
						phandle = <0xc8>;
					};

					dpll_ddr_x2_ck {
						#clock-cells = <0x0>;
						compatible = "ti,omap4-dpll-x2-clock";
						clocks = <0x2e>;
						linux,phandle = <0x37>;
						phandle = <0x37>;
					};

					dpll_ddr_h11x2_ck {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x37>;
						ti,max-div = <0x3f>;
						ti,autoidle-shift = <0x8>;
						reg = <0x228>;
						ti,index-starts-at-one;
						ti,invert-autoidle-bit;
					};

					dpll_dsp_x2_ck {
						#clock-cells = <0x0>;
						compatible = "ti,omap4-dpll-x2-clock";
						clocks = <0x23>;
						linux,phandle = <0x38>;
						phandle = <0x38>;
					};

					dpll_dsp_m3x2_ck {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x38>;
						ti,max-div = <0x1f>;
						ti,autoidle-shift = <0x8>;
						reg = <0x248>;
						ti,index-starts-at-one;
						ti,invert-autoidle-bit;
						assigned-clocks = <0x39>;
						assigned-clock-rates = <0x17d78400>;
						linux,phandle = <0x39>;
						phandle = <0x39>;
					};

					dpll_gmac_x2_ck {
						#clock-cells = <0x0>;
						compatible = "ti,omap4-dpll-x2-clock";
						clocks = <0xf>;
						linux,phandle = <0xd>;
						phandle = <0xd>;
					};

					dpll_gmac_h11x2_ck {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0xd>;
						ti,max-div = <0x3f>;
						ti,autoidle-shift = <0x8>;
						reg = <0x2c0>;
						ti,index-starts-at-one;
						ti,invert-autoidle-bit;
						linux,phandle = <0x3a>;
						phandle = <0x3a>;
					};

					dpll_gmac_h12x2_ck {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0xd>;
						ti,max-div = <0x3f>;
						ti,autoidle-shift = <0x8>;
						reg = <0x2c4>;
						ti,index-starts-at-one;
						ti,invert-autoidle-bit;
					};

					dpll_gmac_h13x2_ck {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0xd>;
						ti,max-div = <0x3f>;
						ti,autoidle-shift = <0x8>;
						reg = <0x2c8>;
						ti,index-starts-at-one;
						ti,invert-autoidle-bit;
						linux,phandle = <0xe8>;
						phandle = <0xe8>;
					};

					dpll_gmac_m3x2_ck {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0xd>;
						ti,max-div = <0x1f>;
						ti,autoidle-shift = <0x8>;
						reg = <0x2bc>;
						ti,index-starts-at-one;
						ti,invert-autoidle-bit;
					};

					gmii_m_clk_div {
						#clock-cells = <0x0>;
						compatible = "fixed-factor-clock";
						clocks = <0x3a>;
						clock-mult = <0x1>;
						clock-div = <0x2>;
					};

					hdmi_clk2_div {
						#clock-cells = <0x0>;
						compatible = "fixed-factor-clock";
						clocks = <0x32>;
						clock-mult = <0x1>;
						clock-div = <0x1>;
						linux,phandle = <0x50>;
						phandle = <0x50>;
					};

					hdmi_div_clk {
						#clock-cells = <0x0>;
						compatible = "fixed-factor-clock";
						clocks = <0x32>;
						clock-mult = <0x1>;
						clock-div = <0x1>;
						linux,phandle = <0x56>;
						phandle = <0x56>;
					};

					l3_iclk_div {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						ti,max-div = <0x2>;
						ti,bit-shift = <0x4>;
						reg = <0x100>;
						clocks = <0x1e>;
						ti,index-power-of-two;
						linux,phandle = <0x9>;
						phandle = <0x9>;
					};

					l4_root_clk_div {
						#clock-cells = <0x0>;
						compatible = "fixed-factor-clock";
						clocks = <0x9>;
						clock-mult = <0x1>;
						clock-div = <0x2>;
						linux,phandle = <0xc>;
						phandle = <0xc>;
					};

					video1_clk2_div {
						#clock-cells = <0x0>;
						compatible = "fixed-factor-clock";
						clocks = <0x3b>;
						clock-mult = <0x1>;
						clock-div = <0x1>;
						linux,phandle = <0x4e>;
						phandle = <0x4e>;
					};

					video1_div_clk {
						#clock-cells = <0x0>;
						compatible = "fixed-factor-clock";
						clocks = <0x3b>;
						clock-mult = <0x1>;
						clock-div = <0x1>;
						linux,phandle = <0x54>;
						phandle = <0x54>;
					};

					video2_clk2_div {
						#clock-cells = <0x0>;
						compatible = "fixed-factor-clock";
						clocks = <0x3c>;
						clock-mult = <0x1>;
						clock-div = <0x1>;
						linux,phandle = <0x4f>;
						phandle = <0x4f>;
					};

					video2_div_clk {
						#clock-cells = <0x0>;
						compatible = "fixed-factor-clock";
						clocks = <0x3c>;
						clock-mult = <0x1>;
						clock-div = <0x1>;
						linux,phandle = <0x55>;
						phandle = <0x55>;
					};

					ipu1_gfclk_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x19 0x3d>;
						ti,bit-shift = <0x18>;
						reg = <0x520>;
						assigned-clocks = <0x3e>;
						assigned-clock-parents = <0x3d>;
						linux,phandle = <0x3e>;
						phandle = <0x3e>;
					};

					mcasp1_ahclkr_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4a 0x4b 0x4c>;
						ti,bit-shift = <0x1c>;
						reg = <0x550>;
						linux,phandle = <0x107>;
						phandle = <0x107>;
					};

					mcasp1_ahclkx_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4a 0x4b 0x4c>;
						ti,bit-shift = <0x18>;
						reg = <0x550>;
						linux,phandle = <0x106>;
						phandle = <0x106>;
					};

					mcasp1_aux_gfclk_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x4d 0x4e 0x4f 0x50>;
						ti,bit-shift = <0x16>;
						reg = <0x550>;
						linux,phandle = <0x105>;
						phandle = <0x105>;
					};

					timer5_gfclk_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x51 0x52 0x46 0x47 0x48 0x49 0x4a 0x53 0x54 0x55 0x56 0x57>;
						ti,bit-shift = <0x18>;
						reg = <0x558>;
					};

					timer6_gfclk_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x51 0x52 0x46 0x47 0x48 0x49 0x4a 0x53 0x54 0x55 0x56 0x57>;
						ti,bit-shift = <0x18>;
						reg = <0x560>;
					};

					timer7_gfclk_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x51 0x52 0x46 0x47 0x48 0x49 0x4a 0x53 0x54 0x55 0x56 0x57>;
						ti,bit-shift = <0x18>;
						reg = <0x568>;
					};

					timer8_gfclk_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x51 0x52 0x46 0x47 0x48 0x49 0x4a 0x53 0x54 0x55 0x56 0x57>;
						ti,bit-shift = <0x18>;
						reg = <0x570>;
					};

					uart6_gfclk_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x58 0x59>;
						ti,bit-shift = <0x18>;
						reg = <0x580>;
					};

					dummy_ck {
						#clock-cells = <0x0>;
						compatible = "fixed-clock";
						clock-frequency = <0x0>;
					};
				};

				clockdomains {
				};
			};

			cm_core@8000 {
				compatible = "ti,dra7-cm-core";
				reg = <0x8000 0x3000>;

				clocks {
					#address-cells = <0x1>;
					#size-cells = <0x0>;

					dpll_pcie_ref_ck {
						#clock-cells = <0x0>;
						compatible = "ti,omap4-dpll-clock";
						clocks = <0x14 0x14>;
						reg = <0x200 0x204 0x20c 0x208>;
						linux,phandle = <0x5a>;
						phandle = <0x5a>;
					};

					dpll_pcie_ref_m2ldo_ck {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x5a>;
						ti,max-div = <0x1f>;
						ti,autoidle-shift = <0x8>;
						reg = <0x210>;
						ti,index-starts-at-one;
						ti,invert-autoidle-bit;
						linux,phandle = <0x5b>;
						phandle = <0x5b>;
					};

					apll_pcie_in_clk_mux@4ae06118 {
						compatible = "ti,mux-clock";
						clocks = <0x5b 0x5c>;
						#clock-cells = <0x0>;
						reg = <0x21c 0x4>;
						ti,bit-shift = <0x7>;
						linux,phandle = <0x5d>;
						phandle = <0x5d>;
					};

					apll_pcie_ck {
						#clock-cells = <0x0>;
						compatible = "ti,dra7-apll-clock";
						clocks = <0x5d 0x5a>;
						reg = <0x21c 0x220>;
						linux,phandle = <0x5e>;
						phandle = <0x5e>;
					};

					optfclk_pciephy1_32khz@4a0093b0 {
						compatible = "ti,gate-clock";
						clocks = <0x52>;
						#clock-cells = <0x0>;
						reg = <0x13b0>;
						ti,bit-shift = <0x8>;
						linux,phandle = <0xf4>;
						phandle = <0xf4>;
					};

					optfclk_pciephy2_32khz@4a0093b8 {
						compatible = "ti,gate-clock";
						clocks = <0x52>;
						#clock-cells = <0x0>;
						reg = <0x13b8>;
						ti,bit-shift = <0x8>;
						linux,phandle = <0xf7>;
						phandle = <0xf7>;
					};

					optfclk_pciephy_div@4a00821c {
						compatible = "ti,divider-clock";
						clocks = <0x5e>;
						#clock-cells = <0x0>;
						reg = <0x21c>;
						ti,dividers = <0x2 0x1>;
						ti,bit-shift = <0x8>;
						ti,max-div = <0x2>;
						linux,phandle = <0x5f>;
						phandle = <0x5f>;
					};

					optfclk_pciephy1_clk@4a0093b0 {
						compatible = "ti,gate-clock";
						clocks = <0x5e>;
						#clock-cells = <0x0>;
						reg = <0x13b0>;
						ti,bit-shift = <0x9>;
						linux,phandle = <0xf5>;
						phandle = <0xf5>;
					};

					optfclk_pciephy2_clk@4a0093b8 {
						compatible = "ti,gate-clock";
						clocks = <0x5e>;
						#clock-cells = <0x0>;
						reg = <0x13b8>;
						ti,bit-shift = <0x9>;
						linux,phandle = <0xf8>;
						phandle = <0xf8>;
					};

					optfclk_pciephy1_div_clk@4a0093b0 {
						compatible = "ti,gate-clock";
						clocks = <0x5f>;
						#clock-cells = <0x0>;
						reg = <0x13b0>;
						ti,bit-shift = <0xa>;
						linux,phandle = <0xf6>;
						phandle = <0xf6>;
					};

					optfclk_pciephy2_div_clk@4a0093b8 {
						compatible = "ti,gate-clock";
						clocks = <0x5f>;
						#clock-cells = <0x0>;
						reg = <0x13b8>;
						ti,bit-shift = <0xa>;
						linux,phandle = <0xf9>;
						phandle = <0xf9>;
					};

					apll_pcie_clkvcoldo {
						#clock-cells = <0x0>;
						compatible = "fixed-factor-clock";
						clocks = <0x5e>;
						clock-mult = <0x1>;
						clock-div = <0x1>;
					};

					apll_pcie_clkvcoldo_div {
						#clock-cells = <0x0>;
						compatible = "fixed-factor-clock";
						clocks = <0x5e>;
						clock-mult = <0x1>;
						clock-div = <0x1>;
					};

					apll_pcie_m2_ck {
						#clock-cells = <0x0>;
						compatible = "fixed-factor-clock";
						clocks = <0x5e>;
						clock-mult = <0x1>;
						clock-div = <0x1>;
						linux,phandle = <0x90>;
						phandle = <0x90>;
					};

					dpll_per_byp_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x14 0x60>;
						ti,bit-shift = <0x17>;
						reg = <0x14c>;
						linux,phandle = <0x61>;
						phandle = <0x61>;
					};

					dpll_per_ck {
						#clock-cells = <0x0>;
						compatible = "ti,omap4-dpll-clock";
						clocks = <0x14 0x61>;
						reg = <0x140 0x144 0x14c 0x148>;
						linux,phandle = <0x62>;
						phandle = <0x62>;
					};

					dpll_per_m2_ck {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x62>;
						ti,max-div = <0x1f>;
						ti,autoidle-shift = <0x8>;
						reg = <0x150>;
						ti,index-starts-at-one;
						ti,invert-autoidle-bit;
						linux,phandle = <0x63>;
						phandle = <0x63>;
					};

					func_96m_aon_dclk_div {
						#clock-cells = <0x0>;
						compatible = "fixed-factor-clock";
						clocks = <0x63>;
						clock-mult = <0x1>;
						clock-div = <0x1>;
						linux,phandle = <0x9e>;
						phandle = <0x9e>;
					};

					dpll_usb_byp_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x14 0x64>;
						ti,bit-shift = <0x17>;
						reg = <0x18c>;
						linux,phandle = <0x65>;
						phandle = <0x65>;
					};

					dpll_usb_ck {
						#clock-cells = <0x0>;
						compatible = "ti,omap4-dpll-j-type-clock";
						clocks = <0x14 0x65>;
						reg = <0x180 0x184 0x18c 0x188>;
						linux,phandle = <0x66>;
						phandle = <0x66>;
					};

					dpll_usb_m2_ck {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x66>;
						ti,max-div = <0x7f>;
						ti,autoidle-shift = <0x8>;
						reg = <0x190>;
						ti,index-starts-at-one;
						ti,invert-autoidle-bit;
						linux,phandle = <0x69>;
						phandle = <0x69>;
					};

					dpll_pcie_ref_m2_ck {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x5a>;
						ti,max-div = <0x7f>;
						ti,autoidle-shift = <0x8>;
						reg = <0x210>;
						ti,index-starts-at-one;
						ti,invert-autoidle-bit;
						linux,phandle = <0x8f>;
						phandle = <0x8f>;
					};

					dpll_per_x2_ck {
						#clock-cells = <0x0>;
						compatible = "ti,omap4-dpll-x2-clock";
						clocks = <0x62>;
						linux,phandle = <0x67>;
						phandle = <0x67>;
					};

					dpll_per_h11x2_ck {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x67>;
						ti,max-div = <0x3f>;
						ti,autoidle-shift = <0x8>;
						reg = <0x158>;
						ti,index-starts-at-one;
						ti,invert-autoidle-bit;
						linux,phandle = <0x68>;
						phandle = <0x68>;
					};

					dpll_per_h12x2_ck {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x67>;
						ti,max-div = <0x3f>;
						ti,autoidle-shift = <0x8>;
						reg = <0x15c>;
						ti,index-starts-at-one;
						ti,invert-autoidle-bit;
						linux,phandle = <0x6c>;
						phandle = <0x6c>;
					};

					dpll_per_h13x2_ck {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x67>;
						ti,max-div = <0x3f>;
						ti,autoidle-shift = <0x8>;
						reg = <0x160>;
						ti,index-starts-at-one;
						ti,invert-autoidle-bit;
						linux,phandle = <0x7e>;
						phandle = <0x7e>;
					};

					dpll_per_h14x2_ck {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x67>;
						ti,max-div = <0x3f>;
						ti,autoidle-shift = <0x8>;
						reg = <0x164>;
						ti,index-starts-at-one;
						ti,invert-autoidle-bit;
						linux,phandle = <0x75>;
						phandle = <0x75>;
					};

					dpll_per_m2x2_ck {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x67>;
						ti,max-div = <0x1f>;
						ti,autoidle-shift = <0x8>;
						reg = <0x150>;
						ti,index-starts-at-one;
						ti,invert-autoidle-bit;
						linux,phandle = <0x59>;
						phandle = <0x59>;
					};

					dpll_usb_clkdcoldo {
						#clock-cells = <0x0>;
						compatible = "fixed-factor-clock";
						clocks = <0x66>;
						clock-mult = <0x1>;
						clock-div = <0x1>;
						linux,phandle = <0x6b>;
						phandle = <0x6b>;
					};

					func_128m_clk {
						#clock-cells = <0x0>;
						compatible = "fixed-factor-clock";
						clocks = <0x68>;
						clock-mult = <0x1>;
						clock-div = <0x2>;
						linux,phandle = <0x79>;
						phandle = <0x79>;
					};

					func_12m_fclk {
						#clock-cells = <0x0>;
						compatible = "fixed-factor-clock";
						clocks = <0x59>;
						clock-mult = <0x1>;
						clock-div = <0x10>;
					};

					func_24m_clk {
						#clock-cells = <0x0>;
						compatible = "fixed-factor-clock";
						clocks = <0x63>;
						clock-mult = <0x1>;
						clock-div = <0x4>;
						linux,phandle = <0x41>;
						phandle = <0x41>;
					};

					func_48m_fclk {
						#clock-cells = <0x0>;
						compatible = "fixed-factor-clock";
						clocks = <0x59>;
						clock-mult = <0x1>;
						clock-div = <0x4>;
						linux,phandle = <0x58>;
						phandle = <0x58>;
					};

					func_96m_fclk {
						#clock-cells = <0x0>;
						compatible = "fixed-factor-clock";
						clocks = <0x59>;
						clock-mult = <0x1>;
						clock-div = <0x2>;
					};

					l3init_60m_fclk {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x69>;
						reg = <0x104>;
						ti,dividers = <0x1 0x8>;
					};

					clkout2_clk {
						#clock-cells = <0x0>;
						compatible = "ti,gate-clock";
						clocks = <0x6a>;
						ti,bit-shift = <0x8>;
						reg = <0x6b0>;
					};

					l3init_960m_gfclk {
						#clock-cells = <0x0>;
						compatible = "ti,gate-clock";
						clocks = <0x6b>;
						ti,bit-shift = <0x8>;
						reg = <0x6c0>;
						linux,phandle = <0x70>;
						phandle = <0x70>;
					};

					dss_32khz_clk {
						#clock-cells = <0x0>;
						compatible = "ti,gate-clock";
						clocks = <0x52>;
						ti,bit-shift = <0xb>;
						reg = <0x1120>;
					};

					dss_48mhz_clk {
						#clock-cells = <0x0>;
						compatible = "ti,gate-clock";
						clocks = <0x58>;
						ti,bit-shift = <0x9>;
						reg = <0x1120>;
						linux,phandle = <0x11f>;
						phandle = <0x11f>;
					};

					dss_dss_clk {
						#clock-cells = <0x0>;
						compatible = "ti,gate-clock";
						clocks = <0x6c>;
						ti,bit-shift = <0x8>;
						reg = <0x1120>;
						ti,set-rate-parent;
						linux,phandle = <0x11b>;
						phandle = <0x11b>;
					};

					dss_hdmi_clk {
						#clock-cells = <0x0>;
						compatible = "ti,gate-clock";
						clocks = <0x6d>;
						ti,bit-shift = <0xa>;
						reg = <0x1120>;
						linux,phandle = <0x120>;
						phandle = <0x120>;
					};

					dss_video1_clk {
						#clock-cells = <0x0>;
						compatible = "ti,gate-clock";
						clocks = <0x6e>;
						ti,bit-shift = <0xc>;
						reg = <0x1120>;
						linux,phandle = <0x11c>;
						phandle = <0x11c>;
					};

					dss_video2_clk {
						#clock-cells = <0x0>;
						compatible = "ti,gate-clock";
						clocks = <0x6f>;
						ti,bit-shift = <0xd>;
						reg = <0x1120>;
						linux,phandle = <0x11d>;
						phandle = <0x11d>;
					};

					gpio2_dbclk {
						#clock-cells = <0x0>;
						compatible = "ti,gate-clock";
						clocks = <0x52>;
						ti,bit-shift = <0x8>;
						reg = <0x1760>;
					};

					gpio3_dbclk {
						#clock-cells = <0x0>;
						compatible = "ti,gate-clock";
						clocks = <0x52>;
						ti,bit-shift = <0x8>;
						reg = <0x1768>;
					};

					gpio4_dbclk {
						#clock-cells = <0x0>;
						compatible = "ti,gate-clock";
						clocks = <0x52>;
						ti,bit-shift = <0x8>;
						reg = <0x1770>;
					};

					gpio5_dbclk {
						#clock-cells = <0x0>;
						compatible = "ti,gate-clock";
						clocks = <0x52>;
						ti,bit-shift = <0x8>;
						reg = <0x1778>;
					};

					gpio6_dbclk {
						#clock-cells = <0x0>;
						compatible = "ti,gate-clock";
						clocks = <0x52>;
						ti,bit-shift = <0x8>;
						reg = <0x1780>;
					};

					gpio7_dbclk {
						#clock-cells = <0x0>;
						compatible = "ti,gate-clock";
						clocks = <0x52>;
						ti,bit-shift = <0x8>;
						reg = <0x1810>;
					};

					gpio8_dbclk {
						#clock-cells = <0x0>;
						compatible = "ti,gate-clock";
						clocks = <0x52>;
						ti,bit-shift = <0x8>;
						reg = <0x1818>;
					};

					mmc1_clk32k {
						#clock-cells = <0x0>;
						compatible = "ti,gate-clock";
						clocks = <0x52>;
						ti,bit-shift = <0x8>;
						reg = <0x1328>;
					};

					mmc2_clk32k {
						#clock-cells = <0x0>;
						compatible = "ti,gate-clock";
						clocks = <0x52>;
						ti,bit-shift = <0x8>;
						reg = <0x1330>;
					};

					mmc3_clk32k {
						#clock-cells = <0x0>;
						compatible = "ti,gate-clock";
						clocks = <0x52>;
						ti,bit-shift = <0x8>;
						reg = <0x1820>;
					};

					mmc4_clk32k {
						#clock-cells = <0x0>;
						compatible = "ti,gate-clock";
						clocks = <0x52>;
						ti,bit-shift = <0x8>;
						reg = <0x1828>;
					};

					sata_ref_clk {
						#clock-cells = <0x0>;
						compatible = "ti,gate-clock";
						clocks = <0x14>;
						ti,bit-shift = <0x8>;
						reg = <0x1388>;
						linux,phandle = <0xf3>;
						phandle = <0xf3>;
					};

					usb_otg_ss1_refclk960m {
						#clock-cells = <0x0>;
						compatible = "ti,gate-clock";
						clocks = <0x70>;
						ti,bit-shift = <0x8>;
						reg = <0x13f0>;
						linux,phandle = <0xfc>;
						phandle = <0xfc>;
					};

					usb_otg_ss2_refclk960m {
						#clock-cells = <0x0>;
						compatible = "ti,gate-clock";
						clocks = <0x70>;
						ti,bit-shift = <0x8>;
						reg = <0x1340>;
						linux,phandle = <0xff>;
						phandle = <0xff>;
					};

					usb_phy1_always_on_clk32k {
						#clock-cells = <0x0>;
						compatible = "ti,gate-clock";
						clocks = <0x52>;
						ti,bit-shift = <0x8>;
						reg = <0x640>;
						linux,phandle = <0xfb>;
						phandle = <0xfb>;
					};

					usb_phy2_always_on_clk32k {
						#clock-cells = <0x0>;
						compatible = "ti,gate-clock";
						clocks = <0x52>;
						ti,bit-shift = <0x8>;
						reg = <0x688>;
						linux,phandle = <0xfe>;
						phandle = <0xfe>;
					};

					usb_phy3_always_on_clk32k {
						#clock-cells = <0x0>;
						compatible = "ti,gate-clock";
						clocks = <0x52>;
						ti,bit-shift = <0x8>;
						reg = <0x698>;
						linux,phandle = <0x100>;
						phandle = <0x100>;
					};

					atl_dpll_clk_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x52 0x3b 0x3c 0x32>;
						ti,bit-shift = <0x18>;
						reg = <0xc00>;
						linux,phandle = <0x72>;
						phandle = <0x72>;
					};

					atl_gfclk_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x9 0x71 0x72>;
						ti,bit-shift = <0x1a>;
						reg = <0xc00>;
						linux,phandle = <0x13>;
						phandle = <0x13>;
					};

					rmii_50mhz_clk_mux@13d0 {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x3a 0x73>;
						ti,bit-shift = <0x18>;
						reg = <0x13d0>;
					};

					gmac_rft_clk_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x3b 0x3c 0x71 0x32 0x9>;
						ti,bit-shift = <0x19>;
						reg = <0x13d0>;
						linux,phandle = <0x118>;
						phandle = <0x118>;
					};

					gpu_core_gclk_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x74 0x75 0x2b>;
						ti,bit-shift = <0x18>;
						reg = <0x1220>;
						assigned-clocks = <0x76>;
						assigned-clock-parents = <0x2b>;
						linux,phandle = <0x76>;
						phandle = <0x76>;
					};

					gpu_hyd_gclk_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x74 0x75 0x2b>;
						ti,bit-shift = <0x1a>;
						reg = <0x1220>;
						assigned-clocks = <0x77>;
						assigned-clock-parents = <0x2b>;
						linux,phandle = <0x77>;
						phandle = <0x77>;
					};

					l3instr_ts_gclk_div {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x78>;
						ti,bit-shift = <0x18>;
						reg = <0xe50>;
						ti,dividers = <0x8 0x10 0x20>;
					};

					mcasp2_ahclkr_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4a 0x4b 0x4c>;
						ti,bit-shift = <0x1c>;
						reg = <0x1860>;
						linux,phandle = <0x10a>;
						phandle = <0x10a>;
					};

					mcasp2_ahclkx_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4a 0x4b 0x4c>;
						ti,bit-shift = <0x18>;
						reg = <0x1860>;
						linux,phandle = <0x109>;
						phandle = <0x109>;
					};

					mcasp2_aux_gfclk_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x4d 0x4e 0x4f 0x50>;
						ti,bit-shift = <0x16>;
						reg = <0x1860>;
						linux,phandle = <0x108>;
						phandle = <0x108>;
					};

					mcasp3_ahclkx_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4a 0x4b 0x4c>;
						ti,bit-shift = <0x18>;
						reg = <0x1868>;
						linux,phandle = <0x10c>;
						phandle = <0x10c>;
					};

					mcasp3_aux_gfclk_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x4d 0x4e 0x4f 0x50>;
						ti,bit-shift = <0x16>;
						reg = <0x1868>;
						linux,phandle = <0x10b>;
						phandle = <0x10b>;
					};

					mcasp4_ahclkx_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4a 0x4b 0x4c>;
						ti,bit-shift = <0x18>;
						reg = <0x1898>;
						linux,phandle = <0x10e>;
						phandle = <0x10e>;
					};

					mcasp4_aux_gfclk_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x4d 0x4e 0x4f 0x50>;
						ti,bit-shift = <0x16>;
						reg = <0x1898>;
						linux,phandle = <0x10d>;
						phandle = <0x10d>;
					};

					mcasp5_ahclkx_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4a 0x4b 0x4c>;
						ti,bit-shift = <0x18>;
						reg = <0x1878>;
						linux,phandle = <0x110>;
						phandle = <0x110>;
					};

					mcasp5_aux_gfclk_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x4d 0x4e 0x4f 0x50>;
						ti,bit-shift = <0x16>;
						reg = <0x1878>;
						linux,phandle = <0x10f>;
						phandle = <0x10f>;
					};

					mcasp6_ahclkx_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4a 0x4b 0x4c>;
						ti,bit-shift = <0x18>;
						reg = <0x1904>;
						linux,phandle = <0x112>;
						phandle = <0x112>;
					};

					mcasp6_aux_gfclk_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x4d 0x4e 0x4f 0x50>;
						ti,bit-shift = <0x16>;
						reg = <0x1904>;
						linux,phandle = <0x111>;
						phandle = <0x111>;
					};

					mcasp7_ahclkx_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4a 0x4b 0x4c>;
						ti,bit-shift = <0x18>;
						reg = <0x1908>;
						linux,phandle = <0x114>;
						phandle = <0x114>;
					};

					mcasp7_aux_gfclk_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x4d 0x4e 0x4f 0x50>;
						ti,bit-shift = <0x16>;
						reg = <0x1908>;
						linux,phandle = <0x113>;
						phandle = <0x113>;
					};

					mcasp8_ahclkx_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4a 0x4b 0x4c>;
						ti,bit-shift = <0x16>;
						reg = <0x1890>;
						linux,phandle = <0x116>;
						phandle = <0x116>;
					};

					mcasp8_aux_gfclk_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x4d 0x4e 0x4f 0x50>;
						ti,bit-shift = <0x18>;
						reg = <0x1890>;
						linux,phandle = <0x115>;
						phandle = <0x115>;
					};

					mmc1_fclk_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x79 0x59>;
						ti,bit-shift = <0x18>;
						reg = <0x1328>;
						linux,phandle = <0x7a>;
						phandle = <0x7a>;
					};

					mmc1_fclk_div {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x7a>;
						ti,bit-shift = <0x19>;
						ti,max-div = <0x4>;
						reg = <0x1328>;
						ti,index-power-of-two;
					};

					mmc2_fclk_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x79 0x59>;
						ti,bit-shift = <0x18>;
						reg = <0x1330>;
						linux,phandle = <0x7b>;
						phandle = <0x7b>;
					};

					mmc2_fclk_div {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x7b>;
						ti,bit-shift = <0x19>;
						ti,max-div = <0x4>;
						reg = <0x1330>;
						ti,index-power-of-two;
					};

					mmc3_gfclk_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x58 0x59>;
						ti,bit-shift = <0x18>;
						reg = <0x1820>;
						linux,phandle = <0x7c>;
						phandle = <0x7c>;
					};

					mmc3_gfclk_div {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x7c>;
						ti,bit-shift = <0x19>;
						ti,max-div = <0x4>;
						reg = <0x1820>;
						ti,index-power-of-two;
					};

					mmc4_gfclk_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x58 0x59>;
						ti,bit-shift = <0x18>;
						reg = <0x1828>;
						linux,phandle = <0x7d>;
						phandle = <0x7d>;
					};

					mmc4_gfclk_div {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x7d>;
						ti,bit-shift = <0x19>;
						ti,max-div = <0x4>;
						reg = <0x1828>;
						ti,index-power-of-two;
					};

					qspi_gfclk_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x79 0x7e>;
						ti,bit-shift = <0x18>;
						reg = <0x1838>;
						linux,phandle = <0x7f>;
						phandle = <0x7f>;
					};

					qspi_gfclk_div {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x7f>;
						ti,bit-shift = <0x19>;
						ti,max-div = <0x4>;
						reg = <0x1838>;
						ti,index-power-of-two;
						linux,phandle = <0xf2>;
						phandle = <0xf2>;
					};

					timer10_gfclk_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x51 0x52 0x46 0x47 0x48 0x49 0x4a 0x53 0x54 0x55 0x56>;
						ti,bit-shift = <0x18>;
						reg = <0x1728>;
					};

					timer11_gfclk_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x51 0x52 0x46 0x47 0x48 0x49 0x4a 0x53 0x54 0x55 0x56>;
						ti,bit-shift = <0x18>;
						reg = <0x1730>;
					};

					timer13_gfclk_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x51 0x52 0x46 0x47 0x48 0x49 0x4a 0x53 0x54 0x55 0x56>;
						ti,bit-shift = <0x18>;
						reg = <0x17c8>;
					};

					timer14_gfclk_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x51 0x52 0x46 0x47 0x48 0x49 0x4a 0x53 0x54 0x55 0x56>;
						ti,bit-shift = <0x18>;
						reg = <0x17d0>;
					};

					timer15_gfclk_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x51 0x52 0x46 0x47 0x48 0x49 0x4a 0x53 0x54 0x55 0x56>;
						ti,bit-shift = <0x18>;
						reg = <0x17d8>;
					};

					timer16_gfclk_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x51 0x52 0x46 0x47 0x48 0x49 0x4a 0x53 0x54 0x55 0x56>;
						ti,bit-shift = <0x18>;
						reg = <0x1830>;
					};

					timer2_gfclk_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x51 0x52 0x46 0x47 0x48 0x49 0x4a 0x53 0x54 0x55 0x56>;
						ti,bit-shift = <0x18>;
						reg = <0x1738>;
					};

					timer3_gfclk_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x51 0x52 0x46 0x47 0x48 0x49 0x4a 0x53 0x54 0x55 0x56>;
						ti,bit-shift = <0x18>;
						reg = <0x1740>;
					};

					timer4_gfclk_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x51 0x52 0x46 0x47 0x48 0x49 0x4a 0x53 0x54 0x55 0x56>;
						ti,bit-shift = <0x18>;
						reg = <0x1748>;
					};

					timer9_gfclk_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x51 0x52 0x46 0x47 0x48 0x49 0x4a 0x53 0x54 0x55 0x56>;
						ti,bit-shift = <0x18>;
						reg = <0x1750>;
					};

					uart1_gfclk_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x58 0x59>;
						ti,bit-shift = <0x18>;
						reg = <0x1840>;
					};

					uart2_gfclk_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x58 0x59>;
						ti,bit-shift = <0x18>;
						reg = <0x1848>;
					};

					uart3_gfclk_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x58 0x59>;
						ti,bit-shift = <0x18>;
						reg = <0x1850>;
					};

					uart4_gfclk_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x58 0x59>;
						ti,bit-shift = <0x18>;
						reg = <0x1858>;
					};

					uart5_gfclk_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x58 0x59>;
						ti,bit-shift = <0x18>;
						reg = <0x1870>;
					};

					uart7_gfclk_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x58 0x59>;
						ti,bit-shift = <0x18>;
						reg = <0x18d0>;
					};

					uart8_gfclk_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x58 0x59>;
						ti,bit-shift = <0x18>;
						reg = <0x18e0>;
					};

					uart9_gfclk_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x58 0x59>;
						ti,bit-shift = <0x18>;
						reg = <0x18e8>;
					};

					vip1_gclk_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x9 0x80>;
						ti,bit-shift = <0x18>;
						reg = <0x1020>;
					};

					vip2_gclk_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x9 0x80>;
						ti,bit-shift = <0x18>;
						reg = <0x1028>;
					};

					vip3_gclk_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x9 0x80>;
						ti,bit-shift = <0x18>;
						reg = <0x1030>;
					};
				};

				clockdomains {

					coreaon_clkdm {
						compatible = "ti,clockdomain";
						clocks = <0x66>;
					};
				};
			};
		};

		l4@4ae00000 {
			compatible = "ti,dra7-l4-wkup", "simple-bus";
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			ranges = <0x0 0x4ae00000 0x3f000>;

			counter@4000 {
				compatible = "ti,omap-counter32k";
				reg = <0x4000 0x40>;
				ti,hwmods = "counter_32k";
			};

			prm@6000 {
				compatible = "ti,dra7-prm";
				reg = <0x6000 0x3000>;
				interrupts = <0x0 0x6 0x4>;

				clocks {
					#address-cells = <0x1>;
					#size-cells = <0x0>;

					sys_clkin1 {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x81 0x82 0x83 0x84 0x85 0x86 0x87>;
						reg = <0x110>;
						ti,index-starts-at-one;
						linux,phandle = <0x14>;
						phandle = <0x14>;
					};

					abe_dpll_sys_clk_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x14 0x46>;
						reg = <0x118>;
						linux,phandle = <0x88>;
						phandle = <0x88>;
					};

					abe_dpll_bypass_clk_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x88 0x52>;
						reg = <0x114>;
						linux,phandle = <0x16>;
						phandle = <0x16>;
					};

					abe_dpll_clk_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x88 0x52>;
						reg = <0x10c>;
						linux,phandle = <0x15>;
						phandle = <0x15>;
					};

					abe_24m_fclk {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x19>;
						reg = <0x11c>;
						ti,dividers = <0x8 0x10>;
						linux,phandle = <0x3f>;
						phandle = <0x3f>;
					};

					aess_fclk {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x89>;
						reg = <0x178>;
						ti,max-div = <0x2>;
						linux,phandle = <0x8a>;
						phandle = <0x8a>;
					};

					abe_giclk_div {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x8a>;
						reg = <0x174>;
						ti,max-div = <0x2>;
						linux,phandle = <0x53>;
						phandle = <0x53>;
					};

					abe_lp_clk_div {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x19>;
						reg = <0x1d8>;
						ti,dividers = <0x10 0x20>;
						linux,phandle = <0xa9>;
						phandle = <0xa9>;
					};

					abe_sys_clk_div {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x14>;
						reg = <0x120>;
						ti,max-div = <0x2>;
						linux,phandle = <0x40>;
						phandle = <0x40>;
					};

					adc_gfclk_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x14 0x46 0x52>;
						reg = <0x1dc>;
					};

					sys_clk1_dclk_div {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x14>;
						ti,max-div = <0x40>;
						reg = <0x1c8>;
						ti,index-power-of-two;
						linux,phandle = <0x92>;
						phandle = <0x92>;
					};

					sys_clk2_dclk_div {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x46>;
						ti,max-div = <0x40>;
						reg = <0x1cc>;
						ti,index-power-of-two;
						linux,phandle = <0x93>;
						phandle = <0x93>;
					};

					per_abe_x1_dclk_div {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x71>;
						ti,max-div = <0x40>;
						reg = <0x1bc>;
						ti,index-power-of-two;
						linux,phandle = <0x94>;
						phandle = <0x94>;
					};

					dsp_gclk_div {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x24>;
						ti,max-div = <0x40>;
						reg = <0x18c>;
						ti,index-power-of-two;
						linux,phandle = <0x96>;
						phandle = <0x96>;
					};

					gpu_dclk {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x2b>;
						ti,max-div = <0x40>;
						reg = <0x1a0>;
						ti,index-power-of-two;
						linux,phandle = <0x98>;
						phandle = <0x98>;
					};

					emif_phy_dclk_div {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x8b>;
						ti,max-div = <0x40>;
						reg = <0x190>;
						ti,index-power-of-two;
						linux,phandle = <0x9a>;
						phandle = <0x9a>;
					};

					gmac_250m_dclk_div {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x8c>;
						ti,max-div = <0x40>;
						reg = <0x19c>;
						ti,index-power-of-two;
						linux,phandle = <0x8d>;
						phandle = <0x8d>;
					};

					gmac_main_clk {
						#clock-cells = <0x0>;
						compatible = "fixed-factor-clock";
						clocks = <0x8d>;
						clock-mult = <0x1>;
						clock-div = <0x2>;
						linux,phandle = <0x117>;
						phandle = <0x117>;
					};

					l3init_480m_dclk_div {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x69>;
						ti,max-div = <0x40>;
						reg = <0x1ac>;
						ti,index-power-of-two;
						linux,phandle = <0x9f>;
						phandle = <0x9f>;
					};

					usb_otg_dclk_div {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x8e>;
						ti,max-div = <0x40>;
						reg = <0x184>;
						ti,index-power-of-two;
						linux,phandle = <0xa0>;
						phandle = <0xa0>;
					};

					sata_dclk_div {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x14>;
						ti,max-div = <0x40>;
						reg = <0x1c0>;
						ti,index-power-of-two;
						linux,phandle = <0xa1>;
						phandle = <0xa1>;
					};

					pcie2_dclk_div {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x8f>;
						ti,max-div = <0x40>;
						reg = <0x1b8>;
						ti,index-power-of-two;
						linux,phandle = <0xa2>;
						phandle = <0xa2>;
					};

					pcie_dclk_div {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x90>;
						ti,max-div = <0x40>;
						reg = <0x1b4>;
						ti,index-power-of-two;
						linux,phandle = <0xa3>;
						phandle = <0xa3>;
					};

					emu_dclk_div {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x14>;
						ti,max-div = <0x40>;
						reg = <0x194>;
						ti,index-power-of-two;
						linux,phandle = <0xa4>;
						phandle = <0xa4>;
					};

					secure_32k_dclk_div {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x91>;
						ti,max-div = <0x40>;
						reg = <0x1c4>;
						ti,index-power-of-two;
						linux,phandle = <0xa5>;
						phandle = <0xa5>;
					};

					clkoutmux0_clk_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x92 0x93 0x94 0x95 0x96 0x97 0x98 0x99 0x9a 0x8d 0x9b 0x9c 0x9d 0x9e 0x9f 0xa0 0xa1 0xa2 0xa3 0xa4 0xa5 0xa6>;
						reg = <0x158>;
						linux,phandle = <0x57>;
						phandle = <0x57>;
					};

					clkoutmux1_clk_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x92 0x93 0x94 0x95 0x96 0x97 0x98 0x99 0x9a 0x8d 0x9b 0x9c 0x9d 0x9e 0x9f 0xa0 0xa1 0xa2 0xa3 0xa4 0xa5 0xa6>;
						reg = <0x15c>;
					};

					clkoutmux2_clk_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x92 0x93 0x94 0x95 0x96 0x97 0x98 0x99 0x9a 0x8d 0x9b 0x9c 0x9d 0x9e 0x9f 0xa0 0xa1 0xa2 0xa3 0xa4 0xa5 0xa6>;
						reg = <0x160>;
						linux,phandle = <0x6a>;
						phandle = <0x6a>;
					};

					custefuse_sys_gfclk_div {
						#clock-cells = <0x0>;
						compatible = "fixed-factor-clock";
						clocks = <0x14>;
						clock-mult = <0x1>;
						clock-div = <0x2>;
					};

					eve_clk {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x36 0x39>;
						reg = <0x180>;
					};

					hdmi_dpll_clk_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x14 0x46>;
						reg = <0x164>;
						linux,phandle = <0x6d>;
						phandle = <0x6d>;
					};

					mlb_clk {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0xa7>;
						ti,max-div = <0x40>;
						reg = <0x134>;
						ti,index-power-of-two;
						linux,phandle = <0x4b>;
						phandle = <0x4b>;
					};

					mlbp_clk {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0xa8>;
						ti,max-div = <0x40>;
						reg = <0x130>;
						ti,index-power-of-two;
						linux,phandle = <0x4c>;
						phandle = <0x4c>;
					};

					per_abe_x1_gfclk2_div {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x71>;
						ti,max-div = <0x40>;
						reg = <0x138>;
						ti,index-power-of-two;
						linux,phandle = <0x4d>;
						phandle = <0x4d>;
					};

					timer_sys_clk_div {
						#clock-cells = <0x0>;
						compatible = "ti,divider-clock";
						clocks = <0x14>;
						reg = <0x144>;
						ti,max-div = <0x2>;
						linux,phandle = <0x51>;
						phandle = <0x51>;
					};

					video1_dpll_clk_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x14 0x46>;
						reg = <0x168>;
						linux,phandle = <0x6e>;
						phandle = <0x6e>;
					};

					video2_dpll_clk_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x14 0x46>;
						reg = <0x16c>;
						linux,phandle = <0x6f>;
						phandle = <0x6f>;
					};

					wkupaon_iclk_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x14 0xa9>;
						reg = <0x108>;
						linux,phandle = <0x78>;
						phandle = <0x78>;
					};

					gpio1_dbclk {
						#clock-cells = <0x0>;
						compatible = "ti,gate-clock";
						clocks = <0x52>;
						ti,bit-shift = <0x8>;
						reg = <0x1838>;
					};

					dcan1_sys_clk_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x14 0x46>;
						ti,bit-shift = <0x18>;
						reg = <0x1888>;
						linux,phandle = <0x11a>;
						phandle = <0x11a>;
					};

					timer1_gfclk_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x51 0x52 0x46 0x47 0x48 0x49 0x4a 0x53 0x54 0x55 0x56>;
						ti,bit-shift = <0x18>;
						reg = <0x1840>;
					};

					uart10_gfclk_mux {
						#clock-cells = <0x0>;
						compatible = "ti,mux-clock";
						clocks = <0x58 0x59>;
						ti,bit-shift = <0x18>;
						reg = <0x1880>;
					};
				};

				clockdomains {
				};
			};

			scm_conf@c000 {
				compatible = "syscon";
				reg = <0xc000 0x1000>;
				linux,phandle = <0x5>;
				phandle = <0x5>;
			};
		};

		axi@0 {
			compatible = "simple-bus";
			#size-cells = <0x1>;
			#address-cells = <0x1>;
			ranges = <0x51000000 0x51000000 0x3000 0x0 0x20000000 0x10000000>;

			pcie_rc@51000000 {
				reg = <0x51000000 0x2000 0x51002000 0x14c 0x1000 0x2000>;
				reg-names = "rc_dbics", "ti_conf", "config";
				interrupts = <0x0 0xe8 0x4 0x0 0xe9 0x4>;
				#address-cells = <0x3>;
				#size-cells = <0x2>;
				device_type = "pci";
				ranges = <0x81000000 0x0 0x0 0x3000 0x0 0x10000 0x82000000 0x0 0x20013000 0x13000 0x0 0xffed000>;
				bus-range = <0x0 0xff>;
				#interrupt-cells = <0x1>;
				num-lanes = <0x2>;
				linux,pci-domain = <0x0>;
				ti,hwmods = "pcie1";
				phys = <0xaa 0xab>;
				phy-names = "pcie-phy0", "pcie-phy1";
				syscon-lane-conf = <0x8 0x558>;
				syscon-lane-sel = <0xac 0x18>;
				interrupt-map-mask = <0x0 0x0 0x0 0x7>;
				interrupt-map = <0x0 0x0 0x0 0x1 0xad 0x1 0x0 0x0 0x0 0x2 0xad 0x2 0x0 0x0 0x0 0x3 0xad 0x3 0x0 0x0 0x0 0x4 0xad 0x4>;
				status = "okay";
				compatible = "ti,dra746-pcie-rc";

				interrupt-controller {
					interrupt-controller;
					#address-cells = <0x0>;
					#interrupt-cells = <0x1>;
					linux,phandle = <0xad>;
					phandle = <0xad>;
				};
			};

			pcie_ep@51000000 {
				reg = <0x51000000 0x28 0x51002000 0x14c 0x51001000 0x28 0x1000 0x10000000>;
				reg-names = "ep_dbics", "ti_conf", "ep_dbics2", "addr_space";
				interrupts = <0x0 0xe8 0x4>;
				num-lanes = <0x1>;
				num-ib-windows = <0x4>;
				num-ob-windows = <0x10>;
				ti,hwmods = "pcie1";
				phys = <0xaa>;
				phy-names = "pcie-phy0";
				syscon-legacy-mode = <0xae 0x14 0x2>;
				status = "disabled";
				compatible = "ti,dra746-pcie-ep";
			};
		};

		axi@1 {
			compatible = "simple-bus";
			#size-cells = <0x1>;
			#address-cells = <0x1>;
			ranges = <0x51800000 0x51800000 0x3000 0x0 0x30000000 0x10000000>;
			status = "disabled";

			pcie@51800000 {
				reg = <0x51800000 0x2000 0x51802000 0x14c 0x1000 0x2000>;
				reg-names = "rc_dbics", "ti_conf", "config";
				interrupts = <0x0 0x163 0x4 0x0 0x164 0x4>;
				#address-cells = <0x3>;
				#size-cells = <0x2>;
				device_type = "pci";
				ranges = <0x81000000 0x0 0x0 0x3000 0x0 0x10000 0x82000000 0x0 0x30013000 0x13000 0x0 0xffed000>;
				bus-range = <0x0 0xff>;
				#interrupt-cells = <0x1>;
				num-lanes = <0x1>;
				linux,pci-domain = <0x1>;
				ti,hwmods = "pcie2";
				phys = <0xab>;
				phy-names = "pcie-phy0";
				interrupt-map-mask = <0x0 0x0 0x0 0x7>;
				interrupt-map = <0x0 0x0 0x0 0x1 0xaf 0x1 0x0 0x0 0x0 0x2 0xaf 0x2 0x0 0x0 0x0 0x3 0xaf 0x3 0x0 0x0 0x0 0x4 0xaf 0x4>;
				compatible = "ti,dra746-pcie-rc";

				interrupt-controller {
					interrupt-controller;
					#address-cells = <0x0>;
					#interrupt-cells = <0x1>;
					linux,phandle = <0xaf>;
					phandle = <0xaf>;
				};
			};
		};

		ocmcram@40300000 {
			compatible = "mmio-sram";
			reg = <0x40300000 0x80000>;
			ranges = <0x0 0x40300000 0x80000>;
			#address-cells = <0x1>;
			#size-cells = <0x1>;

			sram-hs@0 {
				compatible = "ti,secure-ram";
				reg = <0x0 0x0>;
			};
		};

		ocmcram@40400000 {
			status = "disabled";
			compatible = "mmio-sram";
			reg = <0x40400000 0x100000>;
			ranges = <0x0 0x40400000 0x100000>;
			#address-cells = <0x1>;
			#size-cells = <0x1>;
		};

		ocmcram@40500000 {
			status = "disabled";
			compatible = "mmio-sram";
			reg = <0x40500000 0x100000>;
			ranges = <0x0 0x40500000 0x100000>;
			#address-cells = <0x1>;
			#size-cells = <0x1>;
		};

		bandgap@4a0021e0 {
			reg = <0x4a0021e0 0xc 0x4a00232c 0xc 0x4a002380 0x2c 0x4a0023c0 0x3c 0x4a002564 0x8 0x4a002574 0x50>;
			compatible = "ti,dra752-bandgap";
			interrupts = <0x0 0x79 0x4>;
			#thermal-sensor-cells = <0x1>;
			linux,phandle = <0x131>;
			phandle = <0x131>;
		};

		dsp_system@40d00000 {
			compatible = "syscon";
			reg = <0x40d00000 0x100>;
			linux,phandle = <0xe7>;
			phandle = <0xe7>;
		};

		padconf@4844a000 {
			compatible = "ti,dra7-iodelay";
			reg = <0x4844a000 0xd1c>;
			#address-cells = <0x1>;
			#size-cells = <0x0>;

			mmc1_iodelay_ddr_conf {
				pinctrl-single,pins = <0x618 0x1e9 0x624 0x0 0x630 0x176 0x63c 0x1f 0x648 0x38 0x654 0x0 0x620 0x54b 0x628 0x0 0x62c 0x0 0x634 0x0 0x638 0x40000 0x640 0x0 0x644 0x0 0x64c 0x0 0x650 0x0 0x658 0x0 0x65c 0x0>;
			};

			mmc1_iodelay_sdr104_conf {
				pinctrl-single,pins = <0x620 0x37c 0x628 0x0 0x62c 0x0 0x634 0x0 0x638 0x0 0x640 0x0 0x644 0x0 0x64c 0x0 0x650 0x0 0x658 0x0 0x65c 0x0>;
			};

			mmc2_iodelay_hs200_conf {
				pinctrl-single,pins = <0x190 0x180 0x194 0xae0000 0x1a8 0x19a 0x1ac 0x55 0x1b4 0x1d4 0x1b8 0x8b 0x1c0 0x2a4 0x1c4 0x45 0x1d0 0x9a0426 0x1d8 0x280 0x1dc 0x0 0x1e4 0x164 0x1e8 0x0 0x1f0 0x243 0x1f4 0x0 0x1fc 0x1b3 0x200 0x24 0x364 0x2f7 0x368 0x48>;
				linux,phandle = <0xe1>;
				phandle = <0xe1>;
			};

			mmc3_iodelay_manual1_conf {
				pinctrl-single,pins = <0x678 0x1820000 0x680 0x25d 0x684 0x0 0x688 0x0 0x68c 0x0 0x690 0xab 0x694 0x0 0x698 0x0 0x69c 0xdd 0x6a0 0x0 0x6a4 0x0 0x6a8 0x0 0x6ac 0x0 0x6b0 0x0 0x6b4 0x1da 0x6b8 0x0 0x6bc 0x0>;
			};

			mmc3_iodelay_sdr50_conf {
				pinctrl-single,pins = <0x678 0x354 0x680 0x5e 0x684 0x7a 0x688 0x0 0x68c 0x0 0x690 0x5b 0x694 0x0 0x698 0x0 0x69c 0x39 0x6a0 0x0 0x6a4 0x0 0x6a8 0x0 0x6ac 0x0 0x6b0 0x0 0x6b4 0x177 0x6b8 0x0 0x6bc 0x0>;
			};

			mmc4_iodelay_manual1_conf {
				pinctrl-single,pins = <0x840 0x0 0x848 0x47b 0x84c 0x72a 0x850 0x0 0x854 0x0 0x870 0x875 0x874 0x0 0x878 0x0 0x87c 0x400789 0x880 0x0 0x884 0x0 0x888 0x80078f 0x88c 0x0 0x890 0x0 0x894 0x2c087c 0x898 0x0 0x89c 0x0>;
				linux,phandle = <0xe5>;
				phandle = <0xe5>;
			};

			mmc4_iodelay_default_conf {
				pinctrl-single,pins = <0x840 0x0 0x848 0x0 0x84c 0x133 0x850 0x0 0x854 0x0 0x870 0x311 0x874 0x0 0x878 0x0 0x87c 0x265 0x880 0x0 0x884 0x0 0x888 0x2ab 0x88c 0x0 0x890 0x0 0x894 0x343 0x898 0x0 0x89c 0x0>;
				linux,phandle = <0xe4>;
				phandle = <0xe4>;
			};
		};

		dma-controller@4a056000 {
			compatible = "ti,omap4430-sdma";
			reg = <0x4a056000 0x1000>;
			interrupts = <0x0 0x7 0x4 0x0 0x8 0x4 0x0 0x9 0x4 0x0 0xa 0x4>;
			#dma-cells = <0x1>;
			dma-channels = <0x20>;
			dma-requests = <0x7f>;
			linux,phandle = <0x11>;
			phandle = <0x11>;
		};

		edma@43300000 {
			compatible = "ti,edma3-tpcc";
			ti,hwmods = "tpcc";
			reg = <0x43300000 0x100000>;
			reg-names = "edma3_cc";
			interrupts = <0x0 0x169 0x4 0x0 0x168 0x4 0x0 0x167 0x4>;
			interrupt-names = "edma3_ccint", "emda3_mperr", "edma3_ccerrint";
			dma-requests = <0x40>;
			#dma-cells = <0x2>;
			ti,tptcs = <0xb0 0x7 0xb1 0x0>;
			linux,phandle = <0x12>;
			phandle = <0x12>;
		};

		tptc@43400000 {
			compatible = "ti,edma3-tptc";
			ti,hwmods = "tptc0";
			reg = <0x43400000 0x100000>;
			interrupts = <0x0 0x172 0x4>;
			interrupt-names = "edma3_tcerrint";
			linux,phandle = <0xb0>;
			phandle = <0xb0>;
		};

		tptc@43500000 {
			compatible = "ti,edma3-tptc";
			ti,hwmods = "tptc1";
			reg = <0x43500000 0x100000>;
			interrupts = <0x0 0x173 0x4>;
			interrupt-names = "edma3_tcerrint";
			linux,phandle = <0xb1>;
			phandle = <0xb1>;
		};

		gpio@4ae10000 {
			compatible = "ti,omap4-gpio";
			reg = <0x4ae10000 0x200>;
			interrupts = <0x0 0x18 0x4>;
			ti,hwmods = "gpio1";
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x2>;
			linux,phandle = <0xcc>;
			phandle = <0xcc>;
		};

		gpio@48055000 {
			compatible = "ti,omap4-gpio";
			reg = <0x48055000 0x200>;
			interrupts = <0x0 0x19 0x4>;
			ti,hwmods = "gpio2";
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x2>;
		};

		gpio@48057000 {
			compatible = "ti,omap4-gpio";
			reg = <0x48057000 0x200>;
			interrupts = <0x0 0x1a 0x4>;
			ti,hwmods = "gpio3";
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x2>;
		};

		gpio@48059000 {
			compatible = "ti,omap4-gpio";
			reg = <0x48059000 0x200>;
			interrupts = <0x0 0x1b 0x4>;
			ti,hwmods = "gpio4";
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x2>;
			linux,phandle = <0x13e>;
			phandle = <0x13e>;
		};

		gpio@4805b000 {
			compatible = "ti,omap4-gpio";
			reg = <0x4805b000 0x200>;
			interrupts = <0x0 0x1c 0x4>;
			ti,hwmods = "gpio5";
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x2>;
			linux,phandle = <0xe6>;
			phandle = <0xe6>;
		};

		gpio@4805d000 {
			compatible = "ti,omap4-gpio";
			reg = <0x4805d000 0x200>;
			interrupts = <0x0 0x1d 0x4>;
			ti,hwmods = "gpio6";
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x2>;
			linux,phandle = <0xd9>;
			phandle = <0xd9>;

			p20 {
				gpio-hog;
				gpios = <0x1 0x1>;
				output-low;
				line-name = "radio_rst";
			};
		};

		gpio@48051000 {
			compatible = "ti,omap4-gpio";
			reg = <0x48051000 0x200>;
			interrupts = <0x0 0x1e 0x4>;
			ti,hwmods = "gpio7";
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x2>;
			linux,phandle = <0x13a>;
			phandle = <0x13a>;
		};

		gpio@48053000 {
			compatible = "ti,omap4-gpio";
			reg = <0x48053000 0x200>;
			interrupts = <0x0 0x74 0x4>;
			ti,hwmods = "gpio8";
			gpio-controller;
			#gpio-cells = <0x2>;
			interrupt-controller;
			#interrupt-cells = <0x2>;
		};

		serial@4806a000 {
			compatible = "ti,dra742-uart", "ti,omap4-uart";
			reg = <0x4806a000 0x100>;
			interrupts-extended = <0x1 0x0 0x43 0x4 0xb2 0x3e0>;
			ti,hwmods = "uart1";
			clock-frequency = <0x2dc6c00>;
			status = "okay";
			dmas = <0xb3 0x31 0x0 0xb3 0x32 0x0>;
			dma-names = "tx", "rx";
		};

		serial@4806c000 {
			compatible = "ti,dra742-uart", "ti,omap4-uart";
			reg = <0x4806c000 0x100>;
			interrupts = <0x0 0x44 0x4>;
			ti,hwmods = "uart2";
			clock-frequency = <0x2dc6c00>;
			status = "okay";
			dmas = <0xb3 0x33 0x0 0xb3 0x34 0x0>;
			dma-names = "tx", "rx";
		};

		serial@48020000 {
			compatible = "ti,dra742-uart", "ti,omap4-uart";
			reg = <0x48020000 0x100>;
			interrupts = <0x0 0x45 0x4>;
			ti,hwmods = "uart3";
			clock-frequency = <0x2dc6c00>;
			status = "okay";
			dmas = <0xb3 0x35 0x0 0xb3 0x36 0x0>;
			dma-names = "tx", "rx";
		};

		serial@4806e000 {
			compatible = "ti,dra742-uart", "ti,omap4-uart";
			reg = <0x4806e000 0x100>;
			interrupts = <0x0 0x41 0x4>;
			ti,hwmods = "uart4";
			clock-frequency = <0x2dc6c00>;
			status = "disabled";
			dmas = <0xb3 0x37 0x0 0xb3 0x38 0x0>;
			dma-names = "tx", "rx";
		};

		serial@48066000 {
			compatible = "ti,dra742-uart", "ti,omap4-uart";
			reg = <0x48066000 0x100>;
			interrupts = <0x0 0x64 0x4>;
			ti,hwmods = "uart5";
			clock-frequency = <0x2dc6c00>;
			status = "disabled";
			dmas = <0xb3 0x3f 0x0 0xb3 0x40 0x0>;
			dma-names = "tx", "rx";
		};

		serial@48068000 {
			compatible = "ti,dra742-uart", "ti,omap4-uart";
			reg = <0x48068000 0x100>;
			interrupts = <0x0 0x65 0x4>;
			ti,hwmods = "uart6";
			clock-frequency = <0x2dc6c00>;
			status = "disabled";
			dmas = <0xb3 0x4f 0x0 0xb3 0x50 0x0>;
			dma-names = "tx", "rx";
		};

		serial@48420000 {
			compatible = "ti,dra742-uart", "ti,omap4-uart";
			reg = <0x48420000 0x100>;
			interrupts = <0x0 0xda 0x4>;
			ti,hwmods = "uart7";
			clock-frequency = <0x2dc6c00>;
			status = "disabled";
		};

		serial@48422000 {
			compatible = "ti,dra742-uart", "ti,omap4-uart";
			reg = <0x48422000 0x100>;
			interrupts = <0x0 0xdb 0x4>;
			ti,hwmods = "uart8";
			clock-frequency = <0x2dc6c00>;
			status = "disabled";
		};

		serial@48424000 {
			compatible = "ti,dra742-uart", "ti,omap4-uart";
			reg = <0x48424000 0x100>;
			interrupts = <0x0 0xdc 0x4>;
			ti,hwmods = "uart9";
			clock-frequency = <0x2dc6c00>;
			status = "disabled";
		};

		serial@4ae2b000 {
			compatible = "ti,dra742-uart", "ti,omap4-uart";
			reg = <0x4ae2b000 0x100>;
			interrupts = <0x0 0xdd 0x4>;
			ti,hwmods = "uart10";
			clock-frequency = <0x2dc6c00>;
			status = "disabled";
		};

		mailbox@4a0f4000 {
			compatible = "ti,omap4-mailbox";
			reg = <0x4a0f4000 0x200>;
			interrupts = <0x0 0x15 0x4 0x0 0x87 0x4 0x0 0x86 0x4>;
			ti,hwmods = "mailbox1";
			#mbox-cells = <0x1>;
			ti,mbox-num-users = <0x3>;
			ti,mbox-num-fifos = <0x8>;
			status = "disabled";
		};

		mailbox@4883a000 {
			compatible = "ti,omap4-mailbox";
			reg = <0x4883a000 0x200>;
			interrupts = <0x0 0xed 0x4 0x0 0xee 0x4 0x0 0xef 0x4 0x0 0xf0 0x4>;
			ti,hwmods = "mailbox2";
			#mbox-cells = <0x1>;
			ti,mbox-num-users = <0x4>;
			ti,mbox-num-fifos = <0xc>;
			status = "disabled";
		};

		mailbox@4883c000 {
			compatible = "ti,omap4-mailbox";
			reg = <0x4883c000 0x200>;
			interrupts = <0x0 0xf1 0x4 0x0 0xf2 0x4 0x0 0xf3 0x4 0x0 0xf4 0x4>;
			ti,hwmods = "mailbox3";
			#mbox-cells = <0x1>;
			ti,mbox-num-users = <0x4>;
			ti,mbox-num-fifos = <0xc>;
			status = "disabled";

			mbox_pru1_0 {
				ti,mbox-tx = <0x0 0x0 0x0>;
				ti,mbox-rx = <0x1 0x0 0x0>;
				status = "disabled";
			};

			mbox_pru1_1 {
				ti,mbox-tx = <0x2 0x0 0x0>;
				ti,mbox-rx = <0x3 0x0 0x0>;
				status = "disabled";
			};
		};

		mailbox@4883e000 {
			compatible = "ti,omap4-mailbox";
			reg = <0x4883e000 0x200>;
			interrupts = <0x0 0xf5 0x4 0x0 0xf6 0x4 0x0 0xf7 0x4 0x0 0xf8 0x4>;
			ti,hwmods = "mailbox4";
			#mbox-cells = <0x1>;
			ti,mbox-num-users = <0x4>;
			ti,mbox-num-fifos = <0xc>;
			status = "disabled";

			mbox_pru2_0 {
				ti,mbox-tx = <0x0 0x0 0x0>;
				ti,mbox-rx = <0x1 0x0 0x0>;
				status = "disabled";
			};

			mbox_pru2_1 {
				ti,mbox-tx = <0x2 0x0 0x0>;
				ti,mbox-rx = <0x3 0x0 0x0>;
				status = "disabled";
			};
		};

		mailbox@48840000 {
			compatible = "ti,omap4-mailbox";
			reg = <0x48840000 0x200>;
			interrupts = <0x0 0xf9 0x4 0x0 0xfa 0x4 0x0 0xfb 0x4 0x0 0xfc 0x4>;
			ti,hwmods = "mailbox5";
			#mbox-cells = <0x1>;
			ti,mbox-num-users = <0x4>;
			ti,mbox-num-fifos = <0xc>;
			status = "okay";
			linux,phandle = <0xb6>;
			phandle = <0xb6>;

			mbox_ipu1_ipc3x {
				ti,mbox-tx = <0x6 0x2 0x2>;
				ti,mbox-rx = <0x4 0x2 0x2>;
				status = "okay";
				linux,phandle = <0xb7>;
				phandle = <0xb7>;
			};

			mbox_dsp1_ipc3x {
				ti,mbox-tx = <0x5 0x2 0x2>;
				ti,mbox-rx = <0x1 0x2 0x2>;
				status = "okay";
				linux,phandle = <0xc5>;
				phandle = <0xc5>;
			};
		};

		mailbox@48842000 {
			compatible = "ti,omap4-mailbox";
			reg = <0x48842000 0x200>;
			interrupts = <0x0 0xfd 0x4 0x0 0xfe 0x4 0x0 0xff 0x4 0x0 0x100 0x4>;
			ti,hwmods = "mailbox6";
			#mbox-cells = <0x1>;
			ti,mbox-num-users = <0x4>;
			ti,mbox-num-fifos = <0xc>;
			status = "okay";
			linux,phandle = <0xbd>;
			phandle = <0xbd>;

			mbox_ipu2_ipc3x {
				ti,mbox-tx = <0x6 0x2 0x2>;
				ti,mbox-rx = <0x4 0x2 0x2>;
				status = "okay";
				linux,phandle = <0xbe>;
				phandle = <0xbe>;
			};

			mbox_dsp2_ipc3x {
				ti,mbox-tx = <0x5 0x2 0x2>;
				ti,mbox-rx = <0x1 0x2 0x2>;
				status = "okay";
				linux,phandle = <0x12c>;
				phandle = <0x12c>;
			};
		};

		mailbox@48844000 {
			compatible = "ti,omap4-mailbox";
			reg = <0x48844000 0x200>;
			interrupts = <0x0 0x101 0x4 0x0 0x102 0x4 0x0 0x103 0x4 0x0 0x104 0x4>;
			ti,hwmods = "mailbox7";
			#mbox-cells = <0x1>;
			ti,mbox-num-users = <0x4>;
			ti,mbox-num-fifos = <0xc>;
			status = "disabled";
		};

		mailbox@48846000 {
			compatible = "ti,omap4-mailbox";
			reg = <0x48846000 0x200>;
			interrupts = <0x0 0x105 0x4 0x0 0x106 0x4 0x0 0x107 0x4 0x0 0x108 0x4>;
			ti,hwmods = "mailbox8";
			#mbox-cells = <0x1>;
			ti,mbox-num-users = <0x4>;
			ti,mbox-num-fifos = <0xc>;
			status = "disabled";
		};

		mailbox@4885e000 {
			compatible = "ti,omap4-mailbox";
			reg = <0x4885e000 0x200>;
			interrupts = <0x0 0x109 0x4 0x0 0x10a 0x4 0x0 0x10b 0x4 0x0 0x10c 0x4>;
			ti,hwmods = "mailbox9";
			#mbox-cells = <0x1>;
			ti,mbox-num-users = <0x4>;
			ti,mbox-num-fifos = <0xc>;
			status = "disabled";
		};

		mailbox@48860000 {
			compatible = "ti,omap4-mailbox";
			reg = <0x48860000 0x200>;
			interrupts = <0x0 0x10d 0x4 0x0 0x10e 0x4 0x0 0x10f 0x4 0x0 0x110 0x4>;
			ti,hwmods = "mailbox10";
			#mbox-cells = <0x1>;
			ti,mbox-num-users = <0x4>;
			ti,mbox-num-fifos = <0xc>;
			status = "disabled";
		};

		mailbox@48862000 {
			compatible = "ti,omap4-mailbox";
			reg = <0x48862000 0x200>;
			interrupts = <0x0 0x111 0x4 0x0 0x112 0x4 0x0 0x113 0x4 0x0 0x114 0x4>;
			ti,hwmods = "mailbox11";
			#mbox-cells = <0x1>;
			ti,mbox-num-users = <0x4>;
			ti,mbox-num-fifos = <0xc>;
			status = "disabled";
		};

		mailbox@48864000 {
			compatible = "ti,omap4-mailbox";
			reg = <0x48864000 0x200>;
			interrupts = <0x0 0x115 0x4 0x0 0x116 0x4 0x0 0x117 0x4 0x0 0x118 0x4>;
			ti,hwmods = "mailbox12";
			#mbox-cells = <0x1>;
			ti,mbox-num-users = <0x4>;
			ti,mbox-num-fifos = <0xc>;
			status = "disabled";
		};

		mailbox@48802000 {
			compatible = "ti,omap4-mailbox";
			reg = <0x48802000 0x200>;
			interrupts = <0x0 0x17b 0x4 0x0 0x17c 0x4 0x0 0x17d 0x4 0x0 0x17e 0x4>;
			ti,hwmods = "mailbox13";
			#mbox-cells = <0x1>;
			ti,mbox-num-users = <0x4>;
			ti,mbox-num-fifos = <0xc>;
			status = "disabled";
		};

		timer@4ae18000 {
			compatible = "ti,omap5430-timer";
			reg = <0x4ae18000 0x80>;
			interrupts = <0x0 0x20 0x4>;
			ti,hwmods = "timer1";
			ti,timer-alwon;
		};

		timer@48032000 {
			compatible = "ti,omap5430-timer";
			reg = <0x48032000 0x80>;
			interrupts = <0x0 0x21 0x4>;
			ti,hwmods = "timer2";
		};

		timer@48034000 {
			compatible = "ti,omap5430-timer";
			reg = <0x48034000 0x80>;
			interrupts = <0x0 0x22 0x4>;
			ti,hwmods = "timer3";
			linux,phandle = <0xbf>;
			phandle = <0xbf>;
		};

		timer@48036000 {
			compatible = "ti,omap5430-timer";
			reg = <0x48036000 0x80>;
			interrupts = <0x0 0x23 0x4>;
			ti,hwmods = "timer4";
			linux,phandle = <0xc0>;
			phandle = <0xc0>;
		};

		timer@48820000 {
			compatible = "ti,omap5430-timer";
			reg = <0x48820000 0x80>;
			interrupts = <0x0 0x24 0x4>;
			ti,hwmods = "timer5";
			linux,phandle = <0xc6>;
			phandle = <0xc6>;
		};

		timer@48822000 {
			compatible = "ti,omap5430-timer";
			reg = <0x48822000 0x80>;
			interrupts = <0x0 0x25 0x4>;
			ti,hwmods = "timer6";
			linux,phandle = <0x12d>;
			phandle = <0x12d>;
		};

		timer@48824000 {
			compatible = "ti,omap5430-timer";
			reg = <0x48824000 0x80>;
			interrupts = <0x0 0x26 0x4>;
			ti,hwmods = "timer7";
			linux,phandle = <0xb9>;
			phandle = <0xb9>;
		};

		timer@48826000 {
			compatible = "ti,omap5430-timer";
			reg = <0x48826000 0x80>;
			interrupts = <0x0 0x27 0x4>;
			ti,hwmods = "timer8";
			linux,phandle = <0xba>;
			phandle = <0xba>;
		};

		timer@4803e000 {
			compatible = "ti,omap5430-timer";
			reg = <0x4803e000 0x80>;
			interrupts = <0x0 0x28 0x4>;
			ti,hwmods = "timer9";
			linux,phandle = <0xc1>;
			phandle = <0xc1>;
		};

		timer@48086000 {
			compatible = "ti,omap5430-timer";
			reg = <0x48086000 0x80>;
			interrupts = <0x0 0x29 0x4>;
			ti,hwmods = "timer10";
			linux,phandle = <0xc7>;
			phandle = <0xc7>;
		};

		timer@48088000 {
			compatible = "ti,omap5430-timer";
			reg = <0x48088000 0x80>;
			interrupts = <0x0 0x2a 0x4>;
			ti,hwmods = "timer11";
			linux,phandle = <0xb8>;
			phandle = <0xb8>;
		};

		timer@4ae20000 {
			compatible = "ti,omap5430-timer";
			reg = <0x4ae20000 0x80>;
			interrupts = <0x0 0x5a 0x4>;
			ti,hwmods = "timer12";
			ti,timer-alwon;
			ti,timer-secure;
		};

		timer@48828000 {
			compatible = "ti,omap5430-timer";
			reg = <0x48828000 0x80>;
			interrupts = <0x0 0x153 0x4>;
			ti,hwmods = "timer13";
			linux,phandle = <0x12e>;
			phandle = <0x12e>;
		};

		timer@4882a000 {
			compatible = "ti,omap5430-timer";
			reg = <0x4882a000 0x80>;
			interrupts = <0x0 0x154 0x4>;
			ti,hwmods = "timer14";
		};

		timer@4882c000 {
			compatible = "ti,omap5430-timer";
			reg = <0x4882c000 0x80>;
			interrupts = <0x0 0x155 0x4>;
			ti,hwmods = "timer15";
		};

		timer@4882e000 {
			compatible = "ti,omap5430-timer";
			reg = <0x4882e000 0x80>;
			interrupts = <0x0 0x156 0x4>;
			ti,hwmods = "timer16";
		};

		wdt@4ae14000 {
			compatible = "ti,omap3-wdt";
			reg = <0x4ae14000 0x80>;
			interrupts = <0x0 0x4b 0x4>;
			ti,hwmods = "wd_timer2";
		};

		spinlock@4a0f6000 {
			compatible = "ti,omap4-hwspinlock";
			reg = <0x4a0f6000 0x1000>;
			ti,hwmods = "spinlock";
			#hwlock-cells = <0x1>;
			linux,phandle = <0x143>;
			phandle = <0x143>;
		};

		dmm@4e000000 {
			compatible = "ti,dra7-dmm", "ti,omap5-dmm";
			reg = <0x4e000000 0x800>;
			interrupts = <0x0 0x6c 0x4>;
			ti,hwmods = "dmm";
		};

		ipu@58820000 {
			compatible = "ti,dra7-ipu";
			reg = <0x58820000 0x10000>;
			reg-names = "l2ram";
			ti,hwmods = "ipu1";
			iommus = <0xb4>;
			ti,rproc-standby-info = <0x4a005520>;
			status = "okay";
			memory-region = <0xb5>;
			mboxes = <0xb6 0xb7>;
			timers = <0xb8>;
			watchdog-timers = <0xb9 0xba>;
		};

		ipu@55020000 {
			compatible = "ti,dra7-ipu";
			reg = <0x55020000 0x10000>;
			reg-names = "l2ram";
			ti,hwmods = "ipu2";
			iommus = <0xbb>;
			ti,rproc-standby-info = <0x4a008920>;
			status = "okay";
			memory-region = <0xbc>;
			mboxes = <0xbd 0xbe>;
			timers = <0xbf>;
			watchdog-timers = <0xc0 0xc1>;
		};

		dsp@40800000 {
			compatible = "ti,dra7-dsp";
			reg = <0x40800000 0x48000 0x40e00000 0x8000 0x40f00000 0x8000>;
			reg-names = "l2ram", "l1pram", "l1dram";
			ti,hwmods = "dsp1";
			syscon-bootreg = <0x8 0x55c>;
			iommus = <0xc2 0xc3>;
			ti,rproc-standby-info = <0x4a005420>;
			status = "okay";
			memory-region = <0xc4>;
			mboxes = <0xb6 0xc5>;
			timers = <0xc6>;
			watchdog-timers = <0xc7>;
		};

		gpu@56000000 {
			compatible = "ti,dra7-sgx544", "img,sgx544";
			reg = <0x56000000 0x10000>;
			reg-names = "gpu_ocp_base";
			interrupts = <0x0 0x10 0x4>;
			ti,hwmods = "gpu";
			clocks = <0x9 0x76 0x77>;
			clock-names = "iclk", "fclk1", "fclk2";
		};

		bb2d@59000000 {
			compatible = "ti,dra7-bb2d";
			reg = <0x59000000 0x700>;
			interrupts = <0x0 0x78 0x4>;
			ti,hwmods = "bb2d";
			clocks = <0xc8>;
			clock-names = "fclk";
			status = "disabled";
		};

		i2c@48070000 {
			compatible = "ti,omap4-i2c";
			reg = <0x48070000 0x100>;
			interrupts = <0x0 0x33 0x4>;
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			ti,hwmods = "i2c1";
			status = "okay";
			clock-frequency = <0x61a80>;

			tps65917@58 {
				compatible = "ti,tps65917";
				reg = <0x58>;
				ti,system-power-controller;
				ti,palmas-override-powerhold;
				interrupt-controller;
				#interrupt-cells = <0x2>;
				linux,phandle = <0xcb>;
				phandle = <0xcb>;

				tps65917_pmic {
					compatible = "ti,tps65917-pmic";
					smps12-in-supply = <0xc9>;
					smps3-in-supply = <0xc9>;
					smps4-in-supply = <0xc9>;
					smps5-in-supply = <0xc9>;
					ldo1-in-supply = <0xc9>;
					ldo2-in-supply = <0xc9>;
					ldo3-in-supply = <0xca>;
					ldo4-in-supply = <0xca>;
					ldo5-in-supply = <0xc9>;

					regulators {

						smps12 {
							regulator-name = "smps12";
							regulator-min-microvolt = <0xcf850>;
							regulator-max-microvolt = <0x1312d0>;
							regulator-always-on;
							regulator-boot-on;
							linux,phandle = <0xee>;
							phandle = <0xee>;
						};

						smps3 {
							regulator-name = "smps3";
							regulator-min-microvolt = <0xcf850>;
							regulator-max-microvolt = <0x1312d0>;
							regulator-boot-on;
							regulator-always-on;
							linux,phandle = <0xf1>;
							phandle = <0xf1>;
						};

						smps4 {
							regulator-name = "smps4";
							regulator-min-microvolt = <0xcf850>;
							regulator-max-microvolt = <0x1312d0>;
							regulator-always-on;
							regulator-boot-on;
							linux,phandle = <0xec>;
							phandle = <0xec>;
						};

						smps5 {
							regulator-name = "smps5";
							regulator-min-microvolt = <0x1b7740>;
							regulator-max-microvolt = <0x1b7740>;
							regulator-boot-on;
							regulator-always-on;
							linux,phandle = <0x13f>;
							phandle = <0x13f>;
						};

						ldo1 {
							regulator-name = "ldo1";
							regulator-min-microvolt = <0x1b7740>;
							regulator-max-microvolt = <0x1b7740>;
							regulator-always-on;
							regulator-boot-on;
							regulator-allow-bypass;
							linux,phandle = <0x121>;
							phandle = <0x121>;
						};

						ldo2 {
							regulator-name = "ldo2";
							regulator-min-microvolt = <0x1b7740>;
							regulator-max-microvolt = <0x1b7740>;
							regulator-allow-bypass;
							regulator-always-on;
						};

						ldo3 {
							regulator-name = "ldo3";
							regulator-min-microvolt = <0x325aa0>;
							regulator-max-microvolt = <0x325aa0>;
							regulator-boot-on;
							regulator-always-on;
							linux,phandle = <0xfd>;
							phandle = <0xfd>;
						};

						ldo5 {
							regulator-name = "ldo5";
							regulator-min-microvolt = <0x1b7740>;
							regulator-max-microvolt = <0x1b7740>;
							regulator-always-on;
							regulator-boot-on;
							linux,phandle = <0x11e>;
							phandle = <0x11e>;
						};

						ldo4 {
							regulator-name = "ldo4";
							regulator-min-microvolt = <0x1b7740>;
							regulator-max-microvolt = <0x325aa0>;
							regulator-boot-on;
							regulator-always-on;
							linux,phandle = <0xd8>;
							phandle = <0xd8>;
						};
					};
				};

				tps65917_power_button {
					compatible = "ti,palmas-pwrbutton";
					interrupt-parent = <0xcb>;
					interrupts = <0x1 0x0>;
					wakeup-source;
					ti,palmas-long-press-seconds = <0x6>;
				};
			};

			lp87565@60 {
				compatible = "ti,lp87565-q1";
				reg = <0x60>;
				buck10-in-supply = <0xc9>;
				buck23-in-supply = <0xc9>;

				regulators {

					buck10 {
						regulator-name = "buck10";
						regulator-min-microvolt = <0xcf850>;
						regulator-max-microvolt = <0x1312d0>;
						regulator-always-on;
						regulator-boot-on;
						linux,phandle = <0xea>;
						phandle = <0xea>;
					};

					buck23 {
						regulator-name = "buck23";
						regulator-min-microvolt = <0xcf850>;
						regulator-max-microvolt = <0x1312d0>;
						regulator-boot-on;
						regulator-always-on;
						linux,phandle = <0xf0>;
						phandle = <0xf0>;
					};
				};
			};

			pcf8757@20 {
				compatible = "ti,pcf8575", "nxp,pcf8575";
				reg = <0x20>;
				gpio-controller;
				#gpio-cells = <0x2>;
				interrupt-controller;
				#interrupt-cells = <0x2>;
				interrupt-parent = <0xcc>;
				interrupts = <0x3 0x2>;
				linux,phandle = <0x138>;
				phandle = <0x138>;
			};

			pcf8757@21 {
				compatible = "ti,pcf8575", "nxp,pcf8575";
				reg = <0x21>;
				gpio-controller;
				#gpio-cells = <0x2>;
				interrupt-parent = <0xcc>;
				interrupts = <0x3 0x2>;
				interrupt-controller;
				#interrupt-cells = <0x2>;
				linux,phandle = <0x137>;
				phandle = <0x137>;
			};

			pcf8575@26 {
				compatible = "ti,pcf8575", "nxp,pcf8575";
				reg = <0x26>;
				gpio-controller;
				#gpio-cells = <0x2>;
				linux,phandle = <0xd0>;
				phandle = <0xd0>;

				p1 {
					gpio-hog;
					gpios = <0x1 0x0>;
					output-low;
					line-name = "vin6_sel_s0";
				};
			};

			tlv320aic3106@19 {
				#sound-dai-cells = <0x0>;
				compatible = "ti,tlv320aic3106";
				reg = <0x19>;
				adc-settle-ms = <0x28>;
				ai3x-micbias-vg = <0x1>;
				status = "okay";
				AVDD-supply = <0xcd>;
				IOVDD-supply = <0xcd>;
				DRVDD-supply = <0xcd>;
				DVDD-supply = <0xce>;
				linux,phandle = <0x136>;
				phandle = <0x136>;
			};
		};

		i2c@48072000 {
			compatible = "ti,omap4-i2c";
			reg = <0x48072000 0x100>;
			interrupts = <0x0 0x34 0x4>;
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			ti,hwmods = "i2c2";
			status = "disabled";
		};

		i2c@48060000 {
			compatible = "ti,omap4-i2c";
			reg = <0x48060000 0x100>;
			interrupts = <0x0 0x38 0x4>;
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			ti,hwmods = "i2c3";
			status = "okay";
			clock-frequency = <0x61a80>;

			serializer@0c {
				compatible = "ti,ds90ub921q";
				reg = <0xc>;
				#address-cells = <0x1>;
				#size-cells = <0x0>;
				status = "disabled";
			};
		};

		i2c@4807a000 {
			compatible = "ti,omap4-i2c";
			reg = <0x4807a000 0x100>;
			interrupts = <0x0 0x39 0x4>;
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			ti,hwmods = "i2c4";
			status = "okay";
			clock-frequency = <0x61a80>;

			pcf8575@21 {
				compatible = "nxp,pcf8575";
				reg = <0x21>;
				gpio-controller;
				#gpio-cells = <0x2>;
				linux,phandle = <0xd4>;
				phandle = <0xd4>;
			};
		};

		i2c@4807c000 {
			compatible = "ti,omap4-i2c";
			reg = <0x4807c000 0x100>;
			interrupts = <0x0 0x37 0x4>;
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			ti,hwmods = "i2c5";
			status = "okay";
			clock-frequency = <0x61a80>;

			ov10633@37 {
				compatible = "ovti,ov10633";
				reg = <0x37>;
				clocks = <0xcf>;
				clock-names = "xvclk";
				mux-gpios = <0xd0 0x2 0x0 0xd0 0x6 0x1>;

				port {

					endpoint {
						remote-endpoint = <0xd1>;
						hsync-active = <0x1>;
						vsync-active = <0x1>;
						pclk-sample = <0x0>;
						linux,phandle = <0x124>;
						phandle = <0x124>;
					};
				};
			};

			tca6416@20 {
				status = "okay";
				compatible = "ti,tca6416";
				reg = <0x20>;
				gpio-controller;
				#gpio-cells = <0x2>;
				linux,phandle = <0xd2>;
				phandle = <0xd2>;
			};

			ov490@24 {
				compatible = "ovti,ov490";
				reg = <0x24>;
				mux-gpios = <0xd2 0x0 0x1 0xd2 0x1 0x0 0xd2 0x3 0x0 0xd2 0x4 0x1>;

				port {

					endpoint@0 {
						clock-lanes = <0x0>;
						data-lanes = <0x1 0x2 0x3 0x4>;
						remote-endpoint = <0xd3>;
						linux,phandle = <0x12f>;
						phandle = <0x12f>;
					};
				};
			};

			tlv320aic3106@18 {
				#sound-dai-cells = <0x0>;
				compatible = "ti,tlv320aic3106";
				reg = <0x18>;
				adc-settle-ms = <0x28>;
				ai3x-micbias-vg = <0x1>;
				name-prefix = "J3A";
				status = "okay";
				AVDD-supply = <0xcd>;
				IOVDD-supply = <0xcd>;
				DRVDD-supply = <0xcd>;
				DVDD-supply = <0xce>;
				linux,phandle = <0x142>;
				phandle = <0x142>;
			};

			tlv320aic3106@19 {
				#sound-dai-cells = <0x0>;
				compatible = "ti,tlv320aic3106";
				reg = <0x19>;
				adc-settle-ms = <0x28>;
				ai3x-micbias-vg = <0x1>;
				name-prefix = "J3B";
				status = "okay";
				AVDD-supply = <0xcd>;
				IOVDD-supply = <0xcd>;
				DRVDD-supply = <0xcd>;
				DVDD-supply = <0xce>;
			};

			tlv320aic3106@1a {
				#sound-dai-cells = <0x0>;
				compatible = "ti,tlv320aic3106";
				reg = <0x1a>;
				adc-settle-ms = <0x28>;
				ai3x-micbias-vg = <0x1>;
				name-prefix = "J3C";
				status = "okay";
				AVDD-supply = <0xcd>;
				IOVDD-supply = <0xcd>;
				DRVDD-supply = <0xcd>;
				DVDD-supply = <0xce>;
			};

			tvp5158@58 {
				compatible = "ti,tvp5158";
				reg = <0x58>;
				mux-gpios = <0xd4 0x8 0x1>;

				port {

					endpoint@0 {
						pclk-sample = <0x0>;
						channels = <0x0 0x2 0x4 0x6>;
						linux,phandle = <0x123>;
						phandle = <0x123>;
					};
				};
			};
		};

		mmc@4809c000 {
			compatible = "ti,dra7-hsmmc", "ti,omap4-hsmmc";
			reg = <0x4809c000 0x400>;
			interrupts = <0x0 0x4e 0x4>;
			ti,hwmods = "mmc1";
			ti,dual-volt;
			ti,needs-special-reset;
			dmas = <0xd5 0x3d 0xd5 0x3e>;
			dma-names = "tx", "rx";
			status = "okay";
			pbias-supply = <0xd6>;
			sd-uhs-sdr104;
			sd-uhs-sdr50;
			sd-uhs-ddr50;
			sd-uhs-sdr25;
			sd-uhs-sdr12;
			vmmc-supply = <0xd7>;
			vmmc_aux-supply = <0xd8>;
			bus-width = <0x4>;
			cd-gpios = <0xd9 0x1b 0x1>;
			max-frequency = <0xb71b000>;
			pinctrl-names = "default", "hs";
			pinctrl-0 = <0xda>;
			pinctrl-1 = <0xdb>;
		};

		mmc@480b4000 {
			compatible = "ti,dra7-hsmmc", "ti,omap4-hsmmc";
			reg = <0x480b4000 0x400>;
			interrupts = <0x0 0x51 0x4>;
			ti,hwmods = "mmc2";
			ti,needs-special-reset;
			dmas = <0xd5 0x2f 0xd5 0x30>;
			dma-names = "tx", "rx";
			status = "okay";
			sd-uhs-sdr25;
			sd-uhs-sdr12;
			mmc-hs200-1_8v;
			mmc-ddr-1_8v;
			vmmc-supply = <0xdc>;
			bus-width = <0x8>;
			max-frequency = <0xb71b000>;
			pinctrl-names = "default", "hs", "ddr_1_8v", "hs200_1_8v";
			pinctrl-0 = <0xdd>;
			pinctrl-1 = <0xde>;
			pinctrl-2 = <0xdf>;
			pinctrl-3 = <0xe0 0xe1>;
		};

		mmc@480ad000 {
			compatible = "ti,dra7-hsmmc", "ti,omap4-hsmmc";
			reg = <0x480ad000 0x400>;
			interrupts = <0x0 0x59 0x4>;
			ti,hwmods = "mmc3";
			ti,needs-special-reset;
			dmas = <0xd5 0x4d 0xd5 0x4e>;
			dma-names = "tx", "rx";
			status = "disabled";
			sd-uhs-sdr12;
			sd-uhs-sdr25;
			sd-uhs-sdr50;
			max-frequency = <0x5b8d800>;
		};

		mmc@480d1000 {
			compatible = "ti,dra7-hsmmc", "ti,omap4-hsmmc";
			reg = <0x480d1000 0x400>;
			interrupts = <0x0 0x5b 0x4>;
			ti,hwmods = "mmc4";
			ti,needs-special-reset;
			dmas = <0xd5 0x39 0xd5 0x3a>;
			dma-names = "tx", "rx";
			status = "okay";
			sd-uhs-sdr12;
			sd-uhs-sdr25;
			bus-width = <0x4>;
			cap-power-off-card;
			keep-power-in-suspend;
			ti,non-removable;
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			vmmc-supply = <0xe2>;
			pinctrl-names = "default", "hs", "sdr12", "sdr25";
			pinctrl-0 = <0xe3 0xe4>;
			pinctrl-1 = <0xe3 0xe5>;
			pinctrl-2 = <0xe3 0xe5>;
			pinctrl-3 = <0xe3 0xe5>;

			wlcore@2 {
				compatible = "ti,wl1835";
				reg = <0x2>;
				interrupt-parent = <0xe6>;
				interrupts = <0x7 0x1>;
			};
		};

		mmu@40d01000 {
			compatible = "ti,dra7-dsp-iommu";
			reg = <0x40d01000 0x100>;
			interrupts = <0x0 0x17 0x4>;
			ti,hwmods = "mmu0_dsp1";
			#iommu-cells = <0x0>;
			ti,syscon-mmuconfig = <0xe7 0x0>;
			status = "okay";
			linux,phandle = <0xc2>;
			phandle = <0xc2>;
		};

		mmu@40d02000 {
			compatible = "ti,dra7-dsp-iommu";
			reg = <0x40d02000 0x100>;
			interrupts = <0x0 0x91 0x4>;
			ti,hwmods = "mmu1_dsp1";
			#iommu-cells = <0x0>;
			ti,syscon-mmuconfig = <0xe7 0x1>;
			status = "okay";
			linux,phandle = <0xc3>;
			phandle = <0xc3>;
		};

		mmu@58882000 {
			compatible = "ti,dra7-iommu";
			reg = <0x58882000 0x100>;
			interrupts = <0x0 0x18b 0x4>;
			ti,hwmods = "mmu_ipu1";
			#iommu-cells = <0x0>;
			ti,iommu-bus-err-back;
			status = "okay";
			linux,phandle = <0xb4>;
			phandle = <0xb4>;
		};

		mmu@55082000 {
			compatible = "ti,dra7-iommu";
			reg = <0x55082000 0x100>;
			interrupts = <0x0 0x18c 0x4>;
			ti,hwmods = "mmu_ipu2";
			#iommu-cells = <0x0>;
			ti,iommu-bus-err-back;
			status = "okay";
			linux,phandle = <0xbb>;
			phandle = <0xbb>;
		};

		pruss@4b200000 {
			compatible = "ti,am5728-pruss";
			ti,hwmods = "pruss1";
			reg = <0x4b200000 0x2000 0x4b202000 0x2000 0x4b210000 0x8000 0x4b226000 0x2000 0x4b22e000 0x31c 0x4b232000 0x58>;
			reg-names = "dram0", "dram1", "shrdram2", "cfg", "iep", "mii_rt";
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			ranges;
			status = "disabled";

			intc@4b220000 {
				compatible = "ti,am5728-pruss-intc";
				reg = <0x4b220000 0x2000>;
				reg-names = "intc";
				interrupts = <0x0 0xba 0x4 0x0 0xbb 0x4 0x0 0xbc 0x4 0x0 0xbd 0x4 0x0 0xbe 0x4 0x0 0xbf 0x4 0x0 0xc0 0x4 0x0 0xc1 0x4>;
				interrupt-names = "host2", "host3", "host4", "host5", "host6", "host7", "host8", "host9";
				interrupt-controller;
				#interrupt-cells = <0x1>;
			};

			pru0@4b234000 {
				compatible = "ti,am5728-pru";
				reg = <0x4b234000 0x3000 0x4b222000 0x400 0x4b222400 0x100>;
				reg-names = "iram", "control", "debug";
				status = "disabled";
			};

			pru1@4b238000 {
				compatible = "ti,am5728-pru";
				reg = <0x4b238000 0x3000 0x4b224000 0x400 0x4b224400 0x100>;
				reg-names = "iram", "control", "debug";
				status = "disabled";
			};

			mdio@4b232400 {
				compatible = "ti,davinci_mdio";
				#address-cells = <0x1>;
				#size-cells = <0x0>;
				clocks = <0xe8>;
				clock-names = "fck";
				bus_freq = <0xf4240>;
				reg = <0x4b232400 0x90>;
				status = "disabled";
			};
		};

		pruss@4b280000 {
			compatible = "ti,am5728-pruss";
			ti,hwmods = "pruss2";
			reg = <0x4b280000 0x2000 0x4b282000 0x2000 0x4b290000 0x8000 0x4b2a6000 0x2000 0x4b2ae000 0x31c 0x4b2b2000 0x58>;
			reg-names = "dram0", "dram1", "shrdram2", "cfg", "iep", "mii_rt";
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			ranges;
			status = "disabled";

			intc@4b2a0000 {
				compatible = "ti,am5728-pruss-intc";
				reg = <0x4b2a0000 0x2000>;
				reg-names = "intc";
				interrupts = <0x0 0xc4 0x4 0x0 0xc5 0x4 0x0 0xc6 0x4 0x0 0xc7 0x4 0x0 0xc8 0x4 0x0 0xc9 0x4 0x0 0xca 0x4 0x0 0xcb 0x4>;
				interrupt-names = "host2", "host3", "host4", "host5", "host6", "host7", "host8", "host9";
				interrupt-controller;
				#interrupt-cells = <0x1>;
			};

			pru0@4b2b4000 {
				compatible = "ti,am5728-pru";
				reg = <0x4b2b4000 0x3000 0x4b2a2000 0x400 0x4b2a2400 0x100>;
				reg-names = "iram", "control", "debug";
				status = "disabled";
			};

			pru1@4b2b8000 {
				compatible = "ti,am5728-pru";
				reg = <0x4b2b8000 0x3000 0x4b2a4000 0x400 0x4b2a4400 0x100>;
				reg-names = "iram", "control", "debug";
				status = "disabled";
			};

			mdio@4b2b2400 {
				compatible = "ti,davinci_mdio";
				#address-cells = <0x1>;
				#size-cells = <0x0>;
				clocks = <0xe8>;
				clock-names = "fck";
				bus_freq = <0xf4240>;
				reg = <0x4b2b2400 0x90>;
				status = "disabled";
			};
		};

		regulator-abb-mpu {
			compatible = "ti,abb-v3";
			regulator-name = "abb_mpu";
			#address-cells = <0x0>;
			#size-cells = <0x0>;
			clocks = <0x14>;
			ti,settling-time = <0x32>;
			ti,clock-cycles = <0x10>;
			reg = <0x4ae07ddc 0x4 0x4ae07de0 0x4 0x4ae06014 0x4 0x4a003b20 0xc 0x4ae0c158 0x4>;
			reg-names = "setup-address", "control-address", "int-address", "efuse-address", "ldo-address";
			ti,tranxdone-status-mask = <0x80>;
			ti,ldovbb-override-mask = <0x400>;
			ti,ldovbb-vset-mask = <0x1f>;
			ti,abb_info = <0x102ca0 0x0 0x0 0x0 0x2000000 0x1f00000 0x11b340 0x0 0x4 0x0 0x2000000 0x1f00000 0x127690 0x0 0x8 0x0 0x2000000 0x1f00000 0x1312d0 0x0 0xc 0x0 0x2000000 0x1f00000>;
			linux,phandle = <0xe9>;
			phandle = <0xe9>;
		};

		regulator-abb-ivahd {
			compatible = "ti,abb-v3";
			regulator-name = "abb_ivahd";
			#address-cells = <0x0>;
			#size-cells = <0x0>;
			clocks = <0x14>;
			ti,settling-time = <0x32>;
			ti,clock-cycles = <0x10>;
			reg = <0x4ae07e34 0x4 0x4ae07e24 0x4 0x4ae06010 0x4 0x4a0025cc 0xc 0x4a002470 0x4>;
			reg-names = "setup-address", "control-address", "int-address", "efuse-address", "ldo-address";
			ti,tranxdone-status-mask = <0x40000000>;
			ti,ldovbb-override-mask = <0x400>;
			ti,ldovbb-vset-mask = <0x1f>;
			ti,abb_info = <0x101918 0x0 0x0 0x0 0x2000000 0x1f00000 0x118c30 0x0 0x4 0x0 0x2000000 0x1f00000 0x1312d0 0x0 0x8 0x0 0x2000000 0x1f00000>;
			linux,phandle = <0xeb>;
			phandle = <0xeb>;
		};

		regulator-abb-dspeve {
			compatible = "ti,abb-v3";
			regulator-name = "abb_dspeve";
			#address-cells = <0x0>;
			#size-cells = <0x0>;
			clocks = <0x14>;
			ti,settling-time = <0x32>;
			ti,clock-cycles = <0x10>;
			reg = <0x4ae07e30 0x4 0x4ae07e20 0x4 0x4ae06010 0x4 0x4a0025e0 0xc 0x4a00246c 0x4>;
			reg-names = "setup-address", "control-address", "int-address", "efuse-address", "ldo-address";
			ti,tranxdone-status-mask = <0x20000000>;
			ti,ldovbb-override-mask = <0x400>;
			ti,ldovbb-vset-mask = <0x1f>;
			ti,abb_info = <0x101918 0x0 0x0 0x0 0x2000000 0x1f00000 0x118c30 0x0 0x4 0x0 0x2000000 0x1f00000 0x1312d0 0x0 0x8 0x0 0x2000000 0x1f00000>;
			linux,phandle = <0xed>;
			phandle = <0xed>;
		};

		regulator-abb-gpu {
			compatible = "ti,abb-v3";
			regulator-name = "abb_gpu";
			#address-cells = <0x0>;
			#size-cells = <0x0>;
			clocks = <0x14>;
			ti,settling-time = <0x32>;
			ti,clock-cycles = <0x10>;
			reg = <0x4ae07de4 0x4 0x4ae07de8 0x4 0x4ae06010 0x4 0x4a003b08 0xc 0x4ae0c154 0x4>;
			reg-names = "setup-address", "control-address", "int-address", "efuse-address", "ldo-address";
			ti,tranxdone-status-mask = <0x10000000>;
			ti,ldovbb-override-mask = <0x400>;
			ti,ldovbb-vset-mask = <0x1f>;
			ti,abb_info = <0x10a1d0 0x0 0x0 0x0 0x2000000 0x1f00000 0x127690 0x0 0x4 0x0 0x2000000 0x1f00000 0x138800 0x0 0x8 0x0 0x2000000 0x1f00000>;
			linux,phandle = <0xef>;
			phandle = <0xef>;
		};

		oppdm@4a003b20 {
			compatible = "ti,omap5-oppdm";
			#oppdm-cells = <0x0>;
			vbb-supply = <0xe9>;
			reg = <0x4a003b20 0xc>;
			ti,efuse-settings = <0x102ca0 0x0 0x11b340 0x4 0x127690 0x8 0x1312d0 0xc>;
			ti,absolute-max-voltage-uv = <0x16e360>;
			vdd-supply = <0xea>;
			linux,phandle = <0x4>;
			phandle = <0x4>;
		};

		oppdm@4a0025cc {
			compatible = "ti,omap5-oppdm";
			#oppdm-cells = <0x0>;
			vbb-supply = <0xeb>;
			reg = <0x4a0025cc 0xc>;
			ti,efuse-settings = <0x101918 0x0 0x118c30 0x4 0x1312d0 0x8>;
			ti,absolute-max-voltage-uv = <0x16e360>;
			vdd-supply = <0xec>;
		};

		oppdm@4a0025e0 {
			compatible = "ti,omap5-oppdm";
			#oppdm-cells = <0x0>;
			vbb-supply = <0xed>;
			reg = <0x4a0025e0 0xc>;
			ti,efuse-settings = <0x101918 0x0 0x118c30 0x4 0x1312d0 0x8>;
			ti,absolute-max-voltage-uv = <0x16e360>;
			vdd-supply = <0xee>;
		};

		oppdm@4a003b08 {
			compatible = "ti,omap5-oppdm";
			#oppdm-cells = <0x0>;
			vbb-supply = <0xef>;
			reg = <0x4a003b08 0xc>;
			ti,efuse-settings = <0x10a1d0 0x0 0x127690 0x4 0x138800 0x8>;
			ti,absolute-max-voltage-uv = <0x16e360>;
			vdd-supply = <0xf0>;
		};

		oppdm@4a0025f4 {
			compatible = "ti,omap5-core-oppdm";
			#oppdm-cells = <0x0>;
			reg = <0x4a0025f4 0x4>;
			ti,efuse-settings = <0x10a1d0 0x0>;
			ti,absolute-max-voltage-uv = <0x16e360>;
			vdd-supply = <0xf1>;
		};

		spi@48098000 {
			compatible = "ti,omap4-mcspi";
			reg = <0x48098000 0x200>;
			interrupts = <0x0 0x3c 0x4>;
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			ti,hwmods = "mcspi1";
			ti,spi-num-cs = <0x4>;
			dmas = <0xd5 0x23 0xd5 0x24 0xd5 0x25 0xd5 0x26 0xd5 0x27 0xd5 0x28 0xd5 0x29 0xd5 0x2a>;
			dma-names = "tx0", "rx0", "tx1", "rx1", "tx2", "rx2", "tx3", "rx3";
			status = "okay";
		};

		spi@4809a000 {
			compatible = "ti,omap4-mcspi";
			reg = <0x4809a000 0x200>;
			interrupts = <0x0 0x3d 0x4>;
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			ti,hwmods = "mcspi2";
			ti,spi-num-cs = <0x2>;
			dmas = <0xd5 0x2b 0xd5 0x2c 0xd5 0x2d 0xd5 0x2e>;
			dma-names = "tx0", "rx0", "tx1", "rx1";
			status = "okay";
		};

		spi@480b8000 {
			compatible = "ti,omap4-mcspi";
			reg = <0x480b8000 0x200>;
			interrupts = <0x0 0x56 0x4>;
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			ti,hwmods = "mcspi3";
			ti,spi-num-cs = <0x2>;
			dmas = <0xd5 0xf 0xd5 0x10>;
			dma-names = "tx0", "rx0";
			status = "disabled";
		};

		spi@480ba000 {
			compatible = "ti,omap4-mcspi";
			reg = <0x480ba000 0x200>;
			interrupts = <0x0 0x2b 0x4>;
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			ti,hwmods = "mcspi4";
			ti,spi-num-cs = <0x1>;
			dmas = <0xd5 0x46 0xd5 0x47>;
			dma-names = "tx0", "rx0";
			status = "disabled";
		};

		qspi@4b300000 {
			compatible = "ti,dra7xxx-qspi";
			reg = <0x4b300000 0x100 0x5c000000 0x4000000>;
			reg-names = "qspi_base", "qspi_mmap";
			syscon-chipselects = <0x8 0x558>;
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			ti,hwmods = "qspi";
			clocks = <0xf2>;
			clock-names = "fck";
			num-cs = <0x4>;
			interrupts = <0x0 0x157 0x4>;
			status = "okay";
			spi-max-frequency = <0x5b8d800>;

			m25p80@0 {
				compatible = "s25fl256s1";
				spi-max-frequency = <0x5b8d800>;
				reg = <0x0>;
				spi-tx-bus-width = <0x1>;
				spi-rx-bus-width = <0x4>;
				#address-cells = <0x1>;
				#size-cells = <0x1>;

				partition@0 {
					label = "QSPI.SPL";
					reg = <0x0 0x40000>;
				};

				partition@1 {
					label = "QSPI.u-boot";
					reg = <0x40000 0x100000>;
				};

				partition@2 {
					label = "QSPI.u-boot-spl-os";
					reg = <0x140000 0x80000>;
				};

				partition@3 {
					label = "QSPI.u-boot-env";
					reg = <0x1c0000 0x10000>;
				};

				partition@4 {
					label = "QSPI.u-boot-env.backup1";
					reg = <0x1d0000 0x10000>;
				};

				partition@5 {
					label = "QSPI.kernel";
					reg = <0x1e0000 0x800000>;
				};

				partition@6 {
					label = "QSPI.file-system";
					reg = <0x9e0000 0x1620000>;
				};
			};
		};

		ocp2scp@4a090000 {
			compatible = "ti,omap-ocp2scp";
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			ranges;
			reg = <0x4a090000 0x20>;
			ti,hwmods = "ocp2scp3";

			phy@4A096000 {
				compatible = "ti,phy-pipe3-sata";
				reg = <0x4a096000 0x80 0x4a096400 0x64 0x4a096800 0x40>;
				reg-names = "phy_rx", "phy_tx", "pll_ctrl";
				syscon-phy-power = <0x8 0x374>;
				clocks = <0x14 0xf3>;
				clock-names = "sysclk", "refclk";
				syscon-pllreset = <0x8 0x3fc>;
				#phy-cells = <0x0>;
				linux,phandle = <0xfa>;
				phandle = <0xfa>;
			};

			pciephy@4a094000 {
				compatible = "ti,phy-pipe3-pcie";
				reg = <0x4a094000 0x80 0x4a094400 0x64>;
				reg-names = "phy_rx", "phy_tx";
				syscon-phy-power = <0xac 0x1c>;
				syscon-pcs = <0xac 0x10>;
				clocks = <0x5a 0x5b 0xf4 0xf5 0xf6 0x5f 0x14>;
				clock-names = "dpll_ref", "dpll_ref_m2", "wkupclk", "refclk", "div-clk", "phy-div", "sysclk";
				#phy-cells = <0x0>;
				linux,phandle = <0xaa>;
				phandle = <0xaa>;
			};

			pciephy@4a095000 {
				compatible = "ti,phy-pipe3-pcie";
				reg = <0x4a095000 0x80 0x4a095400 0x64>;
				reg-names = "phy_rx", "phy_tx";
				syscon-phy-power = <0xac 0x20>;
				syscon-pcs = <0xac 0x10>;
				clocks = <0x5a 0x5b 0xf7 0xf8 0xf9 0x5f 0x14>;
				clock-names = "dpll_ref", "dpll_ref_m2", "wkupclk", "refclk", "div-clk", "phy-div", "sysclk";
				#phy-cells = <0x0>;
				status = "okay";
				linux,phandle = <0xab>;
				phandle = <0xab>;
			};
		};

		sata@4a141100 {
			compatible = "snps,dwc-ahci";
			reg = <0x4a140000 0x1100 0x4a141100 0x7>;
			interrupts = <0x0 0x31 0x4>;
			phys = <0xfa>;
			phy-names = "sata-phy";
			clocks = <0xf3>;
			ti,hwmods = "sata";
			ports-implemented = <0x1>;
		};

		rtc@48838000 {
			compatible = "ti,am3352-rtc";
			reg = <0x48838000 0x100>;
			interrupts = <0x0 0xd9 0x4 0x0 0xd9 0x4>;
			ti,hwmods = "rtcss";
			clocks = <0x52>;
			status = "disabled";
		};

		ocp2scp@4a080000 {
			compatible = "ti,omap-ocp2scp";
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			ranges;
			reg = <0x4a080000 0x20>;
			ti,hwmods = "ocp2scp1";

			phy@4a084000 {
				compatible = "ti,dra7x-usb2", "ti,omap-usb2";
				reg = <0x4a084000 0x400>;
				syscon-phy-power = <0x8 0x300>;
				clocks = <0xfb 0xfc>;
				clock-names = "wkupclk", "refclk";
				#phy-cells = <0x0>;
				phy-supply = <0xfd>;
				linux,phandle = <0x102>;
				phandle = <0x102>;
			};

			phy@4a085000 {
				compatible = "ti,dra7x-usb2-phy2", "ti,omap-usb2";
				reg = <0x4a085000 0x400>;
				syscon-phy-power = <0x8 0xe74>;
				clocks = <0xfe 0xff>;
				clock-names = "wkupclk", "refclk";
				#phy-cells = <0x0>;
				phy-supply = <0xfd>;
				linux,phandle = <0x104>;
				phandle = <0x104>;
			};

			phy@4a084400 {
				compatible = "ti,omap-usb3";
				reg = <0x4a084400 0x80 0x4a084800 0x64 0x4a084c00 0x40>;
				reg-names = "phy_rx", "phy_tx", "pll_ctrl";
				syscon-phy-power = <0x8 0x370>;
				clocks = <0x100 0x14 0xfc>;
				clock-names = "wkupclk", "sysclk", "refclk";
				#phy-cells = <0x0>;
				linux,phandle = <0x103>;
				phandle = <0x103>;
			};
		};

		omap_dwc3_1@48880000 {
			compatible = "ti,dwc3";
			ti,hwmods = "usb_otg_ss1";
			reg = <0x48880000 0x10000>;
			interrupts = <0x0 0x48 0x4>;
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			utmi-mode = <0x2>;
			ranges;
			extcon = <0x101>;

			usb@48890000 {
				compatible = "snps,dwc3";
				reg = <0x48890000 0x17000>;
				interrupts = <0x0 0x47 0x4 0x0 0x47 0x4 0x0 0x48 0x4>;
				interrupt-names = "peripheral", "host", "otg";
				phys = <0x102 0x103>;
				phy-names = "usb2-phy", "usb3-phy";
				tx-fifo-resize;
				maximum-speed = "super-speed";
				dr_mode = "otg";
				snps,dis_u3_susphy_quirk;
				snps,dis_u2_susphy_quirk;
			};
		};

		omap_dwc3_2@488c0000 {
			compatible = "ti,dwc3";
			ti,hwmods = "usb_otg_ss2";
			reg = <0x488c0000 0x10000>;
			interrupts = <0x0 0x57 0x4>;
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			utmi-mode = <0x2>;
			ranges;

			usb@488d0000 {
				compatible = "snps,dwc3";
				reg = <0x488d0000 0x17000>;
				interrupts = <0x0 0x49 0x4 0x0 0x49 0x4 0x0 0x57 0x4>;
				interrupt-names = "peripheral", "host", "otg";
				phys = <0x104>;
				phy-names = "usb2-phy";
				tx-fifo-resize;
				maximum-speed = "high-speed";
				dr_mode = "host";
				snps,dis_u3_susphy_quirk;
				snps,dis_u2_susphy_quirk;
			};
		};

		omap_dwc3_3@48900000 {
			compatible = "ti,dwc3";
			ti,hwmods = "usb_otg_ss3";
			reg = <0x48900000 0x10000>;
			interrupts = <0x0 0x158 0x4>;
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			utmi-mode = <0x2>;
			ranges;
			status = "disabled";

			usb@48910000 {
				compatible = "snps,dwc3";
				reg = <0x48910000 0x17000>;
				interrupts = <0x0 0x58 0x4 0x0 0x58 0x4 0x0 0x158 0x4>;
				interrupt-names = "peripheral", "host", "otg";
				tx-fifo-resize;
				maximum-speed = "high-speed";
				dr_mode = "otg";
				snps,dis_u3_susphy_quirk;
				snps,dis_u2_susphy_quirk;
			};
		};

		elm@48078000 {
			compatible = "ti,am3352-elm";
			reg = <0x48078000 0xfc0>;
			interrupts = <0x0 0x1 0x4>;
			ti,hwmods = "elm";
			status = "disabled";
		};

		gpmc@50000000 {
			compatible = "ti,am3352-gpmc";
			ti,hwmods = "gpmc";
			reg = <0x50000000 0x37c>;
			interrupts = <0x0 0xf 0x4>;
			dmas = <0xb3 0x4 0x0>;
			dma-names = "rxtx";
			gpmc,num-cs = <0x8>;
			gpmc,num-waitpins = <0x2>;
			#address-cells = <0x2>;
			#size-cells = <0x1>;
			interrupt-controller;
			#interrupt-cells = <0x2>;
			gpio-controller;
			#gpio-cells = <0x2>;
			status = "disabled";
		};

		atl@4843c000 {
			compatible = "ti,dra7-atl";
			reg = <0x4843c000 0x3ff>;
			ti,hwmods = "atl";
			ti,provided-clocks = <0x45 0x44 0x43 0x42>;
			clocks = <0x13>;
			clock-names = "fck";
			status = "okay";
			assigned-clocks = <0x88 0x13 0x17 0x19 0x44 0x43>;
			assigned-clock-parents = <0x46 0x71>;
			assigned-clock-rates = <0x0 0x0 0xac44000 0x15888000 0xac4400 0xac4400>;

			atl2 {
				bws = <0x3>;
				aws = <0x4>;
			};

			atl1 {
				bws = <0x3>;
				aws = <0x7>;
			};
		};

		mcasp@48460000 {
			compatible = "ti,dra7-mcasp-audio";
			ti,hwmods = "mcasp1";
			reg = <0x48460000 0x2000 0x45800000 0x1000>;
			reg-names = "mpu", "dat";
			interrupts = <0x0 0x68 0x4 0x0 0x67 0x4>;
			interrupt-names = "tx", "rx";
			dmas = <0xb3 0x81 0x1 0xb3 0x80 0x1>;
			dma-names = "tx", "rx";
			clocks = <0x105 0x106 0x107>;
			clock-names = "fck", "ahclkx", "ahclkr";
			status = "disabled";
		};

		mcasp@48464000 {
			compatible = "ti,dra7-mcasp-audio";
			ti,hwmods = "mcasp2";
			reg = <0x48464000 0x2000 0x45c00000 0x1000>;
			reg-names = "mpu", "dat";
			interrupts = <0x0 0x95 0x4 0x0 0x94 0x4>;
			interrupt-names = "tx", "rx";
			dmas = <0xb3 0x83 0x1 0xb3 0x82 0x1>;
			dma-names = "tx", "rx";
			clocks = <0x108 0x109 0x10a>;
			clock-names = "fck", "ahclkx", "ahclkr";
			status = "okay";
			assigned-clocks = <0x109>;
			assigned-clock-parents = <0x43>;
			op-mode = <0x0>;
			tdm-slots = <0x2>;
			serial-dir = <0x2 0x0 0x0 0x0 0x0 0x0 0x0 0x0>;
			shared-dai;
		};

		mcasp@48468000 {
			compatible = "ti,dra7-mcasp-audio";
			ti,hwmods = "mcasp3";
			reg = <0x48468000 0x2000 0x46000000 0x1000>;
			reg-names = "mpu", "dat";
			interrupts = <0x0 0x97 0x4 0x0 0x96 0x4>;
			interrupt-names = "tx", "rx";
			dmas = <0xb3 0x85 0x1 0xb3 0x84 0x1>;
			dma-names = "tx", "rx";
			clocks = <0x10b 0x10c>;
			clock-names = "fck", "ahclkx";
			status = "okay";
			#sound-dai-cells = <0x0>;
			assigned-clocks = <0x10c>;
			assigned-clock-parents = <0x43>;
			op-mode = <0x0>;
			tdm-slots = <0x2>;
			serial-dir = <0x1 0x2 0x0 0x0>;
			tx-num-evt = <0x20>;
			rx-num-evt = <0x20>;
			linux,phandle = <0x135>;
			phandle = <0x135>;
		};

		mcasp@4846c000 {
			compatible = "ti,dra7-mcasp-audio";
			ti,hwmods = "mcasp4";
			reg = <0x4846c000 0x2000 0x48436000 0x1000>;
			reg-names = "mpu", "dat";
			interrupts = <0x0 0x99 0x4 0x0 0x98 0x4>;
			interrupt-names = "tx", "rx";
			dmas = <0xb3 0x87 0x1 0xb3 0x86 0x1>;
			dma-names = "tx", "rx";
			clocks = <0x10d 0x10e>;
			clock-names = "fck", "ahclkx";
			status = "disabled";
		};

		mcasp@48470000 {
			compatible = "ti,dra7-mcasp-audio";
			ti,hwmods = "mcasp5";
			reg = <0x48470000 0x2000 0x4843a000 0x1000>;
			reg-names = "mpu", "dat";
			interrupts = <0x0 0x9b 0x4 0x0 0x9a 0x4>;
			interrupt-names = "tx", "rx";
			dmas = <0xb3 0x89 0x1 0xb3 0x88 0x1>;
			dma-names = "tx", "rx";
			clocks = <0x10f 0x110>;
			clock-names = "fck", "ahclkx";
			status = "disabled";
		};

		mcasp@48474000 {
			compatible = "ti,dra7-mcasp-audio";
			ti,hwmods = "mcasp6";
			reg = <0x48474000 0x2000 0x4844c000 0x1000>;
			reg-names = "mpu", "dat";
			interrupts = <0x0 0x9d 0x4 0x0 0x9c 0x4>;
			interrupt-names = "tx", "rx";
			dmas = <0xb3 0x8b 0x1 0xb3 0x8a 0x1>;
			dma-names = "tx", "rx";
			clocks = <0x111 0x112>;
			clock-names = "fck", "ahclkx";
			status = "okay";
			#sound-dai-cells = <0x0>;
			assigned-clocks = <0x112>;
			assigned-clock-parents = <0x44>;
			op-mode = <0x0>;
			tdm-slots = <0x2>;
			serial-dir = <0x1 0x2 0x0 0x0>;
			tx-num-evt = <0x20>;
			rx-num-evt = <0x20>;
			shared-dai;
			linux,phandle = <0x141>;
			phandle = <0x141>;
		};

		mcasp@48478000 {
			compatible = "ti,dra7-mcasp-audio";
			ti,hwmods = "mcasp7";
			reg = <0x48478000 0x2000 0x48450000 0x1000>;
			reg-names = "mpu", "dat";
			interrupts = <0x0 0x9f 0x4 0x0 0x9e 0x4>;
			interrupt-names = "tx", "rx";
			dmas = <0xb3 0x8d 0x1 0xb3 0x8c 0x1>;
			dma-names = "tx", "rx";
			clocks = <0x113 0x114>;
			clock-names = "fck", "ahclkx";
			status = "disabled";
		};

		mcasp@4847c000 {
			compatible = "ti,dra7-mcasp-audio";
			ti,hwmods = "mcasp8";
			reg = <0x4847c000 0x2000 0x48454000 0x1000>;
			reg-names = "mpu", "dat";
			interrupts = <0x0 0xa1 0x4 0x0 0xa0 0x4>;
			interrupt-names = "tx", "rx";
			dmas = <0xb3 0x8f 0x1 0xb3 0x8e 0x1>;
			dma-names = "tx", "rx";
			clocks = <0x115 0x116>;
			clock-names = "fck", "ahclkx";
			status = "disabled";
		};

		crossbar@4a002a48 {
			compatible = "ti,irq-crossbar";
			reg = <0x4a002a48 0x130>;
			interrupt-controller;
			interrupt-parent = <0x7>;
			#interrupt-cells = <0x3>;
			ti,max-irqs = <0xa0>;
			ti,max-crossbar-sources = <0x190>;
			ti,reg-size = <0x2>;
			ti,irqs-reserved = <0x0 0x1 0x2 0x3 0x5 0x6 0x83 0x84>;
			ti,irqs-skip = <0xa 0x43 0x44 0x85 0x8b 0x8c>;
			ti,irqs-safe-map = <0x0>;
			linux,phandle = <0x1>;
			phandle = <0x1>;
		};

		ethernet@48484000 {
			compatible = "ti,dra7-cpsw", "ti,cpsw";
			ti,hwmods = "gmac";
			clocks = <0x117 0x118>;
			clock-names = "fck", "cpts";
			cpdma_channels = <0x8>;
			ale_entries = <0x400>;
			bd_ram_size = <0x2000>;
			mac_control = <0x20>;
			slaves = <0x2>;
			active_slave = <0x0>;
			cpts_clock_mult = <0x784cfe14>;
			cpts_clock_shift = <0x1d>;
			reg = <0x48484000 0x1000 0x48485200 0x2e00>;
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			ti,no-idle;
			interrupts = <0x0 0x14e 0x4 0x0 0x14f 0x4 0x0 0x150 0x4 0x0 0x151 0x4>;
			ranges;
			syscon = <0x8>;
			status = "okay";
			dual_emac;

			mdio@48485000 {
				compatible = "ti,cpsw-mdio";
				#address-cells = <0x1>;
				#size-cells = <0x0>;
				ti,hwmods = "davinci_mdio";
				bus_freq = <0xf4240>;
				reg = <0x48485000 0x100>;
				linux,phandle = <0x119>;
				phandle = <0x119>;

				ethernet-phy@2 {
					reg = <0x2>;
					ti,rx-internal-delay = <0x8>;
					ti,tx-internal-delay = <0x0>;
					ti,fifo-depth = <0x3>;
					ti,min-output-impedance;
					ti,dp83867-rxctrl-strap-quirk;
				};

				ethernet-phy@3 {
					reg = <0x3>;
					ti,rx-internal-delay = <0x8>;
					ti,tx-internal-delay = <0x0>;
					ti,fifo-depth = <0x3>;
					ti,min-output-impedance;
					ti,dp83867-rxctrl-strap-quirk;
				};
			};

			slave@48480200 {
				mac-address = [00 00 00 00 00 00];
				phy_id = <0x119 0x2>;
				phy-mode = "rgmii-id";
				dual_emac_res_vlan = <0x1>;
			};

			slave@48480300 {
				mac-address = [00 00 00 00 00 00];
				phy_id = <0x119 0x3>;
				phy-mode = "rgmii-id";
				dual_emac_res_vlan = <0x2>;
			};

			cpsw-phy-sel@4a002554 {
				compatible = "ti,dra7xx-cpsw-phy-sel";
				reg = <0x4a002554 0x4>;
				reg-names = "gmii-sel";
			};
		};

		can@481cc000 {
			compatible = "ti,dra7-d_can";
			ti,hwmods = "dcan1";
			reg = <0x4ae3c000 0x2000>;
			syscon-raminit = <0x8 0x558 0x0>;
			interrupts = <0x0 0xde 0x4>;
			clocks = <0x11a>;
			status = "disabled";
		};

		can@481d0000 {
			compatible = "ti,dra7-d_can";
			ti,hwmods = "dcan2";
			reg = <0x48480000 0x2000>;
			syscon-raminit = <0x8 0x558 0x1>;
			interrupts = <0x0 0xe1 0x4>;
			clocks = <0x14>;
			status = "disabled";
		};

		dss@58000000 {
			compatible = "ti,dra7-dss";
			status = "ok";
			ti,hwmods = "dss_core";
			syscon-pll-ctrl = <0x8 0x538>;
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			ranges;
			reg = <0x58000000 0x80 0x58004054 0x4 0x58004300 0x20 0x58009054 0x4 0x58009300 0x20>;
			reg-names = "dss", "pll1_clkctrl", "pll1", "pll2_clkctrl", "pll2";
			clocks = <0x11b 0x11c 0x11d>;
			clock-names = "fck", "video1_clk", "video2_clk";
			vdda_video-supply = <0x11e>;

			dispc@58001000 {
				compatible = "ti,dra7-dispc";
				reg = <0x58001000 0x1000>;
				interrupts = <0x0 0x14 0x4>;
				ti,hwmods = "dss_dispc";
				clocks = <0x11b>;
				clock-names = "fck";
				syscon-pol = <0x8 0x534>;
			};

			encoder@58060000 {
				compatible = "ti,dra7-hdmi";
				reg = <0x58040000 0x200 0x58040200 0x80 0x58040300 0x80 0x58060000 0x19000>;
				reg-names = "wp", "pll", "phy", "core";
				interrupts = <0x0 0x60 0x4>;
				status = "okay";
				ti,hwmods = "dss_hdmi";
				clocks = <0x11f 0x120>;
				clock-names = "fck", "sys_clk";
				dmas = <0xd5 0x4c>;
				dma-names = "audio_tx";
				vdda-supply = <0x121>;

				port {

					endpoint {
						remote-endpoint = <0x122>;
						linux,phandle = <0x13b>;
						phandle = <0x13b>;
					};
				};
			};

			ports {
				#address-cells = <0x1>;
				#size-cells = <0x0>;
				status = "disabled";

				port@lcd3 {
					reg = <0x2>;

					endpoint {
						data-lines = <0x18>;
					};
				};
			};
		};

		vpe {
			compatible = "ti,vpe";
			ti,hwmods = "vpe";
			clocks = <0x80>;
			clock-names = "fck";
			reg = <0x489d0000 0x120 0x489d0300 0x20 0x489d0400 0x20 0x489d0500 0x20 0x489d0600 0x3c 0x489d0700 0x80 0x489d5700 0x18 0x489dd000 0x400>;
			reg-names = "vpe_top", "vpe_chr_us0", "vpe_chr_us1", "vpe_chr_us2", "vpe_dei", "sc", "csc", "vpdma";
			interrupts = <0x0 0x162 0x4>;
			#address-cells = <0x1>;
			#size-cells = <0x0>;
		};

		vip@0x48970000 {
			compatible = "ti,vip1";
			reg = <0x48970000 0x114 0x48975500 0xd8 0x48975700 0x18 0x48975800 0x80 0x48975a00 0xd8 0x48975c00 0x18 0x48975d00 0x80 0x4897d000 0x400>;
			reg-names = "vip", "parser0", "csc0", "sc0", "parser1", "csc1", "sc1", "vpdma";
			ti,hwmods = "vip1";
			interrupts = <0x0 0x15f 0x4 0x0 0x188 0x4>;
			syscon-pol = <0x8 0x534>;
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			status = "okay";

			port@0 {
				#address-cells = <0x1>;
				#size-cells = <0x0>;
				reg = <0x0>;
				status = "okay";

				endpoint {
					slave-mode;
					remote-endpoint = <0x123>;
				};
			};

			port@1 {
				#address-cells = <0x1>;
				#size-cells = <0x0>;
				reg = <0x1>;
				status = "okay";
				linux,phandle = <0xd1>;
				phandle = <0xd1>;

				endpoint@0 {
					slave-mode;
					remote-endpoint = <0x124>;
				};
			};

			port@2 {
				#address-cells = <0x1>;
				#size-cells = <0x0>;
				reg = <0x2>;
				status = "disabled";
			};

			port@3 {
				#address-cells = <0x1>;
				#size-cells = <0x0>;
				reg = <0x3>;
				status = "disabled";
			};
		};

		epwmss@4843e000 {
			compatible = "ti,dra746-pwmss", "ti,am33xx-pwmss";
			reg = <0x4843e000 0x30>;
			ti,hwmods = "epwmss0";
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			status = "disabled";
			ranges;

			pwm@4843e200 {
				compatible = "ti,dra746-ehrpwm", "ti,am3352-ehrpwm", "ti,am33xx-ehrpwm";
				#pwm-cells = <0x3>;
				reg = <0x4843e200 0x80>;
				clocks = <0x125 0xc>;
				clock-names = "tbclk", "fck";
				status = "disabled";
			};

			ecap@4843e100 {
				compatible = "ti,dra746-ecap", "ti,am3352-ecap", "ti,am33xx-ecap";
				#pwm-cells = <0x3>;
				reg = <0x4843e100 0x80>;
				clocks = <0xc>;
				clock-names = "fck";
				status = "disabled";
			};
		};

		epwmss@48440000 {
			compatible = "ti,dra746-pwmss", "ti,am33xx-pwmss";
			reg = <0x48440000 0x30>;
			ti,hwmods = "epwmss1";
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			status = "disabled";
			ranges;

			pwm@48440200 {
				compatible = "ti,dra746-ehrpwm", "ti,am3352-ehrpwm", "ti,am33xx-ehrpwm";
				#pwm-cells = <0x3>;
				reg = <0x48440200 0x80>;
				clocks = <0x126 0xc>;
				clock-names = "tbclk", "fck";
				status = "disabled";
			};

			ecap@48440100 {
				compatible = "ti,dra746-ecap", "ti,am3352-ecap", "ti,am33xx-ecap";
				#pwm-cells = <0x3>;
				reg = <0x48440100 0x80>;
				clocks = <0xc>;
				clock-names = "fck";
				status = "disabled";
			};
		};

		epwmss@48442000 {
			compatible = "ti,dra746-pwmss", "ti,am33xx-pwmss";
			reg = <0x48442000 0x30>;
			ti,hwmods = "epwmss2";
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			status = "disabled";
			ranges;

			pwm@48442200 {
				compatible = "ti,dra746-ehrpwm", "ti,am3352-ehrpwm", "ti,am33xx-ehrpwm";
				#pwm-cells = <0x3>;
				reg = <0x48442200 0x80>;
				clocks = <0x127 0xc>;
				clock-names = "tbclk", "fck";
				status = "disabled";
			};

			ecap@48442100 {
				compatible = "ti,dra746-ecap", "ti,am3352-ecap", "ti,am33xx-ecap";
				#pwm-cells = <0x3>;
				reg = <0x48442100 0x80>;
				clocks = <0xc>;
				clock-names = "fck";
				status = "disabled";
			};
		};

		aes@4b500000 {
			compatible = "ti,omap4-aes";
			ti,hwmods = "aes1";
			reg = <0x4b500000 0xa0>;
			interrupts = <0x0 0x50 0x4>;
			dmas = <0xb3 0x6f 0x0 0xb3 0x6e 0x0>;
			dma-names = "tx", "rx";
			clocks = <0x9>;
			clock-names = "fck";
		};

		aes@4b700000 {
			compatible = "ti,omap4-aes";
			ti,hwmods = "aes2";
			reg = <0x4b700000 0xa0>;
			interrupts = <0x0 0x3b 0x4>;
			dmas = <0xb3 0x72 0x0 0xb3 0x71 0x0>;
			dma-names = "tx", "rx";
			clocks = <0x9>;
			clock-names = "fck";
		};

		des@480a5000 {
			compatible = "ti,omap4-des";
			ti,hwmods = "des";
			reg = <0x480a5000 0xa0>;
			interrupts = <0x0 0x4d 0x4>;
			dmas = <0xd5 0x75 0xd5 0x74>;
			dma-names = "tx", "rx";
			clocks = <0x9>;
			clock-names = "fck";
		};

		sham@53100000 {
			compatible = "ti,omap5-sham";
			ti,hwmods = "sham";
			reg = <0x4b101000 0x300>;
			interrupts = <0x0 0x2e 0x4>;
			dmas = <0xb3 0x77 0x0>;
			dma-names = "rx";
			clocks = <0x9>;
			clock-names = "fck";
		};

		rng@48090000 {
			compatible = "ti,omap4-rng";
			ti,hwmods = "rng";
			reg = <0x48090000 0x2000>;
			interrupts = <0x0 0x2f 0x4>;
			clocks = <0x9>;
			clock-names = "fck";
		};

		dsp_system@41500000 {
			compatible = "syscon";
			reg = <0x41500000 0x100>;
			linux,phandle = <0x128>;
			phandle = <0x128>;
		};

		omap_dwc3_4@48940000 {
			compatible = "ti,dwc3";
			ti,hwmods = "usb_otg_ss4";
			reg = <0x48940000 0x10000>;
			interrupts = <0x0 0x15a 0x4>;
			#address-cells = <0x1>;
			#size-cells = <0x1>;
			utmi-mode = <0x2>;
			ranges;
			status = "disabled";

			usb@48950000 {
				compatible = "snps,dwc3";
				reg = <0x48950000 0x17000>;
				interrupts = <0x0 0x159 0x4 0x0 0x159 0x4 0x0 0x15a 0x4>;
				interrupt-names = "peripheral", "host", "otg";
				tx-fifo-resize;
				maximum-speed = "high-speed";
				dr_mode = "otg";
			};
		};

		mmu@41501000 {
			compatible = "ti,dra7-dsp-iommu";
			reg = <0x41501000 0x100>;
			interrupts = <0x0 0x92 0x4>;
			ti,hwmods = "mmu0_dsp2";
			#iommu-cells = <0x0>;
			ti,syscon-mmuconfig = <0x128 0x0>;
			status = "okay";
			linux,phandle = <0x129>;
			phandle = <0x129>;
		};

		mmu@41502000 {
			compatible = "ti,dra7-dsp-iommu";
			reg = <0x41502000 0x100>;
			interrupts = <0x0 0x93 0x4>;
			ti,hwmods = "mmu1_dsp2";
			#iommu-cells = <0x0>;
			ti,syscon-mmuconfig = <0x128 0x1>;
			status = "okay";
			linux,phandle = <0x12a>;
			phandle = <0x12a>;
		};

		dsp@41000000 {
			compatible = "ti,dra7-dsp";
			reg = <0x41000000 0x48000 0x41600000 0x8000 0x41700000 0x8000>;
			reg-names = "l2ram", "l1pram", "l1dram";
			ti,hwmods = "dsp2";
			syscon-bootreg = <0x8 0x560>;
			iommus = <0x129 0x12a>;
			ti,rproc-standby-info = <0x4a005620>;
			status = "okay";
			memory-region = <0x12b>;
			mboxes = <0xbd 0x12c>;
			timers = <0x12d>;
			watchdog-timers = <0x12e>;
		};

		vip@0x48990000 {
			compatible = "ti,vip2";
			reg = <0x48990000 0x114 0x48995500 0xd8 0x48995700 0x18 0x48995800 0x80 0x48995a00 0xd8 0x48995c00 0x18 0x48995d00 0x80 0x4899d000 0x400>;
			reg-names = "vip", "parser0", "csc0", "sc0", "parser1", "csc1", "sc1", "vpdma";
			ti,hwmods = "vip2";
			interrupts = <0x0 0x160 0x4 0x0 0x189 0x4>;
			syscon-pol = <0x8 0x534>;
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			status = "disabled";

			port@0 {
				#address-cells = <0x1>;
				#size-cells = <0x0>;
				reg = <0x0>;
				status = "disabled";
			};

			port@1 {
				#address-cells = <0x1>;
				#size-cells = <0x0>;
				reg = <0x1>;
				status = "disabled";
			};

			port@2 {
				#address-cells = <0x1>;
				#size-cells = <0x0>;
				reg = <0x2>;
				status = "disabled";
			};

			port@3 {
				#address-cells = <0x1>;
				#size-cells = <0x0>;
				reg = <0x3>;
				status = "disabled";
			};
		};

		vip@0x489b0000 {
			compatible = "ti,vip3";
			reg = <0x489b0000 0x114 0x489b5500 0xd8 0x489b5700 0x18 0x489b5800 0x80 0x489b5a00 0xd8 0x489b5c00 0x18 0x489b5d00 0x80 0x489bd000 0x400>;
			reg-names = "vip", "parser0", "csc0", "sc0", "parser1", "csc1", "sc1", "vpdma";
			ti,hwmods = "vip3";
			interrupts = <0x0 0x161 0x4 0x0 0x18a 0x4>;
			syscon-pol = <0x8 0x534>;
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			status = "disabled";

			port@0 {
				#address-cells = <0x1>;
				#size-cells = <0x0>;
				reg = <0x0>;
				status = "disabled";
			};

			port@1 {
				#address-cells = <0x1>;
				#size-cells = <0x0>;
				reg = <0x1>;
				status = "disabled";
			};
		};

		cal@489b0000 {
			compatible = "ti,dra76-cal";
			ti,hwmods = "cal";
			reg = <0x489b0000 0x400 0x489b0800 0x40 0x489b0900 0x40>;
			reg-names = "cal_top", "cal_rx_core0", "cal_rx_core1";
			interrupts = <0x0 0x161 0x4>;
			syscon-camerrx = <0x8 0x6dc>;
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			status = "okay";

			ports {
				#address-cells = <0x1>;
				#size-cells = <0x0>;

				port@0 {
					reg = <0x0>;

					endpoint@0 {
						slave-mode;
						remote-endpoint = <0x12f>;
						linux,phandle = <0xd3>;
						phandle = <0xd3>;
					};
				};

				port@1 {
					reg = <0x1>;
				};
			};
		};

		mcan@42C01A00 {
			compatible = "bosch,m_can";
			reg = <0x42c01a00 0x4000 0x42c00000 0x18fc>;
			reg-names = "m_can", "message_ram";
			interrupt-parent = <0x2>;
			interrupts = <0x0 0x43 0x4 0x0 0x44 0x4>;
			interrupt-names = "int0", "int1";
			ti,hwmods = "mcan";
			clocks = <0x130>;
			clock-names = "cclk";
			bosch,mram-cfg = <0x0 0x0 0x0 0x20 0x0 0x0 0x1 0x1>;
			status = "okay";

			can-transceiver {
				max-bitrate = <0x4c4b40>;
			};
		};
	};

	thermal-zones {

		cpu_thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x1f4>;
			thermal-sensors = <0x131 0x0>;

			trips {

				cpu_alert {
					temperature = <0x186a0>;
					hysteresis = <0x7d0>;
					type = "passive";
					linux,phandle = <0x132>;
					phandle = <0x132>;
				};

				cpu_crit {
					temperature = <0x1d4c0>;
					hysteresis = <0x7d0>;
					type = "critical";
				};
			};

			cooling-maps {

				map0 {
					trip = <0x132>;
					cooling-device = <0x133 0xffffffff 0xffffffff>;
				};
			};
		};

		gpu_thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x1f4>;
			thermal-sensors = <0x131 0x1>;

			trips {

				gpu_crit {
					temperature = <0x1d4c0>;
					hysteresis = <0x7d0>;
					type = "critical";
				};
			};
		};

		core_thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x1f4>;
			thermal-sensors = <0x131 0x2>;

			trips {

				core_crit {
					temperature = <0x1d4c0>;
					hysteresis = <0x7d0>;
					type = "critical";
				};
			};
		};

		dspeve_thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x1f4>;
			thermal-sensors = <0x131 0x3>;

			trips {

				dspeve_crit {
					temperature = <0x1d4c0>;
					hysteresis = <0x7d0>;
					type = "critical";
				};
			};
		};

		iva_thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0x1f4>;
			thermal-sensors = <0x131 0x4>;

			trips {

				iva_crit {
					temperature = <0x1d4c0>;
					hysteresis = <0x7d0>;
					type = "critical";
				};
			};
		};
	};

	pmu {
		compatible = "arm,cortex-a15-pmu";
		interrupt-parent = <0x7>;
		interrupts = <0x0 0x83 0x4 0x0 0x84 0x4>;
	};

	firmware {

		android {
			compatible = "android,firmware";

			fstab {
				compatible = "android,fstab";

				system {
					compatible = "android,system";
					dev = "/dev/block/platform/44000000.ocp/480b4000.mmc/by-name/system";
					type = "ext4";
					mnt_flags = "ro";
					fsmgr_flags = "wait";
				};

				vendor {
					compatible = "android,vendor";
					dev = "/dev/block/platform/44000000.ocp/480b4000.mmc/by-name/vendor";
					type = "ext4";
					mnt_flags = "ro";
					fsmgr_flags = "wait";
				};
			};
		};
	};

	sound0 {
		compatible = "simple-audio-card";
		simple-audio-card,name = "DRA7xx-EVM";
		simple-audio-card,widgets = "Headphone", "Headphone Jack", "Line", "Line Out", "Microphone", "Mic Jack", "Line", "Line In";
		simple-audio-card,routing = "Headphone Jack", "HPLOUT", "Headphone Jack", "HPROUT", "Line Out", "LLOUT", "Line Out", "RLOUT", "MIC3L", "Mic Jack", "MIC3R", "Mic Jack", "Mic Jack", "Mic Bias", "LINE1L", "Line In", "LINE1R", "Line In";
		simple-audio-card,format = "dsp_b";
		simple-audio-card,bitclock-master = <0x134>;
		simple-audio-card,frame-master = <0x134>;
		simple-audio-card,bitclock-inversion;

		simple-audio-card,cpu {
			sound-dai = <0x135>;
			system-clock-frequency = <0xac4400>;
			linux,phandle = <0x134>;
			phandle = <0x134>;
		};

		simple-audio-card,codec {
			sound-dai = <0x136>;
			clocks = <0x43>;
		};
	};

	extcon_usb1 {
		compatible = "linux,extcon-usb-gpio";
		id-gpio = <0x137 0x1 0x0>;
		linux,phandle = <0x101>;
		phandle = <0x101>;
	};

	leds {
		compatible = "gpio-leds";

		led0 {
			label = "dra7:usr1";
			gpios = <0x138 0x4 0x1>;
			default-state = "off";
		};

		led1 {
			label = "dra7:usr2";
			gpios = <0x138 0x5 0x1>;
			default-state = "off";
		};

		led2 {
			label = "dra7:usr3";
			gpios = <0x138 0x6 0x1>;
			default-state = "off";
		};

		led3 {
			label = "dra7:usr4";
			gpios = <0x138 0x7 0x1>;
			default-state = "off";
		};
	};

	gpio_keys {
		compatible = "gpio-keys";
		#address-cells = <0x1>;
		#size-cells = <0x0>;
		autorepeat;

		USER1 {
			label = "btnUser1";
			linux,code = <0x100>;
			gpios = <0x138 0x2 0x1>;
		};

		USER2 {
			label = "btnUser2";
			linux,code = <0x101>;
			gpios = <0x138 0x3 0x1>;
		};
	};

	connector@1 {
		compatible = "hdmi-connector";
		label = "hdmi";
		type = [61 00];

		port {

			endpoint {
				remote-endpoint = <0x139>;
				linux,phandle = <0x13c>;
				phandle = <0x13c>;
			};
		};
	};

	encoder@1 {
		compatible = "ti,tpd12s015";
		gpios = <0x13a 0x1e 0x0 0x13a 0x1f 0x0 0x13a 0xc 0x0>;

		ports {
			#address-cells = <0x1>;
			#size-cells = <0x0>;

			port@0 {
				reg = <0x0>;

				endpoint {
					remote-endpoint = <0x13b>;
					linux,phandle = <0x122>;
					phandle = <0x122>;
				};
			};

			port@1 {
				reg = <0x1>;

				endpoint {
					remote-endpoint = <0x13c>;
					linux,phandle = <0x139>;
					phandle = <0x139>;
				};
			};
		};
	};

	clk_ov10633_fixed {
		#clock-cells = <0x0>;
		compatible = "fixed-clock";
		clock-frequency = <0x16e3600>;
		linux,phandle = <0xcf>;
		phandle = <0xcf>;
	};

	reserved-memory {
		#address-cells = <0x2>;
		#size-cells = <0x2>;
		ranges;

		ipu2_cma@95800000 {
			compatible = "shared-dma-pool";
			reg = <0x0 0x95800000 0x0 0x3800000>;
			reusable;
			status = "okay";
			linux,phandle = <0xbc>;
			phandle = <0xbc>;
		};

		dsp1_cma@99000000 {
			compatible = "shared-dma-pool";
			reg = <0x0 0x99000000 0x0 0x4000000>;
			reusable;
			status = "okay";
			linux,phandle = <0xc4>;
			phandle = <0xc4>;
		};

		ipu1_cma@9d000000 {
			compatible = "shared-dma-pool";
			reg = <0x0 0x9d000000 0x0 0x2000000>;
			reusable;
			status = "okay";
			linux,phandle = <0xb5>;
			phandle = <0xb5>;
		};

		dsp2_cma@9f000000 {
			compatible = "shared-dma-pool";
			reg = <0x0 0x9f000000 0x0 0x800000>;
			reusable;
			status = "okay";
			linux,phandle = <0x12b>;
			phandle = <0x12b>;
		};

		cmem@95400000 {
			reg = <0x0 0x95400000 0x0 0x400000>;
			no-map;
			status = "okay";
		};

		dsp1_sr0@bfb00000 {
			reg = <0x0 0xbfb00000 0x0 0x100000>;
			no-map;
			status = "okay";
		};
	};

	fixedregulator-vsys12v0 {
		compatible = "regulator-fixed";
		regulator-name = "vsys_12v0";
		regulator-min-microvolt = <0xb71b00>;
		regulator-max-microvolt = <0xb71b00>;
		regulator-always-on;
		regulator-boot-on;
		linux,phandle = <0x13d>;
		phandle = <0x13d>;
	};

	fixedregulator-vsys5v0 {
		compatible = "regulator-fixed";
		regulator-name = "vsys_5v0";
		regulator-min-microvolt = <0x4c4b40>;
		regulator-max-microvolt = <0x4c4b40>;
		vin-supply = <0x13d>;
		regulator-always-on;
		regulator-boot-on;
		linux,phandle = <0xca>;
		phandle = <0xca>;
	};

	fixedregulator-vsys3v3 {
		compatible = "regulator-fixed";
		regulator-name = "vsys_3v3";
		regulator-min-microvolt = <0x325aa0>;
		regulator-max-microvolt = <0x325aa0>;
		vin-supply = <0x13d>;
		regulator-always-on;
		regulator-boot-on;
		linux,phandle = <0xc9>;
		phandle = <0xc9>;
	};

	fixedregulator-vio_3v3 {
		compatible = "regulator-fixed";
		regulator-name = "vio_3v3";
		regulator-min-microvolt = <0x325aa0>;
		regulator-max-microvolt = <0x325aa0>;
		vin-supply = <0xc9>;
		regulator-always-on;
		regulator-boot-on;
		linux,phandle = <0xcd>;
		phandle = <0xcd>;
	};

	fixedregulator-sd {
		compatible = "regulator-fixed";
		regulator-name = "vio_3v3_sd";
		regulator-min-microvolt = <0x325aa0>;
		regulator-max-microvolt = <0x325aa0>;
		vin-supply = <0xcd>;
		enable-active-high;
		gpio = <0x13e 0x15 0x0>;
		linux,phandle = <0xd7>;
		phandle = <0xd7>;
	};

	fixedregulator-vio_1v8 {
		compatible = "regulator-fixed";
		regulator-name = "vio_1v8";
		regulator-min-microvolt = <0x1b7740>;
		regulator-max-microvolt = <0x1b7740>;
		vin-supply = <0x13f>;
		linux,phandle = <0xdc>;
		phandle = <0xdc>;
	};

	fixedregulator-mmcwl {
		compatible = "regulator-fixed";
		regulator-name = "vmmcwl_fixed";
		regulator-min-microvolt = <0x1b7740>;
		regulator-max-microvolt = <0x1b7740>;
		gpio = <0xe6 0x8 0x0>;
		startup-delay-us = <0x11170>;
		enable-active-high;
		linux,phandle = <0xe2>;
		phandle = <0xe2>;
	};

	fixedregulator-vtt {
		compatible = "regulator-fixed";
		regulator-name = "vtt_fixed";
		regulator-min-microvolt = <0x149970>;
		regulator-max-microvolt = <0x149970>;
		vin-supply = <0xc9>;
		regulator-always-on;
		regulator-boot-on;
	};

	fixedregulator-aic_dvdd {
		compatible = "regulator-fixed";
		regulator-name = "aic_dvdd";
		vin-supply = <0xcd>;
		regulator-min-microvolt = <0x1b7740>;
		regulator-max-microvolt = <0x1b7740>;
		linux,phandle = <0xce>;
		phandle = <0xce>;
	};

	jamr3_sound {
		compatible = "simple-audio-card";
		simple-audio-card,name = "DRA7xx-JAMR3";
		simple-audio-card,widgets = "Line", "Line Out", "Line", "Line In";
		simple-audio-card,routing = "Line Out", "J3A LLOUT", "Line Out", "J3A RLOUT", "J3A LINE1L", "Line In", "J3A LINE1R", "Line In";
		simple-audio-card,format = "dsp_b";
		simple-audio-card,bitclock-master = <0x140>;
		simple-audio-card,frame-master = <0x140>;
		simple-audio-card,bitclock-inversion;

		simple-audio-card,cpu {
			sound-dai = <0x141>;
			system-clock-frequency = <0xac4400>;
			linux,phandle = <0x140>;
			phandle = <0x140>;
		};

		simple-audio-card,codec {
			sound-dai = <0x142>;
			clocks = <0x44>;
		};
	};

	gatemp {
		compatible = "hwspinlock-user";
		hwlocks = <0x143 0x0 0x143 0x1 0x143 0x2 0x143 0x3 0x143 0x4 0x143 0x5 0x143 0x6 0x143 0x7 0x143 0x8 0x143 0x9 0x143 0xa 0x143 0xb 0x143 0xc 0x143 0xd 0x143 0xe 0x143 0xf 0x143 0x10 0x143 0x11 0x143 0x12 0x143 0x13>;
	};

	sr0 {
		compatible = "generic-uio";
		reg = <0x0 0xbfb00000 0x0 0x100000>;
	};
};