;******************************************************************************
;* TI ARM C/C++ Codegen                                        PC v16.9.2.LTS *
;* Date/Time created: Sun Apr 23 12:58:25 2017                                *
;******************************************************************************
	.compiler_opts --abi=eabi --arm_vmrs_si_workaround=off --code_state=16 --diag_wrap=off --embedded_constants=on --endian=little --float_support=FPv4SPD16 --hll_source=on --object_format=elf --silicon_version=7M4 --symdebug:dwarf --symdebug:dwarf_version=3 --unaligned_access=on 
	.thumb

$C$DW$CU	.dwtag  DW_TAG_compile_unit
	.dwattr $C$DW$CU, DW_AT_name("../TM4C129_self_test.c")
	.dwattr $C$DW$CU, DW_AT_producer("TI TI ARM C/C++ Codegen PC v16.9.2.LTS Copyright (c) 1996-2017 Texas Instruments Incorporated")
	.dwattr $C$DW$CU, DW_AT_TI_version(0x01)
	.dwattr $C$DW$CU, DW_AT_comp_dir("C:\Users\Mr_Halfword\workspace_v7\TM4C129_selftest\Release")

$C$DW$1	.dwtag  DW_TAG_subprogram
	.dwattr $C$DW$1, DW_AT_name("_assert")
	.dwattr $C$DW$1, DW_AT_TI_symbol_name("_assert")
	.dwattr $C$DW$1, DW_AT_declaration
	.dwattr $C$DW$1, DW_AT_external
	.dwattr $C$DW$1, DW_AT_decl_file("C:/ti_ccs7_1_0/ccsv7/tools/compiler/ti-cgt-arm_16.9.2.LTS/include/assert.h")
	.dwattr $C$DW$1, DW_AT_decl_line(0x58)
	.dwattr $C$DW$1, DW_AT_decl_column(0x1a)
$C$DW$2	.dwtag  DW_TAG_formal_parameter
	.dwattr $C$DW$2, DW_AT_type(*$C$DW$T$10)

$C$DW$3	.dwtag  DW_TAG_formal_parameter
	.dwattr $C$DW$3, DW_AT_type(*$C$DW$T$31)

	.dwendtag $C$DW$1


$C$DW$4	.dwtag  DW_TAG_subprogram
	.dwattr $C$DW$4, DW_AT_name("printf")
	.dwattr $C$DW$4, DW_AT_TI_symbol_name("printf")
	.dwattr $C$DW$4, DW_AT_type(*$C$DW$T$10)
	.dwattr $C$DW$4, DW_AT_declaration
	.dwattr $C$DW$4, DW_AT_external
	.dwattr $C$DW$4, DW_AT_decl_file("C:/ti_ccs7_1_0/ccsv7/tools/compiler/ti-cgt-arm_16.9.2.LTS/include/stdio.h")
	.dwattr $C$DW$4, DW_AT_decl_line(0xf5)
	.dwattr $C$DW$4, DW_AT_decl_column(0x19)
$C$DW$5	.dwtag  DW_TAG_formal_parameter
	.dwattr $C$DW$5, DW_AT_type(*$C$DW$T$31)

$C$DW$6	.dwtag  DW_TAG_unspecified_parameters

	.dwendtag $C$DW$4


$C$DW$7	.dwtag  DW_TAG_subprogram
	.dwattr $C$DW$7, DW_AT_name("SysCtlPeripheralReady")
	.dwattr $C$DW$7, DW_AT_TI_symbol_name("SysCtlPeripheralReady")
	.dwattr $C$DW$7, DW_AT_type(*$C$DW$T$91)
	.dwattr $C$DW$7, DW_AT_declaration
	.dwattr $C$DW$7, DW_AT_external
	.dwattr $C$DW$7, DW_AT_decl_file("C:/ti/TivaWare_C_Series-2.1.4.178/driverlib/sysctl.h")
	.dwattr $C$DW$7, DW_AT_decl_line(0x24a)
	.dwattr $C$DW$7, DW_AT_decl_column(0x0d)
$C$DW$8	.dwtag  DW_TAG_formal_parameter
	.dwattr $C$DW$8, DW_AT_type(*$C$DW$T$23)

	.dwendtag $C$DW$7


$C$DW$9	.dwtag  DW_TAG_subprogram
	.dwattr $C$DW$9, DW_AT_name("SysCtlPeripheralReset")
	.dwattr $C$DW$9, DW_AT_TI_symbol_name("SysCtlPeripheralReset")
	.dwattr $C$DW$9, DW_AT_declaration
	.dwattr $C$DW$9, DW_AT_external
	.dwattr $C$DW$9, DW_AT_decl_file("C:/ti/TivaWare_C_Series-2.1.4.178/driverlib/sysctl.h")
	.dwattr $C$DW$9, DW_AT_decl_line(0x24d)
	.dwattr $C$DW$9, DW_AT_decl_column(0x0d)
$C$DW$10	.dwtag  DW_TAG_formal_parameter
	.dwattr $C$DW$10, DW_AT_type(*$C$DW$T$23)

	.dwendtag $C$DW$9


$C$DW$11	.dwtag  DW_TAG_subprogram
	.dwattr $C$DW$11, DW_AT_name("SysCtlPeripheralEnable")
	.dwattr $C$DW$11, DW_AT_TI_symbol_name("SysCtlPeripheralEnable")
	.dwattr $C$DW$11, DW_AT_declaration
	.dwattr $C$DW$11, DW_AT_external
	.dwattr $C$DW$11, DW_AT_decl_file("C:/ti/TivaWare_C_Series-2.1.4.178/driverlib/sysctl.h")
	.dwattr $C$DW$11, DW_AT_decl_line(0x24e)
	.dwattr $C$DW$11, DW_AT_decl_column(0x0d)
$C$DW$12	.dwtag  DW_TAG_formal_parameter
	.dwattr $C$DW$12, DW_AT_type(*$C$DW$T$23)

	.dwendtag $C$DW$11


$C$DW$13	.dwtag  DW_TAG_subprogram
	.dwattr $C$DW$13, DW_AT_name("SysCtlPeripheralDisable")
	.dwattr $C$DW$13, DW_AT_TI_symbol_name("SysCtlPeripheralDisable")
	.dwattr $C$DW$13, DW_AT_declaration
	.dwattr $C$DW$13, DW_AT_external
	.dwattr $C$DW$13, DW_AT_decl_file("C:/ti/TivaWare_C_Series-2.1.4.178/driverlib/sysctl.h")
	.dwattr $C$DW$13, DW_AT_decl_line(0x24f)
	.dwattr $C$DW$13, DW_AT_decl_column(0x0d)
$C$DW$14	.dwtag  DW_TAG_formal_parameter
	.dwattr $C$DW$14, DW_AT_type(*$C$DW$T$23)

	.dwendtag $C$DW$13


$C$DW$15	.dwtag  DW_TAG_subprogram
	.dwattr $C$DW$15, DW_AT_name("SysCtlClockFreqSet")
	.dwattr $C$DW$15, DW_AT_TI_symbol_name("SysCtlClockFreqSet")
	.dwattr $C$DW$15, DW_AT_type(*$C$DW$T$23)
	.dwattr $C$DW$15, DW_AT_declaration
	.dwattr $C$DW$15, DW_AT_external
	.dwattr $C$DW$15, DW_AT_decl_file("C:/ti/TivaWare_C_Series-2.1.4.178/driverlib/sysctl.h")
	.dwattr $C$DW$15, DW_AT_decl_line(0x27a)
	.dwattr $C$DW$15, DW_AT_decl_column(0x11)
$C$DW$16	.dwtag  DW_TAG_formal_parameter
	.dwattr $C$DW$16, DW_AT_type(*$C$DW$T$23)

$C$DW$17	.dwtag  DW_TAG_formal_parameter
	.dwattr $C$DW$17, DW_AT_type(*$C$DW$T$23)

	.dwendtag $C$DW$15


$C$DW$18	.dwtag  DW_TAG_subprogram
	.dwattr $C$DW$18, DW_AT_name("TimerEnable")
	.dwattr $C$DW$18, DW_AT_TI_symbol_name("TimerEnable")
	.dwattr $C$DW$18, DW_AT_declaration
	.dwattr $C$DW$18, DW_AT_external
	.dwattr $C$DW$18, DW_AT_decl_file("C:/ti/TivaWare_C_Series-2.1.4.178/driverlib/timer.h")
	.dwattr $C$DW$18, DW_AT_decl_line(0xf3)
	.dwattr $C$DW$18, DW_AT_decl_column(0x0d)
$C$DW$19	.dwtag  DW_TAG_formal_parameter
	.dwattr $C$DW$19, DW_AT_type(*$C$DW$T$23)

$C$DW$20	.dwtag  DW_TAG_formal_parameter
	.dwattr $C$DW$20, DW_AT_type(*$C$DW$T$23)

	.dwendtag $C$DW$18


$C$DW$21	.dwtag  DW_TAG_subprogram
	.dwattr $C$DW$21, DW_AT_name("TimerConfigure")
	.dwattr $C$DW$21, DW_AT_TI_symbol_name("TimerConfigure")
	.dwattr $C$DW$21, DW_AT_declaration
	.dwattr $C$DW$21, DW_AT_external
	.dwattr $C$DW$21, DW_AT_decl_file("C:/ti/TivaWare_C_Series-2.1.4.178/driverlib/timer.h")
	.dwattr $C$DW$21, DW_AT_decl_line(0xf5)
	.dwattr $C$DW$21, DW_AT_decl_column(0x0d)
$C$DW$22	.dwtag  DW_TAG_formal_parameter
	.dwattr $C$DW$22, DW_AT_type(*$C$DW$T$23)

$C$DW$23	.dwtag  DW_TAG_formal_parameter
	.dwattr $C$DW$23, DW_AT_type(*$C$DW$T$23)

	.dwendtag $C$DW$21


$C$DW$24	.dwtag  DW_TAG_subprogram
	.dwattr $C$DW$24, DW_AT_name("TimerLoadSet")
	.dwattr $C$DW$24, DW_AT_TI_symbol_name("TimerLoadSet")
	.dwattr $C$DW$24, DW_AT_declaration
	.dwattr $C$DW$24, DW_AT_external
	.dwattr $C$DW$24, DW_AT_decl_file("C:/ti/TivaWare_C_Series-2.1.4.178/driverlib/timer.h")
	.dwattr $C$DW$24, DW_AT_decl_line(0x108)
	.dwattr $C$DW$24, DW_AT_decl_column(0x0d)
$C$DW$25	.dwtag  DW_TAG_formal_parameter
	.dwattr $C$DW$25, DW_AT_type(*$C$DW$T$23)

$C$DW$26	.dwtag  DW_TAG_formal_parameter
	.dwattr $C$DW$26, DW_AT_type(*$C$DW$T$23)

$C$DW$27	.dwtag  DW_TAG_formal_parameter
	.dwattr $C$DW$27, DW_AT_type(*$C$DW$T$23)

	.dwendtag $C$DW$24


$C$DW$28	.dwtag  DW_TAG_subprogram
	.dwattr $C$DW$28, DW_AT_name("TimerValueGet")
	.dwattr $C$DW$28, DW_AT_TI_symbol_name("TimerValueGet")
	.dwattr $C$DW$28, DW_AT_type(*$C$DW$T$23)
	.dwattr $C$DW$28, DW_AT_declaration
	.dwattr $C$DW$28, DW_AT_external
	.dwattr $C$DW$28, DW_AT_decl_file("C:/ti/TivaWare_C_Series-2.1.4.178/driverlib/timer.h")
	.dwattr $C$DW$28, DW_AT_decl_line(0x10d)
	.dwattr $C$DW$28, DW_AT_decl_column(0x11)
$C$DW$29	.dwtag  DW_TAG_formal_parameter
	.dwattr $C$DW$29, DW_AT_type(*$C$DW$T$23)

$C$DW$30	.dwtag  DW_TAG_formal_parameter
	.dwattr $C$DW$30, DW_AT_type(*$C$DW$T$23)

	.dwendtag $C$DW$28


$C$DW$31	.dwtag  DW_TAG_subprogram
	.dwattr $C$DW$31, DW_AT_name("TimerClockSourceSet")
	.dwattr $C$DW$31, DW_AT_TI_symbol_name("TimerClockSourceSet")
	.dwattr $C$DW$31, DW_AT_declaration
	.dwattr $C$DW$31, DW_AT_external
	.dwattr $C$DW$31, DW_AT_decl_file("C:/ti/TivaWare_C_Series-2.1.4.178/driverlib/timer.h")
	.dwattr $C$DW$31, DW_AT_decl_line(0x11d)
	.dwattr $C$DW$31, DW_AT_decl_column(0x0d)
$C$DW$32	.dwtag  DW_TAG_formal_parameter
	.dwattr $C$DW$32, DW_AT_type(*$C$DW$T$23)

$C$DW$33	.dwtag  DW_TAG_formal_parameter
	.dwattr $C$DW$33, DW_AT_type(*$C$DW$T$23)

	.dwendtag $C$DW$31


$C$DW$34	.dwtag  DW_TAG_subprogram
	.dwattr $C$DW$34, DW_AT_name("GPIOPinRead")
	.dwattr $C$DW$34, DW_AT_TI_symbol_name("GPIOPinRead")
	.dwattr $C$DW$34, DW_AT_type(*$C$DW$T$80)
	.dwattr $C$DW$34, DW_AT_declaration
	.dwattr $C$DW$34, DW_AT_external
	.dwattr $C$DW$34, DW_AT_decl_file("C:/ti/TivaWare_C_Series-2.1.4.178/driverlib/gpio.h")
	.dwattr $C$DW$34, DW_AT_decl_line(0xa0)
	.dwattr $C$DW$34, DW_AT_decl_column(0x10)
$C$DW$35	.dwtag  DW_TAG_formal_parameter
	.dwattr $C$DW$35, DW_AT_type(*$C$DW$T$23)

$C$DW$36	.dwtag  DW_TAG_formal_parameter
	.dwattr $C$DW$36, DW_AT_type(*$C$DW$T$39)

	.dwendtag $C$DW$34


$C$DW$37	.dwtag  DW_TAG_subprogram
	.dwattr $C$DW$37, DW_AT_name("GPIOPinWrite")
	.dwattr $C$DW$37, DW_AT_TI_symbol_name("GPIOPinWrite")
	.dwattr $C$DW$37, DW_AT_declaration
	.dwattr $C$DW$37, DW_AT_external
	.dwattr $C$DW$37, DW_AT_decl_file("C:/ti/TivaWare_C_Series-2.1.4.178/driverlib/gpio.h")
	.dwattr $C$DW$37, DW_AT_decl_line(0xa1)
	.dwattr $C$DW$37, DW_AT_decl_column(0x0d)
$C$DW$38	.dwtag  DW_TAG_formal_parameter
	.dwattr $C$DW$38, DW_AT_type(*$C$DW$T$23)

$C$DW$39	.dwtag  DW_TAG_formal_parameter
	.dwattr $C$DW$39, DW_AT_type(*$C$DW$T$39)

$C$DW$40	.dwtag  DW_TAG_formal_parameter
	.dwattr $C$DW$40, DW_AT_type(*$C$DW$T$39)

	.dwendtag $C$DW$37


$C$DW$41	.dwtag  DW_TAG_subprogram
	.dwattr $C$DW$41, DW_AT_name("GPIOPinTypeGPIOOutput")
	.dwattr $C$DW$41, DW_AT_TI_symbol_name("GPIOPinTypeGPIOOutput")
	.dwattr $C$DW$41, DW_AT_declaration
	.dwattr $C$DW$41, DW_AT_external
	.dwattr $C$DW$41, DW_AT_decl_file("C:/ti/TivaWare_C_Series-2.1.4.178/driverlib/gpio.h")
	.dwattr $C$DW$41, DW_AT_decl_line(0xac)
	.dwattr $C$DW$41, DW_AT_decl_column(0x0d)
$C$DW$42	.dwtag  DW_TAG_formal_parameter
	.dwattr $C$DW$42, DW_AT_type(*$C$DW$T$23)

$C$DW$43	.dwtag  DW_TAG_formal_parameter
	.dwattr $C$DW$43, DW_AT_type(*$C$DW$T$39)

	.dwendtag $C$DW$41


$C$DW$44	.dwtag  DW_TAG_subprogram
	.dwattr $C$DW$44, DW_AT_name("CRCConfigSet")
	.dwattr $C$DW$44, DW_AT_TI_symbol_name("CRCConfigSet")
	.dwattr $C$DW$44, DW_AT_declaration
	.dwattr $C$DW$44, DW_AT_external
	.dwattr $C$DW$44, DW_AT_decl_file("C:/ti/TivaWare_C_Series-2.1.4.178/driverlib/crc.h")
	.dwattr $C$DW$44, DW_AT_decl_line(0x55)
	.dwattr $C$DW$44, DW_AT_decl_column(0x0d)
$C$DW$45	.dwtag  DW_TAG_formal_parameter
	.dwattr $C$DW$45, DW_AT_type(*$C$DW$T$23)

$C$DW$46	.dwtag  DW_TAG_formal_parameter
	.dwattr $C$DW$46, DW_AT_type(*$C$DW$T$23)

	.dwendtag $C$DW$44


$C$DW$47	.dwtag  DW_TAG_subprogram
	.dwattr $C$DW$47, DW_AT_name("CRCDataProcess")
	.dwattr $C$DW$47, DW_AT_TI_symbol_name("CRCDataProcess")
	.dwattr $C$DW$47, DW_AT_type(*$C$DW$T$23)
	.dwattr $C$DW$47, DW_AT_declaration
	.dwattr $C$DW$47, DW_AT_external
	.dwattr $C$DW$47, DW_AT_decl_file("C:/ti/TivaWare_C_Series-2.1.4.178/driverlib/crc.h")
	.dwattr $C$DW$47, DW_AT_decl_line(0x56)
	.dwattr $C$DW$47, DW_AT_decl_column(0x11)
$C$DW$48	.dwtag  DW_TAG_formal_parameter
	.dwattr $C$DW$48, DW_AT_type(*$C$DW$T$23)

$C$DW$49	.dwtag  DW_TAG_formal_parameter
	.dwattr $C$DW$49, DW_AT_type(*$C$DW$T$90)

$C$DW$50	.dwtag  DW_TAG_formal_parameter
	.dwattr $C$DW$50, DW_AT_type(*$C$DW$T$23)

$C$DW$51	.dwtag  DW_TAG_formal_parameter
	.dwattr $C$DW$51, DW_AT_type(*$C$DW$T$91)

	.dwendtag $C$DW$47

$C$DW$52	.dwtag  DW_TAG_variable
	.dwattr $C$DW$52, DW_AT_name("flash_constant_data")
	.dwattr $C$DW$52, DW_AT_TI_symbol_name("flash_constant_data")
	.dwattr $C$DW$52, DW_AT_type(*$C$DW$T$102)
	.dwattr $C$DW$52, DW_AT_declaration
	.dwattr $C$DW$52, DW_AT_external
	.dwattr $C$DW$52, DW_AT_decl_file("..\flash_pseudo_random_data.h")
	.dwattr $C$DW$52, DW_AT_decl_line(0x04)
	.dwattr $C$DW$52, DW_AT_decl_column(0x17)

ram_test_buffer:	.usect	".bss:ram_test_buffer",235928,4
	.clink ".bss:ram_test_buffer"
$C$DW$53	.dwtag  DW_TAG_variable
	.dwattr $C$DW$53, DW_AT_name("ram_test_buffer")
	.dwattr $C$DW$53, DW_AT_TI_symbol_name("ram_test_buffer")
	.dwattr $C$DW$53, DW_AT_type(*$C$DW$T$100)
	.dwattr $C$DW$53, DW_AT_location[DW_OP_addr ram_test_buffer]
	.dwattr $C$DW$53, DW_AT_decl_file("../TM4C129_self_test.c")
	.dwattr $C$DW$53, DW_AT_decl_line(0x2d)
	.dwattr $C$DW$53, DW_AT_decl_column(0x11)

	.bss	ram_test_start_seed,4,4
$C$DW$54	.dwtag  DW_TAG_variable
	.dwattr $C$DW$54, DW_AT_name("ram_test_start_seed")
	.dwattr $C$DW$54, DW_AT_TI_symbol_name("ram_test_start_seed")
	.dwattr $C$DW$54, DW_AT_type(*$C$DW$T$23)
	.dwattr $C$DW$54, DW_AT_location[DW_OP_addr ram_test_start_seed]
	.dwattr $C$DW$54, DW_AT_decl_file("../TM4C129_self_test.c")
	.dwattr $C$DW$54, DW_AT_decl_line(0x30)
	.dwattr $C$DW$54, DW_AT_decl_column(0x11)

$C$DW$55	.dwtag  DW_TAG_variable
	.dwattr $C$DW$55, DW_AT_name("intvecs_crc_table")
	.dwattr $C$DW$55, DW_AT_TI_symbol_name("intvecs_crc_table")
	.dwattr $C$DW$55, DW_AT_type(*$C$DW$T$47)
	.dwattr $C$DW$55, DW_AT_declaration
	.dwattr $C$DW$55, DW_AT_external
	.dwattr $C$DW$55, DW_AT_decl_file("../TM4C129_self_test.c")
	.dwattr $C$DW$55, DW_AT_decl_line(0x33)
	.dwattr $C$DW$55, DW_AT_decl_column(0x18)

$C$DW$56	.dwtag  DW_TAG_variable
	.dwattr $C$DW$56, DW_AT_name("text_crc_table")
	.dwattr $C$DW$56, DW_AT_TI_symbol_name("text_crc_table")
	.dwattr $C$DW$56, DW_AT_type(*$C$DW$T$47)
	.dwattr $C$DW$56, DW_AT_declaration
	.dwattr $C$DW$56, DW_AT_external
	.dwattr $C$DW$56, DW_AT_decl_file("../TM4C129_self_test.c")
	.dwattr $C$DW$56, DW_AT_decl_line(0x34)
	.dwattr $C$DW$56, DW_AT_decl_column(0x18)

$C$DW$57	.dwtag  DW_TAG_variable
	.dwattr $C$DW$57, DW_AT_name("const_crc_table")
	.dwattr $C$DW$57, DW_AT_TI_symbol_name("const_crc_table")
	.dwattr $C$DW$57, DW_AT_type(*$C$DW$T$47)
	.dwattr $C$DW$57, DW_AT_declaration
	.dwattr $C$DW$57, DW_AT_external
	.dwattr $C$DW$57, DW_AT_decl_file("../TM4C129_self_test.c")
	.dwattr $C$DW$57, DW_AT_decl_line(0x35)
	.dwattr $C$DW$57, DW_AT_decl_column(0x18)

;	C:\ti_ccs7_1_0\ccsv7\tools\compiler\ti-cgt-arm_16.9.2.LTS\bin\armopt.exe C:\\Users\\MR_HAL~1\\AppData\\Local\\Temp\\032762 C:\\Users\\MR_HAL~1\\AppData\\Local\\Temp\\032764 
	.sect	".text"
	.clink
	.thumbfunc initialise_progress_led
	.thumb

$C$DW$58	.dwtag  DW_TAG_subprogram
	.dwattr $C$DW$58, DW_AT_name("initialise_progress_led")
	.dwattr $C$DW$58, DW_AT_low_pc(initialise_progress_led)
	.dwattr $C$DW$58, DW_AT_high_pc(0x00)
	.dwattr $C$DW$58, DW_AT_TI_symbol_name("initialise_progress_led")
	.dwattr $C$DW$58, DW_AT_TI_begin_file("../TM4C129_self_test.c")
	.dwattr $C$DW$58, DW_AT_TI_begin_line(0x78)
	.dwattr $C$DW$58, DW_AT_TI_begin_column(0x0d)
	.dwattr $C$DW$58, DW_AT_decl_file("../TM4C129_self_test.c")
	.dwattr $C$DW$58, DW_AT_decl_line(0x78)
	.dwattr $C$DW$58, DW_AT_decl_column(0x0d)
	.dwattr $C$DW$58, DW_AT_TI_max_frame_size(0x08)
	.dwpsn	file "../TM4C129_self_test.c",line 121,column 1,is_stmt,address initialise_progress_led,isa 1

	.dwfde $C$DW$CIE, initialise_progress_led
;----------------------------------------------------------------------
; 120 | static void initialise_progress_led (void)                             
; 122 | SysCtlPeripheralEnable (PROGRESS_LED_PERIPHERAL);                      
;----------------------------------------------------------------------

;*****************************************************************************
;* FUNCTION NAME: initialise_progress_led                                    *
;*                                                                           *
;*   Regs Modified     : A1,A2,A3,A4,V1,V9,SP,LR,SR,D0,D0_hi,D1,D1_hi,D2,    *
;*                           D2_hi,D3,D3_hi,D4,D4_hi,D5,D5_hi,D6,D6_hi,D7,   *
;*                           D7_hi,FPEXC,FPSCR                               *
;*   Regs Used         : A1,A2,A3,A4,V1,V9,SP,LR,SR,D0,D0_hi,D1,D1_hi,D2,    *
;*                           D2_hi,D3,D3_hi,D4,D4_hi,D5,D5_hi,D6,D6_hi,D7,   *
;*                           D7_hi,FPEXC,FPSCR                               *
;*   Local Frame Size  : 0 Args + 0 Auto + 8 Save = 8 byte                   *
;*****************************************************************************
initialise_progress_led:
;* --------------------------------------------------------------------------*
	.dwcfi	cfa_offset, 0
        PUSH      {V1, LR}              ; [DPU_3_PIPE] 
	.dwcfi	cfa_offset, 8
	.dwcfi	save_reg_to_mem, 14, -4
	.dwcfi	save_reg_to_mem, 4, -8
	.dwpsn	file "../TM4C129_self_test.c",line 123,column 12,is_stmt,isa 1
;----------------------------------------------------------------------
; 123 | while (!SysCtlPeripheralReady (PROGRESS_LED_PERIPHERAL))               
;----------------------------------------------------------------------
        LDR       V1, $C$CON1           ; [DPU_3_PIPE] |123| 
	.dwpsn	file "../TM4C129_self_test.c",line 122,column 5,is_stmt,isa 1
        MOV       A1, V1                ; [DPU_3_PIPE] |122| 
$C$DW$59	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$59, DW_AT_low_pc(0x00)
	.dwattr $C$DW$59, DW_AT_name("SysCtlPeripheralEnable")
	.dwattr $C$DW$59, DW_AT_TI_call

        BL        SysCtlPeripheralEnable ; [DPU_3_PIPE] |122| 
        ; CALL OCCURS {SysCtlPeripheralEnable }  ; [] |122| 
;* --------------------------------------------------------------------------*
;*   BEGIN LOOP ||$C$L1||
;*
;*   Loop source line                : 123
;*   Loop closing brace source line  : 125
;*   Known Minimum Trip Count        : 1
;*   Known Maximum Trip Count        : 4294967295
;*   Known Max Trip Count Factor     : 1
;* --------------------------------------------------------------------------*
||$C$L1||:    
	.dwpsn	file "../TM4C129_self_test.c",line 123,column 12,is_stmt,isa 1
;----------------------------------------------------------------------
; 126 | GPIOPinTypeGPIOOutput (PROGRESS_LED_PORT, PROGRESS_LED_PIN);           
;----------------------------------------------------------------------
        MOV       A1, V1                ; [DPU_3_PIPE] |123| 
$C$DW$60	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$60, DW_AT_low_pc(0x00)
	.dwattr $C$DW$60, DW_AT_name("SysCtlPeripheralReady")
	.dwattr $C$DW$60, DW_AT_TI_call

        BL        SysCtlPeripheralReady ; [DPU_3_PIPE] |123| 
        ; CALL OCCURS {SysCtlPeripheralReady }  ; [] |123| 
        CMP       A1, #0                ; [DPU_3_PIPE] |123| 
        BEQ       ||$C$L1||             ; [DPU_3_PIPE] |123| 
        ; BRANCHCC OCCURS {||$C$L1||}    ; [] |123| 
;* --------------------------------------------------------------------------*
	.dwpsn	file "../TM4C129_self_test.c",line 127,column 5,is_stmt,isa 1
;----------------------------------------------------------------------
; 127 | GPIOPinWrite (PROGRESS_LED_PORT, PROGRESS_LED_PIN, 0);                 
;----------------------------------------------------------------------
        LDR       V1, $C$CON2           ; [DPU_3_PIPE] |127| 
	.dwpsn	file "../TM4C129_self_test.c",line 126,column 5,is_stmt,isa 1
        MOVS      A2, #1                ; [DPU_3_PIPE] |126| 
        MOV       A1, V1                ; [DPU_3_PIPE] |126| 
$C$DW$61	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$61, DW_AT_low_pc(0x00)
	.dwattr $C$DW$61, DW_AT_name("GPIOPinTypeGPIOOutput")
	.dwattr $C$DW$61, DW_AT_TI_call

        BL        GPIOPinTypeGPIOOutput ; [DPU_3_PIPE] |126| 
        ; CALL OCCURS {GPIOPinTypeGPIOOutput }  ; [] |126| 
	.dwpsn	file "../TM4C129_self_test.c",line 127,column 5,is_stmt,isa 1
        MOVS      A2, #1                ; [DPU_3_PIPE] |127| 
        MOVS      A3, #0                ; [DPU_3_PIPE] |127| 
        MOV       A1, V1                ; [DPU_3_PIPE] |127| 
$C$DW$62	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$62, DW_AT_low_pc(0x00)
	.dwattr $C$DW$62, DW_AT_name("GPIOPinWrite")
	.dwattr $C$DW$62, DW_AT_TI_call

        BL        GPIOPinWrite          ; [DPU_3_PIPE] |127| 
        ; CALL OCCURS {GPIOPinWrite }    ; [] |127| 
$C$DW$63	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$63, DW_AT_low_pc(0x00)
	.dwattr $C$DW$63, DW_AT_TI_return

        POP       {V1, PC}              ; [DPU_3_PIPE] 
	.dwcfi	cfa_offset, 0
        ; BRANCH OCCURS                  ; [] 
	.dwattr $C$DW$58, DW_AT_TI_end_file("../TM4C129_self_test.c")
	.dwattr $C$DW$58, DW_AT_TI_end_line(0x80)
	.dwattr $C$DW$58, DW_AT_TI_end_column(0x01)
	.dwendentry
	.dwendtag $C$DW$58

	.sect	".text"
	.clink
	.thumbfunc initialise_clock
	.thumb

$C$DW$64	.dwtag  DW_TAG_subprogram
	.dwattr $C$DW$64, DW_AT_name("initialise_clock")
	.dwattr $C$DW$64, DW_AT_low_pc(initialise_clock)
	.dwattr $C$DW$64, DW_AT_high_pc(0x00)
	.dwattr $C$DW$64, DW_AT_TI_symbol_name("initialise_clock")
	.dwattr $C$DW$64, DW_AT_TI_begin_file("../TM4C129_self_test.c")
	.dwattr $C$DW$64, DW_AT_TI_begin_line(0x3a)
	.dwattr $C$DW$64, DW_AT_TI_begin_column(0x0d)
	.dwattr $C$DW$64, DW_AT_decl_file("../TM4C129_self_test.c")
	.dwattr $C$DW$64, DW_AT_decl_line(0x3a)
	.dwattr $C$DW$64, DW_AT_decl_column(0x0d)
	.dwattr $C$DW$64, DW_AT_TI_max_frame_size(0x20)
	.dwpsn	file "../TM4C129_self_test.c",line 59,column 1,is_stmt,address initialise_clock,isa 1

	.dwfde $C$DW$CIE, initialise_clock
;----------------------------------------------------------------------
;  58 | static void initialise_clock (void)                                    
;  60 | uint32_t reported_frequency;                                           
;  61 | uint32_t piosc_start_ticks, piosc_stop_ticks;                          
;  62 | uint32_t sys_clock_start_ticks, sys_clock_stop_ticks;                  
;  64 | #ifdef XTAL_SELECTION_FOR_WRONG_CLOCK                                  
;  65 | reported_frequency = SysCtlClockFreqSet ((XTAL_SELECTION_FOR_WRONG_CLOC
;     | K | SYSCTL_OSC_MAIN | SYSCTL_USE_PLL | SYSCTL_CFG_VCO_480),            
;  66 |                                          CLOCK_FREQUENCY_HZ);          
;  67 | #else                                                                  
;  68 | reported_frequency = SysCtlClockFreqSet ((SYSCTL_OSC_INT | SYSCTL_USE_P
;     | LL | SYSCTL_CFG_VCO_480), CLOCK_FREQUENCY_HZ);                         
;  69 | #endif                                                                 
;----------------------------------------------------------------------

;*****************************************************************************
;* FUNCTION NAME: initialise_clock                                           *
;*                                                                           *
;*   Regs Modified     : A1,A2,A3,A4,V1,V2,V3,V4,V5,V6,V9,SP,LR,SR,D0,D0_hi, *
;*                           D1,D1_hi,D2,D2_hi,D3,D3_hi,D4,D4_hi,D5,D5_hi,D6,*
;*                           D6_hi,D7,D7_hi,FPEXC,FPSCR                      *
;*   Regs Used         : A1,A2,A3,A4,V1,V2,V3,V4,V5,V6,V9,SP,LR,SR,D0,D0_hi, *
;*                           D1,D1_hi,D2,D2_hi,D3,D3_hi,D4,D4_hi,D5,D5_hi,D6,*
;*                           D6_hi,D7,D7_hi,FPEXC,FPSCR                      *
;*   Local Frame Size  : 0 Args + 0 Auto + 28 Save = 28 byte                 *
;*****************************************************************************
initialise_clock:
;* --------------------------------------------------------------------------*
;* V1    assigned to $O$C1
;* A1    assigned to reported_frequency
$C$DW$65	.dwtag  DW_TAG_variable
	.dwattr $C$DW$65, DW_AT_name("reported_frequency")
	.dwattr $C$DW$65, DW_AT_TI_symbol_name("reported_frequency")
	.dwattr $C$DW$65, DW_AT_type(*$C$DW$T$23)
	.dwattr $C$DW$65, DW_AT_location[DW_OP_reg0]

;* V2    assigned to piosc_start_ticks
$C$DW$66	.dwtag  DW_TAG_variable
	.dwattr $C$DW$66, DW_AT_name("piosc_start_ticks")
	.dwattr $C$DW$66, DW_AT_TI_symbol_name("piosc_start_ticks")
	.dwattr $C$DW$66, DW_AT_type(*$C$DW$T$23)
	.dwattr $C$DW$66, DW_AT_location[DW_OP_reg5]

;* V1    assigned to piosc_stop_ticks
$C$DW$67	.dwtag  DW_TAG_variable
	.dwattr $C$DW$67, DW_AT_name("piosc_stop_ticks")
	.dwattr $C$DW$67, DW_AT_TI_symbol_name("piosc_stop_ticks")
	.dwattr $C$DW$67, DW_AT_type(*$C$DW$T$23)
	.dwattr $C$DW$67, DW_AT_location[DW_OP_reg4]

;* V4    assigned to sys_clock_start_ticks
$C$DW$68	.dwtag  DW_TAG_variable
	.dwattr $C$DW$68, DW_AT_name("sys_clock_start_ticks")
	.dwattr $C$DW$68, DW_AT_TI_symbol_name("sys_clock_start_ticks")
	.dwattr $C$DW$68, DW_AT_type(*$C$DW$T$23)
	.dwattr $C$DW$68, DW_AT_location[DW_OP_reg7]

;* A1    assigned to sys_clock_stop_ticks
$C$DW$69	.dwtag  DW_TAG_variable
	.dwattr $C$DW$69, DW_AT_name("sys_clock_stop_ticks")
	.dwattr $C$DW$69, DW_AT_TI_symbol_name("sys_clock_stop_ticks")
	.dwattr $C$DW$69, DW_AT_type(*$C$DW$T$23)
	.dwattr $C$DW$69, DW_AT_location[DW_OP_reg0]

	.dwcfi	cfa_offset, 0
        PUSH      {A4, V1, V2, V3, V4, V5, V6, LR} ; [DPU_3_PIPE] 
	.dwcfi	cfa_offset, 32
	.dwcfi	save_reg_to_mem, 14, -4
	.dwcfi	save_reg_to_mem, 9, -8
	.dwcfi	save_reg_to_mem, 8, -12
	.dwcfi	save_reg_to_mem, 7, -16
	.dwcfi	save_reg_to_mem, 6, -20
	.dwcfi	save_reg_to_mem, 5, -24
	.dwcfi	save_reg_to_mem, 4, -28
	.dwcfi	save_reg_to_mem, 3, -32
	.dwpsn	file "../TM4C129_self_test.c",line 70,column 5,is_stmt,isa 1
;----------------------------------------------------------------------
;  70 | assert (reported_frequency == CLOCK_FREQUENCY_HZ);                     
;----------------------------------------------------------------------
        LDR       V1, $C$CON4           ; [DPU_3_PIPE] |70| 
	.dwpsn	file "../TM4C129_self_test.c",line 68,column 5,is_stmt,isa 1
        LDR       A1, $C$CON3           ; [DPU_3_PIPE] |68| 
        MOV       A2, V1                ; [DPU_3_PIPE] |68| 
$C$DW$70	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$70, DW_AT_low_pc(0x00)
	.dwattr $C$DW$70, DW_AT_name("SysCtlClockFreqSet")
	.dwattr $C$DW$70, DW_AT_TI_call

        BL        SysCtlClockFreqSet    ; [DPU_3_PIPE] |68| 
        ; CALL OCCURS {SysCtlClockFreqSet }  ; [] |68| 
	.dwpsn	file "../TM4C129_self_test.c",line 70,column 5,is_stmt,isa 1
;----------------------------------------------------------------------
;  72 | SysCtlPeripheralDisable (SYSCTL_PERIPH_TIMER0);                        
;  73 | SysCtlPeripheralDisable (SYSCTL_PERIPH_TIMER1);                        
;  74 | SysCtlPeripheralReset (SYSCTL_PERIPH_TIMER0);                          
;  75 | SysCtlPeripheralReset (SYSCTL_PERIPH_TIMER1);                          
;  76 | SysCtlPeripheralEnable (SYSCTL_PERIPH_TIMER0);                         
;  77 | SysCtlPeripheralEnable (SYSCTL_PERIPH_TIMER1);                         
;----------------------------------------------------------------------
        CMP       V1, A1                ; [DPU_3_PIPE] |70| 
        BEQ       ||$C$L2||             ; [DPU_3_PIPE] |70| 
        ; BRANCHCC OCCURS {||$C$L2||}    ; [] |70| 
;* --------------------------------------------------------------------------*
        ADR       A1, $C$SL1            ; [DPU_3_PIPE] |70| 
$C$DW$71	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$71, DW_AT_low_pc(0x00)
	.dwattr $C$DW$71, DW_AT_name("_abort_msg")
	.dwattr $C$DW$71, DW_AT_TI_call

        BL        _abort_msg            ; [DPU_3_PIPE] |70| 
        ; CALL OCCURS {_abort_msg }      ; [] |70| 
;* --------------------------------------------------------------------------*
||$C$L2||:    
	.dwpsn	file "../TM4C129_self_test.c",line 78,column 12,is_stmt,isa 1
;----------------------------------------------------------------------
;  78 | while (!SysCtlPeripheralReady (SYSCTL_PERIPH_TIMER0) || !SysCtlPeripher
;     | alReady (SYSCTL_PERIPH_TIMER1))                                        
;----------------------------------------------------------------------
        LDR       V2, $C$CON5           ; [DPU_3_PIPE] |78| 
	.dwpsn	file "../TM4C129_self_test.c",line 72,column 5,is_stmt,isa 1
        MOV       A1, V2                ; [DPU_3_PIPE] |72| 
$C$DW$72	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$72, DW_AT_low_pc(0x00)
	.dwattr $C$DW$72, DW_AT_name("SysCtlPeripheralDisable")
	.dwattr $C$DW$72, DW_AT_TI_call

        BL        SysCtlPeripheralDisable ; [DPU_3_PIPE] |72| 
        ; CALL OCCURS {SysCtlPeripheralDisable }  ; [] |72| 
	.dwpsn	file "../TM4C129_self_test.c",line 78,column 12,is_stmt,isa 1
;----------------------------------------------------------------------
;  83 | TimerClockSourceSet (TIMER0_BASE, TIMER_CLOCK_SYSTEM);                 
;  84 | TimerConfigure (TIMER0_BASE, TIMER_CFG_PERIODIC_UP);                   
;  85 | TimerLoadSet (TIMER0_BASE, TIMER_A, 0xffffffff);                       
;  86 | TimerEnable (TIMER0_BASE, TIMER_A);                                    
;  89 | TimerClockSourceSet (TIMER1_BASE, TIMER_CLOCK_PIOSC);                  
;  90 | TimerConfigure (TIMER1_BASE, TIMER_CFG_PERIODIC_UP);                   
;  91 | TimerLoadSet (TIMER1_BASE, TIMER_A, 0xffffffff);                       
;  92 | TimerEnable (TIMER1_BASE, TIMER_A);                                    
;  95 | piosc_start_ticks = TimerValueGet (TIMER1_BASE, TIMER_A);              
;  96 | sys_clock_start_ticks = TimerValueGet (TIMER0_BASE, TIMER_A);          
;  97 | do                                                                     
;  99 |     piosc_stop_ticks = TimerValueGet (TIMER1_BASE, TIMER_A);           
;----------------------------------------------------------------------
        LDR       V1, $C$CON6           ; [DPU_3_PIPE] |78| 
	.dwpsn	file "../TM4C129_self_test.c",line 73,column 5,is_stmt,isa 1
        MOV       A1, V1                ; [DPU_3_PIPE] |73| 
$C$DW$73	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$73, DW_AT_low_pc(0x00)
	.dwattr $C$DW$73, DW_AT_name("SysCtlPeripheralDisable")
	.dwattr $C$DW$73, DW_AT_TI_call

        BL        SysCtlPeripheralDisable ; [DPU_3_PIPE] |73| 
        ; CALL OCCURS {SysCtlPeripheralDisable }  ; [] |73| 
	.dwpsn	file "../TM4C129_self_test.c",line 74,column 5,is_stmt,isa 1
        MOV       A1, V2                ; [DPU_3_PIPE] |74| 
$C$DW$74	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$74, DW_AT_low_pc(0x00)
	.dwattr $C$DW$74, DW_AT_name("SysCtlPeripheralReset")
	.dwattr $C$DW$74, DW_AT_TI_call

        BL        SysCtlPeripheralReset ; [DPU_3_PIPE] |74| 
        ; CALL OCCURS {SysCtlPeripheralReset }  ; [] |74| 
	.dwpsn	file "../TM4C129_self_test.c",line 75,column 5,is_stmt,isa 1
        MOV       A1, V1                ; [DPU_3_PIPE] |75| 
$C$DW$75	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$75, DW_AT_low_pc(0x00)
	.dwattr $C$DW$75, DW_AT_name("SysCtlPeripheralReset")
	.dwattr $C$DW$75, DW_AT_TI_call

        BL        SysCtlPeripheralReset ; [DPU_3_PIPE] |75| 
        ; CALL OCCURS {SysCtlPeripheralReset }  ; [] |75| 
	.dwpsn	file "../TM4C129_self_test.c",line 76,column 5,is_stmt,isa 1
        MOV       A1, V2                ; [DPU_3_PIPE] |76| 
$C$DW$76	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$76, DW_AT_low_pc(0x00)
	.dwattr $C$DW$76, DW_AT_name("SysCtlPeripheralEnable")
	.dwattr $C$DW$76, DW_AT_TI_call

        BL        SysCtlPeripheralEnable ; [DPU_3_PIPE] |76| 
        ; CALL OCCURS {SysCtlPeripheralEnable }  ; [] |76| 
	.dwpsn	file "../TM4C129_self_test.c",line 77,column 5,is_stmt,isa 1
        MOV       A1, V1                ; [DPU_3_PIPE] |77| 
$C$DW$77	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$77, DW_AT_low_pc(0x00)
	.dwattr $C$DW$77, DW_AT_name("SysCtlPeripheralEnable")
	.dwattr $C$DW$77, DW_AT_TI_call

        BL        SysCtlPeripheralEnable ; [DPU_3_PIPE] |77| 
        ; CALL OCCURS {SysCtlPeripheralEnable }  ; [] |77| 
;* --------------------------------------------------------------------------*
;*   BEGIN LOOP ||$C$L3||
;*
;*   Loop source line                : 78
;*   Loop closing brace source line  : 80
;*   Known Minimum Trip Count        : 1
;*   Known Maximum Trip Count        : 4294967295
;*   Known Max Trip Count Factor     : 1
;* --------------------------------------------------------------------------*
||$C$L3||:    
	.dwpsn	file "../TM4C129_self_test.c",line 78,column 12,is_stmt,isa 1
        MOV       A1, V2                ; [DPU_3_PIPE] |78| 
$C$DW$78	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$78, DW_AT_low_pc(0x00)
	.dwattr $C$DW$78, DW_AT_name("SysCtlPeripheralReady")
	.dwattr $C$DW$78, DW_AT_TI_call

        BL        SysCtlPeripheralReady ; [DPU_3_PIPE] |78| 
        ; CALL OCCURS {SysCtlPeripheralReady }  ; [] |78| 
        CMP       A1, #0                ; [DPU_3_PIPE] |78| 
        BEQ       ||$C$L3||             ; [DPU_3_PIPE] |78| 
        ; BRANCHCC OCCURS {||$C$L3||}    ; [] |78| 
;* --------------------------------------------------------------------------*
        MOV       A1, V1                ; [DPU_3_PIPE] |78| 
$C$DW$79	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$79, DW_AT_low_pc(0x00)
	.dwattr $C$DW$79, DW_AT_name("SysCtlPeripheralReady")
	.dwattr $C$DW$79, DW_AT_TI_call

        BL        SysCtlPeripheralReady ; [DPU_3_PIPE] |78| 
        ; CALL OCCURS {SysCtlPeripheralReady }  ; [] |78| 
        CMP       A1, #0                ; [DPU_3_PIPE] |78| 
        BEQ       ||$C$L3||             ; [DPU_3_PIPE] |78| 
        ; BRANCHCC OCCURS {||$C$L3||}    ; [] |78| 
;* --------------------------------------------------------------------------*
	.dwpsn	file "../TM4C129_self_test.c",line 100,column 9,is_stmt,isa 1
;----------------------------------------------------------------------
; 100 | sys_clock_stop_ticks = TimerValueGet (TIMER0_BASE, TIMER_A);           
;----------------------------------------------------------------------
        LDR       V6, $C$CON7           ; [DPU_3_PIPE] |100| 
	.dwpsn	file "../TM4C129_self_test.c",line 83,column 5,is_stmt,isa 1
        MOVS      A2, #0                ; [DPU_3_PIPE] |83| 
        MOV       A1, V6                ; [DPU_3_PIPE] |83| 
$C$DW$80	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$80, DW_AT_low_pc(0x00)
	.dwattr $C$DW$80, DW_AT_name("TimerClockSourceSet")
	.dwattr $C$DW$80, DW_AT_TI_call

        BL        TimerClockSourceSet   ; [DPU_3_PIPE] |83| 
        ; CALL OCCURS {TimerClockSourceSet }  ; [] |83| 
	.dwpsn	file "../TM4C129_self_test.c",line 84,column 5,is_stmt,isa 1
        MOVS      A2, #50               ; [DPU_3_PIPE] |84| 
        MOV       A1, V6                ; [DPU_3_PIPE] |84| 
$C$DW$81	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$81, DW_AT_low_pc(0x00)
	.dwattr $C$DW$81, DW_AT_name("TimerConfigure")
	.dwattr $C$DW$81, DW_AT_TI_call

        BL        TimerConfigure        ; [DPU_3_PIPE] |84| 
        ; CALL OCCURS {TimerConfigure }  ; [] |84| 
	.dwpsn	file "../TM4C129_self_test.c",line 85,column 5,is_stmt,isa 1
        MOVS      A2, #255              ; [DPU_3_PIPE] |85| 
        MOV       A3, #-1               ; [DPU_3_PIPE] |85| 
        MOV       A1, V6                ; [DPU_3_PIPE] |85| 
$C$DW$82	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$82, DW_AT_low_pc(0x00)
	.dwattr $C$DW$82, DW_AT_name("TimerLoadSet")
	.dwattr $C$DW$82, DW_AT_TI_call

        BL        TimerLoadSet          ; [DPU_3_PIPE] |85| 
        ; CALL OCCURS {TimerLoadSet }    ; [] |85| 
	.dwpsn	file "../TM4C129_self_test.c",line 86,column 5,is_stmt,isa 1
        MOVS      A2, #255              ; [DPU_3_PIPE] |86| 
        MOV       A1, V6                ; [DPU_3_PIPE] |86| 
$C$DW$83	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$83, DW_AT_low_pc(0x00)
	.dwattr $C$DW$83, DW_AT_name("TimerEnable")
	.dwattr $C$DW$83, DW_AT_TI_call

        BL        TimerEnable           ; [DPU_3_PIPE] |86| 
        ; CALL OCCURS {TimerEnable }     ; [] |86| 
	.dwpsn	file "../TM4C129_self_test.c",line 99,column 9,is_stmt,isa 1
        LDR       V5, $C$CON8           ; [DPU_3_PIPE] |99| 
	.dwpsn	file "../TM4C129_self_test.c",line 89,column 5,is_stmt,isa 1
        MOVS      A2, #1                ; [DPU_3_PIPE] |89| 
        MOV       A1, V5                ; [DPU_3_PIPE] |89| 
$C$DW$84	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$84, DW_AT_low_pc(0x00)
	.dwattr $C$DW$84, DW_AT_name("TimerClockSourceSet")
	.dwattr $C$DW$84, DW_AT_TI_call

        BL        TimerClockSourceSet   ; [DPU_3_PIPE] |89| 
        ; CALL OCCURS {TimerClockSourceSet }  ; [] |89| 
	.dwpsn	file "../TM4C129_self_test.c",line 90,column 5,is_stmt,isa 1
        MOVS      A2, #50               ; [DPU_3_PIPE] |90| 
        MOV       A1, V5                ; [DPU_3_PIPE] |90| 
$C$DW$85	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$85, DW_AT_low_pc(0x00)
	.dwattr $C$DW$85, DW_AT_name("TimerConfigure")
	.dwattr $C$DW$85, DW_AT_TI_call

        BL        TimerConfigure        ; [DPU_3_PIPE] |90| 
        ; CALL OCCURS {TimerConfigure }  ; [] |90| 
	.dwpsn	file "../TM4C129_self_test.c",line 91,column 5,is_stmt,isa 1
        MOVS      A2, #255              ; [DPU_3_PIPE] |91| 
        MOV       A3, #-1               ; [DPU_3_PIPE] |91| 
        MOV       A1, V5                ; [DPU_3_PIPE] |91| 
$C$DW$86	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$86, DW_AT_low_pc(0x00)
	.dwattr $C$DW$86, DW_AT_name("TimerLoadSet")
	.dwattr $C$DW$86, DW_AT_TI_call

        BL        TimerLoadSet          ; [DPU_3_PIPE] |91| 
        ; CALL OCCURS {TimerLoadSet }    ; [] |91| 
	.dwpsn	file "../TM4C129_self_test.c",line 92,column 5,is_stmt,isa 1
        MOVS      A2, #255              ; [DPU_3_PIPE] |92| 
        MOV       A1, V5                ; [DPU_3_PIPE] |92| 
$C$DW$87	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$87, DW_AT_low_pc(0x00)
	.dwattr $C$DW$87, DW_AT_name("TimerEnable")
	.dwattr $C$DW$87, DW_AT_TI_call

        BL        TimerEnable           ; [DPU_3_PIPE] |92| 
        ; CALL OCCURS {TimerEnable }     ; [] |92| 
	.dwpsn	file "../TM4C129_self_test.c",line 95,column 5,is_stmt,isa 1
        MOVS      A2, #255              ; [DPU_3_PIPE] |95| 
        MOV       A1, V5                ; [DPU_3_PIPE] |95| 
$C$DW$88	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$88, DW_AT_low_pc(0x00)
	.dwattr $C$DW$88, DW_AT_name("TimerValueGet")
	.dwattr $C$DW$88, DW_AT_TI_call

        BL        TimerValueGet         ; [DPU_3_PIPE] |95| 
        ; CALL OCCURS {TimerValueGet }   ; [] |95| 
        MOV       V2, A1                ; [DPU_3_PIPE] |95| 
	.dwpsn	file "../TM4C129_self_test.c",line 96,column 5,is_stmt,isa 1
        MOVS      A2, #255              ; [DPU_3_PIPE] |96| 
        MOV       A1, V6                ; [DPU_3_PIPE] |96| 
$C$DW$89	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$89, DW_AT_low_pc(0x00)
	.dwattr $C$DW$89, DW_AT_name("TimerValueGet")
	.dwattr $C$DW$89, DW_AT_TI_call

        BL        TimerValueGet         ; [DPU_3_PIPE] |96| 
        ; CALL OCCURS {TimerValueGet }   ; [] |96| 
	.dwpsn	file "../TM4C129_self_test.c",line 101,column 14,is_stmt,isa 1
;----------------------------------------------------------------------
; 101 | } while ((piosc_stop_ticks - piosc_start_ticks) < PIOSC_FREQUENCY_HZ); 
;----------------------------------------------------------------------
        LDR       V3, $C$CON9           ; [DPU_3_PIPE] |101| 
	.dwpsn	file "../TM4C129_self_test.c",line 96,column 5,is_stmt,isa 1
        MOV       V4, A1                ; [DPU_3_PIPE] |96| 
;* --------------------------------------------------------------------------*
;*   BEGIN LOOP ||$C$L4||
;*
;*   Loop source line                : 97
;*   Loop closing brace source line  : 101
;*   Known Minimum Trip Count        : 1
;*   Known Maximum Trip Count        : 4294967295
;*   Known Max Trip Count Factor     : 1
;* --------------------------------------------------------------------------*
||$C$L4||:    
	.dwpsn	file "../TM4C129_self_test.c",line 99,column 9,is_stmt,isa 1
        MOV       A1, V5                ; [DPU_3_PIPE] |99| 
        MOVS      A2, #255              ; [DPU_3_PIPE] |99| 
$C$DW$90	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$90, DW_AT_low_pc(0x00)
	.dwattr $C$DW$90, DW_AT_name("TimerValueGet")
	.dwattr $C$DW$90, DW_AT_TI_call

        BL        TimerValueGet         ; [DPU_3_PIPE] |99| 
        ; CALL OCCURS {TimerValueGet }   ; [] |99| 
        MOV       V1, A1                ; [DPU_3_PIPE] |99| 
	.dwpsn	file "../TM4C129_self_test.c",line 100,column 9,is_stmt,isa 1
        MOVS      A2, #255              ; [DPU_3_PIPE] |100| 
        MOV       A1, V6                ; [DPU_3_PIPE] |100| 
$C$DW$91	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$91, DW_AT_low_pc(0x00)
	.dwattr $C$DW$91, DW_AT_name("TimerValueGet")
	.dwattr $C$DW$91, DW_AT_TI_call

        BL        TimerValueGet         ; [DPU_3_PIPE] |100| 
        ; CALL OCCURS {TimerValueGet }   ; [] |100| 
	.dwpsn	file "../TM4C129_self_test.c",line 101,column 14,is_stmt,isa 1
;----------------------------------------------------------------------
; 107 | const uint32_t sys_clock_ticks_per_sec = sys_clock_stop_ticks - sys_clo
;     | ck_start_ticks;                                                        
; 108 | #ifdef XTAL_SELECTION_FOR_WRONG_CLOCK                                  
; 109 | printf ("With XTAL selection 0x%x sys_clock_ticks_per_sec=%u\n", XTAL_S
;     | ELECTION_FOR_WRONG_CLOCK, sys_clock_ticks_per_sec);                    
; 110 | #else                                                                  
; 111 | const uint32_t lower_clock_ticks_per_sec = CLOCK_FREQUENCY_HZ * 0.99;  
; 112 | const uint32_t upper_clock_ticks_per_sec = CLOCK_FREQUENCY_HZ * 1.01;  
;----------------------------------------------------------------------
        SUBS      V1, V1, V2            ; [DPU_3_PIPE] |101| 
        CMP       V3, V1                ; [DPU_3_PIPE] |101| 
        BHI       ||$C$L4||             ; [DPU_3_PIPE] |101| 
        ; BRANCHCC OCCURS {||$C$L4||}    ; [] |101| 
;* --------------------------------------------------------------------------*
	.dwpsn	file "../TM4C129_self_test.c",line 113,column 5,is_stmt,isa 1
;----------------------------------------------------------------------
; 113 | assert ((sys_clock_ticks_per_sec >= lower_clock_ticks_per_sec) && (sys_
;     | clock_ticks_per_sec <= upper_clock_ticks_per_sec));                    
; 114 | #endif                                                                 
;----------------------------------------------------------------------
        LDR       A2, $C$CON10          ; [DPU_3_PIPE] |113| 
        SUBS      V1, A1, V4            ; [DPU_3_PIPE] |113| 
        ADR       V2, $C$SL2            ; [DPU_3_PIPE] |113| 
        CMP       A2, V1                ; [DPU_3_PIPE] |113| 
        BCC       ||$C$L5||             ; [DPU_3_PIPE] |113| 
        ; BRANCHCC OCCURS {||$C$L5||}    ; [] |113| 
;* --------------------------------------------------------------------------*
        MOV       A1, V2                ; [DPU_3_PIPE] |113| 
$C$DW$92	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$92, DW_AT_low_pc(0x00)
	.dwattr $C$DW$92, DW_AT_name("_abort_msg")
	.dwattr $C$DW$92, DW_AT_TI_call

        BL        _abort_msg            ; [DPU_3_PIPE] |113| 
        ; CALL OCCURS {_abort_msg }      ; [] |113| 
;* --------------------------------------------------------------------------*
||$C$L5||:    
        LDR       A1, $C$CON11          ; [DPU_3_PIPE] |113| 
        CMP       A1, V1                ; [DPU_3_PIPE] |113| 
        BCS       ||$C$L6||             ; [DPU_3_PIPE] |113| 
        ; BRANCHCC OCCURS {||$C$L6||}    ; [] |113| 
;* --------------------------------------------------------------------------*
        MOV       A1, V2                ; [DPU_3_PIPE] |113| 
$C$DW$93	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$93, DW_AT_low_pc(0x00)
	.dwattr $C$DW$93, DW_AT_name("_abort_msg")
	.dwattr $C$DW$93, DW_AT_TI_call

        BL        _abort_msg            ; [DPU_3_PIPE] |113| 
        ; CALL OCCURS {_abort_msg }      ; [] |113| 
;* --------------------------------------------------------------------------*
||$C$L6||:    
$C$DW$94	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$94, DW_AT_low_pc(0x00)
	.dwattr $C$DW$94, DW_AT_TI_return

        POP       {A4, V1, V2, V3, V4, V5, V6, PC} ; [DPU_3_PIPE] 
	.dwcfi	cfa_offset, 0
        ; BRANCH OCCURS                  ; [] 
	.dwattr $C$DW$64, DW_AT_TI_end_file("../TM4C129_self_test.c")
	.dwattr $C$DW$64, DW_AT_TI_end_line(0x73)
	.dwattr $C$DW$64, DW_AT_TI_end_column(0x01)
	.dwendentry
	.dwendtag $C$DW$64

	.sect	".text"
	.clink
	.thumbfunc write_ram_test_pattern
	.thumb

$C$DW$95	.dwtag  DW_TAG_subprogram
	.dwattr $C$DW$95, DW_AT_name("write_ram_test_pattern")
	.dwattr $C$DW$95, DW_AT_low_pc(write_ram_test_pattern)
	.dwattr $C$DW$95, DW_AT_high_pc(0x00)
	.dwattr $C$DW$95, DW_AT_TI_symbol_name("write_ram_test_pattern")
	.dwattr $C$DW$95, DW_AT_TI_begin_file("../TM4C129_self_test.c")
	.dwattr $C$DW$95, DW_AT_TI_begin_line(0x85)
	.dwattr $C$DW$95, DW_AT_TI_begin_column(0x0d)
	.dwattr $C$DW$95, DW_AT_decl_file("../TM4C129_self_test.c")
	.dwattr $C$DW$95, DW_AT_decl_line(0x85)
	.dwattr $C$DW$95, DW_AT_decl_column(0x0d)
	.dwattr $C$DW$95, DW_AT_TI_max_frame_size(0x08)
	.dwpsn	file "../TM4C129_self_test.c",line 134,column 1,is_stmt,address write_ram_test_pattern,isa 1

	.dwfde $C$DW$CIE, write_ram_test_pattern
;----------------------------------------------------------------------
; 133 | static void write_ram_test_pattern (void)                              
; 135 | uint32_t buffer_index;                                                 
;----------------------------------------------------------------------

;*****************************************************************************
;* FUNCTION NAME: write_ram_test_pattern                                     *
;*                                                                           *
;*   Regs Modified     : A1,A2,A3,A4,V1,SP,SR                                *
;*   Regs Used         : A1,A2,A3,A4,V1,SP,LR,SR                             *
;*   Local Frame Size  : 0 Args + 0 Auto + 8 Save = 8 byte                   *
;*****************************************************************************
write_ram_test_pattern:
;* --------------------------------------------------------------------------*
;* V1    assigned to $O$U10
;* A1    assigned to $O$L1
;* A2    assigned to seed
$C$DW$96	.dwtag  DW_TAG_variable
	.dwattr $C$DW$96, DW_AT_name("seed")
	.dwattr $C$DW$96, DW_AT_TI_symbol_name("seed")
	.dwattr $C$DW$96, DW_AT_type(*$C$DW$T$23)
	.dwattr $C$DW$96, DW_AT_location[DW_OP_reg1]

	.dwcfi	cfa_offset, 0
        PUSH      {V1, LR}              ; [DPU_3_PIPE] 
	.dwcfi	cfa_offset, 8
	.dwcfi	save_reg_to_mem, 14, -4
	.dwcfi	save_reg_to_mem, 4, -8
	.dwpsn	file "../TM4C129_self_test.c",line 136,column 19,is_stmt,isa 1
;----------------------------------------------------------------------
; 136 | uint32_t seed = ram_test_start_seed;                                   
; 138 | for (buffer_index = 0; buffer_index < RAM_BUFFER_TEST_SIZE_WORDS; buffe
;     | r_index++)                                                             
; 140 |     ram_test_buffer[buffer_index] = seed;                              
;----------------------------------------------------------------------
        LDR       A2, $C$CON12          ; [DPU_3_PIPE] |136| 
	.dwpsn	file "../TM4C129_self_test.c",line 141,column 9,is_stmt,isa 1
;----------------------------------------------------------------------
; 141 | seed = RAND_GENERATOR (seed);                                          
;----------------------------------------------------------------------
        LDR       A4, $C$CON14          ; [DPU_3_PIPE] |141| 
        LDR       A3, $C$CON15          ; [DPU_3_PIPE] |141| 
        LDR       V1, $C$CON13          ; [DPU_3_PIPE] 
	.dwpsn	file "../TM4C129_self_test.c",line 136,column 19,is_stmt,isa 1
        LDR       A2, [A2, #0]          ; [DPU_3_PIPE] |136| 
	.dwpsn	file "../TM4C129_self_test.c",line 138,column 28,is_stmt,isa 1
        MOV       A1, #58982            ; [DPU_3_PIPE] |138| 
;* --------------------------------------------------------------------------*
;*   BEGIN LOOP ||$C$L7||
;*
;*   Loop source line                : 138
;*   Loop closing brace source line  : 142
;*   Known Minimum Trip Count        : 58982
;*   Known Maximum Trip Count        : 58982
;*   Known Max Trip Count Factor     : 58982
;* --------------------------------------------------------------------------*
||$C$L7||:    
	.dwpsn	file "../TM4C129_self_test.c",line 140,column 9,is_stmt,isa 1
        STR       A2, [V1], #4          ; [DPU_3_PIPE] |140| 
	.dwpsn	file "../TM4C129_self_test.c",line 138,column 28,is_stmt,isa 1
        SUBS      A1, A1, #1            ; [DPU_3_PIPE] |138| 
	.dwpsn	file "../TM4C129_self_test.c",line 141,column 9,is_stmt,isa 1
        MLA       A2, A4, A2, A3        ; [DPU_3_PIPE] |141| 
	.dwpsn	file "../TM4C129_self_test.c",line 138,column 28,is_stmt,isa 1
        BNE       ||$C$L7||             ; [DPU_3_PIPE] |138| 
        ; BRANCHCC OCCURS {||$C$L7||}    ; [] |138| 
;* --------------------------------------------------------------------------*
$C$DW$97	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$97, DW_AT_low_pc(0x00)
	.dwattr $C$DW$97, DW_AT_TI_return

        POP       {V1, PC}              ; [DPU_3_PIPE] 
	.dwcfi	cfa_offset, 0
        ; BRANCH OCCURS                  ; [] 
	.dwattr $C$DW$95, DW_AT_TI_end_file("../TM4C129_self_test.c")
	.dwattr $C$DW$95, DW_AT_TI_end_line(0x8f)
	.dwattr $C$DW$95, DW_AT_TI_end_column(0x01)
	.dwendentry
	.dwendtag $C$DW$95

	.sect	".text"
	.clink
	.thumbfunc verify_crc_table
	.thumb

$C$DW$98	.dwtag  DW_TAG_subprogram
	.dwattr $C$DW$98, DW_AT_name("verify_crc_table")
	.dwattr $C$DW$98, DW_AT_low_pc(verify_crc_table)
	.dwattr $C$DW$98, DW_AT_high_pc(0x00)
	.dwattr $C$DW$98, DW_AT_TI_symbol_name("verify_crc_table")
	.dwattr $C$DW$98, DW_AT_TI_begin_file("../TM4C129_self_test.c")
	.dwattr $C$DW$98, DW_AT_TI_begin_line(0xa7)
	.dwattr $C$DW$98, DW_AT_TI_begin_column(0x0d)
	.dwattr $C$DW$98, DW_AT_decl_file("../TM4C129_self_test.c")
	.dwattr $C$DW$98, DW_AT_decl_line(0xa7)
	.dwattr $C$DW$98, DW_AT_decl_column(0x0d)
	.dwattr $C$DW$98, DW_AT_TI_max_frame_size(0x18)
	.dwpsn	file "../TM4C129_self_test.c",line 168,column 1,is_stmt,address verify_crc_table,isa 1

	.dwfde $C$DW$CIE, verify_crc_table
$C$DW$99	.dwtag  DW_TAG_formal_parameter
	.dwattr $C$DW$99, DW_AT_name("table")
	.dwattr $C$DW$99, DW_AT_TI_symbol_name("table")
	.dwattr $C$DW$99, DW_AT_type(*$C$DW$T$48)
	.dwattr $C$DW$99, DW_AT_location[DW_OP_reg0]

;----------------------------------------------------------------------
; 167 | static void verify_crc_table (const CRC_TABLE *const table)            
;----------------------------------------------------------------------

;*****************************************************************************
;* FUNCTION NAME: verify_crc_table                                           *
;*                                                                           *
;*   Regs Modified     : A1,A2,A3,A4,V1,V2,V3,V4,V5,V9,SP,LR,SR,D0,D0_hi,D1, *
;*                           D1_hi,D2,D2_hi,D3,D3_hi,D4,D4_hi,D5,D5_hi,D6,   *
;*                           D6_hi,D7,D7_hi,FPEXC,FPSCR                      *
;*   Regs Used         : A1,A2,A3,A4,V1,V2,V3,V4,V5,V9,SP,LR,SR,D0,D0_hi,D1, *
;*                           D1_hi,D2,D2_hi,D3,D3_hi,D4,D4_hi,D5,D5_hi,D6,   *
;*                           D6_hi,D7,D7_hi,FPEXC,FPSCR                      *
;*   Local Frame Size  : 0 Args + 0 Auto + 24 Save = 24 byte                 *
;*****************************************************************************
verify_crc_table:
;* --------------------------------------------------------------------------*
;* V1    assigned to $O$C1
;* V3    assigned to table
$C$DW$100	.dwtag  DW_TAG_variable
	.dwattr $C$DW$100, DW_AT_name("table")
	.dwattr $C$DW$100, DW_AT_TI_symbol_name("table")
	.dwattr $C$DW$100, DW_AT_type(*$C$DW$T$49)
	.dwattr $C$DW$100, DW_AT_location[DW_OP_reg6]

;* V2    assigned to rec_index
$C$DW$101	.dwtag  DW_TAG_variable
	.dwattr $C$DW$101, DW_AT_name("rec_index")
	.dwattr $C$DW$101, DW_AT_TI_symbol_name("rec_index")
	.dwattr $C$DW$101, DW_AT_type(*$C$DW$T$23)
	.dwattr $C$DW$101, DW_AT_location[DW_OP_reg5]

	.dwcfi	cfa_offset, 0
        PUSH      {V1, V2, V3, V4, V5, LR} ; [DPU_3_PIPE] 
	.dwcfi	cfa_offset, 24
	.dwcfi	save_reg_to_mem, 14, -4
	.dwcfi	save_reg_to_mem, 8, -8
	.dwcfi	save_reg_to_mem, 7, -12
	.dwcfi	save_reg_to_mem, 6, -16
	.dwcfi	save_reg_to_mem, 5, -20
	.dwcfi	save_reg_to_mem, 4, -24
;----------------------------------------------------------------------
; 169 | uint32_t rec_index;                                                    
; 170 | uint32_t actual_crc;                                                   
;----------------------------------------------------------------------
        MOV       V3, A1                ; [DPU_3_PIPE] |168| 
	.dwpsn	file "../TM4C129_self_test.c",line 172,column 10,is_stmt,isa 1
;----------------------------------------------------------------------
; 172 | for (rec_index = 0; rec_index < table->num_recs; rec_index++)          
; 174 |     assert (table->recs[rec_index].crc_alg_ID == CRC32_PRIME);         
; 175 |     CRCConfigSet (CCM0_BASE, CRC_CFG_INIT_0 | CRC_CFG_TYPE_P4C11DB7 | C
;     | RC_CFG_SIZE_8BIT);                                                     
; 176 |     actual_crc = CRCDataProcess (CCM0_BASE, (uint32_t *) table->recs[re
;     | c_index].addr,                                                         
; 177 |                                  table->recs[rec_index].size, false);  
;----------------------------------------------------------------------
        MOVS      V2, #0                ; [DPU_3_PIPE] |172| 
	.dwpsn	file "../TM4C129_self_test.c",line 178,column 9,is_stmt,isa 1
;----------------------------------------------------------------------
; 178 | assert (actual_crc == table->recs[rec_index].crc_value);               
;----------------------------------------------------------------------
        MOVS      V4, #0                ; [DPU_3_PIPE] |178| 
	.dwpsn	file "../TM4C129_self_test.c",line 172,column 10,is_stmt,isa 1
        B         ||$C$L11||            ; [DPU_3_PIPE] |172| 
        ; BRANCH OCCURS {||$C$L11||}     ; [] |172| 
;* --------------------------------------------------------------------------*
||$C$L8||:    
	.dwpsn	file "../TM4C129_self_test.c",line 174,column 9,is_stmt,isa 1
        LSLS      A1, V2, #3            ; [DPU_3_PIPE] |174| 
        ADD       A1, A1, V2, LSL #4    ; [DPU_3_PIPE] |174| 
        ADDS      V1, V3, A1            ; [DPU_3_PIPE] |174| 
        LDR       A1, [V1, #16]         ; [DPU_3_PIPE] |174| 
        CBZ       A1, ||$C$L9||         ; [] 
        ; BRANCHCC OCCURS {||$C$L9||}    ; [] |174| 
;* --------------------------------------------------------------------------*
        ADR       A1, $C$SL3            ; [DPU_3_PIPE] |174| 
$C$DW$102	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$102, DW_AT_low_pc(0x00)
	.dwattr $C$DW$102, DW_AT_name("_abort_msg")
	.dwattr $C$DW$102, DW_AT_TI_call

        BL        _abort_msg            ; [DPU_3_PIPE] |174| 
        ; CALL OCCURS {_abort_msg }      ; [] |174| 
;* --------------------------------------------------------------------------*
||$C$L9||:    
	.dwpsn	file "../TM4C129_self_test.c",line 176,column 9,is_stmt,isa 1
        LDR       V5, $C$CON16          ; [DPU_3_PIPE] |176| 
	.dwpsn	file "../TM4C129_self_test.c",line 175,column 9,is_stmt,isa 1
        MOV       A2, #20482            ; [DPU_3_PIPE] |175| 
        MOV       A1, V5                ; [DPU_3_PIPE] |175| 
$C$DW$103	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$103, DW_AT_low_pc(0x00)
	.dwattr $C$DW$103, DW_AT_name("CRCConfigSet")
	.dwattr $C$DW$103, DW_AT_TI_call

        BL        CRCConfigSet          ; [DPU_3_PIPE] |175| 
        ; CALL OCCURS {CRCConfigSet }    ; [] |175| 
	.dwpsn	file "../TM4C129_self_test.c",line 176,column 9,is_stmt,isa 1
        LDR       A2, [V1, #20]         ; [DPU_3_PIPE] |176| 
        LDR       A3, [V1, #24]         ; [DPU_3_PIPE] |176| 
        MOVS      A4, #0                ; [DPU_3_PIPE] |176| 
        MOV       A1, V5                ; [DPU_3_PIPE] |176| 
$C$DW$104	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$104, DW_AT_low_pc(0x00)
	.dwattr $C$DW$104, DW_AT_name("CRCDataProcess")
	.dwattr $C$DW$104, DW_AT_TI_call

        BL        CRCDataProcess        ; [DPU_3_PIPE] |176| 
        ; CALL OCCURS {CRCDataProcess }  ; [] |176| 
	.dwpsn	file "../TM4C129_self_test.c",line 178,column 9,is_stmt,isa 1
        ADDS      V1, V1, #8            ; [DPU_3_PIPE] |178| 
        LDMIA     V1, {A2,A3}           ; [DPU_3_PIPE] |178| 
        CMP       V4, A3                ; [DPU_3_PIPE] |178| 
        IT        EQ                    ; [DPU_3_PIPE] 
        CMPEQ     A1, A2                ; [DPU_3_PIPE] |178| 
        BEQ       ||$C$L10||            ; [DPU_3_PIPE] |178| 
        ; BRANCHCC OCCURS {||$C$L10||}   ; [] |178| 
;* --------------------------------------------------------------------------*
        ADR       A1, $C$SL4            ; [DPU_3_PIPE] |178| 
$C$DW$105	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$105, DW_AT_low_pc(0x00)
	.dwattr $C$DW$105, DW_AT_name("_abort_msg")
	.dwattr $C$DW$105, DW_AT_TI_call

        BL        _abort_msg            ; [DPU_3_PIPE] |178| 
        ; CALL OCCURS {_abort_msg }      ; [] |178| 
;* --------------------------------------------------------------------------*
||$C$L10||:    
	.dwpsn	file "../TM4C129_self_test.c",line 172,column 54,is_stmt,isa 1
        ADDS      V2, V2, #1            ; [DPU_3_PIPE] |172| 
;* --------------------------------------------------------------------------*
;*   BEGIN LOOP ||$C$L11||
;* --------------------------------------------------------------------------*
||$C$L11||:    
	.dwpsn	file "../TM4C129_self_test.c",line 172,column 25,is_stmt,isa 1
        LDR       A1, [V3, #4]          ; [DPU_3_PIPE] |172| 
        CMP       A1, V2                ; [DPU_3_PIPE] |172| 
        BHI       ||$C$L8||             ; [DPU_3_PIPE] |172| 
        ; BRANCHCC OCCURS {||$C$L8||}    ; [] |172| 
;* --------------------------------------------------------------------------*
$C$DW$106	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$106, DW_AT_low_pc(0x00)
	.dwattr $C$DW$106, DW_AT_TI_return

        POP       {V1, V2, V3, V4, V5, PC} ; [DPU_3_PIPE] 
	.dwcfi	cfa_offset, 0
        ; BRANCH OCCURS                  ; [] 
	.dwattr $C$DW$98, DW_AT_TI_end_file("../TM4C129_self_test.c")
	.dwattr $C$DW$98, DW_AT_TI_end_line(0xb4)
	.dwattr $C$DW$98, DW_AT_TI_end_column(0x01)
	.dwendentry
	.dwendtag $C$DW$98

;******************************************************************************
;* CONSTANT TABLE                                                             *
;******************************************************************************
	.sect	".text"
	.align	4
||$C$CON1||:	.bits	-268433396,32
	.align	4
||$C$CON2||:	.bits	1074151424,32
	.align	4
||$C$CON3||:	.bits	-251658224,32
	.align	4
||$C$CON4||:	.bits	120000000,32
	.align	4
||$C$CON5||:	.bits	-268434432,32
	.align	4
||$C$CON6||:	.bits	-268434431,32
	.sect	".text"
	.clink
	.thumbfunc verify_ram_test_pattern
	.thumb

$C$DW$107	.dwtag  DW_TAG_subprogram
	.dwattr $C$DW$107, DW_AT_name("verify_ram_test_pattern")
	.dwattr $C$DW$107, DW_AT_low_pc(verify_ram_test_pattern)
	.dwattr $C$DW$107, DW_AT_high_pc(0x00)
	.dwattr $C$DW$107, DW_AT_TI_symbol_name("verify_ram_test_pattern")
	.dwattr $C$DW$107, DW_AT_TI_begin_file("../TM4C129_self_test.c")
	.dwattr $C$DW$107, DW_AT_TI_begin_line(0x95)
	.dwattr $C$DW$107, DW_AT_TI_begin_column(0x0d)
	.dwattr $C$DW$107, DW_AT_decl_file("../TM4C129_self_test.c")
	.dwattr $C$DW$107, DW_AT_decl_line(0x95)
	.dwattr $C$DW$107, DW_AT_decl_column(0x0d)
	.dwattr $C$DW$107, DW_AT_TI_max_frame_size(0x20)
	.dwpsn	file "../TM4C129_self_test.c",line 150,column 1,is_stmt,address verify_ram_test_pattern,isa 1

	.dwfde $C$DW$CIE, verify_ram_test_pattern
;----------------------------------------------------------------------
; 149 | static void verify_ram_test_pattern (void)                             
; 151 | uint32_t buffer_index;                                                 
;----------------------------------------------------------------------

;*****************************************************************************
;* FUNCTION NAME: verify_ram_test_pattern                                    *
;*                                                                           *
;*   Regs Modified     : A1,A2,A3,A4,V1,V2,V3,V4,V5,V6,V9,SP,LR,SR,D0,D0_hi, *
;*                           D1,D1_hi,D2,D2_hi,D3,D3_hi,D4,D4_hi,D5,D5_hi,D6,*
;*                           D6_hi,D7,D7_hi,FPEXC,FPSCR                      *
;*   Regs Used         : A1,A2,A3,A4,V1,V2,V3,V4,V5,V6,V9,SP,LR,SR,D0,D0_hi, *
;*                           D1,D1_hi,D2,D2_hi,D3,D3_hi,D4,D4_hi,D5,D5_hi,D6,*
;*                           D6_hi,D7,D7_hi,FPEXC,FPSCR                      *
;*   Local Frame Size  : 0 Args + 0 Auto + 28 Save = 28 byte                 *
;*****************************************************************************
verify_ram_test_pattern:
;* --------------------------------------------------------------------------*
;* V6    assigned to $O$U10
;* A1    assigned to $O$K1
;* V2    assigned to $O$L1
;* V1    assigned to seed
$C$DW$108	.dwtag  DW_TAG_variable
	.dwattr $C$DW$108, DW_AT_name("seed")
	.dwattr $C$DW$108, DW_AT_TI_symbol_name("seed")
	.dwattr $C$DW$108, DW_AT_type(*$C$DW$T$23)
	.dwattr $C$DW$108, DW_AT_location[DW_OP_reg4]

	.dwcfi	cfa_offset, 0
        PUSH      {A4, V1, V2, V3, V4, V5, V6, LR} ; [DPU_3_PIPE] 
	.dwcfi	cfa_offset, 32
	.dwcfi	save_reg_to_mem, 14, -4
	.dwcfi	save_reg_to_mem, 9, -8
	.dwcfi	save_reg_to_mem, 8, -12
	.dwcfi	save_reg_to_mem, 7, -16
	.dwcfi	save_reg_to_mem, 6, -20
	.dwcfi	save_reg_to_mem, 5, -24
	.dwcfi	save_reg_to_mem, 4, -28
	.dwcfi	save_reg_to_mem, 3, -32
	.dwpsn	file "../TM4C129_self_test.c",line 152,column 19,is_stmt,isa 1
;----------------------------------------------------------------------
; 152 | uint32_t seed = ram_test_start_seed;                                   
;----------------------------------------------------------------------
        LDR       V5, $C$CON12          ; [DPU_3_PIPE] |152| 
	.dwpsn	file "../TM4C129_self_test.c",line 154,column 28,is_stmt,isa 1
;----------------------------------------------------------------------
; 154 | for (buffer_index = 0; buffer_index < RAM_BUFFER_TEST_SIZE_WORDS; buffe
;     | r_index++)                                                             
; 156 |     assert (ram_test_buffer[buffer_index] == seed);                    
;----------------------------------------------------------------------
        MOV       V2, #58982            ; [DPU_3_PIPE] |154| 
        LDR       V6, $C$CON13          ; [DPU_3_PIPE] 
	.dwpsn	file "../TM4C129_self_test.c",line 157,column 9,is_stmt,isa 1
;----------------------------------------------------------------------
; 157 | seed = RAND_GENERATOR (seed);                                          
;----------------------------------------------------------------------
        LDR       V4, $C$CON14          ; [DPU_3_PIPE] |157| 
        LDR       V3, $C$CON15          ; [DPU_3_PIPE] |157| 
	.dwpsn	file "../TM4C129_self_test.c",line 152,column 19,is_stmt,isa 1
        LDR       V1, [V5, #0]          ; [DPU_3_PIPE] |152| 
;* --------------------------------------------------------------------------*
;*   BEGIN LOOP ||$C$L12||
;*
;*   Loop source line                : 154
;*   Loop closing brace source line  : 158
;*   Known Minimum Trip Count        : 58982
;*   Known Maximum Trip Count        : 58982
;*   Known Max Trip Count Factor     : 58982
;* --------------------------------------------------------------------------*
||$C$L12||:    
	.dwpsn	file "../TM4C129_self_test.c",line 156,column 9,is_stmt,isa 1
        LDR       A1, [V6], #4          ; [DPU_3_PIPE] |156| 
        CMP       V1, A1                ; [DPU_3_PIPE] |156| 
        BEQ       ||$C$L13||            ; [DPU_3_PIPE] |156| 
        ; BRANCHCC OCCURS {||$C$L13||}   ; [] |156| 
;* --------------------------------------------------------------------------*
        ADR       A1, $C$SL5            ; [DPU_3_PIPE] |156| 
$C$DW$109	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$109, DW_AT_low_pc(0x00)
	.dwattr $C$DW$109, DW_AT_name("_abort_msg")
	.dwattr $C$DW$109, DW_AT_TI_call

        BL        _abort_msg            ; [DPU_3_PIPE] |156| 
        ; CALL OCCURS {_abort_msg }      ; [] |156| 
;* --------------------------------------------------------------------------*
||$C$L13||:    
	.dwpsn	file "../TM4C129_self_test.c",line 154,column 28,is_stmt,isa 1
        SUBS      V2, V2, #1            ; [DPU_3_PIPE] |154| 
	.dwpsn	file "../TM4C129_self_test.c",line 157,column 9,is_stmt,isa 1
        MLA       V1, V4, V1, V3        ; [DPU_3_PIPE] |157| 
	.dwpsn	file "../TM4C129_self_test.c",line 154,column 28,is_stmt,isa 1
        BNE       ||$C$L12||            ; [DPU_3_PIPE] |154| 
        ; BRANCHCC OCCURS {||$C$L12||}   ; [] |154| 
;* --------------------------------------------------------------------------*
        MOV       A1, V5                ; [DPU_3_PIPE] 
	.dwpsn	file "../TM4C129_self_test.c",line 160,column 5,is_stmt,isa 1
;----------------------------------------------------------------------
; 160 | ram_test_start_seed = seed;                                            
;----------------------------------------------------------------------
        STR       V1, [A1, #0]          ; [DPU_3_PIPE] |160| 
$C$DW$110	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$110, DW_AT_low_pc(0x00)
	.dwattr $C$DW$110, DW_AT_TI_return

        POP       {A4, V1, V2, V3, V4, V5, V6, PC} ; [DPU_3_PIPE] 
	.dwcfi	cfa_offset, 0
        ; BRANCH OCCURS                  ; [] 
	.dwattr $C$DW$107, DW_AT_TI_end_file("../TM4C129_self_test.c")
	.dwattr $C$DW$107, DW_AT_TI_end_line(0xa1)
	.dwattr $C$DW$107, DW_AT_TI_end_column(0x01)
	.dwendentry
	.dwendtag $C$DW$107

;******************************************************************************
;* CONSTANT TABLE                                                             *
;******************************************************************************
	.sect	".text"
	.align	4
||$C$CON7||:	.bits	1073938432,32
	.align	4
||$C$CON9||:	.bits	16000000,32
	.align	4
||$C$CON10||:	.bits	118799999,32
	.align	4
||$C$CON11||:	.bits	121200000,32
	.align	4
||$C$CON12||:	.bits	ram_test_start_seed,32
	.align	4
||$C$CON13||:	.bits	ram_test_buffer,32
	.align	4
||$C$CON14||:	.bits	1664525,32
	.align	4
||$C$CON15||:	.bits	1013904223,32
	.sect	".text"
	.clink
	.thumbfunc main
	.thumb
	.global	main

$C$DW$111	.dwtag  DW_TAG_subprogram
	.dwattr $C$DW$111, DW_AT_name("main")
	.dwattr $C$DW$111, DW_AT_low_pc(main)
	.dwattr $C$DW$111, DW_AT_high_pc(0x00)
	.dwattr $C$DW$111, DW_AT_TI_symbol_name("main")
	.dwattr $C$DW$111, DW_AT_external
	.dwattr $C$DW$111, DW_AT_type(*$C$DW$T$10)
	.dwattr $C$DW$111, DW_AT_TI_begin_file("../TM4C129_self_test.c")
	.dwattr $C$DW$111, DW_AT_TI_begin_line(0xc5)
	.dwattr $C$DW$111, DW_AT_TI_begin_column(0x05)
	.dwattr $C$DW$111, DW_AT_decl_file("../TM4C129_self_test.c")
	.dwattr $C$DW$111, DW_AT_decl_line(0xc5)
	.dwattr $C$DW$111, DW_AT_decl_column(0x05)
	.dwattr $C$DW$111, DW_AT_TI_max_frame_size(0x28)
	.dwpsn	file "../TM4C129_self_test.c",line 198,column 1,is_stmt,address main,isa 1

	.dwfde $C$DW$CIE, main
;----------------------------------------------------------------------
; 197 | int main(void)                                                         
; 199 | uint32_t num_test_iterations = 0;                                      
; 200 | uint32_t num_progress_reports = 0;                                     
; 201 | uint32_t now;                                                          
; 202 | uint32_t tick_of_last_led_toggle;                                      
; 203 | uint32_t tick_of_last_progress_report;                                 
; 211 | const uint32_t ticks_between_led_toggles = PIOSC_FREQUENCY_HZ / 2;     
; 212 | const uint32_t ticks_between_progress_reports = PIOSC_FREQUENCY_HZ * 60
;     | ;                                                                      
;----------------------------------------------------------------------

;*****************************************************************************
;* FUNCTION NAME: main                                                       *
;*                                                                           *
;*   Regs Modified     : A1,A2,A3,A4,V1,V2,V3,V4,V5,V6,V7,V8,V9,SP,LR,SR,D0, *
;*                           D0_hi,D1,D1_hi,D2,D2_hi,D3,D3_hi,D4,D4_hi,D5,   *
;*                           D5_hi,D6,D6_hi,D7,D7_hi,FPEXC,FPSCR             *
;*   Regs Used         : A1,A2,A3,A4,V1,V2,V3,V4,V5,V6,V7,V8,V9,SP,LR,SR,D0, *
;*                           D0_hi,D1,D1_hi,D2,D2_hi,D3,D3_hi,D4,D4_hi,D5,   *
;*                           D5_hi,D6,D6_hi,D7,D7_hi,FPEXC,FPSCR             *
;*   Local Frame Size  : 0 Args + 0 Auto + 36 Save = 36 byte                 *
;*****************************************************************************
main:
;* --------------------------------------------------------------------------*
;* V1    assigned to $O$C1
;* V1    assigned to now
$C$DW$112	.dwtag  DW_TAG_variable
	.dwattr $C$DW$112, DW_AT_name("now")
	.dwattr $C$DW$112, DW_AT_TI_symbol_name("now")
	.dwattr $C$DW$112, DW_AT_type(*$C$DW$T$23)
	.dwattr $C$DW$112, DW_AT_location[DW_OP_reg4]

;* V4    assigned to num_test_iterations
$C$DW$113	.dwtag  DW_TAG_variable
	.dwattr $C$DW$113, DW_AT_name("num_test_iterations")
	.dwattr $C$DW$113, DW_AT_TI_symbol_name("num_test_iterations")
	.dwattr $C$DW$113, DW_AT_type(*$C$DW$T$23)
	.dwattr $C$DW$113, DW_AT_location[DW_OP_reg7]

;* V7    assigned to num_progress_reports
$C$DW$114	.dwtag  DW_TAG_variable
	.dwattr $C$DW$114, DW_AT_name("num_progress_reports")
	.dwattr $C$DW$114, DW_AT_TI_symbol_name("num_progress_reports")
	.dwattr $C$DW$114, DW_AT_type(*$C$DW$T$23)
	.dwattr $C$DW$114, DW_AT_location[DW_OP_reg10]

;* V2    assigned to tick_of_last_led_toggle
$C$DW$115	.dwtag  DW_TAG_variable
	.dwattr $C$DW$115, DW_AT_name("tick_of_last_led_toggle")
	.dwattr $C$DW$115, DW_AT_TI_symbol_name("tick_of_last_led_toggle")
	.dwattr $C$DW$115, DW_AT_type(*$C$DW$T$23)
	.dwattr $C$DW$115, DW_AT_location[DW_OP_reg5]

;* V3    assigned to tick_of_last_progress_report
$C$DW$116	.dwtag  DW_TAG_variable
	.dwattr $C$DW$116, DW_AT_name("tick_of_last_progress_report")
	.dwattr $C$DW$116, DW_AT_TI_symbol_name("tick_of_last_progress_report")
	.dwattr $C$DW$116, DW_AT_type(*$C$DW$T$23)
	.dwattr $C$DW$116, DW_AT_location[DW_OP_reg6]

	.dwcfi	cfa_offset, 0
        PUSH      {A4, V1, V2, V3, V4, V5, V6, V7, V8, LR} ; [DPU_3_PIPE] 
	.dwcfi	cfa_offset, 40
	.dwcfi	save_reg_to_mem, 14, -4
	.dwcfi	save_reg_to_mem, 11, -8
	.dwcfi	save_reg_to_mem, 10, -12
	.dwcfi	save_reg_to_mem, 9, -16
	.dwcfi	save_reg_to_mem, 8, -20
	.dwcfi	save_reg_to_mem, 7, -24
	.dwcfi	save_reg_to_mem, 6, -28
	.dwcfi	save_reg_to_mem, 5, -32
	.dwcfi	save_reg_to_mem, 4, -36
	.dwcfi	save_reg_to_mem, 3, -40
	.dwpsn	file "../TM4C129_self_test.c",line 214,column 5,is_stmt,isa 1
;----------------------------------------------------------------------
; 214 | initialise_progress_led ();                                            
;----------------------------------------------------------------------
$C$DW$117	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$117, DW_AT_low_pc(0x00)
	.dwattr $C$DW$117, DW_AT_name("initialise_progress_led")
	.dwattr $C$DW$117, DW_AT_TI_call

        BL        initialise_progress_led ; [DPU_3_PIPE] |214| 
        ; CALL OCCURS {initialise_progress_led }  ; [] |214| 
	.dwpsn	file "../TM4C129_self_test.c",line 215,column 5,is_stmt,isa 1
;----------------------------------------------------------------------
; 215 | initialise_clock ();                                                   
; 216 | SysCtlPeripheralEnable(SYSCTL_PERIPH_CCM0);                            
;----------------------------------------------------------------------
$C$DW$118	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$118, DW_AT_low_pc(0x00)
	.dwattr $C$DW$118, DW_AT_name("initialise_clock")
	.dwattr $C$DW$118, DW_AT_TI_call

        BL        initialise_clock      ; [DPU_3_PIPE] |215| 
        ; CALL OCCURS {initialise_clock }  ; [] |215| 
	.dwpsn	file "../TM4C129_self_test.c",line 217,column 11,is_stmt,isa 1
;----------------------------------------------------------------------
; 217 | while(!SysCtlPeripheralReady(SYSCTL_PERIPH_CCM0))                      
;----------------------------------------------------------------------
        LDR       V1, $C$CON17          ; [DPU_3_PIPE] |217| 
	.dwpsn	file "../TM4C129_self_test.c",line 216,column 5,is_stmt,isa 1
        MOV       A1, V1                ; [DPU_3_PIPE] |216| 
$C$DW$119	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$119, DW_AT_low_pc(0x00)
	.dwattr $C$DW$119, DW_AT_name("SysCtlPeripheralEnable")
	.dwattr $C$DW$119, DW_AT_TI_call

        BL        SysCtlPeripheralEnable ; [DPU_3_PIPE] |216| 
        ; CALL OCCURS {SysCtlPeripheralEnable }  ; [] |216| 
;* --------------------------------------------------------------------------*
;*   BEGIN LOOP ||$C$L14||
;*
;*   Loop source line                : 217
;*   Loop closing brace source line  : 219
;*   Known Minimum Trip Count        : 1
;*   Known Maximum Trip Count        : 4294967295
;*   Known Max Trip Count Factor     : 1
;* --------------------------------------------------------------------------*
||$C$L14||:    
	.dwpsn	file "../TM4C129_self_test.c",line 217,column 11,is_stmt,isa 1
;----------------------------------------------------------------------
; 221 | now = TimerValueGet (TIMER1_BASE, TIMER_A);                            
; 222 | tick_of_last_led_toggle = now;                                         
; 223 | tick_of_last_progress_report = now;                                    
; 224 | for (;;)                                                               
; 229 |     write_ram_test_pattern ();                                         
; 230 |     verify_crc_table (&intvecs_crc_table);                             
; 231 |     verify_crc_table (&text_crc_table);                                
; 232 |     verify_crc_table (&const_crc_table);                               
; 233 |     verify_flash_contant_data ();                                      
; 234 |     verify_ram_test_pattern ();                                        
; 235 |     num_test_iterations++;                                             
;----------------------------------------------------------------------
        MOV       A1, V1                ; [DPU_3_PIPE] |217| 
$C$DW$120	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$120, DW_AT_low_pc(0x00)
	.dwattr $C$DW$120, DW_AT_name("SysCtlPeripheralReady")
	.dwattr $C$DW$120, DW_AT_TI_call

        BL        SysCtlPeripheralReady ; [DPU_3_PIPE] |217| 
        ; CALL OCCURS {SysCtlPeripheralReady }  ; [] |217| 
        CMP       A1, #0                ; [DPU_3_PIPE] |217| 
        BEQ       ||$C$L14||            ; [DPU_3_PIPE] |217| 
        ; BRANCHCC OCCURS {||$C$L14||}   ; [] |217| 
;* --------------------------------------------------------------------------*
	.dwpsn	file "../TM4C129_self_test.c",line 238,column 9,is_stmt,isa 1
;----------------------------------------------------------------------
; 238 | now = TimerValueGet (TIMER1_BASE, TIMER_A);                            
;----------------------------------------------------------------------
        LDR       A1, $C$CON8           ; [DPU_3_PIPE] |238| 
	.dwpsn	file "../TM4C129_self_test.c",line 221,column 5,is_stmt,isa 1
        MOVS      A2, #255              ; [DPU_3_PIPE] |221| 
$C$DW$121	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$121, DW_AT_low_pc(0x00)
	.dwattr $C$DW$121, DW_AT_name("TimerValueGet")
	.dwattr $C$DW$121, DW_AT_TI_call

        BL        TimerValueGet         ; [DPU_3_PIPE] |221| 
        ; CALL OCCURS {TimerValueGet }   ; [] |221| 
	.dwpsn	file "../TM4C129_self_test.c",line 239,column 9,is_stmt,isa 1
;----------------------------------------------------------------------
; 239 | if ((now - tick_of_last_led_toggle) > ticks_between_led_toggles)       
; 241 |     GPIOPinWrite (PROGRESS_LED_PORT, PROGRESS_LED_PIN,                 
; 242 |                   PROGRESS_LED_PIN ^ GPIOPinRead (PROGRESS_LED_PORT, PR
;     | OGRESS_LED_PIN));                                                      
; 243 |     tick_of_last_led_toggle += ticks_between_led_toggles;              
; 246 | if ((now - tick_of_last_progress_report) > ticks_between_progress_repor
;     | ts)                                                                    
; 248 |     num_progress_reports++;                                            
; 249 |     printf ("After %u minutes performed %u test iterations\n", num_prog
;     | ress_reports, num_test_iterations);                                    
;----------------------------------------------------------------------
        LDR       V6, $C$CON21          ; [DPU_3_PIPE] |239| 
	.dwpsn	file "../TM4C129_self_test.c",line 250,column 13,is_stmt,isa 1
;----------------------------------------------------------------------
; 250 | tick_of_last_progress_report += ticks_between_progress_reports;        
;----------------------------------------------------------------------
        LDR       V5, $C$CON22          ; [DPU_3_PIPE] |250| 
	.dwpsn	file "../TM4C129_self_test.c",line 199,column 34,is_stmt,isa 1
        MOVS      V4, #0                ; [DPU_3_PIPE] |199| 
        MOV       V7, V4                ; [DPU_3_PIPE] |199| 
	.dwpsn	file "../TM4C129_self_test.c",line 221,column 5,is_stmt,isa 1
        MOV       V2, A1                ; [DPU_3_PIPE] |221| 
	.dwpsn	file "../TM4C129_self_test.c",line 199,column 34,is_stmt,isa 1
        MOV       V3, A1                ; [DPU_3_PIPE] |199| 
;* --------------------------------------------------------------------------*
;*   BEGIN LOOP ||$C$L15||
;*
;*   Loop source line                : 224
;*   Loop closing brace source line  : 252
;*   Known Minimum Trip Count        : 1
;*   Known Maximum Trip Count        : 4294967295
;*   Known Max Trip Count Factor     : 1
;* --------------------------------------------------------------------------*
||$C$L15||:    
	.dwpsn	file "../TM4C129_self_test.c",line 229,column 9,is_stmt,isa 1
$C$DW$122	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$122, DW_AT_low_pc(0x00)
	.dwattr $C$DW$122, DW_AT_name("write_ram_test_pattern")
	.dwattr $C$DW$122, DW_AT_TI_call

        BL        write_ram_test_pattern ; [DPU_3_PIPE] |229| 
        ; CALL OCCURS {write_ram_test_pattern }  ; [] |229| 
	.dwpsn	file "../TM4C129_self_test.c",line 230,column 9,is_stmt,isa 1
        LDR       A1, $C$CON18          ; [DPU_3_PIPE] |230| 
$C$DW$123	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$123, DW_AT_low_pc(0x00)
	.dwattr $C$DW$123, DW_AT_name("verify_crc_table")
	.dwattr $C$DW$123, DW_AT_TI_call

        BL        verify_crc_table      ; [DPU_3_PIPE] |230| 
        ; CALL OCCURS {verify_crc_table }  ; [] |230| 
	.dwpsn	file "../TM4C129_self_test.c",line 231,column 9,is_stmt,isa 1
        LDR       A1, $C$CON19          ; [DPU_3_PIPE] |231| 
$C$DW$124	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$124, DW_AT_low_pc(0x00)
	.dwattr $C$DW$124, DW_AT_name("verify_crc_table")
	.dwattr $C$DW$124, DW_AT_TI_call

        BL        verify_crc_table      ; [DPU_3_PIPE] |231| 
        ; CALL OCCURS {verify_crc_table }  ; [] |231| 
	.dwpsn	file "../TM4C129_self_test.c",line 232,column 9,is_stmt,isa 1
        LDR       A1, $C$CON20          ; [DPU_3_PIPE] |232| 
$C$DW$125	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$125, DW_AT_low_pc(0x00)
	.dwattr $C$DW$125, DW_AT_name("verify_crc_table")
	.dwattr $C$DW$125, DW_AT_TI_call

        BL        verify_crc_table      ; [DPU_3_PIPE] |232| 
        ; CALL OCCURS {verify_crc_table }  ; [] |232| 
	.dwpsn	file "../TM4C129_self_test.c",line 234,column 9,is_stmt,isa 1
$C$DW$126	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$126, DW_AT_low_pc(0x00)
	.dwattr $C$DW$126, DW_AT_name("verify_ram_test_pattern")
	.dwattr $C$DW$126, DW_AT_TI_call

        BL        verify_ram_test_pattern ; [DPU_3_PIPE] |234| 
        ; CALL OCCURS {verify_ram_test_pattern }  ; [] |234| 
	.dwpsn	file "../TM4C129_self_test.c",line 238,column 9,is_stmt,isa 1
        LDR       A1, $C$CON8           ; [DPU_3_PIPE] |238| 
        MOVS      A2, #255              ; [DPU_3_PIPE] |238| 
$C$DW$127	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$127, DW_AT_low_pc(0x00)
	.dwattr $C$DW$127, DW_AT_name("TimerValueGet")
	.dwattr $C$DW$127, DW_AT_TI_call

        BL        TimerValueGet         ; [DPU_3_PIPE] |238| 
        ; CALL OCCURS {TimerValueGet }   ; [] |238| 
        MOV       V1, A1                ; [DPU_3_PIPE] |238| 
	.dwpsn	file "../TM4C129_self_test.c",line 239,column 9,is_stmt,isa 1
        SUBS      A1, V1, V2            ; [DPU_3_PIPE] |239| 
        CMP       V6, A1                ; [DPU_3_PIPE] |239| 
        BCS       ||$C$L16||            ; [DPU_3_PIPE] |239| 
        ; BRANCHCC OCCURS {||$C$L16||}   ; [] |239| 
;* --------------------------------------------------------------------------*
	.dwpsn	file "../TM4C129_self_test.c",line 241,column 13,is_stmt,isa 1
        LDR       V8, $C$CON23          ; [DPU_3_PIPE] |241| 
        MOVS      A2, #1                ; [DPU_3_PIPE] |241| 
        MOV       A1, V8                ; [DPU_3_PIPE] |241| 
$C$DW$128	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$128, DW_AT_low_pc(0x00)
	.dwattr $C$DW$128, DW_AT_name("GPIOPinRead")
	.dwattr $C$DW$128, DW_AT_TI_call

        BL        GPIOPinRead           ; [DPU_3_PIPE] |241| 
        ; CALL OCCURS {GPIOPinRead }     ; [] |241| 
        EOR       A1, A1, #1            ; [DPU_3_PIPE] |241| 
        MOVS      A2, #1                ; [DPU_3_PIPE] |241| 
        UXTB      A3, A1                ; [DPU_3_PIPE] |241| 
        MOV       A1, V8                ; [DPU_3_PIPE] |241| 
$C$DW$129	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$129, DW_AT_low_pc(0x00)
	.dwattr $C$DW$129, DW_AT_name("GPIOPinWrite")
	.dwattr $C$DW$129, DW_AT_TI_call

        BL        GPIOPinWrite          ; [DPU_3_PIPE] |241| 
        ; CALL OCCURS {GPIOPinWrite }    ; [] |241| 
	.dwpsn	file "../TM4C129_self_test.c",line 243,column 13,is_stmt,isa 1
        ADD       V2, V6, V2            ; [DPU_3_PIPE] |243| 
;* --------------------------------------------------------------------------*
||$C$L16||:    
	.dwpsn	file "../TM4C129_self_test.c",line 246,column 9,is_stmt,isa 1
        SUBS      V1, V1, V3            ; [DPU_3_PIPE] |246| 
	.dwpsn	file "../TM4C129_self_test.c",line 235,column 9,is_stmt,isa 1
        ADDS      V4, V4, #1            ; [DPU_3_PIPE] |235| 
	.dwpsn	file "../TM4C129_self_test.c",line 246,column 9,is_stmt,isa 1
        CMP       V5, V1                ; [DPU_3_PIPE] |246| 
        BCS       ||$C$L15||            ; [DPU_3_PIPE] |246| 
        ; BRANCHCC OCCURS {||$C$L15||}   ; [] |246| 
;* --------------------------------------------------------------------------*
	.dwpsn	file "../TM4C129_self_test.c",line 249,column 13,is_stmt,isa 1
        ADD       V1, V7, #1            ; [DPU_3_PIPE] |249| 
        ADR       A1, $C$SL6            ; [DPU_3_PIPE] |249| 
        MOV       A3, V4                ; [DPU_3_PIPE] |249| 
        MOV       A2, V1                ; [DPU_3_PIPE] |249| 
$C$DW$130	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$130, DW_AT_low_pc(0x00)
	.dwattr $C$DW$130, DW_AT_name("printf")
	.dwattr $C$DW$130, DW_AT_TI_call

        BL        printf                ; [DPU_3_PIPE] |249| 
        ; CALL OCCURS {printf }          ; [] |249| 
	.dwpsn	file "../TM4C129_self_test.c",line 250,column 13,is_stmt,isa 1
        ADD       V3, V5, V3            ; [DPU_3_PIPE] |250| 
	.dwpsn	file "../TM4C129_self_test.c",line 248,column 13,is_stmt,isa 1
        MOV       V7, V1                ; [DPU_3_PIPE] |248| 
	.dwpsn	file "../TM4C129_self_test.c",line 250,column 13,is_stmt,isa 1
        B         ||$C$L15||            ; [DPU_3_PIPE] |250| 
        ; BRANCH OCCURS {||$C$L15||}     ; [] |250| 
;* --------------------------------------------------------------------------*
;******************************************************************************
;* CONSTANT TABLE                                                             *
;******************************************************************************
	.sect	".text"
	.align	4
||$C$CON8||:	.bits	1073942528,32
	.dwattr $C$DW$111, DW_AT_TI_end_file("../TM4C129_self_test.c")
	.dwattr $C$DW$111, DW_AT_TI_end_line(0xfd)
	.dwattr $C$DW$111, DW_AT_TI_end_column(0x01)
	.dwendentry
	.dwendtag $C$DW$111

;******************************************************************************
;* STRINGS                                                                    *
;******************************************************************************
	.sect	".text"
	.align	4
||$C$SL1||:	.string	"Assertion failed, (reported_frequency == 120000000), file ."
	.string	"./TM4C129_self_test.c, line 70",10,0
	.align	4
||$C$SL2||:	.string	"Assertion failed, ((sys_clock_ticks_per_sec >= lower_clock_"
	.string	"ticks_per_sec) && (sys_clock_ticks_per_sec <= upper_clock_t"
	.string	"icks_per_sec)), file ../TM4C129_self_test.c, line 113",10,0
	.align	4
||$C$SL3||:	.string	"Assertion failed, (table->recs[rec_index].crc_alg_ID == 0),"
	.string	" file ../TM4C129_self_test.c, line 174",10,0
	.align	4
||$C$SL4||:	.string	"Assertion failed, (actual_crc == table->recs[rec_index].crc"
	.string	"_value), file ../TM4C129_self_test.c, line 178",10,0
	.align	4
||$C$SL5||:	.string	"Assertion failed, (ram_test_buffer[buffer_index] == seed), "
	.string	"file ../TM4C129_self_test.c, line 156",10,0
	.align	4
||$C$SL6||:	.string	"After %u minutes performed %u test iterations",10,0
;******************************************************************************
;* CONSTANT TABLE                                                             *
;******************************************************************************
	.sect	".text"
	.align	4
||$C$CON16||:	.bits	1141047296,32
	.align	4
||$C$CON17||:	.bits	-268405760,32
	.align	4
||$C$CON18||:	.bits	intvecs_crc_table,32
	.align	4
||$C$CON19||:	.bits	text_crc_table,32
	.align	4
||$C$CON20||:	.bits	const_crc_table,32
	.align	4
||$C$CON21||:	.bits	8000000,32
	.align	4
||$C$CON22||:	.bits	960000000,32
	.align	4
||$C$CON23||:	.bits	1074151424,32
;*****************************************************************************
;* UNDEFINED EXTERNAL REFERENCES                                             *
;*****************************************************************************
	.global	printf
	.global	SysCtlPeripheralReady
	.global	SysCtlPeripheralReset
	.global	SysCtlPeripheralEnable
	.global	SysCtlPeripheralDisable
	.global	SysCtlClockFreqSet
	.global	TimerEnable
	.global	TimerConfigure
	.global	TimerLoadSet
	.global	TimerValueGet
	.global	TimerClockSourceSet
	.global	GPIOPinRead
	.global	GPIOPinWrite
	.global	GPIOPinTypeGPIOOutput
	.global	CRCConfigSet
	.global	CRCDataProcess
	.global	intvecs_crc_table
	.global	text_crc_table
	.global	const_crc_table
	.global	_abort_msg

;******************************************************************************
;* BUILD ATTRIBUTES                                                           *
;******************************************************************************
	.battr "aeabi", Tag_File, 1, Tag_ABI_PCS_wchar_t(2)
	.battr "aeabi", Tag_File, 1, Tag_ABI_FP_rounding(0)
	.battr "aeabi", Tag_File, 1, Tag_ABI_FP_denormal(0)
	.battr "aeabi", Tag_File, 1, Tag_ABI_FP_exceptions(0)
	.battr "aeabi", Tag_File, 1, Tag_ABI_FP_number_model(1)
	.battr "aeabi", Tag_File, 1, Tag_ABI_enum_size(0)
	.battr "aeabi", Tag_File, 1, Tag_ABI_optimization_goals(4)
	.battr "aeabi", Tag_File, 1, Tag_ABI_FP_optimization_goals(0)
	.battr "TI", Tag_File, 1, Tag_Bitfield_layout(2)
	.battr "aeabi", Tag_File, 1, Tag_ABI_VFP_args(3)
	.battr "TI", Tag_File, 1, Tag_FP_interface(1)

;******************************************************************************
;* TYPE INFORMATION                                                           *
;******************************************************************************

$C$DW$T$20	.dwtag  DW_TAG_structure_type
	.dwattr $C$DW$T$20, DW_AT_byte_size(0x18)
$C$DW$131	.dwtag  DW_TAG_member
	.dwattr $C$DW$131, DW_AT_type(*$C$DW$T$10)
	.dwattr $C$DW$131, DW_AT_name("fd")
	.dwattr $C$DW$131, DW_AT_TI_symbol_name("fd")
	.dwattr $C$DW$131, DW_AT_data_member_location[DW_OP_plus_uconst 0x0]
	.dwattr $C$DW$131, DW_AT_accessibility(DW_ACCESS_public)
	.dwattr $C$DW$131, DW_AT_decl_file("C:/ti_ccs7_1_0/ccsv7/tools/compiler/ti-cgt-arm_16.9.2.LTS/include/stdio.h")
	.dwattr $C$DW$131, DW_AT_decl_line(0x5c)
	.dwattr $C$DW$131, DW_AT_decl_column(0x0b)

$C$DW$132	.dwtag  DW_TAG_member
	.dwattr $C$DW$132, DW_AT_type(*$C$DW$T$19)
	.dwattr $C$DW$132, DW_AT_name("buf")
	.dwattr $C$DW$132, DW_AT_TI_symbol_name("buf")
	.dwattr $C$DW$132, DW_AT_data_member_location[DW_OP_plus_uconst 0x4]
	.dwattr $C$DW$132, DW_AT_accessibility(DW_ACCESS_public)
	.dwattr $C$DW$132, DW_AT_decl_file("C:/ti_ccs7_1_0/ccsv7/tools/compiler/ti-cgt-arm_16.9.2.LTS/include/stdio.h")
	.dwattr $C$DW$132, DW_AT_decl_line(0x5d)
	.dwattr $C$DW$132, DW_AT_decl_column(0x16)

$C$DW$133	.dwtag  DW_TAG_member
	.dwattr $C$DW$133, DW_AT_type(*$C$DW$T$19)
	.dwattr $C$DW$133, DW_AT_name("pos")
	.dwattr $C$DW$133, DW_AT_TI_symbol_name("pos")
	.dwattr $C$DW$133, DW_AT_data_member_location[DW_OP_plus_uconst 0x8]
	.dwattr $C$DW$133, DW_AT_accessibility(DW_ACCESS_public)
	.dwattr $C$DW$133, DW_AT_decl_file("C:/ti_ccs7_1_0/ccsv7/tools/compiler/ti-cgt-arm_16.9.2.LTS/include/stdio.h")
	.dwattr $C$DW$133, DW_AT_decl_line(0x5e)
	.dwattr $C$DW$133, DW_AT_decl_column(0x16)

$C$DW$134	.dwtag  DW_TAG_member
	.dwattr $C$DW$134, DW_AT_type(*$C$DW$T$19)
	.dwattr $C$DW$134, DW_AT_name("bufend")
	.dwattr $C$DW$134, DW_AT_TI_symbol_name("bufend")
	.dwattr $C$DW$134, DW_AT_data_member_location[DW_OP_plus_uconst 0xc]
	.dwattr $C$DW$134, DW_AT_accessibility(DW_ACCESS_public)
	.dwattr $C$DW$134, DW_AT_decl_file("C:/ti_ccs7_1_0/ccsv7/tools/compiler/ti-cgt-arm_16.9.2.LTS/include/stdio.h")
	.dwattr $C$DW$134, DW_AT_decl_line(0x5f)
	.dwattr $C$DW$134, DW_AT_decl_column(0x16)

$C$DW$135	.dwtag  DW_TAG_member
	.dwattr $C$DW$135, DW_AT_type(*$C$DW$T$19)
	.dwattr $C$DW$135, DW_AT_name("buff_stop")
	.dwattr $C$DW$135, DW_AT_TI_symbol_name("buff_stop")
	.dwattr $C$DW$135, DW_AT_data_member_location[DW_OP_plus_uconst 0x10]
	.dwattr $C$DW$135, DW_AT_accessibility(DW_ACCESS_public)
	.dwattr $C$DW$135, DW_AT_decl_file("C:/ti_ccs7_1_0/ccsv7/tools/compiler/ti-cgt-arm_16.9.2.LTS/include/stdio.h")
	.dwattr $C$DW$135, DW_AT_decl_line(0x60)
	.dwattr $C$DW$135, DW_AT_decl_column(0x16)

$C$DW$136	.dwtag  DW_TAG_member
	.dwattr $C$DW$136, DW_AT_type(*$C$DW$T$11)
	.dwattr $C$DW$136, DW_AT_name("flags")
	.dwattr $C$DW$136, DW_AT_TI_symbol_name("flags")
	.dwattr $C$DW$136, DW_AT_data_member_location[DW_OP_plus_uconst 0x14]
	.dwattr $C$DW$136, DW_AT_accessibility(DW_ACCESS_public)
	.dwattr $C$DW$136, DW_AT_decl_file("C:/ti_ccs7_1_0/ccsv7/tools/compiler/ti-cgt-arm_16.9.2.LTS/include/stdio.h")
	.dwattr $C$DW$136, DW_AT_decl_line(0x61)
	.dwattr $C$DW$136, DW_AT_decl_column(0x16)

	.dwattr $C$DW$T$20, DW_AT_decl_file("C:/ti_ccs7_1_0/ccsv7/tools/compiler/ti-cgt-arm_16.9.2.LTS/include/stdio.h")
	.dwattr $C$DW$T$20, DW_AT_decl_line(0x5b)
	.dwattr $C$DW$T$20, DW_AT_decl_column(0x10)
	.dwendtag $C$DW$T$20

$C$DW$T$28	.dwtag  DW_TAG_typedef
	.dwattr $C$DW$T$28, DW_AT_name("FILE")
	.dwattr $C$DW$T$28, DW_AT_type(*$C$DW$T$20)
	.dwattr $C$DW$T$28, DW_AT_language(DW_LANG_C)
	.dwattr $C$DW$T$28, DW_AT_decl_file("C:/ti_ccs7_1_0/ccsv7/tools/compiler/ti-cgt-arm_16.9.2.LTS/include/stdio.h")
	.dwattr $C$DW$T$28, DW_AT_decl_line(0x62)
	.dwattr $C$DW$T$28, DW_AT_decl_column(0x03)

$C$DW$T$2	.dwtag  DW_TAG_unspecified_type
	.dwattr $C$DW$T$2, DW_AT_name("void")

$C$DW$T$3	.dwtag  DW_TAG_pointer_type
	.dwattr $C$DW$T$3, DW_AT_type(*$C$DW$T$2)
	.dwattr $C$DW$T$3, DW_AT_address_class(0x20)

$C$DW$T$4	.dwtag  DW_TAG_base_type
	.dwattr $C$DW$T$4, DW_AT_encoding(DW_ATE_boolean)
	.dwattr $C$DW$T$4, DW_AT_name("bool")
	.dwattr $C$DW$T$4, DW_AT_byte_size(0x01)

$C$DW$T$5	.dwtag  DW_TAG_base_type
	.dwattr $C$DW$T$5, DW_AT_encoding(DW_ATE_signed_char)
	.dwattr $C$DW$T$5, DW_AT_name("signed char")
	.dwattr $C$DW$T$5, DW_AT_byte_size(0x01)

$C$DW$T$52	.dwtag  DW_TAG_typedef
	.dwattr $C$DW$T$52, DW_AT_name("int8_t")
	.dwattr $C$DW$T$52, DW_AT_type(*$C$DW$T$5)
	.dwattr $C$DW$T$52, DW_AT_language(DW_LANG_C)
	.dwattr $C$DW$T$52, DW_AT_decl_file("C:/ti_ccs7_1_0/ccsv7/tools/compiler/ti-cgt-arm_16.9.2.LTS/include/stdint.h")
	.dwattr $C$DW$T$52, DW_AT_decl_line(0x2a)
	.dwattr $C$DW$T$52, DW_AT_decl_column(0x1d)

$C$DW$T$53	.dwtag  DW_TAG_typedef
	.dwattr $C$DW$T$53, DW_AT_name("int_least8_t")
	.dwattr $C$DW$T$53, DW_AT_type(*$C$DW$T$52)
	.dwattr $C$DW$T$53, DW_AT_language(DW_LANG_C)
	.dwattr $C$DW$T$53, DW_AT_decl_file("C:/ti_ccs7_1_0/ccsv7/tools/compiler/ti-cgt-arm_16.9.2.LTS/include/stdint.h")
	.dwattr $C$DW$T$53, DW_AT_decl_line(0x37)
	.dwattr $C$DW$T$53, DW_AT_decl_column(0x17)

$C$DW$T$6	.dwtag  DW_TAG_base_type
	.dwattr $C$DW$T$6, DW_AT_encoding(DW_ATE_unsigned_char)
	.dwattr $C$DW$T$6, DW_AT_name("unsigned char")
	.dwattr $C$DW$T$6, DW_AT_byte_size(0x01)

$C$DW$T$19	.dwtag  DW_TAG_pointer_type
	.dwattr $C$DW$T$19, DW_AT_type(*$C$DW$T$6)
	.dwattr $C$DW$T$19, DW_AT_address_class(0x20)

$C$DW$T$39	.dwtag  DW_TAG_typedef
	.dwattr $C$DW$T$39, DW_AT_name("uint8_t")
	.dwattr $C$DW$T$39, DW_AT_type(*$C$DW$T$6)
	.dwattr $C$DW$T$39, DW_AT_language(DW_LANG_C)
	.dwattr $C$DW$T$39, DW_AT_decl_file("C:/ti_ccs7_1_0/ccsv7/tools/compiler/ti-cgt-arm_16.9.2.LTS/include/stdint.h")
	.dwattr $C$DW$T$39, DW_AT_decl_line(0x2b)
	.dwattr $C$DW$T$39, DW_AT_decl_column(0x1c)

$C$DW$T$70	.dwtag  DW_TAG_typedef
	.dwattr $C$DW$T$70, DW_AT_name("uint_least8_t")
	.dwattr $C$DW$T$70, DW_AT_type(*$C$DW$T$39)
	.dwattr $C$DW$T$70, DW_AT_language(DW_LANG_C)
	.dwattr $C$DW$T$70, DW_AT_decl_file("C:/ti_ccs7_1_0/ccsv7/tools/compiler/ti-cgt-arm_16.9.2.LTS/include/stdint.h")
	.dwattr $C$DW$T$70, DW_AT_decl_line(0x38)
	.dwattr $C$DW$T$70, DW_AT_decl_column(0x16)

$C$DW$T$7	.dwtag  DW_TAG_base_type
	.dwattr $C$DW$T$7, DW_AT_encoding(DW_ATE_signed_char)
	.dwattr $C$DW$T$7, DW_AT_name("wchar_t")
	.dwattr $C$DW$T$7, DW_AT_byte_size(0x02)

$C$DW$T$8	.dwtag  DW_TAG_base_type
	.dwattr $C$DW$T$8, DW_AT_encoding(DW_ATE_signed)
	.dwattr $C$DW$T$8, DW_AT_name("short")
	.dwattr $C$DW$T$8, DW_AT_byte_size(0x02)

$C$DW$T$71	.dwtag  DW_TAG_typedef
	.dwattr $C$DW$T$71, DW_AT_name("int16_t")
	.dwattr $C$DW$T$71, DW_AT_type(*$C$DW$T$8)
	.dwattr $C$DW$T$71, DW_AT_language(DW_LANG_C)
	.dwattr $C$DW$T$71, DW_AT_decl_file("C:/ti_ccs7_1_0/ccsv7/tools/compiler/ti-cgt-arm_16.9.2.LTS/include/stdint.h")
	.dwattr $C$DW$T$71, DW_AT_decl_line(0x2c)
	.dwattr $C$DW$T$71, DW_AT_decl_column(0x1d)

$C$DW$T$72	.dwtag  DW_TAG_typedef
	.dwattr $C$DW$T$72, DW_AT_name("int_least16_t")
	.dwattr $C$DW$T$72, DW_AT_type(*$C$DW$T$71)
	.dwattr $C$DW$T$72, DW_AT_language(DW_LANG_C)
	.dwattr $C$DW$T$72, DW_AT_decl_file("C:/ti_ccs7_1_0/ccsv7/tools/compiler/ti-cgt-arm_16.9.2.LTS/include/stdint.h")
	.dwattr $C$DW$T$72, DW_AT_decl_line(0x3a)
	.dwattr $C$DW$T$72, DW_AT_decl_column(0x17)

$C$DW$T$9	.dwtag  DW_TAG_base_type
	.dwattr $C$DW$T$9, DW_AT_encoding(DW_ATE_unsigned)
	.dwattr $C$DW$T$9, DW_AT_name("unsigned short")
	.dwattr $C$DW$T$9, DW_AT_byte_size(0x02)

$C$DW$T$73	.dwtag  DW_TAG_typedef
	.dwattr $C$DW$T$73, DW_AT_name("uint16_t")
	.dwattr $C$DW$T$73, DW_AT_type(*$C$DW$T$9)
	.dwattr $C$DW$T$73, DW_AT_language(DW_LANG_C)
	.dwattr $C$DW$T$73, DW_AT_decl_file("C:/ti_ccs7_1_0/ccsv7/tools/compiler/ti-cgt-arm_16.9.2.LTS/include/stdint.h")
	.dwattr $C$DW$T$73, DW_AT_decl_line(0x2d)
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	.dwattr $C$DW$141, DW_AT_accessibility(DW_ACCESS_public)
	.dwattr $C$DW$141, DW_AT_decl_file("C:/ti_ccs7_1_0/ccsv7/tools/compiler/ti-cgt-arm_16.9.2.LTS/include/crc_tbl.h")
	.dwattr $C$DW$141, DW_AT_decl_line(0x83)
	.dwattr $C$DW$141, DW_AT_decl_column(0x12)

$C$DW$142	.dwtag  DW_TAG_member
	.dwattr $C$DW$142, DW_AT_type(*$C$DW$T$23)
	.dwattr $C$DW$142, DW_AT_name("addr")
	.dwattr $C$DW$142, DW_AT_TI_symbol_name("addr")
	.dwattr $C$DW$142, DW_AT_data_member_location[DW_OP_plus_uconst 0xc]
	.dwattr $C$DW$142, DW_AT_accessibility(DW_ACCESS_public)
	.dwattr $C$DW$142, DW_AT_decl_file("C:/ti_ccs7_1_0/ccsv7/tools/compiler/ti-cgt-arm_16.9.2.LTS/include/crc_tbl.h")
	.dwattr $C$DW$142, DW_AT_decl_line(0x84)
	.dwattr $C$DW$142, DW_AT_decl_column(0x12)

$C$DW$143	.dwtag  DW_TAG_member
	.dwattr $C$DW$143, DW_AT_type(*$C$DW$T$23)
	.dwattr $C$DW$143, DW_AT_name("size")
	.dwattr $C$DW$143, DW_AT_TI_symbol_name("size")
	.dwattr $C$DW$143, DW_AT_data_member_location[DW_OP_plus_uconst 0x10]
	.dwattr $C$DW$143, DW_AT_accessibility(DW_ACCESS_public)
	.dwattr $C$DW$143, DW_AT_decl_file("C:/ti_ccs7_1_0/ccsv7/tools/compiler/ti-cgt-arm_16.9.2.LTS/include/crc_tbl.h")
	.dwattr $C$DW$143, DW_AT_decl_line(0x85)
	.dwattr $C$DW$143, DW_AT_decl_column(0x12)

$C$DW$144	.dwtag  DW_TAG_member
	.dwattr $C$DW$144, DW_AT_type(*$C$DW$T$23)
	.dwattr $C$DW$144, DW_AT_name("padding")
	.dwattr $C$DW$144, DW_AT_TI_symbol_name("padding")
	.dwattr $C$DW$144, DW_AT_data_member_location[DW_OP_plus_uconst 0x14]
	.dwattr $C$DW$144, DW_AT_accessibility(DW_ACCESS_public)
	.dwattr $C$DW$144, DW_AT_decl_file("C:/ti_ccs7_1_0/ccsv7/tools/compiler/ti-cgt-arm_16.9.2.LTS/include/crc_tbl.h")
	.dwattr $C$DW$144, DW_AT_decl_line(0x86)
	.dwattr $C$DW$144, DW_AT_decl_column(0x12)

	.dwattr $C$DW$T$24, DW_AT_decl_file("C:/ti_ccs7_1_0/ccsv7/tools/compiler/ti-cgt-arm_16.9.2.LTS/include/crc_tbl.h")
	.dwattr $C$DW$T$24, DW_AT_decl_line(0x80)
	.dwattr $C$DW$T$24, DW_AT_decl_column(0x10)
	.dwendtag $C$DW$T$24

$C$DW$T$25	.dwtag  DW_TAG_typedef
	.dwattr $C$DW$T$25, DW_AT_name("CRC_RECORD")
	.dwattr $C$DW$T$25, DW_AT_type(*$C$DW$T$24)
	.dwattr $C$DW$T$25, DW_AT_language(DW_LANG_C)
	.dwattr $C$DW$T$25, DW_AT_decl_file("C:/ti_ccs7_1_0/ccsv7/tools/compiler/ti-cgt-arm_16.9.2.LTS/include/crc_tbl.h")
	.dwattr $C$DW$T$25, DW_AT_decl_line(0x88)
	.dwattr $C$DW$T$25, DW_AT_decl_column(0x03)


$C$DW$T$26	.dwtag  DW_TAG_array_type
	.dwattr $C$DW$T$26, DW_AT_type(*$C$DW$T$25)
	.dwattr $C$DW$T$26, DW_AT_language(DW_LANG_C)
	.dwattr $C$DW$T$26, DW_AT_byte_size(0x18)
$C$DW$145	.dwtag  DW_TAG_subrange_type
	.dwattr $C$DW$145, DW_AT_upper_bound(0x00)

	.dwendtag $C$DW$T$26


$C$DW$T$27	.dwtag  DW_TAG_structure_type
	.dwattr $C$DW$T$27, DW_AT_name("crc_table")
	.dwattr $C$DW$T$27, DW_AT_byte_size(0x20)
$C$DW$146	.dwtag  DW_TAG_member
	.dwattr $C$DW$146, DW_AT_type(*$C$DW$T$23)
	.dwattr $C$DW$146, DW_AT_name("rec_size")
	.dwattr $C$DW$146, DW_AT_TI_symbol_name("rec_size")
	.dwattr $C$DW$146, DW_AT_data_member_location[DW_OP_plus_uconst 0x0]
	.dwattr $C$DW$146, DW_AT_accessibility(DW_ACCESS_public)
	.dwattr $C$DW$146, DW_AT_decl_file("C:/ti_ccs7_1_0/ccsv7/tools/compiler/ti-cgt-arm_16.9.2.LTS/include/crc_tbl.h")
	.dwattr $C$DW$146, DW_AT_decl_line(0x90)
	.dwattr $C$DW$146, DW_AT_decl_column(0x12)

$C$DW$147	.dwtag  DW_TAG_member
	.dwattr $C$DW$147, DW_AT_type(*$C$DW$T$23)
	.dwattr $C$DW$147, DW_AT_name("num_recs")
	.dwattr $C$DW$147, DW_AT_TI_symbol_name("num_recs")
	.dwattr $C$DW$147, DW_AT_data_member_location[DW_OP_plus_uconst 0x4]
	.dwattr $C$DW$147, DW_AT_accessibility(DW_ACCESS_public)
	.dwattr $C$DW$147, DW_AT_decl_file("C:/ti_ccs7_1_0/ccsv7/tools/compiler/ti-cgt-arm_16.9.2.LTS/include/crc_tbl.h")
	.dwattr $C$DW$147, DW_AT_decl_line(0x91)
	.dwattr $C$DW$147, DW_AT_decl_column(0x12)

$C$DW$148	.dwtag  DW_TAG_member
	.dwattr $C$DW$148, DW_AT_type(*$C$DW$T$26)
	.dwattr $C$DW$148, DW_AT_name("recs")
	.dwattr $C$DW$148, DW_AT_TI_symbol_name("recs")
	.dwattr $C$DW$148, DW_AT_data_member_location[DW_OP_plus_uconst 0x8]
	.dwattr $C$DW$148, DW_AT_accessibility(DW_ACCESS_public)
	.dwattr $C$DW$148, DW_AT_decl_file("C:/ti_ccs7_1_0/ccsv7/tools/compiler/ti-cgt-arm_16.9.2.LTS/include/crc_tbl.h")
	.dwattr $C$DW$148, DW_AT_decl_line(0x92)
	.dwattr $C$DW$148, DW_AT_decl_column(0x12)

	.dwattr $C$DW$T$27, DW_AT_decl_file("C:/ti_ccs7_1_0/ccsv7/tools/compiler/ti-cgt-arm_16.9.2.LTS/include/crc_tbl.h")
	.dwattr $C$DW$T$27, DW_AT_decl_line(0x8e)
	.dwattr $C$DW$T$27, DW_AT_decl_column(0x10)
	.dwendtag $C$DW$T$27

$C$DW$T$46	.dwtag  DW_TAG_typedef
	.dwattr $C$DW$T$46, DW_AT_name("CRC_TABLE")
	.dwattr $C$DW$T$46, DW_AT_type(*$C$DW$T$27)
	.dwattr $C$DW$T$46, DW_AT_language(DW_LANG_C)
	.dwattr $C$DW$T$46, DW_AT_decl_file("C:/ti_ccs7_1_0/ccsv7/tools/compiler/ti-cgt-arm_16.9.2.LTS/include/crc_tbl.h")
	.dwattr $C$DW$T$46, DW_AT_decl_line(0x93)
	.dwattr $C$DW$T$46, DW_AT_decl_column(0x03)

$C$DW$T$47	.dwtag  DW_TAG_const_type
	.dwattr $C$DW$T$47, DW_AT_type(*$C$DW$T$46)

$C$DW$T$48	.dwtag  DW_TAG_pointer_type
	.dwattr $C$DW$T$48, DW_AT_type(*$C$DW$T$47)
	.dwattr $C$DW$T$48, DW_AT_address_class(0x20)

$C$DW$T$49	.dwtag  DW_TAG_const_type
	.dwattr $C$DW$T$49, DW_AT_type(*$C$DW$T$48)

	.dwattr $C$DW$CU, DW_AT_language(DW_LANG_C)

;***************************************************************
;* DWARF CIE ENTRIES                                           *
;***************************************************************

$C$DW$CIE	.dwcie 14
	.dwcfi	cfa_register, 13
	.dwcfi	cfa_offset, 0
	.dwcfi	same_value, 4
	.dwcfi	same_value, 5
	.dwcfi	same_value, 6
	.dwcfi	same_value, 7
	.dwcfi	same_value, 8
	.dwcfi	same_value, 9
	.dwcfi	same_value, 10
	.dwcfi	same_value, 11
	.dwcfi	same_value, 80
	.dwcfi	same_value, 81
	.dwcfi	same_value, 82
	.dwcfi	same_value, 83
	.dwcfi	same_value, 84
	.dwcfi	same_value, 85
	.dwcfi	same_value, 86
	.dwcfi	same_value, 87
	.dwcfi	same_value, 88
	.dwcfi	same_value, 89
	.dwcfi	same_value, 90
	.dwcfi	same_value, 91
	.dwcfi	same_value, 92
	.dwcfi	same_value, 93
	.dwcfi	same_value, 94
	.dwcfi	same_value, 95
	.dwendentry
	.dwendtag $C$DW$CU

