MMCSD0_CTL_CFG(UInt32 BaseAddr)
{

	UInt32 RegAddr;
	RegAddr = BaseAddr + 0x0;
	Read32(RegAddr, "MMCSD0_SDMA_SYS_ADDR_LO");

	RegAddr = BaseAddr + 0x2;
	Read32(RegAddr, "MMCSD0_SDMA_SYS_ADDR_HI");

	RegAddr = BaseAddr + 0x4;
	Read32(RegAddr, "MMCSD0_BLOCK_SIZE");

	RegAddr = BaseAddr + 0x6;
	Read32(RegAddr, "MMCSD0_BLOCK_COUNT");

	RegAddr = BaseAddr + 0x8;
	Read32(RegAddr, "MMCSD0_ARGUMENT1_LO");

	RegAddr = BaseAddr + 0xA;
	Read32(RegAddr, "MMCSD0_ARGUMENT1_HI");

	RegAddr = BaseAddr + 0xC;
	Read32(RegAddr, "MMCSD0_TRANSFER_MODE");

	RegAddr = BaseAddr + 0xE;
	Read32(RegAddr, "MMCSD0_COMMAND");

	RegAddr = BaseAddr + 0x10;
	Read32(RegAddr, "MMCSD0_RESPONSE_0");

	RegAddr = BaseAddr + 0x14;
	Read32(RegAddr, "MMCSD0_RESPONSE_1");

	RegAddr = BaseAddr + 0x18;
	Read32(RegAddr, "MMCSD0_RESPONSE_2");

	RegAddr = BaseAddr + 0x1C;
	Read32(RegAddr, "MMCSD0_RESPONSE_3");

	RegAddr = BaseAddr + 0x20;
	Read32(RegAddr, "MMCSD0_DATA_PORT");

	RegAddr = BaseAddr + 0x20;
	Read32(RegAddr, "MMCSD0_RESPONSE_4");

	RegAddr = BaseAddr + 0x24;
	Read32(RegAddr, "MMCSD0_PRESENTSTATE");

	RegAddr = BaseAddr + 0x24;
	Read32(RegAddr, "MMCSD0_RESPONSE_5");

	RegAddr = BaseAddr + 0x28;
	Read32(RegAddr, "MMCSD0_HOST_CONTROL1");

	RegAddr = BaseAddr + 0x28;
	Read32(RegAddr, "MMCSD0_RESPONSE_6");

	RegAddr = BaseAddr + 0x29;
	Read32(RegAddr, "MMCSD0_POWER_CONTROL");

	RegAddr = BaseAddr + 0x2A;
	Read32(RegAddr, "MMCSD0_BLOCK_GAP_CONTROL");

	RegAddr = BaseAddr + 0x2B;
	Read32(RegAddr, "MMCSD0_WAKEUP_CONTROL");

	RegAddr = BaseAddr + 0x2C;
	Read32(RegAddr, "MMCSD0_CLOCK_CONTROL");

	RegAddr = BaseAddr + 0x2E;
	Read32(RegAddr, "MMCSD0_TIMEOUT_CONTROL");

	RegAddr = BaseAddr + 0x2F;
	Read32(RegAddr, "MMCSD0_SOFTWARE_RESET");

	RegAddr = BaseAddr + 0x30;
	Read32(RegAddr, "MMCSD0_NORMAL_INTR_STS");

	RegAddr = BaseAddr + 0x32;
	Read32(RegAddr, "MMCSD0_ERROR_INTR_STS");

	RegAddr = BaseAddr + 0x34;
	Read32(RegAddr, "MMCSD0_NORMAL_INTR_STS_ENA");

	RegAddr = BaseAddr + 0x36;
	Read32(RegAddr, "MMCSD0_ERROR_INTR_STS_ENA");

	RegAddr = BaseAddr + 0x38;
	Read32(RegAddr, "MMCSD0_NORMAL_INTR_SIG_ENA");

	RegAddr = BaseAddr + 0x3A;
	Read32(RegAddr, "MMCSD0_ERROR_INTR_SIG_ENA");

	RegAddr = BaseAddr + 0x3C;
	Read32(RegAddr, "MMCSD0_AUTOCMD_ERR_STS");

	RegAddr = BaseAddr + 0x3E;
	Read32(RegAddr, "MMCSD0_HOST_CONTROL2");

	RegAddr = BaseAddr + 0x40;
	Read32(RegAddr, "MMCSD0_CAPABILITIES");

	RegAddr = BaseAddr + 0x48;
	Read32(RegAddr, "MMCSD0_MAX_CURRENT_CAP");

	RegAddr = BaseAddr + 0x54;
	Read32(RegAddr, "MMCSD0_ADMA_ERR_STATUS");

	RegAddr = BaseAddr + 0x58;
	Read32(RegAddr, "MMCSD0_ADMA_SYS_ADDRESS");

	RegAddr = BaseAddr + 0x60;
	Read32(RegAddr, "MMCSD0_PRESET_VALUE0");

	RegAddr = BaseAddr + 0x62;
	Read32(RegAddr, "MMCSD0_PRESET_VALUE1");

	RegAddr = BaseAddr + 0x64;
	Read32(RegAddr, "MMCSD0_PRESET_VALUE2");

	RegAddr = BaseAddr + 0x66;
	Read32(RegAddr, "MMCSD0_PRESET_VALUE3");

	RegAddr = BaseAddr + 0x68;
	Read32(RegAddr, "MMCSD0_PRESET_VALUE4");

	RegAddr = BaseAddr + 0x6A;
	Read32(RegAddr, "MMCSD0_PRESET_VALUE5");

	RegAddr = BaseAddr + 0x6C;
	Read32(RegAddr, "MMCSD0_PRESET_VALUE6");

	RegAddr = BaseAddr + 0x6E;
	Read32(RegAddr, "MMCSD0_PRESET_VALUE7");

	RegAddr = BaseAddr + 0x72;
	Read32(RegAddr, "MMCSD0_PRESET_VALUE8");

	RegAddr = BaseAddr + 0x74;
	Read32(RegAddr, "MMCSD0_PRESET_VALUE10");

	RegAddr = BaseAddr + 0x78;
	Read32(RegAddr, "MMCSD0_ADMA3_DESC_ADDRESS");

	RegAddr = BaseAddr + 0x80;
	Read32(RegAddr, "MMCSD0_UHS2_BLOCK_SIZE");

	RegAddr = BaseAddr + 0x84;
	Read32(RegAddr, "MMCSD0_UHS2_BLOCK_COUNT");

	RegAddr = BaseAddr + 0x88;
	Read32(RegAddr, "MMCSD0_UHS2_COMMAND_PKT_0");

	RegAddr = BaseAddr + 0x8C;
	Read32(RegAddr, "MMCSD0_UHS2_COMMAND_PKT_1");

	RegAddr = BaseAddr + 0x90;
	Read32(RegAddr, "MMCSD0_UHS2_COMMAND_PKT_2");

	RegAddr = BaseAddr + 0x94;
	Read32(RegAddr, "MMCSD0_UHS2_COMMAND_PKT_3");

	RegAddr = BaseAddr + 0x98;
	Read32(RegAddr, "MMCSD0_UHS2_COMMAND_PKT_4");

	RegAddr = BaseAddr + 0x9C;
	Read32(RegAddr, "MMCSD0_UHS2_COMMAND_PKT_5");

	RegAddr = BaseAddr + 0x9C;
	Read32(RegAddr, "MMCSD0_UHS2_XFER_MODE");

	RegAddr = BaseAddr + 0x9E;
	Read32(RegAddr, "MMCSD0_UHS2_COMMAND");

	RegAddr = BaseAddr + 0xA0;
	Read32(RegAddr, "MMCSD0_UHS2_COMMAND_PKT_6");

	RegAddr = BaseAddr + 0xA0;
	Read32(RegAddr, "MMCSD0_UHS2_RESPONSE_0");

	RegAddr = BaseAddr + 0xA4;
	Read32(RegAddr, "MMCSD0_UHS2_COMMAND_PKT_7");

	RegAddr = BaseAddr + 0xA4;
	Read32(RegAddr, "MMCSD0_UHS2_RESPONSE_1");

	RegAddr = BaseAddr + 0xA8;
	Read32(RegAddr, "MMCSD0_UHS2_COMMAND_PKT_8");

	RegAddr = BaseAddr + 0xA8;
	Read32(RegAddr, "MMCSD0_UHS2_RESPONSE_2");

	RegAddr = BaseAddr + 0xAC;
	Read32(RegAddr, "MMCSD0_UHS2_COMMAND_PKT_9");

	RegAddr = BaseAddr + 0xAC;
	Read32(RegAddr, "MMCSD0_UHS2_RESPONSE_3");

	RegAddr = BaseAddr + 0xB0;
	Read32(RegAddr, "MMCSD0_UHS2_COMMAND_PKT_10");

	RegAddr = BaseAddr + 0xB0;
	Read32(RegAddr, "MMCSD0_UHS2_RESPONSE_4");

	RegAddr = BaseAddr + 0xB4;
	Read32(RegAddr, "MMCSD0_UHS2_COMMAND_PKT_11");

	RegAddr = BaseAddr + 0xB4;
	Read32(RegAddr, "MMCSD0_UHS2_MESSAGE_SELECT");

	RegAddr = BaseAddr + 0xB4;
	Read32(RegAddr, "MMCSD0_UHS2_RESPONSE_5");

	RegAddr = BaseAddr + 0xB8;
	Read32(RegAddr, "MMCSD0_UHS2_COMMAND_PKT_12");

	RegAddr = BaseAddr + 0xB8;
	Read32(RegAddr, "MMCSD0_UHS2_MESSAGE");

	RegAddr = BaseAddr + 0xB8;
	Read32(RegAddr, "MMCSD0_UHS2_RESPONSE_6");

	RegAddr = BaseAddr + 0xBC;
	Read32(RegAddr, "MMCSD0_UHS2_COMMAND_PKT_13");

	RegAddr = BaseAddr + 0xBC;
	Read32(RegAddr, "MMCSD0_UHS2_DEVICE_INTR_STATUS");

	RegAddr = BaseAddr + 0xBC;
	Read32(RegAddr, "MMCSD0_UHS2_RESPONSE_7");

	RegAddr = BaseAddr + 0xBE;
	Read32(RegAddr, "MMCSD0_UHS2_DEVICE_SELECT");

	RegAddr = BaseAddr + 0xBF;
	Read32(RegAddr, "MMCSD0_UHS2_DEVICE_INT_CODE");

	RegAddr = BaseAddr + 0xC0;
	Read32(RegAddr, "MMCSD0_UHS2_COMMAND_PKT_14");

	RegAddr = BaseAddr + 0xC0;
	Read32(RegAddr, "MMCSD0_UHS2_RESPONSE_8");

	RegAddr = BaseAddr + 0xC0;
	Read32(RegAddr, "MMCSD0_UHS2_SOFTWARE_RESET");

	RegAddr = BaseAddr + 0xC2;
	Read32(RegAddr, "MMCSD0_UHS2_TIMER_CONTROL");

	RegAddr = BaseAddr + 0xC4;
	Read32(RegAddr, "MMCSD0_UHS2_COMMAND_PKT_15");

	RegAddr = BaseAddr + 0xC4;
	Read32(RegAddr, "MMCSD0_UHS2_ERR_INTR_STS");

	RegAddr = BaseAddr + 0xC4;
	Read32(RegAddr, "MMCSD0_UHS2_RESPONSE_9");

	RegAddr = BaseAddr + 0xC8;
	Read32(RegAddr, "MMCSD0_UHS2_COMMAND_PKT_16");

	RegAddr = BaseAddr + 0xC8;
	Read32(RegAddr, "MMCSD0_UHS2_ERR_INTR_STS_ENA");

	RegAddr = BaseAddr + 0xC8;
	Read32(RegAddr, "MMCSD0_UHS2_RESPONSE_10");

	RegAddr = BaseAddr + 0xCC;
	Read32(RegAddr, "MMCSD0_UHS2_COMMAND_PKT_17");

	RegAddr = BaseAddr + 0xCC;
	Read32(RegAddr, "MMCSD0_UHS2_ERR_INTR_SIG_ENA");

	RegAddr = BaseAddr + 0xCC;
	Read32(RegAddr, "MMCSD0_UHS2_RESPONSE_11");

	RegAddr = BaseAddr + 0xD0;
	Read32(RegAddr, "MMCSD0_UHS2_COMMAND_PKT_18");

	RegAddr = BaseAddr + 0xD0;
	Read32(RegAddr, "MMCSD0_UHS2_RESPONSE_12");

	RegAddr = BaseAddr + 0xD4;
	Read32(RegAddr, "MMCSD0_UHS2_RESPONSE_13");

	RegAddr = BaseAddr + 0xD8;
	Read32(RegAddr, "MMCSD0_UHS2_RESPONSE_14");

	RegAddr = BaseAddr + 0xDC;
	Read32(RegAddr, "MMCSD0_UHS2_RESPONSE_15");

	RegAddr = BaseAddr + 0xE0;
	Read32(RegAddr, "MMCSD0_UHS2_RESPONSE_16");

	RegAddr = BaseAddr + 0xE0;
	Read32(RegAddr, "MMCSD0_UHS2_SETTINGS_PTR");

	RegAddr = BaseAddr + 0xE2;
	Read32(RegAddr, "MMCSD0_UHS2_CAPABILITIES_PTR");

	RegAddr = BaseAddr + 0xE4;
	Read32(RegAddr, "MMCSD0_UHS2_RESPONSE_17");

	RegAddr = BaseAddr + 0xE4;
	Read32(RegAddr, "MMCSD0_UHS2_TEST_PTR");

	RegAddr = BaseAddr + 0xE6;
	Read32(RegAddr, "MMCSD0_SHARED_BUS_CTRL_PTR");

	RegAddr = BaseAddr + 0xE8;
	Read32(RegAddr, "MMCSD0_UHS2_RESPONSE_18");

	RegAddr = BaseAddr + 0xE8;
	Read32(RegAddr, "MMCSD0_VENDOR_SPECFIC_PTR");

	RegAddr = BaseAddr + 0xF4;
	Read32(RegAddr, "MMCSD0_BOOT_TIMEOUT_CONTROL");

	RegAddr = BaseAddr + 0xF8;
	Read32(RegAddr, "MMCSD0_VENDOR_REGISTER");

	RegAddr = BaseAddr + 0xFC;
	Read32(RegAddr, "MMCSD0_SLOT_INT_STS");

	RegAddr = BaseAddr + 0xFE;
	Read32(RegAddr, "MMCSD0_HOST_CONTROLLER_VER");

	RegAddr = BaseAddr + 0x100;
	Read32(RegAddr, "MMCSD0_UHS2_GEN_SETTINGS");

	RegAddr = BaseAddr + 0x104;
	Read32(RegAddr, "MMCSD0_UHS2_PHY_SETTINGS");

	RegAddr = BaseAddr + 0x108;
	Read32(RegAddr, "MMCSD0_UHS2_LNK_TRN_SETTINGS");

	RegAddr = BaseAddr + 0x110;
	Read32(RegAddr, "MMCSD0_UHS2_GEN_CAP");

	RegAddr = BaseAddr + 0x114;
	Read32(RegAddr, "MMCSD0_UHS2_PHY_CAP");

	RegAddr = BaseAddr + 0x118;
	Read32(RegAddr, "MMCSD0_UHS2_LNK_TRN_CAP");

	RegAddr = BaseAddr + 0x200;
	Read32(RegAddr, "MMCSD0_CQ_VERSION");

	RegAddr = BaseAddr + 0x204;
	Read32(RegAddr, "MMCSD0_CQ_CAPABILITIES");

	RegAddr = BaseAddr + 0x208;
	Read32(RegAddr, "MMCSD0_CQ_CONFIG");

	RegAddr = BaseAddr + 0x20C;
	Read32(RegAddr, "MMCSD0_CQ_CONTROL");

	RegAddr = BaseAddr + 0x210;
	Read32(RegAddr, "MMCSD0_CQ_INTR_STS");

	RegAddr = BaseAddr + 0x214;
	Read32(RegAddr, "MMCSD0_CQ_INTR_STS_ENA");

	RegAddr = BaseAddr + 0x218;
	Read32(RegAddr, "MMCSD0_CQ_INTR_SIG_ENA");

	RegAddr = BaseAddr + 0x21C;
	Read32(RegAddr, "MMCSD0_CQ_INTR_COALESCING");

	RegAddr = BaseAddr + 0x220;
	Read32(RegAddr, "MMCSD0_CQ_TDL_BASE_ADDR");

	RegAddr = BaseAddr + 0x224;
	Read32(RegAddr, "MMCSD0_CQ_TDL_BASE_ADDR_UPBITS");

	RegAddr = BaseAddr + 0x22C;
	Read32(RegAddr, "MMCSD0_CQ_TASK_COMP_NOTIF");

	RegAddr = BaseAddr + 0x230;
	Read32(RegAddr, "MMCSD0_CQ_DEV_QUEUE_STATUS");

	RegAddr = BaseAddr + 0x234;
	Read32(RegAddr, "MMCSD0_CQ_DEV_PENDING_TASKS");

	RegAddr = BaseAddr + 0x238;
	Read32(RegAddr, "MMCSD0_CQ_TASK_CLEAR");

	RegAddr = BaseAddr + 0x240;
	Read32(RegAddr, "MMCSD0_CQ_SEND_STS_CONFIG1");

	RegAddr = BaseAddr + 0x244;
	Read32(RegAddr, "MMCSD0_CQ_SEND_STS_CONFIG2");

	RegAddr = BaseAddr + 0x248;
	Read32(RegAddr, "MMCSD0_CQ_DCMD_RESPONSE");

	RegAddr = BaseAddr + 0x250;
	Read32(RegAddr, "MMCSD0_CQ_RESP_ERR_MASK");

	RegAddr = BaseAddr + 0x254;
	Read32(RegAddr, "MMCSD0_CQ_TASK_ERR_INFO");

	RegAddr = BaseAddr + 0x258;
	Read32(RegAddr, "MMCSD0_CQ_CMD_RESP_INDEX");

	RegAddr = BaseAddr + 0x25C;
	Read32(RegAddr, "MMCSD0_CQ_CMD_RESP_ARG");

	RegAddr = BaseAddr + 0x260;
	Read32(RegAddr, "MMCSD0_CQ_ERROR_TASK_ID");

}