	.cpu cortex-r5
	.eabi_attribute 28, 1	@ Tag_ABI_VFP_args
	.eabi_attribute 20, 1	@ Tag_ABI_FP_denormal
	.eabi_attribute 21, 1	@ Tag_ABI_FP_exceptions
	.eabi_attribute 23, 3	@ Tag_ABI_FP_number_model
	.eabi_attribute 24, 1	@ Tag_ABI_align8_needed
	.eabi_attribute 25, 1	@ Tag_ABI_align8_preserved
	.eabi_attribute 26, 1	@ Tag_ABI_enum_size
	.eabi_attribute 30, 1	@ Tag_ABI_optimization_goals
	.eabi_attribute 34, 1	@ Tag_CPU_unaligned_access
	.eabi_attribute 18, 4	@ Tag_ABI_PCS_wchar_t
	.file	"HL_gio.c"
@ GNU C11 (GNU Tools for Arm Embedded Processors 7-2017-q4-major) version 7.2.1 20170904 (release) [ARM/embedded-7-branch revision 255204] (arm-none-eabi)
@	compiled by GNU C version 4.8.4, GMP version 6.1.0, MPFR version 3.1.4, MPC version 1.0.3, isl version isl-0.15-GMP

@ GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072
@ options passed:  -fpreprocessed HL_gio.i -mcpu=cortex-r5 -mfloat-abi=hard
@ -mfpu=vfpv3-d16 -auxbase-strip source/HL_gio.o -g -gdwarf-3
@ -gstrict-dwarf -Og -Wall -fverbose-asm
@ options enabled:  -faggressive-loop-optimizations -fauto-inc-dec
@ -fchkp-check-incomplete-type -fchkp-check-read -fchkp-check-write
@ -fchkp-instrument-calls -fchkp-narrow-bounds -fchkp-optimize
@ -fchkp-store-bounds -fchkp-use-static-bounds
@ -fchkp-use-static-const-bounds -fchkp-use-wrappers
@ -fcombine-stack-adjustments -fcommon -fcompare-elim -fcprop-registers
@ -fdefer-pop -fdelete-null-pointer-checks -fdwarf2-cfi-asm
@ -fearly-inlining -feliminate-unused-debug-types -fforward-propagate
@ -ffp-int-builtin-inexact -ffunction-cse -fgcse-lm -fgnu-runtime
@ -fgnu-unique -fguess-branch-probability -fident -finline -finline-atomics
@ -fipa-profile -fipa-pure-const -fipa-reference -fira-hoist-pressure
@ -fira-share-save-slots -fira-share-spill-slots -fivopts
@ -fkeep-static-consts -fleading-underscore -flifetime-dse
@ -flto-odr-type-merging -fmath-errno -fmerge-constants
@ -fmerge-debug-strings -fomit-frame-pointer -fpeephole -fplt
@ -fprefetch-loop-arrays -freg-struct-return -freorder-blocks
@ -fsched-critical-path-heuristic -fsched-dep-count-heuristic
@ -fsched-group-heuristic -fsched-interblock -fsched-last-insn-heuristic
@ -fsched-pressure -fsched-rank-heuristic -fsched-spec
@ -fsched-spec-insn-heuristic -fsched-stalled-insns-dep -fsection-anchors
@ -fsemantic-interposition -fshow-column -fshrink-wrap
@ -fshrink-wrap-separate -fsigned-zeros -fsplit-ivs-in-unroller
@ -fsplit-wide-types -fssa-backprop -fstdarg-opt
@ -fstrict-volatile-bitfields -fsync-libcalls -ftoplevel-reorder
@ -ftrapping-math -ftree-builtin-call-dce -ftree-ccp -ftree-ch
@ -ftree-coalesce-vars -ftree-copy-prop -ftree-cselim -ftree-dce
@ -ftree-dominator-opts -ftree-dse -ftree-forwprop -ftree-fre
@ -ftree-loop-if-convert -ftree-loop-im -ftree-loop-ivcanon
@ -ftree-loop-optimize -ftree-parallelize-loops= -ftree-phiprop
@ -ftree-reassoc -ftree-scev-cprop -ftree-sink -ftree-slsr -ftree-ter
@ -funit-at-a-time -fvar-tracking -fvar-tracking-assignments -fverbose-asm
@ -fzero-initialized-in-bss -gstrict-dwarf -marm -mlittle-endian
@ -mpic-data-is-text-relative -msched-prolog -munaligned-access
@ -mvectorize-with-neon-quad

	.text
.Ltext0:
	.cfi_sections	.debug_frame
	.align	2
	.global	gioInit
	.syntax unified
	.arm
	.fpu vfpv3-d16
	.type	gioInit, %function
gioInit:
.LFB0:
	.file 1 "../source/HL_gio.c"
	.loc 1 62 0
	.cfi_startproc
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	@ link register save eliminated.
@ ../source/HL_gio.c:67:     gioREG->GCR0   = 1U;
	.loc 1 67 0
	movw	r3, #48383	@ tmp110,
	movt	r3, 65527	@ tmp110,
	mov	r2, #1	@ tmp111,
	str	r2, [r3, #-255]	@ tmp111, MEM[(volatile struct gioBASE_t *)4294425600B].GCR0
@ ../source/HL_gio.c:68:     gioREG->ENACLR = 0xFFU;
	.loc 1 68 0
	mov	r1, #255	@ tmp113,
	str	r1, [r3, #-235]	@ tmp113, MEM[(volatile struct gioBASE_t *)4294425600B].ENACLR
@ ../source/HL_gio.c:69:     gioREG->LVLCLR = 0xFFU;
	.loc 1 69 0
	str	r1, [r3, #-227]	@ tmp113, MEM[(volatile struct gioBASE_t *)4294425600B].LVLCLR
@ ../source/HL_gio.c:74:     gioPORTA->DOUT = (uint32)((uint32)0U << 0U)  /* Bit 0 */
	.loc 1 74 0
	mov	r2, #0	@ tmp117,
	str	r2, [r3, #-195]	@ tmp117, MEM[(volatile struct gioPORT_t *)4294425652B].DOUT
@ ../source/HL_gio.c:84:     gioPORTA->DIR  = (uint32)((uint32)0U << 0U)  /* Bit 0 */
	.loc 1 84 0
	str	r2, [r3, #-203]	@ tmp117, MEM[(volatile struct gioPORT_t *)4294425652B].DIR
@ ../source/HL_gio.c:94:     gioPORTA->PDR  = (uint32)((uint32)0U << 0U)  /* Bit 0 */
	.loc 1 94 0
	str	r2, [r3, #-183]	@ tmp117, MEM[(volatile struct gioPORT_t *)4294425652B].PDR
@ ../source/HL_gio.c:104:     gioPORTA->PSL  = (uint32)((uint32)0U << 0U)  /* Bit 0 */
	.loc 1 104 0
	str	r2, [r3, #-175]	@ tmp117, MEM[(volatile struct gioPORT_t *)4294425652B].PSL
@ ../source/HL_gio.c:114:     gioPORTA->PULDIS  = (uint32)((uint32)0U << 0U)  /* Bit 0 */
	.loc 1 114 0
	str	r2, [r3, #-179]	@ tmp117, MEM[(volatile struct gioPORT_t *)4294425652B].PULDIS
@ ../source/HL_gio.c:126:     gioPORTB->DOUT = (uint32)((uint32)0U << 0U)  /* Bit 0 */
	.loc 1 126 0
	str	r2, [r3, #-163]	@ tmp117, MEM[(volatile struct gioPORT_t *)4294425684B].DOUT
@ ../source/HL_gio.c:136:     gioPORTB->DIR  = (uint32)((uint32)0U << 0U)  /* Bit 0 */
	.loc 1 136 0
	str	r2, [r3, #-171]	@ tmp117, MEM[(volatile struct gioPORT_t *)4294425684B].DIR
@ ../source/HL_gio.c:146:     gioPORTB->PDR  = (uint32)((uint32)0U << 0U)  /* Bit 0 */
	.loc 1 146 0
	str	r2, [r3, #-151]	@ tmp117, MEM[(volatile struct gioPORT_t *)4294425684B].PDR
@ ../source/HL_gio.c:156:     gioPORTB->PSL  = (uint32)((uint32)0U << 0U)  /* Bit 0 */
	.loc 1 156 0
	str	r2, [r3, #-143]	@ tmp117, MEM[(volatile struct gioPORT_t *)4294425684B].PSL
@ ../source/HL_gio.c:166:     gioPORTB->PULDIS  = (uint32)((uint32)0U << 0U) /* Bit 0 */
	.loc 1 166 0
	str	r2, [r3, #-147]	@ tmp117, MEM[(volatile struct gioPORT_t *)4294425684B].PULDIS
@ ../source/HL_gio.c:181:     gioREG->POL = (uint32)((uint32)0U << 0U)   /* Bit 0 */
	.loc 1 181 0
	str	r2, [r3, #-243]	@ tmp117, MEM[(volatile struct gioBASE_t *)4294425600B].POL
@ ../source/HL_gio.c:200:     gioREG->LVLSET = (uint32)((uint32)0U << 0U)   /* Bit 0 */
	.loc 1 200 0
	str	r2, [r3, #-231]	@ tmp117, MEM[(volatile struct gioBASE_t *)4294425600B].LVLSET
@ ../source/HL_gio.c:221:     gioREG->FLG = 0xFFU;
	.loc 1 221 0
	str	r1, [r3, #-223]	@ tmp113, MEM[(volatile struct gioBASE_t *)4294425600B].FLG
@ ../source/HL_gio.c:224:     gioREG->ENASET = (uint32)((uint32)0U << 0U)   /* Bit 0 */
	.loc 1 224 0
	str	r2, [r3, #-239]	@ tmp117, MEM[(volatile struct gioBASE_t *)4294425600B].ENASET
@ ../source/HL_gio.c:243: }
	.loc 1 243 0
	bx	lr	@
	.cfi_endproc
.LFE0:
	.size	gioInit, .-gioInit
	.align	2
	.global	gioSetDirection
	.syntax unified
	.arm
	.fpu vfpv3-d16
	.type	gioSetDirection, %function
gioSetDirection:
.LFB1:
	.loc 1 259 0
	.cfi_startproc
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	@ link register save eliminated.
.LVL0:
@ ../source/HL_gio.c:260:     port->DIR = dir;
	.loc 1 260 0
	str	r1, [r0]	@ dir, port_2(D)->DIR
@ ../source/HL_gio.c:261: }
	.loc 1 261 0
	bx	lr	@
	.cfi_endproc
.LFE1:
	.size	gioSetDirection, .-gioSetDirection
	.align	2
	.global	gioSetBit
	.syntax unified
	.arm
	.fpu vfpv3-d16
	.type	gioSetBit, %function
gioSetBit:
.LFB2:
	.loc 1 280 0
	.cfi_startproc
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	@ link register save eliminated.
.LVL1:
@ ../source/HL_gio.c:284:     if (value != 0U)
	.loc 1 284 0
	cmp	r2, #0	@ value,
	bne	.L6	@,
@ ../source/HL_gio.c:290:         port->DCLR = (uint32)1U << bit;
	.loc 1 290 0
	mov	r3, #1	@ tmp116,
	lsl	r1, r3, r1	@ _2, tmp116, bit
.LVL2:
	str	r1, [r0, #16]	@ _2, port_7(D)->DCLR
@ ../source/HL_gio.c:292: }
	.loc 1 292 0
	bx	lr	@
.LVL3:
.L6:
@ ../source/HL_gio.c:286:         port->DSET = (uint32)1U << bit;
	.loc 1 286 0
	mov	r3, #1	@ tmp115,
	lsl	r1, r3, r1	@ _1, tmp115, bit
.LVL4:
	str	r1, [r0, #12]	@ _1, port_7(D)->DSET
	bx	lr	@
	.cfi_endproc
.LFE2:
	.size	gioSetBit, .-gioSetBit
	.align	2
	.global	gioSetPort
	.syntax unified
	.arm
	.fpu vfpv3-d16
	.type	gioSetPort, %function
gioSetPort:
.LFB3:
	.loc 1 308 0
	.cfi_startproc
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	@ link register save eliminated.
.LVL5:
@ ../source/HL_gio.c:312:     port->DOUT = value;
	.loc 1 312 0
	str	r1, [r0, #8]	@ value, port_2(D)->DOUT
@ ../source/HL_gio.c:317: }
	.loc 1 317 0
	bx	lr	@
	.cfi_endproc
.LFE3:
	.size	gioSetPort, .-gioSetPort
	.align	2
	.global	gioGetBit
	.syntax unified
	.arm
	.fpu vfpv3-d16
	.type	gioGetBit, %function
gioGetBit:
.LFB4:
	.loc 1 335 0
	.cfi_startproc
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	@ link register save eliminated.
.LVL6:
@ ../source/HL_gio.c:339:     return (port->DIN >> bit) & 1U;
	.loc 1 339 0
	ldr	r0, [r0, #4]	@ _1, port_4(D)->DIN
.LVL7:
	lsr	r0, r0, r1	@ _2, _1, bit
@ ../source/HL_gio.c:340: }
	.loc 1 340 0
	and	r0, r0, #1	@, _2,
	bx	lr	@
	.cfi_endproc
.LFE4:
	.size	gioGetBit, .-gioGetBit
	.align	2
	.global	gioGetPort
	.syntax unified
	.arm
	.fpu vfpv3-d16
	.type	gioGetPort, %function
gioGetPort:
.LFB5:
	.loc 1 355 0
	.cfi_startproc
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	@ link register save eliminated.
.LVL8:
@ ../source/HL_gio.c:359:     return port->DIN;
	.loc 1 359 0
	ldr	r0, [r0, #4]	@ <retval>, port_2(D)->DIN
.LVL9:
@ ../source/HL_gio.c:360: }
	.loc 1 360 0
	bx	lr	@
	.cfi_endproc
.LFE5:
	.size	gioGetPort, .-gioGetPort
	.align	2
	.global	gioToggleBit
	.syntax unified
	.arm
	.fpu vfpv3-d16
	.type	gioToggleBit, %function
gioToggleBit:
.LFB6:
	.loc 1 377 0
	.cfi_startproc
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	@ link register save eliminated.
.LVL10:
@ ../source/HL_gio.c:381:     if ((port->DIN & (uint32)((uint32)1U << bit)) != 0U)
	.loc 1 381 0
	ldr	r3, [r0, #4]	@ _1, port_8(D)->DIN
	lsr	r3, r3, r1	@ tmp117, _1, bit
	tst	r3, #1	@ tmp117,
	bne	.L13	@,
@ ../source/HL_gio.c:387:         port->DSET = (uint32)1U << bit;
	.loc 1 387 0
	mov	r3, #1	@ tmp119,
	lsl	r1, r3, r1	@ _5, tmp119, bit
.LVL11:
	str	r1, [r0, #12]	@ _5, port_8(D)->DSET
@ ../source/HL_gio.c:389: }
	.loc 1 389 0
	bx	lr	@
.LVL12:
.L13:
@ ../source/HL_gio.c:383:         port->DCLR = (uint32)1U << bit;
	.loc 1 383 0
	mov	r3, #1	@ tmp118,
	lsl	r1, r3, r1	@ _4, tmp118, bit
.LVL13:
	str	r1, [r0, #16]	@ _4, port_8(D)->DCLR
	bx	lr	@
	.cfi_endproc
.LFE6:
	.size	gioToggleBit, .-gioToggleBit
	.align	2
	.global	gioEnableNotification
	.syntax unified
	.arm
	.fpu vfpv3-d16
	.type	gioEnableNotification, %function
gioEnableNotification:
.LFB7:
	.loc 1 406 0
	.cfi_startproc
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	@ link register save eliminated.
.LVL14:
@ ../source/HL_gio.c:410:     if (port == gioPORTA)
	.loc 1 410 0
	movw	r3, #48180	@ tmp115,
	movt	r3, 65527	@ tmp115,
	cmp	r0, r3	@ port, tmp115
	beq	.L17	@,
@ ../source/HL_gio.c:414:     else if (port == gioPORTB)
	.loc 1 414 0
	movw	r3, #48212	@ tmp118,
	movt	r3, 65527	@ tmp118,
	cmp	r0, r3	@ port, tmp118
	bxne	lr	@
@ ../source/HL_gio.c:416:         gioREG->ENASET = (uint32)1U << (bit + 8U);
	.loc 1 416 0
	add	r1, r1, #8	@ _2, bit,
.LVL15:
	mov	r3, #1	@ tmp119,
	lsl	r1, r3, r1	@ _3, tmp119, _2
.LVL16:
	movw	r3, #48383	@ tmp120,
	movt	r3, 65527	@ tmp120,
	str	r1, [r3, #-239]	@ _3, MEM[(volatile struct gioBASE_t *)4294425600B].ENASET
@ ../source/HL_gio.c:422: }
	.loc 1 422 0
	bx	lr	@
.LVL17:
.L17:
@ ../source/HL_gio.c:412:         gioREG->ENASET = (uint32)1U << bit;
	.loc 1 412 0
	mov	r3, #1	@ tmp116,
	lsl	r1, r3, r1	@ _1, tmp116, bit
.LVL18:
	movw	r3, #48383	@ tmp117,
	movt	r3, 65527	@ tmp117,
	str	r1, [r3, #-239]	@ _1, MEM[(volatile struct gioBASE_t *)4294425600B].ENASET
	bx	lr	@
	.cfi_endproc
.LFE7:
	.size	gioEnableNotification, .-gioEnableNotification
	.align	2
	.global	gioDisableNotification
	.syntax unified
	.arm
	.fpu vfpv3-d16
	.type	gioDisableNotification, %function
gioDisableNotification:
.LFB8:
	.loc 1 440 0
	.cfi_startproc
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	@ link register save eliminated.
.LVL19:
@ ../source/HL_gio.c:444:     if (port == gioPORTA)
	.loc 1 444 0
	movw	r3, #48180	@ tmp115,
	movt	r3, 65527	@ tmp115,
	cmp	r0, r3	@ port, tmp115
	beq	.L21	@,
@ ../source/HL_gio.c:448:     else if (port == gioPORTB)
	.loc 1 448 0
	movw	r3, #48212	@ tmp118,
	movt	r3, 65527	@ tmp118,
	cmp	r0, r3	@ port, tmp118
	bxne	lr	@
@ ../source/HL_gio.c:450:         gioREG->ENACLR = (uint32)1U << (bit + 8U);
	.loc 1 450 0
	add	r1, r1, #8	@ _2, bit,
.LVL20:
	mov	r3, #1	@ tmp119,
	lsl	r1, r3, r1	@ _3, tmp119, _2
.LVL21:
	movw	r3, #48383	@ tmp120,
	movt	r3, 65527	@ tmp120,
	str	r1, [r3, #-235]	@ _3, MEM[(volatile struct gioBASE_t *)4294425600B].ENACLR
@ ../source/HL_gio.c:456: }
	.loc 1 456 0
	bx	lr	@
.LVL22:
.L21:
@ ../source/HL_gio.c:446:         gioREG->ENACLR = (uint32)1U << bit;
	.loc 1 446 0
	mov	r3, #1	@ tmp116,
	lsl	r1, r3, r1	@ _1, tmp116, bit
.LVL23:
	movw	r3, #48383	@ tmp117,
	movt	r3, 65527	@ tmp117,
	str	r1, [r3, #-235]	@ _1, MEM[(volatile struct gioBASE_t *)4294425600B].ENACLR
	bx	lr	@
	.cfi_endproc
.LFE8:
	.size	gioDisableNotification, .-gioDisableNotification
	.align	2
	.global	gioGetConfigValue
	.syntax unified
	.arm
	.fpu vfpv3-d16
	.type	gioGetConfigValue, %function
gioGetConfigValue:
.LFB9:
	.loc 1 477 0
	.cfi_startproc
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	@ link register save eliminated.
.LVL24:
@ ../source/HL_gio.c:478:     if (type == InitialValue)
	.loc 1 478 0
	cmp	r1, #0	@ type,
	beq	.L25	@,
@ ../source/HL_gio.c:498:         config_reg->CONFIG_INTDET    = gioREG->INTDET;
	.loc 1 498 0
	movw	r3, #48383	@ tmp136,
	movt	r3, 65527	@ tmp136,
	ldr	r2, [r3, #-247]	@ _1, MEM[(volatile struct gioBASE_t *)4294425600B].INTDET
	str	r2, [r0]	@ _1, config_reg_16(D)->CONFIG_INTDET
@ ../source/HL_gio.c:499:         config_reg->CONFIG_POL       = gioREG->POL;
	.loc 1 499 0
	ldr	r2, [r3, #-243]	@ _2, MEM[(volatile struct gioBASE_t *)4294425600B].POL
	str	r2, [r0, #4]	@ _2, config_reg_16(D)->CONFIG_POL
@ ../source/HL_gio.c:500:         config_reg->CONFIG_INTENASET = gioREG->ENASET;
	.loc 1 500 0
	ldr	r2, [r3, #-239]	@ _3, MEM[(volatile struct gioBASE_t *)4294425600B].ENASET
	str	r2, [r0, #8]	@ _3, config_reg_16(D)->CONFIG_INTENASET
@ ../source/HL_gio.c:501:         config_reg->CONFIG_LVLSET    = gioREG->LVLSET;
	.loc 1 501 0
	ldr	r2, [r3, #-231]	@ _4, MEM[(volatile struct gioBASE_t *)4294425600B].LVLSET
	str	r2, [r0, #12]	@ _4, config_reg_16(D)->CONFIG_LVLSET
@ ../source/HL_gio.c:503:         config_reg->CONFIG_PORTADIR    = gioPORTA->DIR;   
	.loc 1 503 0
	ldr	r2, [r3, #-203]	@ _5, MEM[(volatile struct gioPORT_t *)4294425652B].DIR
	str	r2, [r0, #16]	@ _5, config_reg_16(D)->CONFIG_PORTADIR
@ ../source/HL_gio.c:504:         config_reg->CONFIG_PORTAPDR    = gioPORTA->PDR;   
	.loc 1 504 0
	ldr	r2, [r3, #-183]	@ _6, MEM[(volatile struct gioPORT_t *)4294425652B].PDR
	str	r2, [r0, #20]	@ _6, config_reg_16(D)->CONFIG_PORTAPDR
@ ../source/HL_gio.c:505:         config_reg->CONFIG_PORTAPSL    = gioPORTA->PSL;
	.loc 1 505 0
	ldr	r2, [r3, #-175]	@ _7, MEM[(volatile struct gioPORT_t *)4294425652B].PSL
	str	r2, [r0, #24]	@ _7, config_reg_16(D)->CONFIG_PORTAPSL
@ ../source/HL_gio.c:506:         config_reg->CONFIG_PORTAPULDIS = gioPORTA->PULDIS;   
	.loc 1 506 0
	ldr	r2, [r3, #-179]	@ _8, MEM[(volatile struct gioPORT_t *)4294425652B].PULDIS
	str	r2, [r0, #28]	@ _8, config_reg_16(D)->CONFIG_PORTAPULDIS
@ ../source/HL_gio.c:508:         config_reg->CONFIG_PORTBDIR    = gioPORTB->DIR;   
	.loc 1 508 0
	ldr	r2, [r3, #-171]	@ _9, MEM[(volatile struct gioPORT_t *)4294425684B].DIR
	str	r2, [r0, #32]	@ _9, config_reg_16(D)->CONFIG_PORTBDIR
@ ../source/HL_gio.c:509:         config_reg->CONFIG_PORTBPDR    = gioPORTB->PDR;   
	.loc 1 509 0
	ldr	r2, [r3, #-151]	@ _10, MEM[(volatile struct gioPORT_t *)4294425684B].PDR
	str	r2, [r0, #36]	@ _10, config_reg_16(D)->CONFIG_PORTBPDR
@ ../source/HL_gio.c:510:         config_reg->CONFIG_PORTBPSL    = gioPORTB->PULDIS;
	.loc 1 510 0
	ldr	r2, [r3, #-147]	@ _11, MEM[(volatile struct gioPORT_t *)4294425684B].PULDIS
	str	r2, [r0, #40]	@ _11, config_reg_16(D)->CONFIG_PORTBPSL
@ ../source/HL_gio.c:511:         config_reg->CONFIG_PORTBPULDIS = gioPORTB->PSL;   
	.loc 1 511 0
	ldr	r3, [r3, #-143]	@ _12, MEM[(volatile struct gioPORT_t *)4294425684B].PSL
	str	r3, [r0, #44]	@ _12, config_reg_16(D)->CONFIG_PORTBPULDIS
@ ../source/HL_gio.c:513: }
	.loc 1 513 0
	bx	lr	@
.L25:
@ ../source/HL_gio.c:480:         config_reg->CONFIG_INTDET    = GIO_INTDET_CONFIGVALUE;
	.loc 1 480 0
	mov	r3, #0	@ tmp124,
	str	r3, [r0]	@ tmp124, config_reg_16(D)->CONFIG_INTDET
@ ../source/HL_gio.c:481:         config_reg->CONFIG_POL       = GIO_POL_CONFIGVALUE;
	.loc 1 481 0
	str	r3, [r0, #4]	@ tmp124, config_reg_16(D)->CONFIG_POL
@ ../source/HL_gio.c:482:         config_reg->CONFIG_INTENASET = GIO_INTENASET_CONFIGVALUE;
	.loc 1 482 0
	str	r3, [r0, #8]	@ tmp124, config_reg_16(D)->CONFIG_INTENASET
@ ../source/HL_gio.c:483:         config_reg->CONFIG_LVLSET    = GIO_LVLSET_CONFIGVALUE;
	.loc 1 483 0
	str	r3, [r0, #12]	@ tmp124, config_reg_16(D)->CONFIG_LVLSET
@ ../source/HL_gio.c:485:         config_reg->CONFIG_PORTADIR    = GIO_PORTADIR_CONFIGVALUE;
	.loc 1 485 0
	str	r3, [r0, #16]	@ tmp124, config_reg_16(D)->CONFIG_PORTADIR
@ ../source/HL_gio.c:486:         config_reg->CONFIG_PORTAPDR    = GIO_PORTAPDR_CONFIGVALUE;
	.loc 1 486 0
	str	r3, [r0, #20]	@ tmp124, config_reg_16(D)->CONFIG_PORTAPDR
@ ../source/HL_gio.c:487:         config_reg->CONFIG_PORTAPSL    = GIO_PORTAPSL_CONFIGVALUE;
	.loc 1 487 0
	str	r3, [r0, #24]	@ tmp124, config_reg_16(D)->CONFIG_PORTAPSL
@ ../source/HL_gio.c:488:         config_reg->CONFIG_PORTAPULDIS = GIO_PORTAPULDIS_CONFIGVALUE;
	.loc 1 488 0
	str	r3, [r0, #28]	@ tmp124, config_reg_16(D)->CONFIG_PORTAPULDIS
@ ../source/HL_gio.c:490:         config_reg->CONFIG_PORTBDIR    = GIO_PORTBDIR_CONFIGVALUE;
	.loc 1 490 0
	str	r3, [r0, #32]	@ tmp124, config_reg_16(D)->CONFIG_PORTBDIR
@ ../source/HL_gio.c:491:         config_reg->CONFIG_PORTBPDR    = GIO_PORTBPDR_CONFIGVALUE;
	.loc 1 491 0
	str	r3, [r0, #36]	@ tmp124, config_reg_16(D)->CONFIG_PORTBPDR
@ ../source/HL_gio.c:492:         config_reg->CONFIG_PORTBPSL    = GIO_PORTBPSL_CONFIGVALUE;
	.loc 1 492 0
	str	r3, [r0, #40]	@ tmp124, config_reg_16(D)->CONFIG_PORTBPSL
@ ../source/HL_gio.c:493:         config_reg->CONFIG_PORTBPULDIS = GIO_PORTBPULDIS_CONFIGVALUE;
	.loc 1 493 0
	str	r3, [r0, #44]	@ tmp124, config_reg_16(D)->CONFIG_PORTBPULDIS
	bx	lr	@
	.cfi_endproc
.LFE9:
	.size	gioGetConfigValue, .-gioGetConfigValue
.Letext0:
	.file 2 "/home/mr_halfword/ti/ccs901/ccs/tools/compiler/gcc-arm-none-eabi-7-2017-q4-major/arm-none-eabi/include/machine/_default_types.h"
	.file 3 "/home/mr_halfword/ti/ccs901/ccs/tools/compiler/gcc-arm-none-eabi-7-2017-q4-major/arm-none-eabi/include/sys/_stdint.h"
	.file 4 "/home/mr_halfword/workspace_v9/TMS570LC4357_GCC_halcogen/include/HL_hal_stdtypes.h"
	.file 5 "/home/mr_halfword/workspace_v9/TMS570LC4357_GCC_halcogen/include/HL_sys_common.h"
	.file 6 "/home/mr_halfword/workspace_v9/TMS570LC4357_GCC_halcogen/include/HL_reg_gio.h"
	.file 7 "/home/mr_halfword/workspace_v9/TMS570LC4357_GCC_halcogen/include/HL_gio.h"
	.section	.debug_info,"",%progbits
.Ldebug_info0:
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	.2byte	0x3
	.4byte	.Ldebug_abbrev0
	.byte	0x4
	.uleb128 0x1
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	.byte	0xc
	.4byte	.LASF65
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	.4byte	.Ltext0
	.4byte	.Letext0
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	.uleb128 0x2
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	.uleb128 0x2
	.byte	0x1
	.byte	0x8
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	.uleb128 0x2
	.byte	0x2
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	.4byte	.LASF2
	.uleb128 0x2
	.byte	0x2
	.byte	0x7
	.4byte	.LASF3
	.uleb128 0x2
	.byte	0x4
	.byte	0x5
	.4byte	.LASF4
	.uleb128 0x3
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	.byte	0x4f
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	.uleb128 0x2
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	.byte	0x5
	.ascii	"int\000"
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	.byte	0x4
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	.byte	0x8
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	.byte	0xc
	.uleb128 0x8
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	.4byte	0x81
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	.byte	0x1
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	.uleb128 0xc
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	.uleb128 0xe
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	.4byte	.LASF55
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	.byte	0x50
	.uleb128 0xc
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	.byte	0x1
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	.byte	0
	.uleb128 0xb
	.byte	0x1
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	.byte	0x1
	.2byte	0x117
	.byte	0x1
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	.byte	0x1
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	.byte	0x1
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	.uleb128 0xe
	.ascii	"bit\000"
	.byte	0x1
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	.uleb128 0xc
	.4byte	.LASF61
	.byte	0x1
	.2byte	0x117
	.4byte	0x81
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	.byte	0x52
	.byte	0
	.uleb128 0xb
	.byte	0x1
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	.byte	0x1
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	.byte	0x1
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	.4byte	.LFE1
	.byte	0x1
	.byte	0x9c
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	.uleb128 0xc
	.4byte	.LASF55
	.byte	0x1
	.2byte	0x102
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	.byte	0x50
	.uleb128 0x11
	.ascii	"dir\000"
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	.section	.debug_abbrev,"",%progbits
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	.uleb128 0x1b
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	.uleb128 0x11
	.uleb128 0x1
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	.uleb128 0x3a
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	.uleb128 0x3b
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	.uleb128 0x1
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	.uleb128 0xd
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	.uleb128 0x49
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	.uleb128 0x3
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	.byte	0
	.byte	0
	.uleb128 0xb
	.uleb128 0x2e
	.byte	0x1
	.uleb128 0x3f
	.uleb128 0xc
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	.uleb128 0x1
	.uleb128 0x40
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	.uleb128 0x1
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	.byte	0
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	.uleb128 0xc
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	.byte	0
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	.uleb128 0xb
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	.uleb128 0xb
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	.byte	0
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	.section	.debug_loc,"",%progbits
.Ldebug_loc0:
.LLST5:
	.4byte	.LVL19-.Ltext0
	.4byte	.LVL20-.Ltext0
	.2byte	0x1
	.byte	0x51
	.4byte	.LVL22-.Ltext0
	.4byte	.LVL23-.Ltext0
	.2byte	0x1
	.byte	0x51
	.4byte	0
	.4byte	0
.LLST4:
	.4byte	.LVL14-.Ltext0
	.4byte	.LVL15-.Ltext0
	.2byte	0x1
	.byte	0x51
	.4byte	.LVL17-.Ltext0
	.4byte	.LVL18-.Ltext0
	.2byte	0x1
	.byte	0x51
	.4byte	0
	.4byte	0
.LLST3:
	.4byte	.LVL10-.Ltext0
	.4byte	.LVL11-.Ltext0
	.2byte	0x1
	.byte	0x51
	.4byte	.LVL12-.Ltext0
	.4byte	.LVL13-.Ltext0
	.2byte	0x1
	.byte	0x51
	.4byte	0
	.4byte	0
.LLST2:
	.4byte	.LVL8-.Ltext0
	.4byte	.LVL9-.Ltext0
	.2byte	0x1
	.byte	0x50
	.4byte	0
	.4byte	0
.LLST1:
	.4byte	.LVL6-.Ltext0
	.4byte	.LVL7-.Ltext0
	.2byte	0x1
	.byte	0x50
	.4byte	0
	.4byte	0
.LLST0:
	.4byte	.LVL1-.Ltext0
	.4byte	.LVL2-.Ltext0
	.2byte	0x1
	.byte	0x51
	.4byte	.LVL3-.Ltext0
	.4byte	.LVL4-.Ltext0
	.2byte	0x1
	.byte	0x51
	.4byte	0
	.4byte	0
	.section	.debug_aranges,"",%progbits
	.4byte	0x1c
	.2byte	0x2
	.4byte	.Ldebug_info0
	.byte	0x4
	.byte	0
	.2byte	0
	.2byte	0
	.4byte	.Ltext0
	.4byte	.Letext0-.Ltext0
	.4byte	0
	.4byte	0
	.section	.debug_line,"",%progbits
.Ldebug_line0:
	.section	.debug_str,"MS",%progbits,1
.LASF34:
	.ascii	"DCLR\000"
.LASF36:
	.ascii	"gioPORT_t\000"
.LASF32:
	.ascii	"DOUT\000"
.LASF22:
	.ascii	"ENACLR\000"
.LASF52:
	.ascii	"type\000"
.LASF53:
	.ascii	"gioGetConfigValue\000"
.LASF7:
	.ascii	"long long unsigned int\000"
.LASF6:
	.ascii	"long long int\000"
.LASF0:
	.ascii	"signed char\000"
.LASF19:
	.ascii	"rsvd\000"
.LASF64:
	.ascii	"GNU C11 7.2.1 20170904 (release) [ARM/embedded-7-br"
	.ascii	"anch revision 255204] -mcpu=cortex-r5 -mfloat-abi=h"
	.ascii	"ard -mfpu=vfpv3-d16 -g -gdwarf-3 -gstrict-dwarf -Og"
	.ascii	"\000"
.LASF4:
	.ascii	"long int\000"
.LASF50:
	.ascii	"gio_config_reg_t\000"
.LASF33:
	.ascii	"DSET\000"
.LASF27:
	.ascii	"EMU1\000"
.LASF14:
	.ascii	"double\000"
.LASF46:
	.ascii	"CONFIG_PORTBDIR\000"
.LASF21:
	.ascii	"ENASET\000"
.LASF11:
	.ascii	"uint32\000"
.LASF25:
	.ascii	"OFF1\000"
.LASF9:
	.ascii	"__uint32_t\000"
.LASF55:
	.ascii	"port\000"
.LASF61:
	.ascii	"value\000"
.LASF8:
	.ascii	"unsigned int\000"
.LASF17:
	.ascii	"config_value_type_t\000"
.LASF24:
	.ascii	"LVLCLR\000"
.LASF5:
	.ascii	"long unsigned int\000"
.LASF42:
	.ascii	"CONFIG_PORTADIR\000"
.LASF20:
	.ascii	"INTDET\000"
.LASF48:
	.ascii	"CONFIG_PORTBPSL\000"
.LASF41:
	.ascii	"CONFIG_LVLSET\000"
.LASF3:
	.ascii	"short unsigned int\000"
.LASF66:
	.ascii	"/home/mr_halfword/workspace_v9/TMS570LC4357_GCC_hal"
	.ascii	"cogen/Debug\000"
.LASF63:
	.ascii	"gioSetDirection\000"
.LASF47:
	.ascii	"CONFIG_PORTBPDR\000"
.LASF18:
	.ascii	"GCR0\000"
.LASF26:
	.ascii	"OFF2\000"
.LASF15:
	.ascii	"InitialValue\000"
.LASF56:
	.ascii	"gioEnableNotification\000"
.LASF49:
	.ascii	"CONFIG_PORTBPULDIS\000"
.LASF39:
	.ascii	"CONFIG_POL\000"
.LASF62:
	.ascii	"gioSetBit\000"
.LASF58:
	.ascii	"gioGetPort\000"
.LASF44:
	.ascii	"CONFIG_PORTAPSL\000"
.LASF16:
	.ascii	"CurrentValue\000"
.LASF38:
	.ascii	"CONFIG_INTDET\000"
.LASF43:
	.ascii	"CONFIG_PORTAPDR\000"
.LASF23:
	.ascii	"LVLSET\000"
.LASF40:
	.ascii	"CONFIG_INTENASET\000"
.LASF31:
	.ascii	"gioPort\000"
.LASF13:
	.ascii	"float\000"
.LASF65:
	.ascii	"../source/HL_gio.c\000"
.LASF12:
	.ascii	"_Bool\000"
.LASF1:
	.ascii	"unsigned char\000"
.LASF45:
	.ascii	"CONFIG_PORTAPULDIS\000"
.LASF2:
	.ascii	"short int\000"
.LASF30:
	.ascii	"gioBase\000"
.LASF10:
	.ascii	"uint32_t\000"
.LASF29:
	.ascii	"gioBASE_t\000"
.LASF57:
	.ascii	"gioToggleBit\000"
.LASF67:
	.ascii	"config_value_type\000"
.LASF59:
	.ascii	"gioGetBit\000"
.LASF28:
	.ascii	"EMU2\000"
.LASF37:
	.ascii	"gio_config_reg\000"
.LASF54:
	.ascii	"gioDisableNotification\000"
.LASF51:
	.ascii	"config_reg\000"
.LASF35:
	.ascii	"PULDIS\000"
.LASF60:
	.ascii	"gioSetPort\000"
.LASF68:
	.ascii	"gioInit\000"
	.ident	"GCC: (GNU Tools for Arm Embedded Processors 7-2017-q4-major) 7.2.1 20170904 (release) [ARM/embedded-7-branch revision 255204]"
