	.cpu cortex-r5
	.eabi_attribute 28, 1	@ Tag_ABI_VFP_args
	.eabi_attribute 20, 1	@ Tag_ABI_FP_denormal
	.eabi_attribute 21, 1	@ Tag_ABI_FP_exceptions
	.eabi_attribute 23, 3	@ Tag_ABI_FP_number_model
	.eabi_attribute 24, 1	@ Tag_ABI_align8_needed
	.eabi_attribute 25, 1	@ Tag_ABI_align8_preserved
	.eabi_attribute 26, 1	@ Tag_ABI_enum_size
	.eabi_attribute 30, 1	@ Tag_ABI_optimization_goals
	.eabi_attribute 34, 1	@ Tag_CPU_unaligned_access
	.eabi_attribute 18, 4	@ Tag_ABI_PCS_wchar_t
	.file	"HL_adc.c"
@ GNU C11 (GNU Tools for Arm Embedded Processors 7-2017-q4-major) version 7.2.1 20170904 (release) [ARM/embedded-7-branch revision 255204] (arm-none-eabi)
@	compiled by GNU C version 4.8.4, GMP version 6.1.0, MPFR version 3.1.4, MPC version 1.0.3, isl version isl-0.15-GMP

@ GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072
@ options passed:  -fpreprocessed HL_adc.i -mcpu=cortex-r5 -mfloat-abi=hard
@ -mfpu=vfpv3-d16 -auxbase-strip source/HL_adc.o -g -gdwarf-3
@ -gstrict-dwarf -Og -Wall -fverbose-asm
@ options enabled:  -faggressive-loop-optimizations -fauto-inc-dec
@ -fchkp-check-incomplete-type -fchkp-check-read -fchkp-check-write
@ -fchkp-instrument-calls -fchkp-narrow-bounds -fchkp-optimize
@ -fchkp-store-bounds -fchkp-use-static-bounds
@ -fchkp-use-static-const-bounds -fchkp-use-wrappers
@ -fcombine-stack-adjustments -fcommon -fcompare-elim -fcprop-registers
@ -fdefer-pop -fdelete-null-pointer-checks -fdwarf2-cfi-asm
@ -fearly-inlining -feliminate-unused-debug-types -fforward-propagate
@ -ffp-int-builtin-inexact -ffunction-cse -fgcse-lm -fgnu-runtime
@ -fgnu-unique -fguess-branch-probability -fident -finline -finline-atomics
@ -fipa-profile -fipa-pure-const -fipa-reference -fira-hoist-pressure
@ -fira-share-save-slots -fira-share-spill-slots -fivopts
@ -fkeep-static-consts -fleading-underscore -flifetime-dse
@ -flto-odr-type-merging -fmath-errno -fmerge-constants
@ -fmerge-debug-strings -fomit-frame-pointer -fpeephole -fplt
@ -fprefetch-loop-arrays -freg-struct-return -freorder-blocks
@ -fsched-critical-path-heuristic -fsched-dep-count-heuristic
@ -fsched-group-heuristic -fsched-interblock -fsched-last-insn-heuristic
@ -fsched-pressure -fsched-rank-heuristic -fsched-spec
@ -fsched-spec-insn-heuristic -fsched-stalled-insns-dep -fsection-anchors
@ -fsemantic-interposition -fshow-column -fshrink-wrap
@ -fshrink-wrap-separate -fsigned-zeros -fsplit-ivs-in-unroller
@ -fsplit-wide-types -fssa-backprop -fstdarg-opt
@ -fstrict-volatile-bitfields -fsync-libcalls -ftoplevel-reorder
@ -ftrapping-math -ftree-builtin-call-dce -ftree-ccp -ftree-ch
@ -ftree-coalesce-vars -ftree-copy-prop -ftree-cselim -ftree-dce
@ -ftree-dominator-opts -ftree-dse -ftree-forwprop -ftree-fre
@ -ftree-loop-if-convert -ftree-loop-im -ftree-loop-ivcanon
@ -ftree-loop-optimize -ftree-parallelize-loops= -ftree-phiprop
@ -ftree-reassoc -ftree-scev-cprop -ftree-sink -ftree-slsr -ftree-ter
@ -funit-at-a-time -fvar-tracking -fvar-tracking-assignments -fverbose-asm
@ -fzero-initialized-in-bss -gstrict-dwarf -marm -mlittle-endian
@ -mpic-data-is-text-relative -msched-prolog -munaligned-access
@ -mvectorize-with-neon-quad

	.text
.Ltext0:
	.cfi_sections	.debug_frame
	.align	2
	.global	adcInit
	.syntax unified
	.arm
	.fpu vfpv3-d16
	.type	adcInit, %function
adcInit:
.LFB0:
	.file 1 "../source/HL_adc.c"
	.loc 1 71 0
	.cfi_startproc
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	@ link register save eliminated.
@ ../source/HL_adc.c:78:     adcREG1->RSTCR = 1U;
	.loc 1 78 0
	movw	r3, #49407	@ tmp128,
	movt	r3, 65527	@ tmp128,
	mov	r0, #1	@ tmp129,
	str	r0, [r3, #-255]	@ tmp129, MEM[(volatile struct adcBASE_t *)4294426624B].RSTCR
@ ../source/HL_adc.c:79:     adcREG1->RSTCR = 0U;
	.loc 1 79 0
	mov	r2, #0	@ tmp131,
	str	r2, [r3, #-255]	@ tmp131, MEM[(volatile struct adcBASE_t *)4294426624B].RSTCR
@ ../source/HL_adc.c:82:     adcREG1->OPMODECR |= 0x80000000U;
	.loc 1 82 0
	ldr	r1, [r3, #-251]	@ _1, MEM[(volatile struct adcBASE_t *)4294426624B].OPMODECR
	orr	r1, r1, #-2147483648	@ _2, _1,
	str	r1, [r3, #-251]	@ _2, MEM[(volatile struct adcBASE_t *)4294426624B].OPMODECR
@ ../source/HL_adc.c:85:     adcREG1->CLOCKCR = 7U;
	.loc 1 85 0
	mov	r1, #7	@ tmp135,
	str	r1, [r3, #-247]	@ tmp135, MEM[(volatile struct adcBASE_t *)4294426624B].CLOCKCR
@ ../source/HL_adc.c:88:     adcREG1->BNDCR  = (uint32)((uint32)8U << 16U) | (8U + 8U);
	.loc 1 88 0
	mov	r1, #16	@ tmp137,
	movt	r1, 8	@ tmp137,
	str	r1, [r3, #-167]	@ tmp137, MEM[(volatile struct adcBASE_t *)4294426624B].BNDCR
@ ../source/HL_adc.c:89:     adcREG1->BNDEND = (adcREG1->BNDEND & 0xFFFF0000U) | (2U);
	.loc 1 89 0
	ldr	r1, [r3, #-163]	@ _3, MEM[(volatile struct adcBASE_t *)4294426624B].BNDEND
	lsr	r1, r1, #16	@ _4, _3,
	lsl	r1, r1, #16	@ _4, _4,
	orr	r1, r1, #2	@ _5, _4,
	str	r1, [r3, #-163]	@ _5, MEM[(volatile struct adcBASE_t *)4294426624B].BNDEND
@ ../source/HL_adc.c:96:     adcREG1->GxMODECR[0U] = (uint32)ADC_12_BIT
	.loc 1 96 0
	str	r2, [r3, #-239]	@ tmp131, MEM[(volatile struct adcBASE_t *)4294426624B].GxMODECR
@ ../source/HL_adc.c:104:     adcREG1->EVSRC = (uint32)0x00000000U
	.loc 1 104 0
	str	r2, [r3, #-227]	@ tmp131, MEM[(volatile struct adcBASE_t *)4294426624B].EVSRC
@ ../source/HL_adc.c:108:     adcREG1->EVSAMP = 1U;
	.loc 1 108 0
	str	r0, [r3, #-159]	@ tmp129, MEM[(volatile struct adcBASE_t *)4294426624B].EVSAMP
@ ../source/HL_adc.c:114:     adcREG1->EVSAMPDISEN = (uint32)((uint32)0U << 8U)
	.loc 1 114 0
	str	r2, [r3, #29]	@ tmp131, MEM[(volatile struct adcBASE_t *)4294426624B].EVSAMPDISEN
@ ../source/HL_adc.c:122:     adcREG1->GxMODECR[1U] = (uint32)ADC_12_BIT
	.loc 1 122 0
	str	r2, [r3, #-235]	@ tmp131, MEM[(volatile struct adcBASE_t *)4294426624B].GxMODECR
@ ../source/HL_adc.c:131:     adcREG1->G1SRC = (uint32)0x00000000U
	.loc 1 131 0
	str	r2, [r3, #-223]	@ tmp131, MEM[(volatile struct adcBASE_t *)4294426624B].G1SRC
@ ../source/HL_adc.c:135:     adcREG1->G1SAMP = 1U;
	.loc 1 135 0
	str	r0, [r3, #-155]	@ tmp129, MEM[(volatile struct adcBASE_t *)4294426624B].G1SAMP
@ ../source/HL_adc.c:141:     adcREG1->G1SAMPDISEN = (uint32)((uint32)0U << 8U)
	.loc 1 141 0
	str	r2, [r3, #33]	@ tmp131, MEM[(volatile struct adcBASE_t *)4294426624B].G1SAMPDISEN
@ ../source/HL_adc.c:149:     adcREG1->GxMODECR[2U] = (uint32)ADC_12_BIT
	.loc 1 149 0
	str	r2, [r3, #-231]	@ tmp131, MEM[(volatile struct adcBASE_t *)4294426624B].GxMODECR
@ ../source/HL_adc.c:158:     adcREG1->G2SRC = (uint32)0x00000000U
	.loc 1 158 0
	str	r2, [r3, #-219]	@ tmp131, MEM[(volatile struct adcBASE_t *)4294426624B].G2SRC
@ ../source/HL_adc.c:162:     adcREG1->G2SAMP = 1U;
	.loc 1 162 0
	str	r0, [r3, #-151]	@ tmp129, MEM[(volatile struct adcBASE_t *)4294426624B].G2SAMP
@ ../source/HL_adc.c:168:     adcREG1->G2SAMPDISEN = (uint32)((uint32)0U << 8U)
	.loc 1 168 0
	str	r2, [r3, #37]	@ tmp131, MEM[(volatile struct adcBASE_t *)4294426624B].G2SAMPDISEN
@ ../source/HL_adc.c:172:     adcREG1->EVTOUT = 0U;
	.loc 1 172 0
	str	r2, [r3, #1]	@ tmp131, MEM[(volatile struct adcBASE_t *)4294426624B].EVTOUT
@ ../source/HL_adc.c:175:     adcREG1->EVTDIR = 0U;
	.loc 1 175 0
	str	r2, [r3, #-3]	@ tmp131, MEM[(volatile struct adcBASE_t *)4294426624B].EVTDIR
@ ../source/HL_adc.c:178: 	adcREG1->EVTPDR = 0U;
	.loc 1 178 0
	str	r2, [r3, #17]	@ tmp131, MEM[(volatile struct adcBASE_t *)4294426624B].EVTPDR
@ ../source/HL_adc.c:181: 	adcREG1->EVTPSEL = 1U;
	.loc 1 181 0
	str	r0, [r3, #25]	@ tmp129, MEM[(volatile struct adcBASE_t *)4294426624B].EVTPSEL
@ ../source/HL_adc.c:184: 	adcREG1->EVTDIS = 0U;
	.loc 1 184 0
	str	r2, [r3, #21]	@ tmp131, MEM[(volatile struct adcBASE_t *)4294426624B].EVTDIS
@ ../source/HL_adc.c:187:     adcREG1->OPMODECR |= 0x80140001U;
	.loc 1 187 0
	ldr	r2, [r3, #-251]	@ _6, MEM[(volatile struct adcBASE_t *)4294426624B].OPMODECR
	orr	r2, r2, #-2147483647	@ _7, _6,
	orr	r2, r2, #1310720	@ _7, _7,
	str	r2, [r3, #-251]	@ _7, MEM[(volatile struct adcBASE_t *)4294426624B].OPMODECR
.L2:
@ ../source/HL_adc.c:191:     while (((adcREG1->BNDEND & 0xFFFF0000U) >> 16U ) != 0U) 
	.loc 1 191 0
	movw	r3, #49407	@ tmp178,
	movt	r3, 65527	@ tmp178,
	ldr	r3, [r3, #-163]	@ _8, MEM[(volatile struct adcBASE_t *)4294426624B].BNDEND
	lsrs	r3, r3, #16	@ tmp234, _8,
	bne	.L2	@,
@ ../source/HL_adc.c:196:     adcREG1->PARCR = 0x00000005U;
	.loc 1 196 0
	movw	r3, #49407	@ tmp179,
	movt	r3, 65527	@ tmp179,
	mov	r2, #5	@ tmp180,
	str	r2, [r3, #129]	@ tmp180, MEM[(volatile struct adcBASE_t *)4294426624B].PARCR
@ ../source/HL_adc.c:203:     adcREG2->RSTCR = 1U;
	.loc 1 203 0
	movw	r3, #49919	@ tmp181,
	movt	r3, 65527	@ tmp181,
	mov	r0, #1	@ tmp182,
	str	r0, [r3, #-255]	@ tmp182, MEM[(volatile struct adcBASE_t *)4294427136B].RSTCR
@ ../source/HL_adc.c:204:     adcREG2->RSTCR = 0U;
	.loc 1 204 0
	mov	r2, #0	@ tmp184,
	str	r2, [r3, #-255]	@ tmp184, MEM[(volatile struct adcBASE_t *)4294427136B].RSTCR
@ ../source/HL_adc.c:207:     adcREG2->OPMODECR |= 0x80000000U;
	.loc 1 207 0
	ldr	r1, [r3, #-251]	@ _10, MEM[(volatile struct adcBASE_t *)4294427136B].OPMODECR
	orr	r1, r1, #-2147483648	@ _11, _10,
	str	r1, [r3, #-251]	@ _11, MEM[(volatile struct adcBASE_t *)4294427136B].OPMODECR
@ ../source/HL_adc.c:210:     adcREG2->CLOCKCR = 7U;
	.loc 1 210 0
	mov	r1, #7	@ tmp188,
	str	r1, [r3, #-247]	@ tmp188, MEM[(volatile struct adcBASE_t *)4294427136B].CLOCKCR
@ ../source/HL_adc.c:213:     adcREG2->BNDCR  = (uint32)((uint32)8U << 16U) | (8U + 8U);
	.loc 1 213 0
	mov	r1, #16	@ tmp190,
	movt	r1, 8	@ tmp190,
	str	r1, [r3, #-167]	@ tmp190, MEM[(volatile struct adcBASE_t *)4294427136B].BNDCR
@ ../source/HL_adc.c:214:     adcREG2->BNDEND = (adcREG2->BNDEND & 0xFFFF0000U) | (2U);
	.loc 1 214 0
	ldr	r1, [r3, #-163]	@ _12, MEM[(volatile struct adcBASE_t *)4294427136B].BNDEND
	lsr	r1, r1, #16	@ _13, _12,
	lsl	r1, r1, #16	@ _13, _13,
	orr	r1, r1, #2	@ _14, _13,
	str	r1, [r3, #-163]	@ _14, MEM[(volatile struct adcBASE_t *)4294427136B].BNDEND
@ ../source/HL_adc.c:221:     adcREG2->GxMODECR[0U] = (uint32)ADC_12_BIT
	.loc 1 221 0
	str	r2, [r3, #-239]	@ tmp184, MEM[(volatile struct adcBASE_t *)4294427136B].GxMODECR
@ ../source/HL_adc.c:229:     adcREG2->EVSRC = (uint32)0x00000000U
	.loc 1 229 0
	str	r2, [r3, #-227]	@ tmp184, MEM[(volatile struct adcBASE_t *)4294427136B].EVSRC
@ ../source/HL_adc.c:233:     adcREG2->EVSAMP = 1U;
	.loc 1 233 0
	str	r0, [r3, #-159]	@ tmp182, MEM[(volatile struct adcBASE_t *)4294427136B].EVSAMP
@ ../source/HL_adc.c:239:     adcREG2->EVSAMPDISEN = (uint32)((uint32)0U << 8U)
	.loc 1 239 0
	str	r2, [r3, #29]	@ tmp184, MEM[(volatile struct adcBASE_t *)4294427136B].EVSAMPDISEN
@ ../source/HL_adc.c:247:     adcREG2->GxMODECR[1U] = (uint32)ADC_12_BIT
	.loc 1 247 0
	str	r2, [r3, #-235]	@ tmp184, MEM[(volatile struct adcBASE_t *)4294427136B].GxMODECR
@ ../source/HL_adc.c:256:     adcREG2->G1SRC = (uint32)0x00000000U
	.loc 1 256 0
	str	r2, [r3, #-223]	@ tmp184, MEM[(volatile struct adcBASE_t *)4294427136B].G1SRC
@ ../source/HL_adc.c:261:     adcREG2->G1SAMP = 1U;
	.loc 1 261 0
	str	r0, [r3, #-155]	@ tmp182, MEM[(volatile struct adcBASE_t *)4294427136B].G1SAMP
@ ../source/HL_adc.c:267:     adcREG2->G1SAMPDISEN = (uint32)((uint32)0U << 8U)
	.loc 1 267 0
	str	r2, [r3, #33]	@ tmp184, MEM[(volatile struct adcBASE_t *)4294427136B].G1SAMPDISEN
@ ../source/HL_adc.c:275:     adcREG2->GxMODECR[2U] = (uint32)ADC_12_BIT
	.loc 1 275 0
	str	r2, [r3, #-231]	@ tmp184, MEM[(volatile struct adcBASE_t *)4294427136B].GxMODECR
@ ../source/HL_adc.c:284:     adcREG2->G2SRC = (uint32)0x00000000U
	.loc 1 284 0
	str	r2, [r3, #-219]	@ tmp184, MEM[(volatile struct adcBASE_t *)4294427136B].G2SRC
@ ../source/HL_adc.c:288:     adcREG2->G2SAMP = 1U;
	.loc 1 288 0
	str	r0, [r3, #-151]	@ tmp182, MEM[(volatile struct adcBASE_t *)4294427136B].G2SAMP
@ ../source/HL_adc.c:294:     adcREG2->G2SAMPDISEN = (uint32)((uint32)0U << 8U)
	.loc 1 294 0
	str	r2, [r3, #37]	@ tmp184, MEM[(volatile struct adcBASE_t *)4294427136B].G2SAMPDISEN
@ ../source/HL_adc.c:299:     adcREG2->EVTOUT = 0U;
	.loc 1 299 0
	str	r2, [r3, #1]	@ tmp184, MEM[(volatile struct adcBASE_t *)4294427136B].EVTOUT
@ ../source/HL_adc.c:302:     adcREG2->EVTDIR = 0U;
	.loc 1 302 0
	str	r2, [r3, #-3]	@ tmp184, MEM[(volatile struct adcBASE_t *)4294427136B].EVTDIR
@ ../source/HL_adc.c:305: 	adcREG2->EVTPDR = 0U;
	.loc 1 305 0
	str	r2, [r3, #17]	@ tmp184, MEM[(volatile struct adcBASE_t *)4294427136B].EVTPDR
@ ../source/HL_adc.c:308: 	adcREG2->EVTPSEL = 1U;
	.loc 1 308 0
	str	r0, [r3, #25]	@ tmp182, MEM[(volatile struct adcBASE_t *)4294427136B].EVTPSEL
@ ../source/HL_adc.c:311: 	adcREG2->EVTDIS = 0U;
	.loc 1 311 0
	str	r2, [r3, #21]	@ tmp184, MEM[(volatile struct adcBASE_t *)4294427136B].EVTDIS
@ ../source/HL_adc.c:314:     adcREG2->OPMODECR |= 0x80140001U;
	.loc 1 314 0
	ldr	r2, [r3, #-251]	@ _15, MEM[(volatile struct adcBASE_t *)4294427136B].OPMODECR
	orr	r2, r2, #-2147483647	@ _16, _15,
	orr	r2, r2, #1310720	@ _16, _16,
	str	r2, [r3, #-251]	@ _16, MEM[(volatile struct adcBASE_t *)4294427136B].OPMODECR
.L3:
@ ../source/HL_adc.c:318:     while (((adcREG2->BNDEND & 0xFFFF0000U) >> 16U) != 0U)
	.loc 1 318 0
	movw	r3, #49919	@ tmp231,
	movt	r3, 65527	@ tmp231,
	ldr	r3, [r3, #-163]	@ _17, MEM[(volatile struct adcBASE_t *)4294427136B].BNDEND
	lsrs	r3, r3, #16	@ tmp235, _17,
	bne	.L3	@,
@ ../source/HL_adc.c:323:     adcREG2->PARCR = 0x00000005U;
	.loc 1 323 0
	movw	r3, #49919	@ tmp232,
	movt	r3, 65527	@ tmp232,
	mov	r2, #5	@ tmp233,
	str	r2, [r3, #129]	@ tmp233, MEM[(volatile struct adcBASE_t *)4294427136B].PARCR
@ ../source/HL_adc.c:330: }
	.loc 1 330 0
	bx	lr	@
	.cfi_endproc
.LFE0:
	.size	adcInit, .-adcInit
	.align	2
	.global	adcStartConversion
	.syntax unified
	.arm
	.fpu vfpv3-d16
	.type	adcStartConversion, %function
adcStartConversion:
.LFB1:
	.loc 1 543 0
	.cfi_startproc
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
.LVL0:
	str	lr, [sp, #-4]!	@,
	.cfi_def_cfa_offset 4
	.cfi_offset 14, -4
@ ../source/HL_adc.c:544:     uint32 index = (adc == adcREG1) ? 0U : 1U;
	.loc 1 544 0
	adds	ip, r0, #540672	@ _1, adc,
	movne	ip, #1	@ _1,
.LVL1:
@ ../source/HL_adc.c:550:     adc->GxINTCR[group] = s_adcFiFoSize[index][group];
	.loc 1 550 0
	movw	r3, #:lower16:.LANCHOR0	@ tmp118,
	movt	r3, #:upper16:.LANCHOR0	@ tmp118,
	lsl	r2, ip, #1	@ tmp120, _1,
	add	r2, r2, ip	@ tmp121, tmp120, _1
	add	r2, r2, r1	@ tmp122, tmp121, group
	ldr	lr, [r3, r2, lsl #2]	@ _2, s_adcFiFoSize
	add	ip, r1, #16	@ tmp123, group,
.LVL2:
	str	lr, [r0, ip, lsl #2]	@ _2, adc_4(D)->GxINTCR
@ ../source/HL_adc.c:553:     adc->GxSEL[group] = s_adcSelect[index][group];
	.loc 1 553 0
	add	r3, r3, r2, lsl #2	@ tmp129, tmp118, tmp122,
	ldr	r3, [r3, #24]	@ _3, s_adcSelect
	add	r1, r1, #30	@ tmp131, group,
.LVL3:
	str	r3, [r0, r1, lsl #2]	@ _3, adc_4(D)->GxSEL
@ ../source/HL_adc.c:559: }
	.loc 1 559 0
	ldr	pc, [sp], #4	@
	.cfi_endproc
.LFE1:
	.size	adcStartConversion, .-adcStartConversion
	.align	2
	.global	adcStopConversion
	.syntax unified
	.arm
	.fpu vfpv3-d16
	.type	adcStopConversion, %function
adcStopConversion:
.LFB2:
	.loc 1 582 0
	.cfi_startproc
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	@ link register save eliminated.
.LVL4:
@ ../source/HL_adc.c:587:     adc->GxSEL[group] = 0U;
	.loc 1 587 0
	add	r1, r1, #30	@ tmp112, group,
.LVL5:
	mov	r3, #0	@ tmp113,
	str	r3, [r0, r1, lsl #2]	@ tmp113, adc_2(D)->GxSEL
@ ../source/HL_adc.c:593: }
	.loc 1 593 0
	bx	lr	@
	.cfi_endproc
.LFE2:
	.size	adcStopConversion, .-adcStopConversion
	.align	2
	.global	adcResetFiFo
	.syntax unified
	.arm
	.fpu vfpv3-d16
	.type	adcResetFiFo, %function
adcResetFiFo:
.LFB3:
	.loc 1 616 0
	.cfi_startproc
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	@ link register save eliminated.
.LVL6:
@ ../source/HL_adc.c:621:     adc->GxFIFORESETCR[group] = 1U;
	.loc 1 621 0
	add	r1, r1, #90	@ tmp112, group,
.LVL7:
	mov	r3, #1	@ tmp113,
	str	r3, [r0, r1, lsl #2]	@ tmp113, adc_2(D)->GxFIFORESETCR
@ ../source/HL_adc.c:629: }
	.loc 1 629 0
	bx	lr	@
	.cfi_endproc
.LFE3:
	.size	adcResetFiFo, .-adcResetFiFo
	.align	2
	.global	adcGetData
	.syntax unified
	.arm
	.fpu vfpv3-d16
	.type	adcGetData, %function
adcGetData:
.LFB4:
	.loc 1 654 0
	.cfi_startproc
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
.LVL8:
	push	{r4, lr}	@
	.cfi_def_cfa_offset 8
	.cfi_offset 4, -8
	.cfi_offset 14, -4
	mov	ip, r0	@ adc, adc
@ ../source/HL_adc.c:658:     uint32  index = (adc == adcREG1) ? 0U : 1U;
	.loc 1 658 0
	adds	lr, r0, #540672	@ index, adc,
	movne	lr, #1	@ index,
.LVL9:
@ ../source/HL_adc.c:660: 	uint32  intcr_reg = adc->GxINTCR[group];
	.loc 1 660 0
	add	r3, r1, #16	@ tmp135, group,
	ldr	r3, [r0, r3, lsl #2]	@ intcr_reg, adc_21(D)->GxINTCR
.LVL10:
@ ../source/HL_adc.c:661:     uint32  count = (intcr_reg >= 256U) ? s_adcFiFoSize[index][group] : (s_adcFiFoSize[index][group] - (uint32)(intcr_reg & 0xFFU));
	.loc 1 661 0
	cmp	r3, #255	@ intcr_reg,
	bls	.L9	@,
@ ../source/HL_adc.c:661:     uint32  count = (intcr_reg >= 256U) ? s_adcFiFoSize[index][group] : (s_adcFiFoSize[index][group] - (uint32)(intcr_reg & 0xFFU));
	.loc 1 661 0 is_stmt 0
	movw	r3, #:lower16:.LANCHOR0	@ tmp136,
.LVL11:
	movt	r3, #:upper16:.LANCHOR0	@ tmp136,
	lsl	r0, lr, #1	@ tmp138, index,
.LVL12:
	add	r0, r0, lr	@ tmp139, tmp138, index
	add	r0, r0, r1	@ tmp140, tmp139, group
	ldr	r0, [r3, r0, lsl #2]	@ <retval>, s_adcFiFoSize
.L10:
.LVL13:
@ ../source/HL_adc.c:667:     mode = (adc->OPMODECR & ADC_12_BIT_MODE);
	.loc 1 667 0 is_stmt 1
	ldr	r3, [ip, #4]	@ _4, adc_21(D)->OPMODECR
.LVL14:
@ ../source/HL_adc.c:669:     if(mode == ADC_12_BIT_MODE)
	.loc 1 669 0
	cmp	r3, #0	@ _4,
	blt	.L16	@,
@ ../source/HL_adc.c:685:         for (i = 0U; i < count; i++)
	.loc 1 685 0
	mov	lr, #0	@ i,
.LVL15:
	b	.L12	@
.LVL16:
.L9:
@ ../source/HL_adc.c:661:     uint32  count = (intcr_reg >= 256U) ? s_adcFiFoSize[index][group] : (s_adcFiFoSize[index][group] - (uint32)(intcr_reg & 0xFFU));
	.loc 1 661 0
	movw	r4, #:lower16:.LANCHOR0	@ tmp141,
	movt	r4, #:upper16:.LANCHOR0	@ tmp141,
	lsl	r0, lr, #1	@ tmp143, index,
.LVL17:
	add	r0, r0, lr	@ tmp144, tmp143, index
	add	r0, r0, r1	@ tmp145, tmp144, group
	ldr	r0, [r4, r0, lsl #2]	@ _2, s_adcFiFoSize
	uxtb	r3, r3	@ _3, intcr_reg
.LVL18:
	sub	r0, r0, r3	@ <retval>, _2, _3
	b	.L10	@
.LVL19:
.L13:
@ ../source/HL_adc.c:674:           buf        = adc->GxBUF[group].BUF0;
	.loc 1 674 0
	add	r3, ip, r1, lsl #5	@ tmp146, adc, group,
	ldr	r3, [r3, #144]	@ buf, adc_21(D)->GxBUF[group_24(D)].BUF0
.LVL20:
@ ../source/HL_adc.c:676:           ptr->value = (uint16)(buf & 0xFFFU);
	.loc 1 676 0
	ubfx	r4, r3, #0, #12	@ _6, buf,,
	strh	r4, [r2, #4]	@ movhi	@ _6, ptr_15->value
@ ../source/HL_adc.c:677:           ptr->id    = (uint32)((buf >> 16U) & 0x1FU);
	.loc 1 677 0
	ubfx	r3, r3, #16, #5	@ _8, buf,,
.LVL21:
	str	r3, [r2], #8	@ _8, ptr_15->id
.LVL22:
@ ../source/HL_adc.c:672:         for (i = 0U; i < count; i++)
	.loc 1 672 0
	add	lr, lr, #1	@ i, i,
.LVL23:
.L11:
@ ../source/HL_adc.c:672:         for (i = 0U; i < count; i++)
	.loc 1 672 0 is_stmt 0
	cmp	lr, r0	@ i, <retval>
	bcc	.L13	@,
	b	.L14	@
.LVL24:
.L16:
@ ../source/HL_adc.c:672:         for (i = 0U; i < count; i++)
	.loc 1 672 0
	mov	lr, #0	@ i,
.LVL25:
	b	.L11	@
.LVL26:
.L15:
@ ../source/HL_adc.c:687:           buf        = adc->GxBUF[group].BUF0;
	.loc 1 687 0 is_stmt 1
	add	r3, ip, r1, lsl #5	@ tmp150, adc, group,
	ldr	r3, [r3, #144]	@ buf, adc_21(D)->GxBUF[group_24(D)].BUF0
.LVL27:
@ ../source/HL_adc.c:689:           ptr->value = (uint16)(buf & 0x3FFU);
	.loc 1 689 0
	ubfx	r4, r3, #0, #10	@ _10, buf,,
	strh	r4, [r2, #4]	@ movhi	@ _10, ptr_16->value
@ ../source/HL_adc.c:690:           ptr->id    = (uint32)((buf >> 10U) & 0x1FU);
	.loc 1 690 0
	ubfx	r3, r3, #10, #5	@ _12, buf,,
.LVL28:
	str	r3, [r2], #8	@ _12, ptr_16->id
.LVL29:
@ ../source/HL_adc.c:685:         for (i = 0U; i < count; i++)
	.loc 1 685 0
	add	lr, lr, #1	@ i, i,
.LVL30:
.L12:
@ ../source/HL_adc.c:685:         for (i = 0U; i < count; i++)
	.loc 1 685 0 is_stmt 0
	cmp	lr, r0	@ i, <retval>
	bcc	.L15	@,
.L14:
@ ../source/HL_adc.c:697:     adc->GxINTFLG[group] = 9U;
	.loc 1 697 0 is_stmt 1
	add	r1, r1, #12	@ tmp154, group,
.LVL31:
	add	ip, ip, r1, lsl #2	@ tmp155, adc, tmp154,
.LVL32:
	mov	r3, #9	@ tmp157,
	str	r3, [ip, #4]	@ tmp157, adc_21(D)->GxINTFLG
@ ../source/HL_adc.c:707: }
	.loc 1 707 0
	pop	{r4, pc}	@
	.cfi_endproc
.LFE4:
	.size	adcGetData, .-adcGetData
	.align	2
	.global	adcIsFifoFull
	.syntax unified
	.arm
	.fpu vfpv3-d16
	.type	adcIsFifoFull, %function
adcIsFifoFull:
.LFB5:
	.loc 1 734 0
	.cfi_startproc
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	@ link register save eliminated.
.LVL33:
@ ../source/HL_adc.c:741:     flags = adc->GxINTFLG[group] & 3U;
	.loc 1 741 0
	add	r1, r1, #12	@ tmp114, group,
.LVL34:
	add	r1, r0, r1, lsl #2	@ tmp115, adc, tmp114,
.LVL35:
	ldr	r0, [r1, #4]	@ _1, adc_3(D)->GxINTFLG
.LVL36:
@ ../source/HL_adc.c:749: }
	.loc 1 749 0
	and	r0, r0, #3	@, _1,
.LVL37:
	bx	lr	@
	.cfi_endproc
.LFE5:
	.size	adcIsFifoFull, .-adcIsFifoFull
	.align	2
	.global	adcIsConversionComplete
	.syntax unified
	.arm
	.fpu vfpv3-d16
	.type	adcIsConversionComplete, %function
adcIsConversionComplete:
.LFB6:
	.loc 1 775 0
	.cfi_startproc
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	@ link register save eliminated.
.LVL38:
@ ../source/HL_adc.c:782:     flags = adc->GxINTFLG[group] & 8U;
	.loc 1 782 0
	add	r1, r1, #12	@ tmp114, group,
.LVL39:
	add	r1, r0, r1, lsl #2	@ tmp115, adc, tmp114,
.LVL40:
	ldr	r0, [r1, #4]	@ _1, adc_3(D)->GxINTFLG
.LVL41:
@ ../source/HL_adc.c:790: }
	.loc 1 790 0
	and	r0, r0, #8	@, _1,
.LVL42:
	bx	lr	@
	.cfi_endproc
.LFE6:
	.size	adcIsConversionComplete, .-adcIsConversionComplete
	.align	2
	.global	adcCalibration
	.syntax unified
	.arm
	.fpu vfpv3-d16
	.type	adcCalibration, %function
adcCalibration:
.LFB7:
	.loc 1 807 0
	.cfi_startproc
	@ args = 0, pretend = 0, frame = 24
	@ frame_needed = 0, uses_anonymous_args = 0
	@ link register save eliminated.
.LVL43:
	sub	sp, sp, #24	@,,
	.cfi_def_cfa_offset 24
@ ../source/HL_adc.c:811: 	uint32 conv_val[5U]={0U,0U,0U,0U,0U};
	.loc 1 811 0
	mov	r2, #0	@ tmp135,
	str	r2, [sp, #4]	@ tmp135, conv_val
	str	r2, [sp, #8]	@ tmp135, conv_val
	str	r2, [sp, #12]	@ tmp135, conv_val
	str	r2, [sp, #16]	@ tmp135, conv_val
	str	r2, [sp, #20]	@ tmp135, conv_val
.LVL44:
@ ../source/HL_adc.c:817: 	backup_mode = adc->OPMODECR;
	.loc 1 817 0
	ldr	r1, [r0, #4]	@ backup_mode, adc_23(D)->OPMODECR
.LVL45:
@ ../source/HL_adc.c:820: 	adc->OPMODECR |= 0x80000000U;
	.loc 1 820 0
	ldr	r3, [r0, #4]	@ _1, adc_23(D)->OPMODECR
	orr	r3, r3, #-2147483648	@ _2, _1,
	str	r3, [r0, #4]	@ _2, adc_23(D)->OPMODECR
@ ../source/HL_adc.c:823: 	adc->GxSEL[0U]=0x00U;
	.loc 1 823 0
	str	r2, [r0, #120]	@ tmp135, adc_23(D)->GxSEL
@ ../source/HL_adc.c:824: 	adc->GxSEL[1U]=0x00U;
	.loc 1 824 0
	str	r2, [r0, #124]	@ tmp135, adc_23(D)->GxSEL
@ ../source/HL_adc.c:825: 	adc->GxSEL[2U]=0x00U;
	.loc 1 825 0
	str	r2, [r0, #128]	@ tmp135, adc_23(D)->GxSEL
@ ../source/HL_adc.c:827: 	for(loop_index=0U;loop_index<4U;loop_index++)
	.loc 1 827 0
	b	.L21	@
.LVL46:
.L23:
@ ../source/HL_adc.c:835: 						adc->CALCR=0x0U;
	.loc 1 835 0
	mov	r3, #0	@ tmp140,
	str	r3, [r0, #12]	@ tmp140, adc_23(D)->CALCR
.L22:
@ ../source/HL_adc.c:854: 		adc->CALCR|=0x1U;
	.loc 1 854 0
	ldr	r3, [r0, #12]	@ _3, adc_23(D)->CALCR
	orr	r3, r3, #1	@ _4, _3,
	str	r3, [r0, #12]	@ _4, adc_23(D)->CALCR
@ ../source/HL_adc.c:857: 		adc->CALCR|=0x00010000U;
	.loc 1 857 0
	ldr	r3, [r0, #12]	@ _5, adc_23(D)->CALCR
	orr	r3, r3, #65536	@ _6, _5,
	str	r3, [r0, #12]	@ _6, adc_23(D)->CALCR
.L28:
@ ../source/HL_adc.c:861: 		while((adc->CALCR & 0x00010000U)==0x00010000U)
	.loc 1 861 0
	ldr	r3, [r0, #12]	@ _7, adc_23(D)->CALCR
	tst	r3, #65536	@ _7,
	bne	.L28	@,
@ ../source/HL_adc.c:866: 		conv_val[loop_index]= adc->CALR;
	.loc 1 866 0
	ldr	ip, [r0, #132]	@ _9, adc_23(D)->CALR
	add	r3, sp, #24	@ tmp148,,
	add	r3, r3, r2, lsl #2	@ tmp144, tmp148, loop_index,
	str	ip, [r3, #-20]	@ _9, conv_val
@ ../source/HL_adc.c:827: 	for(loop_index=0U;loop_index<4U;loop_index++)
	.loc 1 827 0
	add	r2, r2, #1	@ loop_index, loop_index,
.LVL47:
.L21:
@ ../source/HL_adc.c:827: 	for(loop_index=0U;loop_index<4U;loop_index++)
	.loc 1 827 0 is_stmt 0
	cmp	r2, #3	@ loop_index,
	bhi	.L31	@,
@ ../source/HL_adc.c:830: 		adc->CALCR=0x0U;
	.loc 1 830 0 is_stmt 1
	mov	r3, #0	@ tmp139,
	str	r3, [r0, #12]	@ tmp139, adc_23(D)->CALCR
@ ../source/HL_adc.c:832: 		switch(loop_index)
	.loc 1 832 0
	cmp	r2, #3	@ loop_index,
	ldrls	pc, [pc, r2, asl #2]	@ loop_index
	b	.L22	@
.L24:
	.word	.L23
	.word	.L25
	.word	.L26
	.word	.L27
.L25:
@ ../source/HL_adc.c:839: 						adc->CALCR=0x0100U;
	.loc 1 839 0
	mov	r3, #256	@ tmp141,
	str	r3, [r0, #12]	@ tmp141, adc_23(D)->CALCR
@ ../source/HL_adc.c:840: 						break;
	.loc 1 840 0
	b	.L22	@
.L26:
@ ../source/HL_adc.c:843: 						adc->CALCR=0x0200U;
	.loc 1 843 0
	mov	r3, #512	@ tmp142,
	str	r3, [r0, #12]	@ tmp142, adc_23(D)->CALCR
@ ../source/HL_adc.c:844: 						break;
	.loc 1 844 0
	b	.L22	@
.L27:
@ ../source/HL_adc.c:847: 						adc->CALCR=0x0300U;
	.loc 1 847 0
	mov	r3, #768	@ tmp143,
	str	r3, [r0, #12]	@ tmp143, adc_23(D)->CALCR
@ ../source/HL_adc.c:848: 						break;
	.loc 1 848 0
	b	.L22	@
.L31:
@ ../source/HL_adc.c:870: 	adc->CALCR=0x0U;
	.loc 1 870 0
	mov	r3, #0	@ tmp146,
	str	r3, [r0, #12]	@ tmp146, adc_23(D)->CALCR
@ ../source/HL_adc.c:873: 	conv_val[4U]=conv_val[0U]+ conv_val[1U] + conv_val[2U] + conv_val[3U];
	.loc 1 873 0
	ldr	r3, [sp, #4]	@ _10, conv_val
	ldr	r2, [sp, #8]	@ _11, conv_val
.LVL48:
	add	r3, r3, r2	@ _12, _10, _11
	ldr	r2, [sp, #12]	@ _13, conv_val
	add	r3, r3, r2	@ _14, _12, _13
	ldr	r2, [sp, #16]	@ _15, conv_val
	add	r3, r3, r2	@ _16, _14, _15
@ ../source/HL_adc.c:875: 	conv_val[4U]=(conv_val[4U]/4U);
	.loc 1 875 0
	lsr	r3, r3, #2	@ _17, _16,
@ ../source/HL_adc.c:877: 	offset_error=conv_val[4U]-0x7FFU;
	.loc 1 877 0
	sub	r3, r3, #2032	@ offset_error, _17,
	sub	r3, r3, #15	@ offset_error, offset_error,
.LVL49:
@ ../source/HL_adc.c:881: 	offset_error=~offset_error;
	.loc 1 881 0
	mvn	r3, r3	@ offset_error, offset_error
.LVL50:
@ ../source/HL_adc.c:882: 	offset_error=offset_error & 0xFFFU;
	.loc 1 882 0
	ubfx	r3, r3, #0, #12	@ offset_error, offset_error,,
.LVL51:
@ ../source/HL_adc.c:883: 	offset_error=offset_error+1U;
	.loc 1 883 0
	add	r3, r3, #1	@ offset_error, offset_error,
.LVL52:
@ ../source/HL_adc.c:885: 	adc->CALR = offset_error;
	.loc 1 885 0
	str	r3, [r0, #132]	@ offset_error, adc_23(D)->CALR
@ ../source/HL_adc.c:888: 	adc->OPMODECR = backup_mode;
	.loc 1 888 0
	str	r1, [r0, #4]	@ backup_mode, adc_23(D)->OPMODECR
@ ../source/HL_adc.c:894: }
	.loc 1 894 0
	add	sp, sp, #24	@,,
	.cfi_def_cfa_offset 0
	@ sp needed	@
	bx	lr	@
	.cfi_endproc
.LFE7:
	.size	adcCalibration, .-adcCalibration
	.align	2
	.global	adcMidPointCalibration
	.syntax unified
	.arm
	.fpu vfpv3-d16
	.type	adcMidPointCalibration, %function
adcMidPointCalibration:
.LFB8:
	.loc 1 911 0
	.cfi_startproc
	@ args = 0, pretend = 0, frame = 16
	@ frame_needed = 0, uses_anonymous_args = 0
	@ link register save eliminated.
.LVL53:
	sub	sp, sp, #16	@,,
	.cfi_def_cfa_offset 16
	mov	r3, r0	@ adc, adc
@ ../source/HL_adc.c:915: 	uint32 conv_val[3U]={0U,0U,0U};
	.loc 1 915 0
	mov	r1, #0	@ tmp128,
	str	r1, [sp, #4]	@ tmp128, conv_val
	str	r1, [sp, #8]	@ tmp128, conv_val
.LVL54:
@ ../source/HL_adc.c:921: 	backup_mode = adc->OPMODECR;
	.loc 1 921 0
	ldr	ip, [r0, #4]	@ backup_mode, adc_20(D)->OPMODECR
.LVL55:
@ ../source/HL_adc.c:924: 	adc->OPMODECR |= 0x80000000U;
	.loc 1 924 0
	ldr	r2, [r0, #4]	@ _1, adc_20(D)->OPMODECR
	orr	r2, r2, #-2147483648	@ _2, _1,
	str	r2, [r0, #4]	@ _2, adc_20(D)->OPMODECR
@ ../source/HL_adc.c:927: 	adc->GxSEL[0U]=0x00U;
	.loc 1 927 0
	str	r1, [r0, #120]	@ tmp128, adc_20(D)->GxSEL
@ ../source/HL_adc.c:928: 	adc->GxSEL[1U]=0x00U;
	.loc 1 928 0
	str	r1, [r0, #124]	@ tmp128, adc_20(D)->GxSEL
@ ../source/HL_adc.c:929: 	adc->GxSEL[2U]=0x00U;
	.loc 1 929 0
	str	r1, [r0, #128]	@ tmp128, adc_20(D)->GxSEL
@ ../source/HL_adc.c:931: 	for(loop_index=0U;loop_index<2U;loop_index++)
	.loc 1 931 0
	b	.L33	@
.LVL56:
.L35:
@ ../source/HL_adc.c:939: 						adc->CALCR=0x0U;
	.loc 1 939 0
	mov	r2, #0	@ tmp134,
	str	r2, [r3, #12]	@ tmp134, adc_20(D)->CALCR
.L34:
@ ../source/HL_adc.c:952: 		adc->CALCR|=0x1U;
	.loc 1 952 0
	ldr	r2, [r3, #12]	@ _3, adc_20(D)->CALCR
	orr	r2, r2, #1	@ _4, _3,
	str	r2, [r3, #12]	@ _4, adc_20(D)->CALCR
@ ../source/HL_adc.c:955: 		adc->CALCR|=0x00010000U;
	.loc 1 955 0
	ldr	r2, [r3, #12]	@ _5, adc_20(D)->CALCR
	orr	r2, r2, #65536	@ _6, _5,
	str	r2, [r3, #12]	@ _6, adc_20(D)->CALCR
.L37:
@ ../source/HL_adc.c:959: 		while((adc->CALCR & 0x00010000U)==0x00010000U)
	.loc 1 959 0
	ldr	r2, [r3, #12]	@ _7, adc_20(D)->CALCR
	tst	r2, #65536	@ _7,
	bne	.L37	@,
@ ../source/HL_adc.c:964: 		conv_val[loop_index]= adc->CALR;
	.loc 1 964 0
	ldr	r0, [r3, #132]	@ _9, adc_20(D)->CALR
	add	r2, sp, #16	@ tmp141,,
	add	r2, r2, r1, lsl #2	@ tmp136, tmp141, loop_index,
	str	r0, [r2, #-12]	@ _9, conv_val
@ ../source/HL_adc.c:931: 	for(loop_index=0U;loop_index<2U;loop_index++)
	.loc 1 931 0
	add	r1, r1, #1	@ loop_index, loop_index,
.LVL57:
.L33:
@ ../source/HL_adc.c:931: 	for(loop_index=0U;loop_index<2U;loop_index++)
	.loc 1 931 0 is_stmt 0
	cmp	r1, #1	@ loop_index,
	bhi	.L40	@,
@ ../source/HL_adc.c:934: 		adc->CALCR=0x0U;
	.loc 1 934 0 is_stmt 1
	mov	r2, #0	@ tmp133,
	str	r2, [r3, #12]	@ tmp133, adc_20(D)->CALCR
@ ../source/HL_adc.c:936: 		switch(loop_index)
	.loc 1 936 0
	cmp	r1, r2	@ loop_index,
	beq	.L35	@,
	cmp	r1, #1	@ loop_index,
@ ../source/HL_adc.c:943: 						adc->CALCR=0x0100U;
	.loc 1 943 0
	moveq	r2, #256	@ tmp135,
	streq	r2, [r3, #12]	@ tmp135, adc_20(D)->CALCR
@ ../source/HL_adc.c:944: 						break;
	.loc 1 944 0
	b	.L34	@
.L40:
@ ../source/HL_adc.c:968: 	adc->CALCR=0x0U;
	.loc 1 968 0
	mov	r2, #0	@ tmp138,
	str	r2, [r3, #12]	@ tmp138, adc_20(D)->CALCR
@ ../source/HL_adc.c:971: 	conv_val[2U]=(conv_val[0U])+ (conv_val[1U]);
	.loc 1 971 0
	ldr	r0, [sp, #4]	@ _10, conv_val
	ldr	r2, [sp, #8]	@ _11, conv_val
	add	r2, r0, r2	@ _12, _10, _11
.LVL58:
@ ../source/HL_adc.c:980: 	offset_error=offset_error+1U;
	.loc 1 980 0
	movw	r0, #2047	@ tmp139,
	sub	r0, r0, r2, lsr #1	@ offset_error, tmp139, _12,
.LVL59:
@ ../source/HL_adc.c:981: 	offset_error=offset_error & 0xFFFU;
	.loc 1 981 0
	ubfx	r0, r0, #0, #12	@ <retval>, offset_error,,
.LVL60:
@ ../source/HL_adc.c:983: 	adc->CALR = offset_error;
	.loc 1 983 0
	str	r0, [r3, #132]	@ <retval>, adc_20(D)->CALR
@ ../source/HL_adc.c:986: 	adc->OPMODECR = backup_mode;
	.loc 1 986 0
	str	ip, [r3, #4]	@ backup_mode, adc_20(D)->OPMODECR
@ ../source/HL_adc.c:994: }
	.loc 1 994 0
	add	sp, sp, #16	@,,
	.cfi_def_cfa_offset 0
	@ sp needed	@
	bx	lr	@
	.cfi_endproc
.LFE8:
	.size	adcMidPointCalibration, .-adcMidPointCalibration
	.align	2
	.global	adcEnableNotification
	.syntax unified
	.arm
	.fpu vfpv3-d16
	.type	adcEnableNotification, %function
adcEnableNotification:
.LFB9:
	.loc 1 1018 0
	.cfi_startproc
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	@ link register save eliminated.
.LVL61:
@ ../source/HL_adc.c:1019:     uint32 notif = (((uint32)(adc->GxMODECR[group]) & 2U) == 2U) ? 1U : 8U;
	.loc 1 1019 0
	add	r3, r1, #4	@ tmp115, group,
	ldr	r3, [r0, r3, lsl #2]	@ _1, adc_5(D)->GxMODECR
	tst	r3, #2	@ _1,
	bne	.L44	@,
	mov	r3, #8	@ iftmp.1_3,
.L42:
.LVL62:
@ ../source/HL_adc.c:1024:     adc->GxINTENA[group] = notif;
	.loc 1 1024 0
	add	r1, r1, #10	@ tmp116, group,
.LVL63:
	str	r3, [r0, r1, lsl #2]	@ iftmp.1_3, adc_5(D)->GxINTENA
@ ../source/HL_adc.c:1032: }
	.loc 1 1032 0
	bx	lr	@
.LVL64:
.L44:
@ ../source/HL_adc.c:1019:     uint32 notif = (((uint32)(adc->GxMODECR[group]) & 2U) == 2U) ? 1U : 8U;
	.loc 1 1019 0
	mov	r3, #1	@ iftmp.1_3,
	b	.L42	@
	.cfi_endproc
.LFE9:
	.size	adcEnableNotification, .-adcEnableNotification
	.align	2
	.global	adcDisableNotification
	.syntax unified
	.arm
	.fpu vfpv3-d16
	.type	adcDisableNotification, %function
adcDisableNotification:
.LFB10:
	.loc 1 1054 0
	.cfi_startproc
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	@ link register save eliminated.
.LVL65:
@ ../source/HL_adc.c:1058:     adc->GxINTENA[group] = 0U;
	.loc 1 1058 0
	add	r1, r1, #10	@ tmp112, group,
.LVL66:
	mov	r3, #0	@ tmp113,
	str	r3, [r0, r1, lsl #2]	@ tmp113, adc_2(D)->GxINTENA
@ ../source/HL_adc.c:1064: }
	.loc 1 1064 0
	bx	lr	@
	.cfi_endproc
.LFE10:
	.size	adcDisableNotification, .-adcDisableNotification
	.align	2
	.global	adcSetEVTPin
	.syntax unified
	.arm
	.fpu vfpv3-d16
	.type	adcSetEVTPin, %function
adcSetEVTPin:
.LFB11:
	.loc 1 1078 0
	.cfi_startproc
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	@ link register save eliminated.
.LVL67:
@ ../source/HL_adc.c:1079:     adc->EVTOUT = value;
	.loc 1 1079 0
	str	r1, [r0, #256]	@ value, adc_2(D)->EVTOUT
@ ../source/HL_adc.c:1080: }
	.loc 1 1080 0
	bx	lr	@
	.cfi_endproc
.LFE11:
	.size	adcSetEVTPin, .-adcSetEVTPin
	.align	2
	.global	adcGetEVTPin
	.syntax unified
	.arm
	.fpu vfpv3-d16
	.type	adcGetEVTPin, %function
adcGetEVTPin:
.LFB12:
	.loc 1 1094 0
	.cfi_startproc
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	@ link register save eliminated.
.LVL68:
@ ../source/HL_adc.c:1095:     return adc->EVTIN;
	.loc 1 1095 0
	ldr	r0, [r0, #260]	@ <retval>, adc_2(D)->EVTIN
.LVL69:
@ ../source/HL_adc.c:1096: }
	.loc 1 1096 0
	bx	lr	@
	.cfi_endproc
.LFE12:
	.size	adcGetEVTPin, .-adcGetEVTPin
	.align	2
	.global	adc1GetConfigValue
	.syntax unified
	.arm
	.fpu vfpv3-d16
	.type	adc1GetConfigValue, %function
adc1GetConfigValue:
.LFB13:
	.loc 1 1117 0
	.cfi_startproc
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	@ link register save eliminated.
.LVL70:
@ ../source/HL_adc.c:1118: 	if (type == InitialValue)
	.loc 1 1118 0
	cmp	r1, #0	@ type,
	beq	.L51	@,
@ ../source/HL_adc.c:1140:         config_reg->CONFIG_OPMODECR = adcREG1->OPMODECR;
	.loc 1 1140 0
	movw	r3, #49407	@ tmp146,
	movt	r3, 65527	@ tmp146,
	ldr	r2, [r3, #-251]	@ _1, MEM[(volatile struct adcBASE_t *)4294426624B].OPMODECR
	str	r2, [r0]	@ _1, config_reg_21(D)->CONFIG_OPMODECR
@ ../source/HL_adc.c:1141:         config_reg->CONFIG_CLOCKCR = adcREG1->CLOCKCR;
	.loc 1 1141 0
	ldr	r2, [r3, #-247]	@ _2, MEM[(volatile struct adcBASE_t *)4294426624B].CLOCKCR
	str	r2, [r0, #4]	@ _2, config_reg_21(D)->CONFIG_CLOCKCR
@ ../source/HL_adc.c:1142:         config_reg->CONFIG_GxMODECR[0U] = adcREG1->GxMODECR[0U];
	.loc 1 1142 0
	ldr	r2, [r3, #-239]	@ _3, MEM[(volatile struct adcBASE_t *)4294426624B].GxMODECR
	str	r2, [r0, #8]	@ _3, config_reg_21(D)->CONFIG_GxMODECR
@ ../source/HL_adc.c:1143:         config_reg->CONFIG_GxMODECR[1U] = adcREG1->GxMODECR[1U];
	.loc 1 1143 0
	ldr	r2, [r3, #-235]	@ _4, MEM[(volatile struct adcBASE_t *)4294426624B].GxMODECR
	str	r2, [r0, #12]	@ _4, config_reg_21(D)->CONFIG_GxMODECR
@ ../source/HL_adc.c:1144:         config_reg->CONFIG_GxMODECR[2U] = adcREG1->GxMODECR[2U];
	.loc 1 1144 0
	ldr	r2, [r3, #-231]	@ _5, MEM[(volatile struct adcBASE_t *)4294426624B].GxMODECR
	str	r2, [r0, #16]	@ _5, config_reg_21(D)->CONFIG_GxMODECR
@ ../source/HL_adc.c:1145:         config_reg->CONFIG_G0SRC = adcREG1->EVSRC;
	.loc 1 1145 0
	ldr	r2, [r3, #-227]	@ _6, MEM[(volatile struct adcBASE_t *)4294426624B].EVSRC
	str	r2, [r0, #20]	@ _6, config_reg_21(D)->CONFIG_G0SRC
@ ../source/HL_adc.c:1146:         config_reg->CONFIG_G1SRC = adcREG1->G1SRC;
	.loc 1 1146 0
	ldr	r2, [r3, #-223]	@ _7, MEM[(volatile struct adcBASE_t *)4294426624B].G1SRC
	str	r2, [r0, #24]	@ _7, config_reg_21(D)->CONFIG_G1SRC
@ ../source/HL_adc.c:1147:         config_reg->CONFIG_G2SRC = adcREG1->G2SRC;
	.loc 1 1147 0
	ldr	r2, [r3, #-219]	@ _8, MEM[(volatile struct adcBASE_t *)4294426624B].G2SRC
	str	r2, [r0, #28]	@ _8, config_reg_21(D)->CONFIG_G2SRC
@ ../source/HL_adc.c:1148:         config_reg->CONFIG_BNDCR = adcREG1->BNDCR;
	.loc 1 1148 0
	ldr	r2, [r3, #-167]	@ _9, MEM[(volatile struct adcBASE_t *)4294426624B].BNDCR
	str	r2, [r0, #32]	@ _9, config_reg_21(D)->CONFIG_BNDCR
@ ../source/HL_adc.c:1149:         config_reg->CONFIG_BNDEND = adcREG1->BNDEND;
	.loc 1 1149 0
	ldr	r2, [r3, #-163]	@ _10, MEM[(volatile struct adcBASE_t *)4294426624B].BNDEND
	str	r2, [r0, #36]	@ _10, config_reg_21(D)->CONFIG_BNDEND
@ ../source/HL_adc.c:1150:         config_reg->CONFIG_G0SAMP = adcREG1->EVSAMP;
	.loc 1 1150 0
	ldr	r2, [r3, #-159]	@ _11, MEM[(volatile struct adcBASE_t *)4294426624B].EVSAMP
	str	r2, [r0, #40]	@ _11, config_reg_21(D)->CONFIG_G0SAMP
@ ../source/HL_adc.c:1151:         config_reg->CONFIG_G1SAMP = adcREG1->G1SAMP;
	.loc 1 1151 0
	ldr	r2, [r3, #-155]	@ _12, MEM[(volatile struct adcBASE_t *)4294426624B].G1SAMP
	str	r2, [r0, #44]	@ _12, config_reg_21(D)->CONFIG_G1SAMP
@ ../source/HL_adc.c:1152:         config_reg->CONFIG_G2SAMP = adcREG1->G2SAMP;
	.loc 1 1152 0
	ldr	r2, [r3, #-151]	@ _13, MEM[(volatile struct adcBASE_t *)4294426624B].G2SAMP
	str	r2, [r0, #48]	@ _13, config_reg_21(D)->CONFIG_G2SAMP
@ ../source/HL_adc.c:1153:         config_reg->CONFIG_G0SAMPDISEN = adcREG1->EVSAMPDISEN;
	.loc 1 1153 0
	ldr	r2, [r3, #29]	@ _14, MEM[(volatile struct adcBASE_t *)4294426624B].EVSAMPDISEN
	str	r2, [r0, #52]	@ _14, config_reg_21(D)->CONFIG_G0SAMPDISEN
@ ../source/HL_adc.c:1154:         config_reg->CONFIG_G1SAMPDISEN = adcREG1->G1SAMPDISEN;
	.loc 1 1154 0
	ldr	r2, [r3, #33]	@ _15, MEM[(volatile struct adcBASE_t *)4294426624B].G1SAMPDISEN
	str	r2, [r0, #56]	@ _15, config_reg_21(D)->CONFIG_G1SAMPDISEN
@ ../source/HL_adc.c:1155:         config_reg->CONFIG_G2SAMPDISEN = adcREG1->G2SAMPDISEN;
	.loc 1 1155 0
	ldr	r2, [r3, #37]	@ _16, MEM[(volatile struct adcBASE_t *)4294426624B].G2SAMPDISEN
	str	r2, [r0, #60]	@ _16, config_reg_21(D)->CONFIG_G2SAMPDISEN
@ ../source/HL_adc.c:1156:         config_reg->CONFIG_PARCR = adcREG1->PARCR;
	.loc 1 1156 0
	ldr	r3, [r3, #129]	@ _17, MEM[(volatile struct adcBASE_t *)4294426624B].PARCR
	str	r3, [r0, #64]	@ _17, config_reg_21(D)->CONFIG_PARCR
@ ../source/HL_adc.c:1158: }
	.loc 1 1158 0
	bx	lr	@
.L51:
@ ../source/HL_adc.c:1120:         config_reg->CONFIG_OPMODECR = ADC1_OPMODECR_CONFIGVALUE;
	.loc 1 1120 0
	mov	r3, #1	@ tmp129,
	movt	r3, 33044	@ tmp129,
	str	r3, [r0]	@ tmp129, config_reg_21(D)->CONFIG_OPMODECR
@ ../source/HL_adc.c:1121:         config_reg->CONFIG_CLOCKCR = ADC1_CLOCKCR_CONFIGVALUE;
	.loc 1 1121 0
	mov	r3, #7	@ tmp130,
	str	r3, [r0, #4]	@ tmp130, config_reg_21(D)->CONFIG_CLOCKCR
@ ../source/HL_adc.c:1122:         config_reg->CONFIG_GxMODECR[0U] = ADC1_G0MODECR_CONFIGVALUE;
	.loc 1 1122 0
	mov	r3, #0	@ tmp131,
	str	r3, [r0, #8]	@ tmp131, config_reg_21(D)->CONFIG_GxMODECR
@ ../source/HL_adc.c:1123:         config_reg->CONFIG_GxMODECR[1U] = ADC1_G1MODECR_CONFIGVALUE;
	.loc 1 1123 0
	str	r3, [r0, #12]	@ tmp131, config_reg_21(D)->CONFIG_GxMODECR
@ ../source/HL_adc.c:1124:         config_reg->CONFIG_GxMODECR[2U] = ADC1_G2MODECR_CONFIGVALUE;
	.loc 1 1124 0
	str	r3, [r0, #16]	@ tmp131, config_reg_21(D)->CONFIG_GxMODECR
@ ../source/HL_adc.c:1125:         config_reg->CONFIG_G0SRC = ADC1_G0SRC_CONFIGVALUE;
	.loc 1 1125 0
	str	r3, [r0, #20]	@ tmp131, config_reg_21(D)->CONFIG_G0SRC
@ ../source/HL_adc.c:1126:         config_reg->CONFIG_G1SRC = ADC1_G1SRC_CONFIGVALUE;
	.loc 1 1126 0
	str	r3, [r0, #24]	@ tmp131, config_reg_21(D)->CONFIG_G1SRC
@ ../source/HL_adc.c:1127:         config_reg->CONFIG_G2SRC = ADC1_G2SRC_CONFIGVALUE;
	.loc 1 1127 0
	str	r3, [r0, #28]	@ tmp131, config_reg_21(D)->CONFIG_G2SRC
@ ../source/HL_adc.c:1128:         config_reg->CONFIG_BNDCR = ADC1_BNDCR_CONFIGVALUE;
	.loc 1 1128 0
	mov	r2, #16	@ tmp137,
	movt	r2, 8	@ tmp137,
	str	r2, [r0, #32]	@ tmp137, config_reg_21(D)->CONFIG_BNDCR
@ ../source/HL_adc.c:1129:         config_reg->CONFIG_BNDEND = ADC1_BNDEND_CONFIGVALUE;
	.loc 1 1129 0
	mov	r2, #2	@ tmp138,
	str	r2, [r0, #36]	@ tmp138, config_reg_21(D)->CONFIG_BNDEND
@ ../source/HL_adc.c:1130:         config_reg->CONFIG_G0SAMP = ADC1_G0SAMP_CONFIGVALUE;
	.loc 1 1130 0
	mov	r2, #1	@ tmp139,
	str	r2, [r0, #40]	@ tmp139, config_reg_21(D)->CONFIG_G0SAMP
@ ../source/HL_adc.c:1131:         config_reg->CONFIG_G1SAMP = ADC1_G1SAMP_CONFIGVALUE;
	.loc 1 1131 0
	str	r2, [r0, #44]	@ tmp139, config_reg_21(D)->CONFIG_G1SAMP
@ ../source/HL_adc.c:1132:         config_reg->CONFIG_G2SAMP = ADC1_G2SAMP_CONFIGVALUE;
	.loc 1 1132 0
	str	r2, [r0, #48]	@ tmp139, config_reg_21(D)->CONFIG_G2SAMP
@ ../source/HL_adc.c:1133:         config_reg->CONFIG_G0SAMPDISEN = ADC1_G0SAMPDISEN_CONFIGVALUE;
	.loc 1 1133 0
	str	r3, [r0, #52]	@ tmp131, config_reg_21(D)->CONFIG_G0SAMPDISEN
@ ../source/HL_adc.c:1134:         config_reg->CONFIG_G1SAMPDISEN = ADC1_G1SAMPDISEN_CONFIGVALUE;
	.loc 1 1134 0
	str	r3, [r0, #56]	@ tmp131, config_reg_21(D)->CONFIG_G1SAMPDISEN
@ ../source/HL_adc.c:1135:         config_reg->CONFIG_G2SAMPDISEN = ADC1_G2SAMPDISEN_CONFIGVALUE;
	.loc 1 1135 0
	str	r3, [r0, #60]	@ tmp131, config_reg_21(D)->CONFIG_G2SAMPDISEN
@ ../source/HL_adc.c:1136:         config_reg->CONFIG_PARCR = ADC1_PARCR_CONFIGVALUE;
	.loc 1 1136 0
	mov	r3, #5	@ tmp145,
	str	r3, [r0, #64]	@ tmp145, config_reg_21(D)->CONFIG_PARCR
	bx	lr	@
	.cfi_endproc
.LFE13:
	.size	adc1GetConfigValue, .-adc1GetConfigValue
	.align	2
	.global	adc2GetConfigValue
	.syntax unified
	.arm
	.fpu vfpv3-d16
	.type	adc2GetConfigValue, %function
adc2GetConfigValue:
.LFB14:
	.loc 1 1179 0
	.cfi_startproc
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	@ link register save eliminated.
.LVL71:
@ ../source/HL_adc.c:1180: 	if (type == InitialValue)
	.loc 1 1180 0
	cmp	r1, #0	@ type,
	beq	.L55	@,
@ ../source/HL_adc.c:1203:         config_reg->CONFIG_OPMODECR = adcREG2->OPMODECR;
	.loc 1 1203 0
	movw	r3, #49919	@ tmp146,
	movt	r3, 65527	@ tmp146,
	ldr	r2, [r3, #-251]	@ _1, MEM[(volatile struct adcBASE_t *)4294427136B].OPMODECR
	str	r2, [r0]	@ _1, config_reg_21(D)->CONFIG_OPMODECR
@ ../source/HL_adc.c:1204:         config_reg->CONFIG_CLOCKCR = adcREG2->CLOCKCR;
	.loc 1 1204 0
	ldr	r2, [r3, #-247]	@ _2, MEM[(volatile struct adcBASE_t *)4294427136B].CLOCKCR
	str	r2, [r0, #4]	@ _2, config_reg_21(D)->CONFIG_CLOCKCR
@ ../source/HL_adc.c:1205:         config_reg->CONFIG_GxMODECR[0U] = adcREG2->GxMODECR[0U];
	.loc 1 1205 0
	ldr	r2, [r3, #-239]	@ _3, MEM[(volatile struct adcBASE_t *)4294427136B].GxMODECR
	str	r2, [r0, #8]	@ _3, config_reg_21(D)->CONFIG_GxMODECR
@ ../source/HL_adc.c:1206:         config_reg->CONFIG_GxMODECR[1U] = adcREG2->GxMODECR[1U];
	.loc 1 1206 0
	ldr	r2, [r3, #-235]	@ _4, MEM[(volatile struct adcBASE_t *)4294427136B].GxMODECR
	str	r2, [r0, #12]	@ _4, config_reg_21(D)->CONFIG_GxMODECR
@ ../source/HL_adc.c:1207:         config_reg->CONFIG_GxMODECR[2U] = adcREG2->GxMODECR[2U];
	.loc 1 1207 0
	ldr	r2, [r3, #-231]	@ _5, MEM[(volatile struct adcBASE_t *)4294427136B].GxMODECR
	str	r2, [r0, #16]	@ _5, config_reg_21(D)->CONFIG_GxMODECR
@ ../source/HL_adc.c:1208:         config_reg->CONFIG_G0SRC = adcREG2->EVSRC;
	.loc 1 1208 0
	ldr	r2, [r3, #-227]	@ _6, MEM[(volatile struct adcBASE_t *)4294427136B].EVSRC
	str	r2, [r0, #20]	@ _6, config_reg_21(D)->CONFIG_G0SRC
@ ../source/HL_adc.c:1209:         config_reg->CONFIG_G1SRC = adcREG2->G1SRC;
	.loc 1 1209 0
	ldr	r2, [r3, #-223]	@ _7, MEM[(volatile struct adcBASE_t *)4294427136B].G1SRC
	str	r2, [r0, #24]	@ _7, config_reg_21(D)->CONFIG_G1SRC
@ ../source/HL_adc.c:1210:         config_reg->CONFIG_G2SRC = adcREG2->G2SRC;
	.loc 1 1210 0
	ldr	r2, [r3, #-219]	@ _8, MEM[(volatile struct adcBASE_t *)4294427136B].G2SRC
	str	r2, [r0, #28]	@ _8, config_reg_21(D)->CONFIG_G2SRC
@ ../source/HL_adc.c:1211:         config_reg->CONFIG_BNDCR = adcREG2->BNDCR;
	.loc 1 1211 0
	ldr	r2, [r3, #-167]	@ _9, MEM[(volatile struct adcBASE_t *)4294427136B].BNDCR
	str	r2, [r0, #32]	@ _9, config_reg_21(D)->CONFIG_BNDCR
@ ../source/HL_adc.c:1212:         config_reg->CONFIG_BNDEND = adcREG2->BNDEND;
	.loc 1 1212 0
	ldr	r2, [r3, #-163]	@ _10, MEM[(volatile struct adcBASE_t *)4294427136B].BNDEND
	str	r2, [r0, #36]	@ _10, config_reg_21(D)->CONFIG_BNDEND
@ ../source/HL_adc.c:1213:         config_reg->CONFIG_G0SAMP = adcREG2->EVSAMP;
	.loc 1 1213 0
	ldr	r2, [r3, #-159]	@ _11, MEM[(volatile struct adcBASE_t *)4294427136B].EVSAMP
	str	r2, [r0, #40]	@ _11, config_reg_21(D)->CONFIG_G0SAMP
@ ../source/HL_adc.c:1214:         config_reg->CONFIG_G1SAMP = adcREG2->G1SAMP;
	.loc 1 1214 0
	ldr	r2, [r3, #-155]	@ _12, MEM[(volatile struct adcBASE_t *)4294427136B].G1SAMP
	str	r2, [r0, #44]	@ _12, config_reg_21(D)->CONFIG_G1SAMP
@ ../source/HL_adc.c:1215:         config_reg->CONFIG_G2SAMP = adcREG2->G2SAMP;
	.loc 1 1215 0
	ldr	r2, [r3, #-151]	@ _13, MEM[(volatile struct adcBASE_t *)4294427136B].G2SAMP
	str	r2, [r0, #48]	@ _13, config_reg_21(D)->CONFIG_G2SAMP
@ ../source/HL_adc.c:1216:         config_reg->CONFIG_G0SAMPDISEN = adcREG2->EVSAMPDISEN;
	.loc 1 1216 0
	ldr	r2, [r3, #29]	@ _14, MEM[(volatile struct adcBASE_t *)4294427136B].EVSAMPDISEN
	str	r2, [r0, #52]	@ _14, config_reg_21(D)->CONFIG_G0SAMPDISEN
@ ../source/HL_adc.c:1217:         config_reg->CONFIG_G1SAMPDISEN = adcREG2->G1SAMPDISEN;
	.loc 1 1217 0
	ldr	r2, [r3, #33]	@ _15, MEM[(volatile struct adcBASE_t *)4294427136B].G1SAMPDISEN
	str	r2, [r0, #56]	@ _15, config_reg_21(D)->CONFIG_G1SAMPDISEN
@ ../source/HL_adc.c:1218:         config_reg->CONFIG_G2SAMPDISEN = adcREG2->G2SAMPDISEN;
	.loc 1 1218 0
	ldr	r2, [r3, #37]	@ _16, MEM[(volatile struct adcBASE_t *)4294427136B].G2SAMPDISEN
	str	r2, [r0, #60]	@ _16, config_reg_21(D)->CONFIG_G2SAMPDISEN
@ ../source/HL_adc.c:1219:         config_reg->CONFIG_PARCR = adcREG2->PARCR;
	.loc 1 1219 0
	ldr	r3, [r3, #129]	@ _17, MEM[(volatile struct adcBASE_t *)4294427136B].PARCR
	str	r3, [r0, #64]	@ _17, config_reg_21(D)->CONFIG_PARCR
@ ../source/HL_adc.c:1221: }
	.loc 1 1221 0
	bx	lr	@
.L55:
@ ../source/HL_adc.c:1182:         config_reg->CONFIG_OPMODECR = ADC2_OPMODECR_CONFIGVALUE;
	.loc 1 1182 0
	mov	r3, #1	@ tmp129,
	movt	r3, 33044	@ tmp129,
	str	r3, [r0]	@ tmp129, config_reg_21(D)->CONFIG_OPMODECR
@ ../source/HL_adc.c:1183:         config_reg->CONFIG_CLOCKCR = ADC2_CLOCKCR_CONFIGVALUE;
	.loc 1 1183 0
	mov	r3, #7	@ tmp130,
	str	r3, [r0, #4]	@ tmp130, config_reg_21(D)->CONFIG_CLOCKCR
@ ../source/HL_adc.c:1184:         config_reg->CONFIG_GxMODECR[0U] = ADC2_G0MODECR_CONFIGVALUE;
	.loc 1 1184 0
	mov	r3, #0	@ tmp131,
	str	r3, [r0, #8]	@ tmp131, config_reg_21(D)->CONFIG_GxMODECR
@ ../source/HL_adc.c:1185:         config_reg->CONFIG_GxMODECR[1U] = ADC2_G1MODECR_CONFIGVALUE;
	.loc 1 1185 0
	str	r3, [r0, #12]	@ tmp131, config_reg_21(D)->CONFIG_GxMODECR
@ ../source/HL_adc.c:1186:         config_reg->CONFIG_GxMODECR[2U] = ADC2_G2MODECR_CONFIGVALUE;
	.loc 1 1186 0
	str	r3, [r0, #16]	@ tmp131, config_reg_21(D)->CONFIG_GxMODECR
@ ../source/HL_adc.c:1187:         config_reg->CONFIG_G0SRC = ADC2_G0SRC_CONFIGVALUE;
	.loc 1 1187 0
	str	r3, [r0, #20]	@ tmp131, config_reg_21(D)->CONFIG_G0SRC
@ ../source/HL_adc.c:1188:         config_reg->CONFIG_G1SRC = ADC2_G1SRC_CONFIGVALUE;
	.loc 1 1188 0
	str	r3, [r0, #24]	@ tmp131, config_reg_21(D)->CONFIG_G1SRC
@ ../source/HL_adc.c:1189:         config_reg->CONFIG_G2SRC = ADC2_G2SRC_CONFIGVALUE;
	.loc 1 1189 0
	str	r3, [r0, #28]	@ tmp131, config_reg_21(D)->CONFIG_G2SRC
@ ../source/HL_adc.c:1190:         config_reg->CONFIG_BNDCR = ADC2_BNDCR_CONFIGVALUE;
	.loc 1 1190 0
	mov	r2, #16	@ tmp137,
	movt	r2, 8	@ tmp137,
	str	r2, [r0, #32]	@ tmp137, config_reg_21(D)->CONFIG_BNDCR
@ ../source/HL_adc.c:1191:         config_reg->CONFIG_BNDEND = ADC2_BNDEND_CONFIGVALUE;
	.loc 1 1191 0
	mov	r2, #2	@ tmp138,
	str	r2, [r0, #36]	@ tmp138, config_reg_21(D)->CONFIG_BNDEND
@ ../source/HL_adc.c:1192:         config_reg->CONFIG_G0SAMP = ADC2_G0SAMP_CONFIGVALUE;
	.loc 1 1192 0
	mov	r2, #1	@ tmp139,
	str	r2, [r0, #40]	@ tmp139, config_reg_21(D)->CONFIG_G0SAMP
@ ../source/HL_adc.c:1193:         config_reg->CONFIG_G1SAMP = ADC2_G1SAMP_CONFIGVALUE;
	.loc 1 1193 0
	str	r2, [r0, #44]	@ tmp139, config_reg_21(D)->CONFIG_G1SAMP
@ ../source/HL_adc.c:1194:         config_reg->CONFIG_G2SAMP = ADC2_G2SAMP_CONFIGVALUE;
	.loc 1 1194 0
	str	r2, [r0, #48]	@ tmp139, config_reg_21(D)->CONFIG_G2SAMP
@ ../source/HL_adc.c:1195:         config_reg->CONFIG_G0SAMPDISEN = ADC2_G0SAMPDISEN_CONFIGVALUE;
	.loc 1 1195 0
	str	r3, [r0, #52]	@ tmp131, config_reg_21(D)->CONFIG_G0SAMPDISEN
@ ../source/HL_adc.c:1196:         config_reg->CONFIG_G1SAMPDISEN = ADC2_G1SAMPDISEN_CONFIGVALUE;
	.loc 1 1196 0
	str	r3, [r0, #56]	@ tmp131, config_reg_21(D)->CONFIG_G1SAMPDISEN
@ ../source/HL_adc.c:1197:         config_reg->CONFIG_G2SAMPDISEN = ADC2_G2SAMPDISEN_CONFIGVALUE;
	.loc 1 1197 0
	str	r3, [r0, #60]	@ tmp131, config_reg_21(D)->CONFIG_G2SAMPDISEN
@ ../source/HL_adc.c:1198:         config_reg->CONFIG_PARCR = ADC2_PARCR_CONFIGVALUE;
	.loc 1 1198 0
	mov	r3, #5	@ tmp145,
	str	r3, [r0, #64]	@ tmp145, config_reg_21(D)->CONFIG_PARCR
	bx	lr	@
	.cfi_endproc
.LFE14:
	.size	adc2GetConfigValue, .-adc2GetConfigValue
	.section	.rodata
	.align	2
	.set	.LANCHOR0,. + 0
	.type	s_adcFiFoSize, %object
	.size	s_adcFiFoSize, 24
s_adcFiFoSize:
	.word	16
	.word	16
	.word	16
	.word	16
	.word	16
	.word	16
	.type	s_adcSelect, %object
	.size	s_adcSelect, 24
s_adcSelect:
	.space	24
	.text
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	.file 2 "/home/mr_halfword/ti/ccs901/ccs/tools/compiler/gcc-arm-none-eabi-7-2017-q4-major/arm-none-eabi/include/machine/_default_types.h"
	.file 3 "/home/mr_halfword/ti/ccs901/ccs/tools/compiler/gcc-arm-none-eabi-7-2017-q4-major/arm-none-eabi/include/sys/_stdint.h"
	.file 4 "/home/mr_halfword/workspace_v9/TMS570LC4357_GCC_halcogen/include/HL_hal_stdtypes.h"
	.file 5 "/home/mr_halfword/workspace_v9/TMS570LC4357_GCC_halcogen/include/HL_sys_common.h"
	.file 6 "/home/mr_halfword/workspace_v9/TMS570LC4357_GCC_halcogen/include/HL_reg_adc.h"
	.file 7 "/home/mr_halfword/workspace_v9/TMS570LC4357_GCC_halcogen/include/HL_adc.h"
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	.4byte	.LASF97
	.byte	0x6
	.byte	0x96
	.4byte	0x97
	.2byte	0x19c
	.uleb128 0xb
	.4byte	.LASF98
	.byte	0x6
	.byte	0x97
	.4byte	0x97
	.2byte	0x1a0
	.uleb128 0xb
	.4byte	.LASF99
	.byte	0x6
	.byte	0x98
	.4byte	0x97
	.2byte	0x1a4
	.uleb128 0xb
	.4byte	.LASF100
	.byte	0x6
	.byte	0x99
	.4byte	0x97
	.2byte	0x1a8
	.uleb128 0xb
	.4byte	.LASF101
	.byte	0x6
	.byte	0x9a
	.4byte	0x97
	.2byte	0x1ac
	.uleb128 0xb
	.4byte	.LASF102
	.byte	0x6
	.byte	0x9b
	.4byte	0x97
	.2byte	0x1b0
	.byte	0
	.uleb128 0xc
	.4byte	0x158
	.uleb128 0xd
	.4byte	0x97
	.4byte	0x51e
	.uleb128 0xe
	.4byte	0x7a
	.byte	0x2
	.byte	0
	.uleb128 0xd
	.4byte	0xef
	.4byte	0x52e
	.uleb128 0xe
	.4byte	0x7a
	.byte	0x2
	.byte	0
	.uleb128 0x3
	.4byte	.LASF103
	.byte	0x6
	.byte	0x9c
	.4byte	0x509
	.uleb128 0x6
	.4byte	.LASF105
	.byte	0x2
	.4byte	0x45
	.byte	0x7
	.byte	0x61
	.4byte	0x55e
	.uleb128 0x7
	.4byte	.LASF106
	.byte	0
	.uleb128 0xf
	.4byte	.LASF107
	.2byte	0x100
	.uleb128 0xf
	.4byte	.LASF108
	.2byte	0x200
	.byte	0
	.uleb128 0x6
	.4byte	.LASF109
	.byte	0x1
	.4byte	0x2c
	.byte	0x7
	.byte	0x89
	.4byte	0x5e1
	.uleb128 0x7
	.4byte	.LASF110
	.byte	0
	.uleb128 0x7
	.4byte	.LASF111
	.byte	0x1
	.uleb128 0x7
	.4byte	.LASF112
	.byte	0x2
	.uleb128 0x7
	.4byte	.LASF113
	.byte	0x3
	.uleb128 0x7
	.4byte	.LASF114
	.byte	0x4
	.uleb128 0x7
	.4byte	.LASF115
	.byte	0x5
	.uleb128 0x7
	.4byte	.LASF116
	.byte	0x6
	.uleb128 0x7
	.4byte	.LASF117
	.byte	0x7
	.uleb128 0x7
	.4byte	.LASF118
	.byte	0x1
	.uleb128 0x7
	.4byte	.LASF119
	.byte	0x2
	.uleb128 0x7
	.4byte	.LASF120
	.byte	0x4
	.uleb128 0x7
	.4byte	.LASF121
	.byte	0x5
	.uleb128 0x7
	.4byte	.LASF122
	.byte	0x6
	.uleb128 0x7
	.4byte	.LASF123
	.byte	0x7
	.uleb128 0x7
	.4byte	.LASF124
	.byte	0x1
	.uleb128 0x7
	.4byte	.LASF125
	.byte	0x3
	.uleb128 0x7
	.4byte	.LASF126
	.byte	0x5
	.uleb128 0x7
	.4byte	.LASF127
	.byte	0x6
	.uleb128 0x7
	.4byte	.LASF128
	.byte	0x7
	.byte	0
	.uleb128 0x6
	.4byte	.LASF129
	.byte	0x1
	.4byte	0x2c
	.byte	0x7
	.byte	0xa8
	.4byte	0x664
	.uleb128 0x7
	.4byte	.LASF130
	.byte	0
	.uleb128 0x7
	.4byte	.LASF131
	.byte	0x1
	.uleb128 0x7
	.4byte	.LASF132
	.byte	0x2
	.uleb128 0x7
	.4byte	.LASF133
	.byte	0x3
	.uleb128 0x7
	.4byte	.LASF134
	.byte	0x4
	.uleb128 0x7
	.4byte	.LASF135
	.byte	0x5
	.uleb128 0x7
	.4byte	.LASF136
	.byte	0x6
	.uleb128 0x7
	.4byte	.LASF137
	.byte	0x7
	.uleb128 0x7
	.4byte	.LASF138
	.byte	0x1
	.uleb128 0x7
	.4byte	.LASF139
	.byte	0x2
	.uleb128 0x7
	.4byte	.LASF140
	.byte	0x4
	.uleb128 0x7
	.4byte	.LASF141
	.byte	0x5
	.uleb128 0x7
	.4byte	.LASF142
	.byte	0x6
	.uleb128 0x7
	.4byte	.LASF143
	.byte	0x7
	.uleb128 0x7
	.4byte	.LASF144
	.byte	0x1
	.uleb128 0x7
	.4byte	.LASF145
	.byte	0x3
	.uleb128 0x7
	.4byte	.LASF146
	.byte	0x5
	.uleb128 0x7
	.4byte	.LASF147
	.byte	0x6
	.uleb128 0x7
	.4byte	.LASF148
	.byte	0x7
	.byte	0
	.uleb128 0x10
	.4byte	.LASF150
	.byte	0x8
	.byte	0x7
	.byte	0xcc
	.4byte	0x688
	.uleb128 0x11
	.ascii	"id\000"
	.byte	0x7
	.byte	0xce
	.4byte	0x97
	.byte	0
	.uleb128 0x9
	.4byte	.LASF151
	.byte	0x7
	.byte	0xcf
	.4byte	0xa7
	.byte	0x4
	.byte	0
	.uleb128 0x3
	.4byte	.LASF152
	.byte	0x7
	.byte	0xd0
	.4byte	0x664
	.uleb128 0x10
	.4byte	.LASF153
	.byte	0x44
	.byte	0x7
	.byte	0xd6
	.4byte	0x754
	.uleb128 0x9
	.4byte	.LASF154
	.byte	0x7
	.byte	0xd8
	.4byte	0x97
	.byte	0
	.uleb128 0x9
	.4byte	.LASF155
	.byte	0x7
	.byte	0xd9
	.4byte	0x97
	.byte	0x4
	.uleb128 0x9
	.4byte	.LASF156
	.byte	0x7
	.byte	0xda
	.4byte	0x50e
	.byte	0x8
	.uleb128 0x9
	.4byte	.LASF157
	.byte	0x7
	.byte	0xdb
	.4byte	0x97
	.byte	0x14
	.uleb128 0x9
	.4byte	.LASF158
	.byte	0x7
	.byte	0xdc
	.4byte	0x97
	.byte	0x18
	.uleb128 0x9
	.4byte	.LASF159
	.byte	0x7
	.byte	0xdd
	.4byte	0x97
	.byte	0x1c
	.uleb128 0x9
	.4byte	.LASF160
	.byte	0x7
	.byte	0xde
	.4byte	0x97
	.byte	0x20
	.uleb128 0x9
	.4byte	.LASF161
	.byte	0x7
	.byte	0xdf
	.4byte	0x97
	.byte	0x24
	.uleb128 0x9
	.4byte	.LASF162
	.byte	0x7
	.byte	0xe0
	.4byte	0x97
	.byte	0x28
	.uleb128 0x9
	.4byte	.LASF163
	.byte	0x7
	.byte	0xe1
	.4byte	0x97
	.byte	0x2c
	.uleb128 0x9
	.4byte	.LASF164
	.byte	0x7
	.byte	0xe2
	.4byte	0x97
	.byte	0x30
	.uleb128 0x9
	.4byte	.LASF165
	.byte	0x7
	.byte	0xe3
	.4byte	0x97
	.byte	0x34
	.uleb128 0x9
	.4byte	.LASF166
	.byte	0x7
	.byte	0xe4
	.4byte	0x97
	.byte	0x38
	.uleb128 0x9
	.4byte	.LASF167
	.byte	0x7
	.byte	0xe5
	.4byte	0x97
	.byte	0x3c
	.uleb128 0x9
	.4byte	.LASF168
	.byte	0x7
	.byte	0xe6
	.4byte	0x97
	.byte	0x40
	.byte	0
	.uleb128 0x3
	.4byte	.LASF169
	.byte	0x7
	.byte	0xe7
	.4byte	0x693
	.uleb128 0xd
	.4byte	0xa2
	.4byte	0x775
	.uleb128 0xe
	.4byte	0x7a
	.byte	0x1
	.uleb128 0xe
	.4byte	0x7a
	.byte	0x2
	.byte	0
	.uleb128 0x5
	.4byte	0x75f
	.uleb128 0x12
	.4byte	.LASF170
	.byte	0x1
	.2byte	0x151
	.4byte	0x775
	.byte	0x5
	.byte	0x3
	.4byte	s_adcSelect
	.uleb128 0x12
	.4byte	.LASF171
	.byte	0x1
	.2byte	0x201
	.4byte	0x775
	.byte	0x5
	.byte	0x3
	.4byte	s_adcFiFoSize
	.uleb128 0x13
	.byte	0x1
	.4byte	.LASF174
	.byte	0x1
	.2byte	0x49a
	.byte	0x1
	.4byte	.LFB14
	.4byte	.LFE14
	.byte	0x1
	.byte	0x9c
	.4byte	0x7d3
	.uleb128 0x14
	.4byte	.LASF172
	.byte	0x1
	.2byte	0x49a
	.4byte	0x7d3
	.byte	0x1
	.byte	0x50
	.uleb128 0x14
	.4byte	.LASF173
	.byte	0x1
	.2byte	0x49a
	.4byte	0xe4
	.byte	0x1
	.byte	0x51
	.byte	0
	.uleb128 0x15
	.byte	0x4
	.4byte	0x754
	.uleb128 0x13
	.byte	0x1
	.4byte	.LASF175
	.byte	0x1
	.2byte	0x45c
	.byte	0x1
	.4byte	.LFB13
	.4byte	.LFE13
	.byte	0x1
	.byte	0x9c
	.4byte	0x80e
	.uleb128 0x14
	.4byte	.LASF172
	.byte	0x1
	.2byte	0x45c
	.4byte	0x7d3
	.byte	0x1
	.byte	0x50
	.uleb128 0x14
	.4byte	.LASF173
	.byte	0x1
	.2byte	0x45c
	.4byte	0xe4
	.byte	0x1
	.byte	0x51
	.byte	0
	.uleb128 0x16
	.byte	0x1
	.4byte	.LASF181
	.byte	0x1
	.2byte	0x445
	.byte	0x1
	.4byte	0x97
	.4byte	.LFB12
	.4byte	.LFE12
	.byte	0x1
	.byte	0x9c
	.4byte	0x83b
	.uleb128 0x17
	.ascii	"adc\000"
	.byte	0x1
	.2byte	0x445
	.4byte	0x83b
	.4byte	.LLST27
	.byte	0
	.uleb128 0x15
	.byte	0x4
	.4byte	0x52e
	.uleb128 0x13
	.byte	0x1
	.4byte	.LASF176
	.byte	0x1
	.2byte	0x435
	.byte	0x1
	.4byte	.LFB11
	.4byte	.LFE11
	.byte	0x1
	.byte	0x9c
	.4byte	0x876
	.uleb128 0x18
	.ascii	"adc\000"
	.byte	0x1
	.2byte	0x435
	.4byte	0x83b
	.byte	0x1
	.byte	0x50
	.uleb128 0x14
	.4byte	.LASF151
	.byte	0x1
	.2byte	0x435
	.4byte	0x97
	.byte	0x1
	.byte	0x51
	.byte	0
	.uleb128 0x13
	.byte	0x1
	.4byte	.LASF177
	.byte	0x1
	.2byte	0x41d
	.byte	0x1
	.4byte	.LFB10
	.4byte	.LFE10
	.byte	0x1
	.byte	0x9c
	.4byte	0x8ad
	.uleb128 0x18
	.ascii	"adc\000"
	.byte	0x1
	.2byte	0x41d
	.4byte	0x83b
	.byte	0x1
	.byte	0x50
	.uleb128 0x19
	.4byte	.LASF178
	.byte	0x1
	.2byte	0x41d
	.4byte	0x97
	.4byte	.LLST26
	.byte	0
	.uleb128 0x13
	.byte	0x1
	.4byte	.LASF179
	.byte	0x1
	.2byte	0x3f9
	.byte	0x1
	.4byte	.LFB9
	.4byte	.LFE9
	.byte	0x1
	.byte	0x9c
	.4byte	0x8f4
	.uleb128 0x18
	.ascii	"adc\000"
	.byte	0x1
	.2byte	0x3f9
	.4byte	0x83b
	.byte	0x1
	.byte	0x50
	.uleb128 0x19
	.4byte	.LASF178
	.byte	0x1
	.2byte	0x3f9
	.4byte	0x97
	.4byte	.LLST24
	.uleb128 0x1a
	.4byte	.LASF180
	.byte	0x1
	.2byte	0x3fb
	.4byte	0x97
	.4byte	.LLST25
	.byte	0
	.uleb128 0x16
	.byte	0x1
	.4byte	.LASF182
	.byte	0x1
	.2byte	0x38e
	.byte	0x1
	.4byte	0x97
	.4byte	.LFB8
	.4byte	.LFE8
	.byte	0x1
	.byte	0x9c
	.4byte	0x95e
	.uleb128 0x17
	.ascii	"adc\000"
	.byte	0x1
	.2byte	0x38e
	.4byte	0x83b
	.4byte	.LLST21
	.uleb128 0x12
	.4byte	.LASF183
	.byte	0x1
	.2byte	0x393
	.4byte	0x50e
	.byte	0x2
	.byte	0x91
	.sleb128 -12
	.uleb128 0x1a
	.4byte	.LASF184
	.byte	0x1
	.2byte	0x394
	.4byte	0x97
	.4byte	.LLST22
	.uleb128 0x1a
	.4byte	.LASF185
	.byte	0x1
	.2byte	0x395
	.4byte	0x97
	.4byte	.LLST23
	.uleb128 0x12
	.4byte	.LASF186
	.byte	0x1
	.2byte	0x396
	.4byte	0x97
	.byte	0x1
	.byte	0x5c
	.byte	0
	.uleb128 0x13
	.byte	0x1
	.4byte	.LASF187
	.byte	0x1
	.2byte	0x326
	.byte	0x1
	.4byte	.LFB7
	.4byte	.LFE7
	.byte	0x1
	.byte	0x9c
	.4byte	0x9c2
	.uleb128 0x18
	.ascii	"adc\000"
	.byte	0x1
	.2byte	0x326
	.4byte	0x83b
	.byte	0x1
	.byte	0x50
	.uleb128 0x12
	.4byte	.LASF183
	.byte	0x1
	.2byte	0x32b
	.4byte	0x9c2
	.byte	0x2
	.byte	0x91
	.sleb128 -20
	.uleb128 0x1a
	.4byte	.LASF184
	.byte	0x1
	.2byte	0x32c
	.4byte	0x97
	.4byte	.LLST19
	.uleb128 0x1a
	.4byte	.LASF185
	.byte	0x1
	.2byte	0x32d
	.4byte	0x97
	.4byte	.LLST20
	.uleb128 0x12
	.4byte	.LASF186
	.byte	0x1
	.2byte	0x32e
	.4byte	0x97
	.byte	0x1
	.byte	0x51
	.byte	0
	.uleb128 0xd
	.4byte	0x97
	.4byte	0x9d2
	.uleb128 0xe
	.4byte	0x7a
	.byte	0x4
	.byte	0
	.uleb128 0x16
	.byte	0x1
	.4byte	.LASF188
	.byte	0x1
	.2byte	0x306
	.byte	0x1
	.4byte	0x97
	.4byte	.LFB6
	.4byte	.LFE6
	.byte	0x1
	.byte	0x9c
	.4byte	0xa1f
	.uleb128 0x17
	.ascii	"adc\000"
	.byte	0x1
	.2byte	0x306
	.4byte	0x83b
	.4byte	.LLST16
	.uleb128 0x19
	.4byte	.LASF178
	.byte	0x1
	.2byte	0x306
	.4byte	0x97
	.4byte	.LLST17
	.uleb128 0x1a
	.4byte	.LASF189
	.byte	0x1
	.2byte	0x308
	.4byte	0x97
	.4byte	.LLST18
	.byte	0
	.uleb128 0x16
	.byte	0x1
	.4byte	.LASF190
	.byte	0x1
	.2byte	0x2dd
	.byte	0x1
	.4byte	0x97
	.4byte	.LFB5
	.4byte	.LFE5
	.byte	0x1
	.byte	0x9c
	.4byte	0xa6c
	.uleb128 0x17
	.ascii	"adc\000"
	.byte	0x1
	.2byte	0x2dd
	.4byte	0x83b
	.4byte	.LLST13
	.uleb128 0x19
	.4byte	.LASF178
	.byte	0x1
	.2byte	0x2dd
	.4byte	0x97
	.4byte	.LLST14
	.uleb128 0x1a
	.4byte	.LASF189
	.byte	0x1
	.2byte	0x2df
	.4byte	0x97
	.4byte	.LLST15
	.byte	0
	.uleb128 0x16
	.byte	0x1
	.4byte	.LASF191
	.byte	0x1
	.2byte	0x28d
	.byte	0x1
	.4byte	0x97
	.4byte	.LFB4
	.4byte	.LFE4
	.byte	0x1
	.byte	0x9c
	.4byte	0xb23
	.uleb128 0x17
	.ascii	"adc\000"
	.byte	0x1
	.2byte	0x28d
	.4byte	0x83b
	.4byte	.LLST4
	.uleb128 0x19
	.4byte	.LASF178
	.byte	0x1
	.2byte	0x28d
	.4byte	0x97
	.4byte	.LLST5
	.uleb128 0x19
	.4byte	.LASF192
	.byte	0x1
	.2byte	0x28d
	.4byte	0xb23
	.4byte	.LLST6
	.uleb128 0x1b
	.ascii	"i\000"
	.byte	0x1
	.2byte	0x28f
	.4byte	0x97
	.4byte	.LLST7
	.uleb128 0x1b
	.ascii	"buf\000"
	.byte	0x1
	.2byte	0x290
	.4byte	0x97
	.4byte	.LLST8
	.uleb128 0x1c
	.4byte	.LASF202
	.byte	0x1
	.2byte	0x291
	.4byte	0x97
	.uleb128 0x1a
	.4byte	.LASF193
	.byte	0x1
	.2byte	0x292
	.4byte	0x97
	.4byte	.LLST9
	.uleb128 0x1a
	.4byte	.LASF194
	.byte	0x1
	.2byte	0x294
	.4byte	0x97
	.4byte	.LLST10
	.uleb128 0x1a
	.4byte	.LASF195
	.byte	0x1
	.2byte	0x295
	.4byte	0x97
	.4byte	.LLST11
	.uleb128 0x1b
	.ascii	"ptr\000"
	.byte	0x1
	.2byte	0x296
	.4byte	0xb23
	.4byte	.LLST12
	.byte	0
	.uleb128 0x15
	.byte	0x4
	.4byte	0x688
	.uleb128 0x13
	.byte	0x1
	.4byte	.LASF196
	.byte	0x1
	.2byte	0x267
	.byte	0x1
	.4byte	.LFB3
	.4byte	.LFE3
	.byte	0x1
	.byte	0x9c
	.4byte	0xb60
	.uleb128 0x18
	.ascii	"adc\000"
	.byte	0x1
	.2byte	0x267
	.4byte	0x83b
	.byte	0x1
	.byte	0x50
	.uleb128 0x19
	.4byte	.LASF178
	.byte	0x1
	.2byte	0x267
	.4byte	0x97
	.4byte	.LLST3
	.byte	0
	.uleb128 0x13
	.byte	0x1
	.4byte	.LASF197
	.byte	0x1
	.2byte	0x245
	.byte	0x1
	.4byte	.LFB2
	.4byte	.LFE2
	.byte	0x1
	.byte	0x9c
	.4byte	0xb97
	.uleb128 0x18
	.ascii	"adc\000"
	.byte	0x1
	.2byte	0x245
	.4byte	0x83b
	.byte	0x1
	.byte	0x50
	.uleb128 0x19
	.4byte	.LASF178
	.byte	0x1
	.2byte	0x245
	.4byte	0x97
	.4byte	.LLST2
	.byte	0
	.uleb128 0x13
	.byte	0x1
	.4byte	.LASF198
	.byte	0x1
	.2byte	0x21e
	.byte	0x1
	.4byte	.LFB1
	.4byte	.LFE1
	.byte	0x1
	.byte	0x9c
	.4byte	0xbde
	.uleb128 0x18
	.ascii	"adc\000"
	.byte	0x1
	.2byte	0x21e
	.4byte	0x83b
	.byte	0x1
	.byte	0x50
	.uleb128 0x19
	.4byte	.LASF178
	.byte	0x1
	.2byte	0x21e
	.4byte	0x97
	.4byte	.LLST0
	.uleb128 0x1a
	.4byte	.LASF193
	.byte	0x1
	.2byte	0x220
	.4byte	0x97
	.4byte	.LLST1
	.byte	0
	.uleb128 0x1d
	.byte	0x1
	.4byte	.LASF203
	.byte	0x1
	.byte	0x46
	.byte	0x1
	.4byte	.LFB0
	.4byte	.LFE0
	.byte	0x1
	.byte	0x9c
	.byte	0
	.section	.debug_abbrev,"",%progbits
.Ldebug_abbrev0:
	.uleb128 0x1
	.uleb128 0x11
	.byte	0x1
	.uleb128 0x25
	.uleb128 0xe
	.uleb128 0x13
	.uleb128 0xb
	.uleb128 0x3
	.uleb128 0xe
	.uleb128 0x1b
	.uleb128 0xe
	.uleb128 0x11
	.uleb128 0x1
	.uleb128 0x12
	.uleb128 0x1
	.uleb128 0x10
	.uleb128 0x6
	.byte	0
	.byte	0
	.uleb128 0x2
	.uleb128 0x24
	.byte	0
	.uleb128 0xb
	.uleb128 0xb
	.uleb128 0x3e
	.uleb128 0xb
	.uleb128 0x3
	.uleb128 0xe
	.byte	0
	.byte	0
	.uleb128 0x3
	.uleb128 0x16
	.byte	0
	.uleb128 0x3
	.uleb128 0xe
	.uleb128 0x3a
	.uleb128 0xb
	.uleb128 0x3b
	.uleb128 0xb
	.uleb128 0x49
	.uleb128 0x13
	.byte	0
	.byte	0
	.uleb128 0x4
	.uleb128 0x24
	.byte	0
	.uleb128 0xb
	.uleb128 0xb
	.uleb128 0x3e
	.uleb128 0xb
	.uleb128 0x3
	.uleb128 0x8
	.byte	0
	.byte	0
	.uleb128 0x5
	.uleb128 0x26
	.byte	0
	.uleb128 0x49
	.uleb128 0x13
	.byte	0
	.byte	0
	.uleb128 0x6
	.uleb128 0x4
	.byte	0x1
	.uleb128 0x3
	.uleb128 0xe
	.uleb128 0xb
	.uleb128 0xb
	.uleb128 0x49
	.uleb128 0x13
	.uleb128 0x3a
	.uleb128 0xb
	.uleb128 0x3b
	.uleb128 0xb
	.uleb128 0x1
	.uleb128 0x13
	.byte	0
	.byte	0
	.uleb128 0x7
	.uleb128 0x28
	.byte	0
	.uleb128 0x3
	.uleb128 0xe
	.uleb128 0x1c
	.uleb128 0xb
	.byte	0
	.byte	0
	.uleb128 0x8
	.uleb128 0x13
	.byte	0x1
	.uleb128 0xb
	.uleb128 0xb
	.uleb128 0x3a
	.uleb128 0xb
	.uleb128 0x3b
	.uleb128 0xb
	.uleb128 0x1
	.uleb128 0x13
	.byte	0
	.byte	0
	.uleb128 0x9
	.uleb128 0xd
	.byte	0
	.uleb128 0x3
	.uleb128 0xe
	.uleb128 0x3a
	.uleb128 0xb
	.uleb128 0x3b
	.uleb128 0xb
	.uleb128 0x49
	.uleb128 0x13
	.uleb128 0x38
	.uleb128 0xb
	.byte	0
	.byte	0
	.uleb128 0xa
	.uleb128 0x13
	.byte	0x1
	.uleb128 0x3
	.uleb128 0xe
	.uleb128 0xb
	.uleb128 0x5
	.uleb128 0x3a
	.uleb128 0xb
	.uleb128 0x3b
	.uleb128 0xb
	.uleb128 0x1
	.uleb128 0x13
	.byte	0
	.byte	0
	.uleb128 0xb
	.uleb128 0xd
	.byte	0
	.uleb128 0x3
	.uleb128 0xe
	.uleb128 0x3a
	.uleb128 0xb
	.uleb128 0x3b
	.uleb128 0xb
	.uleb128 0x49
	.uleb128 0x13
	.uleb128 0x38
	.uleb128 0x5
	.byte	0
	.byte	0
	.uleb128 0xc
	.uleb128 0x35
	.byte	0
	.uleb128 0x49
	.uleb128 0x13
	.byte	0
	.byte	0
	.uleb128 0xd
	.uleb128 0x1
	.byte	0x1
	.uleb128 0x49
	.uleb128 0x13
	.uleb128 0x1
	.uleb128 0x13
	.byte	0
	.byte	0
	.uleb128 0xe
	.uleb128 0x21
	.byte	0
	.uleb128 0x49
	.uleb128 0x13
	.uleb128 0x2f
	.uleb128 0xb
	.byte	0
	.byte	0
	.uleb128 0xf
	.uleb128 0x28
	.byte	0
	.uleb128 0x3
	.uleb128 0xe
	.uleb128 0x1c
	.uleb128 0x5
	.byte	0
	.byte	0
	.uleb128 0x10
	.uleb128 0x13
	.byte	0x1
	.uleb128 0x3
	.uleb128 0xe
	.uleb128 0xb
	.uleb128 0xb
	.uleb128 0x3a
	.uleb128 0xb
	.uleb128 0x3b
	.uleb128 0xb
	.uleb128 0x1
	.uleb128 0x13
	.byte	0
	.byte	0
	.uleb128 0x11
	.uleb128 0xd
	.byte	0
	.uleb128 0x3
	.uleb128 0x8
	.uleb128 0x3a
	.uleb128 0xb
	.uleb128 0x3b
	.uleb128 0xb
	.uleb128 0x49
	.uleb128 0x13
	.uleb128 0x38
	.uleb128 0xb
	.byte	0
	.byte	0
	.uleb128 0x12
	.uleb128 0x34
	.byte	0
	.uleb128 0x3
	.uleb128 0xe
	.uleb128 0x3a
	.uleb128 0xb
	.uleb128 0x3b
	.uleb128 0x5
	.uleb128 0x49
	.uleb128 0x13
	.uleb128 0x2
	.uleb128 0xa
	.byte	0
	.byte	0
	.uleb128 0x13
	.uleb128 0x2e
	.byte	0x1
	.uleb128 0x3f
	.uleb128 0xc
	.uleb128 0x3
	.uleb128 0xe
	.uleb128 0x3a
	.uleb128 0xb
	.uleb128 0x3b
	.uleb128 0x5
	.uleb128 0x27
	.uleb128 0xc
	.uleb128 0x11
	.uleb128 0x1
	.uleb128 0x12
	.uleb128 0x1
	.uleb128 0x40
	.uleb128 0xa
	.uleb128 0x1
	.uleb128 0x13
	.byte	0
	.byte	0
	.uleb128 0x14
	.uleb128 0x5
	.byte	0
	.uleb128 0x3
	.uleb128 0xe
	.uleb128 0x3a
	.uleb128 0xb
	.uleb128 0x3b
	.uleb128 0x5
	.uleb128 0x49
	.uleb128 0x13
	.uleb128 0x2
	.uleb128 0xa
	.byte	0
	.byte	0
	.uleb128 0x15
	.uleb128 0xf
	.byte	0
	.uleb128 0xb
	.uleb128 0xb
	.uleb128 0x49
	.uleb128 0x13
	.byte	0
	.byte	0
	.uleb128 0x16
	.uleb128 0x2e
	.byte	0x1
	.uleb128 0x3f
	.uleb128 0xc
	.uleb128 0x3
	.uleb128 0xe
	.uleb128 0x3a
	.uleb128 0xb
	.uleb128 0x3b
	.uleb128 0x5
	.uleb128 0x27
	.uleb128 0xc
	.uleb128 0x49
	.uleb128 0x13
	.uleb128 0x11
	.uleb128 0x1
	.uleb128 0x12
	.uleb128 0x1
	.uleb128 0x40
	.uleb128 0xa
	.uleb128 0x1
	.uleb128 0x13
	.byte	0
	.byte	0
	.uleb128 0x17
	.uleb128 0x5
	.byte	0
	.uleb128 0x3
	.uleb128 0x8
	.uleb128 0x3a
	.uleb128 0xb
	.uleb128 0x3b
	.uleb128 0x5
	.uleb128 0x49
	.uleb128 0x13
	.uleb128 0x2
	.uleb128 0x6
	.byte	0
	.byte	0
	.uleb128 0x18
	.uleb128 0x5
	.byte	0
	.uleb128 0x3
	.uleb128 0x8
	.uleb128 0x3a
	.uleb128 0xb
	.uleb128 0x3b
	.uleb128 0x5
	.uleb128 0x49
	.uleb128 0x13
	.uleb128 0x2
	.uleb128 0xa
	.byte	0
	.byte	0
	.uleb128 0x19
	.uleb128 0x5
	.byte	0
	.uleb128 0x3
	.uleb128 0xe
	.uleb128 0x3a
	.uleb128 0xb
	.uleb128 0x3b
	.uleb128 0x5
	.uleb128 0x49
	.uleb128 0x13
	.uleb128 0x2
	.uleb128 0x6
	.byte	0
	.byte	0
	.uleb128 0x1a
	.uleb128 0x34
	.byte	0
	.uleb128 0x3
	.uleb128 0xe
	.uleb128 0x3a
	.uleb128 0xb
	.uleb128 0x3b
	.uleb128 0x5
	.uleb128 0x49
	.uleb128 0x13
	.uleb128 0x2
	.uleb128 0x6
	.byte	0
	.byte	0
	.uleb128 0x1b
	.uleb128 0x34
	.byte	0
	.uleb128 0x3
	.uleb128 0x8
	.uleb128 0x3a
	.uleb128 0xb
	.uleb128 0x3b
	.uleb128 0x5
	.uleb128 0x49
	.uleb128 0x13
	.uleb128 0x2
	.uleb128 0x6
	.byte	0
	.byte	0
	.uleb128 0x1c
	.uleb128 0x34
	.byte	0
	.uleb128 0x3
	.uleb128 0xe
	.uleb128 0x3a
	.uleb128 0xb
	.uleb128 0x3b
	.uleb128 0x5
	.uleb128 0x49
	.uleb128 0x13
	.byte	0
	.byte	0
	.uleb128 0x1d
	.uleb128 0x2e
	.byte	0
	.uleb128 0x3f
	.uleb128 0xc
	.uleb128 0x3
	.uleb128 0xe
	.uleb128 0x3a
	.uleb128 0xb
	.uleb128 0x3b
	.uleb128 0xb
	.uleb128 0x27
	.uleb128 0xc
	.uleb128 0x11
	.uleb128 0x1
	.uleb128 0x12
	.uleb128 0x1
	.uleb128 0x40
	.uleb128 0xa
	.byte	0
	.byte	0
	.byte	0
	.section	.debug_loc,"",%progbits
.Ldebug_loc0:
.LLST27:
	.4byte	.LVL68-.Ltext0
	.4byte	.LVL69-.Ltext0
	.2byte	0x1
	.byte	0x50
	.4byte	0
	.4byte	0
.LLST26:
	.4byte	.LVL65-.Ltext0
	.4byte	.LVL66-.Ltext0
	.2byte	0x1
	.byte	0x51
	.4byte	0
	.4byte	0
.LLST24:
	.4byte	.LVL61-.Ltext0
	.4byte	.LVL63-.Ltext0
	.2byte	0x1
	.byte	0x51
	.4byte	.LVL64-.Ltext0
	.4byte	.LFE9-.Ltext0
	.2byte	0x1
	.byte	0x51
	.4byte	0
	.4byte	0
.LLST25:
	.4byte	.LVL62-.Ltext0
	.4byte	.LVL64-.Ltext0
	.2byte	0x1
	.byte	0x53
	.4byte	0
	.4byte	0
.LLST21:
	.4byte	.LVL53-.Ltext0
	.4byte	.LVL56-.Ltext0
	.2byte	0x1
	.byte	0x50
	.4byte	.LVL56-.Ltext0
	.4byte	.LFE8-.Ltext0
	.2byte	0x1
	.byte	0x53
	.4byte	0
	.4byte	0
.LLST22:
	.4byte	.LVL56-.Ltext0
	.4byte	.LFE8-.Ltext0
	.2byte	0x1
	.byte	0x51
	.4byte	0
	.4byte	0
.LLST23:
	.4byte	.LVL59-.Ltext0
	.4byte	.LFE8-.Ltext0
	.2byte	0x1
	.byte	0x50
	.4byte	0
	.4byte	0
.LLST19:
	.4byte	.LVL46-.Ltext0
	.4byte	.LVL48-.Ltext0
	.2byte	0x1
	.byte	0x52
	.4byte	0
	.4byte	0
.LLST20:
	.4byte	.LVL49-.Ltext0
	.4byte	.LFE7-.Ltext0
	.2byte	0x1
	.byte	0x53
	.4byte	0
	.4byte	0
.LLST16:
	.4byte	.LVL38-.Ltext0
	.4byte	.LVL41-.Ltext0
	.2byte	0x1
	.byte	0x50
	.4byte	0
	.4byte	0
.LLST17:
	.4byte	.LVL38-.Ltext0
	.4byte	.LVL39-.Ltext0
	.2byte	0x1
	.byte	0x51
	.4byte	0
	.4byte	0
.LLST18:
	.4byte	.LVL42-.Ltext0
	.4byte	.LFE6-.Ltext0
	.2byte	0x1
	.byte	0x50
	.4byte	0
	.4byte	0
.LLST13:
	.4byte	.LVL33-.Ltext0
	.4byte	.LVL36-.Ltext0
	.2byte	0x1
	.byte	0x50
	.4byte	0
	.4byte	0
.LLST14:
	.4byte	.LVL33-.Ltext0
	.4byte	.LVL34-.Ltext0
	.2byte	0x1
	.byte	0x51
	.4byte	0
	.4byte	0
.LLST15:
	.4byte	.LVL37-.Ltext0
	.4byte	.LFE5-.Ltext0
	.2byte	0x1
	.byte	0x50
	.4byte	0
	.4byte	0
.LLST4:
	.4byte	.LVL8-.Ltext0
	.4byte	.LVL12-.Ltext0
	.2byte	0x1
	.byte	0x50
	.4byte	.LVL12-.Ltext0
	.4byte	.LVL16-.Ltext0
	.2byte	0x1
	.byte	0x5c
	.4byte	.LVL16-.Ltext0
	.4byte	.LVL17-.Ltext0
	.2byte	0x1
	.byte	0x50
	.4byte	.LVL17-.Ltext0
	.4byte	.LVL32-.Ltext0
	.2byte	0x1
	.byte	0x5c
	.4byte	0
	.4byte	0
.LLST5:
	.4byte	.LVL8-.Ltext0
	.4byte	.LVL31-.Ltext0
	.2byte	0x1
	.byte	0x51
	.4byte	0
	.4byte	0
.LLST6:
	.4byte	.LVL8-.Ltext0
	.4byte	.LVL19-.Ltext0
	.2byte	0x1
	.byte	0x52
	.4byte	.LVL24-.Ltext0
	.4byte	.LVL26-.Ltext0
	.2byte	0x1
	.byte	0x52
	.4byte	0
	.4byte	0
.LLST7:
	.4byte	.LVL19-.Ltext0
	.4byte	.LVL24-.Ltext0
	.2byte	0x1
	.byte	0x5e
	.4byte	.LVL26-.Ltext0
	.4byte	.LFE4-.Ltext0
	.2byte	0x1
	.byte	0x5e
	.4byte	0
	.4byte	0
.LLST8:
	.4byte	.LVL20-.Ltext0
	.4byte	.LVL21-.Ltext0
	.2byte	0x1
	.byte	0x53
	.4byte	.LVL27-.Ltext0
	.4byte	.LVL28-.Ltext0
	.2byte	0x1
	.byte	0x53
	.4byte	0
	.4byte	0
.LLST9:
	.4byte	.LVL9-.Ltext0
	.4byte	.LVL15-.Ltext0
	.2byte	0x1
	.byte	0x5e
	.4byte	.LVL16-.Ltext0
	.4byte	.LVL19-.Ltext0
	.2byte	0x1
	.byte	0x5e
	.4byte	.LVL24-.Ltext0
	.4byte	.LVL25-.Ltext0
	.2byte	0x1
	.byte	0x5e
	.4byte	0
	.4byte	0
.LLST10:
	.4byte	.LVL10-.Ltext0
	.4byte	.LVL11-.Ltext0
	.2byte	0x1
	.byte	0x53
	.4byte	.LVL16-.Ltext0
	.4byte	.LVL18-.Ltext0
	.2byte	0x1
	.byte	0x53
	.4byte	0
	.4byte	0
.LLST11:
	.4byte	.LVL13-.Ltext0
	.4byte	.LVL16-.Ltext0
	.2byte	0x1
	.byte	0x50
	.4byte	.LVL19-.Ltext0
	.4byte	.LFE4-.Ltext0
	.2byte	0x1
	.byte	0x50
	.4byte	0
	.4byte	0
.LLST12:
	.4byte	.LVL13-.Ltext0
	.4byte	.LVL16-.Ltext0
	.2byte	0x1
	.byte	0x52
	.4byte	.LVL19-.Ltext0
	.4byte	.LFE4-.Ltext0
	.2byte	0x1
	.byte	0x52
	.4byte	0
	.4byte	0
.LLST3:
	.4byte	.LVL6-.Ltext0
	.4byte	.LVL7-.Ltext0
	.2byte	0x1
	.byte	0x51
	.4byte	0
	.4byte	0
.LLST2:
	.4byte	.LVL4-.Ltext0
	.4byte	.LVL5-.Ltext0
	.2byte	0x1
	.byte	0x51
	.4byte	0
	.4byte	0
.LLST0:
	.4byte	.LVL0-.Ltext0
	.4byte	.LVL3-.Ltext0
	.2byte	0x1
	.byte	0x51
	.4byte	0
	.4byte	0
.LLST1:
	.4byte	.LVL1-.Ltext0
	.4byte	.LVL2-.Ltext0
	.2byte	0x1
	.byte	0x5c
	.4byte	0
	.4byte	0
	.section	.debug_aranges,"",%progbits
	.4byte	0x1c
	.2byte	0x2
	.4byte	.Ldebug_info0
	.byte	0x4
	.byte	0
	.2byte	0
	.2byte	0
	.4byte	.Ltext0
	.4byte	.Letext0-.Ltext0
	.4byte	0
	.4byte	0
	.section	.debug_line,"",%progbits
.Ldebug_line0:
	.section	.debug_str,"MS",%progbits,1
.LASF118:
	.ascii	"ADC1_HET2_5\000"
.LASF54:
	.ascii	"LASTCONV\000"
.LASF14:
	.ascii	"uint16\000"
.LASF151:
	.ascii	"value\000"
.LASF43:
	.ascii	"BNDCR\000"
.LASF60:
	.ascii	"EVTOUT\000"
.LASF108:
	.ascii	"ADC_8_BIT\000"
.LASF183:
	.ascii	"conv_val\000"
.LASF53:
	.ascii	"SMSTATE\000"
.LASF166:
	.ascii	"CONFIG_G1SAMPDISEN\000"
.LASF157:
	.ascii	"CONFIG_G0SRC\000"
.LASF124:
	.ascii	"ADC1_EPWM_B\000"
.LASF164:
	.ascii	"CONFIG_G2SAMP\000"
.LASF173:
	.ascii	"type\000"
.LASF116:
	.ascii	"ADC1_GIOB0\000"
.LASF117:
	.ascii	"ADC1_GIOB1\000"
.LASF145:
	.ascii	"ADC2_EPWM_A1\000"
.LASF147:
	.ascii	"ADC2_EPWM_A2\000"
.LASF51:
	.ascii	"GxSEL\000"
.LASF71:
	.ascii	"MAGINT1MASK\000"
.LASF9:
	.ascii	"long long unsigned int\000"
.LASF100:
	.ascii	"ADG1MAXCOUNT\000"
.LASF192:
	.ascii	"data\000"
.LASF105:
	.ascii	"adcResolution\000"
.LASF148:
	.ascii	"ADC2_EPWM_AB\000"
.LASF186:
	.ascii	"backup_mode\000"
.LASF176:
	.ascii	"adcSetEVTPin\000"
.LASF156:
	.ascii	"CONFIG_GxMODECR\000"
.LASF169:
	.ascii	"adc_config_reg_t\000"
.LASF21:
	.ascii	"BUF0\000"
.LASF8:
	.ascii	"long long int\000"
.LASF0:
	.ascii	"signed char\000"
.LASF24:
	.ascii	"BUF3\000"
.LASF25:
	.ascii	"BUF4\000"
.LASF26:
	.ascii	"BUF5\000"
.LASF27:
	.ascii	"BUF6\000"
.LASF28:
	.ascii	"BUF7\000"
.LASF171:
	.ascii	"s_adcFiFoSize\000"
.LASF133:
	.ascii	"ADC2_RTI_COMP0\000"
.LASF84:
	.ascii	"MAGTHRINTFLG\000"
.LASF199:
	.ascii	"GNU C11 7.2.1 20170904 (release) [ARM/embedded-7-br"
	.ascii	"anch revision 255204] -mcpu=cortex-r5 -mfloat-abi=h"
	.ascii	"ard -mfpu=vfpv3-d16 -g -gdwarf-3 -gstrict-dwarf -Og"
	.ascii	"\000"
.LASF86:
	.ascii	"GxFIFORESETCR\000"
.LASF109:
	.ascii	"adc1HwTriggerSource\000"
.LASF178:
	.ascii	"group\000"
.LASF111:
	.ascii	"ADC1_HET1_8\000"
.LASF4:
	.ascii	"long int\000"
.LASF123:
	.ascii	"ADC1_HET2_13\000"
.LASF107:
	.ascii	"ADC_10_BIT\000"
.LASF47:
	.ascii	"G2SAMP\000"
.LASF181:
	.ascii	"adcGetEVTPin\000"
.LASF89:
	.ascii	"G2RAMADDR\000"
.LASF125:
	.ascii	"ADC1_EPWM_A1\000"
.LASF11:
	.ascii	"uint16_t\000"
.LASF17:
	.ascii	"double\000"
.LASF87:
	.ascii	"EVRAMADDR\000"
.LASF55:
	.ascii	"GxBUF\000"
.LASF67:
	.ascii	"EVSAMPDISEN\000"
.LASF34:
	.ascii	"EVSRC\000"
.LASF13:
	.ascii	"uint32\000"
.LASF195:
	.ascii	"count\000"
.LASF65:
	.ascii	"EVTDIS\000"
.LASF6:
	.ascii	"__uint32_t\000"
.LASF52:
	.ascii	"CALR\000"
.LASF70:
	.ascii	"MAGINTCR1\000"
.LASF72:
	.ascii	"MAGINTCR2\000"
.LASF74:
	.ascii	"MAGINTCR3\000"
.LASF112:
	.ascii	"ADC1_HET1_10\000"
.LASF122:
	.ascii	"ADC1_HET1_11\000"
.LASF114:
	.ascii	"ADC1_HET1_12\000"
.LASF99:
	.ascii	"ADG1CURRCOUNT\000"
.LASF101:
	.ascii	"ADG2CURRCOUNT\000"
.LASF120:
	.ascii	"ADC1_HET1_17\000"
.LASF10:
	.ascii	"unsigned int\000"
.LASF20:
	.ascii	"config_value_type_t\000"
.LASF75:
	.ascii	"MAGINT3MASK\000"
.LASF7:
	.ascii	"long unsigned int\000"
.LASF83:
	.ascii	"MAGTHRINTENACLR\000"
.LASF97:
	.ascii	"ADEVCURRCOUNT\000"
.LASF191:
	.ascii	"adcGetData\000"
.LASF175:
	.ascii	"adc1GetConfigValue\000"
.LASF160:
	.ascii	"CONFIG_BNDCR\000"
.LASF3:
	.ascii	"short unsigned int\000"
.LASF57:
	.ascii	"G1EMUBUFFER\000"
.LASF85:
	.ascii	"MAGTHRINTOFFSET\000"
.LASF58:
	.ascii	"G2EMUBUFFER\000"
.LASF62:
	.ascii	"EVTSET\000"
.LASF201:
	.ascii	"/home/mr_halfword/workspace_v9/TMS570LC4357_GCC_hal"
	.ascii	"cogen/Debug\000"
.LASF48:
	.ascii	"EVSR\000"
.LASF180:
	.ascii	"notif\000"
.LASF167:
	.ascii	"CONFIG_G2SAMPDISEN\000"
.LASF59:
	.ascii	"EVTDIR\000"
.LASF37:
	.ascii	"GxINTENA\000"
.LASF56:
	.ascii	"EVEMUBUFFER\000"
.LASF18:
	.ascii	"InitialValue\000"
.LASF163:
	.ascii	"CONFIG_G1SAMP\000"
.LASF91:
	.ascii	"PARADDR\000"
.LASF119:
	.ascii	"ADC1_HET1_27\000"
.LASF185:
	.ascii	"offset_error\000"
.LASF132:
	.ascii	"ADC2_HET1_10\000"
.LASF142:
	.ascii	"ADC2_HET1_11\000"
.LASF134:
	.ascii	"ADC2_HET1_12\000"
.LASF63:
	.ascii	"EVTCLR\000"
.LASF140:
	.ascii	"ADC2_HET1_17\000"
.LASF36:
	.ascii	"G2SRC\000"
.LASF141:
	.ascii	"ADC2_HET1_19\000"
.LASF19:
	.ascii	"CurrentValue\000"
.LASF154:
	.ascii	"CONFIG_OPMODECR\000"
.LASF88:
	.ascii	"G1RAMADDR\000"
.LASF94:
	.ascii	"ADEVCHNSELMODECTRL\000"
.LASF106:
	.ascii	"ADC_12_BIT\000"
.LASF68:
	.ascii	"G1SAMPDISEN\000"
.LASF190:
	.ascii	"adcIsFifoFull\000"
.LASF200:
	.ascii	"../source/HL_adc.c\000"
.LASF35:
	.ascii	"G1SRC\000"
.LASF113:
	.ascii	"ADC1_RTI_COMP0\000"
.LASF16:
	.ascii	"float\000"
.LASF115:
	.ascii	"ADC1_HET1_14\000"
.LASF64:
	.ascii	"EVTPDR\000"
.LASF45:
	.ascii	"EVSAMP\000"
.LASF139:
	.ascii	"ADC2_HET1_27\000"
.LASF98:
	.ascii	"ADEVMAXCOUNT\000"
.LASF32:
	.ascii	"CALCR\000"
.LASF29:
	.ascii	"RSTCR\000"
.LASF15:
	.ascii	"_Bool\000"
.LASF1:
	.ascii	"unsigned char\000"
.LASF129:
	.ascii	"adc2HwTriggerSource\000"
.LASF40:
	.ascii	"EVDMACR\000"
.LASF2:
	.ascii	"short int\000"
.LASF76:
	.ascii	"rsvd1\000"
.LASF77:
	.ascii	"rsvd2\000"
.LASF78:
	.ascii	"rsvd3\000"
.LASF79:
	.ascii	"rsvd4\000"
.LASF80:
	.ascii	"rsvd5\000"
.LASF81:
	.ascii	"rsvd6\000"
.LASF93:
	.ascii	"rsvd7\000"
.LASF136:
	.ascii	"ADC2_GIOB0\000"
.LASF137:
	.ascii	"ADC2_GIOB1\000"
.LASF146:
	.ascii	"ADC2_HET2_1\000"
.LASF50:
	.ascii	"G2SR\000"
.LASF138:
	.ascii	"ADC2_HET2_5\000"
.LASF135:
	.ascii	"ADC2_HET1_14\000"
.LASF73:
	.ascii	"MAGINT2MASK\000"
.LASF31:
	.ascii	"CLOCKCR\000"
.LASF90:
	.ascii	"PARCR\000"
.LASF66:
	.ascii	"EVTPSEL\000"
.LASF165:
	.ascii	"CONFIG_G0SAMPDISEN\000"
.LASF12:
	.ascii	"uint32_t\000"
.LASF33:
	.ascii	"GxMODECR\000"
.LASF96:
	.ascii	"ADG2CHNSELMODECTRL\000"
.LASF39:
	.ascii	"GxINTCR\000"
.LASF144:
	.ascii	"ADC2_EPWM_B\000"
.LASF202:
	.ascii	"mode\000"
.LASF153:
	.ascii	"adc_config_reg\000"
.LASF150:
	.ascii	"adcData\000"
.LASF188:
	.ascii	"adcIsConversionComplete\000"
.LASF5:
	.ascii	"__uint16_t\000"
.LASF104:
	.ascii	"config_value_type\000"
.LASF193:
	.ascii	"index\000"
.LASF168:
	.ascii	"CONFIG_PARCR\000"
.LASF198:
	.ascii	"adcStartConversion\000"
.LASF161:
	.ascii	"CONFIG_BNDEND\000"
.LASF162:
	.ascii	"CONFIG_G0SAMP\000"
.LASF143:
	.ascii	"ADC2_HET2_13\000"
.LASF170:
	.ascii	"s_adcSelect\000"
.LASF196:
	.ascii	"adcResetFiFo\000"
.LASF159:
	.ascii	"CONFIG_G2SRC\000"
.LASF130:
	.ascii	"ADC2_EVENT\000"
.LASF110:
	.ascii	"ADC1_EVENT\000"
.LASF95:
	.ascii	"ADG1CHNSELMODECTRL\000"
.LASF184:
	.ascii	"loop_index\000"
.LASF152:
	.ascii	"adcData_t\000"
.LASF41:
	.ascii	"G1DMACR\000"
.LASF179:
	.ascii	"adcEnableNotification\000"
.LASF149:
	.ascii	"adcBase\000"
.LASF194:
	.ascii	"intcr_reg\000"
.LASF174:
	.ascii	"adc2GetConfigValue\000"
.LASF49:
	.ascii	"G1SR\000"
.LASF103:
	.ascii	"adcBASE_t\000"
.LASF30:
	.ascii	"OPMODECR\000"
.LASF203:
	.ascii	"adcInit\000"
.LASF131:
	.ascii	"ADC2_HET1_8\000"
.LASF155:
	.ascii	"CONFIG_CLOCKCR\000"
.LASF102:
	.ascii	"ADG2MAXCOUNT\000"
.LASF82:
	.ascii	"MAGTHRINTENASET\000"
.LASF121:
	.ascii	"ADC1_HET1_19\000"
.LASF189:
	.ascii	"flags\000"
.LASF61:
	.ascii	"EVTIN\000"
.LASF92:
	.ascii	"PWRUPDLYCTRL\000"
.LASF172:
	.ascii	"config_reg\000"
.LASF46:
	.ascii	"G1SAMP\000"
.LASF22:
	.ascii	"BUF1\000"
.LASF127:
	.ascii	"ADC1_EPWM_A2\000"
.LASF23:
	.ascii	"BUF2\000"
.LASF69:
	.ascii	"G2SAMPDISEN\000"
.LASF44:
	.ascii	"BNDEND\000"
.LASF158:
	.ascii	"CONFIG_G1SRC\000"
.LASF128:
	.ascii	"ADC1_EPWM_AB\000"
.LASF197:
	.ascii	"adcStopConversion\000"
.LASF182:
	.ascii	"adcMidPointCalibration\000"
.LASF187:
	.ascii	"adcCalibration\000"
.LASF42:
	.ascii	"G2DMACR\000"
.LASF177:
	.ascii	"adcDisableNotification\000"
.LASF126:
	.ascii	"ADC1_HET2_1\000"
.LASF38:
	.ascii	"GxINTFLG\000"
	.ident	"GCC: (GNU Tools for Arm Embedded Processors 7-2017-q4-major) 7.2.1 20170904 (release) [ARM/embedded-7-branch revision 255204]"
