	.cpu cortex-r5
	.eabi_attribute 28, 1	@ Tag_ABI_VFP_args
	.eabi_attribute 20, 1	@ Tag_ABI_FP_denormal
	.eabi_attribute 21, 1	@ Tag_ABI_FP_exceptions
	.eabi_attribute 23, 3	@ Tag_ABI_FP_number_model
	.eabi_attribute 24, 1	@ Tag_ABI_align8_needed
	.eabi_attribute 25, 1	@ Tag_ABI_align8_preserved
	.eabi_attribute 26, 1	@ Tag_ABI_enum_size
	.eabi_attribute 30, 1	@ Tag_ABI_optimization_goals
	.eabi_attribute 34, 1	@ Tag_CPU_unaligned_access
	.eabi_attribute 18, 4	@ Tag_ABI_PCS_wchar_t
	.file	"HL_crc.c"
@ GNU C11 (GNU Tools for Arm Embedded Processors 7-2017-q4-major) version 7.2.1 20170904 (release) [ARM/embedded-7-branch revision 255204] (arm-none-eabi)
@	compiled by GNU C version 4.8.4, GMP version 6.1.0, MPFR version 3.1.4, MPC version 1.0.3, isl version isl-0.15-GMP

@ GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072
@ options passed:  -fpreprocessed HL_crc.i -mcpu=cortex-r5 -mfloat-abi=hard
@ -mfpu=vfpv3-d16 -auxbase-strip source/HL_crc.o -g -gdwarf-3
@ -gstrict-dwarf -Og -Wall -fverbose-asm
@ options enabled:  -faggressive-loop-optimizations -fauto-inc-dec
@ -fchkp-check-incomplete-type -fchkp-check-read -fchkp-check-write
@ -fchkp-instrument-calls -fchkp-narrow-bounds -fchkp-optimize
@ -fchkp-store-bounds -fchkp-use-static-bounds
@ -fchkp-use-static-const-bounds -fchkp-use-wrappers
@ -fcombine-stack-adjustments -fcommon -fcompare-elim -fcprop-registers
@ -fdefer-pop -fdelete-null-pointer-checks -fdwarf2-cfi-asm
@ -fearly-inlining -feliminate-unused-debug-types -fforward-propagate
@ -ffp-int-builtin-inexact -ffunction-cse -fgcse-lm -fgnu-runtime
@ -fgnu-unique -fguess-branch-probability -fident -finline -finline-atomics
@ -fipa-profile -fipa-pure-const -fipa-reference -fira-hoist-pressure
@ -fira-share-save-slots -fira-share-spill-slots -fivopts
@ -fkeep-static-consts -fleading-underscore -flifetime-dse
@ -flto-odr-type-merging -fmath-errno -fmerge-constants
@ -fmerge-debug-strings -fomit-frame-pointer -fpeephole -fplt
@ -fprefetch-loop-arrays -freg-struct-return -freorder-blocks
@ -fsched-critical-path-heuristic -fsched-dep-count-heuristic
@ -fsched-group-heuristic -fsched-interblock -fsched-last-insn-heuristic
@ -fsched-pressure -fsched-rank-heuristic -fsched-spec
@ -fsched-spec-insn-heuristic -fsched-stalled-insns-dep -fsection-anchors
@ -fsemantic-interposition -fshow-column -fshrink-wrap
@ -fshrink-wrap-separate -fsigned-zeros -fsplit-ivs-in-unroller
@ -fsplit-wide-types -fssa-backprop -fstdarg-opt
@ -fstrict-volatile-bitfields -fsync-libcalls -ftoplevel-reorder
@ -ftrapping-math -ftree-builtin-call-dce -ftree-ccp -ftree-ch
@ -ftree-coalesce-vars -ftree-copy-prop -ftree-cselim -ftree-dce
@ -ftree-dominator-opts -ftree-dse -ftree-forwprop -ftree-fre
@ -ftree-loop-if-convert -ftree-loop-im -ftree-loop-ivcanon
@ -ftree-loop-optimize -ftree-parallelize-loops= -ftree-phiprop
@ -ftree-reassoc -ftree-scev-cprop -ftree-sink -ftree-slsr -ftree-ter
@ -funit-at-a-time -fvar-tracking -fvar-tracking-assignments -fverbose-asm
@ -fzero-initialized-in-bss -gstrict-dwarf -marm -mlittle-endian
@ -mpic-data-is-text-relative -msched-prolog -munaligned-access
@ -mvectorize-with-neon-quad

	.text
.Ltext0:
	.cfi_sections	.debug_frame
	.align	2
	.global	crcInit
	.syntax unified
	.arm
	.fpu vfpv3-d16
	.type	crcInit, %function
crcInit:
.LFB0:
	.file 1 "../source/HL_crc.c"
	.loc 1 66 0
	.cfi_startproc
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	@ link register save eliminated.
@ ../source/HL_crc.c:71:     crcREG1->CTRL0 = (uint32)((uint32)1U << 0U)
	.loc 1 71 0
	mov	r2, #-33554432	@ tmp116,
	movw	ip, #257	@ tmp117,
	str	ip, [r2]	@ tmp117, MEM[(volatile struct crcBASE_t *)4261412864B].CTRL0
@ ../source/HL_crc.c:75:     crcREG1->CTRL0=0x00000000U;
	.loc 1 75 0
	mov	r3, #0	@ tmp119,
	str	r3, [r2]	@ tmp119, MEM[(volatile struct crcBASE_t *)4261412864B].CTRL0
@ ../source/HL_crc.c:78:     crcREG1->CTRL2 |= (uint32)0U << 4U;
	.loc 1 78 0
	ldr	r1, [r2, #16]	@ _1, MEM[(volatile struct crcBASE_t *)4261412864B].CTRL2
	str	r1, [r2, #16]	@ _1, MEM[(volatile struct crcBASE_t *)4261412864B].CTRL2
@ ../source/HL_crc.c:87:      crcREG1->INTS= 0x00000000U
	.loc 1 87 0
	str	r3, [r2, #24]	@ tmp119, MEM[(volatile struct crcBASE_t *)4261412864B].INTS
@ ../source/HL_crc.c:100:     crcREG1->PCOUNT_REG1=0x00000000U;
	.loc 1 100 0
	str	r3, [r2, #64]	@ tmp119, MEM[(volatile struct crcBASE_t *)4261412864B].PCOUNT_REG1
@ ../source/HL_crc.c:101:     crcREG1->PCOUNT_REG2=0x00000000U;
	.loc 1 101 0
	str	r3, [r2, #128]	@ tmp119, MEM[(volatile struct crcBASE_t *)4261412864B].PCOUNT_REG2
@ ../source/HL_crc.c:105:     crcREG1->SCOUNT_REG1=0x00000000U;
	.loc 1 105 0
	str	r3, [r2, #68]	@ tmp119, MEM[(volatile struct crcBASE_t *)4261412864B].SCOUNT_REG1
@ ../source/HL_crc.c:106:     crcREG1->SCOUNT_REG2=0x00000000U;
	.loc 1 106 0
	str	r3, [r2, #132]	@ tmp119, MEM[(volatile struct crcBASE_t *)4261412864B].SCOUNT_REG2
@ ../source/HL_crc.c:109:     crcREG1->WDTOPLD1=0x00000000U;
	.loc 1 109 0
	str	r3, [r2, #76]	@ tmp119, MEM[(volatile struct crcBASE_t *)4261412864B].WDTOPLD1
@ ../source/HL_crc.c:110:     crcREG1->WDTOPLD2=0x00000000U;
	.loc 1 110 0
	str	r3, [r2, #140]	@ tmp119, MEM[(volatile struct crcBASE_t *)4261412864B].WDTOPLD2
@ ../source/HL_crc.c:113:     crcREG1->BCTOPLD1=0x00000000U;
	.loc 1 113 0
	str	r3, [r2, #80]	@ tmp119, MEM[(volatile struct crcBASE_t *)4261412864B].BCTOPLD1
@ ../source/HL_crc.c:114:     crcREG1->BCTOPLD2=0x00000000U;
	.loc 1 114 0
	str	r3, [r2, #144]	@ tmp119, MEM[(volatile struct crcBASE_t *)4261412864B].BCTOPLD2
@ ../source/HL_crc.c:117:     crcREG1->REGL1=0x00000000U;
	.loc 1 117 0
	str	r3, [r2, #104]	@ tmp119, MEM[(volatile struct crcBASE_t *)4261412864B].REGL1
@ ../source/HL_crc.c:118:     crcREG1->REGL2=0x00000000U;
	.loc 1 118 0
	str	r3, [r2, #168]	@ tmp119, MEM[(volatile struct crcBASE_t *)4261412864B].REGL2
@ ../source/HL_crc.c:121:     crcREG1->REGH1=0x00000000U;
	.loc 1 121 0
	str	r3, [r2, #108]	@ tmp119, MEM[(volatile struct crcBASE_t *)4261412864B].REGH1
@ ../source/HL_crc.c:122:     crcREG1->REGH2=0x00000000U;
	.loc 1 122 0
	str	r3, [r2, #172]	@ tmp119, MEM[(volatile struct crcBASE_t *)4261412864B].REGH2
@ ../source/HL_crc.c:125:     crcREG1->CTRL2 |= (uint32)(CRC_FULL_CPU)  | (uint32)((uint32)CRC_FULL_CPU << 8U);
	.loc 1 125 0
	ldr	r1, [r2, #16]	@ _2, MEM[(volatile struct crcBASE_t *)4261412864B].CTRL2
	movw	r0, #771	@ tmp149,
	orr	r1, r1, r0	@ _3, _2, tmp149
	str	r1, [r2, #16]	@ _3, MEM[(volatile struct crcBASE_t *)4261412864B].CTRL2
@ ../source/HL_crc.c:135:     crcREG2->CTRL0 = (uint32)((uint32)1U << 0U)
	.loc 1 135 0
	mov	r2, #-83886080	@ tmp151,
	str	ip, [r2]	@ tmp117, MEM[(volatile struct crcBASE_t *)4211081216B].CTRL0
@ ../source/HL_crc.c:139:     crcREG2->CTRL0=0x00000000U;
	.loc 1 139 0
	str	r3, [r2]	@ tmp119, MEM[(volatile struct crcBASE_t *)4211081216B].CTRL0
@ ../source/HL_crc.c:142:     crcREG2->CTRL2 |= (uint32)0U << 4U;
	.loc 1 142 0
	ldr	r1, [r2, #16]	@ _4, MEM[(volatile struct crcBASE_t *)4211081216B].CTRL2
	str	r1, [r2, #16]	@ _4, MEM[(volatile struct crcBASE_t *)4211081216B].CTRL2
@ ../source/HL_crc.c:151:      crcREG2->INTS= 0x00000000U
	.loc 1 151 0
	str	r3, [r2, #24]	@ tmp119, MEM[(volatile struct crcBASE_t *)4211081216B].INTS
@ ../source/HL_crc.c:164:     crcREG2->PCOUNT_REG1=0U;
	.loc 1 164 0
	str	r3, [r2, #64]	@ tmp119, MEM[(volatile struct crcBASE_t *)4211081216B].PCOUNT_REG1
@ ../source/HL_crc.c:165:     crcREG2->PCOUNT_REG2=0U;
	.loc 1 165 0
	str	r3, [r2, #128]	@ tmp119, MEM[(volatile struct crcBASE_t *)4211081216B].PCOUNT_REG2
@ ../source/HL_crc.c:169:     crcREG2->SCOUNT_REG1=0U;
	.loc 1 169 0
	str	r3, [r2, #68]	@ tmp119, MEM[(volatile struct crcBASE_t *)4211081216B].SCOUNT_REG1
@ ../source/HL_crc.c:170:     crcREG2->SCOUNT_REG2=0U;
	.loc 1 170 0
	str	r3, [r2, #132]	@ tmp119, MEM[(volatile struct crcBASE_t *)4211081216B].SCOUNT_REG2
@ ../source/HL_crc.c:173:     crcREG2->WDTOPLD1=0U;
	.loc 1 173 0
	str	r3, [r2, #76]	@ tmp119, MEM[(volatile struct crcBASE_t *)4211081216B].WDTOPLD1
@ ../source/HL_crc.c:174:     crcREG2->WDTOPLD2=0U;
	.loc 1 174 0
	str	r3, [r2, #140]	@ tmp119, MEM[(volatile struct crcBASE_t *)4211081216B].WDTOPLD2
@ ../source/HL_crc.c:177:     crcREG2->BCTOPLD1=0U;
	.loc 1 177 0
	str	r3, [r2, #80]	@ tmp119, MEM[(volatile struct crcBASE_t *)4211081216B].BCTOPLD1
@ ../source/HL_crc.c:178:     crcREG2->BCTOPLD2=0U;
	.loc 1 178 0
	str	r3, [r2, #144]	@ tmp119, MEM[(volatile struct crcBASE_t *)4211081216B].BCTOPLD2
@ ../source/HL_crc.c:181:     crcREG2->REGL1=0U;
	.loc 1 181 0
	str	r3, [r2, #104]	@ tmp119, MEM[(volatile struct crcBASE_t *)4211081216B].REGL1
@ ../source/HL_crc.c:182:     crcREG2->REGL2=0U;
	.loc 1 182 0
	str	r3, [r2, #168]	@ tmp119, MEM[(volatile struct crcBASE_t *)4211081216B].REGL2
@ ../source/HL_crc.c:185:     crcREG2->REGH1=0U;
	.loc 1 185 0
	str	r3, [r2, #108]	@ tmp119, MEM[(volatile struct crcBASE_t *)4211081216B].REGH1
@ ../source/HL_crc.c:186:     crcREG2->REGH2=0U;
	.loc 1 186 0
	str	r3, [r2, #172]	@ tmp119, MEM[(volatile struct crcBASE_t *)4211081216B].REGH2
@ ../source/HL_crc.c:189:     crcREG2->CTRL2 |= (uint32)(CRC_FULL_CPU)  | (uint32)((uint32)CRC_FULL_CPU << 8U);
	.loc 1 189 0
	ldr	r3, [r2, #16]	@ _5, MEM[(volatile struct crcBASE_t *)4211081216B].CTRL2
	orr	r3, r3, r0	@ _6, _5, tmp149
	str	r3, [r2, #16]	@ _6, MEM[(volatile struct crcBASE_t *)4211081216B].CTRL2
@ ../source/HL_crc.c:193: }
	.loc 1 193 0
	bx	lr	@
	.cfi_endproc
.LFE0:
	.size	crcInit, .-crcInit
	.align	2
	.global	crcSendPowerDown
	.syntax unified
	.arm
	.fpu vfpv3-d16
	.type	crcSendPowerDown, %function
crcSendPowerDown:
.LFB1:
	.loc 1 206 0
	.cfi_startproc
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	@ link register save eliminated.
.LVL0:
@ ../source/HL_crc.c:210:     crc->CTRL1 |= 0x00000001U;
	.loc 1 210 0
	ldr	r3, [r0, #8]	@ _1, crc_4(D)->CTRL1
	orr	r3, r3, #1	@ _2, _1,
	str	r3, [r0, #8]	@ _2, crc_4(D)->CTRL1
@ ../source/HL_crc.c:214: }
	.loc 1 214 0
	bx	lr	@
	.cfi_endproc
.LFE1:
	.size	crcSendPowerDown, .-crcSendPowerDown
	.align	2
	.global	crcSignGen
	.syntax unified
	.arm
	.fpu vfpv3-d16
	.type	crcSignGen, %function
crcSignGen:
.LFB2:
	.loc 1 226 0
	.cfi_startproc
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	@ link register save eliminated.
.LVL1:
@ ../source/HL_crc.c:231:     ptr64=param->src_data_pat;
	.loc 1 231 0
	ldr	r2, [r1, #8]	@ ptr64, param_13(D)->src_data_pat
.LVL2:
@ ../source/HL_crc.c:235: 	psaSigx = (uint32)(&crc->PSA_SIGREGL1) + ((uint32)(param->crc_channel) * 0x40U);
	.loc 1 235 0
	add	r0, r0, #96	@ _1, crc,
.LVL3:
	ldr	r3, [r1, #4]	@ _3, param_13(D)->crc_channel
	add	r0, r0, r3, lsl #6	@ psaSigx_ptr64, _1, _3,
.LVL4:
@ ../source/HL_crc.c:238:     if(param->mode==CRC_AUTO)
	.loc 1 238 0
	ldr	r3, [r1]	@ _5, param_13(D)->mode
	cmp	r3, #1	@ _5,
	bxeq	lr	@
@ ../source/HL_crc.c:252:     else if(param->mode==CRC_SEMI_CPU)
	.loc 1 252 0
	cmp	r3, #2	@ _5,
	bxeq	lr	@
@ ../source/HL_crc.c:256:     else if(param->mode==CRC_FULL_CPU)
	.loc 1 256 0
	cmp	r3, #3	@ _5,
	bxne	lr	@
@ ../source/HL_crc.c:258:         for(i=0U;i<param->data_length;i++)
	.loc 1 258 0
	mov	r3, #0	@ i,
.LVL5:
	ldr	ip, [r1, #12]	@ _7, param_13(D)->data_length
	cmp	ip, r3	@ _7, i
	bxls	lr	@
@ ../source/HL_crc.c:226: {
	.loc 1 226 0
	push	{r4, r5}	@
	.cfi_def_cfa_offset 8
	.cfi_offset 4, -8
	.cfi_offset 5, -4
.L6:
@ ../source/HL_crc.c:261:             *psaSigx_ptr64 = *ptr64;
	.loc 1 261 0
	ldrd	r4, [r2], #8	@ _6, *ptr64_9
.LVL6:
	strd	r4, [r0]	@ _6, *psaSigx_ptr64_17
.LVL7:
@ ../source/HL_crc.c:258:         for(i=0U;i<param->data_length;i++)
	.loc 1 258 0
	add	r3, r3, #1	@ i, i,
.LVL8:
	ldr	ip, [r1, #12]	@ _7, param_13(D)->data_length
	cmp	ip, r3	@ _7, i
	bhi	.L6	@,
@ ../source/HL_crc.c:272: }
	.loc 1 272 0
	pop	{r4, r5}	@
	.cfi_restore 5
	.cfi_restore 4
	.cfi_def_cfa_offset 0
	bx	lr	@
	.cfi_endproc
.LFE2:
	.size	crcSignGen, .-crcSignGen
	.align	2
	.global	crcSetConfig
	.syntax unified
	.arm
	.fpu vfpv3-d16
	.type	crcSetConfig, %function
crcSetConfig:
.LFB3:
	.loc 1 284 0
	.cfi_startproc
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	@ link register save eliminated.
.LVL9:
@ ../source/HL_crc.c:288: 	switch (param->crc_channel)
	.loc 1 288 0
	ldr	r3, [r1]	@ _1, param_31(D)->crc_channel
	cmp	r3, #0	@ _1,
	beq	.L16	@,
	cmp	r3, #1	@ _1,
	bxne	lr	@
@ ../source/HL_crc.c:301: 		crc->CTRL2 &=0xFFFFFCFFU;	
	.loc 1 301 0
	ldr	r3, [r0, #16]	@ _15, crc_32(D)->CTRL2
	bic	r3, r3, #768	@ _16, _15,
	str	r3, [r0, #16]	@ _16, crc_32(D)->CTRL2
@ ../source/HL_crc.c:302: 		crc->CTRL0 |=0x00000100U;
	.loc 1 302 0
	ldr	r3, [r0]	@ _17, crc_32(D)->CTRL0
	orr	r3, r3, #256	@ _18, _17,
	str	r3, [r0]	@ _18, crc_32(D)->CTRL0
@ ../source/HL_crc.c:303: 		crc->CTRL0 &=0xFFFFFEFFU;	
	.loc 1 303 0
	ldr	r3, [r0]	@ _19, crc_32(D)->CTRL0
	bic	r3, r3, #256	@ _20, _19,
	str	r3, [r0]	@ _20, crc_32(D)->CTRL0
@ ../source/HL_crc.c:304: 		crc->PCOUNT_REG2 = param->pcount;
	.loc 1 304 0
	ldr	r3, [r1, #8]	@ _21, param_31(D)->pcount
	str	r3, [r0, #128]	@ _21, crc_32(D)->PCOUNT_REG2
@ ../source/HL_crc.c:305: 		crc->SCOUNT_REG2= param->scount;
	.loc 1 305 0
	ldr	r3, [r1, #12]	@ _22, param_31(D)->scount
	str	r3, [r0, #132]	@ _22, crc_32(D)->SCOUNT_REG2
@ ../source/HL_crc.c:306: 		crc->WDTOPLD2= param->wdg_preload;
	.loc 1 306 0
	ldr	r3, [r1, #16]	@ _23, param_31(D)->wdg_preload
	str	r3, [r0, #140]	@ _23, crc_32(D)->WDTOPLD2
@ ../source/HL_crc.c:307: 		crc->BCTOPLD2= param->block_preload;
	.loc 1 307 0
	ldr	r3, [r1, #20]	@ _24, param_31(D)->block_preload
	str	r3, [r0, #144]	@ _24, crc_32(D)->BCTOPLD2
@ ../source/HL_crc.c:308: 		crc->CTRL2 |= (uint32)((uint32)param->mode << 8U);		
	.loc 1 308 0
	ldr	r3, [r0, #16]	@ _25, crc_32(D)->CTRL2
	ldr	r2, [r1, #4]	@ _26, param_31(D)->mode
	orr	r3, r3, r2, lsl #8	@ _28, _25, _26,
	str	r3, [r0, #16]	@ _28, crc_32(D)->CTRL2
@ ../source/HL_crc.c:316: }
	.loc 1 316 0
	bx	lr	@
.L16:
@ ../source/HL_crc.c:291: 		crc->CTRL2 &=0xFFFFFFFCU;
	.loc 1 291 0
	ldr	r3, [r0, #16]	@ _2, crc_32(D)->CTRL2
	bic	r3, r3, #3	@ _3, _2,
	str	r3, [r0, #16]	@ _3, crc_32(D)->CTRL2
@ ../source/HL_crc.c:292: 		crc->CTRL0 |=0x00000001U;
	.loc 1 292 0
	ldr	r3, [r0]	@ _4, crc_32(D)->CTRL0
	orr	r3, r3, #1	@ _5, _4,
	str	r3, [r0]	@ _5, crc_32(D)->CTRL0
@ ../source/HL_crc.c:293: 		crc->CTRL0 &=0xFFFFFFFEU;	
	.loc 1 293 0
	ldr	r3, [r0]	@ _6, crc_32(D)->CTRL0
	bic	r3, r3, #1	@ _7, _6,
	str	r3, [r0]	@ _7, crc_32(D)->CTRL0
@ ../source/HL_crc.c:294: 		crc->PCOUNT_REG1 = param->pcount;
	.loc 1 294 0
	ldr	r3, [r1, #8]	@ _8, param_31(D)->pcount
	str	r3, [r0, #64]	@ _8, crc_32(D)->PCOUNT_REG1
@ ../source/HL_crc.c:295: 		crc->SCOUNT_REG1 = param->scount;
	.loc 1 295 0
	ldr	r3, [r1, #12]	@ _9, param_31(D)->scount
	str	r3, [r0, #68]	@ _9, crc_32(D)->SCOUNT_REG1
@ ../source/HL_crc.c:296: 		crc->WDTOPLD1= param->wdg_preload;
	.loc 1 296 0
	ldr	r3, [r1, #16]	@ _10, param_31(D)->wdg_preload
	str	r3, [r0, #76]	@ _10, crc_32(D)->WDTOPLD1
@ ../source/HL_crc.c:297: 		crc->BCTOPLD1= param->block_preload;
	.loc 1 297 0
	ldr	r3, [r1, #20]	@ _11, param_31(D)->block_preload
	str	r3, [r0, #80]	@ _11, crc_32(D)->BCTOPLD1
@ ../source/HL_crc.c:298: 		crc->CTRL2 |= param->mode;		
	.loc 1 298 0
	ldr	r3, [r0, #16]	@ _12, crc_32(D)->CTRL2
	ldr	r2, [r1, #4]	@ _13, param_31(D)->mode
	orr	r3, r3, r2	@ _14, _12, _13
	str	r3, [r0, #16]	@ _14, crc_32(D)->CTRL2
@ ../source/HL_crc.c:299: 	    break;
	.loc 1 299 0
	bx	lr	@
	.cfi_endproc
.LFE3:
	.size	crcSetConfig, .-crcSetConfig
	.align	2
	.global	crcGetSectorSig
	.syntax unified
	.arm
	.fpu vfpv3-d16
	.type	crcGetSectorSig, %function
crcGetSectorSig:
.LFB4:
	.loc 1 333 0
	.cfi_startproc
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
.LVL10:
	push	{r4, r5, lr}	@
	.cfi_def_cfa_offset 12
	.cfi_offset 4, -12
	.cfi_offset 5, -8
	.cfi_offset 14, -4
.LVL11:
@ ../source/HL_crc.c:335: 	uint32 CRC_PSA_SECSIGREGH1 = crc->PSA_SECSIGREGH1;
	.loc 1 335 0
	ldr	ip, [r0, #116]	@ CRC_PSA_SECSIGREGH1, crc_9(D)->PSA_SECSIGREGH1
.LVL12:
@ ../source/HL_crc.c:336: 	uint32 CRC_PSA_SECSIGREGL1 = crc->PSA_SECSIGREGL1;
	.loc 1 336 0
	ldr	lr, [r0, #112]	@ CRC_PSA_SECSIGREGL1, crc_9(D)->PSA_SECSIGREGL1
.LVL13:
@ ../source/HL_crc.c:337: 	uint32 CRC_PSA_SECSIGREGH2 = crc->PSA_SECSIGREGH2;
	.loc 1 337 0
	ldr	r3, [r0, #180]	@ CRC_PSA_SECSIGREGH2, crc_9(D)->PSA_SECSIGREGH2
.LVL14:
@ ../source/HL_crc.c:338: 	uint32 CRC_PSA_SECSIGREGL2 = crc->PSA_SECSIGREGL2;
	.loc 1 338 0
	ldr	r2, [r0, #176]	@ CRC_PSA_SECSIGREGL2, crc_9(D)->PSA_SECSIGREGL2
.LVL15:
@ ../source/HL_crc.c:342:     switch (channel)
	.loc 1 342 0
	cmp	r1, #0	@ channel
	beq	.L21	@,
	cmp	r1, #1	@ channel,
	beq	.L22	@,
@ ../source/HL_crc.c:334:     uint64 status=0U;
	.loc 1 334 0
	mov	r4, #0	@ <retval>,
	mov	r5, #0	@ <retval>,
@ ../source/HL_crc.c:355:     return status;
	.loc 1 355 0
	b	.L19	@
.L21:
@ ../source/HL_crc.c:346: 		status = (((uint64)(CRC_PSA_SECSIGREGL1) << 32U) | (uint64)(CRC_PSA_SECSIGREGH1));
	.loc 1 346 0
	mov	r0, #0	@ _2,
.LVL16:
	orr	r4, r0, ip	@ <retval>, _2, CRC_PSA_SECSIGREGH1
	mov	r5, lr	@ <retval>, _2
.LVL17:
.L19:
@ ../source/HL_crc.c:359: }
	.loc 1 359 0
	mov	r0, r4	@, <retval>
	mov	r1, r5	@, <retval>
.LVL18:
	pop	{r4, r5, pc}	@
.LVL19:
.L22:
@ ../source/HL_crc.c:350: 		status = (((uint64)(CRC_PSA_SECSIGREGL2) << 32U) | (uint64)(CRC_PSA_SECSIGREGH2));
	.loc 1 350 0
	mov	r0, #0	@ _5,
.LVL20:
	orr	r4, r0, r3	@ <retval>, _5, CRC_PSA_SECSIGREGH2
	mov	r5, r2	@ <retval>, _5
.LVL21:
@ ../source/HL_crc.c:351: 		break;
	.loc 1 351 0
	b	.L19	@
	.cfi_endproc
.LFE4:
	.size	crcGetSectorSig, .-crcGetSectorSig
	.align	2
	.global	crcGetFailedSector
	.syntax unified
	.arm
	.fpu vfpv3-d16
	.type	crcGetFailedSector, %function
crcGetFailedSector:
.LFB5:
	.loc 1 377 0
	.cfi_startproc
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	@ link register save eliminated.
.LVL22:
@ ../source/HL_crc.c:384:     switch (channel)
	.loc 1 384 0
	cmp	r1, #0	@ channel
	beq	.L28	@,
	cmp	r1, #1	@ channel,
	beq	.L29	@,
@ ../source/HL_crc.c:379:     uint32 sector=0U;
	.loc 1 379 0
	mov	r0, #0	@ <retval>,
.LVL23:
@ ../source/HL_crc.c:398: }
	.loc 1 398 0
	bx	lr	@
.LVL24:
.L28:
@ ../source/HL_crc.c:387:         sector = crc->CURSEC_REG1;
	.loc 1 387 0
	ldr	r0, [r0, #72]	@ <retval>, crc_4(D)->CURSEC_REG1
.LVL25:
@ ../source/HL_crc.c:388:          break;
	.loc 1 388 0
	bx	lr	@
.LVL26:
.L29:
@ ../source/HL_crc.c:390:         sector = crc->CURSEC_REG2;
	.loc 1 390 0
	ldr	r0, [r0, #136]	@ <retval>, crc_4(D)->CURSEC_REG2
.LVL27:
@ ../source/HL_crc.c:391:         break;
	.loc 1 391 0
	bx	lr	@
	.cfi_endproc
.LFE5:
	.size	crcGetFailedSector, .-crcGetFailedSector
	.align	2
	.global	crcGetIntrPend
	.syntax unified
	.arm
	.fpu vfpv3-d16
	.type	crcGetIntrPend, %function
crcGetIntrPend:
.LFB6:
	.loc 1 411 0
	.cfi_startproc
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	@ link register save eliminated.
.LVL28:
@ ../source/HL_crc.c:414:     return crc->INT_OFFSET_REG;
	.loc 1 414 0
	ldr	r0, [r0, #48]	@ <retval>, crc_2(D)->INT_OFFSET_REG
.LVL29:
@ ../source/HL_crc.c:417: }
	.loc 1 417 0
	bx	lr	@
	.cfi_endproc
.LFE6:
	.size	crcGetIntrPend, .-crcGetIntrPend
	.align	2
	.global	crcChannelReset
	.syntax unified
	.arm
	.fpu vfpv3-d16
	.type	crcChannelReset, %function
crcChannelReset:
.LFB7:
	.loc 1 435 0
	.cfi_startproc
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	@ link register save eliminated.
.LVL30:
@ ../source/HL_crc.c:439:     if(channel == 0U)
	.loc 1 439 0
	cmp	r1, #0	@ channel
	beq	.L36	@,
@ ../source/HL_crc.c:444:      else if(channel == 1U)
	.loc 1 444 0
	cmp	r1, #1	@ channel,
	bxne	lr	@
@ ../source/HL_crc.c:446:         crc->CTRL0 |= (uint32)((uint32)1U << 8U); /** Reset the CRC channel  */
	.loc 1 446 0
	ldr	r3, [r0]	@ _5, crc_12(D)->CTRL0
	orr	r3, r3, #256	@ _6, _5,
	str	r3, [r0]	@ _6, crc_12(D)->CTRL0
@ ../source/HL_crc.c:447:         crc->CTRL0 &= ~(uint32)((uint32)1U << 8U); /** Exit the reset  */
	.loc 1 447 0
	ldr	r3, [r0]	@ _7, crc_12(D)->CTRL0
	bic	r3, r3, #256	@ _8, _7,
	str	r3, [r0]	@ _8, crc_12(D)->CTRL0
@ ../source/HL_crc.c:455:  }
	.loc 1 455 0
	bx	lr	@
.L36:
@ ../source/HL_crc.c:441:         crc->CTRL0 |= (uint32)((uint32)1U << 0U); /** Reset the CRC channel  */
	.loc 1 441 0
	ldr	r3, [r0]	@ _1, crc_12(D)->CTRL0
	orr	r3, r3, #1	@ _2, _1,
	str	r3, [r0]	@ _2, crc_12(D)->CTRL0
@ ../source/HL_crc.c:442:         crc->CTRL0 &= ~(uint32)((uint32)1U << 0U); /** Exit the reset  */
	.loc 1 442 0
	ldr	r3, [r0]	@ _3, crc_12(D)->CTRL0
	bic	r3, r3, #1	@ _4, _3,
	str	r3, [r0]	@ _4, crc_12(D)->CTRL0
	bx	lr	@
	.cfi_endproc
.LFE7:
	.size	crcChannelReset, .-crcChannelReset
	.align	2
	.global	crcEnableNotification
	.syntax unified
	.arm
	.fpu vfpv3-d16
	.type	crcEnableNotification, %function
crcEnableNotification:
.LFB8:
	.loc 1 479 0
	.cfi_startproc
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	@ link register save eliminated.
.LVL31:
@ ../source/HL_crc.c:483:     crc->INTS= flags;
	.loc 1 483 0
	str	r1, [r0, #24]	@ flags, crc_2(D)->INTS
@ ../source/HL_crc.c:487: }
	.loc 1 487 0
	bx	lr	@
	.cfi_endproc
.LFE8:
	.size	crcEnableNotification, .-crcEnableNotification
	.align	2
	.global	crcDisableNotification
	.syntax unified
	.arm
	.fpu vfpv3-d16
	.type	crcDisableNotification, %function
crcDisableNotification:
.LFB9:
	.loc 1 511 0
	.cfi_startproc
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	@ link register save eliminated.
.LVL32:
@ ../source/HL_crc.c:515:      crc->INTR= flags;
	.loc 1 515 0
	str	r1, [r0, #32]	@ flags, crc_2(D)->INTR
@ ../source/HL_crc.c:519: }
	.loc 1 519 0
	bx	lr	@
	.cfi_endproc
.LFE9:
	.size	crcDisableNotification, .-crcDisableNotification
	.align	2
	.global	crcGetPSASig
	.syntax unified
	.arm
	.fpu vfpv3-d16
	.type	crcGetPSASig, %function
crcGetPSASig:
.LFB10:
	.loc 1 536 0
	.cfi_startproc
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
.LVL33:
	push	{r4, r5, lr}	@
	.cfi_def_cfa_offset 12
	.cfi_offset 4, -12
	.cfi_offset 5, -8
	.cfi_offset 14, -4
.LVL34:
@ ../source/HL_crc.c:538: 	uint32 CRC_PSA_SIGREGH1 = crc->PSA_SIGREGH1;
	.loc 1 538 0
	ldr	ip, [r0, #100]	@ CRC_PSA_SIGREGH1, crc_9(D)->PSA_SIGREGH1
.LVL35:
@ ../source/HL_crc.c:539: 	uint32 CRC_PSA_SIGREGL1 = crc->PSA_SIGREGL1;
	.loc 1 539 0
	ldr	lr, [r0, #96]	@ CRC_PSA_SIGREGL1, crc_9(D)->PSA_SIGREGL1
.LVL36:
@ ../source/HL_crc.c:540: 	uint32 CRC_PSA_SIGREGH2 = crc->PSA_SIGREGH2;
	.loc 1 540 0
	ldr	r3, [r0, #164]	@ CRC_PSA_SIGREGH2, crc_9(D)->PSA_SIGREGH2
.LVL37:
@ ../source/HL_crc.c:541: 	uint32 CRC_PSA_SIGREGL2 = crc->PSA_SIGREGL2;
	.loc 1 541 0
	ldr	r2, [r0, #160]	@ CRC_PSA_SIGREGL2, crc_9(D)->PSA_SIGREGL2
.LVL38:
@ ../source/HL_crc.c:545:     switch (channel)
	.loc 1 545 0
	cmp	r1, #0	@ channel
	beq	.L41	@,
	cmp	r1, #1	@ channel,
	beq	.L42	@,
@ ../source/HL_crc.c:537:     uint64 status = 0U;
	.loc 1 537 0
	mov	r4, #0	@ <retval>,
	mov	r5, #0	@ <retval>,
@ ../source/HL_crc.c:558:     return status;
	.loc 1 558 0
	b	.L39	@
.L41:
@ ../source/HL_crc.c:549: 		status = (((uint64)(CRC_PSA_SIGREGL1) << 32U) | (uint64)(CRC_PSA_SIGREGH1));
	.loc 1 549 0
	mov	r0, #0	@ _2,
.LVL39:
	orr	r4, r0, ip	@ <retval>, _2, CRC_PSA_SIGREGH1
	mov	r5, lr	@ <retval>, _2
.LVL40:
.L39:
@ ../source/HL_crc.c:562: }
	.loc 1 562 0
	mov	r0, r4	@, <retval>
	mov	r1, r5	@, <retval>
.LVL41:
	pop	{r4, r5, pc}	@
.LVL42:
.L42:
@ ../source/HL_crc.c:553: 		status = (((uint64)(CRC_PSA_SIGREGL2) << 32U) | (uint64)(CRC_PSA_SIGREGH2));
	.loc 1 553 0
	mov	r0, #0	@ _5,
.LVL43:
	orr	r4, r0, r3	@ <retval>, _5, CRC_PSA_SIGREGH2
	mov	r5, r2	@ <retval>, _5
.LVL44:
@ ../source/HL_crc.c:554: 		break;
	.loc 1 554 0
	b	.L39	@
	.cfi_endproc
.LFE10:
	.size	crcGetPSASig, .-crcGetPSASig
	.align	2
	.global	crc1GetConfigValue
	.syntax unified
	.arm
	.fpu vfpv3-d16
	.type	crc1GetConfigValue, %function
crc1GetConfigValue:
.LFB11:
	.loc 1 584 0
	.cfi_startproc
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	@ link register save eliminated.
.LVL45:
@ ../source/HL_crc.c:585: 	if (type == InitialValue)
	.loc 1 585 0
	cmp	r1, #0	@ type,
	beq	.L49	@,
@ ../source/HL_crc.c:603: 		config_reg->CONFIG_CTRL0        = crcREG1->CTRL0;
	.loc 1 603 0
	mov	r3, #-33554432	@ tmp136,
	ldr	r2, [r3]	@ _1, MEM[(volatile struct crcBASE_t *)4261412864B].CTRL0
	str	r2, [r0]	@ _1, config_reg_16(D)->CONFIG_CTRL0
@ ../source/HL_crc.c:604: 		config_reg->CONFIG_CTRL1        = crcREG1->CTRL1;
	.loc 1 604 0
	ldr	r2, [r3, #8]	@ _2, MEM[(volatile struct crcBASE_t *)4261412864B].CTRL1
	str	r2, [r0, #4]	@ _2, config_reg_16(D)->CONFIG_CTRL1
@ ../source/HL_crc.c:605: 		config_reg->CONFIG_CTRL2        = crcREG1->CTRL2;
	.loc 1 605 0
	ldr	r2, [r3, #16]	@ _3, MEM[(volatile struct crcBASE_t *)4261412864B].CTRL2
	str	r2, [r0, #8]	@ _3, config_reg_16(D)->CONFIG_CTRL2
@ ../source/HL_crc.c:606: 		config_reg->CONFIG_INTS         = crcREG1->INTS;
	.loc 1 606 0
	ldr	r2, [r3, #24]	@ _4, MEM[(volatile struct crcBASE_t *)4261412864B].INTS
	str	r2, [r0, #12]	@ _4, config_reg_16(D)->CONFIG_INTS
@ ../source/HL_crc.c:607: 		config_reg->CONFIG_PCOUNT_REG1  = crcREG1->PCOUNT_REG1;
	.loc 1 607 0
	ldr	r2, [r3, #64]	@ _5, MEM[(volatile struct crcBASE_t *)4261412864B].PCOUNT_REG1
	str	r2, [r0, #16]	@ _5, config_reg_16(D)->CONFIG_PCOUNT_REG1
@ ../source/HL_crc.c:608: 		config_reg->CONFIG_SCOUNT_REG1  = crcREG1->SCOUNT_REG1;
	.loc 1 608 0
	ldr	r2, [r3, #68]	@ _6, MEM[(volatile struct crcBASE_t *)4261412864B].SCOUNT_REG1
	str	r2, [r0, #20]	@ _6, config_reg_16(D)->CONFIG_SCOUNT_REG1
@ ../source/HL_crc.c:609: 		config_reg->CONFIG_WDTOPLD1     = crcREG1->WDTOPLD1;
	.loc 1 609 0
	ldr	r2, [r3, #76]	@ _7, MEM[(volatile struct crcBASE_t *)4261412864B].WDTOPLD1
	str	r2, [r0, #24]	@ _7, config_reg_16(D)->CONFIG_WDTOPLD1
@ ../source/HL_crc.c:610: 		config_reg->CONFIG_BCTOPLD1     = crcREG1->BCTOPLD1;
	.loc 1 610 0
	ldr	r2, [r3, #80]	@ _8, MEM[(volatile struct crcBASE_t *)4261412864B].BCTOPLD1
	str	r2, [r0, #28]	@ _8, config_reg_16(D)->CONFIG_BCTOPLD1
@ ../source/HL_crc.c:611: 		config_reg->CONFIG_PCOUNT_REG2  = crcREG1->PCOUNT_REG2;
	.loc 1 611 0
	ldr	r2, [r3, #128]	@ _9, MEM[(volatile struct crcBASE_t *)4261412864B].PCOUNT_REG2
	str	r2, [r0, #32]	@ _9, config_reg_16(D)->CONFIG_PCOUNT_REG2
@ ../source/HL_crc.c:612: 		config_reg->CONFIG_SCOUNT_REG2  = crcREG1->SCOUNT_REG2;
	.loc 1 612 0
	ldr	r2, [r3, #132]	@ _10, MEM[(volatile struct crcBASE_t *)4261412864B].SCOUNT_REG2
	str	r2, [r0, #36]	@ _10, config_reg_16(D)->CONFIG_SCOUNT_REG2
@ ../source/HL_crc.c:613: 		config_reg->CONFIG_WDTOPLD2     = crcREG1->WDTOPLD2;
	.loc 1 613 0
	ldr	r2, [r3, #140]	@ _11, MEM[(volatile struct crcBASE_t *)4261412864B].WDTOPLD2
	str	r2, [r0, #40]	@ _11, config_reg_16(D)->CONFIG_WDTOPLD2
@ ../source/HL_crc.c:614: 		config_reg->CONFIG_BCTOPLD2     = crcREG1->BCTOPLD2; 
	.loc 1 614 0
	ldr	r3, [r3, #144]	@ _12, MEM[(volatile struct crcBASE_t *)4261412864B].BCTOPLD2
	str	r3, [r0, #44]	@ _12, config_reg_16(D)->CONFIG_BCTOPLD2
@ ../source/HL_crc.c:616: }
	.loc 1 616 0
	bx	lr	@
.L49:
@ ../source/HL_crc.c:587: 		config_reg->CONFIG_CTRL0        = CRC1_CTRL0_CONFIGVALUE;
	.loc 1 587 0
	mov	r3, #0	@ tmp124,
	str	r3, [r0]	@ tmp124, config_reg_16(D)->CONFIG_CTRL0
@ ../source/HL_crc.c:588: 		config_reg->CONFIG_CTRL1        = CRC1_CTRL1_CONFIGVALUE;
	.loc 1 588 0
	str	r3, [r0, #4]	@ tmp124, config_reg_16(D)->CONFIG_CTRL1
@ ../source/HL_crc.c:589: 		config_reg->CONFIG_CTRL2        = CRC1_CTRL2_CONFIGVALUE;
	.loc 1 589 0
	movw	r2, #771	@ tmp126,
	str	r2, [r0, #8]	@ tmp126, config_reg_16(D)->CONFIG_CTRL2
@ ../source/HL_crc.c:590: 		config_reg->CONFIG_INTS         = CRC1_INTS_CONFIGVALUE;
	.loc 1 590 0
	str	r3, [r0, #12]	@ tmp124, config_reg_16(D)->CONFIG_INTS
@ ../source/HL_crc.c:591: 		config_reg->CONFIG_PCOUNT_REG1  = CRC1_PCOUNT_REG1_CONFIGVALUE;
	.loc 1 591 0
	str	r3, [r0, #16]	@ tmp124, config_reg_16(D)->CONFIG_PCOUNT_REG1
@ ../source/HL_crc.c:592: 		config_reg->CONFIG_SCOUNT_REG1  = CRC1_SCOUNT_REG1_CONFIGVALUE;
	.loc 1 592 0
	str	r3, [r0, #20]	@ tmp124, config_reg_16(D)->CONFIG_SCOUNT_REG1
@ ../source/HL_crc.c:593: 		config_reg->CONFIG_WDTOPLD1     = CRC1_WDTOPLD1_CONFIGVALUE;
	.loc 1 593 0
	str	r3, [r0, #24]	@ tmp124, config_reg_16(D)->CONFIG_WDTOPLD1
@ ../source/HL_crc.c:594: 		config_reg->CONFIG_BCTOPLD1     = CRC1_BCTOPLD1_CONFIGVALUE;
	.loc 1 594 0
	str	r3, [r0, #28]	@ tmp124, config_reg_16(D)->CONFIG_BCTOPLD1
@ ../source/HL_crc.c:595: 		config_reg->CONFIG_PCOUNT_REG2  = CRC1_PCOUNT_REG2_CONFIGVALUE;
	.loc 1 595 0
	str	r3, [r0, #32]	@ tmp124, config_reg_16(D)->CONFIG_PCOUNT_REG2
@ ../source/HL_crc.c:596: 		config_reg->CONFIG_SCOUNT_REG2  = CRC1_SCOUNT_REG2_CONFIGVALUE;
	.loc 1 596 0
	str	r3, [r0, #36]	@ tmp124, config_reg_16(D)->CONFIG_SCOUNT_REG2
@ ../source/HL_crc.c:597: 		config_reg->CONFIG_WDTOPLD2     = CRC1_WDTOPLD2_CONFIGVALUE;
	.loc 1 597 0
	str	r3, [r0, #40]	@ tmp124, config_reg_16(D)->CONFIG_WDTOPLD2
@ ../source/HL_crc.c:598: 		config_reg->CONFIG_BCTOPLD2     = CRC1_BCTOPLD2_CONFIGVALUE;
	.loc 1 598 0
	str	r3, [r0, #44]	@ tmp124, config_reg_16(D)->CONFIG_BCTOPLD2
	bx	lr	@
	.cfi_endproc
.LFE11:
	.size	crc1GetConfigValue, .-crc1GetConfigValue
	.align	2
	.global	crc2GetConfigValue
	.syntax unified
	.arm
	.fpu vfpv3-d16
	.type	crc2GetConfigValue, %function
crc2GetConfigValue:
.LFB12:
	.loc 1 638 0
	.cfi_startproc
	@ args = 0, pretend = 0, frame = 0
	@ frame_needed = 0, uses_anonymous_args = 0
	@ link register save eliminated.
.LVL46:
@ ../source/HL_crc.c:639: 	if (type == InitialValue)
	.loc 1 639 0
	cmp	r1, #0	@ type,
	beq	.L53	@,
@ ../source/HL_crc.c:657: 		config_reg->CONFIG_CTRL0        = crcREG2->CTRL0;
	.loc 1 657 0
	mov	r3, #-83886080	@ tmp136,
	ldr	r2, [r3]	@ _1, MEM[(volatile struct crcBASE_t *)4211081216B].CTRL0
	str	r2, [r0]	@ _1, config_reg_16(D)->CONFIG_CTRL0
@ ../source/HL_crc.c:658: 		config_reg->CONFIG_CTRL1        = crcREG2->CTRL1;
	.loc 1 658 0
	ldr	r2, [r3, #8]	@ _2, MEM[(volatile struct crcBASE_t *)4211081216B].CTRL1
	str	r2, [r0, #4]	@ _2, config_reg_16(D)->CONFIG_CTRL1
@ ../source/HL_crc.c:659: 		config_reg->CONFIG_CTRL2        = crcREG2->CTRL2;
	.loc 1 659 0
	ldr	r2, [r3, #16]	@ _3, MEM[(volatile struct crcBASE_t *)4211081216B].CTRL2
	str	r2, [r0, #8]	@ _3, config_reg_16(D)->CONFIG_CTRL2
@ ../source/HL_crc.c:660: 		config_reg->CONFIG_INTS         = crcREG2->INTS;
	.loc 1 660 0
	ldr	r2, [r3, #24]	@ _4, MEM[(volatile struct crcBASE_t *)4211081216B].INTS
	str	r2, [r0, #12]	@ _4, config_reg_16(D)->CONFIG_INTS
@ ../source/HL_crc.c:661: 		config_reg->CONFIG_PCOUNT_REG1  = crcREG2->PCOUNT_REG1;
	.loc 1 661 0
	ldr	r2, [r3, #64]	@ _5, MEM[(volatile struct crcBASE_t *)4211081216B].PCOUNT_REG1
	str	r2, [r0, #16]	@ _5, config_reg_16(D)->CONFIG_PCOUNT_REG1
@ ../source/HL_crc.c:662: 		config_reg->CONFIG_SCOUNT_REG1  = crcREG2->SCOUNT_REG1;
	.loc 1 662 0
	ldr	r2, [r3, #68]	@ _6, MEM[(volatile struct crcBASE_t *)4211081216B].SCOUNT_REG1
	str	r2, [r0, #20]	@ _6, config_reg_16(D)->CONFIG_SCOUNT_REG1
@ ../source/HL_crc.c:663: 		config_reg->CONFIG_WDTOPLD1     = crcREG2->WDTOPLD1;
	.loc 1 663 0
	ldr	r2, [r3, #76]	@ _7, MEM[(volatile struct crcBASE_t *)4211081216B].WDTOPLD1
	str	r2, [r0, #24]	@ _7, config_reg_16(D)->CONFIG_WDTOPLD1
@ ../source/HL_crc.c:664: 		config_reg->CONFIG_BCTOPLD1     = crcREG2->BCTOPLD1;
	.loc 1 664 0
	ldr	r2, [r3, #80]	@ _8, MEM[(volatile struct crcBASE_t *)4211081216B].BCTOPLD1
	str	r2, [r0, #28]	@ _8, config_reg_16(D)->CONFIG_BCTOPLD1
@ ../source/HL_crc.c:665: 		config_reg->CONFIG_PCOUNT_REG2  = crcREG2->PCOUNT_REG2;
	.loc 1 665 0
	ldr	r2, [r3, #128]	@ _9, MEM[(volatile struct crcBASE_t *)4211081216B].PCOUNT_REG2
	str	r2, [r0, #32]	@ _9, config_reg_16(D)->CONFIG_PCOUNT_REG2
@ ../source/HL_crc.c:666: 		config_reg->CONFIG_SCOUNT_REG2  = crcREG2->SCOUNT_REG2;
	.loc 1 666 0
	ldr	r2, [r3, #132]	@ _10, MEM[(volatile struct crcBASE_t *)4211081216B].SCOUNT_REG2
	str	r2, [r0, #36]	@ _10, config_reg_16(D)->CONFIG_SCOUNT_REG2
@ ../source/HL_crc.c:667: 		config_reg->CONFIG_WDTOPLD2     = crcREG2->WDTOPLD2;
	.loc 1 667 0
	ldr	r2, [r3, #140]	@ _11, MEM[(volatile struct crcBASE_t *)4211081216B].WDTOPLD2
	str	r2, [r0, #40]	@ _11, config_reg_16(D)->CONFIG_WDTOPLD2
@ ../source/HL_crc.c:668: 		config_reg->CONFIG_BCTOPLD2     = crcREG2->BCTOPLD2; 
	.loc 1 668 0
	ldr	r3, [r3, #144]	@ _12, MEM[(volatile struct crcBASE_t *)4211081216B].BCTOPLD2
	str	r3, [r0, #44]	@ _12, config_reg_16(D)->CONFIG_BCTOPLD2
@ ../source/HL_crc.c:670: }
	.loc 1 670 0
	bx	lr	@
.L53:
@ ../source/HL_crc.c:641: 		config_reg->CONFIG_CTRL0        = CRC2_CTRL0_CONFIGVALUE;
	.loc 1 641 0
	mov	r3, #0	@ tmp124,
	str	r3, [r0]	@ tmp124, config_reg_16(D)->CONFIG_CTRL0
@ ../source/HL_crc.c:642: 		config_reg->CONFIG_CTRL1        = CRC2_CTRL1_CONFIGVALUE;
	.loc 1 642 0
	str	r3, [r0, #4]	@ tmp124, config_reg_16(D)->CONFIG_CTRL1
@ ../source/HL_crc.c:643: 		config_reg->CONFIG_CTRL2        = CRC2_CTRL2_CONFIGVALUE;
	.loc 1 643 0
	movw	r2, #771	@ tmp126,
	str	r2, [r0, #8]	@ tmp126, config_reg_16(D)->CONFIG_CTRL2
@ ../source/HL_crc.c:644: 		config_reg->CONFIG_INTS         = CRC2_INTS_CONFIGVALUE;
	.loc 1 644 0
	str	r3, [r0, #12]	@ tmp124, config_reg_16(D)->CONFIG_INTS
@ ../source/HL_crc.c:645: 		config_reg->CONFIG_PCOUNT_REG1  = CRC2_PCOUNT_REG1_CONFIGVALUE;
	.loc 1 645 0
	str	r3, [r0, #16]	@ tmp124, config_reg_16(D)->CONFIG_PCOUNT_REG1
@ ../source/HL_crc.c:646: 		config_reg->CONFIG_SCOUNT_REG1  = CRC2_SCOUNT_REG1_CONFIGVALUE;
	.loc 1 646 0
	str	r3, [r0, #20]	@ tmp124, config_reg_16(D)->CONFIG_SCOUNT_REG1
@ ../source/HL_crc.c:647: 		config_reg->CONFIG_WDTOPLD1     = CRC2_WDTOPLD1_CONFIGVALUE;
	.loc 1 647 0
	str	r3, [r0, #24]	@ tmp124, config_reg_16(D)->CONFIG_WDTOPLD1
@ ../source/HL_crc.c:648: 		config_reg->CONFIG_BCTOPLD1     = CRC2_BCTOPLD1_CONFIGVALUE;
	.loc 1 648 0
	str	r3, [r0, #28]	@ tmp124, config_reg_16(D)->CONFIG_BCTOPLD1
@ ../source/HL_crc.c:649: 		config_reg->CONFIG_PCOUNT_REG2  = CRC2_PCOUNT_REG2_CONFIGVALUE;
	.loc 1 649 0
	str	r3, [r0, #32]	@ tmp124, config_reg_16(D)->CONFIG_PCOUNT_REG2
@ ../source/HL_crc.c:650: 		config_reg->CONFIG_SCOUNT_REG2  = CRC2_SCOUNT_REG2_CONFIGVALUE;
	.loc 1 650 0
	str	r3, [r0, #36]	@ tmp124, config_reg_16(D)->CONFIG_SCOUNT_REG2
@ ../source/HL_crc.c:651: 		config_reg->CONFIG_WDTOPLD2     = CRC2_WDTOPLD2_CONFIGVALUE;
	.loc 1 651 0
	str	r3, [r0, #40]	@ tmp124, config_reg_16(D)->CONFIG_WDTOPLD2
@ ../source/HL_crc.c:652: 		config_reg->CONFIG_BCTOPLD2     = CRC2_BCTOPLD2_CONFIGVALUE;
	.loc 1 652 0
	str	r3, [r0, #44]	@ tmp124, config_reg_16(D)->CONFIG_BCTOPLD2
	bx	lr	@
	.cfi_endproc
.LFE12:
	.size	crc2GetConfigValue, .-crc2GetConfigValue
.Letext0:
	.file 2 "/home/mr_halfword/ti/ccs901/ccs/tools/compiler/gcc-arm-none-eabi-7-2017-q4-major/arm-none-eabi/include/machine/_default_types.h"
	.file 3 "/home/mr_halfword/ti/ccs901/ccs/tools/compiler/gcc-arm-none-eabi-7-2017-q4-major/arm-none-eabi/include/sys/_stdint.h"
	.file 4 "/home/mr_halfword/workspace_v9/TMS570LC4357_GCC_halcogen/include/HL_hal_stdtypes.h"
	.file 5 "/home/mr_halfword/workspace_v9/TMS570LC4357_GCC_halcogen/include/HL_sys_common.h"
	.file 6 "/home/mr_halfword/workspace_v9/TMS570LC4357_GCC_halcogen/include/HL_reg_crc.h"
	.file 7 "/home/mr_halfword/workspace_v9/TMS570LC4357_GCC_halcogen/include/HL_crc.h"
	.section	.debug_info,"",%progbits
.Ldebug_info0:
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	.byte	0x9c
	.4byte	0x4bc
	.uleb128 0x10
	.4byte	.LASF93
	.byte	0x1
	.2byte	0x27d
	.4byte	0x4bc
	.byte	0x1
	.byte	0x50
	.uleb128 0x10
	.4byte	.LASF94
	.byte	0x1
	.2byte	0x27d
	.4byte	0xe4
	.byte	0x1
	.byte	0x51
	.byte	0
	.uleb128 0xc
	.byte	0x4
	.4byte	0x47b
	.uleb128 0xf
	.byte	0x1
	.4byte	.LASF96
	.byte	0x1
	.2byte	0x247
	.byte	0x1
	.4byte	.LFB11
	.4byte	.LFE11
	.byte	0x1
	.byte	0x9c
	.4byte	0x4f7
	.uleb128 0x10
	.4byte	.LASF93
	.byte	0x1
	.2byte	0x247
	.4byte	0x4bc
	.byte	0x1
	.byte	0x50
	.uleb128 0x10
	.4byte	.LASF94
	.byte	0x1
	.2byte	0x247
	.4byte	0xe4
	.byte	0x1
	.byte	0x51
	.byte	0
	.uleb128 0x11
	.byte	0x1
	.4byte	.LASF107
	.byte	0x1
	.2byte	0x217
	.byte	0x1
	.4byte	0x97
	.4byte	.LFB10
	.4byte	.LFE10
	.byte	0x1
	.byte	0x9c
	.4byte	0x57c
	.uleb128 0x12
	.ascii	"crc\000"
	.byte	0x1
	.2byte	0x217
	.4byte	0x57c
	.4byte	.LLST9
	.uleb128 0x13
	.4byte	.LASF97
	.byte	0x1
	.2byte	0x217
	.4byte	0xa7
	.4byte	.LLST10
	.uleb128 0x14
	.4byte	.LASF98
	.byte	0x1
	.2byte	0x219
	.4byte	0x97
	.4byte	.LLST11
	.uleb128 0x15
	.4byte	.LASF99
	.byte	0x1
	.2byte	0x21a
	.4byte	0xa7
	.byte	0x1
	.byte	0x5c
	.uleb128 0x15
	.4byte	.LASF100
	.byte	0x1
	.2byte	0x21b
	.4byte	0xa7
	.byte	0x1
	.byte	0x5e
	.uleb128 0x15
	.4byte	.LASF101
	.byte	0x1
	.2byte	0x21c
	.4byte	0xa7
	.byte	0x1
	.byte	0x53
	.uleb128 0x15
	.4byte	.LASF102
	.byte	0x1
	.2byte	0x21d
	.4byte	0xa7
	.byte	0x1
	.byte	0x52
	.byte	0
	.uleb128 0xc
	.byte	0x4
	.4byte	0x321
	.uleb128 0xf
	.byte	0x1
	.4byte	.LASF103
	.byte	0x1
	.2byte	0x1fe
	.byte	0x1
	.4byte	.LFB9
	.4byte	.LFE9
	.byte	0x1
	.byte	0x9c
	.4byte	0x5b7
	.uleb128 0x16
	.ascii	"crc\000"
	.byte	0x1
	.2byte	0x1fe
	.4byte	0x57c
	.byte	0x1
	.byte	0x50
	.uleb128 0x10
	.4byte	.LASF104
	.byte	0x1
	.2byte	0x1fe
	.4byte	0xa7
	.byte	0x1
	.byte	0x51
	.byte	0
	.uleb128 0xf
	.byte	0x1
	.4byte	.LASF105
	.byte	0x1
	.2byte	0x1de
	.byte	0x1
	.4byte	.LFB8
	.4byte	.LFE8
	.byte	0x1
	.byte	0x9c
	.4byte	0x5ec
	.uleb128 0x16
	.ascii	"crc\000"
	.byte	0x1
	.2byte	0x1de
	.4byte	0x57c
	.byte	0x1
	.byte	0x50
	.uleb128 0x10
	.4byte	.LASF104
	.byte	0x1
	.2byte	0x1de
	.4byte	0xa7
	.byte	0x1
	.byte	0x51
	.byte	0
	.uleb128 0xf
	.byte	0x1
	.4byte	.LASF106
	.byte	0x1
	.2byte	0x1b2
	.byte	0x1
	.4byte	.LFB7
	.4byte	.LFE7
	.byte	0x1
	.byte	0x9c
	.4byte	0x621
	.uleb128 0x16
	.ascii	"crc\000"
	.byte	0x1
	.2byte	0x1b2
	.4byte	0x57c
	.byte	0x1
	.byte	0x50
	.uleb128 0x10
	.4byte	.LASF97
	.byte	0x1
	.2byte	0x1b2
	.4byte	0xa7
	.byte	0x1
	.byte	0x51
	.byte	0
	.uleb128 0x11
	.byte	0x1
	.4byte	.LASF108
	.byte	0x1
	.2byte	0x19a
	.byte	0x1
	.4byte	0xa7
	.4byte	.LFB6
	.4byte	.LFE6
	.byte	0x1
	.byte	0x9c
	.4byte	0x65c
	.uleb128 0x12
	.ascii	"crc\000"
	.byte	0x1
	.2byte	0x19a
	.4byte	0x57c
	.4byte	.LLST8
	.uleb128 0x10
	.4byte	.LASF97
	.byte	0x1
	.2byte	0x19a
	.4byte	0xa7
	.byte	0x1
	.byte	0x51
	.byte	0
	.uleb128 0x11
	.byte	0x1
	.4byte	.LASF109
	.byte	0x1
	.2byte	0x178
	.byte	0x1
	.4byte	0xa7
	.4byte	.LFB5
	.4byte	.LFE5
	.byte	0x1
	.byte	0x9c
	.4byte	0x6a7
	.uleb128 0x12
	.ascii	"crc\000"
	.byte	0x1
	.2byte	0x178
	.4byte	0x57c
	.4byte	.LLST6
	.uleb128 0x10
	.4byte	.LASF97
	.byte	0x1
	.2byte	0x178
	.4byte	0xa7
	.byte	0x1
	.byte	0x51
	.uleb128 0x14
	.4byte	.LASF110
	.byte	0x1
	.2byte	0x17b
	.4byte	0xa7
	.4byte	.LLST7
	.byte	0
	.uleb128 0x11
	.byte	0x1
	.4byte	.LASF111
	.byte	0x1
	.2byte	0x14c
	.byte	0x1
	.4byte	0x97
	.4byte	.LFB4
	.4byte	.LFE4
	.byte	0x1
	.byte	0x9c
	.4byte	0x72c
	.uleb128 0x12
	.ascii	"crc\000"
	.byte	0x1
	.2byte	0x14c
	.4byte	0x57c
	.4byte	.LLST3
	.uleb128 0x13
	.4byte	.LASF97
	.byte	0x1
	.2byte	0x14c
	.4byte	0xa7
	.4byte	.LLST4
	.uleb128 0x14
	.4byte	.LASF98
	.byte	0x1
	.2byte	0x14e
	.4byte	0x97
	.4byte	.LLST5
	.uleb128 0x15
	.4byte	.LASF112
	.byte	0x1
	.2byte	0x14f
	.4byte	0xa7
	.byte	0x1
	.byte	0x5c
	.uleb128 0x15
	.4byte	.LASF113
	.byte	0x1
	.2byte	0x150
	.4byte	0xa7
	.byte	0x1
	.byte	0x5e
	.uleb128 0x15
	.4byte	.LASF114
	.byte	0x1
	.2byte	0x151
	.4byte	0xa7
	.byte	0x1
	.byte	0x53
	.uleb128 0x15
	.4byte	.LASF115
	.byte	0x1
	.2byte	0x152
	.4byte	0xa7
	.byte	0x1
	.byte	0x52
	.byte	0
	.uleb128 0xf
	.byte	0x1
	.4byte	.LASF116
	.byte	0x1
	.2byte	0x11b
	.byte	0x1
	.4byte	.LFB3
	.4byte	.LFE3
	.byte	0x1
	.byte	0x9c
	.4byte	0x761
	.uleb128 0x16
	.ascii	"crc\000"
	.byte	0x1
	.2byte	0x11b
	.4byte	0x57c
	.byte	0x1
	.byte	0x50
	.uleb128 0x10
	.4byte	.LASF117
	.byte	0x1
	.2byte	0x11b
	.4byte	0x761
	.byte	0x1
	.byte	0x51
	.byte	0
	.uleb128 0xc
	.byte	0x4
	.4byte	0x3cf
	.uleb128 0x17
	.byte	0x1
	.4byte	.LASF118
	.byte	0x1
	.byte	0xe1
	.byte	0x1
	.4byte	.LFB2
	.4byte	.LFE2
	.byte	0x1
	.byte	0x9c
	.4byte	0x7cf
	.uleb128 0x18
	.ascii	"crc\000"
	.byte	0x1
	.byte	0xe1
	.4byte	0x57c
	.4byte	.LLST0
	.uleb128 0x19
	.4byte	.LASF117
	.byte	0x1
	.byte	0xe1
	.4byte	0x7cf
	.byte	0x1
	.byte	0x51
	.uleb128 0x1a
	.ascii	"i\000"
	.byte	0x1
	.byte	0xe5
	.4byte	0xa7
	.4byte	.LLST1
	.uleb128 0x1b
	.4byte	.LASF126
	.byte	0x1
	.byte	0xe5
	.4byte	0xa7
	.uleb128 0x1c
	.4byte	.LASF119
	.byte	0x1
	.byte	0xe6
	.4byte	0x7d5
	.4byte	.LLST2
	.uleb128 0x1d
	.4byte	.LASF120
	.byte	0x1
	.byte	0xe6
	.4byte	0x7d5
	.byte	0x1
	.byte	0x50
	.byte	0
	.uleb128 0xc
	.byte	0x4
	.4byte	0x36f
	.uleb128 0xc
	.byte	0x4
	.4byte	0xa2
	.uleb128 0x17
	.byte	0x1
	.4byte	.LASF121
	.byte	0x1
	.byte	0xcd
	.byte	0x1
	.4byte	.LFB1
	.4byte	.LFE1
	.byte	0x1
	.byte	0x9c
	.4byte	0x800
	.uleb128 0x1e
	.ascii	"crc\000"
	.byte	0x1
	.byte	0xcd
	.4byte	0x57c
	.byte	0x1
	.byte	0x50
	.byte	0
	.uleb128 0x1f
	.byte	0x1
	.4byte	.LASF127
	.byte	0x1
	.byte	0x41
	.byte	0x1
	.4byte	.LFB0
	.4byte	.LFE0
	.byte	0x1
	.byte	0x9c
	.byte	0
	.section	.debug_abbrev,"",%progbits
.Ldebug_abbrev0:
	.uleb128 0x1
	.uleb128 0x11
	.byte	0x1
	.uleb128 0x25
	.uleb128 0xe
	.uleb128 0x13
	.uleb128 0xb
	.uleb128 0x3
	.uleb128 0xe
	.uleb128 0x1b
	.uleb128 0xe
	.uleb128 0x11
	.uleb128 0x1
	.uleb128 0x12
	.uleb128 0x1
	.uleb128 0x10
	.uleb128 0x6
	.byte	0
	.byte	0
	.uleb128 0x2
	.uleb128 0x24
	.byte	0
	.uleb128 0xb
	.uleb128 0xb
	.uleb128 0x3e
	.uleb128 0xb
	.uleb128 0x3
	.uleb128 0xe
	.byte	0
	.byte	0
	.uleb128 0x3
	.uleb128 0x16
	.byte	0
	.uleb128 0x3
	.uleb128 0xe
	.uleb128 0x3a
	.uleb128 0xb
	.uleb128 0x3b
	.uleb128 0xb
	.uleb128 0x49
	.uleb128 0x13
	.byte	0
	.byte	0
	.uleb128 0x4
	.uleb128 0x24
	.byte	0
	.uleb128 0xb
	.uleb128 0xb
	.uleb128 0x3e
	.uleb128 0xb
	.uleb128 0x3
	.uleb128 0x8
	.byte	0
	.byte	0
	.uleb128 0x5
	.uleb128 0x35
	.byte	0
	.uleb128 0x49
	.uleb128 0x13
	.byte	0
	.byte	0
	.uleb128 0x6
	.uleb128 0x4
	.byte	0x1
	.uleb128 0x3
	.uleb128 0xe
	.uleb128 0xb
	.uleb128 0xb
	.uleb128 0x49
	.uleb128 0x13
	.uleb128 0x3a
	.uleb128 0xb
	.uleb128 0x3b
	.uleb128 0xb
	.uleb128 0x1
	.uleb128 0x13
	.byte	0
	.byte	0
	.uleb128 0x7
	.uleb128 0x28
	.byte	0
	.uleb128 0x3
	.uleb128 0xe
	.uleb128 0x1c
	.uleb128 0xb
	.byte	0
	.byte	0
	.uleb128 0x8
	.uleb128 0x13
	.byte	0x1
	.uleb128 0x3
	.uleb128 0xe
	.uleb128 0xb
	.uleb128 0xb
	.uleb128 0x3a
	.uleb128 0xb
	.uleb128 0x3b
	.uleb128 0xb
	.uleb128 0x1
	.uleb128 0x13
	.byte	0
	.byte	0
	.uleb128 0x9
	.uleb128 0xd
	.byte	0
	.uleb128 0x3
	.uleb128 0xe
	.uleb128 0x3a
	.uleb128 0xb
	.uleb128 0x3b
	.uleb128 0xb
	.uleb128 0x49
	.uleb128 0x13
	.uleb128 0x38
	.uleb128 0xb
	.byte	0
	.byte	0
	.uleb128 0xa
	.uleb128 0x1
	.byte	0x1
	.uleb128 0x49
	.uleb128 0x13
	.uleb128 0x1
	.uleb128 0x13
	.byte	0
	.byte	0
	.uleb128 0xb
	.uleb128 0x21
	.byte	0
	.uleb128 0x49
	.uleb128 0x13
	.uleb128 0x2f
	.uleb128 0xb
	.byte	0
	.byte	0
	.uleb128 0xc
	.uleb128 0xf
	.byte	0
	.uleb128 0xb
	.uleb128 0xb
	.uleb128 0x49
	.uleb128 0x13
	.byte	0
	.byte	0
	.uleb128 0xd
	.uleb128 0xd
	.byte	0
	.uleb128 0x3
	.uleb128 0xe
	.uleb128 0x3a
	.uleb128 0xb
	.uleb128 0x3b
	.uleb128 0x5
	.uleb128 0x49
	.uleb128 0x13
	.uleb128 0x38
	.uleb128 0xb
	.byte	0
	.byte	0
	.uleb128 0xe
	.uleb128 0x16
	.byte	0
	.uleb128 0x3
	.uleb128 0xe
	.uleb128 0x3a
	.uleb128 0xb
	.uleb128 0x3b
	.uleb128 0x5
	.uleb128 0x49
	.uleb128 0x13
	.byte	0
	.byte	0
	.uleb128 0xf
	.uleb128 0x2e
	.byte	0x1
	.uleb128 0x3f
	.uleb128 0xc
	.uleb128 0x3
	.uleb128 0xe
	.uleb128 0x3a
	.uleb128 0xb
	.uleb128 0x3b
	.uleb128 0x5
	.uleb128 0x27
	.uleb128 0xc
	.uleb128 0x11
	.uleb128 0x1
	.uleb128 0x12
	.uleb128 0x1
	.uleb128 0x40
	.uleb128 0xa
	.uleb128 0x1
	.uleb128 0x13
	.byte	0
	.byte	0
	.uleb128 0x10
	.uleb128 0x5
	.byte	0
	.uleb128 0x3
	.uleb128 0xe
	.uleb128 0x3a
	.uleb128 0xb
	.uleb128 0x3b
	.uleb128 0x5
	.uleb128 0x49
	.uleb128 0x13
	.uleb128 0x2
	.uleb128 0xa
	.byte	0
	.byte	0
	.uleb128 0x11
	.uleb128 0x2e
	.byte	0x1
	.uleb128 0x3f
	.uleb128 0xc
	.uleb128 0x3
	.uleb128 0xe
	.uleb128 0x3a
	.uleb128 0xb
	.uleb128 0x3b
	.uleb128 0x5
	.uleb128 0x27
	.uleb128 0xc
	.uleb128 0x49
	.uleb128 0x13
	.uleb128 0x11
	.uleb128 0x1
	.uleb128 0x12
	.uleb128 0x1
	.uleb128 0x40
	.uleb128 0xa
	.uleb128 0x1
	.uleb128 0x13
	.byte	0
	.byte	0
	.uleb128 0x12
	.uleb128 0x5
	.byte	0
	.uleb128 0x3
	.uleb128 0x8
	.uleb128 0x3a
	.uleb128 0xb
	.uleb128 0x3b
	.uleb128 0x5
	.uleb128 0x49
	.uleb128 0x13
	.uleb128 0x2
	.uleb128 0x6
	.byte	0
	.byte	0
	.uleb128 0x13
	.uleb128 0x5
	.byte	0
	.uleb128 0x3
	.uleb128 0xe
	.uleb128 0x3a
	.uleb128 0xb
	.uleb128 0x3b
	.uleb128 0x5
	.uleb128 0x49
	.uleb128 0x13
	.uleb128 0x2
	.uleb128 0x6
	.byte	0
	.byte	0
	.uleb128 0x14
	.uleb128 0x34
	.byte	0
	.uleb128 0x3
	.uleb128 0xe
	.uleb128 0x3a
	.uleb128 0xb
	.uleb128 0x3b
	.uleb128 0x5
	.uleb128 0x49
	.uleb128 0x13
	.uleb128 0x2
	.uleb128 0x6
	.byte	0
	.byte	0
	.uleb128 0x15
	.uleb128 0x34
	.byte	0
	.uleb128 0x3
	.uleb128 0xe
	.uleb128 0x3a
	.uleb128 0xb
	.uleb128 0x3b
	.uleb128 0x5
	.uleb128 0x49
	.uleb128 0x13
	.uleb128 0x2
	.uleb128 0xa
	.byte	0
	.byte	0
	.uleb128 0x16
	.uleb128 0x5
	.byte	0
	.uleb128 0x3
	.uleb128 0x8
	.uleb128 0x3a
	.uleb128 0xb
	.uleb128 0x3b
	.uleb128 0x5
	.uleb128 0x49
	.uleb128 0x13
	.uleb128 0x2
	.uleb128 0xa
	.byte	0
	.byte	0
	.uleb128 0x17
	.uleb128 0x2e
	.byte	0x1
	.uleb128 0x3f
	.uleb128 0xc
	.uleb128 0x3
	.uleb128 0xe
	.uleb128 0x3a
	.uleb128 0xb
	.uleb128 0x3b
	.uleb128 0xb
	.uleb128 0x27
	.uleb128 0xc
	.uleb128 0x11
	.uleb128 0x1
	.uleb128 0x12
	.uleb128 0x1
	.uleb128 0x40
	.uleb128 0xa
	.uleb128 0x1
	.uleb128 0x13
	.byte	0
	.byte	0
	.uleb128 0x18
	.uleb128 0x5
	.byte	0
	.uleb128 0x3
	.uleb128 0x8
	.uleb128 0x3a
	.uleb128 0xb
	.uleb128 0x3b
	.uleb128 0xb
	.uleb128 0x49
	.uleb128 0x13
	.uleb128 0x2
	.uleb128 0x6
	.byte	0
	.byte	0
	.uleb128 0x19
	.uleb128 0x5
	.byte	0
	.uleb128 0x3
	.uleb128 0xe
	.uleb128 0x3a
	.uleb128 0xb
	.uleb128 0x3b
	.uleb128 0xb
	.uleb128 0x49
	.uleb128 0x13
	.uleb128 0x2
	.uleb128 0xa
	.byte	0
	.byte	0
	.uleb128 0x1a
	.uleb128 0x34
	.byte	0
	.uleb128 0x3
	.uleb128 0x8
	.uleb128 0x3a
	.uleb128 0xb
	.uleb128 0x3b
	.uleb128 0xb
	.uleb128 0x49
	.uleb128 0x13
	.uleb128 0x2
	.uleb128 0x6
	.byte	0
	.byte	0
	.uleb128 0x1b
	.uleb128 0x34
	.byte	0
	.uleb128 0x3
	.uleb128 0xe
	.uleb128 0x3a
	.uleb128 0xb
	.uleb128 0x3b
	.uleb128 0xb
	.uleb128 0x49
	.uleb128 0x13
	.byte	0
	.byte	0
	.uleb128 0x1c
	.uleb128 0x34
	.byte	0
	.uleb128 0x3
	.uleb128 0xe
	.uleb128 0x3a
	.uleb128 0xb
	.uleb128 0x3b
	.uleb128 0xb
	.uleb128 0x49
	.uleb128 0x13
	.uleb128 0x2
	.uleb128 0x6
	.byte	0
	.byte	0
	.uleb128 0x1d
	.uleb128 0x34
	.byte	0
	.uleb128 0x3
	.uleb128 0xe
	.uleb128 0x3a
	.uleb128 0xb
	.uleb128 0x3b
	.uleb128 0xb
	.uleb128 0x49
	.uleb128 0x13
	.uleb128 0x2
	.uleb128 0xa
	.byte	0
	.byte	0
	.uleb128 0x1e
	.uleb128 0x5
	.byte	0
	.uleb128 0x3
	.uleb128 0x8
	.uleb128 0x3a
	.uleb128 0xb
	.uleb128 0x3b
	.uleb128 0xb
	.uleb128 0x49
	.uleb128 0x13
	.uleb128 0x2
	.uleb128 0xa
	.byte	0
	.byte	0
	.uleb128 0x1f
	.uleb128 0x2e
	.byte	0
	.uleb128 0x3f
	.uleb128 0xc
	.uleb128 0x3
	.uleb128 0xe
	.uleb128 0x3a
	.uleb128 0xb
	.uleb128 0x3b
	.uleb128 0xb
	.uleb128 0x27
	.uleb128 0xc
	.uleb128 0x11
	.uleb128 0x1
	.uleb128 0x12
	.uleb128 0x1
	.uleb128 0x40
	.uleb128 0xa
	.byte	0
	.byte	0
	.byte	0
	.section	.debug_loc,"",%progbits
.Ldebug_loc0:
.LLST9:
	.4byte	.LVL33-.Ltext0
	.4byte	.LVL39-.Ltext0
	.2byte	0x1
	.byte	0x50
	.4byte	.LVL42-.Ltext0
	.4byte	.LVL43-.Ltext0
	.2byte	0x1
	.byte	0x50
	.4byte	0
	.4byte	0
.LLST10:
	.4byte	.LVL33-.Ltext0
	.4byte	.LVL41-.Ltext0
	.2byte	0x1
	.byte	0x51
	.4byte	.LVL42-.Ltext0
	.4byte	.LFE10-.Ltext0
	.2byte	0x1
	.byte	0x51
	.4byte	0
	.4byte	0
.LLST11:
	.4byte	.LVL44-.Ltext0
	.4byte	.LFE10-.Ltext0
	.2byte	0x6
	.byte	0x54
	.byte	0x93
	.uleb128 0x4
	.byte	0x55
	.byte	0x93
	.uleb128 0x4
	.4byte	0
	.4byte	0
.LLST8:
	.4byte	.LVL28-.Ltext0
	.4byte	.LVL29-.Ltext0
	.2byte	0x1
	.byte	0x50
	.4byte	0
	.4byte	0
.LLST6:
	.4byte	.LVL22-.Ltext0
	.4byte	.LVL23-.Ltext0
	.2byte	0x1
	.byte	0x50
	.4byte	.LVL24-.Ltext0
	.4byte	.LVL25-.Ltext0
	.2byte	0x1
	.byte	0x50
	.4byte	.LVL26-.Ltext0
	.4byte	.LVL27-.Ltext0
	.2byte	0x1
	.byte	0x50
	.4byte	0
	.4byte	0
.LLST7:
	.4byte	.LVL25-.Ltext0
	.4byte	.LVL26-.Ltext0
	.2byte	0x1
	.byte	0x50
	.4byte	.LVL27-.Ltext0
	.4byte	.LFE5-.Ltext0
	.2byte	0x1
	.byte	0x50
	.4byte	0
	.4byte	0
.LLST3:
	.4byte	.LVL10-.Ltext0
	.4byte	.LVL16-.Ltext0
	.2byte	0x1
	.byte	0x50
	.4byte	.LVL19-.Ltext0
	.4byte	.LVL20-.Ltext0
	.2byte	0x1
	.byte	0x50
	.4byte	0
	.4byte	0
.LLST4:
	.4byte	.LVL10-.Ltext0
	.4byte	.LVL18-.Ltext0
	.2byte	0x1
	.byte	0x51
	.4byte	.LVL19-.Ltext0
	.4byte	.LFE4-.Ltext0
	.2byte	0x1
	.byte	0x51
	.4byte	0
	.4byte	0
.LLST5:
	.4byte	.LVL21-.Ltext0
	.4byte	.LFE4-.Ltext0
	.2byte	0x6
	.byte	0x54
	.byte	0x93
	.uleb128 0x4
	.byte	0x55
	.byte	0x93
	.uleb128 0x4
	.4byte	0
	.4byte	0
.LLST0:
	.4byte	.LVL1-.Ltext0
	.4byte	.LVL3-.Ltext0
	.2byte	0x1
	.byte	0x50
	.4byte	0
	.4byte	0
.LLST1:
	.4byte	.LVL5-.Ltext0
	.4byte	.LFE2-.Ltext0
	.2byte	0x1
	.byte	0x53
	.4byte	0
	.4byte	0
.LLST2:
	.4byte	.LVL2-.Ltext0
	.4byte	.LVL6-.Ltext0
	.2byte	0x1
	.byte	0x52
	.4byte	.LVL7-.Ltext0
	.4byte	.LFE2-.Ltext0
	.2byte	0x1
	.byte	0x52
	.4byte	0
	.4byte	0
	.section	.debug_aranges,"",%progbits
	.4byte	0x1c
	.2byte	0x2
	.4byte	.Ldebug_info0
	.byte	0x4
	.byte	0
	.2byte	0
	.2byte	0
	.4byte	.Ltext0
	.4byte	.Letext0-.Ltext0
	.4byte	0
	.4byte	0
	.section	.debug_line,"",%progbits
.Ldebug_line0:
	.section	.debug_str,"MS",%progbits,1
.LASF85:
	.ascii	"CONFIG_SCOUNT_REG1\000"
.LASF89:
	.ascii	"CONFIG_SCOUNT_REG2\000"
.LASF12:
	.ascii	"uint64_t\000"
.LASF94:
	.ascii	"type\000"
.LASF49:
	.ascii	"RAW_DATAREGL1\000"
.LASF96:
	.ascii	"crc1GetConfigValue\000"
.LASF71:
	.ascii	"data_length\000"
.LASF77:
	.ascii	"block_preload\000"
.LASF99:
	.ascii	"CRC_PSA_SIGREGH1\000"
.LASF9:
	.ascii	"long long unsigned int\000"
.LASF87:
	.ascii	"CONFIG_BCTOPLD1\000"
.LASF91:
	.ascii	"CONFIG_BCTOPLD2\000"
.LASF45:
	.ascii	"REGL1\000"
.LASF66:
	.ascii	"crcBase\000"
.LASF46:
	.ascii	"REGH1\000"
.LASF60:
	.ascii	"REGH2\000"
.LASF48:
	.ascii	"PSA_SECSIGREGH1\000"
.LASF62:
	.ascii	"PSA_SECSIGREGH2\000"
.LASF50:
	.ascii	"RAW_DATAREGH1\000"
.LASF64:
	.ascii	"RAW_DATAREGH2\000"
.LASF6:
	.ascii	"long long int\000"
.LASF0:
	.ascii	"signed char\000"
.LASF22:
	.ascii	"rvd1\000"
.LASF24:
	.ascii	"rvd2\000"
.LASF26:
	.ascii	"rvd3\000"
.LASF28:
	.ascii	"rvd4\000"
.LASF30:
	.ascii	"rvd5\000"
.LASF32:
	.ascii	"rvd6\000"
.LASF34:
	.ascii	"rvd7\000"
.LASF36:
	.ascii	"rvd8\000"
.LASF42:
	.ascii	"rvd9\000"
.LASF122:
	.ascii	"GNU C11 7.2.1 20170904 (release) [ARM/embedded-7-br"
	.ascii	"anch revision 255204] -mcpu=cortex-r5 -mfloat-abi=h"
	.ascii	"ard -mfpu=vfpv3-d16 -g -gdwarf-3 -gstrict-dwarf -Og"
	.ascii	"\000"
.LASF86:
	.ascii	"CONFIG_WDTOPLD1\000"
.LASF90:
	.ascii	"CONFIG_WDTOPLD2\000"
.LASF4:
	.ascii	"long int\000"
.LASF70:
	.ascii	"src_data_pat\000"
.LASF95:
	.ascii	"crc2GetConfigValue\000"
.LASF40:
	.ascii	"WDTOPLD1\000"
.LASF54:
	.ascii	"WDTOPLD2\000"
.LASF17:
	.ascii	"double\000"
.LASF14:
	.ascii	"uint32\000"
.LASF38:
	.ascii	"SCOUNT_REG1\000"
.LASF52:
	.ascii	"SCOUNT_REG2\000"
.LASF106:
	.ascii	"crcChannelReset\000"
.LASF123:
	.ascii	"../source/HL_crc.c\000"
.LASF7:
	.ascii	"__uint32_t\000"
.LASF112:
	.ascii	"CRC_PSA_SECSIGREGH1\000"
.LASF114:
	.ascii	"CRC_PSA_SECSIGREGH2\000"
.LASF65:
	.ascii	"crcBASE_t\000"
.LASF10:
	.ascii	"unsigned int\000"
.LASF20:
	.ascii	"config_value_type_t\000"
.LASF101:
	.ascii	"CRC_PSA_SIGREGH2\000"
.LASF5:
	.ascii	"long unsigned int\000"
.LASF84:
	.ascii	"CONFIG_PCOUNT_REG1\000"
.LASF88:
	.ascii	"CONFIG_PCOUNT_REG2\000"
.LASF3:
	.ascii	"short unsigned int\000"
.LASF121:
	.ascii	"crcSendPowerDown\000"
.LASF105:
	.ascii	"crcEnableNotification\000"
.LASF124:
	.ascii	"/home/mr_halfword/workspace_v9/TMS570LC4357_GCC_hal"
	.ascii	"cogen/Debug\000"
.LASF93:
	.ascii	"config_reg\000"
.LASF18:
	.ascii	"InitialValue\000"
.LASF110:
	.ascii	"sector\000"
.LASF79:
	.ascii	"crc_config_reg\000"
.LASF118:
	.ascii	"crcSignGen\000"
.LASF41:
	.ascii	"BCTOPLD1\000"
.LASF55:
	.ascii	"BCTOPLD2\000"
.LASF76:
	.ascii	"wdg_preload\000"
.LASF43:
	.ascii	"PSA_SIGREGL1\000"
.LASF57:
	.ascii	"PSA_SIGREGL2\000"
.LASF19:
	.ascii	"CurrentValue\000"
.LASF107:
	.ascii	"crcGetPSASig\000"
.LASF117:
	.ascii	"param\000"
.LASF29:
	.ascii	"INTR\000"
.LASF27:
	.ascii	"INTS\000"
.LASF75:
	.ascii	"scount\000"
.LASF82:
	.ascii	"CONFIG_CTRL2\000"
.LASF67:
	.ascii	"crcModConfig\000"
.LASF21:
	.ascii	"CTRL0\000"
.LASF23:
	.ascii	"CTRL1\000"
.LASF25:
	.ascii	"CTRL2\000"
.LASF103:
	.ascii	"crcDisableNotification\000"
.LASF8:
	.ascii	"__uint64_t\000"
.LASF16:
	.ascii	"float\000"
.LASF100:
	.ascii	"CRC_PSA_SIGREGL1\000"
.LASF102:
	.ascii	"CRC_PSA_SIGREGL2\000"
.LASF83:
	.ascii	"CONFIG_INTS\000"
.LASF15:
	.ascii	"_Bool\000"
.LASF1:
	.ascii	"unsigned char\000"
.LASF59:
	.ascii	"REGL2\000"
.LASF72:
	.ascii	"crcModConfig_t\000"
.LASF47:
	.ascii	"PSA_SECSIGREGL1\000"
.LASF61:
	.ascii	"PSA_SECSIGREGL2\000"
.LASF13:
	.ascii	"uint64\000"
.LASF2:
	.ascii	"short int\000"
.LASF63:
	.ascii	"RAW_DATAREGL2\000"
.LASF119:
	.ascii	"ptr64\000"
.LASF69:
	.ascii	"crc_channel\000"
.LASF127:
	.ascii	"crcInit\000"
.LASF97:
	.ascii	"channel\000"
.LASF116:
	.ascii	"crcSetConfig\000"
.LASF11:
	.ascii	"uint32_t\000"
.LASF68:
	.ascii	"mode\000"
.LASF108:
	.ascii	"crcGetIntrPend\000"
.LASF109:
	.ascii	"crcGetFailedSector\000"
.LASF126:
	.ascii	"psaSigx\000"
.LASF125:
	.ascii	"config_value_type\000"
.LASF113:
	.ascii	"CRC_PSA_SECSIGREGL1\000"
.LASF115:
	.ascii	"CRC_PSA_SECSIGREGL2\000"
.LASF111:
	.ascii	"crcGetSectorSig\000"
.LASF92:
	.ascii	"crc_config_reg_t\000"
.LASF31:
	.ascii	"STATUS\000"
.LASF56:
	.ascii	"rvd10\000"
.LASF98:
	.ascii	"status\000"
.LASF74:
	.ascii	"pcount\000"
.LASF39:
	.ascii	"CURSEC_REG1\000"
.LASF53:
	.ascii	"CURSEC_REG2\000"
.LASF104:
	.ascii	"flags\000"
.LASF37:
	.ascii	"PCOUNT_REG1\000"
.LASF51:
	.ascii	"PCOUNT_REG2\000"
.LASF35:
	.ascii	"BUSY\000"
.LASF80:
	.ascii	"CONFIG_CTRL0\000"
.LASF81:
	.ascii	"CONFIG_CTRL1\000"
.LASF78:
	.ascii	"crcConfig_t\000"
.LASF73:
	.ascii	"crcConfig\000"
.LASF44:
	.ascii	"PSA_SIGREGH1\000"
.LASF58:
	.ascii	"PSA_SIGREGH2\000"
.LASF33:
	.ascii	"INT_OFFSET_REG\000"
.LASF120:
	.ascii	"psaSigx_ptr64\000"
	.ident	"GCC: (GNU Tools for Arm Embedded Processors 7-2017-q4-major) 7.2.1 20170904 (release) [ARM/embedded-7-branch revision 255204]"
