/* spi.h */
#ifndef INC_SPI_H
#define INC_SPI_H

/*      SPI          */
#define SPI_PORT_USE    1
#define SPITXBUF_MAX       280
#define SPIRXBUF_MAX      4000

//#define SPI_DRV_USE         1


/* SPI Header files */
#include <ti/drv/spi/SPI.h>
#include <ti/drv/spi/src/v0/SPI_v0.h>
#include <ti/drv/spi/soc/SPI_soc.h>
//#include <ti/drv/spi/test/src/SPI_log.h>
#include <ti/drv/spi/test/src/SPI_test.h>   // <SPI_board.h> is renamed as <SPI_test.h> in PDK_OMAPL138_1_0_10

extern SPI_Params      spiParams; /* SPI params structure */
extern bool            spiTestPassed;

extern SPI_Handle      spiHwHandle;  /* SPI handle */
extern SPI_Transaction spiTransaction;     /* SPI transaction structure */
extern uint32_t        spiXferEnable,spiLen,spiLoop;
extern unsigned char   spiTxBuf[], spiRxBuf[];
extern uint32_t        spiTerminateXfer;
extern bool            spiRetVal;


extern SPI_v0_HWAttrs spi_cfg;
extern void Spi1_open(void);
extern void I2c0_open(void);
extern void eSW_init(void);

/* SPI Message Structure */
typedef struct{
	unsigned short	Dev;			/* Device Select			*/
	unsigned int	Addr;			/* Device mem address		*/
	unsigned char	*DataPtr;			
	unsigned int	DataLen;		/* data Length				*/
} SPI_MSG;							/* SPI Message Structure	*/ 

/* FRAM : SPI Device Instruction	*/
#define SPI_WREN_CMD				0x06	/* Set Write Enable Latch	: 0000 0110b */
#define SPI_WRDI_CMD				0x04	/* Write Disable			: 0000 0100b */
#define	SPI_RDSR_CMD				0x05	/* Read Status Reg.			: 0000 0101b */
#define SPI_WRSR_CMD				0x01	/* Write Status Reg.		: 0000 0001b */
#define SPI_READ_CMD				0x03	/* Read Memory Data			: 0000 0011b */
#define	SPI_FSTRD					0x0B	/* Fast Read Memory Data	: 0000 1011b */
#define SPI_WRITE_CMD				0x02	/* write Memory Data		: 0000 0010b */
#define	SPI_SLEEP_CMD				0xB9	/* Enter Sleep Mode			: 1011 1001b */
#define	SPI_RDID_CMD				0x9F	/* Read Device ID			: 1001 1111b */
#define	SPI_SNR_CMD					0xC3	/* Read Serial Number		: 1100 0011b */

#define	SPI_ACC_B2B_RD				0
#define	SPI_ACC_B2B_WR				1
#define	SPI_ACC_B2W_RD				2
#define	SPI_ACC_W2B_WR				3


//	2018.04.09
#if	defined(SET_SPI_FRAM_ADDR_CHANGE)

#define	ORIGIN_FRAM_DEV_FTN_BASE		((unsigned int)SPI_FRAM_BASE_ADDR)
	#if	((CONFIG_DEV == CONFIG_DEV_XF100)&&(CONFIG_OPT == CONFIG_OPT_KEPCO))
#define	ORIGIN_FRAM_WAVE_REC_INFO_BASE	(ORIGIN_FRAM_DEV_FTN_BASE+((unsigned int)sizeof(ORIGIN_DEV_FTN_SET_ALL)))
	#else
#define	ORIGIN_FRAM_WAVE_REC_INFO_BASE	(ORIGIN_FRAM_DEV_FTN_BASE+((unsigned int)sizeof(DEV_FTN_SET_ALL)))
	#endif
#define	ORIGIN_FRAM_SET_ALL_BASE		(ORIGIN_FRAM_WAVE_REC_INFO_BASE+((unsigned int)sizeof(WAVE_REC_INFO_SET_ALL)))
	#if	((CONFIG_DEV == CONFIG_DEV_XF100)&&(CONFIG_OPT == CONFIG_OPT_KEPCO))
#define	ORIGIN_FRAM_PT_CON_SW_BASE		(ORIGIN_FRAM_SET_ALL_BASE+((unsigned int)sizeof(ORIGIN_SET_ALL)))
	#else
#define	ORIGIN_FRAM_PT_CON_SW_BASE		(ORIGIN_FRAM_SET_ALL_BASE+((unsigned int)sizeof(SET_ALL)))
	#endif
#define	ORIGIN_FRAM_MEAS_DISP_BASE		(ORIGIN_FRAM_PT_CON_SW_BASE+((unsigned int)sizeof(PT_SWITCH_CONNECT_SET)))

	#ifdef	INTERLOCK_SET_ADDED
#define	ORIGIN_FRAM_INTERLOCK_SET_BASE	(ORIGIN_FRAM_MEAS_DISP_BASE+((unsigned int)sizeof(MEAS_DISP_SETUP_BLOCK)))
	#endif

	#if	(UFR_TRIP_ADDED==1)
#define	ORIGIN_FRAM_UFR_TRIP_SET_BASE	(ORIGIN_FRAM_INTERLOCK_SET_BASE+((unsigned int)sizeof(INTERLOCK_SET_BLOCK)))
#define	ORIGIN_FRAM_UFR_TRIP_SRC_BASE	(ORIGIN_FRAM_UFR_TRIP_SET_BASE+((unsigned int)sizeof(UFR_TRIP_SET_BLOCK)))
	#endif

#define	FRAM_DEV_FTN_BASE				((unsigned int)SPI_FRAM_BASE_ADDR)
#define	FRAM_WAVE_REC_INFO_BASE			(FRAM_DEV_FTN_BASE+(unsigned int)2048)
#define	FRAM_SET_ALL_BASE				(FRAM_WAVE_REC_INFO_BASE+(unsigned int)2048)
#define	FRAM_PT_CON_SW_BASE				(FRAM_SET_ALL_BASE+(unsigned int)20480)
#define	FRAM_MEAS_DISP_BASE				(FRAM_PT_CON_SW_BASE+(unsigned int)1024)

	#ifdef	INTERLOCK_SET_ADDED
#define	FRAM_INTERLOCK_SET_BASE			(FRAM_MEAS_DISP_BASE+(unsigned int)1024)
	#endif

	#if	(UFR_TRIP_ADDED==1)
#define	FRAM_UFR_TRIP_SET_BASE			(FRAM_INTERLOCK_SET_BASE+(unsigned int)1024)
#define	FRAM_UFR_TRIP_SRC_BASE			(FRAM_UFR_TRIP_SET_BASE+(unsigned int)1024)
	#endif

#define	FRAM_FW_VER_BASE				((unsigned int)0x007F00)

/****************** 2020.01.03 From XF100 *************************/
	// Relative Base of SPI Seting(woCBOPMON) for XF100
	#define	REL_FRAM_DEV_FTN_BASE			((unsigned int)SPI_FRAM_BASE_ADDR)
	#define	REL_FRAM_WAVE_REC_INFO_BASE		(REL_FRAM_DEV_FTN_BASE+((unsigned int)sizeof(DEV_FTN_SET_ALL_woCBOP)))
	#define	REL_FRAM_SET_ALL_BASE			(REL_FRAM_WAVE_REC_INFO_BASE+((unsigned int)sizeof(WAVE_REC_INFO_SET_ALL)))	
	#define	REL_FRAM_PT_CON_SW_BASE			(REL_FRAM_SET_ALL_BASE+((unsigned int)sizeof(SET_ALL_woCBOP)))
	#define	REL_FRAM_MEAS_DISP_BASE			(REL_FRAM_PT_CON_SW_BASE+((unsigned int)sizeof(PT_SWITCH_CONNECT_SET)))
  #ifdef	INTERLOCK_SET_ADDED
	#define	REL_FRAM_INTERLOCK_SET_BASE		(REL_FRAM_MEAS_DISP_BASE+((unsigned int)sizeof(MEAS_DISP_SETUP_BLOCK)))
  #endif
  #if	(UFR_TRIP_ADDED==1)
	#define	REL_FRAM_UFR_TRIP_SET_BASE		(REL_FRAM_INTERLOCK_SET_BASE+((unsigned int)sizeof(INTERLOCK_SET_BLOCK)))
	#define	REL_FRAM_UFR_TRIP_SRC_BASE		(REL_FRAM_UFR_TRIP_SET_BASE+((unsigned int)sizeof(UFR_TRIP_SET_BLOCK)))
  #endif	
/*******************************************************************************/

#else
#define	FRAM_DEV_FTN_BASE			((unsigned int)SPI_FRAM_BASE_ADDR)
#define	FRAM_WAVE_REC_INFO_BASE		(FRAM_DEV_FTN_BASE+((unsigned int)sizeof(DEV_FTN_SET_ALL)))
#define	FRAM_SET_ALL_BASE			(FRAM_WAVE_REC_INFO_BASE+((unsigned int)sizeof(WAVE_REC_INFO_SET_ALL)))
#define	FRAM_PT_CON_SW_BASE			(FRAM_SET_ALL_BASE+((unsigned int)sizeof(SET_ALL)))
#define	FRAM_MEAS_DISP_BASE			(FRAM_PT_CON_SW_BASE+((unsigned int)sizeof(PT_SWITCH_CONNECT_SET)))

	#ifdef	INTERLOCK_SET_ADDED
#define	FRAM_INTERLOCK_SET_BASE		(FRAM_MEAS_DISP_BASE+((unsigned int)sizeof(MEAS_DISP_SETUP_BLOCK)))
	#endif

	#if	(UFR_TRIP_ADDED==1)
#define	FRAM_UFR_TRIP_SET_BASE		(FRAM_INTERLOCK_SET_BASE+((unsigned int)sizeof(INTERLOCK_SET_BLOCK)))
#define	FRAM_UFR_TRIP_SRC_BASE		(FRAM_UFR_TRIP_SET_BASE+((unsigned int)sizeof(UFR_TRIP_SET_BLOCK)))
	#endif
#endif



#if	((CONFIG_DEV == CONFIG_DEV_XF100)&&(CONFIG_OPT == CONFIG_OPT_KEPCO))
#define	OLD_FRAM_DEV_FTN_BASE			((unsigned int)SPI_FRAM_BASE_ADDR)
#define	OLD_FRAM_WAVE_REC_INFO_BASE		(OLD_FRAM_DEV_FTN_BASE+((unsigned int)sizeof(OLD_DEV_FTN_SET_ALL)))
#define	OLD_FRAM_SET_ALL_BASE			(OLD_FRAM_WAVE_REC_INFO_BASE+((unsigned int)sizeof(OLD_WAVE_REC_INFO_SET_ALL)))
#define	OLD_FRAM_PT_CON_SW_BASE			(OLD_FRAM_SET_ALL_BASE+((unsigned int)sizeof(OLD_SET_ALL)))
#define	OLD_FRAM_MEAS_DISP_BASE			(OLD_FRAM_PT_CON_SW_BASE+((unsigned int)sizeof(OLD_PT_SWITCH_CONNECT_SET)))

	#ifdef	INTERLOCK_SET_ADDED
#define	OLD_FRAM_INTERLOCK_SET_BASE		(OLD_FRAM_MEAS_DISP_BASE+((unsigned int)sizeof(OLD_MEAS_DISP_SETUP_BLOCK)))
	#endif

		#if	(UFR_TRIP_ADDED==1)
#define	OLD_FRAM_UFR_TRIP_SET_BASE		(OLD_FRAM_INTERLOCK_SET_BASE+((unsigned int)sizeof(OLD_INTERLOCK_SET_BLOCK)))
#define	OLD_FRAM_UFR_TRIP_SRC_BASE		(OLD_FRAM_UFR_TRIP_SET_BASE+((unsigned int)sizeof(OLD_UFR_TRIP_SET_BLOCK)))
	#endif
#endif



#define	FRAM_DEV_OFS(x)				((unsigned int)x-(unsigned int)&MDevSet+FRAM_DEV_FTN_BASE)
#define	FRAM_WAVE_OFS(x)			((unsigned int)x-(unsigned int)&MWaveSet+FRAM_WAVE_REC_INFO_BASE)
#define	FRAM_SET_OFS(x)				((unsigned int)x-(unsigned int)&MSet+FRAM_SET_ALL_BASE)
#define	FRAM_CON_SW_OFS(x)			((unsigned int)x-(unsigned int)&MPTSwConSet+FRAM_PT_CON_SW_BASE)
#define	FRAM_MEAS_DISP_OFS(x)		((unsigned int)x-(unsigned int)&MMeasDispSet+FRAM_MEAS_DISP_BASE)

#ifdef	INTERLOCK_SET_ADDED
#define	FRAM_INTERLOCK_SET_OFS(x)	((unsigned int)x-(unsigned int)&MInterlockSet+FRAM_INTERLOCK_SET_BASE)
#endif

#if	(UFR_TRIP_ADDED==1)
#define	FRAM_UFR_TRIP_SET_OFS(x)	((unsigned int)x-(unsigned int)&MUFRTripSet+FRAM_UFR_TRIP_SET_BASE)
#define	FRAM_UFR_TRIP_SRC_OFS(x)	((unsigned int)x-(unsigned int)&MUFRTripSrc+FRAM_UFR_TRIP_SRC_BASE)
#endif




#if	((CONFIG_DEV == CONFIG_DEV_XF100)&&(CONFIG_OPT == CONFIG_OPT_KEPCO))
#define	OLD_FRAM_DEV_OFS(x)				((unsigned int)x-(unsigned int)&MDevSet+OLD_FRAM_DEV_FTN_BASE)
#define	OLD_FRAM_WAVE_OFS(x)			((unsigned int)x-(unsigned int)&MWaveSet+OLD_FRAM_WAVE_REC_INFO_BASE)
#define	OLD_FRAM_SET_OFS(x)				((unsigned int)x-(unsigned int)&MSet+FRAM_OLD_SET_ALL_BASE)
#define	OLD_FRAM_CON_SW_OFS(x)			((unsigned int)x-(unsigned int)&MPTSwConSet+OLD_FRAM_PT_CON_SW_BASE)
#define	OLD_FRAM_MEAS_DISP_OFS(x)		((unsigned int)x-(unsigned int)&MMeasDispSet+OLD_FRAM_MEAS_DISP_BASE)

	#ifdef	INTERLOCK_SET_ADDED
#define	OLD_FRAM_INTERLOCK_SET_OFS(x)	((unsigned int)x-(unsigned int)&MInterlockSet+OLD_FRAM_INTERLOCK_SET_BASE)
	#endif

		#if	(UFR_TRIP_ADDED==1)
#define	OLD_FRAM_UFR_TRIP_SET_OFS(x)	((unsigned int)x-(unsigned int)&MUFRTripSet+OLD_FRAM_UFR_TRIP_SET_BASE)
#define	OLD_FRAM_UFR_TRIP_SRC_OFS(x)	((unsigned int)x-(unsigned int)&MUFRTripSrc+OLD_FRAM_UFR_TRIP_SRC_BASE)
	#endif
#endif




void SPIBitrateSetup(Uint32 bitRate);
void SpiCmdWrite(unsigned char cmd);
void SpiDataWrite(SPI_MSG *Msg);
void SpiDataRead(SPI_MSG *Msg);
void SpiPageWrite(SPI_MSG *Msg);
void SpiPageRead(SPI_MSG *Msg);
unsigned short SpiWriteVerify(SPI_MSG *Msg);
void Spi8toMem16Read(SPI_MSG *pMSG);
unsigned short Mem16toSpi8Write(SPI_MSG *pMSG);
unsigned short SpiAccess(unsigned char type,unsigned short *DataPtr,unsigned int SPIAddr,unsigned int ByteLen);

#endif
/* end of spi.h */



