/**
 *  @file   board_pll.h
 *
 *  @brief  PLL configuration definitions
 *
 *  ============================================================================
 */
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#ifndef BOARD_PLL_H
#define BOARD_PLL_H

#ifdef __cplusplus
extern "C"
{
#endif

#define PLLEN_MUX_SWITCH         (4U)
#define PLL_LOCK_TIME_CNT        (2400U)
#define PLL_STABILIZATION_TIME   (2000U)
#define PLL_RESET_TIME_CNT       (200U)

#define CFGCHIP0            *(uint32_t*)(CSL_SYSCFG_0_REGS + 0x17C)
#define CFGCHIP1            *(uint32_t*)(CSL_SYSCFG_0_REGS + 0x180)
#define CFGCHIP2            *(uint32_t*)(CSL_SYSCFG_0_REGS + 0x184)
#define CFGCHIP3            *(uint32_t*)(CSL_SYSCFG_0_REGS + 0x188)
#define CFGCHIP4            *(uint32_t*)(CSL_SYSCFG_0_REGS + 0x18C)

#define hPLL0Cfg     ((CSL_PllcRegs*)CSL_PLLC_CFG_0_REGS)
#define hPLL1Cfg     ((CSL_PllcRegs*)CSL_PLLC_CFG_1_REGS)

#ifdef __cplusplus
}
#endif

#endif  // BOARD_PLL_H from LCDKOMAPL138 example source
