Cortex_M4_IPU1_C0: GEL Output: --->>> TDA3xx Cortex M4 Startup Sequence In Progress... <<<---
Cortex_M4_IPU1_C0: GEL Output: --->>> TDA3xx Cortex M4 Startup Sequence DONE! <<<---
Cortex_M4_IPU1_C1: GEL Output: --->>> TDA3xx Cortex M4 Startup Sequence In Progress... <<<---
Cortex_M4_IPU1_C1: GEL Output: --->>> TDA3xx Cortex M4 Startup Sequence DONE! <<<---
ARP32_EVE_1: GEL Output: --->>> Configuring EVE Memory Map <<<---
ARP32_EVE_1: GEL Output: --->>> EVE Memory Map Done! <<<---
Cortex_M4_IPU1_C0: GEL Output: --->>> TDA3xx Target Connect Sequence Begins ... <<<---
Cortex_M4_IPU1_C0: GEL Output: --->>> A device reset occurred <<<---
Cortex_M4_IPU1_C0: GEL Output:  ==================================================
Cortex_M4_IPU1_C0: GEL Output:  ========= TDA3xx PG3.0 device detected   =========
Cortex_M4_IPU1_C0: GEL Output:  ========= TDA3xx GP Device detected    ===========
Cortex_M4_IPU1_C0: GEL Output:  ========= TDA3xx 15x15 Device detected ===========
Cortex_M4_IPU1_C0: GEL Output:  ==================================================
Cortex_M4_IPU1_C0: GEL Output: Core Reset has occurred.

Cortex_M4_IPU1_C0: GEL Output:  ==================================================
Cortex_M4_IPU1_C0: GEL Output:  ========= TDA3xx PG3.0 device detected   =========
Cortex_M4_IPU1_C0: GEL Output:  ========= TDA3xx GP Device detected    ===========
Cortex_M4_IPU1_C0: GEL Output:  ========= TDA3xx 15x15 Device detected ===========
Cortex_M4_IPU1_C0: GEL Output:  ==================================================
Cortex_M4_IPU1_C0: GEL Output: --->>> All Control module lock registers are UNLOCKED <<<---
Cortex_M4_IPU1_C0: GEL Output: --->>> Changing RTI1 reaction type to avoid RTI1 resetting the device after 3 minutes... <<<---
Cortex_M4_IPU1_C0: GEL Output: --->>> Starting  IPU A-MMU configurations... <<<---
Cortex_M4_IPU1_C0: GEL Output: --->>> IPU A-MMU configuration completed. <<<---
Cortex_M4_IPU1_C0: GEL Output: ------------------------------------------------------------------------------------------
Cortex_M4_IPU1_C0: GEL Output: --->>> DDR and DPLL configuration Based on Package selection pin status(Sysboot[7]) <<<---
Cortex_M4_IPU1_C0: GEL Output: ------------------------------------------------------------------------------------------
Cortex_M4_IPU1_C0: GEL: Error while executing OnTargetConnect(): Target failed to read 0x4A0026C4
	 at (*((unsigned int*) 0x4A0026C4)&0x80) [TDA3xx_startup_common.gel:80]
	 at OnTargetConnect()
CS_DAP_IPU_1_C0: Error: (Error -242 @ 0x0) A router subpath could not be accessed. The board configuration file is probably incorrect. (Emulation package 9.8.0.00235) 
Cortex_M4_IPU1_C0: Error: (Error -1170 @ 0x0) Unable to access the DAP. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 9.8.0.00235) 
Cortex_M4_IPU1_C0: Unable to determine target status after 20 attempts
Cortex_M4_IPU1_C0: Failed to remove the debug state from the target before disconnecting.  There may still be breakpoint op-codes embedded in program memory.  It is recommended that you reset the emulator before you connect and reload your program before you continue debugging