/* This file is AUTO GENERATED, DO NOT EDIT manually */ /* * Copyright (c) 2024, Texas Instruments Incorporated * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * * Neither the name of Texas Instruments Incorporated nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "stdint.h" #include "cmsis_compiler.h" #ifndef boot_config_h #define boot_config_h #if defined(__ti_version__) || defined(__TI_COMPILER_VERSION__) #define PLACE_IN_MEMORY(x) __attribute__((section(x))) __attribute__((retain)) #elif defined(__GNUC__) || defined(__clang__) #define PLACE_IN_MEMORY(x) __attribute__((section(x))) __attribute__((used)) #elif defined(__IAR_SYSTEMS_ICC__) #define STRINGIFY(a) #a #define PLACE_IN_MEMORY(x) _Pragma(STRINGIFY(location = x)) __root #else #error "Non-Main table currently not supported for this compiler" #endif /* * User configuration structure constants */ #define BC_CFG_ID 0x05000000U #define BL_CFG_ID 0x05000000U #define BC_CFG_DEBUG_EN 0xAABBU #define BC_CFG_DEBUG_EN_PW 0xCCDDU #define BC_CFG_DEBUG_DIS 0x5522U #define BC_CFG_SW_DP_EN 0xAABBU #define BC_CFG_SW_DP_DIS 0x5522U #define BC_CFG_BSL_PIN_INVOKE_EN 0xAABBU #define BC_CFG_BSL_PIN_INVOKE_DIS 0x5522U #define BC_CFG_DEBUG_HOLD_DIS 0xAABBU #define BC_CFG_DEBUG_HOLD_EN 0xFFFFU #define BC_CFG_CSC_DIS 0xAABBU #define BC_CFG_CSC_EN 0xFFFFU #define BC_CFG_FLASH_BANK_SWAP_POLICY_DIS 0xAABBU #define BC_CFG_FLASH_BANK_SWAP_POLICY_EN 0xFFFFU #define BC_CFG_FAST_BOOT_EN 0xAABBU #define BC_CFG_FAST_BOOT_DIS 0xFFFFU #define BC_CFG_BOOTLOADER_MODE_EN 0xAABBU #define BC_CFG_BOOTLOADER_MODE_DIS 0xFFFFU #define BC_CFG_MASS_ERASE_EN 0xAABBU #define BC_CFG_MASS_ERASE_EN_PW 0xCCDDU #define BC_CFG_MASS_ERASE_DIS 0x5522U #define BC_CFG_FACTORY_RESET_EN 0xAABBU #define BC_CFG_FACTORY_RESET_EN_PW 0xCCDDU #define BC_CFG_FACTORY_RESET_DIS 0x5522U #define BC_CFG_SECURE_BOOT_CRC_EN 0xAABBU #define BC_CFG_SECURE_BOOT_DIS 0xFFFFU #define BC_CFG_NONMAIN_WRITE_PROTECT_DIS 0xAABBU #define BC_CFG_NONMAIN_WRITE_PROTECT_EN 0xFFFFU #define BC_CFG_PLL_NOPLL 0xFFU #define BC_CFG_PLL_80MHZ 0xAAU #define BC_CFG_PLL_CUSTOM 0xBBU #define BC_CFG_PLL_SOURCE_XTAL_20MHZ 0xAAU #define BC_CFG_PLL_SOURCE_SYSOSC 0xFFU #define BL_CFG_READBACK_EN 0xAABBU #define BL_CFG_READBACK_DIS 0xFFFFU #define BL_CFG_SECURITY_FACTORY_RESET 0xAABBU #define BL_CFG_SECURITY_DISABLE_BSL 0xCCDDU #define BL_CFG_SECURITY_IGNORE 0xFFFFU #define BL_CFG_UART_BAUDRATE_4800 0x0001U #define BL_CFG_UART_BAUDRATE_9600 0x0002U #define BL_CFG_UART_BAUDRATE_19200 0x0003U #define BL_CFG_UART_BAUDRATE_38400 0x0004U #define BL_CFG_UART_BAUDRATE_57600 0x0005U #define BL_CFG_UART_BAUDRATE_115200 0x0006U #define BL_CFG_UART_BAUDRATE_1000000 0x0007U #define BL_CFG_UART_BAUDRATE_2000000 0x0008U #define BL_CFG_UART_BAUDRATE_3000000 0x0009U typedef struct { /** * Write protection enable for first 32 sectors of flash with each bit representing 1 sector of 2KB * 1: Page is not erase/program protected * 0: Page is erase/program protected */ uint32_t WRITE_ERASE_PROTECTION_A; /** * Write Protection enable for 512KB-64KB flash with each bit representing 8 sectors of 2KB * 1: Page is not erase/program protected * 0: Page is erase/program protected * * @note First 4 Bits reserved as equivalence for WRITE_ERASE_PROTECTION_A register */ uint32_t WRITE_ERASE_PROTECTION_B; uint32_t reserved1; uint32_t reserved2; /** * Privilege Protection enable for first 32 sectors of flash with each bit representing 1 sector of 2KB * 1: Page is not privileged * 0: Page is privileged */ uint32_t PRIVILEGE_PROTECTION_A; /** * Privilege Protection enable for 512KB-64KB flash with each bit representing 8 sectors of 2KB * 1: Page is not privileged * 0: Page is privileged * * @note First 4 Bits reserved as equivalence for PRIVILEGE_PROTECTION_A register */ uint32_t PRIVILEGE_PROTECTION_B; uint32_t reserved3; } __PACKED BANK_PROTECTION_t; typedef struct { /*! * Predetermined Bootcode config signature ID */ uint32_t BCR_CONFIG_ID; /*! * Debug Access setting. This controls the enable/disable of * AHB-AP, ET-AP, PWR-AP. * Possible values: * - BC_CFG_DEBUG_L0 * - BC_CFG_DEBUG_L1 * - BC_CFG_DEBUG_DIS * - All other values: Debug access is disabled */ uint16_t DEBUG_ACCESS; /*! * Serial Wire Debug Port mode. Disabling this will disable * all Debug ports including CFG_AP, SEC_AP. When disabled no * DSSM commands are serviced. * Possible values: * - BC_CFG_SW_DP_EN * - BC_CFG_SW_DP_DIS * - All other values: SWDP is disabled */ uint16_t SWDP_MODE; /*! * Enable/disable BSL pin invocation. Possible values: * - BC_CFG_BSL_PIN_INVOKE_EN * - BC_CFG_BSL_PIN_INVOKE_DIS * - All other values: BSL pin invoke enabled */ uint16_t BSL_PIN_INVOKE; /*! * Controls the release of debug access until INITDONE is issued */ uint16_t DEBUG_HOLD; /*! * Enable/disable the CSC policy in SYSCTL */ uint16_t CSC_EXISTS; /*! * Enable/disable the flash bank swap policy in SYSCTL * - BC_CFG_FLASH_BANK_SWAP_POLICY_DIS * - All others values: Flash bank swap policy enabled */ uint16_t FLASH_BANK_SWAP_POLICY; /*! * The fast boot mode. Possible values: * - BC_CFG_FAST_BOOT_EN * - All other values: Fast boot mode disabled **/ uint16_t FAST_BOOT_MODE; struct { /*! * The bootloader mode. Possible values: * - BC_CFG_BOOTLOADER_MODE_EN * - All other values: Bootloader mode disabled **/ uint16_t BOOTLOADER_MODE; /*! * The mass erase mode. Possible values: * - BC_CFG_MASS_ERASE_EN * - BC_CFG_MASS_ERASE_EN_PW * - BC_CFG_MASS_ERASE_EN_DIS * - All other values: Mass erase mode disabled **/ uint16_t MASS_ERASE_MODE; /*! * The factory reset mode. Possible values: * - BC_CFG_FACTORY_RESET_EN * - BC_CFG_FACTORY_RESET_EN_PW * - BC_CFG_FACTORY_RESET_DIS * - All other values: Factory reset mode disabled **/ uint16_t FACTORY_RESET_MODE; } __PACKED SERVICES; struct { /*! * Password used with following DSSM commands, when * Mass erase is enabled with Password in 'massEraseMode' field * DSSM_BC_MASS_ERASE_REQUEST, DSSM_DATA_EXCHANGE **/ uint32_t MASS_ERASE[4]; uint32_t RSVD_MASS_ERASE[4]; /*! * Password used with following DSSM commands, when * Factory reset is enabled with Password in 'factoryResetMode' field * DSSM_BC_FACTORY_RESET_REQUEST, DSSM_DATA_EXCHANGE **/ uint32_t FACTORY_RESET[4]; uint32_t RSVD_FACTORY_RESET[4]; /*! * Used with Command DSSM_BC_PW_AUTH_REQUEST */ uint32_t DEBUG_LOCK[4]; uint32_t RSVD_DEBUG_LOCK[4]; /*! * Reserved Field for Password */ uint32_t RSVD_PSWD[16]; } __PACKED PASSWORDS; /*! * CRC check part of the application. Possible values: * - BC_CFG_SECURE_BOOT_CRC_EN * - BC_CFG_SECURE_BOOT_HASH_EN * - All other values: Secure boot mode disabled */ uint16_t SECURE_BOOT_MODE; uint16_t BC_RESERVED_0; /*! * The Starting address from where CRC has to be calculated for the application */ uint32_t USER_SECURE_APP_START_ADDR; /*! * The Length of the application for which CRC is calculated */ uint32_t USER_SECURE_APP_LENGTH; /*! * CRC-32 of application range defined by above two parameters */ uint32_t USER_SECURE_APP_HASH[8]; struct { /*! * User Config Non Main Flash Static Write Protection * * BC_CFG_NONMAIN_WRITE_PROTECT_DIS - Disable * All other values - Enable */ uint16_t BANK0_NM_USER_CONFIG; uint16_t BC_RESERVED_1; BANK_PROTECTION_t BANK0; BANK_PROTECTION_t BANK1; } __PACKED GSC_CONFIGS; uint32_t BC_RESERVED_2[4]; /*! * The Clock configuration as defined by user. Possible values: * - BC_CFG_PLL_80MHZ * - BC_CFG_PLL_CUSTOM */ uint8_t SYSPLL_CONFIG; /*! * The multiplier and divider values for PLL as defined by user. */ uint8_t SYSPLL_CONFIG_QDIV; uint8_t SYSPLL_CONFIG_RDIV; /*! * The PLL clock source as defined by user. Possible values: * - BC_CFG_PLL_SOURCE_HFXT */ uint8_t SYSPLL_SOURCE; /*! * The CPU delay cycles for PLL settling time as defined by user. */ uint8_t SYSPLL_SETTLING_TIME; /*! * The CPU delay cycles after which XTAL is monitored as defined by user. */ uint8_t XTAL_STARTUP_MONITOR_TIME; uint16_t BC_RESERVED_3[11]; /*! * CRC-32 of BCR config structure */ uint32_t CRC; } __PACKED bcUserCfg_t; typedef struct { /*! * Predetermined Bootloader config signature ID */ uint32_t BSL_CONFIG_ID; /*! * BSL pin invocation. Default BSL invocation Pin details are * as per TRIM open Area default. */ struct { uint8_t UART_RXD_pad_num; uint8_t UART_RXD_PF_mux_sel; uint8_t UART_TXD_pad_num; uint8_t UART_TXD_PF_mux_sel; uint8_t I2C_SDA_pad_num; uint8_t I2C_SDA_PF_mux_sel; uint8_t I2C_SCL_pad_num; uint8_t I2C_SCL_PF_mux_sel; uint8_t MCAN_RX_pad_num; uint8_t MCAN_RX_PF_mux_sel; uint8_t MCAN_TX_pad_num; uint8_t MCAN_TX_PF_mux_sel; } BLINTERFACE_PINS; struct { uint8_t Pin_data_0; uint8_t Pin_data_1; } BSLPIN_INVOKE; /*! * Enable/disable memory readout. Possible values: * - BL_CFG_READBACK_EN * - All other values: Memory readout disabled */ uint16_t READOUT; /*! * Bootloader 32-byte password */ uint32_t PASSWORD[8]; /*! * Pointer to the version information in MAIN flash. Possible values: * - Valid Flash Address * - All other values: Address will not be accessed */ uint32_t *APP_REV_POINTER; /*! * Security alert configuration. Possible values: * - BL_CFG_SECURITY_FACTORY_RESET * - BL_CFG_SECURITY_DISABLE_BSL * - All other values: Ignore issues */ uint16_t SECURITY_ALERT_LEVEL; /*! * UART Baud rate for ROM BSL. Possible values: * - BL_CFG_UART_BAUDRATE_4800 * - BL_CFG_UART_BAUDRATE_9600 * - BL_CFG_UART_BAUDRATE_19200 * - BL_CFG_UART_BAUDRATE_38400 * - BL_CFG_UART_BAUDRATE_57600 * - BL_CFG_UART_BAUDRATE_115200 * - BL_CFG_UART_BAUDRATE_1000000 * - BL_CFG_UART_BAUDRATE_2000000 * - BL_CFG_UART_BAUDRATE_3000000 * - BL_CFG_UART_BAUDRATE_4000000 * - All other values: 115200bps */ uint16_t UART_BAUD_RATE; /*! * I2C slave address used by the ROM BSL I2C */ uint16_t I2C_SLAVE_ADDR; uint8_t RESERVED[14U]; /*! * CRC of this BSL_Config structure */ uint32_t CRC; } __PACKED blUserCfg_t; extern const bcUserCfg_t BCRConfig; extern const blUserCfg_t BSLConfig; #endif /* boot_config_h */