/*
 * Copyright (c) 2023, Texas Instruments Incorporated
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * *  Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *
 * *  Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * *  Neither the name of Texas Instruments Incorporated nor the names of
 *    its contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/*
 *  ============ ti_msp_dl_config.c =============
 *  Configured MSPM0 DriverLib module definitions
 *
 *  DO NOT EDIT - This file is generated for the MSPM0G351X
 *  by the SysConfig tool.
 */

#include "ti_msp_dl_config.h"

/*
 *  ======== SYSCFG_DL_init ========
 *  Perform any initialization needed before using any board APIs
 */
SYSCONFIG_WEAK void SYSCFG_DL_init(void)
{
    SYSCFG_DL_initPower();
    SYSCFG_DL_GPIO_init();
    /* Module-Specific Initializations*/
    SYSCFG_DL_SYSCTL_init();
    SYSCFG_DL_CAPTURE_0_init();
//    SYSCFG_DL_UART_0_init();//CALL THIS FUNCTION WHILE TESTING THE APPLICATION
}



SYSCONFIG_WEAK void SYSCFG_DL_initPower(void)
{
    DL_GPIO_reset(GPIOA);
    DL_GPIO_reset(GPIOB);
    DL_GPIO_reset(GPIOC);
    DL_TimerA_reset(CAPTURE_0_INST);
    DL_UART_Main_reset(UART_0_INST);


    DL_GPIO_enablePower(GPIOA);
    DL_GPIO_enablePower(GPIOB);
    DL_GPIO_enablePower(GPIOC);
    DL_TimerA_enablePower(CAPTURE_0_INST);
    DL_UART_Main_enablePower(UART_0_INST);
    delay_cycles(POWER_STARTUP_DELAY);
}

SYSCONFIG_WEAK void SYSCFG_DL_GPIO_init(void)
{

    DL_GPIO_initPeripheralInputFunction(GPIO_CAPTURE_0_C0_IOMUX,GPIO_CAPTURE_0_C0_IOMUX_FUNC);



    DL_GPIO_initPeripheralOutputFunction(
        GPIO_UART_0_IOMUX_TX, GPIO_UART_0_IOMUX_TX_FUNC);
    DL_GPIO_initPeripheralInputFunction(
        GPIO_UART_0_IOMUX_RX, GPIO_UART_0_IOMUX_RX_FUNC);
}



SYSCONFIG_WEAK void SYSCFG_DL_SYSCTL_init(void)
{

	//Low Power Mode is configured to be SLEEP0
    DL_SYSCTL_setBORThreshold(DL_SYSCTL_BOR_THRESHOLD_LEVEL_0);

    
	DL_SYSCTL_setSYSOSCFreq(DL_SYSCTL_SYSOSC_FREQ_BASE);
	/* Set default configuration */
	DL_SYSCTL_disableHFXT();
	DL_SYSCTL_disableSYSPLL();

}

//9600 UART baud rates equates to bit duration of 104.167us, hence configuring LOAD Value as 3333 with 32MHz Clock
static const DL_TimerA_ClockConfig gCAPTURE_0ClockConfig = {
    .clockSel    = DL_TIMER_CLOCK_BUSCLK,
    .divideRatio = DL_TIMER_CLOCK_DIVIDE_1,
    .prescale    = 0U
};

static const DL_TimerA_TimerConfig gTimer_Config = {
    .timerMode      = DL_TIMER_TIMER_MODE_PERIODIC_UP,
    .period         = 3332,
    .startTimer     = DL_TIMER_STOP,
    .genIntermInt   = DL_TIMER_INTERM_INT_ENABLED,
    .counterVal     = 1666,
};


SYSCONFIG_WEAK void SYSCFG_DL_CAPTURE_0_init(void) {

    DL_TimerA_setClockConfig(CAPTURE_0_INST,
        (DL_TimerA_ClockConfig *) &gCAPTURE_0ClockConfig);
    DL_TimerA_initTimerMode(CAPTURE_0_INST,
        (DL_TimerA_TimerConfig *) &gTimer_Config);
    DL_TimerA_setCounterControl(CAPTURE_0_INST,DL_TIMER_CZC_CCCTL0_ZCOND,DL_TIMER_CAC_CCCTL0_ACOND,DL_TIMER_CLC_CCCTL0_LCOND);
    DL_TimerA_setCaptCompUpdateMethod(CAPTURE_0_INST, DL_TIMER_CC_UPDATE_METHOD_IMMEDIATE, DL_TIMERA_CAPTURE_COMPARE_0_INDEX);

    DL_TimerA_setCaptureCompareValue(CAPTURE_0_INST, 1666, DL_TIMER_CC_0_INDEX);//Configuring CC1 as almost half the bit width, to sample the bit in the middle
    uint32_t temp;
    temp = DL_TimerA_getCaptureCompareCtl(CAPTURE_0_INST, DL_TIMER_CC_0_INDEX);
    DL_TimerA_setCaptureCompareCtl(CAPTURE_0_INST, DL_TIMER_CC_MODE_COMPARE, temp | (uint32_t) DL_TIMER_CC_ZCOND_TRIG_FALL, DL_TIMER_CC_0_INDEX);//Enable Counter on a falling edge, this will detect the start bit

    DL_TimerA_enableInterrupt(CAPTURE_0_INST , DL_TIMERA_INTERRUPT_CC0_UP_EVENT |
		DL_TIMERA_INTERRUPT_ZERO_EVENT);
    DL_Timer_enableLZEventSuppression(CAPTURE_0_INST);//This will suppress zero events until RC is equal to 0
    DL_TimerA_enableClock(CAPTURE_0_INST);

}


/*
 * THE BELOW SECTION IS TO TEST THE TIMER RECEIVING A UART FRAME
 * USE THE UART PERIPHERAL TO OUTPUT A DATA FRAME, FROM PA11
 * CONNECT PA11 TO PB3
 * WRITE THE DESIRED DATA TO UART_TXDATA MMR AND TIMER PERIPHERAL SHOULD BE ABLE TO RECEIVE THE DATA
 *
 */
//static const DL_UART_Main_ClockConfig gUART_0ClockConfig = {
//    .clockSel    = DL_UART_MAIN_CLOCK_BUSCLK,
//    .divideRatio = DL_UART_MAIN_CLOCK_DIVIDE_RATIO_1
//};
//
//static const DL_UART_Main_Config gUART_0Config = {
//    .mode        = DL_UART_MAIN_MODE_NORMAL,
//    .direction   = DL_UART_MAIN_DIRECTION_TX,
//    .flowControl = DL_UART_MAIN_FLOW_CONTROL_NONE,
//    .parity      = DL_UART_MAIN_PARITY_NONE,
//    .wordLength  = DL_UART_MAIN_WORD_LENGTH_8_BITS,
//    .stopBits    = DL_UART_MAIN_STOP_BITS_ONE
//};
//
//SYSCONFIG_WEAK void SYSCFG_DL_UART_0_init(void)
//{
//    DL_UART_Main_setClockConfig(UART_0_INST, (DL_UART_Main_ClockConfig *) &gUART_0ClockConfig);
//
//    DL_UART_Main_init(UART_0_INST, (DL_UART_Main_Config *) &gUART_0Config);
//    /*
//     * Configure baud rate by setting oversampling and baud rate divisors.
//     *  Target baud rate: 9600
//     *  Actual baud rate: 9576.04
//     */
//    DL_UART_Main_setOversampling(UART_0_INST, DL_UART_OVERSAMPLING_RATE_16X);
//    DL_UART_Main_setBaudRateDivisor(UART_0_INST, UART_0_IBRD_32_MHZ_9600_BAUD, UART_0_IBRD_32_MHZ_9600_BAUD);
//
//
//    /* Configure Interrupts */
////    DL_UART_Main_enableInterrupt(UART_0_INST,
////                                 DL_UART_MAIN_INTERRUPT_RX);
//
//
//    DL_UART_Main_enable(UART_0_INST);
//}
