Category 2: DDR Configuration Impact

This report compares latency results from tests run under identical conditions except for the addition of DDR configuration modifications ("DDR mods"). Six same-column, same-condition pairs are available. One pair (Default FS; OP-TEE PRNG; SDK test, referencing file 260527_1) is excluded as the log file is not yet available.

Summary

Modifying DDR priority does not produce a measurable impact on the basic SDK test. Max and average latency changes across the three SDK test pairs are small and inconsistent in direction, within the range expected from board-to-board hardware variability.

The memory-heavy customer test shows a different picture: DDR priority modifications appear to have a significant positive impact on latency. The two customer test pairs with the clearest results (Pairs 4 and 6) both show large, consistent reductions in maximum latency across both cores simultaneously, alongside noticeable average latency reductions.

TODO (tomorrow): Take another look at the OP-TEE configuration across these tests to determine whether a pattern is emerging between OP-TEE settings and DDR sensitivity. There is not enough data at this point to comment on this relationship.

Hardware variability caveat: Tests were run across two boards. All observed differences may include a board-to-board variability component. Pairs where both tests were run on the same board cannot be confirmed from the available data. This caveat applies to all comparisons in this report.