| Environment Settings | ||||
| Environment Variable | xst | ngdbuild | map | par |
| PATHEXT | .COM; .EXE; .BAT; .CMD; .VBS; .VBE; .JS; .JSE; .WSF; .WSH; .MSC |
.COM; .EXE; .BAT; .CMD; .VBS; .VBE; .JS; .JSE; .WSF; .WSH; .MSC |
< data not available > | < data not available > |
| Path | C:\Xilinx\14.5\ISE_DS\ISE\\lib\nt; C:\Xilinx\14.5\ISE_DS\ISE\\bin\nt; C:\Xilinx\14.5\ISE_DS\ISE\bin\nt; C:\Xilinx\14.5\ISE_DS\ISE\lib\nt; C:\Xilinx\14.5\ISE_DS\ISE\..\..\..\DocNav; C:\Xilinx\14.5\ISE_DS\PlanAhead\bin; C:\Xilinx\14.5\ISE_DS\EDK\bin\nt; C:\Xilinx\14.5\ISE_DS\EDK\lib\nt; C:\Xilinx\14.5\ISE_DS\EDK\gnu\microblaze\nt\bin; C:\Xilinx\14.5\ISE_DS\EDK\gnu\powerpc-eabi\nt\bin; C:\Xilinx\14.5\ISE_DS\EDK\gnuwin\bin; C:\Xilinx\14.5\ISE_DS\EDK\gnu\arm\nt\bin; C:\Xilinx\14.5\ISE_DS\EDK\gnu\microblaze\linux_toolchain\nt_be\bin; C:\Xilinx\14.5\ISE_DS\EDK\gnu\microblaze\linux_toolchain\nt_le\bin; C:\Xilinx\14.5\ISE_DS\common\bin\nt; C:\Xilinx\14.5\ISE_DS\common\lib\nt; C:\klocwork\Klocwork 11.2 Command Line\bin; C:\Program Files (x86)\Intel\Intel(R) Management Engine Components\iCLS\; C:\Program Files\Intel\Intel(R) Management Engine Components\iCLS\; C:\Program Files (x86)\Common Files\Oracle\Java\javapath; C:\Program Files\ImageMagick-7.0.7-Q16; C:\Program Files\ARM\bin\win_32-pentium; C:\ProgramData\Oracle\Java\javapath; C:\WINDOWS\system32; C:\WINDOWS; C:\WINDOWS\System32\Wbem; C:\WINDOWS\System32\WindowsPowerShell\v1.0\; C:\Program Files (x86)\CheckPoint\Endpoint Security\Endpoint Common\bin; C:\Program Files (x86)\Vim\vim80; C:\Program Files\Git\cmd; C:\ProgramData\chocolatey\bin; C:\ctags\ctags58; C:\cscope; C:\Program Files\MATLAB\R2017b\runtime\win64; C:\Program Files\MATLAB\R2017b\bin; C:\Program Files\ARM\RVI\Tools\4.0\90\programs\win_32-pentium; C:\Program Files\ARM\Utilities\FLEXlm\10.8.5.0\1\win_32-pentium; C:\Program Files\ARM\RVD\Core\4.1\54\win_32-pentium\bin; C:\Program Files\ARM\RVCT\Programs\4.1\462\win_32-pentium; C:\Program Files\TortoiseHg\; C:\Program Files\CMake\bin; C:\Strawberry\c\bin; C:\Strawberry\perl\site\bin; C:\Strawberry\perl\bin; C:\Program Files (x86)\Calibre2\; C:\Program Files (x86)\Windows Kits\8.1\Windows Performance Toolkit\; C:\Program Files (x86)\GtkSharp\2.12\bin; C:\Program Files (x86)\Windows Kits\10\Windows Performance Toolkit\; C:\Program Files (x86)\Intel\Intel(R) Management Engine Components\DAL; C:\Program Files\Intel\Intel(R) Management Engine Components\DAL; C:\Program Files (x86)\Intel\Intel(R) Management Engine Components\IPT; C:\Program Files\Intel\Intel(R) Management Engine Components\IPT; C:\Program Files\Intel\WiFi\bin\; C:\Program Files\Common Files\Intel\WirelessCommon\; C:\Program Files (x86)\Sennheiser\SoftphoneSDK\; C:\GnuWin32\bin; C:\GetGnuWin32\bin; C:\Program Files (x86)\NVIDIA Corporation\PhysX\Common; C:\Users\a0230215\AppData\Local\Programs\Python\Python36\Scripts\; C:\Users\a0230215\AppData\Local\Programs\Python\Python36\; C:\Users\a0230215\AppData\Local\Microsoft\WindowsApps; C:\Program Files (x86)\Dr. Memory\bin\ |
C:\Xilinx\14.5\ISE_DS\ISE\\lib\nt; C:\Xilinx\14.5\ISE_DS\ISE\\bin\nt; C:\Xilinx\14.5\ISE_DS\ISE\bin\nt; C:\Xilinx\14.5\ISE_DS\ISE\lib\nt; C:\Xilinx\14.5\ISE_DS\ISE\..\..\..\DocNav; C:\Xilinx\14.5\ISE_DS\PlanAhead\bin; C:\Xilinx\14.5\ISE_DS\EDK\bin\nt; C:\Xilinx\14.5\ISE_DS\EDK\lib\nt; C:\Xilinx\14.5\ISE_DS\EDK\gnu\microblaze\nt\bin; C:\Xilinx\14.5\ISE_DS\EDK\gnu\powerpc-eabi\nt\bin; C:\Xilinx\14.5\ISE_DS\EDK\gnuwin\bin; C:\Xilinx\14.5\ISE_DS\EDK\gnu\arm\nt\bin; C:\Xilinx\14.5\ISE_DS\EDK\gnu\microblaze\linux_toolchain\nt_be\bin; C:\Xilinx\14.5\ISE_DS\EDK\gnu\microblaze\linux_toolchain\nt_le\bin; C:\Xilinx\14.5\ISE_DS\common\bin\nt; C:\Xilinx\14.5\ISE_DS\common\lib\nt; C:\klocwork\Klocwork 11.2 Command Line\bin; C:\Program Files (x86)\Intel\Intel(R) Management Engine Components\iCLS\; C:\Program Files\Intel\Intel(R) Management Engine Components\iCLS\; C:\Program Files (x86)\Common Files\Oracle\Java\javapath; C:\Program Files\ImageMagick-7.0.7-Q16; C:\Program Files\ARM\bin\win_32-pentium; C:\ProgramData\Oracle\Java\javapath; C:\WINDOWS\system32; C:\WINDOWS; C:\WINDOWS\System32\Wbem; C:\WINDOWS\System32\WindowsPowerShell\v1.0\; C:\Program Files (x86)\CheckPoint\Endpoint Security\Endpoint Common\bin; C:\Program Files (x86)\Vim\vim80; C:\Program Files\Git\cmd; C:\ProgramData\chocolatey\bin; C:\ctags\ctags58; C:\cscope; C:\Program Files\MATLAB\R2017b\runtime\win64; C:\Program Files\MATLAB\R2017b\bin; C:\Program Files\ARM\RVI\Tools\4.0\90\programs\win_32-pentium; C:\Program Files\ARM\Utilities\FLEXlm\10.8.5.0\1\win_32-pentium; C:\Program Files\ARM\RVD\Core\4.1\54\win_32-pentium\bin; C:\Program Files\ARM\RVCT\Programs\4.1\462\win_32-pentium; C:\Program Files\TortoiseHg\; C:\Program Files\CMake\bin; C:\Strawberry\c\bin; C:\Strawberry\perl\site\bin; C:\Strawberry\perl\bin; C:\Program Files (x86)\Calibre2\; C:\Program Files (x86)\Windows Kits\8.1\Windows Performance Toolkit\; C:\Program Files (x86)\GtkSharp\2.12\bin; C:\Program Files (x86)\Windows Kits\10\Windows Performance Toolkit\; C:\Program Files (x86)\Intel\Intel(R) Management Engine Components\DAL; C:\Program Files\Intel\Intel(R) Management Engine Components\DAL; C:\Program Files (x86)\Intel\Intel(R) Management Engine Components\IPT; C:\Program Files\Intel\Intel(R) Management Engine Components\IPT; C:\Program Files\Intel\WiFi\bin\; C:\Program Files\Common Files\Intel\WirelessCommon\; C:\Program Files (x86)\Sennheiser\SoftphoneSDK\; C:\GnuWin32\bin; C:\GetGnuWin32\bin; C:\Program Files (x86)\NVIDIA Corporation\PhysX\Common; C:\Users\a0230215\AppData\Local\Programs\Python\Python36\Scripts\; C:\Users\a0230215\AppData\Local\Programs\Python\Python36\; C:\Users\a0230215\AppData\Local\Microsoft\WindowsApps; C:\Program Files (x86)\Dr. Memory\bin\ |
< data not available > | < data not available > |
| XILINX | C:\Xilinx\14.5\ISE_DS\ISE\ | C:\Xilinx\14.5\ISE_DS\ISE\ | < data not available > | < data not available > |
| XILINXD_LICENSE_FILE | 2200@flames-usa3.sc.ti.com | 2200@flames-usa3.sc.ti.com | < data not available > | < data not available > |
| XILINX_DSP | C:\Xilinx\14.5\ISE_DS\ISE | C:\Xilinx\14.5\ISE_DS\ISE | < data not available > | < data not available > |
| XILINX_EDK | C:\Xilinx\14.5\ISE_DS\EDK | C:\Xilinx\14.5\ISE_DS\EDK | < data not available > | < data not available > |
| XILINX_PLANAHEAD | C:\Xilinx\14.5\ISE_DS\PlanAhead | C:\Xilinx\14.5\ISE_DS\PlanAhead | < data not available > | < data not available > |
| Synthesis Property Settings | |||
| Switch Name | Property Name | Value | Default Value |
| -ifn | appcore.prj | ||
| -ifmt | mixed | MIXED | |
| -ofn | appcore | ||
| -ofmt | NGC | NGC | |
| -p | xc5vlx50-2-ff1153 | ||
| -top | appcore | ||
| -opt_mode | Optimization Goal | Speed | SPEED |
| -opt_level | Optimization Effort | 1 | 1 |
| -power | Power Reduction | NO | NO |
| -iuc | Use synthesis Constraints File | NO | NO |
| -keep_hierarchy | Keep Hierarchy | No | NO |
| -netlist_hierarchy | Netlist Hierarchy | As_Optimized | as_optimized |
| -rtlview | Generate RTL Schematic | Yes | NO |
| -glob_opt | Global Optimization Goal | AllClockNets | ALLCLOCKNETS |
| -read_cores | Read Cores | YES | YES |
| -write_timing_constraints | Write Timing Constraints | NO | NO |
| -cross_clock_analysis | Cross Clock Analysis | NO | NO |
| -bus_delimiter | Bus Delimiter | <> | <> |
| -slice_utilization_ratio | Slice Utilization Ratio | 100 | 100% |
| -bram_utilization_ratio | BRAM Utilization Ratio | 100 | 100% |
| -dsp_utilization_ratio | DSP Utilization Ratio | 100 | 100% |
| -reduce_control_sets | Auto | OFF | |
| -verilog2001 | Verilog 2001 | YES | YES |
| -fsm_extract | YES | YES | |
| -fsm_encoding | Auto | AUTO | |
| -safe_implementation | No | NO | |
| -fsm_style | LUT | LUT | |
| -ram_extract | Yes | YES | |
| -ram_style | Auto | AUTO | |
| -rom_extract | Yes | YES | |
| -shreg_extract | YES | YES | |
| -rom_style | Auto | AUTO | |
| -auto_bram_packing | NO | NO | |
| -resource_sharing | YES | YES | |
| -async_to_sync | NO | NO | |
| -use_dsp48 | Auto | AUTO | |
| -iobuf | YES | YES | |
| -max_fanout | 100000 | 100000 | |
| -bufg | 32 | 32 | |
| -register_duplication | YES | YES | |
| -register_balancing | No | NO | |
| -optimize_primitives | NO | NO | |
| -use_clock_enable | Auto | AUTO | |
| -use_sync_set | Auto | AUTO | |
| -use_sync_reset | Auto | AUTO | |
| -iob | Auto | AUTO | |
| -equivalent_register_removal | YES | YES | |
| -slice_utilization_ratio_maxmargin | 5 | 0% | |
| Translation Property Settings | |||
| Switch Name | Property Name | Value | Default Value |
| -intstyle | ise | None | |
| -dd | _ngo | None | |
| -p | xc5vlx50-ff1153-2 | None | |
| -uc | D:/repo/_d4100/AppsFPGA code/Discovery 4100 Apps FPGA GUI_ PGen Code-2.0/Software/pinfile/merge.ucf | None | |
| Operating System Information | ||||
| Operating System Information | xst | ngdbuild | map | par |
| CPU Architecture/Speed | Intel(R) Core(TM) i7-7820HQ CPU @ 2.90GHz/2904 MHz | Intel(R) Core(TM) i7-7820HQ CPU @ 2.90GHz/2904 MHz | < data not available > | < data not available > |
| Host | a0230215lt | a0230215lt | < data not available > | < data not available > |
| OS Name | Microsoft , 64-bit | Microsoft , 64-bit | < data not available > | < data not available > |
| OS Release | major release (build 9200) | major release (build 9200) | < data not available > | < data not available > |