/dts-v1/; / { #address-cells = <0x01>; #size-cells = <0x01>; model = "SolidRun HummingBoard2 Solo/DualLite (1.5som+emmc)"; compatible = "solidrun,hummingboard2/dl\0fsl,imx6dl"; chosen { stdout-path = "/soc/aips-bus@2000000/spba-bus@2000000/serial@2020000"; bootargs = "quiet console=ttymxc0,115200 root=/dev/mmcblk0p2 rw"; }; aliases { ethernet0 = "/soc/aips-bus@2100000/ethernet@2188000"; can0 = "/soc/aips-bus@2000000/flexcan@2090000"; can1 = "/soc/aips-bus@2000000/flexcan@2094000"; gpio0 = "/soc/aips-bus@2000000/gpio@209c000"; gpio1 = "/soc/aips-bus@2000000/gpio@20a0000"; gpio2 = "/soc/aips-bus@2000000/gpio@20a4000"; gpio3 = "/soc/aips-bus@2000000/gpio@20a8000"; gpio4 = "/soc/aips-bus@2000000/gpio@20ac000"; gpio5 = "/soc/aips-bus@2000000/gpio@20b0000"; gpio6 = "/soc/aips-bus@2000000/gpio@20b4000"; i2c0 = "/soc/aips-bus@2100000/i2c@21a0000"; i2c1 = "/soc/aips-bus@2100000/i2c@21a4000"; i2c2 = "/soc/aips-bus@2100000/i2c@21a8000"; ipu0 = "/soc/ipu@2400000"; mmc0 = "/soc/aips-bus@2100000/usdhc@2194000"; mmc1 = "/soc/aips-bus@2100000/usdhc@2190000"; mmc2 = "/soc/aips-bus@2100000/usdhc@2198000"; mmc3 = "/soc/aips-bus@2100000/usdhc@219c000"; serial0 = "/soc/aips-bus@2000000/spba-bus@2000000/serial@2020000"; serial1 = "/soc/aips-bus@2100000/serial@21e8000"; serial2 = "/soc/aips-bus@2100000/serial@21ec000"; serial3 = "/soc/aips-bus@2100000/serial@21f0000"; serial4 = "/soc/aips-bus@2100000/serial@21f4000"; spi0 = "/soc/aips-bus@2000000/spba-bus@2000000/spi@2008000"; spi1 = "/soc/aips-bus@2000000/spba-bus@2000000/spi@200c000"; spi2 = "/soc/aips-bus@2000000/spba-bus@2000000/spi@2010000"; spi3 = "/soc/aips-bus@2000000/spba-bus@2000000/spi@2014000"; usbphy0 = "/soc/aips-bus@2000000/usbphy@20c9000"; usbphy1 = "/soc/aips-bus@2000000/usbphy@20ca000"; i2c3 = "/soc/aips-bus@2100000/i2c@21f8000"; mxcfb0 = "/fb@0"; mxcfb2 = "/fb@1"; }; clocks { ckil { compatible = "fsl,imx-ckil\0fixed-clock"; #clock-cells = <0x00>; clock-frequency = <0x8000>; }; ckih1 { compatible = "fsl,imx-ckih1\0fixed-clock"; #clock-cells = <0x00>; clock-frequency = <0x00>; }; osc { compatible = "fsl,imx-osc\0fixed-clock"; #clock-cells = <0x00>; clock-frequency = <0x16e3600>; }; }; tempmon { compatible = "fsl,imx6q-tempmon"; interrupt-parent = <0x01>; interrupts = <0x00 0x31 0x04>; fsl,tempmon = <0x02>; fsl,tempmon-data = <0x03>; clocks = <0x04 0xac>; #thermal-sensor-cells = <0x00>; }; ldb { #address-cells = <0x01>; #size-cells = <0x00>; compatible = "fsl,imx6dl-ldb\0fsl,imx53-ldb"; gpr = <0x05>; status = "disabled"; clocks = <0x04 0x87 0x04 0x88 0x04 0x27 0x04 0x28 0x04 0x29 0x04 0xb8 0x04 0xb9 0x04 0x10b 0x04 0x10c 0x04 0x10d 0x04 0x10e>; clock-names = "ldb_di0\0ldb_di1\0di0_sel\0di1_sel\0di2_sel\0ldb_di0_div_3_5\0ldb_di1_div_3_5\0ldb_di0_div_7\0ldb_di1_div_7\0ldb_di0_div_sel\0ldb_di1_div_sel"; lvds-channel@0 { #address-cells = <0x01>; #size-cells = <0x00>; reg = <0x00>; status = "disabled"; port@0 { reg = <0x00>; endpoint { remote-endpoint = <0x06>; phandle = <0x59>; }; }; port@1 { reg = <0x01>; endpoint { remote-endpoint = <0x07>; phandle = <0x5d>; }; }; }; lvds-channel@1 { #address-cells = <0x01>; #size-cells = <0x00>; reg = <0x01>; status = "disabled"; port@0 { reg = <0x00>; endpoint { remote-endpoint = <0x08>; phandle = <0x5a>; }; }; port@1 { reg = <0x01>; endpoint { remote-endpoint = <0x09>; phandle = <0x5e>; }; }; }; lvds@0 { fsl,data-mapping = "spwg"; fsl,data-width = <0x12>; crtc = "ipu2-di0"; primary; display-timings { native-mode = <0x0a>; hsd100pxn1 { clock-frequency = <0x3dfd240>; hactive = <0x400>; vactive = <0x300>; hback-porch = <0xdc>; hfront-porch = <0x28>; vback-porch = <0x15>; vfront-porch = <0x07>; hsync-len = <0x3c>; vsync-len = <0x0a>; phandle = <0x0a>; }; }; }; }; pmu { compatible = "arm,cortex-a9-pmu"; interrupt-parent = <0x01>; interrupts = <0x00 0x5e 0x04>; }; usbphynop1 { compatible = "usb-nop-xceiv"; #phy-cells = <0x00>; phandle = <0x30>; }; usbphynop2 { compatible = "usb-nop-xceiv"; #phy-cells = <0x00>; phandle = <0x31>; }; soc { #address-cells = <0x01>; #size-cells = <0x01>; compatible = "simple-bus"; interrupt-parent = <0x01>; ranges; caam-sm@100000 { compatible = "fsl,imx6q-caam-sm"; reg = <0x100000 0x4000>; }; dma-apbh@110000 { compatible = "fsl,imx6q-dma-apbh\0fsl,imx28-dma-apbh"; reg = <0x110000 0x2000>; interrupts = <0x00 0x0d 0x04 0x00 0x0d 0x04 0x00 0x0d 0x04 0x00 0x0d 0x04>; interrupt-names = "gpmi0\0gpmi1\0gpmi2\0gpmi3"; #dma-cells = <0x01>; dma-channels = <0x04>; clocks = <0x04 0x6a>; phandle = <0x0b>; }; gpmi-nand@112000 { compatible = "fsl,imx6q-gpmi-nand"; reg = <0x112000 0x2000 0x114000 0x2000>; reg-names = "gpmi-nand\0bch"; interrupts = <0x00 0x0f 0x04>; interrupt-names = "bch"; clocks = <0x04 0x98 0x04 0x99 0x04 0x97 0x04 0x96 0x04 0x95>; clock-names = "gpmi_io\0gpmi_apb\0gpmi_bch\0gpmi_bch_apb\0per1_bch"; dmas = <0x0b 0x00>; dma-names = "rx-tx"; status = "disabled"; }; hdmi@120000 { #address-cells = <0x01>; #size-cells = <0x00>; reg = <0x120000 0x9000>; interrupts = <0x00 0x73 0x04>; gpr = <0x05>; clocks = <0x04 0x7b 0x04 0x7c>; clock-names = "iahb\0isfr"; status = "okay"; compatible = "fsl,imx6dl-hdmi"; pinctrl-names = "default"; pinctrl-0 = <0x0c>; ddc-i2c-bus = <0x0d>; port@0 { reg = <0x00>; endpoint { remote-endpoint = <0x0e>; phandle = <0x57>; }; }; port@1 { reg = <0x01>; endpoint { remote-endpoint = <0x0f>; phandle = <0x5b>; }; }; }; hdmi_core@120000 { compatible = "fsl,imx6q-hdmi-core"; reg = <0x120000 0x9000>; clocks = <0x04 0x7c 0x04 0x7b 0x04 0x8a>; clock-names = "hdmi_isfr\0hdmi_iahb\0mipi_core"; status = "okay"; ipu_id = <0x00>; disp_id = <0x00>; }; hdmi_video@20e0000 { compatible = "fsl,imx6q-hdmi-video"; reg = <0x20e0000 0x1000>; reg-names = "hdmi_gpr"; interrupts = <0x00 0x73 0x04>; clocks = <0x04 0x7c 0x04 0x7b 0x04 0x8a>; clock-names = "hdmi_isfr\0hdmi_iahb\0mipi_core"; status = "okay"; fsl,phy_reg_vlev = <0x294>; fsl,phy_reg_cksymtx = <0x800d>; }; hdmi_audio@120000 { compatible = "fsl,imx6q-hdmi-audio"; clocks = <0x04 0x7c 0x04 0x7b 0x04 0x8a>; clock-names = "hdmi_isfr\0hdmi_iahb\0mipi_core"; dmas = <0x10 0x02 0x1a 0x00>; dma-names = "tx"; status = "okay"; phandle = <0x75>; }; hdmi_cec@120000 { compatible = "fsl,imx6q-hdmi-cec"; interrupts = <0x00 0x73 0x04>; status = "okay"; pinctrl-names = "default"; pinctrl-0 = <0x0c>; }; gpu@130000 { compatible = "vivante,gc"; reg = <0x130000 0x4000>; interrupts = <0x00 0x09 0x04>; clocks = <0x04 0x1b 0x04 0x7a 0x04 0x4a>; clock-names = "bus\0core\0shader"; power-domains = <0x11>; #cooling-cells = <0x02>; status = "disabled"; memory-region = <0x12>; }; gpu@134000 { compatible = "vivante,gc"; reg = <0x134000 0x4000>; interrupts = <0x00 0x0a 0x04>; clocks = <0x04 0x1a 0x04 0x79>; clock-names = "bus\0core"; power-domains = <0x11>; #cooling-cells = <0x02>; status = "disabled"; memory-region = <0x12>; }; sram@00900000 { compatible = "fsl,lpm-sram"; reg = <0x900000 0x4000>; clocks = <0x04 0x8e>; }; sram@00904000 { compatible = "fsl,ddr-lpm-sram"; reg = <0x904000 0x1000>; clocks = <0x04 0x8e>; }; timer@a00600 { compatible = "arm,cortex-a9-twd-timer"; reg = <0xa00600 0x20>; interrupts = <0x01 0x0d 0xf01>; interrupt-parent = <0x13>; clocks = <0x04 0x0f>; }; interrupt-controller@a01000 { compatible = "arm,cortex-a9-gic"; #interrupt-cells = <0x03>; interrupt-controller; reg = <0xa01000 0x1000 0xa00100 0x100>; interrupt-parent = <0x13>; phandle = <0x13>; }; l2-cache@a02000 { compatible = "arm,pl310-cache"; reg = <0xa02000 0x1000>; interrupts = <0x00 0x5c 0x04>; cache-unified; cache-level = <0x02>; arm,tag-latency = <0x04 0x02 0x03>; arm,data-latency = <0x04 0x02 0x03>; arm,shared-override; phandle = <0x5f>; }; pcie@1ffc000 { compatible = "fsl,imx6q-pcie\0snps,dw-pcie"; reg = <0x1ffc000 0x4000 0x1f00000 0x80000>; reg-names = "dbi\0config"; #address-cells = <0x03>; #size-cells = <0x02>; device_type = "pci"; bus-range = <0x00 0xff>; ranges = <0x81000000 0x00 0x00 0x1f80000 0x00 0x10000 0x82000000 0x00 0x1000000 0x1000000 0x00 0xf00000>; num-lanes = <0x01>; num-viewport = <0x04>; interrupts = <0x00 0x78 0x04>; interrupt-names = "msi"; #interrupt-cells = <0x01>; interrupt-map-mask = <0x00 0x00 0x00 0x07>; interrupt-map = <0x00 0x00 0x00 0x01 0x01 0x00 0x7b 0x04 0x00 0x00 0x00 0x02 0x01 0x00 0x7a 0x04 0x00 0x00 0x00 0x03 0x01 0x00 0x79 0x04 0x00 0x00 0x00 0x04 0x01 0x00 0x78 0x04>; clocks = <0x04 0x90 0x04 0xce 0x04 0xbd>; clock-names = "pcie\0pcie_bus\0pcie_phy"; status = "okay"; pinctrl-names = "default"; pinctrl-0 = <0x14>; reset-gpio = <0x15 0x0b 0x01>; fsl,max-link-speed = <0x01>; }; pcie_ep@1ffc000 { compatible = "fsl,imx6q-pcie-ep"; reg = <0x1ffc000 0x4000 0x1000000 0xf00000>; reg-names = "regs\0addr_space"; num-lanes = <0x01>; clocks = <0x04 0x90 0x04 0xce 0x04 0xbd>; clock-names = "pcie\0pcie_bus\0pcie_phy"; num-ib-windows = <0x04>; num-ob-windows = <0x04>; status = "disabled"; }; aips-bus@2000000 { compatible = "fsl,aips-bus\0simple-bus"; #address-cells = <0x01>; #size-cells = <0x01>; reg = <0x2000000 0x100000>; ranges; spba-bus@2000000 { compatible = "fsl,spba-bus\0simple-bus"; #address-cells = <0x01>; #size-cells = <0x01>; reg = <0x2000000 0x40000>; ranges; spdif@2004000 { compatible = "fsl,imx35-spdif"; reg = <0x2004000 0x4000>; interrupts = <0x00 0x34 0x04>; dmas = <0x10 0x0e 0x12 0x00 0x10 0x0f 0x12 0x00>; dma-names = "rx\0tx"; clocks = <0x04 0xf4 0x04 0x03 0x04 0xc5 0x04 0x6b 0x04 0x00 0x04 0x76 0x04 0x3e 0x04 0x8b 0x04 0x00 0x04 0x9c>; clock-names = "core\0rxtx0\0rxtx1\0rxtx2\0rxtx3\0rxtx4\0rxtx5\0rxtx6\0rxtx7\0spba"; status = "disabled"; }; spi@2008000 { #address-cells = <0x01>; #size-cells = <0x00>; compatible = "fsl,imx6q-ecspi\0fsl,imx51-ecspi"; reg = <0x2008000 0x4000>; interrupts = <0x00 0x1f 0x04>; clocks = <0x04 0x70 0x04 0x70>; clock-names = "ipg\0per"; dmas = <0x10 0x03 0x07 0x01 0x10 0x04 0x07 0x02>; dma-names = "rx\0tx"; status = "disabled"; }; spi@200c000 { #address-cells = <0x01>; #size-cells = <0x00>; compatible = "fsl,imx6q-ecspi\0fsl,imx51-ecspi"; reg = <0x200c000 0x4000>; interrupts = <0x00 0x20 0x04>; clocks = <0x04 0x71 0x04 0x71>; clock-names = "ipg\0per"; dmas = <0x10 0x05 0x07 0x01 0x10 0x06 0x07 0x02>; dma-names = "rx\0tx"; status = "disabled"; fsl,spi-num-chipselects = <0x01>; spi@0 { compatible = "spidev"; reg = <0x00>; spi-max-frequency = <0x1312d00>; }; }; spi@2010000 { #address-cells = <0x01>; #size-cells = <0x00>; compatible = "fsl,imx6q-ecspi\0fsl,imx51-ecspi"; reg = <0x2010000 0x4000>; interrupts = <0x00 0x21 0x04>; clocks = <0x04 0x72 0x04 0x72>; clock-names = "ipg\0per"; dmas = <0x10 0x07 0x07 0x01 0x10 0x08 0x07 0x02>; dma-names = "rx\0tx"; status = "disabled"; }; spi@2014000 { #address-cells = <0x01>; #size-cells = <0x00>; compatible = "fsl,imx6q-ecspi\0fsl,imx51-ecspi"; reg = <0x2014000 0x4000>; interrupts = <0x00 0x22 0x04>; clocks = <0x04 0x73 0x04 0x73>; clock-names = "ipg\0per"; dmas = <0x10 0x09 0x07 0x01 0x10 0x0a 0x07 0x02>; dma-names = "rx\0tx"; status = "disabled"; }; serial@2020000 { compatible = "fsl,imx6q-uart\0fsl,imx21-uart"; reg = <0x2020000 0x4000>; interrupts = <0x00 0x1a 0x04>; clocks = <0x04 0xa0 0x04 0xa1>; clock-names = "ipg\0per"; dmas = <0x10 0x19 0x04 0x00 0x10 0x1a 0x04 0x00>; dma-names = "rx\0tx"; status = "okay"; pinctrl-names = "default"; pinctrl-0 = <0x16>; }; esai@2024000 { #sound-dai-cells = <0x00>; compatible = "fsl,imx35-esai"; reg = <0x2024000 0x4000>; interrupts = <0x00 0x33 0x04>; clocks = <0x04 0xd0 0x04 0xd1 0x04 0x76 0x04 0xd0 0x04 0x9c>; clock-names = "core\0mem\0extal\0fsys\0spba"; dmas = <0x10 0x17 0x15 0x00 0x10 0x18 0x15 0x00>; dma-names = "rx\0tx"; status = "disabled"; }; ssi@2028000 { #sound-dai-cells = <0x00>; compatible = "fsl,imx6q-ssi\0fsl,imx51-ssi"; reg = <0x2028000 0x4000>; interrupts = <0x00 0x2e 0x04>; clocks = <0x04 0xb2 0x04 0x9d>; clock-names = "ipg\0baud"; dmas = <0x10 0x25 0x01 0x00 0x10 0x26 0x01 0x00>; dma-names = "rx\0tx"; fsl,fifo-depth = <0x0f>; status = "okay"; fsl,mode = "i2s-slave"; phandle = <0x73>; }; ssi@202c000 { #sound-dai-cells = <0x00>; compatible = "fsl,imx6q-ssi\0fsl,imx51-ssi"; reg = <0x202c000 0x4000>; interrupts = <0x00 0x2f 0x04>; clocks = <0x04 0xb3 0x04 0x9e>; clock-names = "ipg\0baud"; dmas = <0x10 0x29 0x01 0x00 0x10 0x2a 0x01 0x00>; dma-names = "rx\0tx"; fsl,fifo-depth = <0x0f>; status = "disabled"; }; ssi@2030000 { #sound-dai-cells = <0x00>; compatible = "fsl,imx6q-ssi\0fsl,imx51-ssi"; reg = <0x2030000 0x4000>; interrupts = <0x00 0x30 0x04>; clocks = <0x04 0xb4 0x04 0x9f>; clock-names = "ipg\0baud"; dmas = <0x10 0x2d 0x01 0x00 0x10 0x2e 0x01 0x00>; dma-names = "rx\0tx"; fsl,fifo-depth = <0x0f>; status = "disabled"; }; asrc@2034000 { compatible = "fsl,imx53-asrc"; reg = <0x2034000 0x4000>; interrupts = <0x00 0x32 0x04>; clocks = <0x04 0xd2 0x04 0xd3 0x04 0x00 0x04 0x00 0x04 0x00 0x04 0x00 0x04 0x00 0x04 0x00 0x04 0x00 0x04 0x00 0x04 0x00 0x04 0x00 0x04 0x00 0x04 0x00 0x04 0x00 0x04 0x6b 0x04 0x00 0x04 0x00 0x04 0x9c>; clock-names = "mem\0ipg\0asrck_0\0asrck_1\0asrck_2\0asrck_3\0asrck_4\0asrck_5\0asrck_6\0asrck_7\0asrck_8\0asrck_9\0asrck_a\0asrck_b\0asrck_c\0asrck_d\0asrck_e\0asrck_f\0spba"; dmas = <0x10 0x11 0x17 0x01 0x10 0x12 0x17 0x01 0x10 0x13 0x17 0x01 0x10 0x14 0x17 0x01 0x10 0x15 0x17 0x01 0x10 0x16 0x17 0x01>; dma-names = "rxa\0rxb\0rxc\0txa\0txb\0txc"; fsl,asrc-rate = <0xbb80>; fsl,asrc-width = <0x10>; status = "okay"; }; spba@203c000 { reg = <0x203c000 0x4000>; }; }; vpu@2040000 { compatible = "fsl,imx6dl-vpu\0cnm,coda960"; reg = <0x2040000 0x3c000>; interrupts = <0x00 0x0c 0x04 0x00 0x03 0x04>; interrupt-names = "bit\0jpeg"; clocks = <0x04 0xa8 0x04 0x8c>; clock-names = "per\0ahb"; power-domains = <0x11>; resets = <0x17 0x01>; iram = <0x18>; status = "disabled"; }; vpu_fsl@2040000 { compatible = "fsl,imx6-vpu"; reg = <0x2040000 0x3c000>; reg-names = "vpu_regs"; interrupts = <0x00 0x03 0x04 0x00 0x0c 0x04>; interrupt-names = "vpu_jpu_irq\0vpu_ipi_irq"; clocks = <0x04 0xa8 0x04 0x8c 0x04 0x8e>; clock-names = "vpu_clk\0mmdc_ch0_axi\0ocram"; iramsize = <0x00>; iram = <0x18>; resets = <0x17 0x01>; power-domains = <0x11>; memory-region = <0x12>; }; aipstz@207c000 { reg = <0x207c000 0x4000>; }; pwm@2080000 { #pwm-cells = <0x02>; compatible = "fsl,imx6q-pwm\0fsl,imx27-pwm"; reg = <0x2080000 0x4000>; interrupts = <0x00 0x53 0x04>; clocks = <0x04 0x3e 0x04 0x91>; clock-names = "ipg\0per"; status = "disabled"; pinctrl-names = "default"; pinctrl-0 = <0x19>; }; pwm@2084000 { #pwm-cells = <0x02>; compatible = "fsl,imx6q-pwm\0fsl,imx27-pwm"; reg = <0x2084000 0x4000>; interrupts = <0x00 0x54 0x04>; clocks = <0x04 0x3e 0x04 0x92>; clock-names = "ipg\0per"; status = "disabled"; }; pwm@2088000 { #pwm-cells = <0x02>; compatible = "fsl,imx6q-pwm\0fsl,imx27-pwm"; reg = <0x2088000 0x4000>; interrupts = <0x00 0x55 0x04>; clocks = <0x04 0x3e 0x04 0x93>; clock-names = "ipg\0per"; status = "disabled"; pinctrl-names = "default"; pinctrl-0 = <0x1a>; }; pwm@208c000 { #pwm-cells = <0x02>; compatible = "fsl,imx6q-pwm\0fsl,imx27-pwm"; reg = <0x208c000 0x4000>; interrupts = <0x00 0x56 0x04>; clocks = <0x04 0x3e 0x04 0x94>; clock-names = "ipg\0per"; status = "disabled"; }; flexcan@2090000 { compatible = "fsl,imx6q-flexcan"; reg = <0x2090000 0x4000>; interrupts = <0x00 0x6e 0x04>; clocks = <0x04 0x6c 0x04 0x6d>; clock-names = "ipg\0per"; fsl,stop-mode = <0x05 0x34 0x1c 0x10 0x11>; status = "disabled"; pinctrl-names = "default"; pinctrl-0 = <0x1b>; }; flexcan@2094000 { compatible = "fsl,imx6q-flexcan"; reg = <0x2094000 0x4000>; interrupts = <0x00 0x6f 0x04>; clocks = <0x04 0x6e 0x04 0x6f>; clock-names = "ipg\0per"; fsl,stop-mode = <0x05 0x34 0x1d 0x10 0x12>; status = "disabled"; }; gpt@2098000 { compatible = "fsl,imx6dl-gpt"; reg = <0x2098000 0x4000>; interrupts = <0x00 0x37 0x04>; clocks = <0x04 0x77 0x04 0x78 0x04 0xed>; clock-names = "ipg\0per\0osc_per"; }; gpio@209c000 { compatible = "fsl,imx6q-gpio\0fsl,imx35-gpio"; reg = <0x209c000 0x4000>; interrupts = <0x00 0x42 0x04 0x00 0x43 0x04>; gpio-controller; #gpio-cells = <0x02>; interrupt-controller; #interrupt-cells = <0x02>; gpio-ranges = <0x1c 0x00 0x83 0x02 0x1c 0x02 0x89 0x08 0x1c 0x0a 0xbd 0x02 0x1c 0x0c 0xc2 0x01 0x1c 0x0d 0xc1 0x01 0x1c 0x0e 0xc0 0x01 0x1c 0x0f 0xbf 0x01 0x1c 0x10 0xb9 0x02 0x1c 0x12 0xb8 0x01 0x1c 0x13 0xbb 0x01 0x1c 0x14 0xb7 0x01 0x1c 0x15 0xbc 0x01 0x1c 0x16 0x7b 0x03 0x1c 0x19 0x79 0x01 0x1c 0x1a 0x7f 0x01 0x1c 0x1b 0x7e 0x01 0x1c 0x1c 0x80 0x01 0x1c 0x1d 0x82 0x01 0x1c 0x1e 0x81 0x01 0x1c 0x1f 0x7a 0x01>; phandle = <0x3e>; }; gpio@20a0000 { compatible = "fsl,imx6q-gpio\0fsl,imx35-gpio"; reg = <0x20a0000 0x4000>; interrupts = <0x00 0x44 0x04 0x00 0x45 0x04>; gpio-controller; #gpio-cells = <0x02>; interrupt-controller; #interrupt-cells = <0x02>; gpio-ranges = <0x1c 0x00 0xa1 0x08 0x1c 0x08 0xd0 0x08 0x1c 0x10 0x4a 0x01 0x1c 0x11 0x49 0x01 0x1c 0x12 0x48 0x01 0x1c 0x13 0x47 0x01 0x1c 0x14 0x46 0x01 0x1c 0x15 0x45 0x01 0x1c 0x16 0x44 0x01 0x1c 0x17 0x4f 0x02 0x1c 0x19 0x76 0x02 0x1c 0x1b 0x75 0x01 0x1c 0x1c 0x71 0x04>; phandle = <0x15>; }; gpio@20a4000 { compatible = "fsl,imx6q-gpio\0fsl,imx35-gpio"; reg = <0x20a4000 0x4000>; interrupts = <0x00 0x46 0x04 0x00 0x47 0x04>; gpio-controller; #gpio-cells = <0x02>; interrupt-controller; #interrupt-cells = <0x02>; gpio-ranges = <0x1c 0x00 0x61 0x02 0x1c 0x02 0x69 0x08 0x1c 0x0a 0x63 0x06 0x1c 0x10 0x51 0x10>; phandle = <0x6c>; }; gpio@20a8000 { compatible = "fsl,imx6q-gpio\0fsl,imx35-gpio"; reg = <0x20a8000 0x4000>; interrupts = <0x00 0x48 0x04 0x00 0x49 0x04>; gpio-controller; #gpio-cells = <0x02>; interrupt-controller; #interrupt-cells = <0x02>; gpio-ranges = <0x1c 0x05 0x88 0x01 0x1c 0x06 0x91 0x01 0x1c 0x07 0x96 0x01 0x1c 0x08 0x92 0x01 0x1c 0x09 0x97 0x01 0x1c 0x0a 0x93 0x01 0x1c 0x0b 0x98 0x01 0x1c 0x0c 0x94 0x01 0x1c 0x0d 0x99 0x01 0x1c 0x0e 0x95 0x01 0x1c 0x0f 0x9a 0x01 0x1c 0x10 0x27 0x07 0x1c 0x17 0x38 0x01 0x1c 0x18 0x3d 0x07 0x1c 0x1f 0x2e 0x01>; phandle = <0x33>; }; gpio@20ac000 { compatible = "fsl,imx6q-gpio\0fsl,imx35-gpio"; reg = <0x20ac000 0x4000>; interrupts = <0x00 0x4a 0x04 0x00 0x4b 0x04>; gpio-controller; #gpio-cells = <0x02>; interrupt-controller; #interrupt-cells = <0x02>; gpio-ranges = <0x1c 0x00 0x78 0x01 0x1c 0x02 0x4d 0x01 0x1c 0x04 0x4c 0x01 0x1c 0x05 0x2f 0x09 0x1c 0x0e 0x39 0x04 0x1c 0x12 0x25 0x01 0x1c 0x13 0x24 0x01 0x1c 0x14 0x23 0x01 0x1c 0x15 0x26 0x01 0x1c 0x16 0x1d 0x06 0x1c 0x1c 0x13 0x04>; phandle = <0x67>; }; gpio@20b0000 { compatible = "fsl,imx6q-gpio\0fsl,imx35-gpio"; reg = <0x20b0000 0x4000>; interrupts = <0x00 0x4c 0x04 0x00 0x4d 0x04>; gpio-controller; #gpio-cells = <0x02>; interrupt-controller; #interrupt-cells = <0x02>; gpio-ranges = <0x1c 0x00 0x17 0x06 0x1c 0x06 0x4b 0x01 0x1c 0x07 0x9c 0x01 0x1c 0x08 0x9b 0x01 0x1c 0x09 0xaa 0x01 0x1c 0x0a 0xa9 0x01 0x1c 0x0b 0x9d 0x01 0x1c 0x0e 0x9e 0x03 0x1c 0x11 0xcc 0x01 0x1c 0x12 0xcb 0x01 0x1c 0x13 0xb6 0x01 0x1c 0x14 0xb1 0x04 0x1c 0x18 0xaf 0x01 0x1c 0x19 0xab 0x01 0x1c 0x1a 0xb5 0x01 0x1c 0x1b 0xac 0x03 0x1c 0x1e 0xb0 0x01 0x1c 0x1f 0x4e 0x01>; phandle = <0x37>; }; gpio@20b4000 { compatible = "fsl,imx6q-gpio\0fsl,imx35-gpio"; reg = <0x20b4000 0x4000>; interrupts = <0x00 0x4e 0x04 0x00 0x4f 0x04>; gpio-controller; #gpio-cells = <0x02>; interrupt-controller; #interrupt-cells = <0x02>; gpio-ranges = <0x1c 0x00 0xca 0x01 0x1c 0x01 0xc9 0x01 0x1c 0x02 0xc4 0x01 0x1c 0x03 0xc3 0x01 0x1c 0x04 0xc5 0x04 0x1c 0x08 0xcd 0x01 0x1c 0x09 0xcf 0x01 0x1c 0x0a 0xce 0x01 0x1c 0x0b 0x85 0x03>; phandle = <0x69>; }; kpp@20b8000 { compatible = "fsl,imx6q-kpp\0fsl,imx21-kpp"; reg = <0x20b8000 0x4000>; interrupts = <0x00 0x52 0x04>; clocks = <0x04 0x3e>; status = "disabled"; }; wdog@20bc000 { compatible = "fsl,imx6q-wdt\0fsl,imx21-wdt"; reg = <0x20bc000 0x4000>; interrupts = <0x00 0x50 0x04>; clocks = <0x04 0x3e>; }; wdog@20c0000 { compatible = "fsl,imx6q-wdt\0fsl,imx21-wdt"; reg = <0x20c0000 0x4000>; interrupts = <0x00 0x51 0x04>; clocks = <0x04 0x3e>; status = "disabled"; }; ccm@20c4000 { compatible = "fsl,imx6q-ccm"; reg = <0x20c4000 0x4000>; interrupts = <0x00 0x57 0x04 0x00 0x58 0x04>; #clock-cells = <0x01>; phandle = <0x04>; }; anatop@20c8000 { compatible = "fsl,imx6q-anatop\0syscon\0simple-mfd"; reg = <0x20c8000 0x1000>; interrupts = <0x00 0x31 0x04 0x00 0x36 0x04 0x00 0x7f 0x04>; phandle = <0x02>; regulator-1p1 { compatible = "fsl,anatop-regulator"; regulator-name = "vdd1p1"; regulator-min-microvolt = <0xf4240>; regulator-max-microvolt = <0x124f80>; regulator-always-on; anatop-reg-offset = <0x110>; anatop-vol-bit-shift = <0x08>; anatop-vol-bit-width = <0x05>; anatop-min-bit-val = <0x04>; anatop-min-voltage = <0xc3500>; anatop-max-voltage = <0x14fb18>; anatop-enable-bit = <0x00>; }; regulator-3p0 { compatible = "fsl,anatop-regulator"; regulator-name = "vdd3p0"; regulator-min-microvolt = <0x2ab980>; regulator-max-microvolt = <0x3010b0>; regulator-always-on; anatop-reg-offset = <0x120>; anatop-vol-bit-shift = <0x08>; anatop-vol-bit-width = <0x05>; anatop-min-bit-val = <0x00>; anatop-min-voltage = <0x280de8>; anatop-max-voltage = <0x33e140>; anatop-enable-bit = <0x00>; }; regulator-2p5 { compatible = "fsl,anatop-regulator"; regulator-name = "vdd2p5"; regulator-min-microvolt = <0x225510>; regulator-max-microvolt = <0x29f630>; regulator-always-on; anatop-reg-offset = <0x130>; anatop-vol-bit-shift = <0x08>; anatop-vol-bit-width = <0x05>; anatop-min-bit-val = <0x00>; anatop-min-voltage = <0x200b20>; anatop-max-voltage = <0x2bde78>; anatop-enable-bit = <0x00>; }; regulator-vddcore { compatible = "fsl,anatop-regulator"; regulator-name = "vddarm"; regulator-min-microvolt = <0xb1008>; regulator-max-microvolt = <0x162010>; regulator-always-on; anatop-reg-offset = <0x140>; anatop-vol-bit-shift = <0x00>; anatop-vol-bit-width = <0x05>; anatop-delay-reg-offset = <0x170>; anatop-delay-bit-shift = <0x18>; anatop-delay-bit-width = <0x02>; anatop-min-bit-val = <0x01>; anatop-min-voltage = <0xb1008>; anatop-max-voltage = <0x162010>; regulator-allow-bypass; phandle = <0x60>; }; regulator-vddpu { compatible = "fsl,anatop-regulator"; regulator-name = "vddpu"; regulator-min-microvolt = <0xb1008>; regulator-max-microvolt = <0x162010>; regulator-enable-ramp-delay = <0x96>; anatop-reg-offset = <0x140>; anatop-vol-bit-shift = <0x09>; anatop-vol-bit-width = <0x05>; anatop-delay-reg-offset = <0x170>; anatop-delay-bit-shift = <0x1a>; anatop-delay-bit-width = <0x02>; anatop-min-bit-val = <0x01>; anatop-min-voltage = <0xb1008>; anatop-max-voltage = <0x162010>; regulator-allow-bypass; phandle = <0x1e>; }; regulator-vddsoc { compatible = "fsl,anatop-regulator"; regulator-name = "vddsoc"; regulator-min-microvolt = <0xb1008>; regulator-max-microvolt = <0x162010>; regulator-always-on; anatop-reg-offset = <0x140>; anatop-vol-bit-shift = <0x12>; anatop-vol-bit-width = <0x05>; anatop-delay-reg-offset = <0x170>; anatop-delay-bit-shift = <0x1c>; anatop-delay-bit-width = <0x02>; anatop-min-bit-val = <0x01>; anatop-min-voltage = <0xb1008>; anatop-max-voltage = <0x162010>; regulator-allow-bypass; phandle = <0x61>; }; }; usbphy@20c9000 { compatible = "fsl,imx6q-usbphy\0fsl,imx23-usbphy"; reg = <0x20c9000 0x1000>; interrupts = <0x00 0x2c 0x04>; clocks = <0x04 0xb6>; fsl,anatop = <0x02>; phandle = <0x2b>; }; usbphy@20ca000 { compatible = "fsl,imx6q-usbphy\0fsl,imx23-usbphy"; reg = <0x20ca000 0x1000>; interrupts = <0x00 0x2d 0x04>; clocks = <0x04 0xb7>; fsl,anatop = <0x02>; phandle = <0x2f>; }; caam_secvio { compatible = "fsl,imx6q-caam-secvio"; interrupts = <0x00 0x14 0x04>; jtag-tamper = "disabled"; watchdog-tamper = "enabled"; internal-boot-tamper = "enabled"; external-pin-tamper = "disabled"; }; caam-snvs@20cc000 { compatible = "fsl,imx6q-caam-snvs"; reg = <0x20cc000 0x4000>; }; snvs@20cc000 { compatible = "fsl,sec-v4.0-mon\0syscon\0simple-mfd"; reg = <0x20cc000 0x4000>; phandle = <0x1d>; snvs-rtc-lp { compatible = "fsl,sec-v4.0-mon-rtc-lp"; regmap = <0x1d>; offset = <0x34>; interrupts = <0x00 0x13 0x04 0x00 0x14 0x04>; }; snvs-poweroff { compatible = "syscon-poweroff"; regmap = <0x1d>; offset = <0x38>; value = <0x60>; mask = <0x60>; status = "disabled"; }; snvs-powerkey { compatible = "fsl,sec-v4.0-pwrkey"; regmap = <0x1d>; interrupts = <0x00 0x04 0x04>; linux,keycode = <0x74>; wakeup-source; status = "disabled"; }; snvs-lpgpr { compatible = "fsl,imx6q-snvs-lpgpr"; }; }; epit@20d0000 { reg = <0x20d0000 0x4000>; interrupts = <0x00 0x38 0x04>; }; epit@20d4000 { reg = <0x20d4000 0x4000>; interrupts = <0x00 0x39 0x04>; }; src@20d8000 { compatible = "fsl,imx6q-src\0fsl,imx51-src"; reg = <0x20d8000 0x4000>; interrupts = <0x00 0x5b 0x04 0x00 0x60 0x04>; #reset-cells = <0x01>; phandle = <0x17>; }; gpc@20dc000 { compatible = "fsl,imx6q-gpc"; reg = <0x20dc000 0x4000>; interrupt-controller; #interrupt-cells = <0x03>; interrupts = <0x00 0x59 0x04 0x00 0x5a 0x04>; interrupt-parent = <0x13>; clocks = <0x04 0x3e>; clock-names = "ipg"; fsl,cpu_pupscr_sw2iso = <0x0f>; fsl,cpu_pupscr_sw = <0x0f>; fsl,cpu_pdnscr_iso2sw = <0x01>; fsl,cpu_pdnscr_iso = <0x01>; phandle = <0x01>; pgc { #address-cells = <0x01>; #size-cells = <0x00>; power-domain@0 { reg = <0x00>; #power-domain-cells = <0x00>; }; power-domain@1 { reg = <0x01>; #power-domain-cells = <0x00>; power-supply = <0x1e>; clocks = <0x04 0x7a 0x04 0x4a 0x04 0x79 0x04 0x1a 0x04 0x8f 0x04 0xa8>; phandle = <0x11>; }; }; }; iomuxc-gpr@20e0000 { compatible = "fsl,imx6q-iomuxc-gpr\0syscon\0simple-mfd"; reg = <0x20e0000 0x38>; phandle = <0x05>; mux-controller { compatible = "mmio-mux"; #mux-control-cells = <0x01>; mux-reg-masks = <0x34 0x07 0x34 0x38 0x0c 0x0c 0x0c 0xc0 0x0c 0x300 0x28 0x03 0x28 0x0c>; phandle = <0x1f>; }; ipu1_csi0_mux { compatible = "video-mux"; mux-controls = <0x1f 0x00>; #address-cells = <0x01>; #size-cells = <0x00>; port@0 { reg = <0x00>; endpoint { remote-endpoint = <0x20>; phandle = <0x46>; }; }; port@1 { reg = <0x01>; endpoint { remote-endpoint = <0x21>; phandle = <0x48>; }; }; port@2 { reg = <0x02>; endpoint { remote-endpoint = <0x22>; phandle = <0x4a>; }; }; port@3 { reg = <0x03>; endpoint { remote-endpoint = <0x23>; phandle = <0x4c>; }; }; port@4 { reg = <0x04>; endpoint { }; }; port@5 { reg = <0x05>; endpoint { remote-endpoint = <0x24>; phandle = <0x55>; }; }; }; ipu1_csi1_mux { compatible = "video-mux"; mux-controls = <0x1f 0x01>; #address-cells = <0x01>; #size-cells = <0x00>; port@0 { reg = <0x00>; endpoint { remote-endpoint = <0x25>; phandle = <0x47>; }; }; port@1 { reg = <0x01>; endpoint { remote-endpoint = <0x26>; phandle = <0x49>; }; }; port@2 { reg = <0x02>; endpoint { remote-endpoint = <0x27>; phandle = <0x4b>; }; }; port@3 { reg = <0x03>; endpoint { remote-endpoint = <0x28>; phandle = <0x4d>; }; }; port@4 { reg = <0x04>; endpoint { }; }; port@5 { reg = <0x05>; endpoint { remote-endpoint = <0x29>; phandle = <0x56>; }; }; }; }; iomuxc@20e0000 { compatible = "fsl,imx6dl-iomuxc"; reg = <0x20e0000 0x4000>; pinctrl-names = "default"; pinctrl-0 = <0x2a>; phandle = <0x1c>; microsom { microsom-enet-ar8035 { fsl,pins = <0x1ec 0x5bc 0x810 0x01 0x00 0x1b8b0 0x1e8 0x5b8 0x00 0x01 0x00 0x1b0b0 0x268 0x650 0x00 0x05 0x00 0x130b0 0xa4 0x3b8 0x00 0x05 0x00 0x1b0b0 0x214 0x5e4 0x80c 0x02 0x00 0x4001b0b0 0x2d8 0x6c0 0x00 0x01 0x00 0x13030 0x2c4 0x6ac 0x00 0x01 0x00 0x1b030 0x2c8 0x6b0 0x00 0x01 0x00 0x1b030 0x2cc 0x6b4 0x00 0x01 0x00 0x1b030 0x2d0 0x6b8 0x00 0x01 0x00 0x1b030 0x2d4 0x6bc 0x00 0x01 0x00 0x1b030 0x1f0 0x5c0 0x00 0x01 0x00 0xa0b1 0x2c0 0x6a8 0x814 0x01 0x01 0x1b030 0x2ac 0x694 0x818 0x01 0x01 0x13030 0x2b0 0x698 0x81c 0x01 0x01 0x13030 0x2b4 0x69c 0x820 0x01 0x01 0x1b030 0x2b8 0x6a0 0x824 0x01 0x01 0x1b030 0x2bc 0x6a4 0x828 0x01 0x01 0x13030 0x1e4 0x5b4 0x00 0x05 0x00 0x3000 0x1f8 0x5c8 0x00 0x05 0x00 0x3000 0x1fc 0x5cc 0x00 0x05 0x00 0x3000>; phandle = <0x32>; }; microsom-uart1 { fsl,pins = <0x4c 0x360 0x00 0x03 0x00 0x1b0b1 0x50 0x364 0x8fc 0x03 0x01 0x1b0b1>; phandle = <0x16>; }; microsom-usdhc3 { fsl,pins = <0x310 0x6f8 0x00 0x00 0x00 0x17059 0x30c 0x6f4 0x934 0x00 0x01 0x10059 0x314 0x6fc 0x00 0x00 0x00 0x17059 0x318 0x700 0x00 0x00 0x00 0x17059 0x31c 0x704 0x00 0x00 0x00 0x17059 0x320 0x708 0x00 0x00 0x00 0x17059 0x324 0x70c 0x00 0x00 0x00 0x17059 0x328 0x710 0x00 0x00 0x00 0x17059 0x32c 0x714 0x00 0x00 0x00 0x17059 0x330 0x718 0x00 0x00 0x00 0x17059 0x334 0x71c 0x00 0x00 0x00 0x17059>; }; microsom-ti-bt { fsl,pins = <0x5c 0x370 0x00 0x05 0x00 0x40013070>; phandle = <0x54>; }; microsom-ti-clk { fsl,pins = <0x23c 0x60c 0x00 0x01 0x00 0x1b0b0 0xbc 0x3d0 0x00 0x05 0x00 0x40013070>; phandle = <0x66>; }; microsom-ti-wifi-en { fsl,pins = <0x84 0x398 0x00 0x05 0x00 0x40013070>; phandle = <0x68>; }; microsom-ti-wifi-irq { fsl,pins = <0x6c 0x380 0x00 0x05 0x00 0x40013070>; phandle = <0x38>; }; microsom-uart4 { fsl,pins = <0x54 0x368 0x00 0x03 0x00 0x1b0b1 0x58 0x36c 0x914 0x03 0x01 0x1b0b1 0x64 0x378 0x910 0x03 0x00 0x1b0b1 0x68 0x37c 0x00 0x03 0x00 0x1b0b1>; phandle = <0x52>; }; microsom-usdhc1 { fsl,pins = <0x2e0 0x6c8 0x00 0x00 0x00 0x17059 0x2dc 0x6c4 0x928 0x00 0x01 0x10059 0x2e4 0x6cc 0x00 0x00 0x00 0x17059 0x2e8 0x6d0 0x00 0x00 0x00 0x17059 0x2ec 0x6d4 0x00 0x00 0x00 0x17059 0x2f0 0x6d8 0x00 0x00 0x00 0x17059>; phandle = <0x34>; }; }; hummingboard2 { hoggrp { fsl,pins = <0x18c 0x55c 0x00 0x05 0x00 0x400130b1 0x190 0x560 0x00 0x05 0x00 0x400130b1 0x1c0 0x590 0x00 0x05 0x00 0x400130b1 0x1bc 0x58c 0x00 0x05 0x00 0x400130b1 0x1b8 0x588 0x00 0x05 0x00 0x400130b1 0x1b4 0x584 0x00 0x05 0x00 0x400130b1 0x1b0 0x580 0x00 0x05 0x00 0x400130b1 0x1ac 0x57c 0x00 0x05 0x00 0x400130b1 0x1a8 0x578 0x00 0x05 0x00 0x400130b1 0x1a4 0x574 0x00 0x05 0x00 0x400130b1 0x198 0x568 0x00 0x05 0x00 0x400130b1 0x19c 0x56c 0x00 0x05 0x00 0x400130b1 0x1a0 0x570 0x00 0x05 0x00 0x400130b1 0x194 0x564 0x00 0x05 0x00 0x400130b1 0x188 0x558 0x00 0x05 0x00 0x400130b1 0x184 0x554 0x00 0x05 0x00 0x400130b1 0x1c8 0x598 0x00 0x05 0x00 0x400130b1 0x1c4 0x594 0x00 0x05 0x00 0x400130b1 0x114 0x4e4 0x00 0x05 0x00 0x400130b1 0x118 0x4e8 0x00 0x05 0x00 0x400130b1 0x11c 0x4ec 0x00 0x05 0x00 0x400130b1 0x120 0x4f0 0x00 0x05 0x00 0x400130b1 0x124 0x4f4 0x00 0x05 0x00 0x400130b1 0x128 0x4f8 0x00 0x05 0x00 0x400130b1 0x12c 0x4fc 0x00 0x05 0x00 0x400130b1 0x130 0x500 0x00 0x05 0x00 0x400130b1 0x180 0x550 0x00 0x05 0x00 0x400130b1 0x17c 0x54c 0x00 0x05 0x00 0x400130b1 0x16c 0x53c 0x00 0x05 0x00 0x400130b1 0x170 0x540 0x00 0x05 0x00 0x400130b1 0x110 0x4e0 0x00 0x05 0x00 0x400130b1 0x1f4 0x5c4 0x00 0x05 0x00 0x400130b1 0x218 0x5e8 0x00 0x05 0x00 0x400130b1 0x240 0x610 0x00 0x05 0x00 0x400130b1 0x1d8 0x5a8 0x00 0x05 0x00 0x400130b1 0x140 0x510 0x00 0x05 0x00 0x400130b1 0x13c 0x50c 0x00 0x05 0x00 0x400130b1 0x1dc 0x5ac 0x00 0x05 0x00 0x400130b1 0x108 0x41c 0x00 0x05 0x00 0x400130b1 0x1d4 0x5a4 0x00 0x05 0x00 0x400130b1 0x148 0x518 0x00 0x05 0x00 0x400130b1 0x14c 0x51c 0x00 0x05 0x00 0x400130b1>; phandle = <0x2a>; }; hummingboard2-gpio7_9 { fsl,pins = <0x33c 0x724 0x00 0x05 0x00 0x80000000>; phandle = <0x6a>; }; hummingboard2-hdmi { fsl,pins = <0x260 0x648 0x85c 0x06 0x01 0x1f8b0>; phandle = <0x0c>; }; hummingboard2-i2c1 { fsl,pins = <0x158 0x528 0x868 0x06 0x01 0x4001b8b1 0x174 0x544 0x86c 0x01 0x01 0x4001b8b1>; phandle = <0x41>; }; hummingboard2-i2c2 { fsl,pins = <0x250 0x638 0x870 0x04 0x01 0x4001b8b1 0x264 0x64c 0x874 0x04 0x01 0x4001b8b1>; phandle = <0x45>; }; hummingboard2_mipi { fsl,pins = <0x348 0x730 0x00 0x05 0x00 0x4001b8b1 0x254 0x63c 0x00 0x05 0x00 0x4001b8b1 0x27c 0x664 0x00 0x04 0x00 0x130b0>; phandle = <0x44>; }; hummingboard2-pcie-reset { fsl,pins = <0x34c 0x734 0x00 0x05 0x00 0x1b0b1>; phandle = <0x14>; }; pwm1grp { fsl,pins = <0x108 0x41c 0x00 0x02 0x00 0x1b0b1>; phandle = <0x19>; }; pwm3grp { fsl,pins = <0x344 0x72c 0x00 0x02 0x00 0x1b0b1>; phandle = <0x1a>; }; hummingboard2-sgtl5000 { fsl,pins = <0xdc 0x3f0 0x7b0 0x03 0x00 0x130b0 0x244 0x62c 0x7c0 0x02 0x01 0x130b0 0x258 0x640 0x7b4 0x02 0x01 0x110b0 0x248 0x630 0x7c4 0x02 0x01 0x130b0 0x230 0x600 0x00 0x03 0x00 0x130b0>; phandle = <0x42>; }; hummingboard2-usbh1-vbus { fsl,pins = <0x20c 0x5dc 0x00 0x05 0x00 0x1b0b0>; phandle = <0x6f>; }; hummingboard2-usbh2-vbus { fsl,pins = <0x354 0x73c 0x00 0x05 0x00 0x1b0b0>; phandle = <0x70>; }; hummingboard2-usbh3-vbus { fsl,pins = <0x338 0x720 0x00 0x05 0x00 0x1b0b0>; phandle = <0x71>; }; hummingboard2-usbotg-id { fsl,pins = <0x210 0x5e0 0x790 0x03 0x01 0x13059>; phandle = <0x2d>; }; hummingboard2-usbotg-vbus { fsl,pins = <0x15c 0x52c 0x00 0x05 0x00 0x1b0b0>; phandle = <0x6d>; }; hummingboard2-usdhc2-aux { fsl,pins = <0x22c 0x5fc 0x00 0x05 0x00 0x1f071 0x25c 0x644 0x00 0x06 0x00 0x1b071>; phandle = <0x39>; }; hummingboard2-usdhc2 { fsl,pins = <0x2f8 0x6e0 0x00 0x00 0x00 0x17059 0x2f4 0x6dc 0x930 0x00 0x01 0x10059 0x2fc 0x6e4 0x00 0x00 0x00 0x17059 0x300 0x6e8 0x00 0x00 0x00 0x17059 0x304 0x6ec 0x00 0x00 0x00 0x17059 0x308 0x6f0 0x00 0x00 0x00 0x13059>; phandle = <0x3a>; }; hummingboard2-usdhc2-100mhz { fsl,pins = <0x2f8 0x6e0 0x00 0x00 0x00 0x170b9 0x2f4 0x6dc 0x930 0x00 0x01 0x100b9 0x2fc 0x6e4 0x00 0x00 0x00 0x170b9 0x300 0x6e8 0x00 0x00 0x00 0x170b9 0x304 0x6ec 0x00 0x00 0x00 0x170b9 0x308 0x6f0 0x00 0x00 0x00 0x130b9>; phandle = <0x3b>; }; hummingboard2-usdhc2-200mhz { fsl,pins = <0x2f8 0x6e0 0x00 0x00 0x00 0x170f9 0x2f4 0x6dc 0x930 0x00 0x01 0x100f9 0x2fc 0x6e4 0x00 0x00 0x00 0x170f9 0x300 0x6e8 0x00 0x00 0x00 0x170f9 0x304 0x6ec 0x00 0x00 0x00 0x170f9 0x308 0x6f0 0x00 0x00 0x00 0x130f9>; phandle = <0x3c>; }; hummingboard2-vmmc { fsl,pins = <0x10c 0x420 0x00 0x05 0x00 0x1b0b0>; phandle = <0x6b>; }; hummingboard2-uart2 { fsl,pins = <0x35c 0x744 0x00 0x02 0x00 0x1b0b1 0x350 0x738 0x904 0x02 0x06 0x1b0b1>; phandle = <0x50>; }; hummingboard2-uart3 { fsl,pins = <0x164 0x534 0x00 0x02 0x00 0x1b0b1 0x168 0x538 0x90c 0x02 0x01 0x1b0b1>; phandle = <0x51>; }; hummingboard2-usdhc3 { fsl,pins = <0x310 0x6f8 0x00 0x00 0x00 0x17059 0x30c 0x6f4 0x934 0x00 0x01 0x10059 0x314 0x6fc 0x00 0x00 0x00 0x17059 0x318 0x700 0x00 0x00 0x00 0x17059 0x31c 0x704 0x00 0x00 0x00 0x17059 0x320 0x708 0x00 0x00 0x00 0x17059 0x324 0x70c 0x00 0x00 0x00 0x17059 0x328 0x710 0x00 0x00 0x00 0x17059 0x32c 0x714 0x00 0x00 0x00 0x17059 0x330 0x718 0x00 0x00 0x00 0x17059 0x334 0x71c 0x00 0x00 0x00 0x17059>; phandle = <0x3f>; }; hummingboard-flexcan1 { fsl,pins = <0x260 0x648 0x7c8 0x02 0x01 0x1b0b1 0x24c 0x634 0x00 0x02 0x00 0x1b0b1>; phandle = <0x1b>; }; }; }; dcic@20e4000 { compatible = "fsl,imx6q-dcic"; reg = <0x20e4000 0x4000>; interrupts = <0x00 0x7c 0x04>; clocks = <0x04 0x108 0x04 0x108>; clock-names = "dcic\0disp-axi"; gpr = <0x05>; status = "okay"; dcic_id = <0x00>; dcic_mux = "dcic-hdmi"; }; dcic@20e8000 { compatible = "fsl,imx6q-dcic"; reg = <0x20e8000 0x4000>; interrupts = <0x00 0x7d 0x04>; clocks = <0x04 0x108 0x04 0x109>; clock-names = "dcic\0disp-axi"; gpr = <0x05>; status = "okay"; dcic_id = <0x01>; dcic_mux = "dcic-lvds1"; }; sdma@20ec000 { compatible = "fsl,imx6q-sdma\0fsl,imx35-sdma"; reg = <0x20ec000 0x4000>; interrupts = <0x00 0x02 0x04>; clocks = <0x04 0x3e 0x04 0x9b>; clock-names = "ipg\0ahb"; #dma-cells = <0x03>; fsl,sdma-ram-script-name = "imx/sdma/sdma-imx6q.bin"; phandle = <0x10>; }; pxp@20f0000 { compatible = "fsl,imx6dl-pxp-dma"; reg = <0x20f0000 0x4000>; interrupts = <0x00 0x62 0x04>; clocks = <0x04 0x85 0x04 0x00>; clock-names = "pxp-axi\0disp-axi"; status = "disabled"; }; epdc@20f4000 { compatible = "fsl,imx6dl-epdc"; reg = <0x20f4000 0x4000>; interrupts = <0x00 0x61 0x04>; clocks = <0x04 0x85 0x04 0x89>; clock-names = "epdc_axi\0epdc_pix"; }; }; aips-bus@2100000 { compatible = "fsl,aips-bus\0simple-bus"; #address-cells = <0x01>; #size-cells = <0x01>; reg = <0x2100000 0x100000>; ranges; caam@2100000 { compatible = "fsl,sec-v4.0"; #address-cells = <0x01>; #size-cells = <0x01>; reg = <0x2100000 0x10000>; ranges = <0x00 0x2100000 0x10000>; clocks = <0x04 0xf1 0x04 0xf2 0x04 0xf3 0x04 0xc4>; clock-names = "mem\0aclk\0ipg\0emi_slow"; jr0@1000 { compatible = "fsl,sec-v4.0-job-ring"; reg = <0x1000 0x1000>; interrupts = <0x00 0x69 0x04>; }; jr1@2000 { compatible = "fsl,sec-v4.0-job-ring"; reg = <0x2000 0x1000>; interrupts = <0x00 0x6a 0x04>; }; }; aipstz@217c000 { reg = <0x217c000 0x4000>; }; usb@2184000 { compatible = "fsl,imx6q-usb\0fsl,imx27-usb"; reg = <0x2184000 0x200>; interrupts = <0x00 0x2b 0x04>; clocks = <0x04 0xa2>; fsl,usbphy = <0x2b>; fsl,usbmisc = <0x2c 0x00>; ahb-burst-config = <0x00>; tx-burst-size-dword = <0x10>; rx-burst-size-dword = <0x10>; status = "okay"; disable-over-current; pinctrl-names = "default"; pinctrl-0 = <0x2d>; vbus-supply = <0x2e>; }; usb@2184200 { compatible = "fsl,imx6q-usb\0fsl,imx27-usb"; reg = <0x2184200 0x200>; interrupts = <0x00 0x28 0x04>; clocks = <0x04 0xa2>; fsl,usbphy = <0x2f>; fsl,usbmisc = <0x2c 0x01>; dr_mode = "host"; ahb-burst-config = <0x00>; tx-burst-size-dword = <0x10>; rx-burst-size-dword = <0x10>; status = "okay"; disable-over-current; }; usb@2184400 { compatible = "fsl,imx6q-usb\0fsl,imx27-usb"; reg = <0x2184400 0x200>; interrupts = <0x00 0x29 0x04>; clocks = <0x04 0xa2>; fsl,usbphy = <0x30>; phy_type = "hsic"; fsl,usbmisc = <0x2c 0x02>; dr_mode = "host"; ahb-burst-config = <0x00>; tx-burst-size-dword = <0x10>; rx-burst-size-dword = <0x10>; status = "disabled"; }; usb@2184600 { compatible = "fsl,imx6q-usb\0fsl,imx27-usb"; reg = <0x2184600 0x200>; interrupts = <0x00 0x2a 0x04>; clocks = <0x04 0xa2>; fsl,usbphy = <0x31>; phy_type = "hsic"; fsl,usbmisc = <0x2c 0x03>; dr_mode = "host"; ahb-burst-config = <0x00>; tx-burst-size-dword = <0x10>; rx-burst-size-dword = <0x10>; status = "disabled"; }; usbmisc@2184800 { #index-cells = <0x01>; compatible = "fsl,imx6q-usbmisc"; reg = <0x2184800 0x200>; clocks = <0x04 0xa2>; phandle = <0x2c>; }; ethernet@2188000 { compatible = "fsl,imx6q-fec"; reg = <0x2188000 0x4000>; interrupt-names = "int0\0pps"; interrupts-extended = <0x01 0x00 0x76 0x04 0x01 0x00 0x77 0x04>; clocks = <0x04 0x75 0x04 0x75 0x04 0xbe>; clock-names = "ipg\0ahb\0ptp"; stop-mode = <0x05 0x34 0x1b>; fsl,wakeup_irq = <0x00>; status = "okay"; pinctrl-names = "default"; pinctrl-0 = <0x32>; phy-mode = "rgmii-id"; phy-reset-duration = <0x02>; phy-reset-gpios = <0x33 0x0f 0x01>; }; mlb@218c000 { compatible = "fsl,imx6q-mlb150"; reg = <0x218c000 0x4000>; interrupts = <0x00 0x35 0x04 0x00 0x75 0x04 0x00 0x7e 0x04>; clocks = <0x04 0x8b>; clock-names = "mlb"; iram = <0x18>; status = "disabled"; }; usdhc@2190000 { compatible = "fsl,imx6q-usdhc"; reg = <0x2190000 0x4000>; interrupts = <0x00 0x16 0x04>; clocks = <0x04 0xa3 0x04 0xa3 0x04 0xa3>; clock-names = "ipg\0ahb\0per"; bus-width = <0x04>; status = "okay"; pinctrl-names = "default"; pinctrl-0 = <0x34>; keep-power-in-suspend; mmc-pwrseq = <0x35>; cap-power-off-card; non-removable; vmmc-supply = <0x36>; #address-cells = <0x01>; #size-cells = <0x00>; wlcore@2 { compatible = "ti,wl1837"; reg = <0x02>; interrupts-extended = <0x37 0x04 0x04>; pinctrl-names = "default"; pinctrl-0 = <0x38>; }; }; usdhc@2194000 { compatible = "fsl,imx6q-usdhc"; reg = <0x2194000 0x4000>; interrupts = <0x00 0x17 0x04>; clocks = <0x04 0xa4 0x04 0xa4 0x04 0xa4>; clock-names = "ipg\0ahb\0per"; bus-width = <0x04>; status = "okay"; pinctrl-names = "default\0state_100mhz\0state_200mhz"; pinctrl-0 = <0x39 0x3a>; pinctrl-1 = <0x39 0x3b>; pinctrl-2 = <0x39 0x3c>; vmmc-supply = <0x3d>; cd-gpios = <0x3e 0x04 0x01>; }; usdhc@2198000 { compatible = "fsl,imx6q-usdhc"; reg = <0x2198000 0x4000>; interrupts = <0x00 0x18 0x04>; clocks = <0x04 0xa5 0x04 0xa5 0x04 0xa5>; clock-names = "ipg\0ahb\0per"; bus-width = <0x08>; status = "okay"; pinctrl-names = "default"; pinctrl-0 = <0x3f>; non-removable; vmmc-supply = <0x40>; vqmmc-supply = <0x40>; }; usdhc@219c000 { compatible = "fsl,imx6q-usdhc"; reg = <0x219c000 0x4000>; interrupts = <0x00 0x19 0x04>; clocks = <0x04 0xa6 0x04 0xa6 0x04 0xa6>; clock-names = "ipg\0ahb\0per"; bus-width = <0x04>; status = "disabled"; }; i2c@21a0000 { #address-cells = <0x01>; #size-cells = <0x00>; compatible = "fsl,imx6q-i2c\0fsl,imx21-i2c"; reg = <0x21a0000 0x4000>; interrupts = <0x00 0x24 0x04>; clocks = <0x04 0x7d>; status = "okay"; clock-frequency = <0x186a0>; pinctrl-names = "default"; pinctrl-0 = <0x41>; rtc@68 { compatible = "nxp,pcf8523"; reg = <0x68>; nxp,12p5_pf; }; codec@a { clocks = <0x04 0xc9>; compatible = "fsl,sgtl5000"; #sound-dai-cells = <0x00>; pinctrl-names = "default"; pinctrl-0 = <0x42>; reg = <0x0a>; VDDA-supply = <0x40>; VDDD-supply = <0x43>; VDDIO-supply = <0x40>; status = "disabled"; phandle = <0x74>; }; camera@3c { compatible = "ovti,ov5640_mipi"; reg = <0x3c>; clocks = <0x04 0xc8>; clock-names = "csi_mclk"; pwn-gpios = <0x33 0x0e 0x01>; rst-gpios = <0x15 0x0a 0x00>; ipu_id = <0x00>; csi_id = <0x01>; mclk = <0x16e3600>; mclk_source = <0x00>; pinctrl-names = "default"; pinctrl-0 = <0x44>; extended-buffer; }; }; i2c@21a4000 { #address-cells = <0x01>; #size-cells = <0x00>; compatible = "fsl,imx6q-i2c\0fsl,imx21-i2c"; reg = <0x21a4000 0x4000>; interrupts = <0x00 0x25 0x04>; clocks = <0x04 0x7e>; status = "okay"; clock-frequency = <0x186a0>; pinctrl-names = "default"; pinctrl-0 = <0x45>; phandle = <0x0d>; ddc@50 { compatible = "fsl,imx6-hdmi-i2c"; reg = <0x50>; }; }; i2c@21a8000 { #address-cells = <0x01>; #size-cells = <0x00>; compatible = "fsl,imx6q-i2c\0fsl,imx21-i2c"; reg = <0x21a8000 0x4000>; interrupts = <0x00 0x26 0x04>; clocks = <0x04 0x7f>; status = "disabled"; }; romcp@21ac000 { reg = <0x21ac000 0x4000>; }; mmdc0-1@021b0000 { compatible = "fsl,imx6q-mmdc-combine"; reg = <0x21b0000 0x8000>; }; memory-controller@21b0000 { compatible = "fsl,imx6q-mmdc"; reg = <0x21b0000 0x4000>; clocks = <0x04 0x107>; }; memory-controller@21b4000 { compatible = "fsl,imx6q-mmdc"; reg = <0x21b4000 0x4000>; status = "disabled"; }; weim@21b8000 { #address-cells = <0x02>; #size-cells = <0x01>; compatible = "fsl,imx6q-weim"; reg = <0x21b8000 0x4000>; interrupts = <0x00 0x0e 0x04>; clocks = <0x04 0xc4>; fsl,weim-cs-gpr = <0x05>; status = "disabled"; }; ocotp@21bc000 { compatible = "fsl,imx6q-ocotp\0syscon"; reg = <0x21bc000 0x4000>; clocks = <0x04 0x80>; phandle = <0x03>; }; tzasc@21d0000 { reg = <0x21d0000 0x4000>; interrupts = <0x00 0x6c 0x04>; }; tzasc@21d4000 { reg = <0x21d4000 0x4000>; interrupts = <0x00 0x6d 0x04>; }; audmux@21d8000 { compatible = "fsl,imx6q-audmux\0fsl,imx31-audmux"; reg = <0x21d8000 0x4000>; status = "okay"; ssi1 { fsl,audmux-port = <0x00>; fsl,port-config = <0xa5000800 0x8000>; }; pins5 { fsl,audmux-port = <0x04>; fsl,port-config = <0x800 0x00>; }; }; mipi@21dc000 { compatible = "fsl,imx6q-mipi-csi2"; reg = <0x21dc000 0x4000>; #address-cells = <0x01>; #size-cells = <0x00>; interrupts = <0x00 0x64 0x04 0x00 0x65 0x04>; clocks = <0x04 0x8a 0x04 0xee 0x04 0x35>; clock-names = "dphy_clk\0cfg_clk\0pixel_clk"; status = "okay"; ipu_id = <0x00>; csi_id = <0x01>; v_channel = <0x00>; lanes = <0x02>; mipi_dphy_clk = <0x14>; port@1 { reg = <0x01>; #address-cells = <0x01>; #size-cells = <0x00>; endpoint@0 { reg = <0x00>; remote-endpoint = <0x46>; phandle = <0x20>; }; endpoint@1 { reg = <0x01>; remote-endpoint = <0x47>; phandle = <0x25>; }; }; port@2 { reg = <0x02>; #address-cells = <0x01>; #size-cells = <0x00>; endpoint@0 { reg = <0x00>; remote-endpoint = <0x48>; phandle = <0x21>; }; endpoint@1 { reg = <0x01>; remote-endpoint = <0x49>; phandle = <0x26>; }; }; port@3 { reg = <0x03>; #address-cells = <0x01>; #size-cells = <0x00>; endpoint@0 { reg = <0x00>; remote-endpoint = <0x4a>; phandle = <0x22>; }; endpoint@1 { reg = <0x01>; remote-endpoint = <0x4b>; phandle = <0x27>; }; }; port@4 { reg = <0x04>; #address-cells = <0x01>; #size-cells = <0x00>; endpoint@0 { reg = <0x00>; remote-endpoint = <0x4c>; phandle = <0x23>; }; endpoint@1 { reg = <0x01>; remote-endpoint = <0x4d>; phandle = <0x28>; }; }; }; mipi@21e0000 { reg = <0x21e0000 0x4000>; status = "disabled"; compatible = "fsl,imx6dl-mipi-dsi"; interrupts = <0x00 0x66 0x04>; gpr = <0x05>; clocks = <0x04 0x8a 0x04 0xee>; clock-names = "mipi_pllref_clk\0mipi_cfg_clk"; ports { #address-cells = <0x01>; #size-cells = <0x00>; port@0 { reg = <0x00>; endpoint { remote-endpoint = <0x4e>; phandle = <0x58>; }; }; port@1 { reg = <0x01>; endpoint { remote-endpoint = <0x4f>; phandle = <0x5c>; }; }; }; }; vdoa@21e4000 { compatible = "fsl,imx6q-vdoa"; reg = <0x21e4000 0x4000>; interrupts = <0x00 0x12 0x04>; clocks = <0x04 0xca>; iram = <0x18>; }; serial@21e8000 { compatible = "fsl,imx6q-uart\0fsl,imx21-uart"; reg = <0x21e8000 0x4000>; interrupts = <0x00 0x1b 0x04>; clocks = <0x04 0xa0 0x04 0xa1>; clock-names = "ipg\0per"; dmas = <0x10 0x1b 0x04 0x00 0x10 0x1c 0x04 0x00>; dma-names = "rx\0tx"; status = "okay"; pinctrl-names = "default"; pinctrl-0 = <0x50>; }; serial@21ec000 { compatible = "fsl,imx6q-uart\0fsl,imx21-uart"; reg = <0x21ec000 0x4000>; interrupts = <0x00 0x1c 0x04>; clocks = <0x04 0xa0 0x04 0xa1>; clock-names = "ipg\0per"; dmas = <0x10 0x1d 0x04 0x00 0x10 0x1e 0x04 0x00>; dma-names = "rx\0tx"; status = "okay"; pinctrl-names = "default"; pinctrl-0 = <0x51>; speed = <0x1c200>; }; serial@21f0000 { compatible = "fsl,imx6q-uart\0fsl,imx21-uart"; reg = <0x21f0000 0x4000>; interrupts = <0x00 0x1d 0x04>; clocks = <0x04 0xa0 0x04 0xa1>; clock-names = "ipg\0per"; dmas = <0x10 0x1f 0x04 0x00 0x10 0x20 0x04 0x00>; dma-names = "rx\0tx"; status = "okay"; pinctrl-names = "default"; pinctrl-0 = <0x52>; uart-has-rtscts; bluetooth { compatible = "ti,wl1837-st"; clocks = <0x53>; clock-names = "ext_clock"; enable-gpios = <0x37 0x00 0x00>; pinctrl-names = "default"; pinctrl-0 = <0x54>; current-speed = <0x1c200>; max-speed = <0x2dc6c0>; }; }; serial@21f4000 { compatible = "fsl,imx6q-uart\0fsl,imx21-uart"; reg = <0x21f4000 0x4000>; interrupts = <0x00 0x1e 0x04>; clocks = <0x04 0xa0 0x04 0xa1>; clock-names = "ipg\0per"; dmas = <0x10 0x21 0x04 0x00 0x10 0x22 0x04 0x00>; dma-names = "rx\0tx"; status = "disabled"; }; i2c@21f8000 { #address-cells = <0x01>; #size-cells = <0x00>; compatible = "fsl,imx6q-i2c\0fsl,imx21-i2c"; reg = <0x21f8000 0x4000>; interrupts = <0x00 0x23 0x04>; clocks = <0x04 0x74>; status = "disabled"; }; }; ipu@2400000 { #address-cells = <0x01>; #size-cells = <0x00>; compatible = "fsl,imx6q-ipu"; reg = <0x2400000 0x400000>; interrupts = <0x00 0x06 0x04 0x00 0x05 0x04>; clocks = <0x04 0x82 0x04 0x83 0x04 0x84 0x04 0x27 0x04 0x28 0x04 0x87 0x04 0x88>; clock-names = "bus\0di0\0di1\0di0_sel\0di1_sel\0ldb_di0\0ldb_di1"; resets = <0x17 0x02>; bypass_reset = <0x00>; port@0 { reg = <0x00>; phandle = <0x62>; endpoint { remote-endpoint = <0x55>; phandle = <0x24>; }; }; port@1 { reg = <0x01>; phandle = <0x63>; endpoint { remote-endpoint = <0x56>; phandle = <0x29>; }; }; port@2 { #address-cells = <0x01>; #size-cells = <0x00>; reg = <0x02>; phandle = <0x64>; endpoint@0 { reg = <0x00>; }; endpoint@1 { reg = <0x01>; remote-endpoint = <0x57>; phandle = <0x0e>; }; endpoint@2 { reg = <0x02>; remote-endpoint = <0x58>; phandle = <0x4e>; }; endpoint@3 { reg = <0x03>; remote-endpoint = <0x59>; phandle = <0x06>; }; endpoint@4 { reg = <0x04>; remote-endpoint = <0x5a>; phandle = <0x08>; }; }; port@3 { #address-cells = <0x01>; #size-cells = <0x00>; reg = <0x03>; phandle = <0x65>; endpoint@0 { reg = <0x00>; }; endpoint@1 { reg = <0x01>; remote-endpoint = <0x5b>; phandle = <0x0f>; }; endpoint@2 { reg = <0x02>; remote-endpoint = <0x5c>; phandle = <0x4f>; }; endpoint@3 { reg = <0x03>; remote-endpoint = <0x5d>; phandle = <0x07>; }; endpoint@4 { reg = <0x04>; remote-endpoint = <0x5e>; phandle = <0x09>; }; }; }; busfreq { compatible = "fsl,imx_busfreq"; clocks = <0x04 0xab 0x04 0x06 0x04 0x0b 0x04 0x68 0x04 0xac 0x04 0x3a 0x04 0x12 0x04 0x3c 0x04 0x14 0x04 0x03 0x04 0x10a 0x04 0x16 0x04 0x08>; clock-names = "pll2_bus\0pll2_pfd2_396m\0pll2_198m\0arm\0pll3_usb_otg\0periph\0periph_pre\0periph_clk2\0periph_clk2_sel\0osc\0axi_alt_sel\0axi_sel\0pll3_pfd1_540m"; interrupts = <0x00 0x6b 0x04 0x00 0x70 0x04>; interrupt-names = "irq_busfreq_0\0irq_busfreq_1"; fsl,max_ddr_freq = <0x17d78400>; }; sram@905000 { compatible = "mmio-sram"; reg = <0x905000 0x1b000>; clocks = <0x04 0x8e>; phandle = <0x18>; }; sram@918000 { compatible = "fsl,optee-lpm-sram"; reg = <0x918000 0x8000>; overw_reg = <0x18 0x905000 0x13000>; }; gpu@00130000 { compatible = "fsl,imx6dl-gpu\0fsl,imx6q-gpu"; reg = <0x130000 0x4000 0x134000 0x4000 0x10000000 0x00 0x00 0x8000000>; reg-names = "iobase_3d\0iobase_2d\0phys_baseaddr\0contiguous_mem"; interrupts = <0x00 0x09 0x04 0x00 0x0a 0x04>; interrupt-names = "irq_3d\0irq_2d"; clocks = <0x04 0x8f 0x04 0x1b 0x04 0x79 0x04 0x7a 0x04 0x00>; clock-names = "gpu2d_axi_clk\0gpu3d_axi_clk\0gpu2d_clk\0gpu3d_clk\0gpu3d_shader_clk"; resets = <0x17 0x00 0x17 0x03>; reset-names = "gpu3d\0gpu2d"; power-domains = <0x11>; }; }; cpus { #address-cells = <0x01>; #size-cells = <0x00>; cpu@0 { compatible = "arm,cortex-a9"; device_type = "cpu"; reg = <0x00>; next-level-cache = <0x5f>; operating-points = <0xf32a0 0x1312d0 0xc15c0 0x11edd8 0x60ae0 0x118c30>; fsl,soc-operating-points = <0xf32a0 0x11edd8 0xc15c0 0x11edd8 0x60ae0 0x11edd8>; clock-latency = <0xee6c>; #cooling-cells = <0x02>; clocks = <0x04 0x68 0x04 0x06 0x04 0x10 0x04 0x11 0x04 0xaa 0x04 0xdf 0x04 0xe6 0x04 0xd8>; clock-names = "arm\0pll2_pfd2_396m\0step\0pll1_sw\0pll1_sys\0pll1\0pll1_bypass\0pll1_bypass_src"; arm-supply = <0x60>; pu-supply = <0x1e>; soc-supply = <0x61>; }; cpu@1 { compatible = "arm,cortex-a9"; device_type = "cpu"; reg = <0x01>; next-level-cache = <0x5f>; operating-points = <0xf32a0 0x1312d0 0xc15c0 0x11edd8 0x60ae0 0x118c30>; fsl,soc-operating-points = <0xf32a0 0x11edd8 0xc15c0 0x11edd8 0x60ae0 0x11edd8>; clock-latency = <0xee6c>; clocks = <0x04 0x68 0x04 0x06 0x04 0x10 0x04 0x11 0x04 0xaa>; clock-names = "arm\0pll2_pfd2_396m\0step\0pll1_sw\0pll1_sys"; arm-supply = <0x60>; pu-supply = <0x1e>; soc-supply = <0x61>; }; }; reserved-memory { #address-cells = <0x01>; #size-cells = <0x01>; ranges; linux,cma { compatible = "shared-dma-pool"; reusable; size = <0x2000000>; linux,cma-default; alloc-ranges = <0x00 0x40000000>; alignment = <0x400000>; }; linux,gpu { compatible = "shared-dma-pool"; reusable; size = <0x10000000>; alloc-ranges = <0x00 0x80000000>; alignment = <0x400000>; phandle = <0x12>; }; }; capture-subsystem { compatible = "fsl,imx-capture-subsystem"; ports = <0x62 0x63>; }; display-subsystem { compatible = "fsl,imx-display-subsystem"; ports = <0x64 0x65>; }; regulator-vcc-3v3 { compatible = "regulator-fixed"; regulator-always-on; regulator-name = "vcc_3v3"; regulator-min-microvolt = <0x325aa0>; regulator-max-microvolt = <0x325aa0>; vin-supply = <0x40>; phandle = <0x36>; }; regulator-nvcc-sd1 { compatible = "regulator-fixed"; regulator-always-on; regulator-name = "nvcc_sd1"; regulator-min-microvolt = <0x1b7740>; regulator-max-microvolt = <0x1b7740>; vin-supply = <0x36>; }; ti-wifi-clock { compatible = "gpio-gate-clock"; #clock-cells = <0x00>; clock-frequency = <0x8000>; pinctrl-names = "default"; pinctrl-0 = <0x66>; enable-gpios = <0x67 0x05 0x00>; phandle = <0x53>; }; ti-wifi-pwrseq { compatible = "mmc-pwrseq-simple"; pinctrl-names = "default"; pinctrl-0 = <0x68>; reset-gpios = <0x67 0x1a 0x01>; post-power-on-delay-ms = <0xc8>; clocks = <0x53>; clock-names = "ext_clock"; phandle = <0x35>; }; memory@10000000 { device_type = "memory"; reg = <0x10000000 0x00>; }; ir-receiver { compatible = "gpio-ir-receiver"; gpios = <0x69 0x09 0x01>; pinctrl-names = "default"; pinctrl-0 = <0x6a>; linux,rc-map-name = "rc-rc6-mce"; }; regulator-v-3v2 { compatible = "regulator-fixed"; regulator-always-on; regulator-max-microvolt = <0x325aa0>; regulator-min-microvolt = <0x325aa0>; regulator-name = "v_3v2"; phandle = <0x40>; }; regulator-v-5v0 { compatible = "regulator-fixed"; regulator-always-on; regulator-max-microvolt = <0x4c4b40>; regulator-min-microvolt = <0x4c4b40>; regulator-name = "v_5v0"; phandle = <0x6e>; }; regulator-vcc-1p8 { compatible = "regulator-fixed"; regulator-always-on; regulator-max-microvolt = <0x1b7740>; regulator-min-microvolt = <0x1b7740>; regulator-name = "vcc_1p8"; vin-supply = <0x40>; phandle = <0x43>; }; regulator-v-sd { compatible = "regulator-fixed"; gpio = <0x33 0x1e 0x00>; pinctrl-names = "default"; pinctrl-0 = <0x6b>; regulator-boot-on; regulator-max-microvolt = <0x325aa0>; regulator-min-microvolt = <0x325aa0>; regulator-name = "v_sd"; startup-delay-us = <0x3e8>; vin-supply = <0x40>; phandle = <0x3d>; }; regulator-v-usb1 { compatible = "regulator-fixed"; enable-active-high; gpio = <0x6c 0x16 0x00>; pinctrl-names = "default"; pinctrl-0 = <0x6d>; regulator-always-on; regulator-max-microvolt = <0x4c4b40>; regulator-min-microvolt = <0x4c4b40>; regulator-name = "v_usb1"; vin-supply = <0x6e>; phandle = <0x2e>; }; regulator-v-usb2 { compatible = "regulator-fixed"; enable-active-high; gpio = <0x3e 0x00 0x00>; pinctrl-names = "default"; pinctrl-0 = <0x6f>; regulator-always-on; regulator-max-microvolt = <0x4c4b40>; regulator-min-microvolt = <0x4c4b40>; regulator-name = "v_usb2"; vin-supply = <0x6e>; }; regulator-v-usb3 { compatible = "regulator-fixed"; enable-active-high; gpio = <0x15 0x0d 0x00>; pinctrl-names = "default"; pinctrl-0 = <0x70>; regulator-always-on; regulator-max-microvolt = <0x4c4b40>; regulator-min-microvolt = <0x4c4b40>; regulator-name = "v_usb3"; vin-supply = <0x6e>; }; regulator-v-usb4 { compatible = "regulator-fixed"; enable-active-high; gpio = <0x69 0x0a 0x00>; pinctrl-names = "default"; pinctrl-0 = <0x71>; regulator-always-on; regulator-max-microvolt = <0x4c4b40>; regulator-min-microvolt = <0x4c4b40>; regulator-name = "v_usb4"; vin-supply = <0x6e>; }; sound-sgtl5000 { compatible = "simple-audio-card"; simple-audio-card,name = "On-board Codec"; simple-audio-card,format = "i2s"; simple-audio-card,bitclock-master = <0x72>; simple-audio-card,frame-master = <0x72>; simple-audio-card,widgets = "Microphone\0Mic Jack\0Headphone\0Headphone Jack"; simple-audio-card,routing = "MIC_IN\0Mic Jack\0Mic Jack\0Mic Bias\0Headphone Jack\0HP_OUT"; simple-audio-card,cpu { sound-dai = <0x73>; }; simple-audio-card,codec { sound-dai = <0x74>; phandle = <0x72>; }; }; leds { compatible = "gpio-leds"; red1 { label = "red1"; gpios = <0x15 0x1a 0x01>; }; green1 { label = "green1"; gpios = <0x15 0x17 0x01>; }; red2 { label = "red2"; gpios = <0x15 0x19 0x01>; }; green2 { label = "green2"; gpios = <0x15 0x18 0x01>; }; }; fb@0 { compatible = "fsl,mxc_sdc_fb"; disp_dev = "hdmi"; interface_pix_fmt = "RGB24"; mode_str = "1920x1080M@60"; default_bpp = <0x20>; int_clk = <0x00>; late_init = <0x00>; memory-region = <0x12>; status = "okay"; }; fb@1 { compatible = "fsl,mxc_sdc_fb"; disp_dev = "ldb"; interface_pix_fmt = "RGB666"; default_bpp = <0x10>; int_clk = <0x00>; late_init = <0x00>; memory-region = <0x12>; status = "disabled"; }; sound-hdmi { compatible = "fsl,imx6q-audio-hdmi\0fsl,imx-audio-hdmi"; model = "imx-audio-hdmi"; hdmi-controller = <0x75>; }; v4l2_cap_0 { compatible = "fsl,imx6q-v4l2-capture"; ipu_id = <0x00>; csi_id = <0x01>; mclk_source = <0x00>; mipi_camera = <0x01>; default_input = <0x00>; status = "okay"; }; v4l2_out { compatible = "fsl,mxc_v4l2_output"; status = "okay"; }; };