Configuring the bq20z90 Data Flash

Battery Management

Introduction

The bq20z90 has numerous data flash constants that can be used to configure the device with a variety of different options for most features.

The data flash of the bq20z90 is split into easy to read sections or classes with individual tabs highlighting each class.

Glossary

Italics: All words in this document that are in italics represent names of data flash locations exactly as

they are shown in the EV software.

Underlined: All words that are underlined represent SBS compliant registers exactly as they are shown in the EV Software.

[brackets]: All words or letters in brackets represent bit/flag names exactly as they are shown in the SBS and Data Flash in the EV software.

(-): This is commonly used in this document to represent a minus sign. It is written this way to ensure that the sign is not lost in the translation of formulas in the text of this document.

Flag: This word is usually used to represent a read only status bit that indicates some action has occurred or is occurring. This bit usually cannot be modified by the user.

Bit: This word has a slightly different meaning than Flag in that this word is used to refer to a configuration setting bit. It is primarily used in data flash settings.

System: The word system is sometimes used in this document. It always means a host system that is consuming current from the battery pack that includes the bq20z90.

RSOC: Relative state of Charge

ASOC: Absolute State of Charge

SOC: This is used as a generic meaning of State of Charge. It can mean RSOC, ASOC, or Percentage of actual chemical capacity.

FCC: Full Charge Capacity

RTA: Remaining Time Alarm

RCA: Remaining Capacity Alarm

RM: Remaining Capacity

Precharge/ZVCHG: The words Precharge and ZVCHG are interchangeable throughout the document

Cell Voltage(Max): This represents the maximum value among all the SBS cell voltage registers.(Cell

Voltage 1 through Cell Voltage 4)

Cell Voltage(Min): This represents the minimum value among all the SBS cell voltage registers.(Cell

Voltage 1 through Cell Voltage 4)

Cell Voltage(Any): This represents any of the possible SBS cell voltage registers.(Cell Voltage 1 through Cell Voltage 4)

FET opened/Closed: It is common to say FET opened or FET closed. This is used throughout this document to mean the FET is turned off or the FET is turned on respectively.

[DSG] in Battery Status: SBS defines the [DSG] flag in battery status as the method for determining charging or discharging. This can be confused in many descriptions in this document because different functions require different methods for determining charging or discharging. The SBS description sometimes does not give enough resolution for correct part function so these functions require other data flash registers as described in their respective definitions. Basically, SBS states that if the battery is charging then [DSG] will be 0, and any other time (Current less than or equal to 0), the [DSG] flag will be set. The actual formula that the bq20z90 uses for setting or clearing the [DSG] flag are as follows:

[DSG] clear:

[DSG]=0 if Current >= Chg Current Threshold

[DSG] set:

[DSG]=1 if

1. Current <= Dsg Current Threshold or

2. Relaxation Mode which is defined by one of the following statements:

A) Current transitioning from below (-)Quit Current to (above (-)Quit Current and below Quit Current) for Dsg Relax Time

B) Current transitioning from above Quit Current to (below Quit Current and above (-)Quit Current) for Chg Relax Time

Blink, Flash, and Delay: There are 3 different display modes for the LEDs in this document that need clarification.

· Blinking: When the display is said to be blinking then the word “blinking” is used to refer to the LED located closest to the LED used to indicate 100% that is illuminated and “blinking” when the LED display is activated and displaying SOC (state of charge). Only this “topmost” activated LED in the display will blink. All other LEDs that are activated will be steady state when activated. (see LED Blink Rate)

· Flashing: When the display is said to be flashing then the word “flashing” means all LEDs that are activated to indicate the SOC will flash with a period of (2 * LED Flash Rate).

· Delay: When the display is activate, all LEDs that are required to indicate the SOC may not illuminate at the same time. Starting from the LED that represents the lowest SOC, there can be a delay (LED Delay) between each LED illuminating from the LED that represents the lowest possible SOC up to the LED that represents the present SOC.

SAFE and /SAFE: These words are used throughout this document to represent 2 output pins on the bq20z90. SAFE is pin 7 on the bq20z90 and /SAFE is pin 12. When this document discusses permanent failures, it usually includes a discussion of these two pins. When a permanent failure happens and its control bit is enabled then these 2 pins are activated to either blow a fuse or to activate some hardware protection. The reason there are 2 outputs is for backwards compatibility with bq208X parts and to give options for an application. Both outputs are activated at the same time when enabled, but the /SAFE pin is active low so it is driven low when activated while the SAFE pin is active high and is driven high when activated.

Data Flash Descriptions

1^st Level Safety

All 1^st Level Safety functions are temporary. There should be no permanent failures or damage to the battery if any of the 1^st Level Safety functions are triggered.

Voltage

COV Threshold

When any cell voltage measured by Cell Voltage (Any) rises up to this threshold then the Cell Over Voltage (COV) protection process is triggered, initiating a [COV] in Safety Alert for COV Time. If the COV condition clears prior to the expiration of the COV Time timer, then [COV] in Safety Alert will be cleared and no [COV] flag will be set in Safety Status. If the COV condition does not clear then [COV] will be set in Safety Status and the Charge FET will be opened. This fault condition causes [TCA] in Battery Status to be set. It also causes Charging Current and Charging Voltage to be set to 0. Setting COV Time to 0 completely disables this function.

Normal Setting: Default is 4300 mV. This is cell chemistry dependent but 4200-4300 is the most common settings.

COV Time

The See COV Threshold. This is a buffer time allotted for a COV condition. The timer starts after [COV] is set in Safety Alert. When it expires then the bq20z90 forces [COV] set in Safety Status and opens the Charge FET. If the condition clears prior to the expiration of the COV Time timer then the [COV] will be cleared in Safety Alert and the COV Time timer resets without setting [COV] in Safety Status. Setting COV Time to 0 completely disables COV Threshold.

Normal Setting: This is usually set to 2 seconds but depends on the application.

COV Recovery

When a [COV] is set in Safety Status, it can only be cleared when ALL cell voltages as measured by Cell Voltage(All) fall be below this threshold.

Normal Setting: This defaults to 3900 mV. Set low enough that the hysteresis between COV Threshold fault and this recovery prevents oscillation of the Charge FET.

COV Delta

The actual trigger value for COV Threshold is adjusted down by this amount if Temperature rises above (Over Temperature Threshold - COV Temp Hys). The actual Data Flash location for COV Threshold is not modified, just the trigger value. It returns to normal if temperature falls below (Over Temperature Threshold - COV Temp Hys). If this time is set to 0 then the COV Threshold trigger value is not modified based on temperature.

Normal Setting: This value is usually set to 20mV. This is application and cell chemistry dependent.

COV Temp Hys

See COV Delta. This is the delta temperature below the Over Temperature Threshold where the COV Threshold is modified by COV Delta.

Normal Setting: This value is usually set to 100in 0.1 degrees C. This is application and cell chemistry dependent.

POV Threshold

When the pack voltage measured by Voltage rises up to this threshold then the Pack Over Voltage (POV) protection process is triggered. This process starts by setting [POV] in Safety Alert for POV Time. If the POV condition clears prior to the expiration of the POV Time timer, then the [POV] will be cleared in Safety Alert with no [POV] being set in Safety Status. If the POV condition does not clear then [POV] will be set in Safety Status and the Charge FET will be opened. This fault condition causes [TCA] in Battery Status to be set. It also causes Charging Current and Charging Voltage to be set to 0. Setting POV Time to 0 completely disables this function.

Normal Setting: This register defaults to 17500 which is for a 4 cell pack. This is probably a little hight but it depends on the cell chemistry and the number of cells in series for an application. It is usually set to the (number of cells * 4300 mV). IE. 8600 mV for 2 cell applications, 12900 mV for 3 cell, and 17200 mV for 4 cell applications

POV Time

See POV Threshold. This is a buffer time allotted for a POV condition. The timer starts after the [POV] is set in Safety Alert. When it expires then the bq20z90 forces [POV] set in Safety Status and opens the Charge FET. If the condition clears prior to the expiration of the POV Time timer then [POV] will be cleared in Safety Alert and the POV Time timer resets. Setting POV Time to 0 completely disables POV Threshold.

Normal Setting: This is usually set to 2 seconds but depends on the application.

POV Recovery

When [POV] is set in Safety Status, it can only be cleared when the pack voltage measured by Voltage falls below this threshold.

Normal Setting: This defaults to 16000 mV. Set low enough that the hysteresis between POV Threshold fault and this recovery prevents oscillation of the Charge FET.

CUV Threshold

When any cell voltage measured by Cell Voltage(Any) falls below this threshold then the Cell Under Voltage (CUV) protection process is triggered, initiating a [CUV] flag getting set in Safety Alert for CUV Time. If the CUV condition clears prior to the expiration of the CUV Time timer, then [CUV] will be cleared in Safety Alert and no [CUV] will be set in Safety Status. If the CUV condition does not clear then a [CUV] will be set in Safety Status and the Discharge FET will be opened. This fault condition causes [TDA] and [FD] in Battery Status to be set. It also causes [XDSG] in Operation Status. Setting CUV Time to 0 completely disables this function.

Normal Setting: Default is 2200 mV. This is cell chemistry dependent but 2200 mV – 2300mV is the most common setting..

CUV Time

See CUV Threshold. This is a buffer time allotted for a CUV condition. The timer starts after [CUV] is set in Safety Alert.. When it expires then the bq20z90 forces [CUV] set in Safety Status and opens the Charge FET. If the condition clears prior to the expiration of the CUV Time timer then [CUV] will be cleared in Safety Alert and the CUV Time timer resets. Setting CUV Time to 0 completely disables CUV Threshold.

Normal Setting: This is usually set to 2 seconds but depends on the application.

CUV Recovery
When [CUV] is set in Safety Status, it can only be cleared when ALL cell voltages as measured by Cell Voltage(All) rise above this threshold.

Normal Setting: The default for this register is 3000 mV. Set high enough that the hysteresis between CUV Threshold fault and this recovery prevents oscillation of the Discharge FET.

PUV Threshold

When the pack voltage measured by Voltage falls below this threshold then the Pack Under Voltage (PUV) protection process is triggered, initiating a [PUV] in Safety Alert for PUV Time. If the PUV condition clears prior to the expiration of the PUV Time timer, then [PUV] will be cleared in Safety Alert and [PUV] will not be set in Safety Status. If the PUV condition does not clear then a [PUV] will be set in Safety Status and the Discharge FET will be opened. This fault condition causes [TDA] and [FD] in Battery Status to be set. It also causes [XDSG] in Operation Status. Setting PUV Time to 0 completely disables this function.

Normal Setting: This register defaults to 11000 which is for a 4 cell pack. This is very application and cell chemistry dependent. It also depends on the number of cells in series for an application. A very common setting is the (number of cells * 2750 mV). IE. 5500 mV for 2 cell applications, 8250 mV for 3 cell, and 11000 mV for 4 cell applications

PUV Time

See PUV Threshold. This is a buffer time allotted for a PUV condition. The timer starts after [PUV] is set in Safety Alert. When it expires then the bq20z90 forces [PUV] set in Safety Status and opens the Discharge FET. If the condition clears prior to the expiration of the PUV Time timer then [PUV] will be cleared in Safety Alert and the PUV Time timer resets. Setting PUV Time to 0 completely disables PUV Threshold.

Normal Setting: This is usually set to 2 seconds but depends on the application.

PUV Recovery

When [POV] is set in Safety Status, it can only be cleared when the pack voltage measured by Voltage

falls below this threshold.

Normal Setting: The default for this register is 12000 mV. Set high enough that the hysteresis between PUV Threshold fault and this recovery prevents oscillation of the Discharge FET.

Current:

There are 3 levels or tiers of current protectio n in the bq20z90. The first 2 levels, 1^st Tier and 2^nd Tier are slow responding (>1 second). The third level is a very quick responding current protection controlled directly by the bq29330.

NOTE: IT is important to note that the bq29330 makes the triggering decision for any of the AFE fault conditions. This is to ensure quick response to dangerous faults that could not only cause damage but also hazards. It is also designed in such a way that the AFE can act completely autonomously in the event of damage to the bq20z90 in the triggering of any AFE fault. The bq29330 cannot, however, clear the fault condition. It is cleared only by the bq20z90. The AFE data is transferred to the bq29330 on reset and (if enabled in the AFE Verification subclass) is continually monitored by the bq20z90 to ensure no corruption has occurred at any time. If corruption has occurred the bq20z90 will attempt to correct it and if after repeated attempts (as set in the AFE Verification subclass) it cannot correct the condition then it will set a permanent failure. If enabled in Permanent Fail Cfg, then the SAFE pin will be driven high and /SAFE pin will be driven low on the bq20z90. (See Permanent Fail Cfg)

OC (1st Tier) Chg

When current measured by Current reaches up to or above this threshold during charging then the 1^st Tier Over Current in Charge [OCC] protection process is triggered, initiating an [OCC] in Safety Alert for OC (1^st Tier) Chg Time in seconds. If the 1^st Tier OCC condition clears prior to the expiration of the OC (1^st Tier) Chg Time timer, then [OCC] in Safety Alert will be cleared and no [OCC] will be set in Safety Status. If the 1^st Tier OCC condition does not clear then a [OCC] will be set in Safety Status and the Charge FET will be opened. This fault condition causes [TCA] in Battery Status to be set. It also causes Charging Current and Charging Voltage to be set to 0.

Normal Setting: This register is application dependent. It should be set above the absolute maximum expected discharge current. It should be set high enough that unexpected mild charge spikes or inaccuracies will not create a false over current trigger but low enough to force the Charge FET to open before damage can occur to the pack.

OC (1st Tier) Chg Time

See OC(1^st Tier) Chg. This is a buffer time allotted for a 1^st tier Over Current condition. The timer starts every time the [OCC] in Safety Alert is initially set. When the timer expires then the bq20z90 forces an [OCC] in Safety Status and opens the Charge FET. If [OCC] in Safety Alert clears prior to the expiration of the OC (1^st Tier) Chg Time timer, then [OCC] in Safety Alert will be cleared and the OC (1^st Tier) Chg Time timer resets. Setting the OC (1^st Tier) Chg Time to 0 disables OC (1^st Tier) Chg .

Normal Setting: This is usually set to 2 seconds but depends on the application. It should be set long enough to prevent false triggering of the [OCC] in Safety Status but short enough to prevent damage to the battery pack.

OC Chg Recovery

OC Chg Recovery is one of several recovery methods used for both 1^st and 2^nd level Over Current in the charge direction faults. This value is used for either non-removable packs ([NR] in Operation Cfg B =1) or for removable packs that this function is configured ([OCC] in Non-Removable Cfg). With either of these settings, Average Current must fall below this value for Current Recovery Timer in seconds to clear [OCC] or [OCC2] in Safety Status if either is set.

Normal Setting: This register is application dependent but is usually set low enough that it prevents quick oscillation in the Charge FET. Average Current is used for this recovery function and will fall every second that it is recomputed with Current at or near 0. If this recovery is set too high then the Charge FET can oscillate with a frequency that is fast enough to still cause damage to the battery pack because the Average Current gets below this value quickly.

OC (1st Tier) Dsg

When current measured by Current falls down to or below this threshold during discharging then the 1^st Tier Over Current in discharge (OCD) protection process is triggered, initiating [OCD] getting set in Safety Alert for OC (1^st Tier) Dsg Time in seconds. If the 1^st Tier OCD condition clears prior to the expiration of the OC (1^st Tier) Dsg Time timer, then [OCD] will be cleared and no [OCD] will be set. If the 1^st Tier OCD condition does not clear then [OCD] will be set in Safety Status and the Discharge FET will be opened. This fault condition causes [XDSG] and [XDSGI] in Operation Status to be set. It also causes Charging Current to be set to 0.

Normal Setting: Care should be taken when interpreting discharge descriptions in this document when interpreting the direction and magnitude of the currents because they are in the negative direction. This register is application dependent. It should be set below the absolute maximum expected discharge current. It should be set low enough that unexpected mild discharge spikes or inaccuracies will not create a false over current trigger but high enough to force the Discharge FET open before damage can occur to the pack.

OC (1st Tier) Time Dsg

See OC(1^st Tier) Dsg. This is a buffer time allotted for a 1^st tier Over Current in the discharge direction condition. The timer starts every time [OCD] in Safety Alert is initially set. When the timer expires the bq20z90 forces an [OCD] Alarm in Safety Status and opens the Discharge FET. If [OCD] in Safety Alert clears prior to the expiration of the OC (1^st Tier) Time Dsg timer, then the [OCD] in Safety Alert will be cleared and the OC (1^st Tier) Time Dsg timer resets. Setting the OC (1^st Tier) Time Dsg to 0 disables OC (1^st Tier) Dsg..

Normal Setting: This is usually set to 2 seconds but depends on the application. It should be set long enough to prevent false triggering of the [OCD] in Safety Status but short enough to prevent damage to the battery pack.

OC Dsg Recovery

OC Dsg Recovery is one of several recovery methods used for both 1^st and 2^nd level Over Current in the discharge direction Faults. This value is used for either non-removable packs ([NR] in Operation Cfg B =1) or for removable packs that this function is configured ([OCD] in Non-Removable Cfg). With either of these settings, Average Current must rise above this value for Current Recovery Timer in seconds to clear the [OCD] or the [OCD2] in Safety Status if either is set.

Normal Setting: Care should be taken when interpreting discharge descriptions in this document when interpreting the direction and magnitude of the currents because they are in the negative direction. This register is application dependent but is usually set high enough that it prevents quick oscillation in the Discharge FET. Average Current is used for this recovery function and will get closer to 0 every second that it is recomputed with Current at or near 0. If this recovery is set too low then the Discharge FET can oscillate with a frequency that is fast enough to still cause damage to the battery pack because the Average Current gets above this value quickly.

OC (2nd Tier) Chg

When current measured by Current reaches up to or above this threshold during charging then the 2^nd Tier Over Current in Charge [OCC2] protection process is triggered, initiating an [OCC2] in Safety Alert for OC (2^nd Tier) Chg Time in seconds. If the 2^nd Tier Over Current condition clears prior to the expiration of the OC (2^nd Tier) Chg Time timer, then [OCC2] in Safety Alert will be cleared and no [OCC2] will be set in Safety Status. If the 2^nd Tier Over Current condition does not clear then a [OCC2] will be set in Safety Status and the Charge FET will be opened. This fault condition causes [TCA] in Battery Status to be set. It also causes Charging Current and Charging Voltage to be set to 0.

Normal Setting: This register is application dependent. It should be set above the OC (1^st Tier) Chg threshold and should be set high enough that unexpected mild charge spikes or inaccuracies will not create a false over current trigger but low enough to force the Charge FET to open before damage can occur to the pack.

OC (2nd Tier) Time Chg

See OC(2^nd Tier) Chg. This is a buffer time allotted for a 2^nd Tier Over Current condition. The timer starts every time the [OCC2] is Safety Alert is initially set. When the timer expires then the bq20z90 forces an [OCC2] in Safety Status and opens the Charge FET. If [OCC2] in Safety Alert clears prior to the expiration of the OC (2^nd Tier) Chg Time timer, then [OCC2] in Safety Alert will be cleared and the OC (2^nd Tier) Chg Time timer resets. Setting the OC (2^nd Tier) Chg Time to 0 disables OC (2^nd Tier) Chg.

Normal Setting: This is usually set to 2 seconds but depends on the application. It should be set long enough to prevent false triggering of the [OCC2] in Safety Status but short enough to prevent damage to the battery pack. It is common for the second level over current threshold to be disabled.

OC (2nd Tier) Dsg

When current measured by Current falls down to or below this threshold during discharging then the 2^ndTier Over Current in discharge (OCD2) protection process is triggered, initiating an [OCD2] in Safety Alert for OC (2^ndTier) Dsg Time in seconds. If the 2^ndTier OCD2 condition clears prior to the expiration of the OC (2^ndTier) Dsg Time timer, then the [OCD2] will be cleared in Safety Alert and no [OCD2] alarm will be set in Safety Status. If the 2^ndTier OCD condition does not clear then a [OCD2] will be set in Safety Status and the Discharge FET will be opened. This fault condition causes [XDSG] and [XDSGI] in Operation Status to be set. It also causes Charging Current to be set to 0.

Normal Setting: Care should be taken when interpreting discharge descriptions in this document when interpreting the direction and magnitude of the currents because they are in the negative direction. This register is application dependent. It should be set below the OC (1^st Tier) Dsg threshold and should be set below the absolute maximum expected discharge current. It should be set low enough that unexpected mild discharge spikes or inaccuracies will not create a false over current trigger but high enough to force the Discharge FET open before damage can occur to the pack.

OC (2nd Tier) Time Dsg

See OC(2^ndTier) Dsg. This is a buffer time allotted for a 2^ndTier Over Current in the discharge direction condition. The timer starts every time [OCD2] in Safety Alert is initially set. When the timer expires then the bq20z90 forces an [OCD2] alarm in Safety Status and opens the Discharge FET. If [OCD2] in Safety Alert clears prior to the expiration of the OC (2^ndTier) Time Dsg timer, then the [OCD] in Safety Alert will be cleared and the OC (2^ndTier) Time Dsg timer resets. Setting the OC ( 2^ndTier) Time Dsg to 0 disables OC (2^ndTier) Dsg

Normal Setting: This is usually set to 2 seconds but depends on the application. It should be set long enough to prevent false triggering of the [OCD2] in Safety Status but short enough to prevent damage to the battery pack.

Current Recovery Timer

The Current Recovery Timer is used in the recovery process of any of the over current fault conditions. After a fault condition exists, depending on if enabled, the fault condition can be cleared only after Current Recovery Timer time in seconds with Average Current falling below the corresponding recovery threshold in the charge direction or rising above the corresponding recovery threshold in the discharge direction. The corresponding recovery does not happen immediately after the recovery condition exits. As soon as the recovery condition exists then the Current Recovery Timer starts and the condition will clear and the corresponding FET will be enabled after the Current Recovery Timer expires. This timer is associated with the following Fault Conditions as described in this section:

1. OC (1^st Tier) Dsg

2. OC (1^st Tier) Chg

3. OC (2^nd Tier) Dsg

4. OC (2^nd Tier) Chg

5. AFE OC Dsg

6. AFE SC Dsg

7. AFE SC Chg

This Recovery method is enabled if [NR] is set in Operation Cfg B or if ([NR] is cleared and the corresponding bits are set in the Non-Removable Cfg register:

1. OC (1^st Tier) Dsg [OCD]

2. OC (1^st Tier) Chg [OCC]

3. OC (2^nd Tier) Dsg [OCD2]

4. OC (2^nd Tier) Chg [OCC2]

5. AFE OC Dsg [AOCD

6. AFE SC Dsg [SCD]

7. AFE SC Chg [SCC]

Normal Setting: The default for this register is 8 seconds. This is a recommended number to prevent heating up in the corresponding FET.

AFE OC Dsg

Please see the Note at the beginning of the Current subclass section for an important note about all AFE fault conditions.

This is the third level Over Current protection in the discharge direction. This is a last effort protection function before using the Permanent Fail Functions in the Second Level Safety Class. This register displays in HEX using the EV Software. Also note that this setting is in units of Volts. It does not take into account the Sense resistor value. If the AFE OC DSG condition exists for AFE OC Dsg Time in milliseconds then the discharge FET will open as controlled by the bq29330. This fault condition causes [AOCD] to be set in Safety Status and [XDSG] and [XDSGI] in Operation Status to be set., and [TDA] to be set in Battery Status. It also causes Charging Current to be set to 0. Please see the following Table for settings for this register.

Table 1: AFE OC Dsg Configuration Table:

0X00	0.050 V	0x08	0.090 V	0x10	0.130 V	0x18	0.170 V
0x01	0.055 V	0x09	0.095 V	0x11	0.135 V	0x19	0.175 V
0x02	0.060 V	0x0a	0.100 V	0x12	0.140 V	0x1a	0.180 V
0x03	0.065 V	0x0b	0.105 V	0x13	0.145 V	0x1b	0.185 V
0x04	0.070 V	0x0c	0.110 V	0x14	0.150 V	0x1c	0.190 V
0x05	0.075 V	0x0d	0.115 V	0x15	0.155 V	0x1d	0.195 V
0x06	0.080 V	0x0e	0.120 V	0x16	0.160 V	0x1e	0.200 V
0x07	0.085 V	0x0f	0.125 V	0x17	0.165 V	0x1f	0.205 V

Normal Setting: Note that the maximum value for this register is 0x1F. Values above 0x1F will cause unpredictable results. This register is completely application specific. Its setting does not correspond to current, so a conversion using the application Sense Resistor value will be required in determining the proper setting for this register. Be sure that this value is sufficiently below OC (2^nd Tier) Dsg given the application sense resistor value.

AFE OC Dsg Time

This is the time after detection of an AFE OC Dsg fault before the Discharge FET will attempt to open. This trigger function is completely controlled by the bq29330. The setting of this register is in HEX and it is in milliseconds (See AFE OC Dsg). Please see the following Table for setting for this register.

Table 2: AFE OC Dsg Time Configuration Table

0x00	1 ms	0x04	9 ms	0x08	17 ms	0x0c	25 ms
0x01	3 ms	0x05	11 ms	0x09	19 ms	0x0d	27 ms
0x02	5 ms	0x06	13 ms	0x0a	21 ms	0x0e	29 ms
0x03	7 ms	0x07	15 ms	0x0b	23 ms	0x0f	31 ms

Normal Setting: Note that the maximum value for this register is 0x0F. Values above 0x0F will cause unpredictable results. This register is completely application specific. It should be set long enough to prevent false triggering of the [AOCD] in Safety Status but short enough to prevent damage to the battery pack.

AFE OC Dsg Recovery

Please see the Note at the beginning of the Current section for an important note about all AFE fault conditions.

AFE OC Dsg Recovery is one of several recovery methods used for AFE OC Dsg Fault. This value is used for either non-removable packs ([NR] in Operation Cfg B =1) or for removable packs that this function is configured ([AOCD] in Non-Removable Cfg). With either of these settings, AverageCurrent must rise above this value for Current Recovery Timer in seconds to clear the [AOCD] in Safety Status if it is set.

Normal Setting: Care should be taken when interpreting discharge descriptions in this document when interpreting the direction and magnitude of the currents because they are in the negative direction. This register is application dependent but is usually set high enough that it prevents quick oscillation in the Discharge FET. If set to low then the Discharge FET can oscillate with a frequency that is fast enough to still cause damage to the battery pack because the AverageCurrent gets above this value quickly.

AFE SC Chg Cfg

Please see the Note at the beginning of the Current section for an important note about all AFE fault conditions.

This register includes 2 settings. We will refer to these as AFE SC Chg and AFE SC Chg Time. This register displays in HEX using the EV Software. The most significant nibble (bits 4-7) sets the time for the AFE short circuit in the Charge direction fault detection time(AFE SC Chg Time). The least significant nibble (bits 0-3) set the threshold at which the bq29330 detects a AFE short circuit fault (AFE SC Chg). This is an extreme condition with settings for very large voltages and very short setting times for violent faults far above any of the other fault conditions because its intended purpose is to detect a short circuit condition before damage to the battery pack can occur. Also note that this setting is in units of Volts. It does not take into account the Sense resistor value. If an AFE short circuit in the Charge direction fault exists for AFE short circuit in the Charge direction fault detection time in microseconds then the Charge FET will open as controlled by the bq29330. This fault condition causes [SCC] to be set in Safety Status, and [TCA] to be set in Battery Status. It also causes Charging Current and Charging Voltage to be set to 0. Please see the following Table for settings for this register.

Table 3: AFE SC Chg Cfg Bit Description

7	6	5	4	3	2	1	0
SCCT3	SCCT2	SCCT1	SCCT0	SCCV3	SCCV2	SCCV1	SCCV0
AFE SC Chg Time				AFE SC Chg

Table 4: AFE SC Chg Cfg Least Significant Nibble (SCCV3-SCCV0)

0x00	0.100 V	0x04	0.200 V	0x08	0.300 V	0x0c	0.400 V
0x01	0.125 V	0x05	0.225 V	0x09	0.325 V	0x0d	0.425 V
0x02	0.150 V	0x06	0.250 V	0x0a	0.350 V	0x0e	0.450 V
0x03	0.175 V	0x07	0.275 V	0x0b	0.375 V	0x0f	0.475 V

Table 5: AFE SC Chg Cfg Most Significant Nibble (SCCT3-SCCT0)

0x00	0 µs	0x04	244 µs	0x08	488 µs	0x0c	732 µs
0x01	61 µs	0x05	305 µs	0x09	549 µs	0x0d	793 µs
0x02	122 µs	0x06	366 µs	0x0a	610 µs	0x0e	854 µs
0x03	183 µs	0x07	427 µs	0x0b	671 µs	0x0f	915 µs

Normal Setting: This register is completely application specific. Its setting does not correspond to current, so a conversion using the application Sense Resistor value will be required in determining the proper setting for this register. Be sure that this value is sufficiently above OC (2^nd Tier) Chg.

AFE SC Dsg Cfg

Please see the Note at the beginning of the Current section for an important note about all AFE fault conditions.

This register includes 2 settings. We will refer to these as AFE SC Dsg and AFE SC Dsg Time. This register displays in HEX using the EV Software. The most significant nibble (bits 4-7) sets the time for the AFE short circuit in the discharge direction fault detection time(AFE SC Dsg Time). The least significant nibble (bits 0-3) sets the threshold at which the bq29330 detects an AFE short circuit fault in the discharge direction (AFE SC Dsg). This is an extreme condition with settings for very large voltages and very short setting times for violent faults far above any of the other fault conditions because its intended purpose is to detect a short circuit condition before damage to the battery pack can occur. Also note that this setting is in units of Volts. It does not take into account the Sense resistor value. If an AFE short circuit in the Charge direction fault exists for AFE short circuit in the Charge direction fault detection time in microseconds then the Discharge FET will open as controlled by the bq29330. This fault condition causes [SCD] to be set in Safety Status, [XDSG] and [XDSGI] in Operation Status to be set., and [TDA] to be set in Battery Status. Please see the following Table for settings for this register.

Table 6: AFE SC Dsg Cfg Bit Description

7	6	5	4	3	2	1	0
SCDT3	SCDT2	SCDT1	SCDT0	SCDV3	SCDV2	SCDV1	SCDV0
AFE SC Dsg Time				AFE SC Dsg

Table 7: AFE SC Dsg Cfg Least Significant Nibble (SCDV3-SCDV0)

0x00	0.10 V	0x04	0.20 V	0x08	0.30 V	0x0c	0.40 V
0x01	0.125 V	0x05	0.225 V	0x09	0.325 V	0x0d	0.425 V
0x02	0.150 V	0x06	0.250 V	0x0a	0.350 V	0x0e	0.450 V
0x03	0.175 V	0x07	0.275 V	0x0b	0.375 V	0x0f	0.475 V

Table 8: AFE SC Dsg Cfg Most Significant Nibble (SCDT3-SCDT0)

0x00	0 µs	0x04	244 µs	0x08	488 µs	0x0c	732 µs
0x01	61 µs	0x05	305 µs	0x09	549 µs	0x0d	793 µs
0x02	122 µs	0x06	366 µs	0x0a	610 µs	0x0e	854 µs
0x03	183 µs	0x07	427 µs	0x0b	671 µs	0x0f	915 µs

AFE SC Recovery

Please see the Note at the beginning of the Current section for an important note about all AFE fault conditions.

AFE SC Recovery is one of several recovery methods used for either a charge or discharge AFE short circuit fault. This value is used for either non-removable packs ([NR] in Operation Cfg B =1) or for removable packs that this function is configured ([SCD] for discharge or [SCC] in charge in Non-Removable Cfg). With either of these settings, Average Current must rise above this value (for discharge fault) or below this value (for charge fault) for Current Recovery Timer in seconds to clear the [SCD] or [SCC] in Safety Status if either is set.

Normal Setting: Care should be taken when interpreting discharge descriptions in this document when interpreting the direction and magnitude of the currents because they are in the negative direction. This register is application dependent but is usually set very close to 0mA to prevent quick oscillation in the Charge/Discharge FET. If set to far from 0mA then the Charge/Discharge FET can oscillate with a frequency that is fast enough to still cause damage to the battery pack because the AverageCurrent gets within this threshold value too quickly.

Temperature

Over Temp Chg

When the pack temperature measured by Temperature rises up to or above this threshold while charging (Current > Chg Current Threshold) then the Over Temperature in charge direction (OTC) protection process is triggered and [OTC] is set in Safety Alert for OT Chg Time. If the OTC condition clears prior to the expiration of the OT Chg Time timer, then the [OTC] will be cleared in Safety Alert and no [OTC] will be set in Safety Status. If the condition does not clear then [OTC] will be set in Safety Status and if [OTFET] is set in Operation Cfg B the Charge FET will be opened. If [OTFET] is not set in Operation Cfg B then the Charge FET will not be opened by this fault. This fault condition causes [TCA] and [OTA] in Battery Status to be set. It also causes Charging Current and Charging Voltage to be set to 0.

OT Chg Time

See Over Temp Chg. This is a buffer time allotted for Over Temperature in the charge direction condition. The timer starts every time the [OTC] in Safety Alert is initially set. When the timer expires the bq20z90 forces an [OTC] in Safety Status and opens the Charge FET if enabled with [OTFET] in Operation Cfg B. If [OTC] in Safety Alert clears (fault condition clears) prior to the expiration of the OT Chg Time timer, then [OTC] in Safety Alert will be cleared and the OT Chg Time timer resets. Setting the OT Chg Time to 0 disables this function.

Normal Setting: This is usually set to 2 seconds which should be sufficient for most applications. Temperature is usually a slow acting condition that does not need high speed triggering. It should be set long enough to prevent false triggering of the [OTC] in Safety Status but short enough to prevent damage to the battery pack.

OT Chg Recovery

OT Chg Recovery is the temperature at which the battery will recover from an OT Temp Chg fault. This is the only recovery method for an OT Temp Chg fault.

Normal Setting: This register is application dependent but is usually set low enough below the fault condition temperature to prevent quick oscillation in the Charge FET if it was opened with the fault. The default is 50 degrees C which is 5 degree difference which should be sufficient to protect against this oscillation during the transition between conditions.

Over Temp Dsg

When the pack temperature measured by Temperature rises up to or above this threshold while discharging (Current < (-)(Dsg Current Threshold)) then the Over Temperature in discharge direction (OTD) protection process is triggered and [OTD] is set in Safety Alert for OT Dsg Time. If the OTD condition clears prior to the expiration of the OT Dsg Time timer, then the [OTD] will be cleared in Safety Alert and no [OTD] will be set in Safety Status. If the condition does not clear then [OTD] will be set in Safety Status and if [OTFET] is set in Operation Cfg B the Discharge FET will be opened. If [OTFET] is not set in Operation Cfg B then the Discharge FET will not be opened by this fault. This fault condition causes [TDA] and [OTA] in Battery Status to be set. It also causes Charging Current to be set to 0.

Normal Setting: This setting depends on the environment temperature and the battery specification. Verify the battery specification allows temperatures up to this setting while charging and verify these setting are sufficient for the application temperature. The default is 60 degrees C which should be sufficient for most LION applications. The reason why the default Over Temp Dsg setting is higher than the default Over Temp Chg is because LION can handle a higher temperature in the discharge direction than in the charge direction.

OT Dsg Time

See Over Temp Dsg. This is a buffer time allotted for Over Temperature in the discharge direction condition. The timer starts every time the [OTD] in Safety Alert is initially set. When the timer expires then the bq20z90 forces an [OTD] in Safety Status and opens the Discharge FET if enabled with [OTFET] in Operation Cfg B. If [OTD] in Safety Alert clears (fault condition clears) prior to the expiration of the OT Dsg Time timer, then [OTD] in Safety Alert will be cleared and the OT Dsg Time timer resets. Setting the OT Chg Time to 0 disables this function.

Normal Setting: This is usually set to 2 seconds which should be sufficient for most applications. Temperature is usually a slow acting condition that does not need high speed triggering. It should be set long enough to prevent false triggering of the [OTD] in Safety Status but short enough to prevent damage to the battery pack.

OT Dsg Recovery

OT Dsg Recovery is the temperature at which the battery will recover from an OT Temp Dsg fault. This is the only recovery method for an OT Temp Dsg fault.

Normal Setting: This register is application dependent but is usually set low enough below the fault condition temperature to prevent quick oscillation in the Discharge FET if it was opened with the fault. The default is 55 degrees C which is 5 degree difference which should be sufficient to protect against this oscillation during the transition between conditions.

Host Comm

Host Watchdog Timeout

This function is only active when the bq20z90 is in Normal Power Mode (not asleep or in shutdown mode). It is also disabled if set to 0. If there is no communication to the bq20z90 via the SMBus for Host Watchdog Timeout time in seconds then the bq20z90 reports [HWDG] set in Safety Status and opens the Charge, Discharge, and Pre-Charge FETs if enabled. This fault causes [TCA] and [TDA] in Battery Status to be set., and [XDSG] in Operation Status to be set. It also causes Charging Current and Charging Voltage to be set to 0. It is very difficult to monitor this function because any SMBus communication clears the fault condition. To monitor the function using SMBus then the SMBus command that is used to clear the fault condition must be an SMBus read of Safety Status. The [HWDG] flag will be set on this read. Then on the next read (if its within the Host Watchdog Timeout window) the [HWDG] flag will be cleared. The [HWDG] flag in Safety Alert as displayed in the EV Software is not used in this algorithm and serves no purpose.

Normal Setting: This is not a common function and its default setting is 0. This provides another method for turning off the FETs and preventing charge or discharge because the corresponding FETs are turned off when the fault occurs. It is also important to note that if the Host Watchdog Timeout is less than the Bus Low Time then the fault condition can occur prior to the Bus Low Timeout which usually occurs prior to going to sleep. Remember that this function is disabled when in sleep mode and the bq20z90 detects going to sleep mode as soon as the Bus Low Timeout expires. So if the Host Watchdog Timeout timer expires prior to detecting bus low then it will trigger this fault.

2^nd Level Safety

Voltage

SOV Threshold

This is a final level of protection. It is permanent. When the pack voltage measured by Voltage rises up to this threshold then the Safety Over Voltage (SOV) protection process is triggered. This process starts by setting [SOV] in PF Alert for SOV Time. If the SOV condition clears prior to the expiration of the SOV Time timer, then the [SOV] will be cleared in PF Alert and with no [SOV] being set in PF Status. If the SOV condition does not clear then [SOV] will be set in PF Status. This triggers many permanent protection features as listed here:

1. The Charge FET , Discharge FET, and Pre-Charge FET will all be opened if they were closed.

2. [TCA] and [TDA] in Battery Status will be set

3. Charging Current and Charging Voltage will be set to 0.

4. Data Flash Writes will be disabled

5. if [XSOV] in Permanent Fail Cfg then

· 0x3672 is programmed to the Fuse Flag.

· The Safety Output pins will be activated which is intended to blow a fuse.

6. All the remaining data flash registers in the PF Status class will be filled with backups of many of the SBS data set registers and AFE data.

Normal Setting: This is the last level of protection and should be set to a voltage above the POV Threshold. This is meant to be a permanent condition and it is recommended that [XSOV] be set in Permanent Fail Cfg with a fuse designed into the application. There is a clear function for this condition but it is only intended to be used during the development process.

SOV Time

See SOV Threshold. This is a buffer time allotted for an SOV condition. The timer starts after [SOV] is set in PF Alert. When it expires then the bq20z90 forces an [SOV] in PF Status and opens the Charge FET Discharge FET and Pre-Charge FET if they were on. If the condition clears prior to the expiration of the SOV Time timer then [SOV] will be cleared in PF Alert, and the SOV Time timer resets without setting [SOV] in PF Status..If SOV Time is 0 then the SOV Threshold function is disabled

Normal Setting: This register defaults to 0 only for the development process. This function should not be left at 0. It is highly recommended to enable this function in the final application. The most common values for this register are between 2-5 seconds.

Cell Imbalance Current

This is part of the safety cell imbalance detection algorithm. There are 4 registers that go together to make up this algorithm. Cell Imbalance Current is the value that Current must be below for the entire Battery Rest Time before Cell Imbalance detection is enabled. In other words, the bq20z90 will not start trying to detect a cell imbalance for this safety algorithm until the battery Current has been below this Cell Imbalance Current for at least Battery Rest Time.

Normal Setting: This register should be set relatively low to ensure the battery is completely relaxed when this algorithm is enabled. This Safety algorithm if triggered is permanent and renders the battery useless so it is imperative that all data is valid prior to activation. The default setting is 5mA which should be sufficient for most applications.

Cell Imbalance Fail Voltage

This is part of the safety cell imbalance detection algorithm. For the purpose of this description:

Cell Voltage H = the highest SBS cell voltage

Cell Voltage L = the lowest SBS cell voltage

Delta Cell Voltage = Cell Voltage H - Cell Voltage L

There are 4 registers that go together to make up this algorithm. After the Battery Rest Time portion of the Cell Imbalance algorithm has passed the test criteria (see Battery Rest Time and Cell Imbalance Current) then if Delta Cell Voltage is greater than the Cell Imbalance Fail Voltage in millivolts then the Cell Imbalance Fail Voltage protection process is triggered. This process starts by setting [CIM] in PF Alert for Cell Imbalance Time. If the cell imbalance condition clears prior to the expiration of the Cell Imbalance Time timer, then the [CIM] will be cleared in PF Alert with no [CIM] being set in PF Status. If the cell imbalance condition does not clear then [CIM] will be set in PF Status. This triggers many permanent protection features as listed here:

1. The Charge FET , Discharge FET, and Pre-Charge FET will all be opened if they were closed.

2. [TCA] and [TDA] in Battery Status will be set

3. Charging Current and Charging Voltage will be set to 0.

4. Data Flash writes will be disabled

5. if [XCIM] in Permanent Fail Cfg then

· 0x3672 is programmed to the Fuse Flag.

· The Safety Output pins will be activated which is intended to blow a fuse.

6. All the remaining data flash registers in the PF Status class will be filled with backups of many of the SBS data set registers and AFE data.

Normal Setting: This is the last level of protection and should be set to a voltage high enough to prevent any possibility of false triggering because in application this is irreversible. This is meant to be a permanent condition and it is recommended that [XCIM] be set in Permanent Fail Cfg with a fuse designed into the application. There is a clear function for this condition but it is only intended to be used during the development process.

Cell Imbalance Time

See Cell Imbalance Fail Voltage. This is a buffer time allotted for a cell imbalance safety condition. The timer starts after the Battery Rest Time has expired with current below the Cell Imbalance Current and Delta Cell Voltage (see Cell Imbalance Fail Voltage) is above the Cell Imbalance Fail Voltage. When the Cell Imbalance Time timer starts [CIM] is set in PF Alert. When the timer expires then the bq20z90 forces a [CIM] in PF Status and opens the Charge FET Discharge FET and Pre-Charge FET if they were on. If the condition clears prior to the expiration of the Cell Imbalance Time timer then [CIM] will be cleared in PF Alert, and the Cell Imbalance Time timer resets without setting [CIM] in PF Status. The Cell Imbalance Fail Voltage function is disabled with Cell Imbalance Time equal to 0 or Battery Rest Time set to 0.

Normal Setting: This register defaults to 0. This disables the function. It is recommended that this function be enabled and the [XCIM] be enabled in Permanent Failure Cfg to protect against a potentially dangerous condition. Battery Rest Time will help prevent false triggering of this condition so a good setting for Cell imbalance Time is 5 seconds. This gives several readings to ensure that the condition does exist.

Battery Rest Time

See Cell Imbalance Current. Battery Rest Time is the time in seconds that the battery Current must be below the Cell Imbalance Current for before Cell Imbalance detection is enabled. In other words, the bq20z90 will not start trying to detect a cell imbalance for this safety algorithm until the battery Current has been below Cell Imbalance Current for at least Battery Rest Time. The Cell Imbalance Fail Voltage function is disabled with Cell Imbalance Time equal to 0 or Battery Rest Time set to 0.

Normal Setting: This register should be set for a relatively long time period to ensure the battery is completely relaxed when this algorithm is enabled. This safety algorithm, if triggered, is permanent and renders the battery useless so it is imperative that all data is valid prior to activation. The default setting is 1800 seconds which should be sufficient for most applications.

PFIN Detect Time

This is a buffer time allotted for an /PFIN safety condition. The timer PFIN Detect Time timer starts after the /PFIN input pin has been set logic low by some external device (usually an external protector) which forces the [PFIN] is set in PF Alert. When it expires then the bq20z90 forces an [PFIN] in PF Status and opens the Charge FET Discharge FET and Pre-Charge FET if they were on. If the condition clears prior to the expiration of the PFIN Detect Time timer then [PFIN] will be cleared in PF Alert, and the PFIN Detect Time timer resets without setting [PFIN] in PF Status. If PFIN Detect Time is 0 then this function is disabled. This fault condition triggers many permanent protection features as listed here:

1. The Charge FET , Discharge FET, and Pre-Charge FET will all be opened if they were closed.

2. [TCA] and [TDA] in Battery Status will be set

3. Charging Current and Charging Voltage will be set to 0.

4. Data Flash writes will be disabled

5. if [XPFIN] in Permanent Fail Cfg then

· 0x3672 is programmed to the Fuse Flag.

· The Safety Output pins will be activated which is intended to blow a fuse.

6. All the remaining data flash registers in the PF Status class will be filled with backups of many of the SBS data set registers and AFE data.

Normal Setting: If this fault condition occurs then it is because an external device has already triggered a fault that should be non recoverable. This is meant to be a permanent condition and it is recommended that [XPFIN] be set in Permanent Fail Cfg. Then if a fault happens and and external device sets the /PFIN input low, if for some reason the fuse does not blow then the bq20z90 will also attempt to blow the fuse (SAFE pin is set high and /SAFE pin is driven low on the bq20z90). There is a clear function for this condition but it is only intended to be used during the development process. The default for this function is 0. If the /PFIN input is not used then this should be disabled. It is highly recommended that this be used and that [XPFIN] be set to ensure safe operation.

Current

SOC Chg

SOC Chg is a final level of current protection from the bq20z90. This is not related to the 3^rd level (AFE) protection because that is a fast acting protection. This is very slow relatively speaking. It is also intened to be permanent. When the charge current as measured by Current rises up to or above this threshold then the Safety Over Current in the Charge direction (SOCC) protection process is triggered. This process starts by setting [SOCC] in PF Alert for SOC Chg Time. If the SOCC condition clears prior to the expiration of the SOC Chg Time timer, then the [SOCC] will be cleared in PF Alert and with no [SOCC] being set in PF Status. If the SOC condition does not clear then [SOCC] will be set in PF Status. This triggers many permanent protection features as listed here:

1. The Charge FET , Discharge FET, and Pre-Charge FET will all be opened if they were closed.

2. [TCA] and [TDA] in Battery Status will be set

3. Charging Current and Charging Voltage will be set to 0.

4. Data Flash Writes will be disabled

5. if [XSOCC] in Permanent Fail Cfg then

· 0x3672 is programmed to the Fuse Flag.

· The Safety Output pins will be activated which is intended to blow a fuse.

6. All the remaining data flash registers in the PF Status class will be filled with backups of many of the SBS data set registers and AFE data.

Normal Setting: This is the last level of protection and should be set to a current above OC(2^ndTier) Chg. It is not necessarily required to set above AFE OC Chg because that is a fast acting fault condition meant for high current spike detection. This is meant to be a permanent condition and it is recommended that [XSOCC] be set in Permanent Fail Cfg with a fuse designed into the application. There is a clear function for this condition but it is only intended to be used during the development process.

SOC Chg Time

See SOC Chg. This is a buffer time allotted for an SOCC condition. The timer starts after [SOCC] is set in PF Alert. When it expires then the bq20z90 forces an [SOCC] in PF Status and opens the Charge FET Discharge FET and Pre-Charge FET if they were on. If the condition clears prior to the expiration of the SOC Chg Time timer then [SOCC] will be cleared in PF Alert, and the SOC Chg Time timer resets without setting [SOCC] in PF Status..If SOC Chg Time is 0 then this function is disabled

SOC Dsg

SOC Dsg is a final level of current protection from the bq20z90. This is not related to the 3^rd level (AFE) protection because that is a fast acting protection. This is very slow relatively speaking. It is also intended to be permanent. When the discharge current as measured by Current falls down to or below a negative of this threshold ( - (SOC Dsg)) then the Safety Over Current in the discharge direction (SOCD) protection process is triggered. This process starts by setting [SOCD] in PF Alert for SOC Dsg Time. If the SOCC condition clears prior to the expiration of the SOC Dsg Time timer, then the [SOCD] will be cleared in PF Alert and with no [SOCC] being set in PF Status. If the SOC condition does not clear then [SOCD] will be set in PF Status. This triggers many permanent protection features as listed here:

1. The Charge FET , Discharge FET, and Pre-Charge FET will all be opened if they were closed.

2. [TCA] and [TDA] in Battery Status will be set

3. Charging Current and Charging Voltage will be set to 0.

4. Data Flash Writes will be disabled

5. if [XSOCD] in Permanent Fail Cfg then

· 0x3672 is programmed to the Fuse Flag.

· The Safety Output pins will be activated which is intended to blow a fuse.

6. All the remaining data flash registers in the PF Status class will be filled with backups of many of the SBS data set registers and AFE data.

Normal Setting: Care should be taken when interpreting discharge descriptions in this document when interpreting the direction and magnitude of the currents because they are in the negative direction. This is the last level of protection and should be set to a current below OC(2^ndTier) Dsg. It is not necessarily required to set above AFE OC Dsg because that is a fast acting fault condition meant for high current spike detection. This is meant to be a permanent condition and it is recommended that [XSOCD] be set in Permanent Fail Cfg with a fuse designed into the application. There is a clear function for this condition but it is only intended to be used during the development process.

SOC Dsg Time

See SOC Dsg. This is a buffer time allotted for an SOCD condition. The timer starts after [SOCD] is set in PF Alert. When it expires then the bq20z90 forces an [SOCD] in PF Status and opens the Charge FET Discharge FET and Pre-Charge FET if they were on. If the condition clears prior to the expiration of the SOC Dsg Time timer then [SOCD] will be cleared in PF Alert, and the SOC Dsg Time timer resets without setting [SOCD] in PF Status..If SOC Dsg Time is 0 then this function is disabled

Temperature

SOT Chg

SOT Chg is a final level of temperature protection from the bq20z90. This fault condition is intended to be permanent. When the temperature as measured by Temperature rises up to or above this threshold while charging ([DSG] cleared in Battery Status) then the Safety Over Temperature in the Charge direction (SOTC) protection process is triggered. This process starts by setting [SOTC] in PF Alert for SOT Chg Time. If the SOTC condition clears prior to the expiration of the SOT Chg Time timer, then the [SOTC] will be cleared in PF Alert and with no [SOTC] being set in PF Status. If the SOT condition does not clear then [SOTC] will be set in PF Status. This triggers many permanent protection features as listed here:

1. The Charge FET , Discharge FET, and Pre-Charge FET will all be opened if they were closed.

2. [TCA] and [TDA] in Battery Status will be set

3. Charging Current and Charging Voltage will be set to 0.

4. Data Flash Writes will be disabled

5. if [XSOTC] in Permanent Fail Cfg then

· 0x3672 is programmed to the Fuse Flag.

· The Safety Output pins will be activated which is intended to blow a fuse.

6. All the remaining data flash registers in the PF Status class will be filled with backups of many of the SBS data set registers and AFE data.

Normal Setting: This is the last level of protection and should be set to a temperature above Over Temp Chg. This is meant to be a permanent condition and it is recommended that [XSOTC] be set in Permanent Fail Cfg with a fuse designed into the application. There is a clear function for this condition but it is only intended to be used during the development process.

SOT Chg Time

See SOT Chg. This is a buffer time allotted for a Safety Over Temperature Condition. The timer starts after [SOTC] is set in PF Alert. When it expires then the bq20z90 forces an [SOTC] in PF Status and opens the Charge FET Discharge FET and Pre-Charge FET if they were on. If the condition clears prior to the expiration of the SOT Chg Time timer then [SOTC] will be cleared in PF Alert, and the SOT Chg Time timer resets without setting [SOTC] in PF Status..If SOT Chg Time is 0 then this function is disabled

SOT Dsg

SOT Dsg is a final level of temperature protection from the bq20z90. This fault condition is intended to be permanent. When the temperature as measured by Temperature rises up to or above this threshold while discharging ([DSG] set in Battery Status) then the Safety Over Temperature in the discharge direction (SOTD) protection process is triggered. This process starts by setting [SOTD] in PF Alert for SOT Dsg Time. If the SOTD condition clears prior to the expiration of the SOT Dsg Time timer, then the [SOTD] will be cleared in PF Alert and with no [SOTD] being set in PF Status. If the SOT condition does not clear then [SOTD] will be set in PF Status. This triggers many permanent protection features as listed here:

1. The Charge FET , Discharge FET, and Pre-Charge FET will all be opened if they were closed.

2. [TCA] and [TDA] in Battery Status will be set

3. Charging Current and Charging Voltage will be set to 0.

4. Data Flash Writes will be disabled

5. if [XSOTD] in Permanent Fail Cfg then

· 0x3672 is programmed to the Fuse Flag.

· The Safety Output pins will be activated which is intended to blow a fuse.

6. All the remaining data flash registers in the PF Status class will be filled with backups of many of the SBS data set registers and AFE data.

SOT Dsg Time

See SOT Dsg. This is a buffer time allotted for a Safety Over Temperature Condition. The timer starts after [SOTD] is set in PF Alert. When it expires then the bq20z90 forces an [SOTD] in PF Status and opens the Charge FET Discharge FET and Pre-Charge FET if they were on. If the condition clears prior to the expiration of the SOT Dsg Time timer then [SOTD] will be cleared in PF Alert, and the SOT Dsg Time timer resets without setting [SOTD] in PF Status..If SOT Dsg Time is 0 then this function is disabled

Open Thermistor

Setting Open Thermistor Time to 0 disables this function. The Open Thermistor register is part of a thermistor circuit fault protection algorithm in the bq20z90 that detects an open circuit in the thermistor circuit because Temperature will reach impossible values due to open circuit ADC readings.. This fault condition is intended to be permanent. When the temperature as measured by Temperature falls to or below this threshold then the Open Thermistor protection process is triggered. This process starts by setting [OTS] in PF Alert for Open Thermistor Time. If the OTS condition clears prior to the expiration of the Open Thermistor Time timer, then the [OTS] will be cleared in PF Alert and with no [SOTS] being set in PF Status. If the OTS condition does not clear then [OTS] will be set in PF Status. This triggers many permanent protection features as listed here:

1. The Charge FET , Discharge FET, and Pre-Charge FET will all be opened if they were closed.

2. [TCA] and [TDA] in Battery Status will be set

3. Charging Current and Charging Voltage will be set to 0.

4. Data Flash Writes will be disabled

5. if [OTS] in Permanent Fail Cfg then

· 0x3672 is programmed to the Fuse Flag.

· The Safety Output pins will be activated which is intended to blow a fuse.

6. All the remaining data flash registers in the PF Status class will be filled with backups of many of the SBS data set registers and AFE data.

Normal Setting: This function is a good safety feature that is particularly useful in detecting thermistors that have come loose from the Gas Gauge PCB during the assembly process or if the wire of a thermistor comes lose from vibration. The value in this register should not need to be changed. This is meant to be a permanent condition and it is recommended that [XOTS] be set in Permanent Fail Cfg with a fuse designed into the application. There is a clear function for this condition but it is only intended to be used during the development process.

Open Thermistor Time

See Open Thermistor. This is a buffer time allotted for an Open Thermistor Condition. The timer starts after [OTS] is set in PF Alert. When it expires then the bq20z90 forces [OTS] set in PF Status and opens the Charge FET, Discharge FET, and Pre-Charge FET if they were on. If the condition clears prior to the expiration of the Open Thermistor Time timer then [OTS] will be cleared in PF Alert, and the Open Thermistor Time timer resets without setting [OTS] in PF Status..If Open Thermistor Time is 0 then the Open Thermistor function is disabled

FET Verification

FET Fail Limit

FET Fail Limit register is part of a FET circuit fault protection algorithm in the bq20z90 that detects potentially hazardous FET circuit damage. This fault condition is intended to be permanent and has 2 possible trigger functions that are listed separately here to help prevent confusion.

A) If the Charge and Pre-Charge FET (if enabled) have been commanded to be off for any reason by either the bq20z90 or the bq29330 (any AFE fault condition) and charge current as measured by Current still exists which is greater than FET Fail Limit in milliamps then the FET Fail Limit protection process is triggered. This process starts by setting [CFETF] in PF Alert for FET Fail Time. If the [CFETF] condition clears prior to the expiration of the FET Fail Time timer, then the [CFETF] will be cleared in PF Alert and with no [CFETF] being set in PF Status. If the [CFETF] condition does not clear then [CFETF] will be set in PF Status. This triggers many permanent protection features as listed below:

B) If the discharge FET has been commanded to be off for any reason by either the bq20z90 or the bq29330 (any AFE fault condition) and discharge current as measured by Current still exists which is less than or equal to (-) FET Fail Limit in milliamps then the FET Fail Limit protection process is triggered. This process starts by setting [DFETF] in PF Alert for FET Fail Time. If the [DFETF] condition clears prior to the expiration of the FET Fail Time timer, then the [DFETF] will be cleared in PF Alert and with no [DFETF] being set in PF Status. If the [DFETF] condition does not clear then [DFETF] will be set in PF Status. This triggers many permanent protection features as listed below:

Each of the above triggers (A. and B.) cause the following permanent protection features as listed below:

1. The Charge FET , Discharge FET, and Pre-Charge FET will all be opened if they were closed.

2. [TCA] and [TDA] in Battery Status will be set

3. Charging Current and Charging Voltage will be set to 0.

4. Data Flash Writes will be disabled

5. if A) and [XCFETF] or B) and [XDFETF] in Permanent Fail Cfg then

· 0x3672 is programmed to the Fuse Flag.

· The Safety Output pins will be activated which is intended to blow a fuse.

6. All the remaining data flash registers in the PF Status class will be filled with backups of many of the SBS data set registers and AFE data.

Normal Setting: The Charge and Discharge FETs arguably have more stress than any other component on the gas gauge PCB. This function is an excellent safety feature to help protect against the possibility of a shorted FET that could be potentially hazardous. The default value in this register should be sufficient for most applications. This is meant to be a permanent condition and it is recommended that [XCFETF] and [XDFETF] both be set in Permanent Fail Cfg with a fuse designed into the application. There is a clear function for this condition but it is only intended to be used during the development process.

FET Fail Time

See FET Fail Limit. This is a buffer time allotted for the FET Fail Limit condition. The timer starts after either [CFETF] or [DFETF] set in PF Alert. When the timer expires then the bq20z90 forces the associated flag (either [CFETF] or [DFETF]) in PF Status and opens the Charge FET Discharge FET and Pre-Charge FET if they were on. If the condition clears prior to the expiration of the FET Fail Time timer then the associated flag (either [CFETF] or [DFETF]) will be cleared in PF Alert, and the FET Fail Time timer resets without setting the associated flag (either [CFETF] or [DFETF]) in PF Status..If FET Fail Time is 0 then this function is disabled

AFE Verification

AFE Check Time

Every AFE Check Time in seconds the bq20z90 will read all the bq29330 registers through the I2C port that is shared between the 2 parts and compare the static register read results to the AFE data in the bq20z90's Data Flash. If they do not match then the bq20z90 will attempt to repair the corruption and then increment an internal counter (for the sake of this document this will be referred to as AFE_P Fail Counter) which triggers the periodic AFE_P Fail protection process. This process starts by setting [AFE_P] in PF Alert. As long as the AFE_P Fail Counter stays below the AFE Fail Limit and above 0, [AFE_P] stays set in PF Alert. See AFE Recovery Time for a recovery description. If AFE Check Time is set to 0 then the periodic AFE verification (AFE_P) is completely disabled.

Normal Setting: Setting AFE Check Time to 0 only disables the AFE_P verification function. It does not disable the AFE_C verification function as described in AFE Fail Limit. AFE Check Time set to 0 is acceptable because there is still the AFE_C verification process. If, however, AFE Check Time is used, set above 20 seconds since the periodic test does not need to be done very often to ensure correct function.

AFE Fail Limit

There are 2 AFE safety features that use this register. They will be separated here to help prevent confusion.

A) The first safety feature is a continuation of AFE Check Time. If the AFE_P Fail Counter (as described above) reaches the AFE Fail Limit then [AFE_P] will be cleared in PF Alert and then set in PF Status. Setting AFE Fail Limit to 0 does not disable the periodic AFE verification (AFE_P). (See AFE Check Time)

B) The second safety feature is not associated with AFE Check Time. Anytime a communication with the bq29330 is performed over the I2C bus that is not part of the periodic check described in AFE Check Time then a different internal counter (for the sake of this document this will be referred to as AFE_C Fail Counter) will increment. When the AFE_C Fail Counter increments the AFE_C Fail protection process is triggered. This process starts by setting [AFE_C] in PF Alert. As long as the AFE_C Fail Counter stays below the AFE Fail Limit and above 0 then [AFE_C] stays set in PF Alert. See AFE Recovery Time for a recovery description. If the AFE_C Fail Counter reaches the AFE Fail Limit then [AFE_C] will be cleared in PF Alert and then set in PF Status. Setting AFE Fail Limit to 0 disables the AFE_C Fail protection process.

Each of the above triggers (A. and B.) cause the following permanent protection features as listed below:

1. The Charge FET , Discharge FET, and Pre-Charge FET will all be opened if they were closed.

2. [TCA] and [TDA] in Battery Status will be set

3. Charging Current and Charging Voltage will be set to 0.

4. Data Flash Writes will be disabled

5. if A. [XAFE_P] set or if B and [XAFE_C] set in Permanent Fail Cfg then

· 0x3672 is programmed to the Fuse Flag.

· The Safety Output pins will be activated which is intended to blow a fuse.

6. All the remaining data flash registers in the PF Status class will be filled with backups of many of the SBS data set registers and AFE data.

Normal Setting: AFE Fail Limit defaults to 10. It is very important to note that setting AFE Fail Limit to 0 only disables the AFE_C functions. AFE_P functions are not disabled with AFE Fail Limit set to 0. This would result in [AFE_P] flag getting set in PF Status on the first failure which is not recommended. The default of 10 should be appropriate for most applications. This gives sufficient buffer for ESD, resets and other unknown failures that should be recoverable. .

AFE Fail Recovery Time

See AFE Check Time and AFE Fail Limit. AFE Fail Recovery Time function works independently with each of the AFE counters described above (AFE_C Fail Counter and AFE_P Fail Counter). While [AFE_C] or [AFE_P] is set in PF_Alert, every AFE Fail Recover Time period in seconds AFE_C Fail Counter and/or AFE_P Fail Counter will be decremented by 1 until each reaches 0. As soon as they are decremented back to 0 their associated flags( [AFE_C] or [AFE_P]) will be cleared in PF Alert and the fault process is reversed.

Normal Setting: It is recommended to set this register less than AFE Check Time so that at least one recovery process can occur between periodic checks.

AFE Init Retry Limit

This description is only for reference. The bq20z90 uses its internal ADC to measure initial AFE (bq29330) offsets and gain values on every reset. The quality of these readings are critical to the accuracy of the voltage as displayed by Voltage and Cell Voltage(All). Poor initial offset and gain readings can throw the voltage displayed off dramatically and it can take several minutes to reacquire accurate readings due to an internal slow responding digital filter in the bq20z90 firmware. With the importance of the quality of these initial readings, the bq20z90 will take 2 successive readings of these offsets and gain values and compare them. If the comparison fails to meet the criteria as set by AFE Init Limit (see below), then the bq20z90 will retry this procedure AFE Init Retry Limit times before it will force an AFE_C permanent failure. This triggers many permanent protection features as listed here:

1. The Charge FET , Discharge FET, and Pre-Charge FET will all be opened if they were closed.

2. [TCA] and [TDA] in Battery Status will be set

3. Charging Current and Charging Voltage will be set to 0.

4. Data Flash Writes will be disabled

5. if [XSOV] in Permanent Fail Cfg then

1. 0x3672 is programmed to the Fuse Flag.

2. The Safety Output pins will be activated which is intended to blow a fuse.

6. All the remaining data flash registers in the PF Status class will be filled with backups of many of the SBS data set registers and AFE data.

Normal Setting: It is not recommended to modify this register, however if unexplained AFE_C failures occur after resets then this might be the function that caused the failure. Increasing this value slightly can help but the problem is probably a noisy environment due to switching from radio frequencies or PCB layout.

AFE Init Limit

This description is only for reference. This data flash location should never be modified. The bq20z90 uses its internal ADC to measure initial AFE (bq29330) offsets and gain values on every reset. The quality of these readings are critical to the accuracy of the voltage as displayed by Voltage and Cell Voltage(All). Poor initial offset and gain readings can throw the voltage displayed off dramatically and it can take several minutes to reacquire accurate readings due to an internal slow responding digital filter in the bq20z90 firmware. With the importance of the quality of these initial readings, the bq20z90 will take multiple readings (see AFE Init Retry Limit above) of these offsets and gain values and compare them. The AFE Init Limit is the maximum difference in successive respective offset and gain value comparisons allowed for the values to be declared accurate. In other words, (Gain reading 2 - Gain reading 1) must be below AFE Init Limit, (Offset reading 2- Offset reading 1) must be below AFE Init Limit etc.

Normal Setting: This register is in a reserved unit format and therefore it is highly recommended this value not be modified. It should be acceptable for most applications except for very poor PCB layouts or the most noisy environments that could dramatically affect voltage measurements. If this is the case then contact Texas Instruments on what value to put in this register.

Fuse Verification

Fuse Fail Limit

Fuse Fail Limit register is part of a Fuse circuit fault protection algorithm in the bq20z90 that detects potentially hazardous conditions. The Fuse Fail Limit is used in both the charge and the discharge direction. If the Fuse Flag has been set to 0x3672 (SAFE pin is set high and /SAFE pin is driven low on the bq20z90) and the current as measured by Current still exists which is greater than Fuse Fail Limit in milliamps, or less than a (-) Fuse Fail Limit then the Fuse Fail Limit protection process is triggered. This process starts by setting [FBF] in PF Alert for Fuse Fail Time. If the [FBF] condition clears prior to the expiration of the Fuse Fail Time timer, then the [FBF] will be cleared in PF Alert and with no [FBF] being set in PF Status. If the [FBF] condition does not clear then [FBF] will be set in PF Status. Of course this would cause the normal Permanent Failure conditions except that with this function they will already be set because this function only works with an existing permanent failure.

Normal Setting: The purpose of this function is for reporting and retaining the fact that the fuse was supposed to blow but did not. The fact that it causes an [FBF] flag being set in PF Status serves no purpose except for this fact being recorded for future data retrieval since the fuse was already supposed to be blown. The hope is that the bq20z90 will survive this potentially violent failure enough to be sent to the factory so that the Data Flash that this information was stored in can be read and analyzed to determine the cause of the failure. If the bq20z90 does not survive then this information is useless

Fuse Fail Time

See Fuse Fail Limit. This is a buffer time allotted for the Fuse Fail Limit condition. The timer starts after [FBF] is set in PF Alert. When the timer expires then the bq20z90 forces [FBF] in PF Status If the condition clears prior to the expiration of the Fuse Fail Time timer then [FBF] will be cleared in PF Alert and the Fuse Fail Time timer resets without setting [FBF] in PF Status..If Fuse Fail Time is 0 then this function is disabled

Normal Setting: This register defaults to 0 only for the development process. The only purpose of this function is to report that a fuse was instructed to blow and did not. Most likely the bq20z90 will not survive to report this information but it is possible. This would be a very uncommon event unless the fuse blow circuit design is faulty. The most common values for this register are between 2-5 seconds.

Charge Control

Charge Inhibit Config

Chg Inhibit Temp Low

When the pack temperature measured by Temperature falls to or below this threshold while discharging ([DSG] flag set in Battery Status) the Charge Inhibit Mode is triggered. This causes Charging Current and Charging Voltage to be set to 0, [XCHG] gets set in Charging Status, and if [CHGIN] set in Operation Cfg B then Charge FET is turned off and/or the Pre-Charge FET is turned off if it was on. There are 2 primary possible recoveries to this mode

1. The primary recovery is if Temperature rises above (Charge Inhibit Temp Low + Temp Hys).

2. The condition can also be cleared with pack removal and re-insertion (/PRES transition) if [NR] is cleared in Operation Cfg B. If the condition still exists then the inhibit mode will be reactivated with [DSG] flag set in Battery Status

With either of these recoveries [XCHG] gets cleared in Charging Status. This will enable the charging process to initiate.

Normal Setting: The purpose of this low inhibit temperature is not to suspend charging but to prevent it from starting when the conditions are not acceptable for charging to prevent damage to the pack. The default for this is 0 degrees and can be modified to fit the application.

Chg Inhibit Temp High

When the pack temperature measured by Temperature rises to or above this threshold while discharging ([DSG] flag set in Battery Status) the Charge Inhibit Mode is triggered. This causes Charging Current and Charging Voltage to be set to 0, [XCHG] gets set in Charging Status, and if [CHGIN] set in Operation Cfg B then Charge FET is turned off and/or the Pre-Charge FET is turned off if it was on. There are 2 primary possible recoveries to this mode

1. The primary recovery is if Temperature falls below (Charge Inhibit Temp High - Temp Hys).

With either of these recoveries [XCHG] gets cleared in Charging Status. This will enable the charging process to initiate.

Normal Setting: The purpose of this high inhibit temperature is not to suspend charging but to prevent it from starting when the conditions are not acceptable for charging to prevent damage to the pack. The default for this is 45 degrees. Notice that this is less than the default charge suspend mode(see Suspend High Temp).

Temp Hys

This register works with both Chg Inhibit High and Chg Inhibit Low in the recovery process.

1. With charge inhibited resulting from a high temperature and if Temperature falls below(Charge Inhibit Temp High - Temp Hys) then the [XCHG] gets cleared in Charging Status. This will enable the charging process to initiate.

2. With charge inhibited resulting from low temperature and if Temperature rises above(Charge Inhibit Temp Low + Temp Hys) then the [XCHG] gets cleared in Charging Status. This will enable the charging process to initiate.

Normal Setting: this register defaults to 1 degree C. This is probably a little low for a hysteresis value. This register should most likely be set at least 2 to 3 degrees to prevent oscillation of this condition.

Pre-Charge Config

Pre-chg Current

This is the current that the bq20z90 will report in the Charging Current register when the bq20z90 is in Pre-Charge mode (see Pre-Chg Temperature and Pre-Chg Voltage). This current is also broadcast to a smart charger when bq20z90 master mode broadcasts are enabled ([BCAST] set in Operation Cfg B ). When in Pre-Charge Mode (Charging Current = Pre-chg Current), [PCHG] will be set in Charging Status and then the appropriate charging FET is enabled as set with [ZVCHG1] and [ZVCHG0] in Operation Cfg A.

Table 9: Fet Control Bits in Operation Cfg A

ZVCHG1	ZVCHG0	FET Used
0	0	ZVCHG
0	1	CHG
1	0	OD
1	1	No Action

There are 3 primary recoveries from Pre-Charge mode

1. Independent of what method (Pr-Chg Voltage or Pre-Chg Temperature) caused the Pre-Charge Mode:

A) Cell Voltage (All) must be above Recovery Voltage

B) Temperature must be above (Pre Chg Temperature + Temp Hys)

Either of these cause the bq20z90 to enter Fast Charge Mode (See Fast Charge Current)

2. Pack removal and re-insertion (/PRES transition) if [NR] is cleared in Operation Cfg B. If the condition still exists then the inhibit mode will be reactivated with any of the Pre-Charge criteria.

3. This is considered a recovery but it is really a transition from one mode to another. A charge suspend condition (see Suspend High Temp and Suspend Low Temp) which forces the bq20z90 to transition from Pre-Charge Mode to Charge Suspend Mode.

Normal Setting: This register is application dependent. If a Pre-Charge FET and a current limiting resistor is used to control the current allowed into the battery during Pre-Charge Mode ([ZVCHG1] and [ZVCHG1] both equal 0) then this register accuracy is not as important as if it were used for a smart charger that will initiate a current equal to the requested Pre-Charge current. It is important to note that use of the OD pin is not recommended because it does not have limiting circuitry to ensure “hard” on control for a Zero Volt charging condition. It is always recommended to use a Pre-Charge FET or smart charger that supports low Pre-Charge currents.

Pre-chg Temp

See Pre-chg Current. With either the Pre-chg Voltage or the Pre-chg Temp criteria being met then the bq20z90 triggers Pre-Charge Mode. With Temperature falling to or below Pre-chg Temp but above Charge Inhibit Temp Low then the bq20z90 will enter Pre-Charge Mode (see Pre-chg Current).

Normal Setting: ensure that this register is above the Charge Inhibit Temp Low . This will also ensure that Pre-Chg Temperature is above the charge suspend temperature because charge suspend should be below charge inhibit. (See Charge Inhibit Temp Low and Charge Suspend Temp Low). At cold temperatures lower currents are better for the battery cells. It is always recommended to use a Pre-Charge FET or smart charger that supports low Pre-Charge currents.

Pre-chg Voltage

See Pre-Charge Current. With either the Pre-chg Voltage or the Pre-chg Temperature criteria being met then the bq20z90 triggers Pre-Charge Mode. With Cell Voltage (Any) falling to or below Pre-chg Voltage then the bq20z90 will enter Pre-Charge Mode (see Pre-chg Current).

Normal Setting: ensure that this voltage is set per the battery cell specifications. Setting this value too high hurts nothing (except slower charging from empty) but setting this value too low can damage cells. This register gives the cells a chance for a Pre-Charge voltage to bring them up to normal charging voltage slowly before hitting them with a fast current. It is always recommended to use a Pre-Charge FET or smart charger that supports low Pre-Charge currents.

Recovery Voltage

If the battery pack is in Pre-Charge mode due to Cell Voltage (Any) falling to or below Pre-Chg Voltage then it will exit Pre-Charge mode and enter Fast Charge Mode (see Fast Charge Current) when Cell Voltage (All) rises above Recovery Voltage. This is one of 3 primary recovery methods for a battery pack in Pre-Charge mode.

Normal Setting: This is battery cell dependent. ensure that this is set per the battery cell specifications. Setting this value too high hurts nothing (except slower charging from empty) but setting this value too low can damage cells. This register gives the cells a chance for a Pre-Charge voltage to bring them up to normal charging voltage slowly before hitting them with a fast current. It is always recommended to use a Pre-Charge FET or smart charger that supports low Pre-Charge currents.

Fast Charge Config

Fast Charge Current

This is the current that the bq20z90 will report in the Charging Current register when the bq20z90 is in Fast Charge mode (see Pre-Chg Temperature and Pre-Chg Voltage, Pre-Chg Current). This current is also broadcast to a smart charger when bq20z90 master mode broadcasts are enabled ([BCAST] set in Operation Cfg B ). When in Fast Charge Mode (Charging Current = Fast Charge Current), [FCHG] will be set in Charging Status and the Charge FET will be enabled

There are 3 primary criteria that must be met to be in Fast Charge Mode:

1. Assuming all temperature faults are configured correctly (Pre-Chg Temperature configured in Data Flash as the highest low temperature mode), Temperature is above Pre-Chg Temperature with [PCHG] clear in Charging Status

2. Temperature is below Suspend High Temp and no [CHGSUSP] in Charging Status

3. Voltage must be above Pre-Chg Voltage with [PCHG] clear in Charging Status

4. Voltage must be below Charging Voltage + Over Charging Voltage\

While in Fast Charge Mode, there is an option called Charge Throttling that is enabled/disabled by Delta Temperature as described below (See Delta Temperature).

Normal Setting: This register is application dependent. It depends on the battery cell specifications, the battery Gas Gauge circuit current handling ability, and the charger output current.

Charging Voltage

When in any charging mode without a fault condition present then Charging Voltage will be the voltage that is put in Charging Voltage. With most fault conditions Charging Voltage is set to 0. This is also used in bq20z90 charge qualification and termination algorithms.

Normal Setting: This register is usually set based on the charger specifications. Charger tolerances should be considered when setting this register.

Delta Temp

Delta Temp is used in a “throttling” algorithm for maximizing the charging algorithm. This description starts in Fast Charge Mode with Temperature in the normal range and Charging Current = Fast Charge Current. Remember that whatever value that is in Charging Current is broadcast to smart chargers if master mode broadcasts are enabled ([BCAST] set in Operation Cfg B )

A) When Temperature rises to (Suspend High Temp – (Delta Temp * 2)) then the bq20z90 initiates stage 2 throttling. In this mode the Charging Current register is changed from Fast Charge Current to (Fast Charge Current – Pre-Chg Current) / 2. Also [TCHG2] will be set in Charging Status. The purpose of this stage is to request a slower Charging Current to prevent overheating of the battery. If Temperature continues to climb then see B).

B) If Temperature continues to rise even though requested Charging Current was decreased then when Temperature rises to (Suspend High Temp – Delta Temp) then the bq20z90 initiates stage 1 throttling. In this mode the Charging Current register is changed from [(Fast Charge Current – Pre-Chg Current) / 2] to Pre-Chg Current. Also [TCHG1] will be set in Charging Status and [TCHG2] will be cleared .

C) If Temperature continues to climb then it will reach Suspend High Temp which will halt charging all together (see Suspend High Temp).

The battery returns to Fast Charge Mode when the temperature falls back below (Suspend High Temp – (Delta Temp * 2)) which will clear [TCHG1] and [TCHG2] in Charging Status. If Delta Temp is set to 0 then this function is disabled.

Normal Setting: ensure that this value is large enough to keep the battery from switching modes rapidly, however, setting to large will increase charging time and reduce the algorithms effectiveness. This register will only be required in either high temperature environments or with extreme charge currents.

Suspend Low Temp

When the pack temperature measured by Temperature falls to or below Suspend Low Temp while charging ([DSG] flag clear in Battery Status) then the Charge Suspend Mode is triggered. This causes Charging Current to be set to 0, [CHGSUSP] gets set in Charging Status, and if [CHGSUSP] set in Operation Cfg B then the Charge FET and Pre-Charge FET will both be opened regardless of their prior open/close state. There are 2 primary possible recoveries to this mode

1. The primary recovery is if Temperature rises above (Suspend Low Temp + Temp Hys).

2. The condition can also be cleared with pack removal and re-insertion (/PRES transition) if [NR] is cleared in Operation Cfg B. If the condition still exists then the suspend mode will be reactivated with [DSG] flag cleared in Battery Status

With either of these recoveries [CHGSUSP] gets cleared in Charging Status. This will enable the charging process to resume.

Normal Setting: Notice that default Suspend Low Temp is much lower than Chg Inhibit Low Temp. This value is application and battery cell dependent.

Suspend High Temp

When the pack temperature measured by Temperature rises to or above Suspend High Temp while charging ([DSG] flag clear in Battery Status) then the Charge Suspend Mode is triggered. This causes Charging Current to be set to 0, [CHGSUSP] gets set in Charging Status, and if [CHGSUSP] set in Operation Cfg B then the Charge FET and Pre-Charge FET will both be opened regardless of their prior open/close state. There are 2 primary possible recoveries to this mode

1. The primary recovery is if Temperature falls below (Suspend High Temp - Temp Hys).

With either of these recoveries [CHGSUSP] gets cleared in Charging Status. This will enable the charging process to resume.

Normal Setting: Notice that default Suspend High Temp is higher than Chg Inhibit High Temp. This value is application and battery cell dependent.

Pulse Charge Config

Pulse Charge Config is one of the the most confusing setups in the bq20z90. In application, however, it a relatively simple function. Below is a graphic that shows an example of a pulse charging voltage vs time wave form with all the Pulse Charge Config registers explained graphically.

Turn Off Voltage

While charging ([DSG] clear in Battery Status) and in Fast Charge Mode ([FCHG] set in Charging Status), when Cell Voltage (MAX) rises to or above Turn Off Voltage, then the Max On Pulse Time timer initiates (see Max On Pulse Time for the rest of this process). If Max On Pulse Time is set to 0 then the process will act as if the Max On Pulse Time timer expired immediately (see Max On Pulse Time for the rest of this process).

Normal Setting: This is application dependent. If Pulse Charging is required then Turn Off Voltage should be set low enough below Max Off Voltage that Max On Pulse Time is given time to expire throughout most of each charge cycle. This maximized charge effeciency.

Turn On Voltage

This explanation is continued from Min Off Pulse Time (see Min Off Pulse Time). While charging ([DSG] clear in Battery Status) and in Fast Charge Mode ([FCHG] set in Charging Status), the Min Off Pulse Time timer is initiated as soon as the Charge FET opens. Regardless of whether or not the Cell Voltage (MAX) falls below the Turn On Voltage, the Min Off Pulse Time timer must expire before the bq20z90 will allow the Charge FET to be closed and allow charge current to flow. If Min Off Pulse Time timer expires prior to Cell Voltage (MAX) falling below Turn On Voltage, the Charge FET will not be closed until Cell Voltage (MAX) reaches Turn On Voltage. When the Charge FET is closed then [PLSOFF] is cleared in Charging Status.

Normal Setting: This is battery cell specification specific. See the Cell manufacturer data sheet for maximum voltage allowed. Note that the cell voltage readings for the sake of this algorithm are updated every 250ms when in pulse charging mode instead of 1 second updates with Cell Voltage (ALL).

Max On Pulse Time

This explanation is continued from Turn Off Voltage above (see Turn Off Voltage). While charging ([DSG] clear in Battery Status) and in Fast Charge Mode ([FCHG] set in Charging Status), when Cell Voltage (MAX) rises to or above Turn Off Voltage, then the Max On Pulse Time timer initiates. If Max On Pulse Time is set to 0 then the process will act as if the Max On Pulse Time timer expired immediately. The expiration of the Max On Pulse Time timer forces the Charge FET to open, [PLSOFF] and [PULSE] to be set in Charging Status, and the Min Off Pulse Time timer to be initiated (See Min Off Pulse Time). If Max On Pulse Time timer does not expire prior to Cell Voltage (MAX) reaching Max Off Voltage then Max Off Voltage will force the Charge FET to open (See Max Off Voltage)

Normal Setting: This register should be set to such a time that the Charge FET will shut off by this timer most of the time and not by the Max Off Voltage. It is not uncommon for this register to be 0 which would only use the Max Off Voltage for turning off the Charge FET. Care should be taken when setting it to 0 to ensure that the voltage does not overrun enough to produce a COV condition. The default for this register is 60 and is in units of Seconds

Min Off Pulse Time

This explanation is continued from one of the following condition descriptions.

1. Max On Pulse Time

2. Max Off Voltage

3. Turn Off Voltage

While charging ([DSG] clear in Battery Status) and in Fast Charge Mode ([FCHG] set in Charging Status), the Min Off Pulse Time timer is initiated as soon the Charge FET opens from one of these listed conditions (1-3 above). Regardless of whether or not the Cell Voltage (MAX) falls below the Turn On Voltage, the Min Off Pulse Time timer must expire before the bq20z90 will allow the Charge FET to be closed and allow charge current to flow. If Min Off Pulse Time timer expires prior to Cell Voltage (MAX) falling below Turn On Voltage, the Charge FET will not be closed until Cell Voltage (MAX) reaches Turn On Voltage (see Turn On Voltage).

Normal Setting: This register defaults to 0. This is a buffer to prevent fast oscillation of the Charge FET.

Max Off Voltage

This explanation is continued from Max On Pulse Time above (see Max On Pulse Time). While charging ([DSG] clear in Battery Status) and in Fast Charge Mode, when Cell Voltage (MAX) rises to or above Turn Off Voltage, then the Max On Pulse Time timer initiates. If Max On Pulse Time timer does not expire prior to Cell Voltage (MAX) reaching Max Off Voltage then Max Off Voltage will force the Charge FET to open, [PLSOFF] and [PULSE] to be set in Charging Status, and the Min Off Pulse Time timer to be initiated (See Min Off Pulse Time).

Termination Config

Maintenance Current

Maintenance Current is only put into the Charging Current register when [TCA] is set in Battery Status by a primary charge termination (See Taper Current), or TCA Set% condition (see TCA Set%), or many of the fault conditions from the 1^st Level Safety and 2^nd Level Safety classes. Even with [TCA] set, if configured for Charge FET to be turned off ([CHGFET] set in Operation Cfg B) then Charging Current will be set to 0 and [MCHG] will be cleared in Charging Status.

Normal Setting: This register should almost always be 0 for most if not all LION chemistries

Taper Current

Taper Current is used in the Primary Charge Termination algorithm. Current is integrated over each of the 2 Current Taper Window periods separately and then they are averaged separately to give 2 averages. Both of these averages must be below the Taper Current to qualify for a Primary Charge Termination. In total, a primary charge termination has the following requirements:

1. Voltage must be above (Charging Voltage - Termination Voltage) for the bq20z90 to start trying to qualify a termination. In other words it must be above this voltage before bq20z90 will start trying to detect a primary charge termination.

2. An average of all Current measurements must be below Taper Current for 2 consecutive periods of Current Taper Window from beginning to end of each window.

3. An average of all Current measurements during each of 2 consecutive periods of Current Taper Window from beginning to end of each window must be above 0.25mAh as integrated and averaged over the 2 Current Taper Windows.

When these conditions are met the primary charge termination has occurred and the following happens:

1. if TCA Set % = -1 (disabled) then [TCA] is set in Battery Status and either of the following happens:

A) if [CHGFET] set in Operation Cfg B then and Charging Current is set to 0 and the Charge FET is opened. .

B) if [CHGFET] is cleared in Operation Cfg B then and Charging Current is set to Maintenance Current.

2. If FC_Set %= -1 (disabled) then [FC] is set in Battery Status

3. If [CSYNC] is set in Operation Cfg B then Remaining Capacity will be written to Full Charge Capacity.

The primary charge termination mode has 2 clearing methods:

1. It is cleared when RSOC falls below FC Clear %

2. if [CHGTERM] in Operation Cfg B set and Current is less than Chg Current Threshold for 2 consecutive periods of Current Taper Window.

Normal Settings: This register is dependent on battery cell characteristics and charger specifications. Average Current is not used for this qualification because its time constant is not the same as the Current Taper Window. The reason for making 2 Current Taper qualifications is to prevent false current taper qualifications. False primary terminations can happen with pulse charging and with random starting and stopping of the charge current. This is particularly critical at the beginning or end of the qualification period. It is important to note that as the Current Taper Window value Is increased, the current range in the 3^rd requirement for primary charge termination will be lowered as the value increases. In other words, if you increase the Current Taper Window, then the current used to integrate to the 0.25mAh is decreased so this threshold becomes more sensitive. Care should be taken when modifying the Current Taper Window for this reason.

Taper Voltage

During Primary Charge Termination detection, one of the 3 requirements is that Voltage must be above (Charging Voltage - Taper Voltage) for the bq20z90 to start trying to qualify a termination. In other words it must be above this voltage before bq20z90 will start trying to detect a primary charge termination.

Normal Setting: This value is dependent on charger characteristics. It needs to be set so that ripple voltage, noise, and charger tolerances are taken into account. A value selected too low can cause early termination. If the value selected is too high then it can cause no or late termination detection. A good example value is 200mV (see Taper Current).

Current Taper Window

During Primary Charge Termination detection, all 3 requirements as described in Maintenance Current must be valid for 2 periods of this Current Taper Window for the bq20z90 to detect a primary charge termination (see Taper Current).

Normal Setting: This register should not need to be modified for most applications. It is important to note that as the Current Taper Window value Is increased, the current range in the 3^rd requirement for primary charge termination will be lowered as the value increases. In other words, if you increase the Current Taper Window, then the current used to integrate to the 0.25mAh is decreased so this threshold becomes more sensitive. Care should be taken when modifying the Current Taper Window for this reason.

TCA Set %

This is an alternative method to setting [TCA] in Battery Status. If this is set to anything but -1 then this is the only normal (non fault condition) function that will set [TCA]. This means that a Primary Charge Termination will not set [TCA] with TCA Set % set between 0 and 100%. IF set to -1 then the Primary Charge Termination algorithm will be the only normal mode algorithms used to set [TCA]. If set between and including 0 and 100% then whenever charging ([DSG] not set in Battery Status) and RSOC rises above this value then [TCA] gets set in Battery Status. Regardless of this setting or any Primary Charge Termination setting, any fault condition that has [TCA] as part of its fault process works completely independent of these functions.

Normal Setting: This is user preference. TCA Set % may be used if it is mandatory that [TCA] be set during the Charge process. It is a good process to use if Primary Charge Termination is not guaranteed every charge cycle (see Maintenance Charge). If the [CSYNC] bit is set in Operation Cfg B then a Primary Charge Termination will write Remaining Capacity up to Full Charge Capacity and will write RSOC to 100% so [TCA] will be set with this method even if TCA Set % is set between 0 and 100%

TCA Clear %

If during discharge ([DSG] set in Battery Status), RSOC falls below this value then [TCA] will be cleared.

Normal Setting: Must be set below TCA Set % if used.

FC Set %

This is an alternative method to setting [FC] in Battery Status. If this is set to anything but -1 then this is the only normal function that will set [FC]. IF set to -1 then the Primary Charge Termination algorithm will be used to set [FC]. If set between and including 0 and 100% then whenever charging ([DSG] not set in Battery Status) and RSOC rises above this value then [FC] gets set in Battery Status. Regardless of this setting, any fault condition that has [FC] as part of its fault process works completely independent of this function.

Normal Setting: This is user preference. FC Set % may be used if it is mandatory that [FC] be set during the Charge process. It is a good process to use if Primary Charge Termination is not guaranteed ever charge period (see Taper Current).

FC Clear %

If during discharge ([DSG] set in Battery Status), RSOC falls below this value then [FC] will be cleared.

Normal Setting: Must be set below FC Set % if used.

Cell Balancing Config

Min Cell Deviation

The cell balancing algorithm with be active only during charging ([DSG] cleared in Battery Status). The function is disabled completely if Min Cell Deviation is set to 0. With impedance track the bq20z90 knows the Full Charge Capacity for each cell independently. Each cell input in the bq29330 has an internal FET that will short the cell filtering resistors and an internal 500 ohm resistor across the cells that need reduced charging to help balance the cells. The bq20z90 use impedance track information along with the value for Min Cell Deviation to know how long to turn on the shorting FET The algorithm works based on the formula:

Min Cell Deviation = dQ *R / (V * duty cycle)

Where dQ = correction factor=3600 seconds/hour

V = nominal cell voltage = 3600mV

duty cycle = 40% = 0.4

R=Total Resistance from cell top to cell bottom (2 filter resistors and internal 500 ohm resistor)

so for bq20z90 EVM the filter resistors are 100 ohm so R= 100 * 2 + 500 = 700 ohm

So for 700 ohms in resistance Min Cell Deviation = 1750 sec/mAh

Normal Setting: The bq20z90 default value for this register is 1750s/mAH. The only values that should need to be changed in the formula are “R” (Resistance), and “V” (nominal cell voltage). (See SLUA340.pdf for more information)

Charging Faults

Over Charging Voltage

When the pack voltage measured by Voltage rises up to or above (Charging Voltage + Over Charging Voltage) then Over Charging Voltage fault process is triggered which initiates the Over Charging Volt Time timer. If Voltage falls below (Charging Voltage + Over Charging Voltage) prior to the expiration of the Over Charging Volt Time timer, then the Over Charging Voltage fault process halts and the Over Charging Volt Time timer resets. If the Voltage continues to be above (Charging Voltage + Over Charging Voltage) until the Over Charging Volt Time timer expires then the bq20z90 will set [OCHGV] in Charging Status and if [OCHGV] is set in Charge Fault Cfg then the Charge FET and Pre-Charge FET will both be opened regardless of their status prior to the fault. This fault condition causes [TCA] in Battery Status to be set. It also causes Charging Current and Charging Voltage to be set to 0. The bq20z90 will clear the Over Voltage fault condition when Voltage falls to or below Charging Voltage.

Normal Setting: This value should be high enough that ripple on the charger voltage will not cause a false Over Charging Voltage fault but low enough to allow for a normal fault condition.

Over Charge Voltage Time

When the Over Charging Voltage criteria are met then Over Charging Voltage fault process is triggered which initiates the Over Charging Volt Time timer. If the Over Charging Voltage criteria continue to be met until the Over Charging Volt Time timer expires then the bq20z90 will set [OCHGV] in Charging Status and if [XCHGV] is set in Charge Fault Cfg then the Charge FET and Pre-Charge FET will both be opened regardless of their status prior to the fault. This fault condition causes [TCA] in Battery Status to be set. It also causes Charging Current and Charging Voltage to be set to 0. If Voltage falls below Over Charging Voltage criteria any time prior to the expiration of the Over Charging Volt Time timer, then the Over Charging Voltage fault process halts and the Over Charging Volt Time timer resets. The bq20z90 will clear the Over Voltage fault condition when Voltage falls to or below Charging Voltage. (See Over Charging Voltage).

Normal Setting: The default for this register is 2 seconds. This should be sufficient for most applications. This function is not disabled if set to 0. Instead it will trigger immediately.

Over Charging Current

When the current as measured by Current rises up to or above (Charging Current + Over Charging Current) then Over Charging Current fault process is triggered which initiates the Over Charging Current Time timer. If Current falls below (Charging Current + Over Charging Current) prior to the expiration of the Over Charging Current Time timer, then the Over Charging Current fault process halts and the Over Charging Current Time timer resets. If the Current continues to be above (Charging Current + Over Charging Current) until the Over Charging Current Time timer expires then the bq20z90 will set [OCHGI] in Charging Status and if [XCHGI] is set in Charge Fault Cfg then the Charge FET and Pre-Charge FET will both be opened regardless of their status prior to the fault. This fault condition causes [TCA] in Battery Status to be set. It also causes Charging Current and Charging Voltage to be set to 0. The bq20z90 will clear the Over Current fault condition when Average Current falls to or below Over Charging Recovery Current.

Normal Setting: This setting should be set high enough to prevent false triggering but low enough to prevent battery cell damage. 500 mA is the default setting which should be sufficient for most applications.

Over Charging Current Time

When the Over Charging Current criteria are met then Over Charging Current fault process is triggered which initiates the Over Charging Current Time timer. If the Over Charging Current criteria continue to be met until the Over Charging Current Time timer expires then the bq20z90 will set [OCHGI] in Charging Status and if [XCHGV] is set in Charge Fault Cfg then the Charge FET and Pre-Charge FET will both be opened regardless of their status prior to the fault. This fault condition causes [TCA] in Battery Status to be set. It also causes Charging Current and Charging Voltage to be set to 0. If Current falls below Over Charging Current criteria any time prior to the expiration of the Over Charging Current Time timer, then the Over Charging Current fault process halts and the Over Charging Current Time timer resets. The bq20z90 will clear the Over Current fault condition when Average Current falls to or below Over Charging Recovery Current.

Normal Setting: The default for this register is 2 seconds. This should be sufficient for most applications. This function is not disabled if set to 0. Instead it will trigger immediately.

Over Charging Recov Curr

When the Over Charging Current criteria are met to the point of forcing an Over Charging Condition Fault, then th bq20z90 will clear the Over Current fault condition when Average Current falls to or below Over Charging Recovery Current.

Normal Setting: The default for this register is 100mA. This should be sufficient for most applications.

Depleted Voltage

When the voltage measured by Voltage falls to Depleted Voltage threshold and stays at or below this level for more than Depleted Voltage Time seconds then the bq20z90 sets the [XCHGLV] in Charging Status and the [TDA] in Battery Status. If [CS_XCHGLV] bit is set in Charge Fault Cfg then the discharge FET is turned off. A charger must be detected as present for a Depleted Voltage fault to occur. See Charger Present for a description on how to detect a charger.

Normal Setting: It is not recommended that this function be used if there is any external voltage source that could interfere with Charger Present. Set Depleted Voltage Timer to 0 to disable this function. This register is variable depending on the lowest possible system voltage. Set this value just above what the system requires for the lowest possible voltage.

Depleted Voltage Time

See Depleted Voltage. The Voltage must be equal to or below the Depleted Voltage for at least this time (Depleted Voltage Time) for the bq20z90 to register a [XCHGLV] fault in Charging Status. If set to 0 then Depleted Voltage function is completely disabled.

Normal Setting: The default value for this register is 2 seconds. ensure that this register is set for a long enough period to prevent false readings or spiked load currents from triggering a premature fault. With high current loads be sure that this is set short enough to prevent the system from seeing too low a voltage since voltage is usually dropping very rapidly at this level.

Depleted Recovery

When the voltage as measured by Voltage rises to or above this value while charging then the [OCHGLV] flag is cleared in Charging Status. If the discharge FET was turned off it will return to the on state.

Normal Setting: This register should be set at least several hundred millivolts higher than the Depleted Voltage to ensure hysteresis through this transition.

Over Charge Capacity

Over Charge Capacity is detected in a 2 step process. First the battery must be charged to the point where Remaining Capacity reaches FCC (Full Charge Capacity). Then any charge applied after this point is still measured but not displayed by the bq20z90. When this charge as measured by the bq20z90 reaches a threshold as defined by FCC + Over Charge Capacity then the bq20z90 goes into a charging fault condition. The [OC] in Charging Status is set. Charging Voltage and Charging Current are both set to 0. If [OC] set in Charge Fault Cfg then the Charge FET is turned off.

Normal Setting: This register is application dependent but a good example is 100 to 300mAh for each cell in parallel. To small of a value could force false detections and to large a value could damage the cells if normal charge termination methods fail.

Over Charge Recovery

There are 3 recovery methods for the bq20z90.

1. The first involves Over Charge Recover and only happens if [NR] in Operation Cfg B is set. With this setting the bq20z90 will recover from an overcharged condition with a continuous discharge of “Over Charge Recovery” mAHs.

2. With [NR] cleared in Operation Cfg B the bq20z90 will recover from the overcharge fault with a pack removal and re-insertion (/PRES transition).

3. The Third recovery happens when RSOC falls below the FC Clear %. This recovery also is the only one that returns Charging Voltage and Charging Current to normal.

Normal Setting: This value is usually very small. Typically around 2 mAh. Its only purpose is to ensure small discharge spikes or false discharge detections do not clear the condition prematurely

FC-MTO

If charging current is greater than Chg Current Threshold and [FCHG] is set in Charging Status for “FC-MTO” time in seconds then the bq20z90 sets [FC-MTO] (fast time mode timeout) in Charging Status, Charging Voltage and Charging Current are set to 0, [TCA] is set in Battery Status, and if [FCMTO] is set in Charge Fault Cfg then the Charge FET is turned off. If charging is interrupted ([DSG] in Battery Status sets) and an “Over Charging Curr Recov” amount of discharge is detected anytime during the charging process prior to FC-MTO timer expiring then the “FC-MTO” timer is reset and will start counting from 0. The bq20z90 recovers from an FC-MTO fault with the following conditions:

1. The fault condition can be cleared with pack removal and re-insertion (/PRES transition) if [NR] is cleared in Operation Cfg B.

2. If Current falls below Dsg Current Threshold

If FC-MTO is 0 then this function is disabled.

Normal Settings: The purpose of this register is another form of charge protection. If this timer has timed out then something has gone wrong and the battery is taking to long to charge. The default setting for this register is 10800 seconds. This may be short for some applications. Be sure and give plenty of time for all possible scenarios. Smaller charge currents may require longer settings. It is also important to note that as a battery ages, charge time increases due to increased impedance. Setting this value too short will limit capacity of aged cells.

PC-MTO

If charging current is greater than Chg Current Threshold and [PCHG] is set in Charging Status for “PC-MTO” time in seconds then the bq20z90 sets [PC-MTO] (precharge time mode timeout) in Charging Status, Charging Voltage and Charging Current are set to 0, [TCA] is set in Battery Status, and if [PCMTO] is set in Charge Fault Cfg then the Charge FET/Pre-Charge FET is turned off. If charging is interrupted ([DSG] in Battery Status sets) and an “Over Charging Curr Recov” amount of discharge is detected anytime during the charging process prior to FC-MTO timer expiring then the “FC-MTO” timer is reset and will start counting from 0. The bq20z90 recovers from a PC-MTO fault with the following conditions:

1. The fault condition can be cleared with pack removal and re-insertion (/PRES transition) if [NR] is cleared in Operation Cfg B.

2. If Current falls below Dsg Current Threshold

If PC-MTO is 0 then this function is disabled.

Charge Fault Configuration

PCMTO

FCMTO

OCHGV

OCHGI

CS_XCHGLV

n PCMTO: If set then the Charge FET or Pre-Charge FET (depending on which is active at the time) is turned off when an PC-MTO fault condition occurs.

Normal Setting: Default is 0 (disabled)

n FCMTO: If set then the Charge FET or Pre-Charge FET (depending on which is active at the time) is turned off when an FC-MTO fault condition occurs.

Normal Setting: Default is 0 (disabled)

n OCHGV: If set then the Charge FET or Pre-Charge FET (depending on which is active at the time) is turned off when an Over Charging Voltage fault condition occurs.

Normal Setting: Default is 0 (disabled)

n OCHGI: If set then the Charge FET or Pre-Charge FET (depending on which is active at the time) is turned off when an Over Charging Current fault condition occurs.

Normal Setting: Default is 0 (disabled)

n OC: If set then the Charge FET or Pre-Charge FET (depending on which is active at the time) is turned off when an Over Charge fault condition occurs.

Normal Setting: Default is 0 (disabled)

n CS_XCHGLV: If set then the discharge FET is turned off when a Depleted Voltage fault condition occurs.

Normal Setting: Default is 0 (disabled)

SBS Configuration

SBS Data

Rem Cap Alarm

When the Remaining Capacity falls below this value [RTA] will be set in Battery Status.

Normal Setting: About 10% of the Full Charge Capacity. This value is programmed into RemainingCapacityAlarm on device initialization

Rem Energy Alarm

When the bq20z90 is in milliwatt mode ([CapM] set in Battery Mode), the value in Rem Energy Alarm will be written to the Rem Cap Alarm. Once this value is written to Rem Cap Alarm then the function will act the same as Rem Cap Alarm except units are in milliwatts. (See Rem Cap Alarm)

Normal Setting: About 10% of the Full Charge Capacity but units have to be converted to milliwatts. This data flash value is only used when in milliwatt mode. This value is programmed into RemainingCapacityAlarm on device initialization if in milliwatt mode.

Rem Time Alarm

When the average time to empty falls below this value, then the [RTA] flag is set in Battery Status.

Normal Setting: About 10 minutes. This value is programmed into RemainingTimeAlarm on device initialization.

Init Battery Mode

This is the default value loaded into Battery Mode on all resets and when the bq20z90 wakes from sleep. The primary purpose of having an initial value for this register is to enable milliwatt mode whenever the bq20z90 resets or wakes up from sleep.

Normal Setting: In most applications this register should be 0x0081. If the application requires the bq20z90 to wake in mW mode then this value can be set to 0x8081. Care should be taken with this setting, however, because the Battery Mode register is writable even when the bq20z90 is sealed. The mW mode bit could be accidentally written to a 0.

Design Voltage

This is the theoretical nominal voltage of the battery pack. This value is used in ATRATE calculations and milliWatt mode (Battery Mode MSByte bit 7).

Normal Setting: This varies by cell manufacturer, but LION is usually about 3.6V per cell. Please refer to cell manufacturer data sheet for exact numbers. This value is programmed into DesignVoltage on device initialization.

Spec Info

This performs 2 purposes. The high byte has the current and voltage multipliers. The bq20z90 does not require any multiplier so use 0x00. The low byte is the SBS specification revision. See the SBS Implementers Forum web page for more information (http://www.sbs-forum.org/specs/index.html).

Normal Setting: 0x0031 for SBS specification v1.1 with PEC error checking, or 0x0021 for SBS specification V1.1 without PEC error checking.

Mfg Date

This is the date of manufacture. It is stored in the Data Flash in packed format. All bqEV Software and bqMTester both accept input of this date in standard date format so the packed format does not need to be used in input. It is then translated by the software to packed format. This data does not affect the operation, nor is it used by the part in any way.

Ser Num

This is a 16 bit serial number that does not affect the operation nor is it used by the part in any way. It is usually used for battery identification.

Cycle Count(CC)

There are 2 mothods to increment Cycle Count:

1. If [CCT] is set in Operation Cfg B then this CC% is used to increment Cycle Count. When the bq20z90 accumulates enough discharge capacity equal to (CC% * Full Charge Capacity) then it increments Cycle Count by 1. If at any time (CC% * Full Charge Capacity) is less than Cycle Count Threshold then the Cycle Count Threshold will be used to increment Cycle Count.

2. If [CCT] is cleared in Operation Cfg B then Cycle Count Threshold will always be used to increment Cycle Count. When the bq20z90 accumulates enough discharge capacity equal to the “Cycle Count Threshold” then it increments Cycle Count by 1.

This discharge capacity used by either of these methods does not have to be consecutive. In other words the internal register that accumulates the discharge is not cleared at any time except when the internal accumulating register equals the Cycle Count Threshold or CC % depending on [CCT]. Then Cycle Count is incremented. Every increment of Cycle Count between QMAX updates will increment MaxErr by 0.05%. It obviously will take 20 increments of Cycle Count to increment MaxErr by 1% so that it is visible in the SBS register.

Normal Setting: This should be set to 0.

Cycle Count Threshold

If [CCT] is cleared in Operation Cfg B then this value is always used to increment Cycle Count. When the bq20z90 accumulates enough discharge capacity equal to the “Cycle Count Threshold” then it increments Cycle Count by 1. This discharge capacity does not have to be consecutive. In other words the internal register that accumulates the discharge is not cleared at any time except when the internal accumulating register equals the Cycle Count Threshold and increments Cycle Count. If [CCT]is set then see CC%

Normal Setting: This is usually set to about 80% of the Design Capacity

CC%

If [CCT] is set in Operation Cfg B then this value is used to increment Cycle Count. When the bq20z90 accumulates enough discharge capacity equal to (CC% * FCC) then it increments Cycle Count by 1. If at any time (CC% * Full Charge Capacity) is less than Cycle Count Threshold then the Cycle Count Threshold will be used to increment Cycle Count. This discharge capacity does not have to be consecutive. In other words the internal register that accumulates the discharge is not cleared at any time except when the internal accumulating register equals the (CC% * FCC) and increments Cycle Count. If [CCT]is clear then see Cycle Count Threshold.

Normal Setting: This is usually set to 80 - 90%. This can be set closer to FCC than the Cycle Count Threshold method because it will track with FCC as it decreases with age. This keeps cycle count tracking closely with each discharge cycle as the battery ages. ensure that Cycle Count Threshold has a meaningful value even if CC% is used because Cycle Count Threshold is used if (CC% * Full Charge Capacity) is less than Cycle Count Threshold.

CF Max Error Limit

The bq20z90 will force [CF] to be set in Battery Mode if MaxErr goes above the value stored in this register. This value can be used to give an alternate method for setting the [CF] flag in Battery Mode other than the impedance track algorithm. The [CF] flag is a condition request flag indicating the battery would like a full charge/discharge cycle and rarely gets set by impedance track because accurate capacity measurements are always updated.

Normal Setting: This register is usually set to 100 and is in units of %

Design Capacity

Design Capacity is the data flash location that is reported in the Design Capacity register when [CapM] is clear in Battery Mode. If [CapM] is set in Battery Mode then Design Energy is reported in Design Capacity. This value is used also for the ASOC calculation by the bq20z90 if [CapM] is cleared in Battery Mode

Normal Setting: This value should be set based on the application battery specification. Please see the battery manufacturer data sheet.

Design Energy

Design Energy is the data flash location that is reported in the Design Capacity register if [CapM] is set in Battery Mode. If [CapM] is clear in Battery Mode then Design Capacity is reported in Design Capacity. This value is used also for the ASOC calculation by the bq20z90 if [CapM] is set in Battery Mode

Normal Setting: This value should should be set based on the application battery specification. Please see the battery manufacturer data sheet. At higher rates of discharge energy will be less, so referring to discharge data similar to typical rate of your application is important to obtain a meaningful value.

Manuf Name

String data that can be a maximum of 11 characters. This field does not affect the operation nor is it used by the part in any way. It is returned by an SMBus block read to command 0x20

Device Name

String data that can be a maximum of 7 characters. This field does not affect the operation nor is it used by the part in any way. It is returned by an SMBus block read to command 0x21

Device Chemistry

String data that can be a maximum of 4 characters. This field does not affect the operation nor is it used by the part in any way. It is returned by an SMBus block read to command 0x22

Configuration

These are alternative methods for setting and clearing [TDA] and [FD] in Battery Status. They are in addition to traditional methods or fault conditions explained in other areas of this document. this it the this is the this is the this is this is the is this the it this is the this is it.

TDA Set %

If set to a value between 0 and 100 then when RSOC falls to or below this value then [TDA] in Battery Status is set. If set to -1 then this function is disabled. TDA Set Volt Threshold is not affected by this register. They are completely independent. Any fault condition that specifies setting [TDA] is completely unaffected by this register.

Normal Setting: This is user preference. This is the threshold that the bq20z90 requests that the discharge be halted soon because the battery is nearing depletion. If used it is usually set around 6%. Be sure that if TDA Clear % is used then this should be used as well. They only work together.

TDA Clear %

If set to a value between 0 and 100 then when RSOC rises to or above this value after being set by TDA Set %, then [TDA] in Battery Status is cleared. This register can only be used to clear [TDA] if it was set by TDA Set %. If set to -1 then this function is disabled. TDA Clear Volt Threshold is not affected by this register. They are completely independent.

Normal Setting: This is user preference. If used it is usually set around 8%. Be sure that if TDA Set % is used then this should be used as well. They only work together.

FD Set %

If set to a value between 0 and 100 then when RSOC falls to or below this value then [FD] in Battery Status is set. If set to -1 then this function is disabled. FD Set Volt Threshold is not affected by this register. They are completely independent. Any fault condition that specifies setting [FD] is completely unaffected by this register.

Normal Setting: This is user preference. This is a stronger request than TDA. The battery is presumed dead at this point. If used it is usually set around 2%. Be sure that if FD Clear % is used then this should be used as well.

FD Clear %

If set to a value between 0 and 100 then when RSOC rises to or above this value after being set by FD Set %, then [FD] in Battery Status is cleared. If set to -1 then this function is disabled. FD Clear Volt Threshold is not affected by this register. They are completely independent.

Normal Setting: This is user preference. If used it is usually set around 5%. Be sure that if FD Set % is used then this should be used as well. They only work together.

TDA Set Volt Threshold

When battery voltage as measured by Voltage falls to or below the TDA Set Volt Threshold value for “TDA Set Volt Time” seconds then then [TDA] in Battery Status is set. This works completely independent of TDA Set %. Any fault condition that specifies setting [TDA] is completely unaffected by this register.

Normal Setting: This is user preference but should be a voltage that the battery is at under normal loads at around 6% RSOC.

TDA Set Volt Time

See TDA Set Volt. This is the time that the battery voltage must be equal to or below TDA Set Volt Threshold before [TDA] is set in in Battery Status

Normal Setting: This is usually set to 5 seconds but depends on the application.

TDA Clear Volt Threshold

When battery voltage as measured by Voltage rises to or above this value then then [TDA] in Battery Status is cleared. [TDA] will only be cleared with this threshold if it was set by “TDA Set Volt” criteria, and not cleared if it was set by any other methods.

Normal Setting: This is user preference but should be a voltage that the battery is at under normal loads at around 8% RSOC.

FD Set Volt Threshold

When battery voltage as measured by Voltage falls to or below the FD Set Volt Threshold value for “FD Set Volt Time” seconds then then [FD] in Battery Status is set. This register works completely independent of FD Set %. Any fault condition that specifies setting [FD] is completely unaffected by this register.

Normal Setting: This is user preference but should be a voltage that the battery is at under normal loads at around 2% RSOC.

FD Set Volt Time

See FD Set Volt. This is the time that the battery voltage must be equal to or below FD Set Volt Threshold before [FD] is set in in Battery Status

Normal Setting: This is usually set to 5 seconds but depends on the application.

FD Clear Volt Threshold

When battery voltage as measured by Voltage rises to or above this value then then [FD] in Battery Status is cleared. [FD] will be cleared from this threshold only if it was set by “FD Set Volt” criteria.

Normal Setting: This is user preference but should be a voltage that the battery is at under normal loads at around 5% RSOC.

System Data

Manufacturer Data

Pack Lot Code

This is a 16 bit value that does not affect operation nor is it used by the part in any way.

Normal Setting: The most common use of this register is as an extension to the Serial Number as a form of pack identification. It is only readable via Manufacturer Data (0x23) string read.

PCB Lot Code

This is a 16 bit value that does not affect operation nor is it used by the part in any way.

Normal Setting: The most common use of this register is as an extension to the Serial Number as a form of pack identification. It is only readable via Manufacturer Data (0x23) string read.

Firmware Version

This is a 16 bit value that does not affect operation nor is it used by the part in any way. It is intended as a firmware revision however it is not protected so it is not reliable. Use Manufacturing Access Commands to get a reliable firmware version of the bq20z90.

Normal Setting: This can be used for any user data. It is only readable via Manufacturer Data (0x23) string read.

Hardware Revision

This is a 16 bit value that does not affect operation nor is it used by the part in any way. It is intended as a IC hardware revision however it is not protected so it is not reliable. Use Manufacturing Access Commands to get a reliable firmware version of the bq20z90.

Normal Setting: This can be used for any user data. It is only readable via Manufacturer Data (0x23) string read.

Cell Revision

This is a 16 bit value that does not affect operation nor is it used by the part in any way.

Normal Setting: This can be used for any user data. It is only readable via Manufacturer Data (0x23) string read.

Manufacturer Info

Manuf. Info

This is string data that can be any user data. It can be a maximum of 8 characters.

Normal Setting: Can be used for any user data.

Lifetime Data

Lifetime Max Temp

When the Impedance Track Algorithm is enabled ([QEN] set in Operation Status), and the maximum temperature as measured by Temperature is updated continuously in a lifetime reserved RAM location. To prevent flash wear out, this RAM only updates Lifetime Max Temp in Data Flash with one of the following 3 conditions:

1. Whenever the internal RAM location is greater than Lifetime Max Temp for 60 seconds

2. If the internal RAM location is greater than Lifetime Max Temp by at least 1 degree C