Adding a new interface/device driver to PSP...

Pin Muxing
Uboot:
u-boot-2010.06-psp04.01.00.05/board/ti/ti8148/mux.h; evm.c

evm.c -> board_init() -> set_muxconf_regs() sets the default pin muxing according to mux.h and explicitly e.g. cpsw_pad_config() -> PADXXX_CTRL

#define PAD253_CNTRL  (*(volatile unsigned int *)(PADCTRL_BASE + 0x0BF0))

PAD232_CNTRL = (volatile unsigned int) (BIT(18) | BIT(0));

For DM8168 board_init() enables explicitly only required pins e.g. by calling set_muxconf_regs() which uses __raw_writew() macro.

Linux kernel:
There is arch/arm/mach-omap2/mux81xx.c common file for DM81xx pin muxing but indeed there is a need for separate file to be generated for DM8148 as it doesn’t have the same pins as DM8168.

ti81xx_mux_init() should have used different table for DM8168 and DM8148!

The PADCONF addresses are defined in arch/arm/mach-omap2/mux81xx.h and this file should also have been regenerated for DM8148.

If above is correctly defined it can be used as below:
arch/arm/mach-omap2/devices.c:		
omap_mux_init_signal("mmc_pow", OMAP_PULL_ENA)

Otherwise direct register access needs to be used: 
omap_writel(0x00060001, 0x481409CC);	/*PINCNTL116 - MMC2_DAT4*/

I2C driver

https://i2c.wiki.kernel.org/index.php/Main_Page

Atlas I2C I/F mapping:
I2C-0
	0x06	? MSP430 - wrong address!!!
	0x18	AIC3106
	0x21	THS8200
	0x2D	TPS659113

I2C-1
	0x58	? DP501 Page0
	0x59	? DP501 Page1
	0x5a	? DP501 Page2
	0x5b	? DP501 EDID

I2C-3
	0x3a	? Monitor dependent
	0x50	? Monitor dependent

static void __init ti8148_evm_init(void)
{
	omap_serial_init();
	ti814x_evm_i2c_init(); <- I2C Adapter defined in board_init file (board-ti8148evm.c)
	ti81xx_register_mcasp(0, &ti8148_evm_snd_data);

	omap2_hsmmc_init(mmc);
	board_nand_init(ti814x_nand_partitions,
		ARRAY_SIZE(ti814x_nand_partitions), 0, NAND_BUSWIDTH_16);
	/* initialize usb */
	usb_musb_init(&musb_board_data);

	ti8148_spi_init();
	ti814x_vpss_init();
	ti814x_hdmi_init();
	ti8148_ths8200_init();			<- this has to be moved after Kernel I2C core driver gets 
	ti8148_ths8200_bypass_enable();	<- initialized; good location is THS8200 driver or vpss
	ti8148_ths8200_exit();			<- driver (core.c)
	regulator_use_dummy_regulator();
}

Vpss core.c (better place is a separate THS8200 driver…)
	VPSSDBG("core init - configuring THS8200->\n");
	ti8148_ths8200_init();
	ti8148_ths8200_bypass_enable();
	ti8148_ths8200_exit();
	VPSSDBG("core init - <-THS8200 configured\n");

For DP501 firmware loader please follow sii9022a implementation for DM8168 evm (drivers/video/ti81xx/sii9022a and arch/arm/mach-omap2/board-ti8168evm.c)

MMC (eMMC)
1) A new device driver entry
a) In arch/arm/mach-omap2/board-<yourdevice><platform>.c add a new entry to oma2_hsmmc_info table:
static struct omap2_hsmmc_info mmc[] = {
	{
		.mmc            = 1,
		.caps           = MMC_CAP_4_BIT_DATA,
		.gpio_cd        = -EINVAL,/* Dedicated pins for CD and WP */
		.gpio_wp        = -EINVAL,
		.ocr_mask       = MMC_VDD_33_34,
	},
	{
		.mmc            = 2,
		.caps           = MMC_CAP_8_BIT_DATA, //MMC_CAP_NONREMOVABLE | MMC_CAP_ERASE | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_8_BIT_DATA,
		.transceiver	= false,
		.nonremovable	= true,
		.gpio_cd        = -EINVAL,/* Dedicated pins for CD and WP */
		.gpio_wp        = -EINVAL,
		.ocr_mask       = MMC_VDD_33_34,
	},

	{}      /* Terminator */
};

b) This structure will be passed as an argument to omap2_hsmmc_init(mmc) called from <yourdevice>_<platform>_init() in board-<yourdevice><platform>.c (e.g. ti8148_evm_init() in board-ti8148evm.c)
This function performs basic inaitlization and calls omap2_init_mmc() from arch/arm/mach-omap2/devices.c (e.g. omap2_init_mmc(hsmmc_data, TI814X_NR_MMC)

If needed update omap2_hsmmc_init() in mach-omap2/hsmmc.c for your device using (cpu_is_<yourDevice>()) macro.

c) Add specific module base addresses to arch/arm/plat-omap/include/plat/mmc.h
e.g.
#define TI81XX_NR_MMC		1
#define TI814X_NR_MMC		2
#define TI81XX_HSMMC_SIZE	0x10000

#define TI816X_MMC1_BASE	0x48060100 /* TI816X MMC/SD config base */
#define TI816X_MMC1_HL_BASE	0x48060000 /* TI816X HL configuration*/

#define TI814X_MMC1_BASE	0x481D8100 /* TI814X MMC/SD config base */
#define TI814X_MMC1_HL_BASE	0x481D8000 /* TI814X HL configuration*/

#define TI814X_MMC2_BASE	0x47810100 /* TI814X MMC/SD config base */
#define TI814X_MMC2_HL_BASE	0x47810000 /* TI814X HL configuration*/

d) omap2_init_mmc() in devices.c
This function performs several actions including (but not restricted to) setting pin mux (omap2_mmc_mux()), and assigning right base addresses and interrupts signals for each MMC controller.
e.g.
		case 1:
			if (!cpu_is_ti814x()) {
				base = OMAP2_MMC2_BASE;
				irq = INT_24XX_MMC2_IRQ;
			} else if (cpu_is_ti814x()) {
				base = TI814X_MMC2_BASE;
				irq = TI814X_IRQ_SD2;
			}
			break;

e) Then it calls omap_mmc_add() from arch/arm/plat-omap/devices.c and it ends a new MMC initilization. MMC host driver will be created by kernel MMC core for each registered device  (eg. MMC1 and MMC2 in our example)

2) Region mapping
The whole driver is developed to use __raw_readl, __raw_writel() macros which use virtual addresses so those base addresses must be correctly mapped in MMU.
omap_readl/writel() macros are affective only for L4 peripherals.

a) Define offset for new virtual entry in arch/arm/plat-omap/include/plat/io.h
#define TI81XX_L3_SLOW_IO_OFFSET	0xb4000000
#define TI81XX_L3_SLOW_IO_ADDRESS(pa)	IOMEM((pa) + TI81XX_L3_SLOW_IO_OFFSET)

/*
 * TI81XX Specific I/O Mapping
 */
#define L3_SLOW_TI81XX_BASE	0x47800000
#define L3_SLOW_TI81XX_PHYS	L3_SLOW_TI81XX_BASE
						/* 0x47800000 --> 0x47c00000 */
#define L3_SLOW_TI81XX_VIRT	(L3_SLOW_TI81XX_PHYS + TI81XX_L3_SLOW_IO_OFFSET)
#define L3_SLOW_TI81XX_SIZE	SZ_4M

b) Add user defined entries to MMU in arch/arm/mach-omap2/io.c

#ifdef CONFIG_ARCH_TI81XX
static struct map_desc ti81xx_io_desc[] __initdata = {
	{
		.virtual	= L4_SLOW_TI81XX_VIRT,
		.pfn		= __phys_to_pfn(L4_SLOW_TI81XX_PHYS),
		.length		= L4_SLOW_TI81XX_SIZE,
		.type		= MT_DEVICE
	},
	{
		.virtual	= TI81XX_L2_MC_VIRT,
		.pfn		= __phys_to_pfn(TI81XX_L2_MC_PHYS),
		.length		= TI81XX_L2_MC_SIZE,
		.type		= MT_STRONGLY_ORDERED
	},
	{
		.virtual	= L3_SLOW_TI81XX_VIRT,
		.pfn		= __phys_to_pfn(L3_SLOW_TI81XX_PHYS),
		.length		= L3_SLOW_TI81XX_SIZE,
		.type		= MT_DEVICE
	},
};
#endif

c) PAtoVA remap handler (__iomem *omap_ioremap() in arch/arm/plat-omap/io.c)
This handler will remap all phisical address accesses in given range to virtual ones (when usin __raw_readl/writel() or omap_readl/writel() macros).
Please note that MMC2 in DM8148 is connected to L3 interconnect so an extra entry is needed in MMU tables for this space.

void __iomem *omap_ioremap(unsigned long p, size_t size, unsigned int type)
{
#ifdef CONFIG_ARCH_TI81XX
	if (cpu_is_ti81xx()) {
		if (BETWEEN(p, L4_SLOW_TI81XX_PHYS, L4_SLOW_TI81XX_SIZE))
			return XLATE(p, L4_SLOW_TI81XX_PHYS, L4_SLOW_TI81XX_VIRT);
		if (BETWEEN(p, TI81XX_L2_MC_PHYS, TI81XX_L2_MC_SIZE))
			return XLATE(p, TI81XX_L2_MC_PHYS, TI81XX_L2_MC_VIRT);
		if (BETWEEN(p, L3_SLOW_TI81XX_PHYS, L3_SLOW_TI81XX_SIZE))
			return XLATE(p, L3_SLOW_TI81XX_PHYS, L3_SLOW_TI81XX_VIRT);
	}
#endif
}

3) Clocks
The clocks for MMC modules are enabled upon calling omap_hsmmc_prob() from omap-hsmmc.c. Clocks are controlled by calling clk_enable(host->iclk) and clk_enable(host->fclk) functions.

The clock tree for each device is defined in /arch/arm/mach-omap2/clock<yourdevice>_data.c (e.g. clock814x_data.c) and it looks like:

/* MMC2 Functional Clock(final) */
static struct clk mmchs3_fck = {
	.name		= "mmchs3_fck",
	.parent		= &sysclk8_ck,
	.ops		= &clkops_ti81xx_dflt_wait,
	.enable_reg	= TI814X_CM_ALWON_MMCHS_2_CLKCTRL,
	.enable_bit	= TI81XX_MODULEMODE_SWCTRL,
	.clkdm_name	= "alwon_l3_slow_clkdm",
	.recalc		= &followparent_recalc,
}

Warning: for DM8148 there is a hack as below to enable them explicitly; the issue is under investigation as generic clk_enable(host->iclk) and clk_enable(host->fclk) should work fine.

#include <../../../arch/arm/mach-omap2/cm81xx.h>
/*Check clocks*/
	if (host->id == 1)
	{
		__raw_writel(0x02, TI814X_CM_ALWON_MMCHS_2_CLKCTRL);
		__raw_readl(TI814X_CM_ALWON_MMCHS_2_CLKCTRL);
	}

MMC FCLK clock
On DM8148 the MMC has been changed from 96MHz to 192MHz (SYSCLK8). It forces system to use bigger clock divider than in the previous designs.
The update is needed to omap_hsmmc_set_ios() in drivers/mmc/host/omap_hsmmc.c:

	if (ios->clock) {
		dsor = (clk_get_rate(host->fclk)) / ios->clock;
		if (dsor < 1)
			dsor = 1;

		if ((clk_get_rate(host->fclk)) / dsor > ios->clock)
			dsor++;

		if (!cpu_is_ti814x()) {
			if (dsor > 250)
				dsor = 250;
		}
	}

4) Pinmux
This is messed up a little bit as although there is a field in struct omap2_hsmmc_info for (*remux) function it is done explicitly in initilization code by calling omap2_mmc_mux() instead. omap2_mmc_mux() needs to have explicit pinmux config for given MMC controller.
e.g.
	if (cpu_is_ti816x()) {
		omap_mux_init_signal("mmc_pow", OMAP_PULL_ENA );
		omap_mux_init_signal("mmc_clk", OMAP_PIN_OUTPUT );
		omap_mux_init_signal("mmc_cmd", OMAP_PULL_UP );
		omap_mux_init_signal("mmc_dat0", OMAP_PULL_UP );
		omap_mux_init_signal("mmc_dat1_sdirq", OMAP_PULL_UP );
		omap_mux_init_signal("mmc_dat2_sdrw", OMAP_PULL_UP );
		omap_mux_init_signal("mmc_dat3", OMAP_PULL_UP );
		omap_mux_init_signal("mmc_sdcd", OMAP_PULL_ENA );
		omap_mux_init_signal("mmc_sdwp", OMAP_PULL_ENA );
	}

#if 1
if (cpu_is_ti814x()) {
	if (controller_nr == 1) {
	/* MMC2 */
	/*[mn] hopefully can be replaced with omap_mux_init_signal() when mux81xx.c will be updated for 8148*/
	omap_writel(0x00060001, 0x481409C0);	/*PINCNTL113 - MMC2_DAT7*/
	omap_writel(0x00060001, 0x481409C4);	/*PINCNTL114 - MMC2_DAT6*/
	omap_writel(0x00060001, 0x481409C8);	/*PINCNTL115 - MMC2_DAT5*/
	omap_writel(0x00060001, 0x481409CC);	/*PINCNTL116 - MMC2_DAT4*/
	omap_writel(0x00060001, 0x481409D0);	/*PINCNTL117 - MMC2_DAT3*/
	omap_writel(0x00060001, 0x481409D4);	/*PINCNTL118 - MMC2_DAT2*/
	omap_writel(0x00060001, 0x481409D8);	/*PINCNTL119 - MMC2_DAT1*/
	omap_writel(0x00060001, 0x481409DC);	/*PINCNTL120 - MMC2_DAT0*/
	omap_writel(0x00050001, 0x481409E0);	/*PINCNTL121 - MMC2_CLK*/
	omap_writel(0x00060002, 0x481409F4);	/*PINCNTL126 - MMC2_CMD*/
omap_writel(0x00050040, 0x48140920);	/*PINCNTL73  - MMC2_SDCD*/
}
#endif
Please note that pin definition is not available for DM8148 yet so explicit write is needed! Please note also that MMC2_SDCD is enabled only to satisfy the host controller implementation. 
This pin is not used in case of eMMC device but is enabled with pulled-up high to satisfy controller.

5) IRQ/DMAs
For MCU generally IRQs are assigned in omap2_init_mmc() from arch/arm/mach-omap2/devices.c
For DMA support it is initialized in omap_mmc_add() in arch/arm/plat-omap/devices.c

Due to DMA re-MUX for MMC2 event changes has been added to arch/arm/mach-omap2/hsmmc.c:

#ifndef CONFIG_ARCH_TI81XX
static struct omap_mmc_platform_data *hsmmc_data[OMAP34XX_NR_MMC] __initdata;
#else
  #ifdef CONFIG_ARCH_TI814X
  static struct omap_mmc_platform_data *hsmmc_data[TI814X_NR_MMC] __initdata;
  #else
  static struct omap_mmc_platform_data *hsmmc_data[TI81XX_NR_MMC] __initdata;
  #endif
#endif

else
{
	/*DMA EVT Mux required for MMC2*/
	/*MMC2 events muxed on MCASP0 lines - dirty hack*/

omap_ctrl_writel((TPCC_EVT_MUX_SDRXEVT2<<8) | TPCC_EVT_MUX_SDTXEVT2, 
TI814X_CONTROL_TPCC_EVT_MUX_8_11);

	omap2_init_mmc(hsmmc_data, TI814X_NR_MMC);
}

As well as to arch/arm/mach-omap2/control.h:

When  use kernel-04.01.00.05 offical version, please add… 
#define TI816X_CTRL_REGADDR(reg)					\
		TI81XX_L4_SLOW_IO_ADDRESS(TI81XX_CTRL_BASE + (reg))

#define TI814X_CONTROL_INT_DMA_MUX	0xF00

/* TI814X_CONTROL_INT_DMA_MUX registers offset */
#define TI814X_CONTROL_TPCC_EVT_MUX_8_11	TI816X_CTRL_REGADDR(TI814X_CONTROL_INT_DMA_MUX + 0x98)
#define TPCC_EVT_MUX_SDRXEVT2 	2
#define TPCC_EVT_MUX_SDTXEVT2		1

And to arch/arm/plat-omap/include/plat/dma.h
#ifdef CONFIG_ARCH_TI814X
#define OMAP24XX_DMA_SPI2_TX0		54	/* E_DMA_42 */
#define OMAP24XX_DMA_SPI2_RX0		55	/* E_DMA_43 */
#define OMAP24XX_DMA_SPI2_TX1		56	/* E_DMA_44 */
#define OMAP24XX_DMA_SPI2_RX1		57	/* E_DMA_45 */
#define OMAP24XX_DMA_MMC2_TX		8	/* E_DMA_MUXED instead of MCASP0TX - SDTXEVT2 */
#define OMAP24XX_DMA_MMC2_RX		9	/* E_DMA_MUXED instead of MCASP0RX - SDRXEVT2 */
#else

6) Kernel MMC core driver
Once kernel executed to this point the core driver will initilize all rergistered module. It will perfrom platfrom probe to instantiate the driver for each module (which in turn will call omap_hsmmc_init() from drivers/mms/host/omap-hsmmc.c to initlize each device driver). Then it will call get_cd and card_detect to find and initilize each connected device (card or eMMC device). This is done as part of mmc_rescan() in drivers/mmc/core/core.c

That's all what is required. Every MMC/SD card/device is based on industry spec and the host (if implemented correctly) has a capability to discover and indentify the device.

************************************************************************************************************************
Console log file:

X-LOADER VERSION PS600H001.0719

TI8148-GP rev 2.1

ARM clk: 600MHz
DDR clk: 400MHz

DRAM:  2 GiB
Using default environment

The 2nd stage U-Boot will now be auto-loaded
Please do not interrupt the countdown till TI8148_EVM prompt if 2nd stage is already flashed
Hit any key to stop autoboot:  3 ___ 2 ___ 1 ___ 0 
mmc1 is available
reading u-boot.bin

180336 bytes read
## Starting application at 0x80800000 ...

U-BOOT VERSION PS600H001.0719

TI8148-GP rev 2.1

ARM clk: 600MHz
DDR clk: 400MHz

I2C:   ready
DRAM:  2 GiB
NAND:  HW ECC Hamming Code selected
No NAND device found!!!
0 MiB
*** Warning - bad CRC or NAND, using default environment

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Net:   <ethaddr> not set. Reading from E-fuse
Detected MACID:90:d7:eb:d4:14:68
cpsw
Hit any key to stop autoboot:  3 ___ 2 ___ 1 ___ 0 
mmc1 is available
reading boot.scr

278 bytes read
Running bootscript from MMC/SD to set the ENV...
## Executing script at 80900000
reading uImage

2406260 bytes read
bootcmd=if mmc init; then if run loadbootscript; then run bootscript; else echo In case ENV on MMC/SD is required; echo Please put a valid script named boot.scr on the card; echo Refer to the User Guide on how to generate the image; fi; else echo Please set bootargs and bootcmd before booting the kernel; echo If that has already been done please ignore this message; fi
bootdelay=3
baudrate=115200
autoload=yes
verify=yes
bootfile=uImage
ramdisk_file=ramdisk.gz
loadaddr=0x81000000
script_addr=0x80900000
loadbootscript=fatload mmc 1 ${script_addr} boot.scr
bootscript= echo Running bootscript from MMC/SD to set the ENV...; source ${script_addr}
stdin=serial
stdout=serial
stderr=serial
ethaddr=×ëÔ_h_
ethact=cpsw
filesize=24B774
bootargs=console=ttyO0,115200n8 root=/dev/mmcblk0p2 rw mem=128M earlyprink rootwait ip=off noinitrd vram=50M notifyk.vpssm3_sva=0x8DB00000

Environment size: 873/8188 bytes
## Booting kernel from Legacy Image at 80009000 ...
   Image Name:   Linux-2.6.37
   Image Type:   ARM Linux Kernel Image (uncompressed)
   Data Size:    2406196 Bytes = 2.3 MiB
   Load Address: 80008000
   Entry Point:  80008000
   Verifying Checksum ... OK
   Loading Kernel Image ... OK
OK

Starting kernel ...

Uncompressing Linux... done, booting the kernel.
KERNEL VERSION PS600H001.0719
Linux version 2.6.37 (marnow@ubuntu) (gcc version 4.4.1 (Sourcery G++ Lite 2010q1-202) ) #46 Fri Aug 12 14:46:07 PDT 2011
CPU: ARMv7 Processor [413fc082] revision 2 (ARMv7), cr=10c53c7f
CPU: VIPT nonaliasing data cache, VIPT aliasing instruction cache
Machine: ti8148evm
vram size = 52428800 at 0
reserved size = 52428800 at 0
FB: Reserving 52428800 bytes SDRAM for VRAM
Memory policy: ECC disabled, Data cache writeback
[mn]create_mapping: 
[mn]	md->pfn=0x00080000, md->virtual=0xc0000000, __pfn_to_phys=0x04e00000, md->length=0x80000000
[mn]	PAGE_MASK=0xfffff000, addr=0xc0000000, length=0x04e00000, pgd=0xc0007000, phys=0x80000000
[mn]create_mapping: 
[mn]	md->pfn=0x00084dff, md->virtual=0xffff0000, __pfn_to_phys=0x00001000, md->length=0x84dff000
[mn]	PAGE_MASK=0xfffff000, addr=0xffff0000, length=0x00001000, pgd=0xc0007ff8, phys=0x84dff000
[mn]create_mapping: 
[mn]	md->pfn=0x00048000, md->virtual=0xfa000000, __pfn_to_phys=0x00400000, md->length=0x48000000
[mn]	PAGE_MASK=0xfffff000, addr=0xfa000000, length=0x00400000, pgd=0xc0007e80, phys=0x48000000
[mn]create_mapping: 
[mn]	md->pfn=0x00055000, md->virtual=0xf9000000, __pfn_to_phys=0x00100000, md->length=0x55000000
[mn]	PAGE_MASK=0xfffff000, addr=0xf9000000, length=0x00100000, pgd=0xc0007e40, phys=0x55000000
[mn]create_mapping: 
[mn]	md->pfn=0x00047800, md->virtual=0xfb800000, __pfn_to_phys=0x00400000, md->length=0x47800000
[mn]	PAGE_MASK=0xfffff000, addr=0xfb800000, length=0x00400000, pgd=0xc0007ee0, phys=0x47800000
OMAP chip is TI8148 2.0
Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 19712
Kernel command line: console=ttyO0,115200n8 root=/dev/mmcblk0p2 rw mem=128M earlyprink rootwait ip=off noinitrd vram=50M notifyk.vpssm3_sva=0x8DB00000
PID hash table entries: 512 (order: -1, 2048 bytes)
Dentry cache hash table entries: 16384 (order: 4, 65536 bytes)
Inode-cache hash table entries: 8192 (order: 3, 32768 bytes)
Memory: 78MB = 78MB total
Memory: 73544k/73544k available, 57528k reserved, 0K highmem
Virtual kernel memory layout:
    vector  : 0xffff0000 - 0xffff1000   (   4 kB)
    fixmap  : 0xfff00000 - 0xfffe0000   ( 896 kB)
    DMA     : 0xffc00000 - 0xffe00000   (   2 MB)
    vmalloc : 0xc8800000 - 0xf8000000   ( 760 MB)
    lowmem  : 0xc0000000 - 0xc8000000   ( 128 MB)
    modules : 0xbf000000 - 0xc0000000   (  16 MB)
      .init : 0xc0008000 - 0xc0033000   ( 172 kB)
      .text : 0xc0033000 - 0xc0491000   (4472 kB)
      .data : 0xc0492000 - 0xc04d3d20   ( 264 kB)
SLUB: Genslabs=11, HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
NR_IRQS:375
IRQ: Found an INTC at 0xfa200000 (revision 5.0) with 128 interrupts
Total of 128 interrupts on 1 active controller
GPMC revision 6.0
Trying to install interrupt handler for IRQ368
Trying to install interrupt handler for IRQ369
Trying to install interrupt handler for IRQ370
Trying to install interrupt handler for IRQ371
Trying to install interrupt handler for IRQ372
Trying to install interrupt handler for IRQ373
Trying to install interrupt handler for IRQ374
Trying to install type control for IRQ375
Trying to set irq flags for IRQ375
OMAP clockevent source: GPTIMER1 at 20000000 Hz
Console: colour dummy device 80x30
Calibrating delay loop... 599.65 BogoMIPS (lpj=2998272)
pid_max: default: 32768 minimum: 301
Security Framework initialized
Mount-cache hash table entries: 512
CPU: Testing write buffer coherency: ok
devtmpfs: initialized
omap_voltage_early_init: voltage driver support not added
regulator: core version 0.5
Registering platform device 'reg-dummy'. Parent at platform
[mn] device_add: (null)-1
regulator: dummy: 
NET: Registered protocol family 16
Registering platform device 'mpu.0'. Parent at omap
[mn] device_add: (null)0
Registering platform device 'l3_slow.0'. Parent at omap
[mn] device_add: (null)0
Registering platform device 'omap_uart.0'. Parent at omap
[mn] device_add: (null)0
Registering platform device 'omap_uart.1'. Parent at omap
[mn] device_add: (null)1
Registering platform device 'omap_uart.2'. Parent at omap
[mn] device_add: (null)2
Registering platform device 'omap_uart.3'. Parent at omap
[mn] device_add: (null)3
Registering platform device 'omap_uart.4'. Parent at omap
[mn] device_add: (null)4
Registering platform device 'omap_uart.5'. Parent at omap
[mn] device_add: (null)5
Registering platform device 'omap_i2c.1'. Parent at omap
[mn] device_add: (null)1
Registering platform device 'davinci-mcasp.2'. Parent at platform
[mn] device_add: (null)2
[mn] omap_ctrl_base_get()=0xfa140000
[mn] omap_ctrl_readl(0xfa140f98)=0x00000201
[mn] omap_mmc_add: mmci-omap-hs0
Registering platform device 'mmci-omap-hs.0'. Parent at platform
[mn] device_add: (null)0
[mn] omap_mmc_add: mmci-omap-hs1
Registering platform device 'mmci-omap-hs.1'. Parent at platform
[mn] device_add: (null)1
[mn] omap2_hsmmc_init exit>
Registering platform device 'omap2-nand.0'. Parent at platform
[mn] device_add: (null)0
Registering platform device 'musb-ti81xx.0'. Parent at platform
[mn] device_add: (null)0
Registering platform device 'musb-ti81xx.1'. Parent at platform
[mn] device_add: (null)1
Registering platform device 'vpss'. Parent at platform
[mn] device_add: (null)-1
registered ti814x_vpss device
Registering platform device 'TI81XX_HDMI'. Parent at platform
[mn] device_add: (null)-1
registered TI814x on-chip HDMI device
Registering platform device 'omap-mailbox'. Parent at platform
[mn] device_add: (null)-1
Registering platform device 'omap2_mcspi.1'. Parent at platform
[mn] device_add: (null)1
Registering platform device 'omap2_mcspi.2'. Parent at platform
[mn] device_add: (null)2
Registering platform device 'omap2_mcspi.3'. Parent at platform
[mn] device_add: (null)3
Registering platform device 'omap2_mcspi.4'. Parent at platform
[mn] device_add: (null)4
Registering platform device 'arm-pmu.0'. Parent at platform
[mn] device_add: (null)0
Registering platform device 'davinci_mdio.0'. Parent at platform
[mn] device_add: (null)0
Registering platform device 'cpsw.0'. Parent at platform
[mn] device_add: (null)0
Registering platform device 'edma'. Parent at platform
[mn] device_add: (null)-1
Registering platform device 'davinci-pcm-audio'. Parent at platform
[mn] device_add: (null)-1
Registering platform device 'ahci.0'. Parent at platform
[mn] device_add: (null)0
pm_dbg_init: only OMAP3 supported
Registered ti81xx_fb device
Registering platform device 'ti81xxfb'. Parent at platform
[mn] device_add: (null)-1
Could not look up wd_timer-1 hwmod
bio: create slab <bio-0> at 0
SCSI subsystem initialized
usbcore: registered new interface driver usbfs
usbcore: registered new interface driver hub
usbcore: registered new device driver usb
Registering platform device 'musb-hdrc.0'. Parent at musb-ti81xx.0
[mn] device_add: (null)0
Registering platform device 'musb-hdrc.1'. Parent at musb-ti81xx.1
[mn] device_add: (null)1
omap_i2c omap_i2c.1: bus 1 rev4.0 at 100 kHz
Advanced Linux Sound Architecture Driver Version 1.0.23.
Switching to clocksource gp timer
musb-hdrc: version 6.0, host, debug=0
musb-hdrc musb-hdrc.0: dma type: dma-cppi41
Registering platform device 'nop_usb_xceiv.0'. Parent at platform
[mn] device_add: (null)0
registerd cppi-dma Intr @ IRQ 17
Cppi41 Init Done
musb-hdrc musb-hdrc.0: MUSB HDRC host driver
musb-hdrc musb-hdrc.0: new USB bus registered, assigned bus number 1
usb usb1: New USB device found, idVendor=1d6b, idProduct=0002
usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb1: Product: MUSB HDRC host driver
usb usb1: Manufacturer: Linux 2.6.37 musb-hcd
usb usb1: SerialNumber: musb-hdrc.0
hub 1-0:1.0: USB hub found
hub 1-0:1.0: 1 port detected
musb-hdrc musb-hdrc.0: USB Host mode controller at c880c000 using DMA, IRQ 18
musb-hdrc musb-hdrc.1: dma type: dma-cppi41
Registering platform device 'nop_usb_xceiv.1'. Parent at platform
[mn] device_add: (null)1
musb-hdrc musb-hdrc.1: MUSB HDRC host driver
musb-hdrc musb-hdrc.1: new USB bus registered, assigned bus number 2
usb usb2: New USB device found, idVendor=1d6b, idProduct=0002
usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb2: Product: MUSB HDRC host driver
usb usb2: Manufacturer: Linux 2.6.37 musb-hcd
usb usb2: SerialNumber: musb-hdrc.1
hub 2-0:1.0: USB hub found
hub 2-0:1.0: 1 port detected
musb-hdrc musb-hdrc.1: USB Host mode controller at c881e800 using DMA, IRQ 19
NET: Registered protocol family 2
IP route cache hash table entries: 1024 (order: 0, 4096 bytes)
TCP established hash table entries: 4096 (order: 3, 32768 bytes)
TCP bind hash table entries: 4096 (order: 2, 16384 bytes)
TCP: Hash tables configured (established 4096 bind 4096)
TCP reno registered
UDP hash table entries: 256 (order: 0, 4096 bytes)
UDP-Lite hash table entries: 256 (order: 0, 4096 bytes)
NET: Registered protocol family 1
RPC: Registered udp transport module.
RPC: Registered tcp transport module.
RPC: Registered tcp NFSv4.1 backchannel transport module.
NetWinder Floating Point Emulator V0.97 (double precision)
PMU: registered new PMU device of type 0
Registering platform device 'omap-iommu.0'. Parent at platform
[mn] device_add: (null)0
Registering platform device 'omap-iommu.1'. Parent at platform
[mn] device_add: (null)1
omap-iommu omap-iommu.0: ducati registered
omap-iommu omap-iommu.1: sys registered
JFFS2 version 2.2. (NAND) Â© 2001-2006 Red Hat, Inc.
msgmni has been set to 143
io scheduler noop registered
io scheduler deadline registered
io scheduler cfq registered (default)
Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
Registering platform device 'serial8250'. Parent at platform
[mn] device_add: (null)-1
omap_uart.0: ttyO0 at MMIO 0x48020000 (irq = 72) is a OMAP UART0
console [ttyO0] enabled
omap_uart.1: ttyO1 at MMIO 0x48022000 (irq = 73) is a OMAP UART1
omap_uart.2: ttyO2 at MMIO 0x48024000 (irq = 74) is a OMAP UART2
omap_uart.3: ttyO3 at MMIO 0x481a6000 (irq = 44) is a OMAP UART3
omap_uart.4: ttyO4 at MMIO 0x481a8000 (irq = 45) is a OMAP UART4
omap_uart.5: ttyO5 at MMIO 0x481aa000 (irq = 46) is a OMAP UART5
brd: module loaded
loop: module loaded
ahci ahci.0: forcing PORTS_IMPL to 0x1
ahci ahci.0: AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl platform mode
ahci ahci.0: flags: ncq sntf pm led clo only pmp pio slum part ccc apst 
scsi0 : ahci_platform
ata1: SATA max UDMA/133 mmio [mem 0x4a140000-0x4a150fff] port 0x100 irq 16
m25p80 spi1.0: found mx25l6405d, expected w25x32
m25p80 spi1.0: mx25l6405d (8192 Kbytes)
Creating 5 MTD partitions on "spi_flash":
0x000000000000-0x000000020000 : "U-Boot-min"
0x000000020000-0x000000060000 : "U-Boot"
0x000000060000-0x000000062000 : "U-Boot Env"
mtd: partition "U-Boot Env" doesn't end on an erase block -- force read-only
0x000000062000-0x0000002e2000 : "Kernel"
mtd: partition "Kernel" doesn't start on an erase block boundary -- force read-only
0x0000002e2000-0x000000800000 : "File System"
mtd: partition "File System" doesn't start on an erase block boundary -- force read-only
omap2-nand driver initializing
No NAND device found.
nand_get_flash_type: second ID read did not match 14,14 against 04,04
No NAND device found.
davinci_mdio davinci_mdio.0: davinci mdio revision 1.6
davinci_mdio davinci_mdio.0: detected phy mask fffffffe
davinci_mdio.0: probed
davinci_mdio davinci_mdio.0: phy[0]: device 0:00, driver unknown
usbcore: registered new interface driver cdc_ether
usbcore: registered new interface driver dm9601
Initializing USB Mass Storage driver...
usbcore: registered new interface driver usb-storage
USB Mass Storage support registered.
mice: PS/2 mouse device common for all mice
i2c /dev entries driver
Linux video capture interface: v2.00
usbcore: registered new interface driver uvcvideo
USB Video Class driver (v1.0.0)
[mn]omap_hsmmc_probe:  device=mmci-omap-hs id=0 reg_offset=0x0
[mn]omap_hsmmc_probe:  res->start=0x481d8100 res->end=0x481e80ff
[mn]mmc_alloc_host - name: mmc0 (null)
[mn]omap_hsmmc_probe:  host->mapbase=0x481d8100 host->base=0xfa1d8100
	fclk struct = c04a39cc
	MMCHS_1_CLKCTRL_reg[0xfa181620] = 0x00000002
	MMCHS_2_CLKCTRL_reg[0xfa181624] = 0x00030000
[mn]  omap_hsmmc_conf_bus_power host_id=0
[mn]  omap_hsmmc_conf_bus_power host_base=0xfa1d8100
[mn]  omap_hsmmc_conf_bus_power HCTL
[mn]  omap_hsmmc_conf_bus_power CAPA
[mn]  omap_hsmmc_conf_bus_power SYSCONFIG
[mn]  omap_hsmmc_conf_bus_power exit>
[mn], mmc_add_host device_add((null)) 
[mn] omap_hsmmc_set_ios for mmc0, SYSCLK=0xe0207
[mn] omap_hsmmc_set_ios host->fclk=192000000 SYSCLK=0xe0003
[mn] - 1 executed for mmc1slot1
[mn]omap_hsmmc_probe:  device=mmci-omap-hs id=1 reg_offset=0x0
[mn]omap_hsmmc_probe:  res->start=0x47810100 res->end=0x478200ff
[mn]mmc_alloc_host - name: mmc1 (null)
[mn]omap_hsmmc_probe:  host->mapbase=0x47810100 host->base=0xfb810100
	fclk struct = c04a3a48
	MMCHS_1_CLKCTRL_reg[0xfa181620] = 0x00000002
	MMCHS_2_CLKCTRL_reg[0xfa181624] = 0x00030000
	MMCHS_2_CLKCTRL_reg[0xfa181624] = 0x00000002
[mn]  omap_hsmmc_conf_bus_power host_id=1
[mn]  omap_hsmmc_conf_bus_power host_base=0xfb810100
[mn]  omap_hsmmc_conf_bus_power HCTL
[mn]  omap_hsmmc_conf_bus_power CAPA
[mn]  omap_hsmmc_conf_bus_power SYSCONFIG
[mn]  omap_hsmmc_conf_bus_power exit>
[mn], mmc_add_host device_add((null)) 
[mn] omap_hsmmc_set_ios for mmc1, SYSCLK=0x0
[mn] omap_hsmmc_set_ios host->fclk=192000000 SYSCLK=0xe0003
[mn] - 1 executed for mmc2slot1
[mn] mmc_rescan for host0
[mn] omap_hsmmc_card_detect for mmc1slot1 slot 0
[mn] omap_hsmmc_card_detect enabled=0, base=0xfa1d8100, PSTATE=0x1
mmc0: mmc_rescan: trying to init card at 400000 Hz
[mn] omap_hsmmc_set_ios for mmc0, SYSCLK=0xe0007
[mn] omap_hsmmc_set_ios host->fclk=192000000 SYSCLK=0xe0003
usbcore: registered new interface driver usbhid
usbhid: USB HID core driver
notify_init : notify drivercreated  for  remote proc id 2 at physical Address 0x8db00000
usbcore: registered new interface driver snd-usb-audio
Registering platform device 'soc-audio.0'. Parent at platform
asoc: tlv320aic3x-hifi <-> davinci-mcasp.2 mapping ok
[mn] device_add: (null)0
ALSA device list:
  #0: TI81XX EVM
TCP cubic registered
NET: Registered protocol family 17
Registering the dns_resolver key type
VFP support v0.3: implementor 41 architecture 3 part 30 variant c rev 3
omap_voltage_late_init: Voltage driver support not added
Detected MACID=0:0:0:0:0:0
[mn] omap_hsmmc_set_ios for mmc0, SYSCLK=0xe0007
[mn] omap_hsmmc_set_ios host->fclk=192000000 SYSCLK=0xe7803
usb 2-1: new high speed USB device using musb-hdrc and address 2
ata1: SATA link down (SStatus 0 SControl 300)
Waiting for root device /dev/mmcblk0p2...
[mn] omap_hsmmc_set_ios for mmc0, SYSCLK=0xe7807
[mn] omap_hsmmc_set_ios host->fclk=192000000 SYSCLK=0xe7803
[mn] omap_hsmmc_set_ios for mmc0, SYSCLK=0xe7807
[mn] omap_hsmmc_set_ios host->fclk=192000000 SYSCLK=0xe7803
[mn] mmc_rescan SD, err=0
[mn] mmc_attach_sd
[mn] omap_hsmmc_set_ios for mmc0, SYSCLK=0xe7807
[mn] omap_hsmmc_set_ios host->fclk=192000000 SYSCLK=0xe7803
[mn] omap_hsmmc_set_ios for mmc0, SYSCLK=0xe7807
[mn] omap_hsmmc_set_ios host->fclk=192000000 SYSCLK=0xe7803
[mn] omap_hsmmc_set_ios for mmc0, SYSCLK=0xe7807
[mn] omap_hsmmc_set_ios host->fclk=192000000 SYSCLK=0xe7803
[mn] omap_hsmmc_set_ios for mmc0, SYSCLK=0xe7807
[mn] omap_hsmmc_set_ios host->fclk=192000000 SYSCLK=0xe7803
mmc readonly
[mn] omap_hsmmc_set_ios for mmc0, SYSCLK=0x37807
[mn] omap_hsmmc_set_ios host->fclk=192000000 SYSCLK=0xf7803
[mn] omap_hsmmc_set_ios for mmc0, SYSCLK=0xf7807
[mn] omap_hsmmc_set_ios host->fclk=192000000 SYSCLK=0xf0103
[mn] omap_hsmmc_set_ios for mmc0, SYSCLK=0xf0107
[mn] omap_hsmmc_set_ios host->fclk=192000000 SYSCLK=0xf0103
mmc0: new high speed SD card at address 0002
mmcblk0: mmc0:0002 00000 974 MiB 
 mmcblk0: p1 p2
[mn] mmc_rescan OUT for host0
[mn] mmc_rescan for host1
[mn] omap_hsmmc_card_detect for mmc2slot1 slot 0
[mn] omap_hsmmc_card_detect enabled=0, base=0xfb810100, PSTATE=0x1
mmc1: mmc_rescan: trying to init card at 400000 Hz
[mn] omap_hsmmc_set_ios for mmc1, SYSCLK=0xe0007
[mn] omap_hsmmc_set_ios host->fclk=192000000 SYSCLK=0xe0003
usb 2-1: New USB device found, idVendor=03f0, idProduct=0032
usb 2-1: New USB device strings: Mfr=0, Product=0, SerialNumber=0
hub 2-1:1.0: USB hub found
[mn] omap_hsmmc_set_ios for mmc1, SYSCLK=0xe0007
[mn] omap_hsmmc_set_ios host->fclk=192000000 SYSCLK=0xe7803
hub 2-1:1.0: 4 ports detected
EXT3-fs: barriers not enabled
kjournald starting.  Commit interval 5 seconds
EXT3-fs (mmcblk0p2): warning: maximal mount count reached, running e2fsck is recommended
[mn] omap_hsmmc_set_ios for mmc1, SYSCLK=0xe7807
[mn] omap_hsmmc_set_ios host->fclk=192000000 SYSCLK=0xe7803
[mn] omap_hsmmc_set_ios for mmc1, SYSCLK=0xe7807
[mn] omap_hsmmc_set_ios host->fclk=192000000 SYSCLK=0xe7803
[mn] mmc_rescan SD, err=-110
[mn] mmc_rescan MMC, err=0
[mn] mmc1 mmc_attach_mmc start ocr=0xff8080->
[mn] mmc1 mmc_attach_mmc: calls mmc_select_voltages
[mn] omap_hsmmc_set_ios for mmc1, SYSCLK=0xe7807
[mn] omap_hsmmc_set_ios host->fclk=192000000 SYSCLK=0xe7803
[mn] mmc1 mmc_attach_mmc: calls mmc_init_card
[mn] omap_hsmmc_set_ios for mmc1, SYSCLK=0xe7807
[mn] omap_hsmmc_set_ios host->fclk=192000000 SYSCLK=0xe7803
[mn] omap_hsmmc_set_ios for mmc1, SYSCLK=0xe7807
[mn] omap_hsmmc_set_ios host->fclk=192000000 SYSCLK=0xe7803
[mn] mmc_init_card: fetch CID from card
[mn] mmc_init_card: cid=0x45010053454d30324790715950c35ebb
[mn] mmc_init_card: mmc_alloc_card
[mn] mmc_init_card: set card RCA
[mn] omap_hsmmc_set_ios for mmc1, SYSCLK=0xe7807
[mn] omap_hsmmc_set_ios host->fclk=192000000 SYSCLK=0xe7803
[mn] mmc_init_card: Fetch CSD
[mn] mmc_init_card: mmc_decode_csd
[mn] mmc_init_card: mmc_decode_cid
[mn] mmc_init_card: mmc_select_card
[mn] mmc_init_card: mmc_read_ext_csd
[mn] mmc_read_ext_csd: mmc_send_ext_csd
[mn] mmc_send_ext_csd: mmc_wait_for_req
[mn] mmc_send_ext_csd: data received
[mn] mmc_read_ext_csd: mmc_send_ext_csd err=0
[mn] mmc_init_card: mmc_set_erase_size
[mn] mmc_init_card: mmc_switch
[mn] mmc_init_card: mmc_card_set_highspeed
[mn] omap_hsmmc_set_ios for mmc1, SYSCLK=0x37807
[mn] omap_hsmmc_set_ios host->fclk=192000000 SYSCLK=0xf7803
[mn] mmc_init_card: mmc_set_clock
[mn] omap_hsmmc_set_ios for mmc1, SYSCLK=0xf7807
[mn] omap_hsmmc_set_ios host->fclk=192000000 SYSCLK=0xf0101
[mn] mmc_init_card: activate wide bus and DDR
EXT3-fs (mmcblk0p2): 
using internal journal
EXT3-fs (mmcblk0p2): mounted filesystem with writeback data mode
VFS: Mounted root (ext3 filesystem) on device 179:2.
[mn] omap_hsmmc_set_ios for mmc1, SYSCLK=0xa0107
[mn] omap_hsmmc_set_ios host->fclk=192000000 SYSCLK=0xe0103
[mn] mmc1 mmc_attach_mmc: calls mmc_release_host
[mn] mmc1 mmc_attach_mmc: calls mmc_add_card
mmc1: new high speed MMC card at address 0001
mmcblk1: mmc1:0001 SEM02G 1.82 GiB 
devtmpfs: mounted
Freeing init memory: 172K
 mmcblk1: unknown partition table
[mn] mmc1 mmc_attach_mmc end->
[mn] mmc_rescan OUT for host1
INIT: version 2.86 booting
Please wait: booting...
Error opening /dev/fb0: No such file or directory
Starting udev
udevd (79): /proc/79/oom_adj is deprecated, please use /proc/79/oom_score_adj instead.
FAT: bogus number of reserved sectors
VFS: Can't find a valid FAT filesystem on dev mmcblk1.
Remounting root file system...
Caching udev devnodes
Populating dev cache
ALSA: Restoring mixer settings...
Configuring network interfaces... 
CPSW phy found : id is : 0x4dd074
udhcpc (v1.13.2) started
Sending discover...
Sending discover...
Sending discover...
No lease, forking to background
done.
Setting up IP spoofing protection: rp_filter.
hwclock: can't open '/dev/misc/rtc': No such file or directory
Tue Mar 15 12:00:00 UTC 2011
hwclock: can't open '/dev/misc/rtc': No such file or directory
INIT: Entering runlevel: 5
Starting system message bus: dbus.
Starting telnet daemon.
Starting syslogd/klogd: done
Starting thttpd.

 _____                    _____           _         _   
|  _  |___ ___ ___ ___   |  _  |___ ___  |_|___ ___| |_ 
|     |  _| .'| . | . |  |   __|  _| . | | | -_|  _|  _|
|__|__|_| |__,|_  |___|  |__|  |_| |___|_| |___|___|_|  
              |___|                    |___|            

Arago Project http://arago-project.org dm814x-evm ttyO0

Arago 2010.11 dm814x-evm ttyO0

dm814x-evm login: root
root@dm814x-evm:~# cd dev_ __ __ _/dev
root@dm814x-evm:/dev# ls
block               ram11               tty38
bus                 ram12               tty39
char                ram13               tty4
console             ram14               tty40
cpu_dma_latency     ram15               tty41
disk                ram2                tty42
full                ram3                tty43
i2c-1               ram4                tty44
initctl             ram5                tty45
input               ram6                tty46
kmem                ram7                tty47
kmsg                ram8                tty48
log                 ram9                tty49
loop0               random              tty5
loop1               shm                 tty50
loop2               snd                 tty51
loop3               tty                 tty52
loop4               tty0                tty53
loop5               tty1                tty54
loop6               tty10               tty55
loop7               tty11               tty56
mem                 tty12               tty57
mmcblk0             tty13               tty58
mmcblk0p1           tty14               tty59
mmcblk0p2           tty15               tty6
mmcblk1             tty16               tty60
mtd0                tty17               tty61
mtd0ro              tty18               tty62
mtd1                tty19               tty63
mtd1ro              tty2                tty7
mtd2                tty20               tty8
mtd2ro              tty21               tty9
mtd3                tty22               ttyO0
mtd3ro              tty23               ttyO1
mtd4                tty24               ttyO2
mtd4ro              tty25               ttyO3
mtdblock0           tty26               ttyO4
mtdblock1           tty27               ttyO5
mtdblock2           tty28               ttyS0
mtdblock3           tty29               ttyS1
mtdblock4           tty3                ttyS2
network_latency     tty30               ttyS3
network_throughput  tty31               udev_network_queue
null                tty32               urandom
ptmx                tty33               vcs
pts                 tty34               vcs1
ram0                tty35               vcsa
ram1                tty36               vcsa1
ram10               tty37               zero
root@dm814x-evm:/dev# fdisk mmcblk1
Device contains neither a valid DOS partition table, nor Sun, SGI or OSF disklabel
Building a new DOS disklabel with disk identifier 0x52ad2573.
Changes will remain in memory only, until you decide to write them.
After that, of course, the previous content won't be recoverable.

Warning: invalid flag 0x0000 of partition table 4 will be corrected by w(rite)

The number of cylinders for this disk is set to 59776.
There is nothing wrong with that, but this is larger than 1024,
and could in certain setups cause problems with:
1) software that runs at boot time (e.g., old versions of LILO)
2) booting and partitioning software from other OSs
   (e.g., DOS FDISK, OS/2 FDISK)

Command (m for help): q

root@dm814x-evm:/dev#
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