/*
 * Setup platform-specific memory map, CLK rate, etc.
 */
var mem_ext = [
    // will use for cmem: base: 0x87800000 (120MB offset), size: 0x04200000 (66MB)
{
    comment:    "DDRALGHEAP: off-chip memory for dynamic algmem allocation",
    name:       "DDRALGHEAP",
    base:       0x8BA00000,   
    len:        0x04000000,   // 66MB
    space:      "code/data"
},
{
    comment:    "DDR2: off-chip memory for code and data",
    name:       "DDR2",
    base:       0x8FA00000,   // 250MB offset
    len:        0x00400000,   // 4MB size
    space:      "code/data"
},
{
    comment:    "DSPLINK: off-chip memory for DSPLINK code and data",
    name:       "DSPLINKMEM",
    base:       0x8FE00000,   // 254MB
    len:        0x00100000,   //   1MB
    space:      "code/data"
},
{
    comment:    "RESET_VECTOR: off-chip memory for the reset vector table",
    name:       "RESET_VECTOR",
    base:       0x8FF00000,
    len:        0x00000080,
    space:      "code/data"
},
];

/* Specify the L2 memory setting */
var device_regs = {
    l1PMode: "32k",
    l1DMode: "32k",
    l2Mode: "32k"
};

var params = {
    clockRate: 594,
    catalogName: "ti.catalog.c6000",
    deviceName: "DM6467",
    regs: device_regs,
    mem: mem_ext
};

/*
 * Customize generic platform with parameters specified above.
 */
utils.loadPlatform("ti.platforms.generic", params);

/*  ===========================================================================
 *  Enable heaps and tasks
 *  ===========================================================================
 */
bios.enableMemoryHeaps(prog);
bios.enableTskManager(prog);

/*  ===========================================================================
 *  Create heaps in memory segments that are to have heap
 *  ===========================================================================
 */
bios.DDR2.createHeap = true;
bios.DDR2.heapSize   = 0x00040000; // 256K

bios.DDRALGHEAP.createHeap = true; 
bios.DDRALGHEAP.heapSize   = bios.DDRALGHEAP.len;

/*  ===========================================================================
 *  GBL
 *  ===========================================================================
 */
prog.module("GBL").ENABLEALLTRC    = false;
prog.module("GBL").PROCID          = 0;

/*
bios.MEM.instance("IRAM").base = 0x11818000;
bios.MEM.instance("IRAM").len = 0x18000;
bios.MEM.instance("CACHE_L2").base = 0x11818000+0x18000;
bios.MEM.instance("CACHE_L2").len = 0x8000;
*/

prog.module("GBL").C64PLUSCONFIGURE   = true ;
prog.module("GBL").C64PLUSMAR128to159 = 0x0000ffff;

/*  ===========================================================================
 *  HWI
 *  ===========================================================================
 */
bios.HWI_INT4.interruptSelectNumber = 16
bios.HWI_INT5.interruptSelectNumber = 17

/*  ===========================================================================
 *  MEM
 *  ===========================================================================
 */
prog.module("MEM").STACKSIZE = 0x1000 ;
prog.module("TSK").STACKSIZE = 0x1000 ;

/*  ===========================================================================
 *  Global Settings
 *  ===========================================================================
 */
prog.module("MEM").ARGSSIZE = 200;


/*  ===========================================================================
 *  Enable MSGQ and POOL Managers
 *  ===========================================================================
 */
bios.MSGQ.ENABLEMSGQ = true;
bios.POOL.ENABLEPOOL = true;

/*  ===========================================================================
 *  Set all code and data sections to use DDR
 *  ===========================================================================
 */
bios.setMemCodeSections (prog, bios.DDR2) ;
bios.setMemDataNoHeapSections (prog, bios.DDR2) ;
bios.setMemDataHeapSections (prog, bios.DDRALGHEAP) ;

/*  ===========================================================================
 *  MEM : Global
 *  ===========================================================================
 */
prog.module("MEM").BIOSOBJSEG = bios.DDRALGHEAP;
prog.module("MEM").MALLOCSEG  = bios.DDRALGHEAP;

/*  ===========================================================================
 *  TSK : Global
 *  ===========================================================================
 */
prog.module("TSK").STACKSEG = bios.DDRALGHEAP ;

bios.TSK.instance("TSK_idle").stackSize = 0x1000;

//Fix for clock
prog.module("CLK").SPECIFYRATE = true;
prog.module("CLK").INPUTCLK = 148.5;

/*  ===========================================================================
 *  Generate configuration files...
 *  ===========================================================================
 */
if (config.hasReportedError == false) {

bios.MEM.instance("IRAM").createHeap = 1;
bios.MEM.instance("IRAM").heapSize = 0x18000;
bios.MEM.instance("IRAM").enableHeapLabel = 1;
bios.MEM.instance("IRAM").heapLabel = prog.extern("IRAM_HEAP", "asm");

/* Add these two lines to create a LOG buffer of length 1024 words */
bios.LOG.create("CANNY_TI_trace");
bios.LOG.instance("CANNY_TI_trace").bufLen = 1024;
/* end of add CANNY_TI_trace */

// !GRAPHICAL_CONFIG_TOOL_SCRIPT_INSERT_POINT!

    prog.gen();
}