/*############################################################################

 FILE:   DSP2833x_nonBIOS_flash.cmd

 DESCRIPTION:  Linker allocation for all sections. 
############################################################################
 Author: Tim Love
 Release Date: 	March 2008
############################################################################*/


MEMORY
{
PAGE 0:    /* Program Memory */
           /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */

	ZONE0            : origin = 0x004000, length = 0x001000     /* XINTF zone 0 */
	RAM_L0L1L2L3L4L5L6 : origin = 0x008000, length = 0x007000	   /* on-chip RAM */
   	OTP              : origin = 0x380400, length = 0x000400     /* on-chip OTP */
    ZONE6            : origin = 0x100000, length = 0x100000     /* XINTF zone 6 */ 
    ZONE7A           : origin = 0x200000, length = 0x00FC00     /* XINTF zone 7 - program space */
   	FLASHH           : origin = 0x300000, length = 0x008000     /* on-chip FLASH */
    FLASHG           : origin = 0x308000, length = 0x008000     /* on-chip FLASH */
    FLASHF           : origin = 0x310000, length = 0x008000     /* on-chip FLASH */
    FLASHE           : origin = 0x318000, length = 0x008000     /* on-chip FLASH */
    FLASHD           : origin = 0x320000, length = 0x008000     /* on-chip FLASH */
    FLASHC           : origin = 0x328000, length = 0x008000     /* on-chip FLASH */
    FLASHAB          : origin = 0x330000, length = 0x00FF80     /* on-chip FLASH */
    CSM_RSVD         : origin = 0x33FF80, length = 0x000076     /* Part of FLASHA.  Program with all 0x0000 when CSM is in use. */
    BEGIN_FLASH      : origin = 0x33FFF6, length = 0x000002     /* Part of FLASHA.  Used for "boot to Flash" bootloader mode. */
    CSM_PWL          : origin = 0x33FFF8, length = 0x000008     /* Part of FLASHA.  CSM password locations in FLASHA */
    ADC_CAL          : origin = 0x380080, length = 0x000009	   /* Part of TI OTP */
    IQTABLES         : origin = 0x3FE000, length = 0x000b50     /* IQ Math Tables in Boot ROM */
    IQTABLES2        : origin = 0x3FEB50, length = 0x00008c     /* IQ Math Tables in Boot ROM */  
    FPUTABLES        : origin = 0x3FEBDC, length = 0x0006A0     /* FPU Tables in Boot ROM */
    ROM              : origin = 0x3FF27C, length = 0x000D44     /* Boot ROM */
   	RESET            : origin = 0x3FFFC0, length = 0x000002     /* part of boot ROM  */
   	VECTORS          : origin = 0x3FFFC2, length = 0x00003E     /* part of boot ROM  */


PAGE 1 :   /* Data Memory */
           /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE0 for program allocation */
           /* Registers remain on PAGE1                                                  */

   	RAMM0            : origin = 0x000000, length = 0x000400     /* on-chip RAM block M0 */
   	BOOT_RSVD        : origin = 0x000400, length = 0x000080     /* Part of M1, BOOT rom will use this for stack */
   	RAMM1            : origin = 0x000480, length = 0x000380     /* on-chip RAM block M1 */
/*
    RAML6            : origin = 0x00E000, length = 0x001000    
*/
    RAML7            : origin = 0x00F000, length = 0x001000 
    ZONE7B           : origin = 0x20FC00, length = 0x000400     /* XINTF zone 7 - data space */
}

/**************************************************************/
/* Link all user defined sections                             */
/**************************************************************/
SECTIONS
{
   /* Allocate program areas: */
   /* The Flash API functions can be grouped together as shown below.
      The defined symbols _Flash28_API_LoadStart, _Flash28_API_LoadEnd
      and _Flash28_API_RunStart are used to copy the API functions out
      of flash memory and into SARAM */
   Flash28_API:
   {
        -lrts_lib\\Flash28335_API_V210.lib(.econst) 
        -lrts_lib\\Flash28335_API_V210.lib(.text)
   }                   LOAD = FLASHAB, 
                       RUN = RAM_L0L1L2L3L4L5L6,
                       LOAD_START(_Flash28_API_LoadStart),
                       LOAD_END(_Flash28_API_LoadEnd),
                       RUN_START(_Flash28_API_RunStart),
                       PAGE = 0
/*		rts2800_fpu32:
   {
        -lrts2800_fpu32.lib(.econst)
        -lrts2800_fpu32.lib(.text)
   }                   LOAD = FLASHAB, 
                       RUN = RAM_L0L1L2L3L4L5L6,
                       LOAD_START(_rts2800_fpu32_LoadStart),
                       LOAD_END(_rts2800_fpu32_LoadEnd),
                       RUN_START(_rts2800_fpu32_RunStart),
                       PAGE = 0

 /*        rts2800_fpu32_fast_supplement:
   {
       /* -lrts2800_fpu32_fast_supplement.lib(.econst) */
 /*       -lrts2800_fpu32_fast_supplement.lib(.text)
   }                   LOAD = FLASHAB, 
                       RUN = RAM_L0L1L2L3L4L5L6,
                       LOAD_START(_rts2800_fpu32_fast_supplement_LoadStart),
                       LOAD_END(_rts2800_fpu32_fast_supplement_LoadEnd),
                       RUN_START(_rts2800_fpu32_fast_supplement_RunStart),
                       PAGE = 0

/*** Code Security Password Locations ***/
   	csmpasswds      : > CSM_PWL     	PAGE = 0
   	csm_rsvd        : > CSM_RSVD    	PAGE = 0

/*** User Defined Sections ***/
   	codestart       : > BEGIN_FLASH,	PAGE = 0        /* Used by file CodeStartBranch.asm */
   	wddisable		: > FLASHAB,			PAGE = 0	
  	copysections	: > FLASHAB,			PAGE = 0
    ramfuncs        : > FLASHAB,         PAGE = 0  
/*    ramfuncs        :   LOAD = FLASHAB,PAGE = 0        /* can be ROM */ 
/*                        RUN = RAM_L0L1L2L3L4L5L6, PAGE = 0   		 /* must be CSM secured RAM */
/*                        LOAD_START(_RamfuncsLoadStart),
//                        LOAD_END(_RamfuncsLoadEnd),
//                        RUN_START(_RamfuncsRunStart) */

	 /* Allocate IQ math areas: */
   IQmath           : > FLASHC     		PAGE = 0        /* Math Code */
   IQmathTables     : > IQTABLES,  		PAGE = 0, TYPE = NOLOAD 
   IQmathTables2    : > IQTABLES2, 		PAGE = 0, TYPE = NOLOAD 
   FPUmathTables    : > FPUTABLES, 		PAGE = 0, TYPE = NOLOAD 
         
   /* Allocate DMA-accessible RAM sections: */
   DMARAML6         : > RAML7,     PAGE = 1
   DMARAML7         : > RAML7,     PAGE = 1
   
   /* Allocate 0x400 of XINTF Zone 7 to storing data */
   ZONE7DATA        : > ZONE7B,    		PAGE = 1

/* Allocate ADC_cal function (pre-programmed by factory into TI reserved memory) */
   .adc_cal     	: load = ADC_CAL,   PAGE = 0, TYPE = NOLOAD 

/* .reset is a standard section used by the compiler.  It contains the */ 
/* the address of the start of _c_int00 for C Code.   /*
/* When using the boot ROM this section and the CPU vector */
/* table is not needed.  Thus the default type is set here to  */
/* DSECT  */ 
	.reset         	: > RESET,      	PAGE = 0, TYPE = DSECT
	vectors         : > VECTORS     	PAGE = 0, TYPE = DSECT

/*** Uninitialized Sections ***/
   	.stack          : > RAMM0       	PAGE = 1
   	.ebss           : > RAML7       	PAGE = 1
   	.esysmem        : > RAMM1       	PAGE = 1

/*** Initialized Sections ***/                                          
  	.cinit			:	LOAD = FLASHAB,		PAGE = 0        /* can be ROM */ 
    /*            		RUN = RAM_L0L1L2L3L4L5L6, PAGE = 0   		/* must be CSM secured RAM */
     /*                	LOAD_START(_cinit_loadstart),
                		RUN_START(_cinit_runstart),
                		SIZE(_cinit_size)*/

	.const			:   LOAD = FLASHAB,  	PAGE = 0        /* can be ROM */ 
	               		RUN = RAM_L0L1L2L3L4L5L6,	PAGE = 0        /* must be CSM secured RAM */
	               		LOAD_START(_const_loadstart),
                		RUN_START(_const_runstart),
                		SIZE(_const_size)

	.econst			:   LOAD = FLASHAB,  	PAGE = 0        /* can be ROM */ 
                		RUN = RAM_L0L1L2L3L4L5L6, PAGE = 0        /* must be CSM secured RAM */
                		LOAD_START(_econst_loadstart),
               			RUN_START(_econst_runstart),
                		SIZE(_econst_size)

	.pinit			:   LOAD = FLASHAB,  	PAGE = 0        /* can be ROM */ 
                 		RUN = RAM_L0L1L2L3L4L5L6, PAGE = 0        /* must be CSM secured RAM */
                		LOAD_START(_pinit_loadstart),
                		RUN_START(_pinit_runstart),
                		SIZE(_pinit_size)

	.switch			:   LOAD = FLASHAB,  	PAGE = 0        /* can be ROM */ 
                		RUN = RAM_L0L1L2L3L4L5L6, PAGE = 0        /* must be CSM secured RAM */
                		LOAD_START(_switch_loadstart),
                		RUN_START(_switch_runstart),
                		SIZE(_switch_size)

	
	.text_flash : /* Build .text output section */
	{
	    /*DSP2833x_Sci.obj (.text) */
	    DSP2833x_I2c.obj (.text)
	   /* DSP2833x_CpuTimers.obj (.text)    when Flash Download, makes an error */	
	    DSP2833x_Display.obj (.text)
	    DSP2833x_Mcbsp.obj (.text)
		DSP2833x_Spi.obj (.text)
		ResetVar.obj(.text)
	    
	}	LOAD = FLASHAB, 		PAGE = 0        /* can be ROM */ 

	.text	          :   
	{
		*(.text)
	}
						LOAD = FLASHAB, 		PAGE = 0        /* can be ROM */ 
                		RUN = RAM_L0L1L2L3L4L5L6, PAGE = 0        /* must be CSM secured RAM */
                		LOAD_START(_text_loadstart),
                		RUN_START(_text_runstart),
                		SIZE(_text_size) 

}


/******************* end of file ************************/