/* =================== ============================== C++ SOURCE FILE ============================== =================== *//** (Description of file) \n\n \file Copyright (c) Endress+Hauser AG \n All rights reserved. *///=========================================================================== /* CHANGE HISTORY: --------------- Date Author Description xx.xx.xxxx xxx xxx */ /*---------------------------------------------------------------------------*/ /* INCLUDES */ /*---------------------------------------------------------------------------*/ #include "sconf.h" #include #include "GlobalTypes.h" #include "ErrorCodes.h" #include "RBuffer.h" #include "Uart.h" #include "iotms570LS20216.h" #include "TMS570_DMA.h" #include "CDI_UART.h" #include "Config.h" /*---------------------------------------------------------------------------*/ /* DEFINITIONS AND MACROS */ /*---------------------------------------------------------------------------*/ DMA_CH * DMA_CHA1= ((DMA_CH *)0xFFF80020U); /*---------------------------------------------------------------------------*/ /* TYPEDEFS AND STRUCTURES */ /*---------------------------------------------------------------------------*/ /*---------------------------------------------------------------------------*/ /* PROTOTYPES */ /*---------------------------------------------------------------------------*/ /*---------------------------------------------------------------------------*/ /* LOCAL VARIABLES */ /*---------------------------------------------------------------------------*/ uint32 dmaArray = 0xffffffff; /*---------------------------------------------------------------------------*/ /* FUNCTION IMPLEMENTATION */ /*---------------------------------------------------------------------------*/ void CCdiUart::txInterrupt(uint8 *pu8_Buffer) { } void CCdiUart::rxInterrupt(uint8 *pu8_Buffer) { uint8 i = 0; i ++; } void CCdiUart::DMA_SetUp(void) { // bring port out of reset mUartPorts[UART_PORT_1]->GCR0 = 1U; // disable all interrupts mUartPorts[UART_PORT_1]->CLRINT = 0xFFFFFFFF; mUartPorts[UART_PORT_1]->CLRINTLVL = 0xFFFFFFFF; // Global Control 1 mUartPorts[UART_PORT_1]->GCR1 = (1 << 25) //enable transmit | (1 << 24) //enable receive | (1 << 5) // Internal Clock | (1 << 1); // asynchronous mode // transmision length mUartPorts[UART_PORT_1]->LENGTH = 8-1; // Set SCI functional mode ( not GIO) mUartPorts[UART_PORT_1]->FUN = (1 << 2) // tx pin | (1 << 1) // rx pin | (0); // clk pin // Set SCI pins default output values mUartPorts[UART_PORT_1]->DOUT = (0 << 2) // tx pin | (0 << 1) // rx pin | (0); // clk pin // Set SCI pins open drain enable mUartPorts[UART_PORT_1]->ODR = (0 << 2) // tx pin | (0 << 1) // rx pin | (0); // clk pin // Set SCI pins Pullup/pulldown enable mUartPorts[UART_PORT_1]->PD = (0 << 2) // tx pin | (0 << 1) // rx pin | (0); // clk pin // set SCI pins pullup/pulldown select mUartPorts[UART_PORT_1]->PSL = (1 << 2) // tx pin | (1 << 1) // rx pin | (1); // clk pin // The interrupt level for the following interrupts need to be changed as needed. // set interrupt level mUartPorts[UART_PORT_1]->SETINTLVL = (0 << 26) // Framing error | (0 << 25) // Overrun error | (0 << 24) // Pariry error | (0 << 9) // Receive | (0 << 8) // Transmit | (0 << 1) // Wakeup | (0); // Break detect // Set interrupt enable mUartPorts[UART_PORT_1]->SETINT = (0 << 26) // Framing error | (0 << 25) // Overrun error | (0 << 24) // Pariry error | (0 << 9) // Receive | (0 << 1) // Wakeup | (0); // Break detect // Enable DMA requests for TX and RX mUartPorts[UART_PORT_1]->SETINT = (1 << 17) | (1 << 16); // DMA Reset DMAGCTRL_bit.DMA_RES = 1; //DMA Enable DMAGCTRL_bit.DMA_EN = 1; // Enable Debug DMAGCTRL_bit.DEBUG_MODE = 3; // Set DMA Channel Packet DMA_CHA1->Src_Addr = (uint32)0xFFF7E434U; //Source address DMA_CHA1->Dst_Addr = (uint32)&dmaArray; // Destination Address DMA_CHA1->Frame_Cnt = 1; // Frame count DMA_CHA1->Elmnt_Cnt = 1; // Element count in frame DMA_CHA1->Frame_Dst_Offst=0; //Offsets DMA_CHA1->Elmnt_Dst_Offst=0; DMA_CHA1->Elmnt_Src_Offst=0; DMA_CHA1->Frame_Src_Offst=0; DMA_CHA1->channel_Ctrl = (1 << 15) | (0 << 14) | (1 << 13) | (0 << 12) | (0 << 8) | (0 << 4) | (0 << 3) | (0 << 2) | (0 << 1) | (0); // DMAGCHIENAS_bit.GCHIE1=1; // Enable Global Interrupt for Ch 0 DMAPAR0_bit.CH1PA =4; // Assign PortB DMADREQASI0_bit.CH1ASI = 28; // Assign DMA request 28 to Chan 0 DMAPTCRL_bit.BYB = 1; DMAHWCHENAS_bit.HWCHENAS1 = 1; // Enable Hardware triggering DMAFTCINTENAS_bit.FTCINTENA1 = 1; // Enable Frame transfer complete interrupt } /*---------------------------------------------------------------------------*/ /* EOF */ /*---------------------------------------------------------------------------*/