	/*----------------------------------------------------------------------------*/

#include "types.h"
#include "can.h"
#include "timer.h"
#include "het.h"
#include "vim.h"
#include "system.h"
#include "slavesystem.h"
#include "pcr.h"
#include "flash.h"
#include "sci.h"

/*----------------------------------------------------------------------------*/


extern void _clearRegisters_();
extern void _stackPointer_();


/*----------------------------------------------------------------------------
 vim jump table                                                             

typedef void (*T_isrFuncPTR)();

struct vim_ram
{
    T_isrFuncPTR ISR[42];
};

#define VIM_RAM ((volatile struct vim_ram *)0xFFF82000)

/*----------------------------------------------------------------------------
 vim initalisation table                                                   

static const T_isrFuncPTR s_vim_init[42] =
{
    IO_PHANTOM_INT, // 0
    IO_PHANTOM_INT,
    IO_PHANTOM_INT,
    IO_TIM0_INT,  
    IO_PHANTOM_INT,
    IO_PHANTOM_INT,
    IO_PHANTOM_INT,
    IO_PHANTOM_INT,
    IO_PHANTOM_INT,
    IO_PHANTOM_INT,
    IO_PHANTOM_INT,
    IO_NHET_INT_HIGH, //11
    IO_PHANTOM_INT,
    IO_PHANTOM_INT,
    IO_PHANTOM_INT,
    IO_PHANTOM_INT,
    IO_PHANTOM_INT,
    IO_PHANTOM_INT,
    IO_PHANTOM_INT,
    IO_PHANTOM_INT,
    IO_PHANTOM_INT,
    IO_PHANTOM_INT,
    IO_PHANTOM_INT,
    IO_PHANTOM_INT,
    IO_NHET_INT_LOW,//24
    IO_PHANTOM_INT,
    IO_PHANTOM_INT,
    IO_PHANTOM_INT,
    IO_PHANTOM_INT,
    IO_PHANTOM_INT,
    IO_PHANTOM_INT,
    IO_PHANTOM_INT,
    IO_PHANTOM_INT,
    IO_PHANTOM_INT,
    IO_PHANTOM_INT,
    IO_PHANTOM_INT,
    IO_PHANTOM_INT,
    IO_PHANTOM_INT,
    IO_PHANTOM_INT,
    IO_PHANTOM_INT,
    IO_PHANTOM_INT,
    IO_PHANTOM_INT  //41

};*/

	/*IO_PHANTOM_INT,
    IO_PHANTOM_INT,
    IO_PHANTOM_INT,
    IO_PHANTOM_INT,
    IO_PHANTOM_INT,
    IO_PHANTOM_INT,
    IO_PHANTOM_INT,
    IO_PHANTOM_INT,
    IO_PHANTOM_INT,
    IO_PHANTOM_INT,
    IO_PHANTOM_INT,
    IO_PHANTOM_INT,
    IO_PHANTOM_INT,  //54
	IO_PHANTOM_INT,
    IO_PHANTOM_INT,
    IO_PHANTOM_INT,
    IO_PHANTOM_INT,
    IO_PHANTOM_INT,
    IO_PHANTOM_INT,
    IO_PHANTOM_INT,
    IO_PHANTOM_INT,
    IO_PHANTOM_INT,*/
   
    


/*----------------------------------------------------------------------------*/
/* Device Settings Routine                                                    */


static void deviceSettings()
{
     /* setup flash wrapper */
	FLASH->FRDCNTL    = 0x0311;
	FLASH->FBFALLBACK = 0x00FF;

	ESM->ESMSR1 = 0x80000000;
	ESM->ESMSR2 = 0x00000004;

 
	  /* setup pll */
    SYSTEM->PLLCTL1 = 0x49839500U;
    SYSTEM->PLLCTL2 = 0x0A41901EU;//PLL OUTPUT IS 30 MHZ

	SYSTEM->CSDISSET = 0x03; //set clock disable

  
	SYSTEM->CSDISCLR = 0x03;//clear clock disable 


    /* wait for until clocks are locked */
    while ((SYSTEM->CSVSTAT & 0x02) == 0);

	/* select clock source */
 	SYSTEM->GHVSRC = 0x00000001U; //defaulting to PLL clk

    /* power-up peripharals */
    PCR->PSPWRDWNCLR0 = 0xFFFFFFFF;
    PCR->PSPWRDWNCLR1 = 0xFFFFFFFF;
    PCR->PSPWRDWNCLR2 = 0xFFFFFFFF;
    PCR->PSPWRDWNCLR3 = 0xFFFFFFFF;

    /* set peripheral clock ratio */
   
    /* enable peripherals */

	SYSTEM->VCLKR  = 0x00000000U;//30 MHZ
    SYSTEM->VCLK2R = 0x00000000U;//30 MHZ


    /* set RTI clock source */
    SYSTEM->RCLKSRC = 0x00000000U;//8 MHZ

    /* set asynchronous peripheral clock source */
    SYSTEM->VCLKASRC = 0x00000000U;//8MHZ
	

    /* enable peripherals */
    SYSTEM->PENA = 1U;


  // Enable IRQ in CPSR
    asm (" MRS  R1, CPSR ");
    asm (" BIC  R1, R1, #0x80 ");
    asm (" MSR  CPSR, R1 ");

    /* release het from reset */
   // S_SYSTEM->GCTRL = 0x00000005U;
}


/*----------------------------------------------------------------------------*/
/* Startup Routine                                                            */


extern unsigned *__binit__;
extern unsigned *__cinit__;
extern unsigned *__pinit__;

/*asm("                   .global _main");
asm("                   .global _Stack_User");
asm("Stack_User:        .long   _Stack_User");
asm("                   .global _Stack_Supervisor");
asm("Stack_Supervisor:  .long   _Stack_Supervisor");
asm("                   .global _Stack_Fiq");
asm("Stack_Fiq:         .long   _Stack_Fiq");
asm("                   .global _Stack_Irq");
asm("Stack_Irq:         .long   _Stack_Irq");
asm("                   .global _Stack_Abort");
asm("Stack_Abort:       .long   _Stack_Abort");
asm("                   .global _Stack_Undefined");
asm("Stack_Undefined:   .long   _Stack_Undefined");*/


void c_int00()
{
    /* register initialization for CPU compare unit */

  _clearRegisters_();

/*	asm(" MRS   R5, CPSR");
        asm(" BIC   R5, R5, #0x1F");
        
		asm(" MOV   R0, lr");
		asm(" MOV   R1, #0x00");
		asm(" MOV   R2, #0x00");
		asm(" MOV   R3, #0x00");
		asm(" MOV   R4, #0x00");
		asm(" MOV   R5, #0x00");
		asm(" MOV   R6, #0x00");
		asm(" MOV   R7, #0x00");
		asm(" MOV   R8, #0x00");
		asm(" MOV   R9, #0x00");
		asm(" MOV   R10, #0x00");
		asm(" MOV   R11, #0x00");
		asm(" MOV   R12, #0x00");
		asm(" MOV   R13, #0xD1");
		asm(" MSR   CPSR, R13");
		asm(" MOV   R8, #0x00");
		asm(" MOV   R9, #0x00");
		asm(" MOV   R10, #0x00");
		asm(" MOV   R11, #0x00");
		asm(" MOV   R12, #0x00");
		asm(" MOV   R13, #0xD3");
		asm(" MSR   CPSR, R13"); */

    /* stacks */
    _stackPointer_();

    // VIM->REQMASKCLR0 = 0x00000004;

    /* device settings */
    deviceSettings();
	
	/* Perform Memory Initialization */
  
  SYSTEM->MINITGCR = 0x0000000AU;
  SYSTEM->MSINENA  = 0x00000104U;//adc memory initialisation

    /* Wait for Memory-Initialization */
    while((SYSTEM->MSTCGSTAT & 0x100U) == 0U);

    /* Disable Memory Initialization */
    SYSTEM->MINITGCR = 0x00000005U;

    /* Initialize VIM table */
  //  {
  //     unsigned i;

   //    for (i = 0; i < 64; i++)
     //   {
        //  VIM_RAM->ISR[i] = s_vim_init[i];
        //}
    //}

   // e_SCI0_ST.Scigcr0 = 0x00000001; // privileged mode write[Reset the pin in privilage mode]

   

//	asm(" mov   r0 , #0x1F ");//10ENABLING INTERRUPTS AND ENTER  SYSTEMMODE
//	asm(" msr   cpsr, r0 ");
       
     
	
   main();

	/*
            Start up the application
        */
       // asm(" B     _main");

  
   
}


/*----------------------------------------------------------------------------*/

