Please Follow below steps *******************************************BACKGROUND*************************************************** we have 2 C files, File_1 and File_2 . We have seperate linker file for them LINKER_1 and LINKER_2 and compile them independently to generate two hex files . Hex File_1 is loaded in controller and runs as a normal embedded code , now we write hex File_2 to ram area of controller by a external tool . ************************************File_1 setup steps start ************************************************** Compiler : T_ti arm V18.12.2 Model : ROM model LINKER_1 discribtion : (Please create required section for your code eg: .text , .cinit , .bss etc according to your requirnment in the below example we have just explained you what we are trying to do) *************************************************************************************************************************** MEMORY{ FUNCTION_POINTER_AREA(RW) : origin=0X08002A00 length = 0x28 } SECTION{ GROUP : > FUNCTION_POINTER_AREA ALIGN(4) { Function_1_SECTN Function_2_SECTN Function_3_SECTN Function_4_SECTN Function_5_SECTN Function_6_SECTN type = NOINIT Function_7_SECTN type = NOINIT Function_8_SECTN type = NOINIT Function_9_SECTN type = NOINIT Function_10_SECTN type = NOINIT } } ******************************************************************************************************************************** File_1 discribtion : File_1 has 6 functions as follows void Function_1(void), void Function_2(void), void Function_3(void), void Function_4(void), void Function_5(void) and void Function_11(void) ; #pragma DATA_SECTION(Function_6_PTR, "Function_6_SECTN") void (*Function_6_PTR)(); #pragma DATA_SECTION(Function_7_PTR, "Function_7_SECTN") void (*Function_7_PTR)(); #pragma DATA_SECTION(Function_8_PTR, "Function_8_SECTN") void (*Function_8_PTR)(); #pragma DATA_SECTION(Function_9_PTR, "Function_9_SECTN") void (*Function_9_PTR)(); #pragma DATA_SECTION(Function_10_PTR, "Function_10_SECTN") void (*Function_10_PTR)(); void main() { Function_11(); } void Function_11(void) { Function_6_PTR(); Function_7_PTR(); Function_8_PTR(); Function_9_PTR(); Function_10_PTR(); } void Function_1(void) { /*user code*/ } void Function_2(void) { /*user code*/ } void Function_3(void) { /*user code*/ } void Function_4(void) { /*user code*/ } void Function_5(void) { /*user code*/ } #pragma RETAIN(Function_1_PTR) #pragma DATA_SECTION(Function_1_PTR, "Function_1_SECTN") void (*Function_1_PTR)() = void Function_1; #pragma RETAIN(Function_2_PTR) #pragma DATA_SECTION(Function_2_PTR, "Function_2_SECTN") void (*Function_2_PTR)() = void Function_2; #pragma RETAIN(Function_3_PTR) #pragma DATA_SECTION(Function_3_PTR, "Function_3_SECTN") void (*Function_3_PTR)() = void Function_3; #pragma RETAIN(Function_4_PTR) #pragma DATA_SECTION(Function_4_PTR, "Function_4_SECTN") void (*Function_4_PTR)() = void Function_4; #pragma RETAIN(Function_5_PTR) #pragma DATA_SECTION(Function_5_PTR, "Function_5_SECTN") void (*Function_5_PTR)() = void Function_5; ************************************File_1 setup steps END ************************************************** ************************************File_2 setup steps start ************************************************** Compiler : T_ti arm V18.12.2 Model : RAM model LINKER_2 discribtion : (Please create required section for your code eg: .text , .cinit , .bss etc according to your requirnment in the below example we have just explained you what we are trying to do) *************************************************************************************************************************** MEMORY{ FUNCTION_POINTER_AREA(RW) : origin=0X08002A00 length = 0x28 } SECTION{ GROUP : > FUNCTION_POINTER_AREA ALIGN(4) { Function_1_SECTN type = NOINIT Function_2_SECTN type = NOINIT Function_3_SECTN type = NOINIT Function_4_SECTN type = NOINIT Function_5_SECTN type = NOINIT Function_6_SECTN Function_7_SECTN Function_8_SECTN Function_9_SECTN Function_10_SECTN } } ******************************************************************************************************************************** File_2 discribtion : File_2 has 5 functions as follows void Function_6(void), void Function_7(void), void Function_8(void), void Function_9(void), void Function_10(void). #pragma DATA_SECTION(Function_1_PTR, "Function_1_SECTN") void (*Function_1_PTR)(); #pragma DATA_SECTION(Function_2_PTR, "Function_2_SECTN") void (*Function_2_PTR)(); #pragma DATA_SECTION(Function_3_PTR, "Function_3_SECTN") void (*Function_3_PTR)(); #pragma DATA_SECTION(Function_4_PTR, "Function_4_SECTN") void (*Function_4_PTR)(); #pragma DATA_SECTION(Function_5_PTR, "Function_5_SECTN") void (*Function_5_PTR)(); void Function_6(void) { Function_1_PTR(); } void Function_7(void) { Function_2_PTR(); } void Function_8 Function_3_PTR(); } void Function_9(void) { Function_4_PTR(); } void Function_10(void) { Function_5_PTR(); } #pragma RETAIN(Function_6_PTR) #pragma DATA_SECTION(Function_6_PTR, "Function_6_SECTN") void (*Function_6_PTR)() = void Function_6; #pragma RETAIN(Function_7_PTR) #pragma DATA_SECTION(Function_7_PTR, "Function_7_SECTN") void (*Function_7_PTR)() = void Function_7; #pragma RETAIN(Function_8_PTR) #pragma DATA_SECTION(Function_8_PTR, "Function_8_SECTN") void (*Function_8_PTR)() = void Function_7; #pragma RETAIN(Function_9_PTR) #pragma DATA_SECTION(Function_9_PTR, "Function_9_SECTN") void (*Function_9_PTR)() = void Function_9; #pragma RETAIN(Function_10_PTR) #pragma DATA_SECTION(Function_10_PTR, "Function_10_SECTN") void (*Function_10_PTR)() = void Function_10; ************************************File_2 setup steps END ************************************************** Now compile the File_1 and observe its map file and hex file , it is observed that in __TI_cinit_table you can see their load and run address , and when you run the code it is placed in little endian on ram , and if you dump the File_2 hex file the section Function_6_SECTN , Function_7_SECTN ,Function_8_SECTN ,Function_9_SECTN ,Function_10_SECTN are placed in big endian on ram.